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Hello,
You have a R1/R2 voltage divider input to the gate of Q2.
Therefore the JFET gate voltage is R1 / R1 + R2 * 9v = 0.5 x 10e6 * 9 = 4.5 MV.
So the input voltage is 4.5 Mega Volts. Although the max gate-to-drain Voltage for this JFET according to its spec is 40v.
Is this correct? if so, does is cause any issues?
The text was updated successfully, but these errors were encountered:
I have tested it and it works: https://github.com/Supermagnum/Skibladner
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Hello,
You have a R1/R2 voltage divider input to the gate of Q2.
Therefore the JFET gate voltage is R1 / R1 + R2 * 9v = 0.5 x 10e6 * 9 = 4.5 MV.
So the input voltage is 4.5 Mega Volts. Although the max gate-to-drain Voltage for this JFET according to its spec is 40v.
Is this correct? if so, does is cause any issues?
The text was updated successfully, but these errors were encountered: