Release v1.4.1

Author: ALABSTM

Middlewares/ST/STM32_WPAN/Release_Notes.html

@@ -171,10 +171,68 @@ <h1 id="purpose">Purpose</h1>
 <div class="col-sm-12 col-lg-8">
 <h1 id="update-history">Update History</h1>
 <div class="collapse">
-<input type="checkbox" id="collapse-section6" checked aria-hidden="true"> <label for="collapse-section6" aria-hidden="false">V2.4.0 / 03-June-2024</label>
+<input type="checkbox" id="collapse-section7" checked aria-hidden="true"> <label for="collapse-section7" aria-hidden="false">V2.4.1 / 18-July-2024</label>
 <div>
 <h2 id="main-changes">Main Changes</h2>
 <ul>
+<li>Productive PHY settings including AoA/AoD support.</li>
+<li><p>ID 181488 : Optimization of RF calibration timing.</p></li>
+<li>BLE Audio:
+<ul>
+<li>Changes :
+<ul>
+<li>Codec : Change ReadLocalSupportedControllerDelay to provide only margin if codec configuration length parameter is null</li>
+</ul></li>
+<li>Issues fixed:
+<ul>
+<li>ID 186241 : 2 successive Volume Setting Updates from one CAP Acceptor are not correctly transmitted to 2nd CAP Acceptor from CAP Initiator</li>
+<li>When ASCS Enable Control Operation includes invalid ASE ID, the “Number of ASEs” value in the Control Operation Response of BAP Unicast Server is invalid</li>
+</ul></li>
+</ul></li>
+<li>PHY 802.15.4:
+<ul>
+<li>Issues fixed:
+<ul>
+<li>ID 160933 : API for continuous wave not yet supported</li>
+<li>ID 160930 : API for continuous modulation not yet supported</li>
+<li>ID 164825 : RSSI reading incorrect : around 6dbm loss from –90 to -30dbm</li>
+</ul></li>
+</ul></li>
+<li><strong>Known limitations</strong>:
+<ul>
+<li>BLE:
+<ul>
+<li>ID 143245 : ACI_HAL_GET_ANCHOR_PERIOD, ACI_HAL_SET_SLAVE_LATENCY not yet supported.</li>
+<li>ID 178561 : White list not updated when advertising in privacy mode.</li>
+</ul></li>
+<li>BLE Audio:
+<ul>
+<li>Framed mode not supported (44.1 KHz).</li>
+<li>ID 135240 : Long synchronization time in Broadcast due to scheduling conflict between extended advertising and BIG event.</li>
+<li>ID 165710 : Audio Latency may not be respected with high transport latency.</li>
+</ul></li>
+<li>Common 802.15.4 (MAC / Thread / Zigbee):
+<ul>
+<li>ID 182045 : [BLE_Thread_SED] issue with data polling / device crash</li>
+</ul></li>
+<li>Zigbee:
+<ul>
+<li>ID 182978 In color cluster, wrong parsing for enhanced move to hue command.</li>
+</ul></li>
+<li>MAC 802.15.4:
+<ul>
+<li>ID 182781 : During association, the capable information with receiver On When Idle doesn’t work</li>
+<li>ID 182904 : Not received MLME-Sync-Loss.ind for associate device to a PAN coordinator</li>
+</ul></li>
+</ul></li>
+</ul>
+</div>
+</div>
+<div class="collapse">
+<input type="checkbox" id="collapse-section6" aria-hidden="true"> <label for="collapse-section6" aria-hidden="false">V2.4.0 / 03-June-2024</label>
+<div>
+<h2 id="main-changes-1">Main Changes</h2>
+<ul>
 <li>BLE:
 <ul>
 <li>Two new BLE stack configurations added:
@@ -282,7 +340,7 @@ <h2 id="main-changes">Main Changes</h2>
 <div class="collapse">
 <input type="checkbox" id="collapse-section5" aria-hidden="true"> <label for="collapse-section5" aria-hidden="false">V2.3.1 / 22-March-2024</label>
 <div>
-<h2 id="main-changes-1">Main Changes</h2>
+<h2 id="main-changes-2">Main Changes</h2>
 <ul>
 <li><p>Productive RF-PHY settings.</p></li>
 <li>Zigbee:
@@ -352,7 +410,7 @@ <h2 id="main-changes-1">Main Changes</h2>
 <div class="collapse">
 <input type="checkbox" id="collapse-section4" aria-hidden="true"> <label for="collapse-section4" aria-hidden="false">V2.3.0 / 05-Feb-2024</label>
 <div>
-<h2 id="main-changes-2">Main Changes</h2>
+<h2 id="main-changes-3">Main Changes</h2>
 <ul>
 <li><p>Adding support of BLE-Thread and BLE-Zigbee Dynamic Concurrent Modes.</p></li>
 <li><p>All libraries are now compiled with MDK-ARM (KEIL) ARMCLANG V6.19 AEABI format.</p></li>
@@ -466,7 +524,7 @@ <h2 id="main-changes-2">Main Changes</h2>
 <div class="collapse">
 <input type="checkbox" id="collapse-section3" aria-hidden="true"> <label for="collapse-section3" aria-hidden="false">V2.2.0 / 22-Sept-2023</label>
 <div>
-<h2 id="main-changes-3">Main Changes</h2>
+<h2 id="main-changes-4">Main Changes</h2>
 <ul>
 <li>BLE:
 <ul>
@@ -536,7 +594,7 @@ <h2 id="main-changes-3">Main Changes</h2>
 <div class="collapse">
 <input type="checkbox" id="collapse-section2" aria-hidden="true"> <label for="collapse-section2" aria-hidden="false">V2.1.0 / 30-May-2023</label>
 <div>
-<h2 id="main-changes-4">Main Changes</h2>
+<h2 id="main-changes-5">Main Changes</h2>
 <ul>
 <li>BLE:
 <ul>
@@ -564,7 +622,7 @@ <h2 id="main-changes-4">Main Changes</h2>
 <div class="collapse">
 <input type="checkbox" id="collapse-section1" aria-hidden="true"> <label for="collapse-section1" aria-hidden="false">V2.0.0 / 08-February-2023</label>
 <div>
-<h2 id="main-changes-5">Main Changes</h2>
+<h2 id="main-changes-6">Main Changes</h2>
 <p>First official release for WBA</p>
 <ul>
 <li>Known limitations:

Middlewares/ST/STM32_WPAN/ble/audio/lib/ble_audio.a

@@ -170,8 +170,8 @@ typedef enum
   * @param media_packet_pool_size : size in bytes of the provided pool
   * @param media_packet_pool : pointer to the provided pool
   * @param codecRAMConfig : pointer to the RAM dedicated to the LC3 codec
-  * @param margin_processing_us : margin is microseconds added to the controller delay
-  *                               for including higher priority interrupt latency
+  * @param margin_processing_us :  extra latency in microseconds added to the controller delay
+  *                               for including higher priority processing over a codec frame interval
   * @param rf_max_setup_time_us : maximum timing in microseconds measured from the radio interrupt to the beginning of
   *                               the corresponding ISO event (radio preparation). Added as an extra latency at source
   * @param codec_mode : configuration of the codec manager behavior, see CODEC_Mode_t

Middlewares/ST/STM32_WPAN/ble/codec/codec_manager/Inc/codec_mngr.h

@@ -66,7 +66,7 @@
 /* Non-standard features configurations */
 #define NUM_OF_CTSM_EMNGR_HNDLS                     0 /* Number of custom handles in event manager to be used for app specific needs */
 #define SUPPORT_AUGMENTED_BLE_MODE                  0 /* Enable\Disable Augmented BLE Support. Enable:1 - Disable:0 */
-#define SUPPORT_PTA                                 0 /* Enable\Disable PTA Feature. Enable:1 - Disable:0 */
+#define SUPPORT_PTA                                 1 /* Enable\Disable PTA Feature. Enable:1 - Disable:0 */
 
 /*************************** MAC Configuration *************************************/
 /*Configurations of MAC will apply only when MAC is enabled*/

Middlewares/ST/STM32_WPAN/ble/codec/codec_manager/Lib/codec_mngr.a

@@ -66,7 +66,7 @@
 /* Non-standard features configurations */
 #define NUM_OF_CTSM_EMNGR_HNDLS                     0 /* Number of custom handles in event manager to be used for app specific needs */
 #define SUPPORT_AUGMENTED_BLE_MODE                  0 /* Enable\Disable Augmented BLE Support. Enable:1 - Disable:0 */
-#define SUPPORT_PTA                                 0 /* Enable\Disable PTA Feature. Enable:1 - Disable:0 */
+#define SUPPORT_PTA                                 1 /* Enable\Disable PTA Feature. Enable:1 - Disable:0 */
 
 /*************************** MAC Configuration *************************************/
 /*Configurations of MAC will apply only when MAC is enabled*/

Middlewares/ST/STM32_WPAN/link_layer/ll_cmd_lib/config/ieee_15_4_basic/ll_fw_config.h

@@ -50,6 +50,24 @@ extern void LINKLAYER_PLAT_Assert(uint8_t condition);
   */
 extern void LINKLAYER_PLAT_AclkCtrl(uint8_t enable);
 
+/**
+  * @brief  Notify the Link Layer platform layer the system will enter in WFI 
+  *         and AHB5 clock may be turned of regarding the 2.4Ghz radio state. 
+  * @param  None
+  * @retval None
+  */
+extern void LINKLAYER_PLAT_NotifyWFIEnter(void);
+
+/**
+  * @brief  Notify the Link Layer platform layer the system exited WFI and AHB5 
+  *         clock may be resynchronized as is may have been turned of during
+  *         low power mode entry.
+  * @param  None
+  * @retval None
+  */
+extern void LINKLAYER_PLAT_NotifyWFIExit(void);
+
+
 /**
   * @brief  Active wait on bus clock readiness.
   * @param  None

Middlewares/ST/STM32_WPAN/link_layer/ll_cmd_lib/config/thread/ll_fw_config.h

@@ -118,4 +118,7 @@ uint8_t ll_sys_get_concurrent_state_machines_num(void);
 void ll_sys_config_BLE_schldr_timings(uint8_t drift_time, uint8_t exec_time);
 #endif /* BLE */
 
+uint32_t ll_intf_cmn_get_slptmr_value(void);
+
+
 #endif /* LL_SYS_H */

Middlewares/ST/STM32_WPAN/link_layer/ll_cmd_lib/lib/LinkLayer15_4.a

@@ -21,6 +21,9 @@
 #include "event_manager.h"
 #include "ll_intf.h"
 
+extern uint8_t AHB5_SwitchedOff;
+extern uint32_t radio_sleep_timer_val;
+
 /**
   * @brief  Initialize the Link Layer SoC dependencies
   * @param  None
@@ -68,9 +71,15 @@ void ll_sys_radio_ack_ctrl(uint8_t enable)
   */
 void ll_sys_radio_wait_for_busclkrdy(void)
 {
-  LINKLAYER_PLAT_WaitHclkRdy();
+  /* Wait on radio bus clock readiness if it has been turned of */
+  if (AHB5_SwitchedOff == 1)
+  {
+    AHB5_SwitchedOff = 0;
+    while (radio_sleep_timer_val == ll_intf_cmn_get_slptmr_value());
+  }
 }
 
+
 /**
   * @brief  Get RNG number for the Link Layer IP
   * @param  None

Middlewares/ST/STM32_WPAN/link_layer/ll_cmd_lib/lib/LinkLayer_BLE_Basic_20_links_lib.a

@@ -72,7 +72,8 @@
 
 /* Private user code ---------------------------------------------------------*/
 /* USER CODE BEGIN 0 */
-
+extern void LINKLAYER_PLAT_NotifyWFIExit(void);
+extern void LINKLAYER_PLAT_NotifyWFIEnter(void);
 /* USER CODE END 0 */
 
 uint32_t is_boot_from_standby(void)

Middlewares/ST/STM32_WPAN/link_layer/ll_cmd_lib/lib/LinkLayer_BLE_Basic_Plus_lib.a

@@ -351,7 +351,7 @@ void MX_ICACHE_Init(void)
 
   /* USER CODE BEGIN ICACHE_Init 1 */
   /* No retention for ICACHE in stop mode */
-  LL_PWR_SetICacheRAMStopRetention(LL_PWR_ICACHERAM_STOP_NO_RETENTION);
+  LL_PWR_SetICacheRAMStopRetention(LL_PWR_ICACHERAM_STOP_FULL_RETENTION);
   /* USER CODE END ICACHE_Init 1 */
 
   /** Enable instruction cache in 1-way (direct mapped cache)

Middlewares/ST/STM32_WPAN/link_layer/ll_cmd_lib/lib/LinkLayer_BLE_Basic_lib.a

@@ -300,9 +300,7 @@ void USART1_IRQHandler(void)
 void RADIO_IRQHandler(void)
 {
   /* USER CODE BEGIN RADIO_IRQn 0 */
-  /* WORKAROUND : Force AHB5 synchronization by waiting one edge of the LL Sleep Clock */
-  uint32_t mul,div;
-  ll_intf_get_aligned_us_now(&mul, &div);
+
   /* USER CODE END RADIO_IRQn 0 */
 
   if(NULL != radio_callback)

Middlewares/ST/STM32_WPAN/link_layer/ll_cmd_lib/lib/LinkLayer_BLE_Full_lib.a

@@ -529,4 +529,46 @@ uint32_t LINKLAYER_PLAT_GetUDN(void)
 
 /* USER CODE BEGIN LINKLAYER_PLAT 0 */
 
+/* Radio bus clock control variables */
+uint8_t AHB5_SwitchedOff = 0;
+uint32_t radio_sleep_timer_val = 0;
+
+/**
+  * @brief  Notify the Link Layer platform layer the system will enter in WFI 
+  *         and AHB5 clock may be turned of regarding the 2.4Ghz radio state. 
+  * @param  None
+  * @retval None
+  */
+void LINKLAYER_PLAT_NotifyWFIEnter(void)
+{
+  /* Check if Radio state will allow the AHB5 clock to be cut */
+  
+  /* AHB5 clock will be cut in the following cases:
+   * - 2.4GHz radio is not in ACTIVE mode (in SLEEP or DEEPSLEEP mode).
+   * - RADIOSMEN and STRADIOCLKON bits are at 0.
+   */
+  if((LL_PWR_GetRadioMode() != LL_PWR_RADIO_ACTIVE_MODE) ||
+     ((__HAL_RCC_RADIO_IS_CLK_SLEEP_ENABLED() == 0) && (LL_RCC_RADIO_IsEnabledSleepTimerClock() == 0)))
+  {
+    AHB5_SwitchedOff = 1;
+  }
+}
+
+/**
+  * @brief  Notify the Link Layer platform layer the system exited WFI and AHB5 
+  *         clock may be resynchronized as is may have been turned of during
+  *         low power mode entry.
+  * @param  None
+  * @retval None
+  */
+void LINKLAYER_PLAT_NotifyWFIExit(void)
+{
+ /* Check if AHB5 clock has been turned of and needs resynchronisation */
+  if (AHB5_SwitchedOff)
+  {
+    /* Read sleep register as earlier as possible */
+    radio_sleep_timer_val = ll_intf_cmn_get_slptmr_value();
+  }
+}
+
 /* USER CODE END LINKLAYER_PLAT 0 */

Middlewares/ST/STM32_WPAN/link_layer/ll_cmd_lib/lib/LinkLayer_BLE_Mac_lib.a

@@ -126,7 +126,8 @@ static void Exit_Stop_Standby_Mode(void);
 
 /* Private user code ---------------------------------------------------------*/
 /* USER CODE BEGIN 0 */
-
+extern void LINKLAYER_PLAT_NotifyWFIExit(void);
+extern void LINKLAYER_PLAT_NotifyWFIEnter(void);
 /* USER CODE END 0 */
 
 __WEAK OPTIMIZED void Standby_Restore_GPIO(void)
@@ -280,7 +281,10 @@ OPTIMIZED void PWR_EnterOffMode( void )
   SYSTEM_DEBUG_SIGNAL_SET(LOW_POWER_STANDBY_MODE_ENTER);
 
   /* USER CODE BEGIN PWR_EnterOffMode_1 */
-
+  /* Notify the Link Layer platform layer the system will enter in WFI 
+   * and AHB5 clock may be turned of regarding the 2.4Ghz radio state 
+   */
+  LINKLAYER_PLAT_NotifyWFIEnter();
   /* USER CODE END PWR_EnterOffMode_1 */
 
   /*
@@ -382,7 +386,11 @@ OPTIMIZED void PWR_ExitOffMode( void )
     __HAL_RCC_RADIO_CLK_ENABLE();
 
     /* USER CODE BEGIN PWR_ExitOffMode_2 */
-
+    /* Notify the Link Layer platform layer the system exited WFI 
+     * and AHB5 clock may be resynchronized as is may have been 
+     * turned of during low power mode entry.
+     */
+    LINKLAYER_PLAT_NotifyWFIExit();
     /* USER CODE END PWR_ExitOffMode_2 */
 
     /* Apply Prefetch configuration is enabled */
@@ -458,7 +466,10 @@ OPTIMIZED void PWR_EnterStopMode( void )
   SYSTEM_DEBUG_SIGNAL_SET(LOW_POWER_STOP_MODE_ENTER);
 
   /* USER CODE BEGIN PWR_EnterStopMode_1 */
-
+  /* Notify the Link Layer platform layer the system will enter in WFI 
+   * and AHB5 clock may be turned of regarding the 2.4Ghz radio state 
+   */
+  LINKLAYER_PLAT_NotifyWFIEnter();
   /* USER CODE END PWR_EnterStopMode_1 */
 
   Enter_Stop_Standby_Mode();
@@ -483,7 +494,11 @@ OPTIMIZED void PWR_ExitStopMode( void )
   SYSTEM_DEBUG_SIGNAL_SET(LOW_POWER_STOP_MODE_EXIT);
 
   /* USER CODE BEGIN PWR_ExitStopMode_1 */
-
+  /* Notify the Link Layer platform layer the system exited WFI 
+   * and AHB5 clock may be resynchronized as is may have been 
+   * turned of during low power mode entry.
+   */
+  LINKLAYER_PLAT_NotifyWFIExit();
   /* USER CODE END PWR_ExitStopMode_1 */
 
   Exit_Stop_Standby_Mode();
@@ -498,7 +513,10 @@ OPTIMIZED void PWR_ExitStopMode( void )
 void PWR_EnterSleepMode( void )
 {
   /* USER CODE BEGIN PWR_EnterSleepMode_1 */
-
+  /* Notify the Link Layer platform layer the system will enter in WFI 
+   * and AHB5 clock may be turned of regarding the 2.4Ghz radio state 
+   */
+  LINKLAYER_PLAT_NotifyWFIEnter();
   /* USER CODE END PWR_EnterSleepMode_1 */
 
   LL_LPM_EnableSleep();
@@ -512,7 +530,11 @@ void PWR_EnterSleepMode( void )
 void PWR_ExitSleepMode( void )
 {
   /* USER CODE BEGIN PWR_ExitSleepMode */
-
+  /* Notify the Link Layer platform layer the system exited WFI 
+   * and AHB5 clock may be resynchronized as is may have been 
+   * turned of during low power mode entry.
+   */
+  LINKLAYER_PLAT_NotifyWFIExit();
   /* USER CODE END PWR_ExitSleepMode */
 }
 

Middlewares/ST/STM32_WPAN/link_layer/ll_cmd_lib/lib/LinkLayer_BLE_Peripheral_Only_lib.a

@@ -351,7 +351,7 @@ void MX_ICACHE_Init(void)
 
   /* USER CODE BEGIN ICACHE_Init 1 */
   /* No retention for ICACHE in stop mode */
-  LL_PWR_SetICacheRAMStopRetention(LL_PWR_ICACHERAM_STOP_NO_RETENTION);
+  LL_PWR_SetICacheRAMStopRetention(LL_PWR_ICACHERAM_STOP_FULL_RETENTION);
   /* USER CODE END ICACHE_Init 1 */
 
   /** Enable instruction cache in 1-way (direct mapped cache)

Middlewares/ST/STM32_WPAN/link_layer/ll_cmd_lib/lib/LinkLayer_BLE_Thread_lib.a

@@ -301,9 +301,7 @@ void USART1_IRQHandler(void)
 void RADIO_IRQHandler(void)
 {
   /* USER CODE BEGIN RADIO_IRQn 0 */
-  /* WORKAROUND : Force AHB5 synchronization by waiting one edge of the LL Sleep Clock */
-  uint32_t mul,div;
-  ll_intf_get_aligned_us_now(&mul, &div);
+
   /* USER CODE END RADIO_IRQn 0 */
 
   if(NULL != radio_callback)