diff --git a/patch.sh b/patch.sh index 91e0a650f..59191c235 100644 --- a/patch.sh +++ b/patch.sh @@ -928,10 +928,11 @@ beaglebone () { fi ${git} "${DIR}/patches/beaglebone/blue/0001-ARM-dts-add-am335x-boneblue.dtb.patch" + ${git} "${DIR}/patches/beaglebone/blue/0002-add-am335x-boneblack-roboticscape.dts.patch" if [ "x${regenerate}" = "xenable" ] ; then wdir="beaglebone/blue" - number=1 + number=2 cleanup fi @@ -1130,6 +1131,7 @@ beaglebone () { device="am335x-boneblack-bbb-exp-c.dtb" ; dtb_makefile_append device="am335x-boneblack-bbb-exp-r.dtb" ; dtb_makefile_append device="am335x-boneblack-audio.dtb" ; dtb_makefile_append + device="am335x-boneblack-roboticscape.dtb" ; dtb_makefile_append device="am335x-sancloud-bbe.dtb" ; dtb_makefile_append diff --git a/patches/beaglebone/blue/0001-ARM-dts-add-am335x-boneblue.dtb.patch b/patches/beaglebone/blue/0001-ARM-dts-add-am335x-boneblue.dtb.patch index 4ee2c568c..17e3ff8d4 100644 --- a/patches/beaglebone/blue/0001-ARM-dts-add-am335x-boneblue.dtb.patch +++ b/patches/beaglebone/blue/0001-ARM-dts-add-am335x-boneblue.dtb.patch @@ -1,7 +1,7 @@ -From 311c06679136cb05bba73c8d66255fb877ad5b42 Mon Sep 17 00:00:00 2001 +From becb6540070f7497589149873616f38289adc7d0 Mon Sep 17 00:00:00 2001 From: Robert Nelson Date: Fri, 21 Oct 2016 12:40:31 -0500 -Subject: [PATCH] ARM: dts: add am335x-boneblue.dtb +Subject: [PATCH 1/2] ARM: dts: add am335x-boneblue.dtb Signed-off-by: Robert Nelson --- diff --git a/patches/beaglebone/blue/0002-add-am335x-boneblack-roboticscape.dts.patch b/patches/beaglebone/blue/0002-add-am335x-boneblack-roboticscape.dts.patch new file mode 100644 index 000000000..1a7e2b21b --- /dev/null +++ b/patches/beaglebone/blue/0002-add-am335x-boneblack-roboticscape.dts.patch @@ -0,0 +1,464 @@ +From 22e51e917f31fcb19fbd74bec7be5368bc3cf4c3 Mon Sep 17 00:00:00 2001 +From: StrawsonDesign +Date: Mon, 24 Oct 2016 00:37:27 -0700 +Subject: [PATCH 2/2] add am335x-boneblack-roboticscape.dts + +--- + .../arm/boot/dts/am335x-boneblack-roboticscape.dts | 445 +++++++++++++++++++++ + 1 file changed, 445 insertions(+) + create mode 100644 arch/arm/boot/dts/am335x-boneblack-roboticscape.dts + +diff --git a/arch/arm/boot/dts/am335x-boneblack-roboticscape.dts b/arch/arm/boot/dts/am335x-boneblack-roboticscape.dts +new file mode 100644 +index 0000000..000ec12 +--- /dev/null ++++ b/arch/arm/boot/dts/am335x-boneblack-roboticscape.dts +@@ -0,0 +1,445 @@ ++/* ++ * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/ ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License version 2 as ++ * published by the Free Software Foundation. ++ */ ++ ++ /****************************************************************************** ++ * This device tree serves to replace the need for an overlay when using ++ * the RoboticsCape. It is similar to the boneblue tree but preserves ++ * pin config for the black. ++ ******************************************************************************/ ++ ++ ++/dts-v1/; ++ ++#include "am33xx.dtsi" ++#include "am335x-bone-common-no-capemgr.dtsi" ++#include "am335x-bone-common-universal-pins.dtsi" ++#include "am33xx-pruss-rproc.dtsi" ++ ++/ { ++ model = "TI AM335x BeagleBone Black"; ++ compatible = "ti,am335x-bone-black", "ti,am335x-bone", "ti,am33xx"; ++}; ++ ++&ldo3_reg { ++ regulator-min-microvolt = <1800000>; ++ regulator-max-microvolt = <1800000>; ++ regulator-always-on; ++}; ++ ++&mmc1 { ++ vmmc-supply = <&vmmcsd_fixed>; ++}; ++ ++&mmc2 { ++ vmmc-supply = <&vmmcsd_fixed>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&emmc_pins>; ++ bus-width = <8>; ++ status = "okay"; ++}; ++ ++&cpu0_opp_table { ++ /* ++ * All PG 2.0 silicon may not support 1GHz but some of the early ++ * BeagleBone Blacks have PG 2.0 silicon which is guaranteed ++ * to support 1GHz OPP so enable it for PG 2.0 on this board. ++ */ ++ oppnitro@1000000000 { ++ opp-supported-hw = <0x06 0x0100>; ++ }; ++}; ++ ++/******************************************************************************* ++* Pin Muxing ++* Unlike Cape overlay, only a few GPIO pins are set up here. Therest are ++* configured by the remaining fragements as references to ++* am335x-bone-common-universal-pins.dtsi ++*******************************************************************************/ ++&am33xx_pinmux { ++ ++ mux_helper_pins: pins { ++ pinctrl-single,pins = < ++ ++ /* GPIO Input Pullup */ ++ 0x09c 0x37 /*P8.9 T6 PAUSE_BTN */ ++ 0x098 0x37 /*P8.10 U6 MODE_BTN */ ++ 0x1AC 0x37 /*P9.25 A14 IMU_INT */ ++ ++ /* LEDs*/ ++ 0x090 0x0F /* P8.7 R7 LED_RED */ ++ 0x094 0x0F /* P8.8 T7 LED_GREEN */ ++ 0x028 0x0F /*P8.14 T11 BATT_LED_4 */ ++ 0x02C 0x0F /*P8.17 U12 BATT_LED_1 */ ++ 0x08c 0x0F /*P8.18 V12 BATT_LED_2 */ ++ 0x07c 0x0F /*P8.26 V6 BATT_LED_3 */ ++ >; ++ }; ++ ++}; ++ ++ ++/******************************************************************************* ++* Activate the above list of mux_help_pins ++* and enable userspace control of other pins we wish to be configurable ++*******************************************************************************/ ++&ocp { ++ ++ test_helper: helper { ++ compatible = "bone-pinmux-helper"; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&mux_helper_pins>; ++ ++ status = "okay"; ++ }; ++ ++ /* DSM2 Pins */ ++ P9_11_pinmux { ++ compatible = "bone-pinmux-helper"; ++ status = "okay"; ++ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "uart"; ++ ++ pinctrl-0 = <&P9_11_default_pin>; ++ pinctrl-1 = <&P9_11_gpio_pin>; ++ pinctrl-2 = <&P9_11_gpio_pu_pin>; ++ pinctrl-3 = <&P9_11_gpio_pd_pin>; ++ pinctrl-4 = <&P9_11_uart_pin>; ++ }; ++ ++ /* GPS UART header pins */ ++ P9_21_pinmux { ++ compatible = "bone-pinmux-helper"; ++ status = "okay"; ++ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "spi", "uart", "i2c", "pwm"; ++ pinctrl-0 = <&P9_21_default_pin>; ++ pinctrl-1 = <&P9_21_gpio_pin>; ++ pinctrl-2 = <&P9_21_gpio_pu_pin>; ++ pinctrl-3 = <&P9_21_gpio_pd_pin>; ++ pinctrl-4 = <&P9_21_spi_pin>; ++ pinctrl-5 = <&P9_21_uart_pin>; ++ pinctrl-6 = <&P9_21_i2c_pin>; ++ pinctrl-7 = <&P9_21_pwm_pin>; ++ }; ++ ++ P9_22_pinmux { ++ compatible = "bone-pinmux-helper"; ++ status = "okay"; ++ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "spi", "uart", "i2c", "pwm"; ++ pinctrl-0 = <&P9_22_default_pin>; ++ pinctrl-1 = <&P9_22_gpio_pin>; ++ pinctrl-2 = <&P9_22_gpio_pu_pin>; ++ pinctrl-3 = <&P9_22_gpio_pd_pin>; ++ pinctrl-4 = <&P9_22_spi_pin>; ++ pinctrl-5 = <&P9_22_uart_pin>; ++ pinctrl-6 = <&P9_22_i2c_pin>; ++ pinctrl-7 = <&P9_22_pwm_pin>; ++ }; ++ ++ /* SPI Header Pins */ ++ P9_28_pinmux { ++ compatible = "bone-pinmux-helper"; ++ status = "okay"; ++ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "pwm", "spi", "pwm2", "pruout", "pruin"; ++ pinctrl-0 = <&P9_28_default_pin>; ++ pinctrl-1 = <&P9_28_gpio_pin>; ++ pinctrl-2 = <&P9_28_gpio_pu_pin>; ++ pinctrl-3 = <&P9_28_gpio_pd_pin>; ++ pinctrl-4 = <&P9_28_pwm_pin>; ++ pinctrl-5 = <&P9_28_spi_pin>; ++ pinctrl-6 = <&P9_28_pwm2_pin>; ++ pinctrl-7 = <&P9_28_pruout_pin>; ++ pinctrl-8 = <&P9_28_pruin_pin>; ++ }; ++ ++ P9_29_pinmux { ++ compatible = "bone-pinmux-helper"; ++ status = "okay"; ++ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "pwm", "spi", "pruout", "pruin"; ++ pinctrl-0 = <&P9_29_default_pin>; ++ pinctrl-1 = <&P9_29_gpio_pin>; ++ pinctrl-2 = <&P9_29_gpio_pu_pin>; ++ pinctrl-3 = <&P9_29_gpio_pd_pin>; ++ pinctrl-4 = <&P9_29_pwm_pin>; ++ pinctrl-5 = <&P9_29_spi_pin>; ++ pinctrl-6 = <&P9_29_pruout_pin>; ++ pinctrl-7 = <&P9_29_pruin_pin>; ++ }; ++ ++ P9_30_pinmux { ++ compatible = "bone-pinmux-helper"; ++ status = "okay"; ++ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "pwm", "spi", "pruout", "pruin"; ++ pinctrl-0 = <&P9_30_default_pin>; ++ pinctrl-1 = <&P9_30_gpio_pin>; ++ pinctrl-2 = <&P9_30_gpio_pu_pin>; ++ pinctrl-3 = <&P9_30_gpio_pd_pin>; ++ pinctrl-4 = <&P9_30_pwm_pin>; ++ pinctrl-5 = <&P9_30_spi_pin>; ++ pinctrl-6 = <&P9_30_pruout_pin>; ++ pinctrl-7 = <&P9_30_pruin_pin>; ++ }; ++ ++ P9_31_pinmux { ++ compatible = "bone-pinmux-helper"; ++ status = "okay"; ++ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "pwm", "spi", "pruout", "pruin"; ++ pinctrl-0 = <&P9_31_default_pin>; ++ pinctrl-1 = <&P9_31_gpio_pin>; ++ pinctrl-2 = <&P9_31_gpio_pu_pin>; ++ pinctrl-3 = <&P9_31_gpio_pd_pin>; ++ pinctrl-4 = <&P9_31_pwm_pin>; ++ pinctrl-5 = <&P9_31_spi_pin>; ++ pinctrl-6 = <&P9_31_pruout_pin>; ++ pinctrl-7 = <&P9_31_pruin_pin>; ++ }; ++ ++ /* uart 1 / can */ ++ P9_24_pinmux { ++ compatible = "bone-pinmux-helper"; ++ status = "okay"; ++ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "uart", "can", "i2c", "pruin"; ++ pinctrl-0 = <&P9_24_default_pin>; ++ pinctrl-1 = <&P9_24_gpio_pin>; ++ pinctrl-2 = <&P9_24_gpio_pu_pin>; ++ pinctrl-3 = <&P9_24_gpio_pd_pin>; ++ pinctrl-4 = <&P9_24_uart_pin>; ++ pinctrl-5 = <&P9_24_can_pin>; ++ pinctrl-6 = <&P9_24_i2c_pin>; ++ pinctrl-7 = <&P9_24_pruin_pin>; ++ }; ++ ++ P9_26_pinmux { ++ compatible = "bone-pinmux-helper"; ++ status = "okay"; ++ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "uart", "can", "i2c", "pruin"; ++ pinctrl-0 = <&P9_26_default_pin>; ++ pinctrl-1 = <&P9_26_gpio_pin>; ++ pinctrl-2 = <&P9_26_gpio_pu_pin>; ++ pinctrl-3 = <&P9_26_gpio_pd_pin>; ++ pinctrl-4 = <&P9_26_uart_pin>; ++ pinctrl-5 = <&P9_26_can_pin>; ++ pinctrl-6 = <&P9_26_i2c_pin>; ++ pinctrl-7 = <&P9_26_pruin_pin>; ++ }; ++ ++ ++}; ++ ++ ++/******************************************************************************* ++* PWMSS ++*******************************************************************************/ ++&epwmss0 { ++ status = "okay"; ++}; ++ ++&epwmss1 { ++ status = "okay"; ++}; ++ ++&epwmss2 { ++ status = "okay"; ++}; ++ ++&ehrpwm0 { ++ status = "okay"; ++}; ++ ++/******************************************************************************* ++* PWM and Motor GPIO Pins ++*******************************************************************************/ ++&ehrpwm1 { ++ pinctrl-names = "default"; ++ pinctrl-0 = < ++ &P9_14_pwm_pin /*PWM_1A*/ ++ &P9_16_pwm_pin /*PWM_1B*/ ++ &P9_12_gpio_pin /*MDIR_1A*/ ++ &P9_13_gpio_pin /*MDIR_1B*/ ++ &P9_14_gpio_pin /*PWM_1A*/ ++ &P9_15_gpio_pin /*MDIR_2A*/ ++ &P8_34_gpio_pin /*MDIR_2B*/ ++ &P9_41_gpio_pin /*MOT_STBY*/ ++ >; ++ status = "okay"; ++}; ++ ++&ehrpwm2 { ++ pinctrl-names = "default"; ++ pinctrl-0 = < ++ &P8_19_pwm_pin /*PWM_2A*/ ++ &P8_13_pwm_pin /*PWM_2B*/ ++ &P8_43_gpio_pin /*MDIR_3B*/ ++ &P8_44_gpio_pin /*MDIR_3A*/ ++ &P8_45_gpio_pin /*MDIR_4A*/ ++ &P8_46_gpio_pin /*MDIR_4B*/ ++ >; ++ status = "okay"; ++}; ++ ++/******************************************************************************* ++* EQEP ++*******************************************************************************/ ++&eqep0 { ++ pinctrl-names = "default"; ++ pinctrl-0 = < ++ &P9_92_qep_pin ++ &P9_27_qep_pin ++ >; ++ ++ count_mode = <0>; /* 0 - Quadrature mode, normal 90 phase offset cha & chb. 1 - Direction mode. cha input = clock, chb input = direction */ ++ swap_inputs = <0>; /* Are channel A and channel B swapped? (0 - no, 1 - yes) */ ++ invert_qa = <1>; /* Should we invert the channel A input? */ ++ invert_qb = <1>; /* Should we invert the channel B input? I invert these because my encoder outputs drive transistors that pull down the pins */ ++ invert_qi = <0>; /* Should we invert the index input? */ ++ invert_qs = <0>; /* Should we invert the strobe input? */ ++ ++ status = "okay"; ++}; ++ ++&eqep1 { ++ pinctrl-names = "default"; ++ pinctrl-0 = < ++ &P8_33_qep_pin ++ &P8_35_qep_pin ++ >; ++ ++ count_mode = <0>; /* 0 - Quadrature mode, normal 90 phase offset cha & chb. 1 - Direction mode. cha input = clock, chb input = direction */ ++ swap_inputs = <0>; /* Are channel A and channel B swapped? (0 - no, 1 - yes) */ ++ invert_qa = <1>; /* Should we invert the channel A input? */ ++ invert_qb = <1>; /* Should we invert the channel B input? I invert these because my encoder outputs drive transistors that pull down the pins */ ++ invert_qi = <0>; /* Should we invert the index input? */ ++ invert_qs = <0>; /* Should we invert the strobe input? */ ++ ++ status = "okay"; ++}; ++ ++&eqep2 { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&P8_12_qep_pin &P8_11_qep_pin>; ++ ++ count_mode = <0>; /* 0 - Quadrature mode, normal 90 phase offset cha & chb. 1 - Direction mode. cha input = clock, chb input = direction */ ++ swap_inputs = <0>; /* Are channel A and channel B swapped? (0 - no, 1 - yes) */ ++ invert_qa = <1>; /* Should we invert the channel A input? */ ++ invert_qb = <1>; /* Should we invert the channel B input? I invert these because my encoder outputs drive transistors that pull down the pins */ ++ invert_qi = <0>; /* Should we invert the index input? */ ++ invert_qs = <0>; /* Should we invert the strobe input? */ ++ ++ status = "okay"; ++}; ++ ++ ++/******************************************************************************* ++* UART ++*******************************************************************************/ ++&uart1 { ++ pinctrl-names = "default"; ++ pinctrl-0 = < ++ &P9_24_uart_pin /* uart1_txd */ ++ &P9_26_uart_pin /* uart1_rxd */ ++ >; ++ status = "okay"; ++}; ++ ++&uart2 { ++ pinctrl-names = "default"; ++ pinctrl-0 = < ++ &P9_21_uart_pin /* uart2_txd */ ++ &P9_22_uart_pin /* uart2_rxd */ ++ >; ++ status = "okay"; ++}; ++ ++&uart4 { ++ status = "okay"; ++}; ++ ++&uart5 { ++ pinctrl-names = "default"; ++ pinctrl-0 = < ++ &P8_37_uart_pin /* uart5_txd */ ++ &P8_38_uart_pin /* uart5_rxd */ ++ >; ++ status = "okay"; ++}; ++ ++ ++/******************************************************************************* ++* PRU Encoder and Servos ++*******************************************************************************/ ++&pruss { ++ pinctrl-0 = < ++ &P8_15_pruin_pin /* PRU_ENCODER_B */ ++ &P8_16_pruin_pin /* PRU_ENCODER_A */ ++ &P8_27_pruout_pin /* SERVO_1 */ ++ &P8_28_pruout_pin /* SERVO_2 */ ++ &P8_29_pruout_pin /* SERVO_3 */ ++ &P8_30_pruout_pin /* SERVO_4 */ ++ &P8_39_pruout_pin /* SERVO_5 */ ++ &P8_40_pruout_pin /* SERVO_6 */ ++ &P8_41_pruout_pin /* SERVO_7 */ ++ &P8_42_pruout_pin /* SERVO_8 */ ++ &P8_36_gpio_pin /* SERVO_PWR */ ++ >; ++ status = "okay"; ++}; ++ ++ ++/******************************************************************************* ++* I2C ++*******************************************************************************/ ++&i2c1 { ++ pinctrl-names = "default"; ++ pinctrl-0 = < ++ &P9_17_i2c_pin ++ &P9_18_i2c_pin ++ >; ++ status = "okay"; ++ ++ /* this is the configuration part */ ++ clock-frequency = <400000>; ++ ++ #address-cells = <1>; ++ #size-cells = <0>; ++}; ++ ++&i2c2 { ++ pinctrl-names = "default"; ++ pinctrl-0 = < ++ &P9_19_i2c_pin ++ &P9_20_i2c_pin ++ >; ++ ++ status = "okay"; ++ clock-frequency = <400000>; ++ ++ #address-cells = <1>; ++ #size-cells = <0>; ++}; ++ ++ ++/******************************************************************************* ++* SPI ++*******************************************************************************/ ++&spi1 { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&P9_31_spi_pin /* spi1_sclk */ ++ &P9_29_spi_pin /* spi1_d0 */ ++ &P9_30_spi_pin /* spi1_d1 */ ++ &P9_23_gpio_pu_pin /* gpio1.17 ss2 */ ++ &P9_28_gpio_pu_pin /* gpio3.17 ss1 */ ++ >; ++ ++ #address-cells = <1>; ++ #size-cells = <0>; ++ status = "okay"; ++ ++ spidev@1 { ++ spi-max-frequency = <24000000>; ++ reg = <0>; ++ compatible = "linux,spidev"; ++ }; ++}; +-- +2.9.3 + diff --git a/patches/beaglebone/generated/0001-auto-generated-capes-add-dtbs-to-makefile.patch b/patches/beaglebone/generated/0001-auto-generated-capes-add-dtbs-to-makefile.patch index 70d41e755..a27255414 100644 --- a/patches/beaglebone/generated/0001-auto-generated-capes-add-dtbs-to-makefile.patch +++ b/patches/beaglebone/generated/0001-auto-generated-capes-add-dtbs-to-makefile.patch @@ -1,18 +1,18 @@ -From f156f1f19d08339750e5e7350b59a82d2ae8a55d Mon Sep 17 00:00:00 2001 +From 217f26a45b6304e918419a19311b18abb17c7aa8 Mon Sep 17 00:00:00 2001 From: Robert Nelson -Date: Fri, 21 Oct 2016 11:10:28 -0500 +Date: Mon, 24 Oct 2016 10:12:36 -0500 Subject: [PATCH] auto generated: capes: add dtbs to makefile Signed-off-by: Robert Nelson --- - arch/arm/boot/dts/Makefile | 25 +++++++++++++++++++++++++ - 1 file changed, 25 insertions(+) + arch/arm/boot/dts/Makefile | 26 ++++++++++++++++++++++++++ + 1 file changed, 26 insertions(+) diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile -index bea5376..c928385 100644 +index 394ffd8..7fd3dd7 100644 --- a/arch/arm/boot/dts/Makefile +++ b/arch/arm/boot/dts/Makefile -@@ -467,6 +467,31 @@ dtb-$(CONFIG_SOC_AM33XX) += \ +@@ -467,6 +467,32 @@ dtb-$(CONFIG_SOC_AM33XX) += \ am335x-base0033.dtb \ am335x-bone.dtb \ am335x-boneblack.dtb \ @@ -22,6 +22,7 @@ index bea5376..c928385 100644 + am335x-bonegreen-ctag-face.dtb \ + am335x-boneblack-ctag-face.dtb \ + am335x-sancloud-bbe.dtb \ ++ am335x-boneblack-roboticscape.dtb \ + am335x-boneblack-audio.dtb \ + am335x-boneblack-bbb-exp-r.dtb \ + am335x-boneblack-bbb-exp-c.dtb \ diff --git a/version.sh b/version.sh index 800dbab7a..13f0a54f8 100644 --- a/version.sh +++ b/version.sh @@ -28,7 +28,7 @@ toolchain="gcc_linaro_gnueabihf_5" #Kernel/Build KERNEL_REL=4.4 KERNEL_TAG=${KERNEL_REL}.27 -BUILD=${build_prefix}59.1 +BUILD=${build_prefix}59.2 #kernel_rt="" #v4.X-rcX + upto SHA