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[AMDGPU] Merge the conditions used for deciding CS spills for amdgpu_…
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…cs_chain[_preserve] (llvm#109911)

Multiple conditions exist to decide whether callee save spills/restores
are required for amdgpu_cs_chain or amdgpu_cs_chain_preserve calling
conventions. This patch consolidates them all and moves to a single
place.

Change-Id: Iceb4609d0b9505ea3ec09023887d4e9261d8d033
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cdevadas authored and kzhuravl committed Oct 22, 2024
1 parent 14e4fe2 commit 539e3d6
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Showing 2 changed files with 8 additions and 12 deletions.
14 changes: 4 additions & 10 deletions llvm/lib/Target/AMDGPU/SIFrameLowering.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -1601,16 +1601,10 @@ void SIFrameLowering::processFunctionBeforeFrameFinalized(
SIMachineFunctionInfo *FuncInfo = MF.getInfo<SIMachineFunctionInfo>();

// Allocate spill slots for WWM reserved VGPRs.
// For chain functions, we only need to do this if we have calls to
// llvm.amdgcn.cs.chain.
bool IsChainWithoutCalls =
FuncInfo->isChainFunction() && !MF.getFrameInfo().hasTailCall();
if (!FuncInfo->isEntryFunction() && !IsChainWithoutCalls) {
for (Register Reg : FuncInfo->getWWMReservedRegs()) {
const TargetRegisterClass *RC = TRI->getPhysRegBaseClass(Reg);
FuncInfo->allocateWWMSpill(MF, Reg, TRI->getSpillSize(*RC),
TRI->getSpillAlign(*RC));
}
for (Register Reg : FuncInfo->getWWMReservedRegs()) {
const TargetRegisterClass *RC = TRI->getPhysRegBaseClass(Reg);
FuncInfo->allocateWWMSpill(MF, Reg, TRI->getSpillSize(*RC),
TRI->getSpillAlign(*RC));
}

const bool SpillVGPRToAGPR = ST.hasMAIInsts() && FuncInfo->hasSpilledVGPRs()
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6 changes: 4 additions & 2 deletions llvm/lib/Target/AMDGPU/SIMachineFunctionInfo.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -280,8 +280,10 @@ void SIMachineFunctionInfo::allocateWWMSpill(MachineFunction &MF, Register VGPR,
// amdgpu_cs_chain_preserve calling convention and this is a scratch register.
// We never need to allocate a spill for these because we don't even need to
// restore the inactive lanes for them (they're scratchier than the usual
// scratch registers).
if (isChainFunction() && SIRegisterInfo::isChainScratchRegister(VGPR))
// scratch registers). We only need to do this if we have calls to
// llvm.amdgcn.cs.chain.
if (isChainFunction() && (SIRegisterInfo::isChainScratchRegister(VGPR) ||
!MF.getFrameInfo().hasTailCall()))
return;

WWMSpills.insert(std::make_pair(
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