From cc2d8659760f7729b3bed35dc7870eecc5499fd4 Mon Sep 17 00:00:00 2001 From: Kent Russell Date: Wed, 6 Dec 2023 11:01:07 -0500 Subject: [PATCH] Revert "drm/amdgpu: Force order between a read and write to the same address" This reverts commit fbfca2c5b9d08b98dbdb98a85911a8488f9f2af4. Reason for revert: Deferred to 6.0.1 apparently Change-Id: I7eec212d29a97658a6076080e23c7c6b08b2316a --- drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c | 8 -------- .../gpu/drm/amd/include/asic_reg/gc/gc_11_0_0_offset.h | 2 -- 2 files changed, 10 deletions(-) diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c index e4242dead0c1e..631f77b6c7c72 100644 --- a/drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c +++ b/drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c @@ -89,10 +89,6 @@ MODULE_FIRMWARE("amdgpu/gc_11_5_0_me.bin"); MODULE_FIRMWARE("amdgpu/gc_11_5_0_mec.bin"); MODULE_FIRMWARE("amdgpu/gc_11_5_0_rlc.bin"); -static const struct soc15_reg_golden golden_settings_gc_11_0[] = { - SOC15_REG_GOLDEN_VALUE(GC, 0, regTCP_CNTL, 0x20000000, 0x20000000) -}; - static const struct soc15_reg_golden golden_settings_gc_11_0_1[] = { SOC15_REG_GOLDEN_VALUE(GC, 0, regCGTT_GS_NGG_CLK_CTRL, 0x9fff8fff, 0x00000010), @@ -308,10 +304,6 @@ static void gfx_v11_0_init_golden_registers(struct amdgpu_device *adev) default: break; } - soc15_program_register_sequence(adev, - golden_settings_gc_11_0, - (const u32)ARRAY_SIZE(golden_settings_gc_11_0)); - } static void gfx_v11_0_write_data_to_reg(struct amdgpu_ring *ring, int eng_sel, diff --git a/drivers/gpu/drm/amd/include/asic_reg/gc/gc_11_0_0_offset.h b/drivers/gpu/drm/amd/include/asic_reg/gc/gc_11_0_0_offset.h index 4bff1ef8a9a64..c92c4b83253f8 100644 --- a/drivers/gpu/drm/amd/include/asic_reg/gc/gc_11_0_0_offset.h +++ b/drivers/gpu/drm/amd/include/asic_reg/gc/gc_11_0_0_offset.h @@ -6369,8 +6369,6 @@ #define regTCP_INVALIDATE_BASE_IDX 1 #define regTCP_STATUS 0x19a1 #define regTCP_STATUS_BASE_IDX 1 -#define regTCP_CNTL 0x19a2 -#define regTCP_CNTL_BASE_IDX 1 #define regTCP_CNTL2 0x19a3 #define regTCP_CNTL2_BASE_IDX 1 #define regTCP_DEBUG_INDEX 0x19a5