From 13e63a86b80ea638818668ff4c9e222f13344127 Mon Sep 17 00:00:00 2001 From: knzwnao Date: Fri, 11 Mar 2022 00:13:28 +0900 Subject: [PATCH 01/11] convert DD into padding pass. Now DD pass is a subclass of padding pass. DD pass takes pulse alignment constraints to execute circuit on recent RTA systems. There are small changes to the base padding pass to host this pass as a subclass. .pad method is now called with (t0, t1) instead of interval. In addition, pre_runhook method is added which is called before running the padding protocol. --- .../transpiler/passes/scheduling/__init__.py | 3 +- .../passes/scheduling/dynamical_decoupling.py | 242 +----------- .../transpiler/passes/scheduling/padding.py | 365 ++++++++++++++++-- ...pling-with-alignment-9c1e5ee909eab0f7.yaml | 20 + .../transpiler/test_dynamical_decoupling.py | 124 +++++- 5 files changed, 471 insertions(+), 283 deletions(-) create mode 100644 releasenotes/notes/dynamical-decoupling-with-alignment-9c1e5ee909eab0f7.yaml diff --git a/qiskit/transpiler/passes/scheduling/__init__.py b/qiskit/transpiler/passes/scheduling/__init__.py index da0056d03a7d..284c8557bbbe 100644 --- a/qiskit/transpiler/passes/scheduling/__init__.py +++ b/qiskit/transpiler/passes/scheduling/__init__.py @@ -15,6 +15,5 @@ from .alap import ALAPSchedule from .asap import ASAPSchedule from .time_unit_conversion import TimeUnitConversion -from .dynamical_decoupling import DynamicalDecoupling from .instruction_alignment import AlignMeasures, ValidatePulseGates -from .padding import PadDelay +from .padding import PadDelay, DynamicalDecoupling diff --git a/qiskit/transpiler/passes/scheduling/dynamical_decoupling.py b/qiskit/transpiler/passes/scheduling/dynamical_decoupling.py index 55f7e14f838e..4ea26c2eab98 100644 --- a/qiskit/transpiler/passes/scheduling/dynamical_decoupling.py +++ b/qiskit/transpiler/passes/scheduling/dynamical_decoupling.py @@ -12,243 +12,7 @@ """Dynamical Decoupling insertion pass.""" -import itertools +# pylint: disable=unused-import -import numpy as np -from qiskit.circuit.delay import Delay -from qiskit.circuit.reset import Reset -from qiskit.circuit.library.standard_gates import IGate, UGate, U3Gate -from qiskit.dagcircuit import DAGOpNode, DAGInNode -from qiskit.quantum_info.operators.predicates import matrix_equal -from qiskit.quantum_info.synthesis import OneQubitEulerDecomposer -from qiskit.transpiler.passes.optimization import Optimize1qGates -from qiskit.transpiler.basepasses import TransformationPass -from qiskit.transpiler.exceptions import TranspilerError - -from .padding import PadDelay - - -class DynamicalDecoupling(TransformationPass): - """Dynamical decoupling insertion pass. - - This pass works on a scheduled, physical circuit. It scans the circuit for - idle periods of time (i.e. those containing delay instructions) and inserts - a DD sequence of gates in those spots. These gates amount to the identity, - so do not alter the logical action of the circuit, but have the effect of - mitigating decoherence in those idle periods. - - As a special case, the pass allows a length-1 sequence (e.g. [XGate()]). - In this case the DD insertion happens only when the gate inverse can be - absorbed into a neighboring gate in the circuit (so we would still be - replacing Delay with something that is equivalent to the identity). - This can be used, for instance, as a Hahn echo. - - This pass ensures that the inserted sequence preserves the circuit exactly - (including global phase). - - .. jupyter-execute:: - - import numpy as np - from qiskit.circuit import QuantumCircuit - from qiskit.circuit.library import XGate - from qiskit.transpiler import PassManager, InstructionDurations - from qiskit.transpiler.passes import ALAPSchedule, DynamicalDecoupling - from qiskit.visualization import timeline_drawer - circ = QuantumCircuit(4) - circ.h(0) - circ.cx(0, 1) - circ.cx(1, 2) - circ.cx(2, 3) - circ.measure_all() - durations = InstructionDurations( - [("h", 0, 50), ("cx", [0, 1], 700), ("reset", None, 10), - ("cx", [1, 2], 200), ("cx", [2, 3], 300), - ("x", None, 50), ("measure", None, 1000)] - ) - - .. jupyter-execute:: - - # balanced X-X sequence on all qubits - dd_sequence = [XGate(), XGate()] - pm = PassManager([ALAPSchedule(durations), - DynamicalDecoupling(durations, dd_sequence)]) - circ_dd = pm.run(circ) - timeline_drawer(circ_dd) - - .. jupyter-execute:: - - # Uhrig sequence on qubit 0 - n = 8 - dd_sequence = [XGate()] * n - def uhrig_pulse_location(k): - return np.sin(np.pi * (k + 1) / (2 * n + 2)) ** 2 - spacing = [] - for k in range(n): - spacing.append(uhrig_pulse_location(k) - sum(spacing)) - spacing.append(1 - sum(spacing)) - pm = PassManager( - [ - ALAPSchedule(durations), - DynamicalDecoupling(durations, dd_sequence, qubits=[0], spacing=spacing), - ] - ) - circ_dd = pm.run(circ) - timeline_drawer(circ_dd) - """ - - def __init__(self, durations, dd_sequence, qubits=None, spacing=None, skip_reset_qubits=True): - """Dynamical decoupling initializer. - - Args: - durations (InstructionDurations): Durations of instructions to be - used in scheduling. - dd_sequence (list[Gate]): sequence of gates to apply in idle spots. - qubits (list[int]): physical qubits on which to apply DD. - If None, all qubits will undergo DD (when possible). - spacing (list[float]): a list of spacings between the DD gates. - The available slack will be divided according to this. - The list length must be one more than the length of dd_sequence, - and the elements must sum to 1. If None, a balanced spacing - will be used [d/2, d, d, ..., d, d, d/2]. - skip_reset_qubits (bool): if True, does not insert DD on idle - periods that immediately follow initialized/reset qubits (as - qubits in the ground state are less susceptile to decoherence). - """ - super().__init__() - self._durations = durations - self._dd_sequence = dd_sequence - self._qubits = qubits - self._spacing = spacing - self._skip_reset_qubits = skip_reset_qubits - - # temporary code until DD pass is updated - self.requires = [PadDelay()] - - def run(self, dag): - """Run the DynamicalDecoupling pass on dag. - - Args: - dag (DAGCircuit): a scheduled DAG. - - Returns: - DAGCircuit: equivalent circuit with delays interrupted by DD, - where possible. - - Raises: - TranspilerError: if the circuit is not mapped on physical qubits. - """ - if len(dag.qregs) != 1 or dag.qregs.get("q", None) is None: - raise TranspilerError("DD runs on physical circuits only.") - - if dag.duration is None: - raise TranspilerError("DD runs after circuit is scheduled.") - - num_pulses = len(self._dd_sequence) - sequence_gphase = 0 - if num_pulses != 1: - if num_pulses % 2 != 0: - raise TranspilerError("DD sequence must contain an even number of gates (or 1).") - noop = np.eye(2) - for gate in self._dd_sequence: - noop = noop.dot(gate.to_matrix()) - if not matrix_equal(noop, IGate().to_matrix(), ignore_phase=True): - raise TranspilerError("The DD sequence does not make an identity operation.") - sequence_gphase = np.angle(noop[0][0]) - - if self._qubits is None: - self._qubits = set(range(dag.num_qubits())) - else: - self._qubits = set(self._qubits) - - if self._spacing: - if sum(self._spacing) != 1 or any(a < 0 for a in self._spacing): - raise TranspilerError( - "The spacings must be given in terms of fractions " - "of the slack period and sum to 1." - ) - else: # default to balanced spacing - mid = 1 / num_pulses - end = mid / 2 - self._spacing = [end] + [mid] * (num_pulses - 1) + [end] - - new_dag = dag._copy_circuit_metadata() - - qubit_index_map = {qubit: index for index, qubit in enumerate(new_dag.qubits)} - index_sequence_duration_map = {} - for qubit in new_dag.qubits: - physical_qubit = qubit_index_map[qubit] - dd_sequence_duration = 0 - for gate in self._dd_sequence: - gate.duration = self._durations.get(gate, physical_qubit) - dd_sequence_duration += gate.duration - index_sequence_duration_map[physical_qubit] = dd_sequence_duration - - for nd in dag.topological_op_nodes(): - if not isinstance(nd.op, Delay): - new_dag.apply_operation_back(nd.op, nd.qargs, nd.cargs) - continue - - dag_qubit = nd.qargs[0] - physical_qubit = qubit_index_map[dag_qubit] - if physical_qubit not in self._qubits: # skip unwanted qubits - new_dag.apply_operation_back(nd.op, nd.qargs, nd.cargs) - continue - - pred = next(dag.predecessors(nd)) - succ = next(dag.successors(nd)) - if self._skip_reset_qubits: # discount initial delays - if isinstance(pred, DAGInNode) or isinstance(pred.op, Reset): - new_dag.apply_operation_back(nd.op, nd.qargs, nd.cargs) - continue - - dd_sequence_duration = index_sequence_duration_map[physical_qubit] - slack = nd.op.duration - dd_sequence_duration - if slack <= 0: # dd doesn't fit - new_dag.apply_operation_back(nd.op, nd.qargs, nd.cargs) - continue - - if num_pulses == 1: # special case of using a single gate for DD - u_inv = self._dd_sequence[0].inverse().to_matrix() - theta, phi, lam, phase = OneQubitEulerDecomposer().angles_and_phase(u_inv) - # absorb the inverse into the successor (from left in circuit) - if isinstance(succ, DAGOpNode) and isinstance(succ.op, (UGate, U3Gate)): - theta_r, phi_r, lam_r = succ.op.params - succ.op.params = Optimize1qGates.compose_u3( - theta_r, phi_r, lam_r, theta, phi, lam - ) - sequence_gphase += phase - # absorb the inverse into the predecessor (from right in circuit) - elif isinstance(pred, DAGOpNode) and isinstance(pred.op, (UGate, U3Gate)): - theta_l, phi_l, lam_l = pred.op.params - pred.op.params = Optimize1qGates.compose_u3( - theta, phi, lam, theta_l, phi_l, lam_l - ) - sequence_gphase += phase - # don't do anything if there's no single-qubit gate to absorb the inverse - else: - new_dag.apply_operation_back(nd.op, nd.qargs, nd.cargs) - continue - - # insert the actual DD sequence - taus = [int(slack * a) for a in self._spacing] - unused_slack = slack - sum(taus) # unused, due to rounding to int multiples of dt - middle_index = int((len(taus) - 1) / 2) # arbitrary: redistribute to middle - taus[middle_index] += unused_slack # now we add up to original delay duration - - for tau, gate in itertools.zip_longest(taus, self._dd_sequence): - if tau > 0: - new_dag.apply_operation_back(Delay(tau), [dag_qubit]) - if gate is not None: - new_dag.apply_operation_back(gate, [dag_qubit]) - - new_dag.global_phase = _mod_2pi(new_dag.global_phase + sequence_gphase) - - return new_dag - - -def _mod_2pi(angle: float, atol: float = 0): - """Wrap angle into interval [-π,π). If within atol of the endpoint, clamp to -π""" - wrapped = (angle + np.pi) % (2 * np.pi) - np.pi - if abs(wrapped - np.pi) < atol: - wrapped = -np.pi - return wrapped +# This is just an alias. Will be removed. +from .padding import DynamicalDecoupling diff --git a/qiskit/transpiler/passes/scheduling/padding.py b/qiskit/transpiler/passes/scheduling/padding.py index 499410dc0e57..7fe9f6be6868 100644 --- a/qiskit/transpiler/passes/scheduling/padding.py +++ b/qiskit/transpiler/passes/scheduling/padding.py @@ -12,10 +12,21 @@ """Padding pass to fill empty timeslot.""" -from qiskit.circuit import Qubit +from typing import List, Optional +from itertools import zip_longest + +import numpy as np + +from qiskit.circuit import Qubit, Gate from qiskit.circuit.delay import Delay -from qiskit.dagcircuit import DAGCircuit, DAGNode, DAGOutNode +from qiskit.circuit.reset import Reset +from qiskit.circuit.library.standard_gates import IGate, UGate, U3Gate +from qiskit.dagcircuit import DAGCircuit, DAGNode, DAGOutNode, DAGInNode, DAGOpNode +from qiskit.transpiler.instruction_durations import InstructionDurations from qiskit.transpiler.basepasses import TransformationPass +from qiskit.transpiler.passes.optimization import Optimize1qGates +from qiskit.quantum_info.operators.predicates import matrix_equal +from qiskit.quantum_info.synthesis import OneQubitEulerDecomposer from qiskit.transpiler.exceptions import TranspilerError @@ -51,23 +62,20 @@ def run(self, dag: DAGCircuit): """Run the padding pass on ``dag``. Args: - dag (DAGCircuit): DAG to be checked. + dag: DAG to be checked. Returns: DAGCircuit: DAG with idle time filled with instructions. Raises: - TranspilerError: If the whole circuit or instruction is not scheduled. + TranspilerError: When a particular node is not scheduled, likely some transform pass + is inserted before this node is called. """ - if "node_start_time" not in self.property_set: - raise TranspilerError( - f"The input circuit {dag.name} is not scheduled. Call one of scheduling passes " - f"before running the {self.__class__.__name__} pass." - ) + self._pre_runhook(dag) + node_start_time = self.property_set["node_start_time"] new_dag = DAGCircuit() - for qreg in dag.qregs.values(): new_dag.add_qreg(qreg) for creg in dag.cregs.values(): @@ -99,17 +107,16 @@ def run(self, dag: DAGCircuit): continue for bit in node.qargs: - # Find idle time from the latest instruction on the wire - idle_time = t0 - idle_after[bit] # Fill idle time with some sequence - if idle_time > 0: + if t0 - idle_after[bit] > 0: # Find previous node on the wire, i.e. always the latest node on the wire prev_node = next(new_dag.predecessors(new_dag.output_map[bit])) self._pad( dag=new_dag, qubit=bit, - time_interval=idle_time, + t_start=idle_after[bit], + t_end=t0, next_node=node, prev_node=prev_node, ) @@ -125,27 +132,46 @@ def run(self, dag: DAGCircuit): # Add delays until the end of circuit. for bit in new_dag.qubits: - idle_time = circuit_duration - idle_after[bit] - node = new_dag.output_map[bit] - prev_node = next(new_dag.predecessors(node)) - if idle_time > 0: + if circuit_duration - idle_after[bit] > 0: + node = new_dag.output_map[bit] + prev_node = next(new_dag.predecessors(node)) self._pad( dag=new_dag, qubit=bit, - time_interval=idle_time, + t_start=idle_after[bit], + t_end=circuit_duration, next_node=node, prev_node=prev_node, ) new_dag.duration = circuit_duration + # Invalidate old schedule information since delays are filled with sequence. + del self.property_set["node_start_time"] + return new_dag + def _pre_runhook(self, dag: DAGCircuit): + """Extra routine inserted before running the padding pass. + + Args: + dag: DAG circuit that sequence is applied. + + Raises: + TranspilerError: If the whole circuit or instruction is not scheduled. + """ + if "node_start_time" not in self.property_set: + raise TranspilerError( + f"The input circuit {dag.name} is not scheduled. Call one of scheduling passes " + f"before running the {self.__class__.__name__} pass." + ) + def _pad( self, dag: DAGCircuit, qubit: Qubit, - time_interval: int, + t_start: int, + t_end: int, next_node: DAGNode, prev_node: DAGNode, ): @@ -154,7 +180,8 @@ def _pad( Args: dag: DAG circuit that sequence is applied. qubit: The wire that the sequence is applied on. - time_interval: Duration of idle time in between two nodes. + t_start: Absolute start time of this interval. + t_end: Absolute end time of this interval. next_node: Node that follows the sequence. prev_node: Node ahead of the sequence. """ @@ -205,11 +232,305 @@ def _pad( self, dag: DAGCircuit, qubit: Qubit, - time_interval: int, + t_start: int, + t_end: int, next_node: DAGNode, prev_node: DAGNode, ): if not self.fill_very_end and isinstance(next_node, DAGOutNode): return + time_interval = t_end - t_start dag.apply_operation_back(Delay(time_interval, dag.unit), [qubit]) + + +class DynamicalDecoupling(BasePadding): + """Dynamical decoupling insertion pass. + + This pass works on a scheduled, physical circuit. It scans the circuit for + idle periods of time (i.e. those containing delay instructions) and inserts + a DD sequence of gates in those spots. These gates amount to the identity, + so do not alter the logical action of the circuit, but have the effect of + mitigating decoherence in those idle periods. + + As a special case, the pass allows a length-1 sequence (e.g. [XGate()]). + In this case the DD insertion happens only when the gate inverse can be + absorbed into a neighboring gate in the circuit (so we would still be + replacing Delay with something that is equivalent to the identity). + This can be used, for instance, as a Hahn echo. + + This pass ensures that the inserted sequence preserves the circuit exactly + (including global phase). + + .. jupyter-execute:: + + import numpy as np + from qiskit.circuit import QuantumCircuit + from qiskit.circuit.library import XGate + from qiskit.transpiler import PassManager, InstructionDurations + from qiskit.transpiler.passes import ALAPSchedule, DynamicalDecoupling + from qiskit.visualization import timeline_drawer + circ = QuantumCircuit(4) + circ.h(0) + circ.cx(0, 1) + circ.cx(1, 2) + circ.cx(2, 3) + circ.measure_all() + durations = InstructionDurations( + [("h", 0, 50), ("cx", [0, 1], 700), ("reset", None, 10), + ("cx", [1, 2], 200), ("cx", [2, 3], 300), + ("x", None, 50), ("measure", None, 1000)] + ) + + .. jupyter-execute:: + + # balanced X-X sequence on all qubits + dd_sequence = [XGate(), XGate()] + pm = PassManager([ALAPSchedule(durations), + DynamicalDecoupling(durations, dd_sequence)]) + circ_dd = pm.run(circ) + timeline_drawer(circ_dd) + + .. jupyter-execute:: + + # Uhrig sequence on qubit 0 + n = 8 + dd_sequence = [XGate()] * n + def uhrig_pulse_location(k): + return np.sin(np.pi * (k + 1) / (2 * n + 2)) ** 2 + spacing = [] + for k in range(n): + spacing.append(uhrig_pulse_location(k) - sum(spacing)) + spacing.append(1 - sum(spacing)) + pm = PassManager( + [ + ALAPSchedule(durations), + DynamicalDecoupling(durations, dd_sequence, qubits=[0], spacing=spacing), + ] + ) + circ_dd = pm.run(circ) + timeline_drawer(circ_dd) + + .. note:: + + You may need to call alignment pass before running dynamical decoupling to guarantee + your circuit satisfies acquisition alignment constraints. + """ + + def __init__( + self, + durations: InstructionDurations, + dd_sequence: List[Gate], + qubits: Optional[List[int]] = None, + spacing: Optional[List[float]] = None, + skip_reset_qubits: bool = True, + pulse_alignment: int = 1, + ): + """Dynamical decoupling initializer. + + Args: + durations: Durations of instructions to be used in scheduling. + dd_sequence: Sequence of gates to apply in idle spots. + qubits: Physical qubits on which to apply DD. + If None, all qubits will undergo DD (when possible). + spacing: A list of spacings between the DD gates. + The available slack will be divided according to this. + The list length must be one more than the length of dd_sequence, + and the elements must sum to 1. If None, a balanced spacing + will be used [d/2, d, d, ..., d, d, d/2]. + skip_reset_qubits: If True, does not insert DD on idle periods that + immediately follow initialized/reset qubits + (as qubits in the ground state are less susceptile to decoherence). + pulse_alignment: The hardware constraints for gate timing allocation. + This is usually provided from ``backend.configuration().timing_constraints``. + If provided, the delay length, i.e. ``spacing``, is implicitly adjusted to + satisfy this constraint. + + Raises: + TranspilerError: When invalid DD sequence is specified. + TranspilerError: When pulse gate with the duration which is + non-multiple of the alignment constraint value is found. + """ + super().__init__() + self._durations = durations + self._dd_sequence = dd_sequence + self._qubits = qubits + self._skip_reset_qubits = skip_reset_qubits + self._alignment = pulse_alignment + self._spacing = spacing + + self._dd_sequence_lengths = dict() + self._sequence_phase = 0 + + def _pre_runhook(self, dag: DAGCircuit): + super()._pre_runhook(dag) + + num_pulses = len(self._dd_sequence) + + # Check if physical circuit is given + if len(dag.qregs) != 1 or dag.qregs.get("q", None) is None: + raise TranspilerError("DD runs on physical circuits only.") + + # Set default spacing otherwise validate user input + if self._spacing is None: + mid = 1 / num_pulses + end = mid / 2 + self._spacing = [end] + [mid] * (num_pulses - 1) + [end] + else: + if sum(self._spacing) != 1 or any(a < 0 for a in self._spacing): + raise TranspilerError( + "The spacings must be given in terms of fractions " + "of the slack period and sum to 1." + ) + + # Check if DD sequence is identity + if num_pulses != 1: + if num_pulses % 2 != 0: + raise TranspilerError("DD sequence must contain an even number of gates (or 1).") + noop = np.eye(2) + for gate in self._dd_sequence: + noop = noop.dot(gate.to_matrix()) + if not matrix_equal(noop, IGate().to_matrix(), ignore_phase=True): + raise TranspilerError("The DD sequence does not make an identity operation.") + self._sequence_phase = np.angle(noop[0][0]) + + # Precompute qubit-wise DD sequence length for performance + for qubit in dag.qubits: + physical_index = dag.qubits.index(qubit) + if self._qubits and physical_index not in self._qubits: + continue + + gate_length_sum = 0 + for gate in self._dd_sequence: + try: + # Check calibration. + gate_length = dag.calibrations[gate.name][(physical_index, gate.params)] + if gate_length % self._alignment != 0: + # This is necessary to implement lightweight scheduling logic for this pass. + # Usually the pulse alignment constraint and pulse data chunk size take + # the same value, however, we can intentionally violate this pattern + # at the gate level. For example, we can create a schedule consisting of + # a pi-pulse of 32 dt followed by a post buffer, i.e. delay, of 4 dt + # on the device with 16 dt constraint. Note that the pi-pulse length + # is multiple of 16 dt but the gate length of 36 is not multiple of it. + # Such pulse gate should be excluded. + raise TranspilerError( + f"Pulse gate {gate.name} with length non-multiple of {self._alignment} " + f"is not acceptable in {self.__class__.__name__} pass." + ) + except KeyError: + gate_length = self._durations.get(gate, physical_index) + gate_length_sum += gate_length + self._dd_sequence_lengths[qubit] = gate_length_sum + + def _pad( + self, + dag: DAGCircuit, + qubit: Qubit, + t_start: int, + t_end: int, + next_node: DAGNode, + prev_node: DAGNode, + ): + # This routine takes care of the pulse alignment constraint for the DD sequence. + # Note that the alignment constraint acts on the t0 of the DAGOpNode. + # Now this constarained scheduling problem is simplified to the problem of + # finding delay amount which is multiple of the constraint value by assuming + # that the duration of every DAGOpNode is also multiple of the constraint value. + # + # For example, given the constraint value of 16 and XY4 with 160 dt gates. + # Here we assume current interval is 992 dt. + # + # relative spacing := [0.125, 0.25, 0.25, 0.25, 0.125] + # slack = 992 dt - 4 x 160 dt = 352 dt + # + # unconstraind sequence: 44dt-X1-88dt-Y2-88dt-X3-88dt-Y4-44dt + # constraind sequence : 32dt-X1-80dt-Y2-80dt-X3-80dt-Y4-32dt + extra slack 48 dt + # + # Now we evenly split extra slack into start and end of the sequence. + # The distributed slack should be multiple of 16. + # Start = +16, End += 32 + # + # final sequence : 48dt-X1-80dt-Y2-80dt-X3-80dt-Y4-64dt / in total 992 dt + # + # Now we verify t0 of every node starts from multiple of 16 dt. + # + # X1: 48 dt (3 x 16 dt) + # Y2: 48 dt + 160 dt + 80 dt = 288 dt (18 x 16 dt) + # Y3: 288 dt + 160 dt + 80 dt = 528 dt (33 x 16 dt) + # Y4: 368 dt + 160 dt + 80 dt = 768 dt (48 x 16 dt) + # + # As you can see, constraints on t0 are all satified without explicit scheduling. + time_interval = t_end - t_start + + if self._qubits and dag.qubits.index(qubit) not in self._qubits: + # Target physical qubit is not the target of this DD sequence. + dag.apply_operation_back(Delay(time_interval, dag.unit), [qubit]) + return + + if self._skip_reset_qubits and ( + isinstance(prev_node, DAGInNode) or isinstance(prev_node.op, Reset) + ): + # Previous node is the start edge or reset, i.e. qubit is ground state. + dag.apply_operation_back(Delay(time_interval, dag.unit), [qubit]) + return + + slack = time_interval - self._dd_sequence_lengths[qubit] + sequence_gphase = self._sequence_phase + + if slack <= 0: + # Interval too short. + dag.apply_operation_back(Delay(time_interval, dag.unit), [qubit]) + return + + if len(self._dd_sequence) == 1: + # Special case of using a single gate for DD + u_inv = self._dd_sequence[0].inverse().to_matrix() + theta, phi, lam, phase = OneQubitEulerDecomposer().angles_and_phase(u_inv) + if isinstance(next_node, DAGOpNode) and isinstance(next_node.op, (UGate, U3Gate)): + # Absorb the inverse into the successor (from left in circuit) + theta_r, phi_r, lam_r = next_node.op.params + next_node.op.params = Optimize1qGates.compose_u3( + theta_r, phi_r, lam_r, theta, phi, lam + ) + sequence_gphase += phase + elif isinstance(prev_node, DAGOpNode) and isinstance(prev_node.op, (UGate, U3Gate)): + # Absorb the inverse into the predecessor (from right in circuit) + theta_l, phi_l, lam_l = prev_node.op.params + prev_node.op.params = Optimize1qGates.compose_u3( + theta, phi, lam, theta_l, phi_l, lam_l + ) + sequence_gphase += phase + else: + # Don't do anything if there's no single-qubit gate to absorb the inverse + dag.apply_operation_back(Delay(time_interval, dag.unit), [qubit]) + return + + def _constrained_length(values): + return self._alignment * np.floor(values / self._alignment) + + # (1) Compute DD intervals satisfying the constraint + taus = _constrained_length(slack * np.asarray(self._spacing)) + extra_slack = slack - np.sum(taus) + + # (2) Distribute extra slack as evenly as possible + to_begin_edge = _constrained_length(extra_slack / 2) + taus[0] += to_begin_edge + taus[-1] += extra_slack - to_begin_edge + + # (3) Construct DD sequence with delays + for tau, gate in zip_longest(taus, self._dd_sequence): + if tau > 0: + dag.apply_operation_back(Delay(tau, dag.unit), [qubit]) + if gate is not None: + dag.apply_operation_back(gate, [qubit]) + + dag.global_phase = self._mod_2pi(dag.global_phase + sequence_gphase) + + @staticmethod + def _mod_2pi(angle: float, atol: float = 0): + """Wrap angle into interval [-π,π). If within atol of the endpoint, clamp to -π""" + wrapped = (angle + np.pi) % (2 * np.pi) - np.pi + if abs(wrapped - np.pi) < atol: + wrapped = -np.pi + return wrapped diff --git a/releasenotes/notes/dynamical-decoupling-with-alignment-9c1e5ee909eab0f7.yaml b/releasenotes/notes/dynamical-decoupling-with-alignment-9c1e5ee909eab0f7.yaml new file mode 100644 index 000000000000..d7bcbcca6f40 --- /dev/null +++ b/releasenotes/notes/dynamical-decoupling-with-alignment-9c1e5ee909eab0f7.yaml @@ -0,0 +1,20 @@ +--- +upgrade: + - | + :class:`DynamicalDecoupling` has been upgraded to take ``pulse_alignment`` + which represents a hardware constraint for waveform start timing. + The spacing of between gates comprising a dynamical decoupling sequence + is now adjusted to satisfy this constraints so that the circuit can be + executed on hardware with the constraint. + This value is usually found in ``backend.configuration().timing_constraints``. + - | + Spacing strategy of :class:`DynamicalDecoupling` has been upgraded to + evenly split the extra slack, i.e. residual delay coming from rounding or alignment, + to the begging and ending of the dynamical decouling sequence, + rather than adding it to the interval in the middle of the sequence. + - | + :class:`DynamicalDecoupling` has been upgraded to be a subclass of + :class:`BasePadding`. This means the dynamical decoupling pass is + now drop-in-replacement of :class:`PadDelay` pass. + The import path has been also updated and now it is placed under + :mod:`qiskit.transpiler.passes.scheduling.padding`. diff --git a/test/python/transpiler/test_dynamical_decoupling.py b/test/python/transpiler/test_dynamical_decoupling.py index 16722a656f0a..346aca9a0942 100644 --- a/test/python/transpiler/test_dynamical_decoupling.py +++ b/test/python/transpiler/test_dynamical_decoupling.py @@ -197,9 +197,9 @@ def test_insert_dd_ghz_everywhere(self): ┌─────┴───┴─────┐ ┌─┴─┐└────────────────┘└───┘└────────────────┘└───┘» q_1: ┤ Delay(50[dt]) ├─┤ X ├───────────────────────────────────────────■──» ├───────────────┴┐├───┤┌────────────────┐┌───┐┌────────────────┐┌─┴─┐» - q_2: ┤ Delay(162[dt]) ├┤ Y ├┤ Delay(326[dt]) ├┤ Y ├┤ Delay(162[dt]) ├┤ X ├» + q_2: ┤ Delay(162[dt]) ├┤ Y ├┤ Delay(325[dt]) ├┤ Y ├┤ Delay(163[dt]) ├┤ X ├» ├────────────────┤├───┤├────────────────┤├───┤├────────────────┤└───┘» - q_3: ┤ Delay(212[dt]) ├┤ Y ├┤ Delay(426[dt]) ├┤ Y ├┤ Delay(212[dt]) ├─────» + q_3: ┤ Delay(212[dt]) ├┤ Y ├┤ Delay(425[dt]) ├┤ Y ├┤ Delay(213[dt]) ├─────» └────────────────┘└───┘└────────────────┘└───┘└────────────────┘ » « ┌────────────────┐ «q_0: ┤ Delay(100[dt]) ├───────────────────────────────────────────── @@ -224,15 +224,15 @@ def test_insert_dd_ghz_everywhere(self): expected = self.ghz4.copy() expected = expected.compose(Delay(50), [1], front=True) - expected = expected.compose(Delay(162), [2], front=True) + expected = expected.compose(Delay(163), [2], front=True) expected = expected.compose(YGate(), [2], front=True) - expected = expected.compose(Delay(326), [2], front=True) + expected = expected.compose(Delay(325), [2], front=True) expected = expected.compose(YGate(), [2], front=True) expected = expected.compose(Delay(162), [2], front=True) - expected = expected.compose(Delay(212), [3], front=True) + expected = expected.compose(Delay(213), [3], front=True) expected = expected.compose(YGate(), [3], front=True) - expected = expected.compose(Delay(426), [3], front=True) + expected = expected.compose(Delay(425), [3], front=True) expected = expected.compose(YGate(), [3], front=True) expected = expected.compose(Delay(212), [3], front=True) @@ -263,18 +263,18 @@ def test_insert_dd_ghz_xy4(self): q_3: ┤ Delay(950[dt]) ├────────────────────────────┤ X ├───────────────────────» └────────────────┘ └───┘ » « ┌───┐ ┌───────────────┐ ┌───┐ ┌───────────────┐» - «q_0: ──────┤ Y ├──────┤ Delay(76[dt]) ├──────┤ X ├──────┤ Delay(75[dt]) ├» + «q_0: ──────┤ Y ├──────┤ Delay(75[dt]) ├──────┤ X ├──────┤ Delay(75[dt]) ├» « ┌─────┴───┴─────┐└─────┬───┬─────┘┌─────┴───┴─────┐└─────┬───┬─────┘» - «q_1: ┤ Delay(25[dt]) ├──────┤ Y ├──────┤ Delay(26[dt]) ├──────┤ X ├──────» + «q_1: ┤ Delay(25[dt]) ├──────┤ Y ├──────┤ Delay(25[dt]) ├──────┤ X ├──────» « └───────────────┘ └───┘ └───────────────┘ └───┘ » «q_2: ────────────────────────────────────────────────────────────────────» « » «q_3: ────────────────────────────────────────────────────────────────────» « » « ┌───┐ ┌───────────────┐ - «q_0: ──────┤ Y ├──────┤ Delay(37[dt]) ├───────────────── + «q_0: ──────┤ Y ├──────┤ Delay(38[dt]) ├───────────────── « ┌─────┴───┴─────┐└─────┬───┬─────┘┌───────────────┐ - «q_1: ┤ Delay(25[dt]) ├──────┤ Y ├──────┤ Delay(12[dt]) ├ + «q_1: ┤ Delay(25[dt]) ├──────┤ Y ├──────┤ Delay(13[dt]) ├ « └───────────────┘ └───┘ └───────────────┘ «q_2: ─────────────────────────────────────────────────── « @@ -296,21 +296,21 @@ def test_insert_dd_ghz_xy4(self): expected = expected.compose(XGate(), [0]) expected = expected.compose(Delay(75), [0]) expected = expected.compose(YGate(), [0]) - expected = expected.compose(Delay(76), [0]) + expected = expected.compose(Delay(75), [0]) expected = expected.compose(XGate(), [0]) expected = expected.compose(Delay(75), [0]) expected = expected.compose(YGate(), [0]) - expected = expected.compose(Delay(37), [0]) + expected = expected.compose(Delay(38), [0]) expected = expected.compose(Delay(12), [1]) expected = expected.compose(XGate(), [1]) expected = expected.compose(Delay(25), [1]) expected = expected.compose(YGate(), [1]) - expected = expected.compose(Delay(26), [1]) + expected = expected.compose(Delay(25), [1]) expected = expected.compose(XGate(), [1]) expected = expected.compose(Delay(25), [1]) expected = expected.compose(YGate(), [1]) - expected = expected.compose(Delay(12), [1]) + expected = expected.compose(Delay(13), [1]) self.assertEqual(ghz4_dd, expected) @@ -424,7 +424,7 @@ def test_insert_ghz_uhrig(self): Physical Review Letters 98.10 (2007): 100504. ┌───┐ ┌──────────────┐ ┌───┐ ┌──────────────┐┌───┐» - q_0: ──────┤ H ├─────────■──┤ Delay(3[dt]) ├──────┤ X ├───────┤ Delay(8[dt]) ├┤ X ├» + q_0: ──────┤ H ├─────────■──┤ Delay(4[dt]) ├──────┤ X ├───────┤ Delay(8[dt]) ├┤ X ├» ┌─────┴───┴─────┐ ┌─┴─┐└──────────────┘┌─────┴───┴──────┐└──────────────┘└───┘» q_1: ┤ Delay(50[dt]) ├─┤ X ├───────■────────┤ Delay(300[dt]) ├─────────────────────» ├───────────────┴┐└───┘ ┌─┴─┐ └────────────────┘ » @@ -433,7 +433,7 @@ def test_insert_ghz_uhrig(self): q_3: ┤ Delay(950[dt]) ├───────────────────────────┤ X ├────────────────────────────» └────────────────┘ └───┘ » « ┌───────────────┐┌───┐┌───────────────┐┌───┐┌───────────────┐┌───┐┌───────────────┐» - «q_0: ┤ Delay(13[dt]) ├┤ X ├┤ Delay(16[dt]) ├┤ X ├┤ Delay(20[dt]) ├┤ X ├┤ Delay(16[dt]) ├» + «q_0: ┤ Delay(13[dt]) ├┤ X ├┤ Delay(16[dt]) ├┤ X ├┤ Delay(17[dt]) ├┤ X ├┤ Delay(16[dt]) ├» « └───────────────┘└───┘└───────────────┘└───┘└───────────────┘└───┘└───────────────┘» «q_1: ───────────────────────────────────────────────────────────────────────────────────» « » @@ -442,7 +442,7 @@ def test_insert_ghz_uhrig(self): «q_3: ───────────────────────────────────────────────────────────────────────────────────» « » « ┌───┐┌───────────────┐┌───┐┌──────────────┐┌───┐┌──────────────┐ - «q_0: ┤ X ├┤ Delay(13[dt]) ├┤ X ├┤ Delay(8[dt]) ├┤ X ├┤ Delay(3[dt]) ├ + «q_0: ┤ X ├┤ Delay(13[dt]) ├┤ X ├┤ Delay(8[dt]) ├┤ X ├┤ Delay(5[dt]) ├ « └───┘└───────────────┘└───┘└──────────────┘└───┘└──────────────┘ «q_1: ──────────────────────────────────────────────────────────────── « @@ -478,7 +478,7 @@ def uhrig(k): expected = expected.compose(Delay(750), [2], front=True) expected = expected.compose(Delay(950), [3], front=True) - expected = expected.compose(Delay(3), [0]) + expected = expected.compose(Delay(4), [0]) expected = expected.compose(XGate(), [0]) expected = expected.compose(Delay(8), [0]) expected = expected.compose(XGate(), [0]) @@ -486,7 +486,7 @@ def uhrig(k): expected = expected.compose(XGate(), [0]) expected = expected.compose(Delay(16), [0]) expected = expected.compose(XGate(), [0]) - expected = expected.compose(Delay(20), [0]) + expected = expected.compose(Delay(17), [0]) expected = expected.compose(XGate(), [0]) expected = expected.compose(Delay(16), [0]) expected = expected.compose(XGate(), [0]) @@ -494,7 +494,7 @@ def uhrig(k): expected = expected.compose(XGate(), [0]) expected = expected.compose(Delay(8), [0]) expected = expected.compose(XGate(), [0]) - expected = expected.compose(Delay(3), [0]) + expected = expected.compose(Delay(5), [0]) expected = expected.compose(Delay(300), [1]) @@ -622,6 +622,90 @@ def test_dd_with_calibrations_with_parameters(self, param_value): self.assertEqual(pm.run(circ).duration, rx_duration + 100 + 300) + def test_test_insert_dd_ghz_xy4_with_alignment(self): + """Test DD with pulse alignment constraints. + + ┌───┐ ┌───────────────┐ ┌───┐ ┌───────────────┐» + q_0: ──────┤ H ├─────────■──┤ Delay(40[dt]) ├──────┤ X ├──────┤ Delay(70[dt]) ├» + ┌─────┴───┴─────┐ ┌─┴─┐└───────────────┘┌─────┴───┴─────┐└─────┬───┬─────┘» + q_1: ┤ Delay(50[dt]) ├─┤ X ├────────■────────┤ Delay(20[dt]) ├──────┤ X ├──────» + ├───────────────┴┐└───┘ ┌─┴─┐ └───────────────┘ └───┘ » + q_2: ┤ Delay(750[dt]) ├───────────┤ X ├──────────────■─────────────────────────» + ├────────────────┤ └───┘ ┌─┴─┐ » + q_3: ┤ Delay(950[dt]) ├────────────────────────────┤ X ├───────────────────────» + └────────────────┘ └───┘ » + « ┌───┐ ┌───────────────┐ ┌───┐ ┌───────────────┐» + «q_0: ──────┤ Y ├──────┤ Delay(70[dt]) ├──────┤ X ├──────┤ Delay(70[dt]) ├» + « ┌─────┴───┴─────┐└─────┬───┬─────┘┌─────┴───┴─────┐└─────┬───┬─────┘» + «q_1: ┤ Delay(20[dt]) ├──────┤ Y ├──────┤ Delay(20[dt]) ├──────┤ X ├──────» + « └───────────────┘ └───┘ └───────────────┘ └───┘ » + «q_2: ────────────────────────────────────────────────────────────────────» + « » + «q_3: ────────────────────────────────────────────────────────────────────» + « » + « ┌───┐ ┌───────────────┐ + «q_0: ──────┤ Y ├──────┤ Delay(50[dt]) ├───────────────── + « ┌─────┴───┴─────┐└─────┬───┬─────┘┌───────────────┐ + «q_1: ┤ Delay(20[dt]) ├──────┤ Y ├──────┤ Delay(20[dt]) ├ + « └───────────────┘ └───┘ └───────────────┘ + «q_2: ─────────────────────────────────────────────────── + « + «q_3: ─────────────────────────────────────────────────── + « + """ + dd_sequence = [XGate(), YGate(), XGate(), YGate()] + pm = PassManager( + [ + ALAPSchedule(self.durations), + DynamicalDecoupling(self.durations, dd_sequence, pulse_alignment=10), + ] + ) + + ghz4_dd = pm.run(self.ghz4) + + expected = self.ghz4.copy() + expected = expected.compose(Delay(50), [1], front=True) + expected = expected.compose(Delay(750), [2], front=True) + expected = expected.compose(Delay(950), [3], front=True) + + expected = expected.compose(Delay(40), [0]) + expected = expected.compose(XGate(), [0]) + expected = expected.compose(Delay(70), [0]) + expected = expected.compose(YGate(), [0]) + expected = expected.compose(Delay(70), [0]) + expected = expected.compose(XGate(), [0]) + expected = expected.compose(Delay(70), [0]) + expected = expected.compose(YGate(), [0]) + expected = expected.compose(Delay(50), [0]) + + expected = expected.compose(Delay(20), [1]) + expected = expected.compose(XGate(), [1]) + expected = expected.compose(Delay(20), [1]) + expected = expected.compose(YGate(), [1]) + expected = expected.compose(Delay(20), [1]) + expected = expected.compose(XGate(), [1]) + expected = expected.compose(Delay(20), [1]) + expected = expected.compose(YGate(), [1]) + expected = expected.compose(Delay(20), [1]) + + self.assertEqual(ghz4_dd, expected) + + def test_dd_cannot_called_twice(self): + """Calling padding family pass twice is forbidden because insertion of sequence will + invalidate previously scheduled node start times. + """ + dd_sequence = [XGate(), YGate(), XGate(), YGate()] + pm = PassManager( + [ + ALAPSchedule(self.durations), + DynamicalDecoupling(self.durations, dd_sequence, qubits=[0]), + DynamicalDecoupling(self.durations, dd_sequence, qubits=[1]), + ] + ) + + with self.assertRaises(TranspilerError): + pm.run(self.ghz4) + if __name__ == "__main__": unittest.main() From 059de1fead7c8def88e65d10403a2eff047f288c Mon Sep 17 00:00:00 2001 From: knzwnao Date: Fri, 11 Mar 2022 05:25:03 +0900 Subject: [PATCH 02/11] fix missing duration of dd gates --- qiskit/transpiler/passes/scheduling/padding.py | 2 ++ 1 file changed, 2 insertions(+) diff --git a/qiskit/transpiler/passes/scheduling/padding.py b/qiskit/transpiler/passes/scheduling/padding.py index 7fe9f6be6868..45aa7abd2a47 100644 --- a/qiskit/transpiler/passes/scheduling/padding.py +++ b/qiskit/transpiler/passes/scheduling/padding.py @@ -421,6 +421,8 @@ def _pre_runhook(self, dag: DAGCircuit): except KeyError: gate_length = self._durations.get(gate, physical_index) gate_length_sum += gate_length + # Update gate duration. This is necessary for current timeline drawer, i.e. scheduled. + gate.duration = gate_length self._dd_sequence_lengths[qubit] = gate_length_sum def _pad( From 1d1e2a58dd5dfaaae709ad0bdface00c99bcd761 Mon Sep 17 00:00:00 2001 From: Naoki Kanazawa Date: Fri, 11 Mar 2022 11:26:46 +0900 Subject: [PATCH 03/11] fix typo Co-authored-by: Ali Javadi-Abhari --- qiskit/transpiler/passes/scheduling/padding.py | 8 ++++---- ...amical-decoupling-with-alignment-9c1e5ee909eab0f7.yaml | 8 ++++---- test/python/transpiler/test_dynamical_decoupling.py | 2 +- 3 files changed, 9 insertions(+), 9 deletions(-) diff --git a/qiskit/transpiler/passes/scheduling/padding.py b/qiskit/transpiler/passes/scheduling/padding.py index 45aa7abd2a47..15b8bec31b12 100644 --- a/qiskit/transpiler/passes/scheduling/padding.py +++ b/qiskit/transpiler/passes/scheduling/padding.py @@ -155,7 +155,7 @@ def _pre_runhook(self, dag: DAGCircuit): """Extra routine inserted before running the padding pass. Args: - dag: DAG circuit that sequence is applied. + dag: DAG circuit on which the sequence is applied. Raises: TranspilerError: If the whole circuit or instruction is not scheduled. @@ -436,9 +436,9 @@ def _pad( ): # This routine takes care of the pulse alignment constraint for the DD sequence. # Note that the alignment constraint acts on the t0 of the DAGOpNode. - # Now this constarained scheduling problem is simplified to the problem of - # finding delay amount which is multiple of the constraint value by assuming - # that the duration of every DAGOpNode is also multiple of the constraint value. + # Now this constrained scheduling problem is simplified to the problem of + # finding a delay amount which is a multiple of the constraint value by assuming + # that the duration of every DAGOpNode is also a multiple of the constraint value. # # For example, given the constraint value of 16 and XY4 with 160 dt gates. # Here we assume current interval is 992 dt. diff --git a/releasenotes/notes/dynamical-decoupling-with-alignment-9c1e5ee909eab0f7.yaml b/releasenotes/notes/dynamical-decoupling-with-alignment-9c1e5ee909eab0f7.yaml index d7bcbcca6f40..837e2cfa50c2 100644 --- a/releasenotes/notes/dynamical-decoupling-with-alignment-9c1e5ee909eab0f7.yaml +++ b/releasenotes/notes/dynamical-decoupling-with-alignment-9c1e5ee909eab0f7.yaml @@ -3,18 +3,18 @@ upgrade: - | :class:`DynamicalDecoupling` has been upgraded to take ``pulse_alignment`` which represents a hardware constraint for waveform start timing. - The spacing of between gates comprising a dynamical decoupling sequence - is now adjusted to satisfy this constraints so that the circuit can be + The spacing between gates comprising a dynamical decoupling sequence + is now adjusted to satisfy this constraint so that the circuit can be executed on hardware with the constraint. This value is usually found in ``backend.configuration().timing_constraints``. - | Spacing strategy of :class:`DynamicalDecoupling` has been upgraded to evenly split the extra slack, i.e. residual delay coming from rounding or alignment, - to the begging and ending of the dynamical decouling sequence, + to the beginning and end of the dynamical decoupling sequence, rather than adding it to the interval in the middle of the sequence. - | :class:`DynamicalDecoupling` has been upgraded to be a subclass of :class:`BasePadding`. This means the dynamical decoupling pass is - now drop-in-replacement of :class:`PadDelay` pass. + now a drop-in replacement for the :class:`PadDelay` pass. The import path has been also updated and now it is placed under :mod:`qiskit.transpiler.passes.scheduling.padding`. diff --git a/test/python/transpiler/test_dynamical_decoupling.py b/test/python/transpiler/test_dynamical_decoupling.py index 346aca9a0942..7d0a8a6953b3 100644 --- a/test/python/transpiler/test_dynamical_decoupling.py +++ b/test/python/transpiler/test_dynamical_decoupling.py @@ -622,7 +622,7 @@ def test_dd_with_calibrations_with_parameters(self, param_value): self.assertEqual(pm.run(circ).duration, rx_duration + 100 + 300) - def test_test_insert_dd_ghz_xy4_with_alignment(self): + def test_insert_dd_ghz_xy4_with_alignment(self): """Test DD with pulse alignment constraints. ┌───┐ ┌───────────────┐ ┌───┐ ┌───────────────┐» From 54b6f0cabd164b6115469437525d745ae9ce1a6a Mon Sep 17 00:00:00 2001 From: knzwnao Date: Fri, 11 Mar 2022 11:34:30 +0900 Subject: [PATCH 04/11] move dd pass to original file --- .../transpiler/passes/scheduling/__init__.py | 3 +- .../passes/scheduling/dynamical_decoupling.py | 311 +++++++++++++++++- .../transpiler/passes/scheduling/padding.py | 309 +---------------- ...pling-with-alignment-9c1e5ee909eab0f7.yaml | 2 - 4 files changed, 312 insertions(+), 313 deletions(-) diff --git a/qiskit/transpiler/passes/scheduling/__init__.py b/qiskit/transpiler/passes/scheduling/__init__.py index 284c8557bbbe..b8f75c9a5a30 100644 --- a/qiskit/transpiler/passes/scheduling/__init__.py +++ b/qiskit/transpiler/passes/scheduling/__init__.py @@ -16,4 +16,5 @@ from .asap import ASAPSchedule from .time_unit_conversion import TimeUnitConversion from .instruction_alignment import AlignMeasures, ValidatePulseGates -from .padding import PadDelay, DynamicalDecoupling +from .padding import PadDelay +from .dynamical_decoupling import DynamicalDecoupling diff --git a/qiskit/transpiler/passes/scheduling/dynamical_decoupling.py b/qiskit/transpiler/passes/scheduling/dynamical_decoupling.py index 4ea26c2eab98..f219d65d62fa 100644 --- a/qiskit/transpiler/passes/scheduling/dynamical_decoupling.py +++ b/qiskit/transpiler/passes/scheduling/dynamical_decoupling.py @@ -12,7 +12,312 @@ """Dynamical Decoupling insertion pass.""" -# pylint: disable=unused-import +from itertools import zip_longest +from typing import List, Optional -# This is just an alias. Will be removed. -from .padding import DynamicalDecoupling +import numpy as np +from qiskit.circuit import Qubit, Gate +from qiskit.circuit.delay import Delay +from qiskit.circuit.library.standard_gates import IGate, UGate, U3Gate +from qiskit.circuit.reset import Reset +from qiskit.dagcircuit import DAGCircuit, DAGNode, DAGInNode, DAGOpNode +from qiskit.quantum_info.operators.predicates import matrix_equal +from qiskit.quantum_info.synthesis import OneQubitEulerDecomposer +from qiskit.transpiler.exceptions import TranspilerError +from qiskit.transpiler.instruction_durations import InstructionDurations +from qiskit.transpiler.passes.optimization import Optimize1qGates +from qiskit.transpiler.passes.scheduling.padding import BasePadding + + +class DynamicalDecoupling(BasePadding): + """Dynamical decoupling insertion pass. + + This pass works on a scheduled, physical circuit. It scans the circuit for + idle periods of time (i.e. those containing delay instructions) and inserts + a DD sequence of gates in those spots. These gates amount to the identity, + so do not alter the logical action of the circuit, but have the effect of + mitigating decoherence in those idle periods. + + As a special case, the pass allows a length-1 sequence (e.g. [XGate()]). + In this case the DD insertion happens only when the gate inverse can be + absorbed into a neighboring gate in the circuit (so we would still be + replacing Delay with something that is equivalent to the identity). + This can be used, for instance, as a Hahn echo. + + This pass ensures that the inserted sequence preserves the circuit exactly + (including global phase). + + .. jupyter-execute:: + + import numpy as np + from qiskit.circuit import QuantumCircuit + from qiskit.circuit.library import XGate + from qiskit.transpiler import PassManager, InstructionDurations + from qiskit.transpiler.passes import ALAPSchedule, DynamicalDecoupling + from qiskit.visualization import timeline_drawer + circ = QuantumCircuit(4) + circ.h(0) + circ.cx(0, 1) + circ.cx(1, 2) + circ.cx(2, 3) + circ.measure_all() + durations = InstructionDurations( + [("h", 0, 50), ("cx", [0, 1], 700), ("reset", None, 10), + ("cx", [1, 2], 200), ("cx", [2, 3], 300), + ("x", None, 50), ("measure", None, 1000)] + ) + + .. jupyter-execute:: + + # balanced X-X sequence on all qubits + dd_sequence = [XGate(), XGate()] + pm = PassManager([ALAPSchedule(durations), + DynamicalDecoupling(durations, dd_sequence)]) + circ_dd = pm.run(circ) + timeline_drawer(circ_dd) + + .. jupyter-execute:: + + # Uhrig sequence on qubit 0 + n = 8 + dd_sequence = [XGate()] * n + def uhrig_pulse_location(k): + return np.sin(np.pi * (k + 1) / (2 * n + 2)) ** 2 + spacing = [] + for k in range(n): + spacing.append(uhrig_pulse_location(k) - sum(spacing)) + spacing.append(1 - sum(spacing)) + pm = PassManager( + [ + ALAPSchedule(durations), + DynamicalDecoupling(durations, dd_sequence, qubits=[0], spacing=spacing), + ] + ) + circ_dd = pm.run(circ) + timeline_drawer(circ_dd) + + .. note:: + + You may need to call alignment pass before running dynamical decoupling to guarantee + your circuit satisfies acquisition alignment constraints. + """ + + def __init__( + self, + durations: InstructionDurations, + dd_sequence: List[Gate], + qubits: Optional[List[int]] = None, + spacing: Optional[List[float]] = None, + skip_reset_qubits: bool = True, + pulse_alignment: int = 1, + ): + """Dynamical decoupling initializer. + + Args: + durations: Durations of instructions to be used in scheduling. + dd_sequence: Sequence of gates to apply in idle spots. + qubits: Physical qubits on which to apply DD. + If None, all qubits will undergo DD (when possible). + spacing: A list of spacings between the DD gates. + The available slack will be divided according to this. + The list length must be one more than the length of dd_sequence, + and the elements must sum to 1. If None, a balanced spacing + will be used [d/2, d, d, ..., d, d, d/2]. + skip_reset_qubits: If True, does not insert DD on idle periods that + immediately follow initialized/reset qubits + (as qubits in the ground state are less susceptile to decoherence). + pulse_alignment: The hardware constraints for gate timing allocation. + This is usually provided from ``backend.configuration().timing_constraints``. + If provided, the delay length, i.e. ``spacing``, is implicitly adjusted to + satisfy this constraint. + + Raises: + TranspilerError: When invalid DD sequence is specified. + TranspilerError: When pulse gate with the duration which is + non-multiple of the alignment constraint value is found. + """ + super().__init__() + self._durations = durations + self._dd_sequence = dd_sequence + self._qubits = qubits + self._skip_reset_qubits = skip_reset_qubits + self._alignment = pulse_alignment + self._spacing = spacing + + self._dd_sequence_lengths = dict() + self._sequence_phase = 0 + + def _pre_runhook(self, dag: DAGCircuit): + super()._pre_runhook(dag) + + num_pulses = len(self._dd_sequence) + + # Check if physical circuit is given + if len(dag.qregs) != 1 or dag.qregs.get("q", None) is None: + raise TranspilerError("DD runs on physical circuits only.") + + # Set default spacing otherwise validate user input + if self._spacing is None: + mid = 1 / num_pulses + end = mid / 2 + self._spacing = [end] + [mid] * (num_pulses - 1) + [end] + else: + if sum(self._spacing) != 1 or any(a < 0 for a in self._spacing): + raise TranspilerError( + "The spacings must be given in terms of fractions " + "of the slack period and sum to 1." + ) + + # Check if DD sequence is identity + if num_pulses != 1: + if num_pulses % 2 != 0: + raise TranspilerError("DD sequence must contain an even number of gates (or 1).") + noop = np.eye(2) + for gate in self._dd_sequence: + noop = noop.dot(gate.to_matrix()) + if not matrix_equal(noop, IGate().to_matrix(), ignore_phase=True): + raise TranspilerError("The DD sequence does not make an identity operation.") + self._sequence_phase = np.angle(noop[0][0]) + + # Precompute qubit-wise DD sequence length for performance + for qubit in dag.qubits: + physical_index = dag.qubits.index(qubit) + if self._qubits and physical_index not in self._qubits: + continue + + gate_length_sum = 0 + for gate in self._dd_sequence: + try: + # Check calibration. + gate_length = dag.calibrations[gate.name][(physical_index, gate.params)] + if gate_length % self._alignment != 0: + # This is necessary to implement lightweight scheduling logic for this pass. + # Usually the pulse alignment constraint and pulse data chunk size take + # the same value, however, we can intentionally violate this pattern + # at the gate level. For example, we can create a schedule consisting of + # a pi-pulse of 32 dt followed by a post buffer, i.e. delay, of 4 dt + # on the device with 16 dt constraint. Note that the pi-pulse length + # is multiple of 16 dt but the gate length of 36 is not multiple of it. + # Such pulse gate should be excluded. + raise TranspilerError( + f"Pulse gate {gate.name} with length non-multiple of {self._alignment} " + f"is not acceptable in {self.__class__.__name__} pass." + ) + except KeyError: + gate_length = self._durations.get(gate, physical_index) + gate_length_sum += gate_length + # Update gate duration. This is necessary for current timeline drawer, i.e. scheduled. + gate.duration = gate_length + self._dd_sequence_lengths[qubit] = gate_length_sum + + def _pad( + self, + dag: DAGCircuit, + qubit: Qubit, + t_start: int, + t_end: int, + next_node: DAGNode, + prev_node: DAGNode, + ): + # This routine takes care of the pulse alignment constraint for the DD sequence. + # Note that the alignment constraint acts on the t0 of the DAGOpNode. + # Now this constrained scheduling problem is simplified to the problem of + # finding a delay amount which is a multiple of the constraint value by assuming + # that the duration of every DAGOpNode is also a multiple of the constraint value. + # + # For example, given the constraint value of 16 and XY4 with 160 dt gates. + # Here we assume current interval is 992 dt. + # + # relative spacing := [0.125, 0.25, 0.25, 0.25, 0.125] + # slack = 992 dt - 4 x 160 dt = 352 dt + # + # unconstraind sequence: 44dt-X1-88dt-Y2-88dt-X3-88dt-Y4-44dt + # constraind sequence : 32dt-X1-80dt-Y2-80dt-X3-80dt-Y4-32dt + extra slack 48 dt + # + # Now we evenly split extra slack into start and end of the sequence. + # The distributed slack should be multiple of 16. + # Start = +16, End += 32 + # + # final sequence : 48dt-X1-80dt-Y2-80dt-X3-80dt-Y4-64dt / in total 992 dt + # + # Now we verify t0 of every node starts from multiple of 16 dt. + # + # X1: 48 dt (3 x 16 dt) + # Y2: 48 dt + 160 dt + 80 dt = 288 dt (18 x 16 dt) + # Y3: 288 dt + 160 dt + 80 dt = 528 dt (33 x 16 dt) + # Y4: 368 dt + 160 dt + 80 dt = 768 dt (48 x 16 dt) + # + # As you can see, constraints on t0 are all satified without explicit scheduling. + time_interval = t_end - t_start + + if self._qubits and dag.qubits.index(qubit) not in self._qubits: + # Target physical qubit is not the target of this DD sequence. + dag.apply_operation_back(Delay(time_interval, dag.unit), [qubit]) + return + + if self._skip_reset_qubits and ( + isinstance(prev_node, DAGInNode) or isinstance(prev_node.op, Reset) + ): + # Previous node is the start edge or reset, i.e. qubit is ground state. + dag.apply_operation_back(Delay(time_interval, dag.unit), [qubit]) + return + + slack = time_interval - self._dd_sequence_lengths[qubit] + sequence_gphase = self._sequence_phase + + if slack <= 0: + # Interval too short. + dag.apply_operation_back(Delay(time_interval, dag.unit), [qubit]) + return + + if len(self._dd_sequence) == 1: + # Special case of using a single gate for DD + u_inv = self._dd_sequence[0].inverse().to_matrix() + theta, phi, lam, phase = OneQubitEulerDecomposer().angles_and_phase(u_inv) + if isinstance(next_node, DAGOpNode) and isinstance(next_node.op, (UGate, U3Gate)): + # Absorb the inverse into the successor (from left in circuit) + theta_r, phi_r, lam_r = next_node.op.params + next_node.op.params = Optimize1qGates.compose_u3( + theta_r, phi_r, lam_r, theta, phi, lam + ) + sequence_gphase += phase + elif isinstance(prev_node, DAGOpNode) and isinstance(prev_node.op, (UGate, U3Gate)): + # Absorb the inverse into the predecessor (from right in circuit) + theta_l, phi_l, lam_l = prev_node.op.params + prev_node.op.params = Optimize1qGates.compose_u3( + theta, phi, lam, theta_l, phi_l, lam_l + ) + sequence_gphase += phase + else: + # Don't do anything if there's no single-qubit gate to absorb the inverse + dag.apply_operation_back(Delay(time_interval, dag.unit), [qubit]) + return + + def _constrained_length(values): + return self._alignment * np.floor(values / self._alignment) + + # (1) Compute DD intervals satisfying the constraint + taus = _constrained_length(slack * np.asarray(self._spacing)) + extra_slack = slack - np.sum(taus) + + # (2) Distribute extra slack as evenly as possible + to_begin_edge = _constrained_length(extra_slack / 2) + taus[0] += to_begin_edge + taus[-1] += extra_slack - to_begin_edge + + # (3) Construct DD sequence with delays + for tau, gate in zip_longest(taus, self._dd_sequence): + if tau > 0: + dag.apply_operation_back(Delay(tau, dag.unit), [qubit]) + if gate is not None: + dag.apply_operation_back(gate, [qubit]) + + dag.global_phase = self._mod_2pi(dag.global_phase + sequence_gphase) + + @staticmethod + def _mod_2pi(angle: float, atol: float = 0): + """Wrap angle into interval [-π,π). If within atol of the endpoint, clamp to -π""" + wrapped = (angle + np.pi) % (2 * np.pi) - np.pi + if abs(wrapped - np.pi) < atol: + wrapped = -np.pi + return wrapped diff --git a/qiskit/transpiler/passes/scheduling/padding.py b/qiskit/transpiler/passes/scheduling/padding.py index 15b8bec31b12..43e3bad73900 100644 --- a/qiskit/transpiler/passes/scheduling/padding.py +++ b/qiskit/transpiler/passes/scheduling/padding.py @@ -12,21 +12,10 @@ """Padding pass to fill empty timeslot.""" -from typing import List, Optional -from itertools import zip_longest - -import numpy as np - -from qiskit.circuit import Qubit, Gate +from qiskit.circuit import Qubit from qiskit.circuit.delay import Delay -from qiskit.circuit.reset import Reset -from qiskit.circuit.library.standard_gates import IGate, UGate, U3Gate -from qiskit.dagcircuit import DAGCircuit, DAGNode, DAGOutNode, DAGInNode, DAGOpNode -from qiskit.transpiler.instruction_durations import InstructionDurations +from qiskit.dagcircuit import DAGCircuit, DAGNode, DAGOutNode from qiskit.transpiler.basepasses import TransformationPass -from qiskit.transpiler.passes.optimization import Optimize1qGates -from qiskit.quantum_info.operators.predicates import matrix_equal -from qiskit.quantum_info.synthesis import OneQubitEulerDecomposer from qiskit.transpiler.exceptions import TranspilerError @@ -242,297 +231,3 @@ def _pad( time_interval = t_end - t_start dag.apply_operation_back(Delay(time_interval, dag.unit), [qubit]) - - -class DynamicalDecoupling(BasePadding): - """Dynamical decoupling insertion pass. - - This pass works on a scheduled, physical circuit. It scans the circuit for - idle periods of time (i.e. those containing delay instructions) and inserts - a DD sequence of gates in those spots. These gates amount to the identity, - so do not alter the logical action of the circuit, but have the effect of - mitigating decoherence in those idle periods. - - As a special case, the pass allows a length-1 sequence (e.g. [XGate()]). - In this case the DD insertion happens only when the gate inverse can be - absorbed into a neighboring gate in the circuit (so we would still be - replacing Delay with something that is equivalent to the identity). - This can be used, for instance, as a Hahn echo. - - This pass ensures that the inserted sequence preserves the circuit exactly - (including global phase). - - .. jupyter-execute:: - - import numpy as np - from qiskit.circuit import QuantumCircuit - from qiskit.circuit.library import XGate - from qiskit.transpiler import PassManager, InstructionDurations - from qiskit.transpiler.passes import ALAPSchedule, DynamicalDecoupling - from qiskit.visualization import timeline_drawer - circ = QuantumCircuit(4) - circ.h(0) - circ.cx(0, 1) - circ.cx(1, 2) - circ.cx(2, 3) - circ.measure_all() - durations = InstructionDurations( - [("h", 0, 50), ("cx", [0, 1], 700), ("reset", None, 10), - ("cx", [1, 2], 200), ("cx", [2, 3], 300), - ("x", None, 50), ("measure", None, 1000)] - ) - - .. jupyter-execute:: - - # balanced X-X sequence on all qubits - dd_sequence = [XGate(), XGate()] - pm = PassManager([ALAPSchedule(durations), - DynamicalDecoupling(durations, dd_sequence)]) - circ_dd = pm.run(circ) - timeline_drawer(circ_dd) - - .. jupyter-execute:: - - # Uhrig sequence on qubit 0 - n = 8 - dd_sequence = [XGate()] * n - def uhrig_pulse_location(k): - return np.sin(np.pi * (k + 1) / (2 * n + 2)) ** 2 - spacing = [] - for k in range(n): - spacing.append(uhrig_pulse_location(k) - sum(spacing)) - spacing.append(1 - sum(spacing)) - pm = PassManager( - [ - ALAPSchedule(durations), - DynamicalDecoupling(durations, dd_sequence, qubits=[0], spacing=spacing), - ] - ) - circ_dd = pm.run(circ) - timeline_drawer(circ_dd) - - .. note:: - - You may need to call alignment pass before running dynamical decoupling to guarantee - your circuit satisfies acquisition alignment constraints. - """ - - def __init__( - self, - durations: InstructionDurations, - dd_sequence: List[Gate], - qubits: Optional[List[int]] = None, - spacing: Optional[List[float]] = None, - skip_reset_qubits: bool = True, - pulse_alignment: int = 1, - ): - """Dynamical decoupling initializer. - - Args: - durations: Durations of instructions to be used in scheduling. - dd_sequence: Sequence of gates to apply in idle spots. - qubits: Physical qubits on which to apply DD. - If None, all qubits will undergo DD (when possible). - spacing: A list of spacings between the DD gates. - The available slack will be divided according to this. - The list length must be one more than the length of dd_sequence, - and the elements must sum to 1. If None, a balanced spacing - will be used [d/2, d, d, ..., d, d, d/2]. - skip_reset_qubits: If True, does not insert DD on idle periods that - immediately follow initialized/reset qubits - (as qubits in the ground state are less susceptile to decoherence). - pulse_alignment: The hardware constraints for gate timing allocation. - This is usually provided from ``backend.configuration().timing_constraints``. - If provided, the delay length, i.e. ``spacing``, is implicitly adjusted to - satisfy this constraint. - - Raises: - TranspilerError: When invalid DD sequence is specified. - TranspilerError: When pulse gate with the duration which is - non-multiple of the alignment constraint value is found. - """ - super().__init__() - self._durations = durations - self._dd_sequence = dd_sequence - self._qubits = qubits - self._skip_reset_qubits = skip_reset_qubits - self._alignment = pulse_alignment - self._spacing = spacing - - self._dd_sequence_lengths = dict() - self._sequence_phase = 0 - - def _pre_runhook(self, dag: DAGCircuit): - super()._pre_runhook(dag) - - num_pulses = len(self._dd_sequence) - - # Check if physical circuit is given - if len(dag.qregs) != 1 or dag.qregs.get("q", None) is None: - raise TranspilerError("DD runs on physical circuits only.") - - # Set default spacing otherwise validate user input - if self._spacing is None: - mid = 1 / num_pulses - end = mid / 2 - self._spacing = [end] + [mid] * (num_pulses - 1) + [end] - else: - if sum(self._spacing) != 1 or any(a < 0 for a in self._spacing): - raise TranspilerError( - "The spacings must be given in terms of fractions " - "of the slack period and sum to 1." - ) - - # Check if DD sequence is identity - if num_pulses != 1: - if num_pulses % 2 != 0: - raise TranspilerError("DD sequence must contain an even number of gates (or 1).") - noop = np.eye(2) - for gate in self._dd_sequence: - noop = noop.dot(gate.to_matrix()) - if not matrix_equal(noop, IGate().to_matrix(), ignore_phase=True): - raise TranspilerError("The DD sequence does not make an identity operation.") - self._sequence_phase = np.angle(noop[0][0]) - - # Precompute qubit-wise DD sequence length for performance - for qubit in dag.qubits: - physical_index = dag.qubits.index(qubit) - if self._qubits and physical_index not in self._qubits: - continue - - gate_length_sum = 0 - for gate in self._dd_sequence: - try: - # Check calibration. - gate_length = dag.calibrations[gate.name][(physical_index, gate.params)] - if gate_length % self._alignment != 0: - # This is necessary to implement lightweight scheduling logic for this pass. - # Usually the pulse alignment constraint and pulse data chunk size take - # the same value, however, we can intentionally violate this pattern - # at the gate level. For example, we can create a schedule consisting of - # a pi-pulse of 32 dt followed by a post buffer, i.e. delay, of 4 dt - # on the device with 16 dt constraint. Note that the pi-pulse length - # is multiple of 16 dt but the gate length of 36 is not multiple of it. - # Such pulse gate should be excluded. - raise TranspilerError( - f"Pulse gate {gate.name} with length non-multiple of {self._alignment} " - f"is not acceptable in {self.__class__.__name__} pass." - ) - except KeyError: - gate_length = self._durations.get(gate, physical_index) - gate_length_sum += gate_length - # Update gate duration. This is necessary for current timeline drawer, i.e. scheduled. - gate.duration = gate_length - self._dd_sequence_lengths[qubit] = gate_length_sum - - def _pad( - self, - dag: DAGCircuit, - qubit: Qubit, - t_start: int, - t_end: int, - next_node: DAGNode, - prev_node: DAGNode, - ): - # This routine takes care of the pulse alignment constraint for the DD sequence. - # Note that the alignment constraint acts on the t0 of the DAGOpNode. - # Now this constrained scheduling problem is simplified to the problem of - # finding a delay amount which is a multiple of the constraint value by assuming - # that the duration of every DAGOpNode is also a multiple of the constraint value. - # - # For example, given the constraint value of 16 and XY4 with 160 dt gates. - # Here we assume current interval is 992 dt. - # - # relative spacing := [0.125, 0.25, 0.25, 0.25, 0.125] - # slack = 992 dt - 4 x 160 dt = 352 dt - # - # unconstraind sequence: 44dt-X1-88dt-Y2-88dt-X3-88dt-Y4-44dt - # constraind sequence : 32dt-X1-80dt-Y2-80dt-X3-80dt-Y4-32dt + extra slack 48 dt - # - # Now we evenly split extra slack into start and end of the sequence. - # The distributed slack should be multiple of 16. - # Start = +16, End += 32 - # - # final sequence : 48dt-X1-80dt-Y2-80dt-X3-80dt-Y4-64dt / in total 992 dt - # - # Now we verify t0 of every node starts from multiple of 16 dt. - # - # X1: 48 dt (3 x 16 dt) - # Y2: 48 dt + 160 dt + 80 dt = 288 dt (18 x 16 dt) - # Y3: 288 dt + 160 dt + 80 dt = 528 dt (33 x 16 dt) - # Y4: 368 dt + 160 dt + 80 dt = 768 dt (48 x 16 dt) - # - # As you can see, constraints on t0 are all satified without explicit scheduling. - time_interval = t_end - t_start - - if self._qubits and dag.qubits.index(qubit) not in self._qubits: - # Target physical qubit is not the target of this DD sequence. - dag.apply_operation_back(Delay(time_interval, dag.unit), [qubit]) - return - - if self._skip_reset_qubits and ( - isinstance(prev_node, DAGInNode) or isinstance(prev_node.op, Reset) - ): - # Previous node is the start edge or reset, i.e. qubit is ground state. - dag.apply_operation_back(Delay(time_interval, dag.unit), [qubit]) - return - - slack = time_interval - self._dd_sequence_lengths[qubit] - sequence_gphase = self._sequence_phase - - if slack <= 0: - # Interval too short. - dag.apply_operation_back(Delay(time_interval, dag.unit), [qubit]) - return - - if len(self._dd_sequence) == 1: - # Special case of using a single gate for DD - u_inv = self._dd_sequence[0].inverse().to_matrix() - theta, phi, lam, phase = OneQubitEulerDecomposer().angles_and_phase(u_inv) - if isinstance(next_node, DAGOpNode) and isinstance(next_node.op, (UGate, U3Gate)): - # Absorb the inverse into the successor (from left in circuit) - theta_r, phi_r, lam_r = next_node.op.params - next_node.op.params = Optimize1qGates.compose_u3( - theta_r, phi_r, lam_r, theta, phi, lam - ) - sequence_gphase += phase - elif isinstance(prev_node, DAGOpNode) and isinstance(prev_node.op, (UGate, U3Gate)): - # Absorb the inverse into the predecessor (from right in circuit) - theta_l, phi_l, lam_l = prev_node.op.params - prev_node.op.params = Optimize1qGates.compose_u3( - theta, phi, lam, theta_l, phi_l, lam_l - ) - sequence_gphase += phase - else: - # Don't do anything if there's no single-qubit gate to absorb the inverse - dag.apply_operation_back(Delay(time_interval, dag.unit), [qubit]) - return - - def _constrained_length(values): - return self._alignment * np.floor(values / self._alignment) - - # (1) Compute DD intervals satisfying the constraint - taus = _constrained_length(slack * np.asarray(self._spacing)) - extra_slack = slack - np.sum(taus) - - # (2) Distribute extra slack as evenly as possible - to_begin_edge = _constrained_length(extra_slack / 2) - taus[0] += to_begin_edge - taus[-1] += extra_slack - to_begin_edge - - # (3) Construct DD sequence with delays - for tau, gate in zip_longest(taus, self._dd_sequence): - if tau > 0: - dag.apply_operation_back(Delay(tau, dag.unit), [qubit]) - if gate is not None: - dag.apply_operation_back(gate, [qubit]) - - dag.global_phase = self._mod_2pi(dag.global_phase + sequence_gphase) - - @staticmethod - def _mod_2pi(angle: float, atol: float = 0): - """Wrap angle into interval [-π,π). If within atol of the endpoint, clamp to -π""" - wrapped = (angle + np.pi) % (2 * np.pi) - np.pi - if abs(wrapped - np.pi) < atol: - wrapped = -np.pi - return wrapped diff --git a/releasenotes/notes/dynamical-decoupling-with-alignment-9c1e5ee909eab0f7.yaml b/releasenotes/notes/dynamical-decoupling-with-alignment-9c1e5ee909eab0f7.yaml index 837e2cfa50c2..262e11e8edfb 100644 --- a/releasenotes/notes/dynamical-decoupling-with-alignment-9c1e5ee909eab0f7.yaml +++ b/releasenotes/notes/dynamical-decoupling-with-alignment-9c1e5ee909eab0f7.yaml @@ -16,5 +16,3 @@ upgrade: :class:`DynamicalDecoupling` has been upgraded to be a subclass of :class:`BasePadding`. This means the dynamical decoupling pass is now a drop-in replacement for the :class:`PadDelay` pass. - The import path has been also updated and now it is placed under - :mod:`qiskit.transpiler.passes.scheduling.padding`. From 763fa33b6b82037425bebb96a893e01ba9c7ada9 Mon Sep 17 00:00:00 2001 From: knzwnao Date: Fri, 11 Mar 2022 12:26:12 +0900 Subject: [PATCH 05/11] support sequential padding pass call --- .../passes/scheduling/dynamical_decoupling.py | 38 ++++++++++++------- .../transpiler/passes/scheduling/padding.py | 37 ++++++++++++++---- .../transpiler/test_dynamical_decoupling.py | 24 +++++++++--- 3 files changed, 73 insertions(+), 26 deletions(-) diff --git a/qiskit/transpiler/passes/scheduling/dynamical_decoupling.py b/qiskit/transpiler/passes/scheduling/dynamical_decoupling.py index f219d65d62fa..5814661f2627 100644 --- a/qiskit/transpiler/passes/scheduling/dynamical_decoupling.py +++ b/qiskit/transpiler/passes/scheduling/dynamical_decoupling.py @@ -12,7 +12,6 @@ """Dynamical Decoupling insertion pass.""" -from itertools import zip_longest from typing import List, Optional import numpy as np @@ -185,7 +184,7 @@ def _pre_runhook(self, dag: DAGCircuit): if self._qubits and physical_index not in self._qubits: continue - gate_length_sum = 0 + sequence_lengths = [] for gate in self._dd_sequence: try: # Check calibration. @@ -205,10 +204,10 @@ def _pre_runhook(self, dag: DAGCircuit): ) except KeyError: gate_length = self._durations.get(gate, physical_index) - gate_length_sum += gate_length + sequence_lengths.append(gate_length) # Update gate duration. This is necessary for current timeline drawer, i.e. scheduled. gate.duration = gate_length - self._dd_sequence_lengths[qubit] = gate_length_sum + self._dd_sequence_lengths[qubit] = sequence_lengths def _pad( self, @@ -252,22 +251,25 @@ def _pad( if self._qubits and dag.qubits.index(qubit) not in self._qubits: # Target physical qubit is not the target of this DD sequence. - dag.apply_operation_back(Delay(time_interval, dag.unit), [qubit]) + delay_node = dag.apply_operation_back(Delay(time_interval, dag.unit), [qubit]) + self._update_start_time(delay_node, t_start) return if self._skip_reset_qubits and ( isinstance(prev_node, DAGInNode) or isinstance(prev_node.op, Reset) ): # Previous node is the start edge or reset, i.e. qubit is ground state. - dag.apply_operation_back(Delay(time_interval, dag.unit), [qubit]) + delay_node = dag.apply_operation_back(Delay(time_interval, dag.unit), [qubit]) + self._update_start_time(delay_node, t_start) return - slack = time_interval - self._dd_sequence_lengths[qubit] + slack = time_interval - np.sum(self._dd_sequence_lengths[qubit]) sequence_gphase = self._sequence_phase if slack <= 0: # Interval too short. - dag.apply_operation_back(Delay(time_interval, dag.unit), [qubit]) + delay_node = dag.apply_operation_back(Delay(time_interval, dag.unit), [qubit]) + self._update_start_time(delay_node, t_start) return if len(self._dd_sequence) == 1: @@ -306,11 +308,21 @@ def _constrained_length(values): taus[-1] += extra_slack - to_begin_edge # (3) Construct DD sequence with delays - for tau, gate in zip_longest(taus, self._dd_sequence): - if tau > 0: - dag.apply_operation_back(Delay(tau, dag.unit), [qubit]) - if gate is not None: - dag.apply_operation_back(gate, [qubit]) + num_elements = max(len(self._dd_sequence), len(taus)) + idle_after = t_start + for dd_ind in range(num_elements): + if dd_ind < len(taus): + tau = taus[dd_ind] + if tau > 0: + delay_node = dag.apply_operation_back(Delay(tau, dag.unit), [qubit]) + self._update_start_time(delay_node, idle_after) + idle_after += tau + if dd_ind < len(self._dd_sequence): + gate = self._dd_sequence[dd_ind] + gate_length = self._dd_sequence_lengths[qubit][dd_ind] + gate_node = dag.apply_operation_back(gate, [qubit]) + self._update_start_time(gate_node, idle_after) + idle_after += gate_length dag.global_phase = self._mod_2pi(dag.global_phase + sequence_gphase) diff --git a/qiskit/transpiler/passes/scheduling/padding.py b/qiskit/transpiler/passes/scheduling/padding.py index 43e3bad73900..398a086f41eb 100644 --- a/qiskit/transpiler/passes/scheduling/padding.py +++ b/qiskit/transpiler/passes/scheduling/padding.py @@ -14,7 +14,7 @@ from qiskit.circuit import Qubit from qiskit.circuit.delay import Delay -from qiskit.dagcircuit import DAGCircuit, DAGNode, DAGOutNode +from qiskit.dagcircuit import DAGCircuit, DAGNode, DAGOutNode, DAGOpNode from qiskit.transpiler.basepasses import TransformationPass from qiskit.transpiler.exceptions import TranspilerError @@ -62,7 +62,7 @@ def run(self, dag: DAGCircuit): """ self._pre_runhook(dag) - node_start_time = self.property_set["node_start_time"] + node_start_time = self.property_set["node_start_time"].copy() new_dag = DAGCircuit() for qreg in dag.qregs.values(): @@ -70,10 +70,16 @@ def run(self, dag: DAGCircuit): for creg in dag.cregs.values(): new_dag.add_creg(creg) + # Update start time dictionary for the new_dag. + # This information may be used for further scheduling tasks, + # but this is immediately invalidated becasue node id is updated in the new_dag. + self.property_set["node_start_time"].clear() + new_dag.name = dag.name new_dag.metadata = dag.metadata new_dag.unit = self.property_set["time_unit"] new_dag.calibrations = dag.calibrations + new_dag.global_phase = dag.global_phase idle_after = {bit: 0 for bit in dag.qubits} @@ -112,7 +118,8 @@ def run(self, dag: DAGCircuit): idle_after[bit] = t1 - new_dag.apply_operation_back(node.op, node.qargs, node.cargs) + new_node = new_dag.apply_operation_back(node.op, node.qargs, node.cargs) + self._update_start_time(new_node, t0) else: raise TranspilerError( f"Operation {repr(node)} is likely added after the circuit is scheduled. " @@ -135,9 +142,6 @@ def run(self, dag: DAGCircuit): new_dag.duration = circuit_duration - # Invalidate old schedule information since delays are filled with sequence. - del self.property_set["node_start_time"] - return new_dag def _pre_runhook(self, dag: DAGCircuit): @@ -155,6 +159,20 @@ def _pre_runhook(self, dag: DAGCircuit): f"before running the {self.__class__.__name__} pass." ) + def _update_start_time(self, node: DAGOpNode, start_time: int): + """Update start time dictionary with new node. + + Args: + node: A new node that is added in the padding sequence. + start_time: Start time of the new node. + + Raises: + TranspilerError: When the node is already added to the dictionary. + """ + if node in self.property_set["node_start_time"]: + raise TranspilerError(f"Node {repr(node)} is already scheduled.") + self.property_set["node_start_time"][node] = start_time + def _pad( self, dag: DAGCircuit, @@ -166,6 +184,10 @@ def _pad( ): """Interleave instruction sequence in between two nodes. + .. note:: + If a DAGOpNode is added here, it should update node_start_time property + in the property set so that the added node is also scheduled. + Args: dag: DAG circuit that sequence is applied. qubit: The wire that the sequence is applied on. @@ -230,4 +252,5 @@ def _pad( return time_interval = t_end - t_start - dag.apply_operation_back(Delay(time_interval, dag.unit), [qubit]) + delay_node = dag.apply_operation_back(Delay(time_interval, dag.unit), [qubit]) + self._update_start_time(delay_node, t_start) diff --git a/test/python/transpiler/test_dynamical_decoupling.py b/test/python/transpiler/test_dynamical_decoupling.py index 7d0a8a6953b3..d5af193ef67f 100644 --- a/test/python/transpiler/test_dynamical_decoupling.py +++ b/test/python/transpiler/test_dynamical_decoupling.py @@ -690,21 +690,33 @@ def test_insert_dd_ghz_xy4_with_alignment(self): self.assertEqual(ghz4_dd, expected) - def test_dd_cannot_called_twice(self): - """Calling padding family pass twice is forbidden because insertion of sequence will - invalidate previously scheduled node start times. + def test_dd_can_sequentially_called(self): + """Test if sequentially called DD pass can output the same circuit. + + This test verifies: + - if global phase is properly propagated from the previous padding node. + - if node_start_time property is properly updated for new dag circuit. """ dd_sequence = [XGate(), YGate(), XGate(), YGate()] - pm = PassManager( + + pm1 = PassManager( [ ALAPSchedule(self.durations), DynamicalDecoupling(self.durations, dd_sequence, qubits=[0]), DynamicalDecoupling(self.durations, dd_sequence, qubits=[1]), ] ) + circ1 = pm1.run(self.ghz4) - with self.assertRaises(TranspilerError): - pm.run(self.ghz4) + pm2 = PassManager( + [ + ALAPSchedule(self.durations), + DynamicalDecoupling(self.durations, dd_sequence, qubits=[0, 1]), + ] + ) + circ2 = pm2.run(self.ghz4) + + self.assertEqual(circ1, circ2) if __name__ == "__main__": From 39ffd4e5348c95dd8ae903e388122b22b4de6b78 Mon Sep 17 00:00:00 2001 From: knzwnao Date: Fri, 11 Mar 2022 17:29:18 +0900 Subject: [PATCH 06/11] add _apply_scheduled_op method --- .../passes/scheduling/dynamical_decoupling.py | 17 +++---- .../transpiler/passes/scheduling/padding.py | 46 ++++++++++++------- 2 files changed, 36 insertions(+), 27 deletions(-) diff --git a/qiskit/transpiler/passes/scheduling/dynamical_decoupling.py b/qiskit/transpiler/passes/scheduling/dynamical_decoupling.py index 5814661f2627..893cea686c76 100644 --- a/qiskit/transpiler/passes/scheduling/dynamical_decoupling.py +++ b/qiskit/transpiler/passes/scheduling/dynamical_decoupling.py @@ -251,16 +251,14 @@ def _pad( if self._qubits and dag.qubits.index(qubit) not in self._qubits: # Target physical qubit is not the target of this DD sequence. - delay_node = dag.apply_operation_back(Delay(time_interval, dag.unit), [qubit]) - self._update_start_time(delay_node, t_start) + self._apply_scheduled_op(dag, t_start, Delay(time_interval, dag.unit), qubit) return if self._skip_reset_qubits and ( isinstance(prev_node, DAGInNode) or isinstance(prev_node.op, Reset) ): # Previous node is the start edge or reset, i.e. qubit is ground state. - delay_node = dag.apply_operation_back(Delay(time_interval, dag.unit), [qubit]) - self._update_start_time(delay_node, t_start) + self._apply_scheduled_op(dag, t_start, Delay(time_interval, dag.unit), qubit) return slack = time_interval - np.sum(self._dd_sequence_lengths[qubit]) @@ -268,8 +266,7 @@ def _pad( if slack <= 0: # Interval too short. - delay_node = dag.apply_operation_back(Delay(time_interval, dag.unit), [qubit]) - self._update_start_time(delay_node, t_start) + self._apply_scheduled_op(dag, t_start, Delay(time_interval, dag.unit), qubit) return if len(self._dd_sequence) == 1: @@ -292,7 +289,7 @@ def _pad( sequence_gphase += phase else: # Don't do anything if there's no single-qubit gate to absorb the inverse - dag.apply_operation_back(Delay(time_interval, dag.unit), [qubit]) + self._apply_scheduled_op(dag, t_start, Delay(time_interval, dag.unit), qubit) return def _constrained_length(values): @@ -314,14 +311,12 @@ def _constrained_length(values): if dd_ind < len(taus): tau = taus[dd_ind] if tau > 0: - delay_node = dag.apply_operation_back(Delay(tau, dag.unit), [qubit]) - self._update_start_time(delay_node, idle_after) + self._apply_scheduled_op(dag, idle_after, Delay(tau, dag.unit), qubit) idle_after += tau if dd_ind < len(self._dd_sequence): gate = self._dd_sequence[dd_ind] gate_length = self._dd_sequence_lengths[qubit][dd_ind] - gate_node = dag.apply_operation_back(gate, [qubit]) - self._update_start_time(gate_node, idle_after) + self._apply_scheduled_op(dag, idle_after, gate, qubit) idle_after += gate_length dag.global_phase = self._mod_2pi(dag.global_phase + sequence_gphase) diff --git a/qiskit/transpiler/passes/scheduling/padding.py b/qiskit/transpiler/passes/scheduling/padding.py index 398a086f41eb..9a609d015098 100644 --- a/qiskit/transpiler/passes/scheduling/padding.py +++ b/qiskit/transpiler/passes/scheduling/padding.py @@ -12,9 +12,11 @@ """Padding pass to fill empty timeslot.""" -from qiskit.circuit import Qubit +from typing import List, Optional, Union + +from qiskit.circuit import Qubit, Clbit, Instruction from qiskit.circuit.delay import Delay -from qiskit.dagcircuit import DAGCircuit, DAGNode, DAGOutNode, DAGOpNode +from qiskit.dagcircuit import DAGCircuit, DAGNode, DAGOutNode from qiskit.transpiler.basepasses import TransformationPass from qiskit.transpiler.exceptions import TranspilerError @@ -118,8 +120,7 @@ def run(self, dag: DAGCircuit): idle_after[bit] = t1 - new_node = new_dag.apply_operation_back(node.op, node.qargs, node.cargs) - self._update_start_time(new_node, t0) + self._apply_scheduled_op(new_dag, t0, node.op, node.qargs, node.cargs) else: raise TranspilerError( f"Operation {repr(node)} is likely added after the circuit is scheduled. " @@ -159,19 +160,32 @@ def _pre_runhook(self, dag: DAGCircuit): f"before running the {self.__class__.__name__} pass." ) - def _update_start_time(self, node: DAGOpNode, start_time: int): - """Update start time dictionary with new node. + def _apply_scheduled_op( + self, + dag: DAGCircuit, + t_start: int, + oper: Instruction, + qubits: Union[Qubit, List[Qubit]], + clbits: Optional[Union[Clbit, List[Clbit]]] = None, + ): + """Add new operation to DAG with scheduled information. + + This is identical to apply_operation_back + updating the node_start_time propety. Args: - node: A new node that is added in the padding sequence. - start_time: Start time of the new node. - - Raises: - TranspilerError: When the node is already added to the dictionary. + dag: DAG circuit on which the sequence is applied. + t_start: Start time of new node. + oper: New operation that is added to the DAG circuit. + qubits: The list of qubits that the operation acts on. + clbits: The list of clbits that the operation acts on. """ - if node in self.property_set["node_start_time"]: - raise TranspilerError(f"Node {repr(node)} is already scheduled.") - self.property_set["node_start_time"][node] = start_time + if isinstance(qubits, Qubit): + qubits = [qubits] + if isinstance(clbits, Clbit): + clbits = [clbits] + + new_node = dag.apply_operation_back(oper, qargs=qubits, cargs=clbits) + self.property_set["node_start_time"][new_node] = t_start def _pad( self, @@ -187,6 +201,7 @@ def _pad( .. note:: If a DAGOpNode is added here, it should update node_start_time property in the property set so that the added node is also scheduled. + This is achieved by adding operation via :meth:`_apply_scheduled_op`. Args: dag: DAG circuit that sequence is applied. @@ -252,5 +267,4 @@ def _pad( return time_interval = t_end - t_start - delay_node = dag.apply_operation_back(Delay(time_interval, dag.unit), [qubit]) - self._update_start_time(delay_node, t_start) + self._apply_scheduled_op(dag, t_start, Delay(time_interval, dag.unit), qubit) From 19d235b8f1d6ad6c54741936367037a058f9b065 Mon Sep 17 00:00:00 2001 From: knzwnao Date: Sat, 12 Mar 2022 11:49:12 +0900 Subject: [PATCH 07/11] split files --- .../transpiler/passes/scheduling/__init__.py | 2 +- .../{padding.py => base_padding.py} | 58 +-------------- .../passes/scheduling/dynamical_decoupling.py | 2 +- .../transpiler/passes/scheduling/pad_delay.py | 74 +++++++++++++++++++ 4 files changed, 77 insertions(+), 59 deletions(-) rename qiskit/transpiler/passes/scheduling/{padding.py => base_padding.py} (82%) create mode 100644 qiskit/transpiler/passes/scheduling/pad_delay.py diff --git a/qiskit/transpiler/passes/scheduling/__init__.py b/qiskit/transpiler/passes/scheduling/__init__.py index b8f75c9a5a30..339012e25969 100644 --- a/qiskit/transpiler/passes/scheduling/__init__.py +++ b/qiskit/transpiler/passes/scheduling/__init__.py @@ -16,5 +16,5 @@ from .asap import ASAPSchedule from .time_unit_conversion import TimeUnitConversion from .instruction_alignment import AlignMeasures, ValidatePulseGates -from .padding import PadDelay +from .pad_delay import PadDelay from .dynamical_decoupling import DynamicalDecoupling diff --git a/qiskit/transpiler/passes/scheduling/padding.py b/qiskit/transpiler/passes/scheduling/base_padding.py similarity index 82% rename from qiskit/transpiler/passes/scheduling/padding.py rename to qiskit/transpiler/passes/scheduling/base_padding.py index 9a609d015098..de9991b70a26 100644 --- a/qiskit/transpiler/passes/scheduling/padding.py +++ b/qiskit/transpiler/passes/scheduling/base_padding.py @@ -16,7 +16,7 @@ from qiskit.circuit import Qubit, Clbit, Instruction from qiskit.circuit.delay import Delay -from qiskit.dagcircuit import DAGCircuit, DAGNode, DAGOutNode +from qiskit.dagcircuit import DAGCircuit, DAGNode from qiskit.transpiler.basepasses import TransformationPass from qiskit.transpiler.exceptions import TranspilerError @@ -212,59 +212,3 @@ def _pad( prev_node: Node ahead of the sequence. """ raise NotImplementedError - - -class PadDelay(BasePadding): - """Padding idle time with Delay instructions. - - Consecutive delays will be merged in the output of this pass. - - .. code-block::python - - durations = InstructionDurations([("x", None, 160), ("cx", None, 800)]) - - qc = QuantumCircuit(2) - qc.delay(100, 0) - qc.x(1) - qc.cx(0, 1) - - The ASAP-scheduled circuit output may become - - .. parsed-literal:: - - ┌────────────────┐ - q_0: ┤ Delay(160[dt]) ├──■── - └─────┬───┬──────┘┌─┴─┐ - q_1: ──────┤ X ├───────┤ X ├ - └───┘ └───┘ - - Note that the additional idle time of 60dt on the ``q_0`` wire coming from the duration difference - between ``Delay`` of 100dt (``q_0``) and ``XGate`` of 160 dt (``q_1``) is absorbed in - the delay instruction on the ``q_0`` wire, i.e. in total 160 dt. - - See :class:`BasePadding` pass for details. - """ - - def __init__(self, fill_very_end: bool = True): - """Create new padding delay pass. - - Args: - fill_very_end: Set ``True`` to fill the end of circuit with delay. - """ - super().__init__() - self.fill_very_end = fill_very_end - - def _pad( - self, - dag: DAGCircuit, - qubit: Qubit, - t_start: int, - t_end: int, - next_node: DAGNode, - prev_node: DAGNode, - ): - if not self.fill_very_end and isinstance(next_node, DAGOutNode): - return - - time_interval = t_end - t_start - self._apply_scheduled_op(dag, t_start, Delay(time_interval, dag.unit), qubit) diff --git a/qiskit/transpiler/passes/scheduling/dynamical_decoupling.py b/qiskit/transpiler/passes/scheduling/dynamical_decoupling.py index 893cea686c76..562b70a3207c 100644 --- a/qiskit/transpiler/passes/scheduling/dynamical_decoupling.py +++ b/qiskit/transpiler/passes/scheduling/dynamical_decoupling.py @@ -25,7 +25,7 @@ from qiskit.transpiler.exceptions import TranspilerError from qiskit.transpiler.instruction_durations import InstructionDurations from qiskit.transpiler.passes.optimization import Optimize1qGates -from qiskit.transpiler.passes.scheduling.padding import BasePadding +from qiskit.transpiler.passes.scheduling.base_padding import BasePadding class DynamicalDecoupling(BasePadding): diff --git a/qiskit/transpiler/passes/scheduling/pad_delay.py b/qiskit/transpiler/passes/scheduling/pad_delay.py new file mode 100644 index 000000000000..3dc868e67732 --- /dev/null +++ b/qiskit/transpiler/passes/scheduling/pad_delay.py @@ -0,0 +1,74 @@ +# This code is part of Qiskit. +# +# (C) Copyright IBM 2022. +# +# This code is licensed under the Apache License, Version 2.0. You may +# obtain a copy of this license in the LICENSE.txt file in the root directory +# of this source tree or at http://www.apache.org/licenses/LICENSE-2.0. +# +# Any modifications or derivative works of this code must retain this +# copyright notice, and modified files need to carry a notice indicating +# that they have been altered from the originals. + +"""Padding pass to insert Delay to the empty slots.""" + +from qiskit.circuit import Qubit +from qiskit.circuit.delay import Delay +from qiskit.dagcircuit import DAGCircuit, DAGNode, DAGOutNode +from qiskit.transpiler.passes.scheduling.base_padding import BasePadding + + +class PadDelay(BasePadding): + """Padding idle time with Delay instructions. + + Consecutive delays will be merged in the output of this pass. + + .. code-block::python + + durations = InstructionDurations([("x", None, 160), ("cx", None, 800)]) + + qc = QuantumCircuit(2) + qc.delay(100, 0) + qc.x(1) + qc.cx(0, 1) + + The ASAP-scheduled circuit output may become + + .. parsed-literal:: + + ┌────────────────┐ + q_0: ┤ Delay(160[dt]) ├──■── + └─────┬───┬──────┘┌─┴─┐ + q_1: ──────┤ X ├───────┤ X ├ + └───┘ └───┘ + + Note that the additional idle time of 60dt on the ``q_0`` wire coming from the duration difference + between ``Delay`` of 100dt (``q_0``) and ``XGate`` of 160 dt (``q_1``) is absorbed in + the delay instruction on the ``q_0`` wire, i.e. in total 160 dt. + + See :class:`BasePadding` pass for details. + """ + + def __init__(self, fill_very_end: bool = True): + """Create new padding delay pass. + + Args: + fill_very_end: Set ``True`` to fill the end of circuit with delay. + """ + super().__init__() + self.fill_very_end = fill_very_end + + def _pad( + self, + dag: DAGCircuit, + qubit: Qubit, + t_start: int, + t_end: int, + next_node: DAGNode, + prev_node: DAGNode, + ): + if not self.fill_very_end and isinstance(next_node, DAGOutNode): + return + + time_interval = t_end - t_start + self._apply_scheduled_op(dag, t_start, Delay(time_interval, dag.unit), qubit) From 095274ba6df421bc63308f5a9eec0543d984f189 Mon Sep 17 00:00:00 2001 From: knzwnao Date: Sun, 13 Mar 2022 11:25:37 +0900 Subject: [PATCH 08/11] add comment for invalid interval --- qiskit/transpiler/passes/scheduling/base_padding.py | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/qiskit/transpiler/passes/scheduling/base_padding.py b/qiskit/transpiler/passes/scheduling/base_padding.py index de9991b70a26..0e3126d74f50 100644 --- a/qiskit/transpiler/passes/scheduling/base_padding.py +++ b/qiskit/transpiler/passes/scheduling/base_padding.py @@ -203,6 +203,16 @@ def _pad( in the property set so that the added node is also scheduled. This is achieved by adding operation via :meth:`_apply_scheduled_op`. + .. note:: + + This method doesn't check if the total duration of new DAGOpNode added here + is identical to the interval (``t_end - t_start``). + A developer of the pass must guarantee this is satisfied. + If the duration is greater than the interval, your circuit may be + compiled down to the target code with extra duration on the backend compiler, + which is then played normally without error. However, the outcome of your circuit + might be unexpected due to erroneous scheduling. + Args: dag: DAG circuit that sequence is applied. qubit: The wire that the sequence is applied on. From 7c27a85e53a31b1c3342cccc18fd7756051b6a5a Mon Sep 17 00:00:00 2001 From: knzwnao Date: Sun, 13 Mar 2022 11:47:23 +0900 Subject: [PATCH 09/11] add slack distribution option --- .../passes/scheduling/dynamical_decoupling.py | 29 ++++++++++-- ...pling-with-alignment-9c1e5ee909eab0f7.yaml | 10 ++-- .../transpiler/test_dynamical_decoupling.py | 47 ++++++++++--------- 3 files changed, 58 insertions(+), 28 deletions(-) diff --git a/qiskit/transpiler/passes/scheduling/dynamical_decoupling.py b/qiskit/transpiler/passes/scheduling/dynamical_decoupling.py index 562b70a3207c..ad09eb25f19b 100644 --- a/qiskit/transpiler/passes/scheduling/dynamical_decoupling.py +++ b/qiskit/transpiler/passes/scheduling/dynamical_decoupling.py @@ -109,6 +109,7 @@ def __init__( spacing: Optional[List[float]] = None, skip_reset_qubits: bool = True, pulse_alignment: int = 1, + extra_slack_distribution: str = "middle", ): """Dynamical decoupling initializer. @@ -129,6 +130,17 @@ def __init__( This is usually provided from ``backend.configuration().timing_constraints``. If provided, the delay length, i.e. ``spacing``, is implicitly adjusted to satisfy this constraint. + extra_slack_distribution: The option to control the behavior of DD sequence generation. + The duration of the DD sequence should be identical to an idle time in the + scheduled quantum circuit, however, the delay in between gates comprising the sequence + should be integer number in units of dt, and it might be furter truncated + when ``pulse_alignment`` is specified. This sometimes results in the duration of + created sequence is shorter than the idle time that you want to fill with the sequence, + i.e. `extra slack`. This option takes following values. + + - "middle": Put the extra slack to the interval at the middle of the sequence. + - "split_edges": Divide the extra slack as evenly as possible into + intervals at begging and end of the sequence. Raises: TranspilerError: When invalid DD sequence is specified. @@ -142,6 +154,7 @@ def __init__( self._skip_reset_qubits = skip_reset_qubits self._alignment = pulse_alignment self._spacing = spacing + self._extra_slack_distribution = extra_slack_distribution self._dd_sequence_lengths = dict() self._sequence_phase = 0 @@ -299,10 +312,18 @@ def _constrained_length(values): taus = _constrained_length(slack * np.asarray(self._spacing)) extra_slack = slack - np.sum(taus) - # (2) Distribute extra slack as evenly as possible - to_begin_edge = _constrained_length(extra_slack / 2) - taus[0] += to_begin_edge - taus[-1] += extra_slack - to_begin_edge + # (2) Distribute extra slack + if self._extra_slack_distribution == "middle": + mid_ind = int((len(taus) - 1) / 2) + taus[mid_ind] += extra_slack + elif self._extra_slack_distribution == "split_edges": + to_begin_edge = _constrained_length(extra_slack / 2) + taus[0] += to_begin_edge + taus[-1] += extra_slack - to_begin_edge + else: + raise TranspilerError( + f"Option extra_slack_distribution = {self._extra_slack_distribution} is invalid." + ) # (3) Construct DD sequence with delays num_elements = max(len(self._dd_sequence), len(taus)) diff --git a/releasenotes/notes/dynamical-decoupling-with-alignment-9c1e5ee909eab0f7.yaml b/releasenotes/notes/dynamical-decoupling-with-alignment-9c1e5ee909eab0f7.yaml index 262e11e8edfb..0cc109781f02 100644 --- a/releasenotes/notes/dynamical-decoupling-with-alignment-9c1e5ee909eab0f7.yaml +++ b/releasenotes/notes/dynamical-decoupling-with-alignment-9c1e5ee909eab0f7.yaml @@ -8,10 +8,14 @@ upgrade: executed on hardware with the constraint. This value is usually found in ``backend.configuration().timing_constraints``. - | - Spacing strategy of :class:`DynamicalDecoupling` has been upgraded to - evenly split the extra slack, i.e. residual delay coming from rounding or alignment, - to the beginning and end of the dynamical decoupling sequence, + ``extra_slack_distribution`` option has been added to :class:`DynamicalDecoupling`. + This options controls how to distribute the extra slack when the duration of the + created dynamical decoupling sequence is shorter than the idle time of your circuit + that you want to fill with the sequence. This defaults to ``middle`` which is + identical to conventional behavior. The new strategy ``split_edges`` + evenly divide the extra slack into the beginning and end of the sequence, rather than adding it to the interval in the middle of the sequence. + This might result in better noise cancellation especially when ``pulse_alignment`` > 1. - | :class:`DynamicalDecoupling` has been upgraded to be a subclass of :class:`BasePadding`. This means the dynamical decoupling pass is diff --git a/test/python/transpiler/test_dynamical_decoupling.py b/test/python/transpiler/test_dynamical_decoupling.py index d5af193ef67f..2c0a6905192d 100644 --- a/test/python/transpiler/test_dynamical_decoupling.py +++ b/test/python/transpiler/test_dynamical_decoupling.py @@ -197,9 +197,9 @@ def test_insert_dd_ghz_everywhere(self): ┌─────┴───┴─────┐ ┌─┴─┐└────────────────┘└───┘└────────────────┘└───┘» q_1: ┤ Delay(50[dt]) ├─┤ X ├───────────────────────────────────────────■──» ├───────────────┴┐├───┤┌────────────────┐┌───┐┌────────────────┐┌─┴─┐» - q_2: ┤ Delay(162[dt]) ├┤ Y ├┤ Delay(325[dt]) ├┤ Y ├┤ Delay(163[dt]) ├┤ X ├» + q_2: ┤ Delay(162[dt]) ├┤ Y ├┤ Delay(326[dt]) ├┤ Y ├┤ Delay(162[dt]) ├┤ X ├» ├────────────────┤├───┤├────────────────┤├───┤├────────────────┤└───┘» - q_3: ┤ Delay(212[dt]) ├┤ Y ├┤ Delay(425[dt]) ├┤ Y ├┤ Delay(213[dt]) ├─────» + q_3: ┤ Delay(212[dt]) ├┤ Y ├┤ Delay(426[dt]) ├┤ Y ├┤ Delay(212[dt]) ├─────» └────────────────┘└───┘└────────────────┘└───┘└────────────────┘ » « ┌────────────────┐ «q_0: ┤ Delay(100[dt]) ├───────────────────────────────────────────── @@ -224,15 +224,15 @@ def test_insert_dd_ghz_everywhere(self): expected = self.ghz4.copy() expected = expected.compose(Delay(50), [1], front=True) - expected = expected.compose(Delay(163), [2], front=True) + expected = expected.compose(Delay(162), [2], front=True) expected = expected.compose(YGate(), [2], front=True) - expected = expected.compose(Delay(325), [2], front=True) + expected = expected.compose(Delay(326), [2], front=True) expected = expected.compose(YGate(), [2], front=True) expected = expected.compose(Delay(162), [2], front=True) - expected = expected.compose(Delay(213), [3], front=True) + expected = expected.compose(Delay(212), [3], front=True) expected = expected.compose(YGate(), [3], front=True) - expected = expected.compose(Delay(425), [3], front=True) + expected = expected.compose(Delay(426), [3], front=True) expected = expected.compose(YGate(), [3], front=True) expected = expected.compose(Delay(212), [3], front=True) @@ -263,18 +263,18 @@ def test_insert_dd_ghz_xy4(self): q_3: ┤ Delay(950[dt]) ├────────────────────────────┤ X ├───────────────────────» └────────────────┘ └───┘ » « ┌───┐ ┌───────────────┐ ┌───┐ ┌───────────────┐» - «q_0: ──────┤ Y ├──────┤ Delay(75[dt]) ├──────┤ X ├──────┤ Delay(75[dt]) ├» + «q_0: ──────┤ Y ├──────┤ Delay(76[dt]) ├──────┤ X ├──────┤ Delay(75[dt]) ├» « ┌─────┴───┴─────┐└─────┬───┬─────┘┌─────┴───┴─────┐└─────┬───┬─────┘» - «q_1: ┤ Delay(25[dt]) ├──────┤ Y ├──────┤ Delay(25[dt]) ├──────┤ X ├──────» + «q_1: ┤ Delay(25[dt]) ├──────┤ Y ├──────┤ Delay(26[dt]) ├──────┤ X ├──────» « └───────────────┘ └───┘ └───────────────┘ └───┘ » «q_2: ────────────────────────────────────────────────────────────────────» « » «q_3: ────────────────────────────────────────────────────────────────────» « » « ┌───┐ ┌───────────────┐ - «q_0: ──────┤ Y ├──────┤ Delay(38[dt]) ├───────────────── + «q_0: ──────┤ Y ├──────┤ Delay(37[dt]) ├───────────────── « ┌─────┴───┴─────┐└─────┬───┬─────┘┌───────────────┐ - «q_1: ┤ Delay(25[dt]) ├──────┤ Y ├──────┤ Delay(13[dt]) ├ + «q_1: ┤ Delay(25[dt]) ├──────┤ Y ├──────┤ Delay(12[dt]) ├ « └───────────────┘ └───┘ └───────────────┘ «q_2: ─────────────────────────────────────────────────── « @@ -296,21 +296,21 @@ def test_insert_dd_ghz_xy4(self): expected = expected.compose(XGate(), [0]) expected = expected.compose(Delay(75), [0]) expected = expected.compose(YGate(), [0]) - expected = expected.compose(Delay(75), [0]) + expected = expected.compose(Delay(76), [0]) expected = expected.compose(XGate(), [0]) expected = expected.compose(Delay(75), [0]) expected = expected.compose(YGate(), [0]) - expected = expected.compose(Delay(38), [0]) + expected = expected.compose(Delay(37), [0]) expected = expected.compose(Delay(12), [1]) expected = expected.compose(XGate(), [1]) expected = expected.compose(Delay(25), [1]) expected = expected.compose(YGate(), [1]) - expected = expected.compose(Delay(25), [1]) + expected = expected.compose(Delay(26), [1]) expected = expected.compose(XGate(), [1]) expected = expected.compose(Delay(25), [1]) expected = expected.compose(YGate(), [1]) - expected = expected.compose(Delay(13), [1]) + expected = expected.compose(Delay(12), [1]) self.assertEqual(ghz4_dd, expected) @@ -424,7 +424,7 @@ def test_insert_ghz_uhrig(self): Physical Review Letters 98.10 (2007): 100504. ┌───┐ ┌──────────────┐ ┌───┐ ┌──────────────┐┌───┐» - q_0: ──────┤ H ├─────────■──┤ Delay(4[dt]) ├──────┤ X ├───────┤ Delay(8[dt]) ├┤ X ├» + q_0: ──────┤ H ├─────────■──┤ Delay(3[dt]) ├──────┤ X ├───────┤ Delay(8[dt]) ├┤ X ├» ┌─────┴───┴─────┐ ┌─┴─┐└──────────────┘┌─────┴───┴──────┐└──────────────┘└───┘» q_1: ┤ Delay(50[dt]) ├─┤ X ├───────■────────┤ Delay(300[dt]) ├─────────────────────» ├───────────────┴┐└───┘ ┌─┴─┐ └────────────────┘ » @@ -433,7 +433,7 @@ def test_insert_ghz_uhrig(self): q_3: ┤ Delay(950[dt]) ├───────────────────────────┤ X ├────────────────────────────» └────────────────┘ └───┘ » « ┌───────────────┐┌───┐┌───────────────┐┌───┐┌───────────────┐┌───┐┌───────────────┐» - «q_0: ┤ Delay(13[dt]) ├┤ X ├┤ Delay(16[dt]) ├┤ X ├┤ Delay(17[dt]) ├┤ X ├┤ Delay(16[dt]) ├» + «q_0: ┤ Delay(13[dt]) ├┤ X ├┤ Delay(16[dt]) ├┤ X ├┤ Delay(20[dt]) ├┤ X ├┤ Delay(16[dt]) ├» « └───────────────┘└───┘└───────────────┘└───┘└───────────────┘└───┘└───────────────┘» «q_1: ───────────────────────────────────────────────────────────────────────────────────» « » @@ -442,7 +442,7 @@ def test_insert_ghz_uhrig(self): «q_3: ───────────────────────────────────────────────────────────────────────────────────» « » « ┌───┐┌───────────────┐┌───┐┌──────────────┐┌───┐┌──────────────┐ - «q_0: ┤ X ├┤ Delay(13[dt]) ├┤ X ├┤ Delay(8[dt]) ├┤ X ├┤ Delay(5[dt]) ├ + «q_0: ┤ X ├┤ Delay(13[dt]) ├┤ X ├┤ Delay(8[dt]) ├┤ X ├┤ Delay(3[dt]) ├ « └───┘└───────────────┘└───┘└──────────────┘└───┘└──────────────┘ «q_1: ──────────────────────────────────────────────────────────────── « @@ -478,7 +478,7 @@ def uhrig(k): expected = expected.compose(Delay(750), [2], front=True) expected = expected.compose(Delay(950), [3], front=True) - expected = expected.compose(Delay(4), [0]) + expected = expected.compose(Delay(3), [0]) expected = expected.compose(XGate(), [0]) expected = expected.compose(Delay(8), [0]) expected = expected.compose(XGate(), [0]) @@ -486,7 +486,7 @@ def uhrig(k): expected = expected.compose(XGate(), [0]) expected = expected.compose(Delay(16), [0]) expected = expected.compose(XGate(), [0]) - expected = expected.compose(Delay(17), [0]) + expected = expected.compose(Delay(20), [0]) expected = expected.compose(XGate(), [0]) expected = expected.compose(Delay(16), [0]) expected = expected.compose(XGate(), [0]) @@ -494,7 +494,7 @@ def uhrig(k): expected = expected.compose(XGate(), [0]) expected = expected.compose(Delay(8), [0]) expected = expected.compose(XGate(), [0]) - expected = expected.compose(Delay(5), [0]) + expected = expected.compose(Delay(3), [0]) expected = expected.compose(Delay(300), [1]) @@ -657,7 +657,12 @@ def test_insert_dd_ghz_xy4_with_alignment(self): pm = PassManager( [ ALAPSchedule(self.durations), - DynamicalDecoupling(self.durations, dd_sequence, pulse_alignment=10), + DynamicalDecoupling( + self.durations, + dd_sequence, + pulse_alignment=10, + extra_slack_distribution="split_edges", + ), ] ) From 2dfbc2c6cc41ec2c4f5f02af05fb99dace90eceb Mon Sep 17 00:00:00 2001 From: knzwnao Date: Sun, 13 Mar 2022 11:57:31 +0900 Subject: [PATCH 10/11] more robust extra slack control --- .../transpiler/passes/scheduling/dynamical_decoupling.py | 8 +++++++- 1 file changed, 7 insertions(+), 1 deletion(-) diff --git a/qiskit/transpiler/passes/scheduling/dynamical_decoupling.py b/qiskit/transpiler/passes/scheduling/dynamical_decoupling.py index ad09eb25f19b..cf770099d7e0 100644 --- a/qiskit/transpiler/passes/scheduling/dynamical_decoupling.py +++ b/qiskit/transpiler/passes/scheduling/dynamical_decoupling.py @@ -315,7 +315,13 @@ def _constrained_length(values): # (2) Distribute extra slack if self._extra_slack_distribution == "middle": mid_ind = int((len(taus) - 1) / 2) - taus[mid_ind] += extra_slack + to_middle = _constrained_length(extra_slack) + taus[mid_ind] += to_middle + if extra_slack - to_middle: + # If to_middle is not a multiple value of the pulse alignment, + # it is truncated to the nearlest multiple value and + # the rest of slack is added to the end. + taus[-1] += extra_slack - to_middle elif self._extra_slack_distribution == "split_edges": to_begin_edge = _constrained_length(extra_slack / 2) taus[0] += to_begin_edge From 997049f8a4088107bd0f61ca52f1711435248273 Mon Sep 17 00:00:00 2001 From: Naoki Kanazawa Date: Tue, 15 Mar 2022 01:32:46 +0900 Subject: [PATCH 11/11] wording edits Co-authored-by: Ali Javadi-Abhari --- .../passes/scheduling/dynamical_decoupling.py | 13 +++++++------ test/python/transpiler/test_dynamical_decoupling.py | 2 +- 2 files changed, 8 insertions(+), 7 deletions(-) diff --git a/qiskit/transpiler/passes/scheduling/dynamical_decoupling.py b/qiskit/transpiler/passes/scheduling/dynamical_decoupling.py index cf770099d7e0..d7425abb3bed 100644 --- a/qiskit/transpiler/passes/scheduling/dynamical_decoupling.py +++ b/qiskit/transpiler/passes/scheduling/dynamical_decoupling.py @@ -133,14 +133,15 @@ def __init__( extra_slack_distribution: The option to control the behavior of DD sequence generation. The duration of the DD sequence should be identical to an idle time in the scheduled quantum circuit, however, the delay in between gates comprising the sequence - should be integer number in units of dt, and it might be furter truncated + should be integer number in units of dt, and it might be further truncated when ``pulse_alignment`` is specified. This sometimes results in the duration of - created sequence is shorter than the idle time that you want to fill with the sequence, - i.e. `extra slack`. This option takes following values. + the created sequence being shorter than the idle time + that you want to fill with the sequence, i.e. `extra slack`. + This option takes following values. - "middle": Put the extra slack to the interval at the middle of the sequence. - - "split_edges": Divide the extra slack as evenly as possible into - intervals at begging and end of the sequence. + - "edges": Divide the extra slack as evenly as possible into + intervals at beginning and end of the sequence. Raises: TranspilerError: When invalid DD sequence is specified. @@ -322,7 +323,7 @@ def _constrained_length(values): # it is truncated to the nearlest multiple value and # the rest of slack is added to the end. taus[-1] += extra_slack - to_middle - elif self._extra_slack_distribution == "split_edges": + elif self._extra_slack_distribution == "edges": to_begin_edge = _constrained_length(extra_slack / 2) taus[0] += to_begin_edge taus[-1] += extra_slack - to_begin_edge diff --git a/test/python/transpiler/test_dynamical_decoupling.py b/test/python/transpiler/test_dynamical_decoupling.py index 2c0a6905192d..5a4d3435d213 100644 --- a/test/python/transpiler/test_dynamical_decoupling.py +++ b/test/python/transpiler/test_dynamical_decoupling.py @@ -661,7 +661,7 @@ def test_insert_dd_ghz_xy4_with_alignment(self): self.durations, dd_sequence, pulse_alignment=10, - extra_slack_distribution="split_edges", + extra_slack_distribution="edges", ), ] )