From 789047363e09eb64857b19fbcfcc003d8afaffa2 Mon Sep 17 00:00:00 2001 From: Kevin Krsulich Date: Thu, 18 Mar 2021 15:13:17 -0400 Subject: [PATCH] Fix for AncillaQubits added via .add_bits to be included in .qubits. --- qiskit/circuit/quantumcircuit.py | 3 ++- test/python/circuit/test_registerless_circuit.py | 12 +++++++++++- 2 files changed, 13 insertions(+), 2 deletions(-) diff --git a/qiskit/circuit/quantumcircuit.py b/qiskit/circuit/quantumcircuit.py index 067aee030d5a..df79a028ba0b 100644 --- a/qiskit/circuit/quantumcircuit.py +++ b/qiskit/circuit/quantumcircuit.py @@ -1091,7 +1091,8 @@ def add_bits(self, bits): for bit in bits: if isinstance(bit, AncillaQubit): self._ancillas.append(bit) - elif isinstance(bit, Qubit): + + if isinstance(bit, Qubit): self._qubits.append(bit) self._qubit_set.add(bit) elif isinstance(bit, Clbit): diff --git a/test/python/circuit/test_registerless_circuit.py b/test/python/circuit/test_registerless_circuit.py index 624eb657a99a..d14b972a0fb4 100644 --- a/test/python/circuit/test_registerless_circuit.py +++ b/test/python/circuit/test_registerless_circuit.py @@ -55,7 +55,7 @@ def test_circuit_constructor_on_bits(self): qc = QuantumCircuit(qubits, clbits, ancillas) - self.assertEqual(qc.qubits, qubits) + self.assertEqual(qc.qubits, qubits + ancillas) self.assertEqual(qc.clbits, clbits) self.assertEqual(qc.ancillas, ancillas) @@ -98,6 +98,16 @@ def test_addding_individual_bit(self): self.assertEqual(qc.qubits, list(qr) + [new_bit]) self.assertEqual(qc.qregs, [qr]) + def test_inserted_ancilla_bits_are_added_to_qubits(self): + """Verify AncillaQubits added via .add_bits are added to .qubits.""" + anc = AncillaQubit() + qb = Qubit() + + qc = QuantumCircuit() + qc.add_bits([anc, qb]) + + self.assertEqual(qc.qubits, [anc, qb]) + class TestGatesOnWires(QiskitTestCase): """Test gates on wires."""