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de10_fan_hw.tcl
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de10_fan_hw.tcl
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# TCL File Generated by Component Editor 19.2
# Thu Feb 20 17:04:34 GMT 2020
# DO NOT MODIFY
#
# de10_fan "de10_fan" v1.0
# 2020.02.20.17:04:34
#
#
#
# request TCL package from ACDS 19.4
#
package require -exact qsys 19.4
#
# module de10_fan
#
set_module_property DESCRIPTION ""
set_module_property NAME de10_fan
set_module_property VERSION 1.0
set_module_property INTERNAL false
set_module_property OPAQUE_ADDRESS_MAP true
set_module_property AUTHOR ""
set_module_property DISPLAY_NAME de10_fan
set_module_property INSTANTIATE_IN_SYSTEM_MODULE true
set_module_property EDITABLE true
set_module_property REPORT_TO_TALKBACK false
set_module_property ALLOW_GREYBOX_GENERATION false
set_module_property REPORT_HIERARCHY false
set_module_property LOAD_ELABORATION_LIMIT 0
#
# file sets
#
add_fileset QUARTUS_SYNTH QUARTUS_SYNTH "" ""
set_fileset_property QUARTUS_SYNTH TOP_LEVEL mkDE10FanControl
set_fileset_property QUARTUS_SYNTH ENABLE_RELATIVE_INCLUDE_PATHS false
set_fileset_property QUARTUS_SYNTH ENABLE_FILE_OVERWRITE_MODE false
add_fileset_file mkDE10FanControl.v VERILOG PATH mkDE10FanControl.v TOP_LEVEL_FILE
#
# parameters
#
#
# display items
#
#
# connection point clock
#
add_interface clock clock end
set_interface_property clock ENABLED true
set_interface_property clock EXPORT_OF ""
set_interface_property clock PORT_NAME_MAP ""
set_interface_property clock CMSIS_SVD_VARIABLES ""
set_interface_property clock SVD_ADDRESS_GROUP ""
set_interface_property clock IPXACT_REGISTER_MAP_VARIABLES ""
add_interface_port clock CLK clk Input 1
#
# connection point reset_sink
#
add_interface reset_sink reset end
set_interface_property reset_sink associatedClock clock
set_interface_property reset_sink synchronousEdges DEASSERT
set_interface_property reset_sink ENABLED true
set_interface_property reset_sink EXPORT_OF ""
set_interface_property reset_sink PORT_NAME_MAP ""
set_interface_property reset_sink CMSIS_SVD_VARIABLES ""
set_interface_property reset_sink SVD_ADDRESS_GROUP ""
set_interface_property reset_sink IPXACT_REGISTER_MAP_VARIABLES ""
add_interface_port reset_sink RST_N reset_n Input 1
#
# connection point FAN_I2C
#
add_interface FAN_I2C conduit end
set_interface_property FAN_I2C associatedClock clock
set_interface_property FAN_I2C associatedReset reset_source
set_interface_property FAN_I2C ENABLED true
set_interface_property FAN_I2C EXPORT_OF ""
set_interface_property FAN_I2C PORT_NAME_MAP ""
set_interface_property FAN_I2C CMSIS_SVD_VARIABLES ""
set_interface_property FAN_I2C SVD_ADDRESS_GROUP ""
set_interface_property FAN_I2C IPXACT_REGISTER_MAP_VARIABLES ""
add_interface_port FAN_I2C FAN_I2C_SDA sda Bidir 1
add_interface_port FAN_I2C FAN_I2C_SCL scl Bidir 1
#
# connection point TEMP_I2C
#
add_interface TEMP_I2C conduit end
set_interface_property TEMP_I2C associatedClock clock
set_interface_property TEMP_I2C associatedReset reset_source
set_interface_property TEMP_I2C ENABLED true
set_interface_property TEMP_I2C EXPORT_OF ""
set_interface_property TEMP_I2C PORT_NAME_MAP ""
set_interface_property TEMP_I2C CMSIS_SVD_VARIABLES ""
set_interface_property TEMP_I2C SVD_ADDRESS_GROUP ""
set_interface_property TEMP_I2C IPXACT_REGISTER_MAP_VARIABLES ""
add_interface_port TEMP_I2C TEMP_I2C_SDA sda Bidir 1
add_interface_port TEMP_I2C TEMP_I2C_SCL scl Bidir 1
#
# connection point LED
#
add_interface LED conduit end
set_interface_property LED associatedClock clock
set_interface_property LED associatedReset reset_source
set_interface_property LED ENABLED true
set_interface_property LED EXPORT_OF ""
set_interface_property LED PORT_NAME_MAP ""
set_interface_property LED CMSIS_SVD_VARIABLES ""
set_interface_property LED SVD_ADDRESS_GROUP ""
set_interface_property LED IPXACT_REGISTER_MAP_VARIABLES ""
add_interface_port LED leds led Output 4
#
# connection point temp
#
add_interface temp conduit end
set_interface_property temp associatedClock clock
set_interface_property temp associatedReset reset_source
set_interface_property temp ENABLED true
set_interface_property temp EXPORT_OF ""
set_interface_property temp PORT_NAME_MAP ""
set_interface_property temp CMSIS_SVD_VARIABLES ""
set_interface_property temp SVD_ADDRESS_GROUP ""
set_interface_property temp IPXACT_REGISTER_MAP_VARIABLES ""
add_interface_port temp get_temp export Output 8
#
# connection point target_rps
#
add_interface target_rps conduit end
set_interface_property target_rps associatedClock clock
set_interface_property target_rps associatedReset reset_source
set_interface_property target_rps ENABLED true
set_interface_property target_rps EXPORT_OF ""
set_interface_property target_rps PORT_NAME_MAP ""
set_interface_property target_rps CMSIS_SVD_VARIABLES ""
set_interface_property target_rps SVD_ADDRESS_GROUP ""
set_interface_property target_rps IPXACT_REGISTER_MAP_VARIABLES ""
add_interface_port target_rps target_speed export Output 8
#
# connection point reset_source
#
add_interface reset_source reset start
set_interface_property reset_source associatedClock clock
set_interface_property reset_source associatedDirectReset reset_sink
set_interface_property reset_source associatedResetSinks reset_sink
set_interface_property reset_source synchronousEdges DEASSERT
set_interface_property reset_source ENABLED true
set_interface_property reset_source EXPORT_OF ""
set_interface_property reset_source PORT_NAME_MAP ""
set_interface_property reset_source CMSIS_SVD_VARIABLES ""
set_interface_property reset_source SVD_ADDRESS_GROUP ""
set_interface_property reset_source IPXACT_REGISTER_MAP_VARIABLES ""
add_interface_port reset_source RST_N_inner_rst reset_n Output 1