diff --git a/.claude/skills/ad-sharding-ir-port/SKILL.md b/.claude/skills/ad-sharding-ir-port/SKILL.md index a2d0d2df59ec..3437555a85f8 100644 --- a/.claude/skills/ad-sharding-ir-port/SKILL.md +++ b/.claude/skills/ad-sharding-ir-port/SKILL.md @@ -35,8 +35,9 @@ You MAY introduce ONLY the following changes: - `torch.split(...)` / `torch.split_with_sizes(...)` → `torch.ops.auto_deploy.split_with_sizes(...)` - **A2. Sharding-hint kwargs added** to call sites of: `torch_moe`, `torch_ssm`, `torch_gated_delta_rule`, `torch_causal_conv1d`, `torch_rmsnorm_gated`, `torch_mla`, `torch_linear_simple`, `auto_deploy.split_with_sizes`, `auto_deploy.view`. Allowed kwargs: `tp_mode`, `layer_type`, `output_sizes`, `tp_min_local_shape`, `tp_scaled_dim`, `shardable`, `enable_sharding`. - **A3. Inserting `torch.ops.auto_deploy.all_reduce(..., layer_type=...)`** after rowwise projections / at MoE merge points (single all_reduce after routed + shared sums). -- **A4. Adding `import tensorrt_llm._torch.auto_deploy.custom_ops # noqa: F401`** side-effect import at the top if not already present. -- **A5. The module docstring update** describing the sharding strategy. +- **A4. Docstring updates:** + - Module-level: a single-line header noting the file uses sharding IR, followed by the existing source-of-truth / HF link block. Example: `"""Llama 3 model (sharding IR)."""`. + - Per-class (MLP, Attention, MoE block, etc.): a short `Sharding strategy:` block listing what each projection maps to (`colwise` / `rowwise` / `all_reduce` / `tp_scaled_dim`). **FORBIDDEN (everything else, including but not limited to):** @@ -71,45 +72,35 @@ Before editing, ensure the file is committed so you can diff against the origina git stash # or commit — ensure a clean baseline to diff against ``` -### Step 2: Add the custom_ops side-effect import - -If not already present at the top of the file: - -```python -import tensorrt_llm._torch.auto_deploy.custom_ops # noqa: F401 -- register all ops -``` - -Do **not** add global `SHARD_*` flags. Layer-level control uses the `layer_type` hint on each op and `shard_layers` in YAML. - -### Step 3: Replace linear projections +### Step 2: Replace linear projections For every `self.proj(x)` or `nn.Linear` call, use `torch.ops.auto_deploy.torch_linear_simple` with explicit `tp_mode` and `layer_type`. Always set `tp_mode` unconditionally (no `if _s else "none"`). **Rules:** opening projections (Q/K/V/gate/up/in_proj) → `"colwise"`; closing (O/down/out_proj) → `"rowwise"`; tiny outputs (e.g. `shared_expert_gate` dim 1) → `"none"`; MLA latent projections (q_a, kv_a) → `"none"`. For fused weights split later, pass `output_sizes=[...]`. For GQA, use `tp_min_local_shape=self.head_dim` on K/V colwise lines. -### Step 4: Replace split / chunk after fused colwise projections +### Step 3: Replace split / chunk after fused colwise projections Use `torch.ops.auto_deploy.split_with_sizes` with `shardable` / `layer_type` where sizes scale with TP. -### Step 5: Replace view / reshape with concrete head counts +### Step 4: Replace view / reshape with concrete head counts During `torch.export`, `-1` becomes concrete; after TP, wrong values break. Any reshape whose dimension is a head count that scales with TP must use `torch.ops.auto_deploy.view` with `tp_scaled_dim` set appropriately. Safe cases: flat-to-2D, or `[B,S,-1]` when the input is already correctly sharded. -### Step 6: Insert `all_reduce` +### Step 5: Insert `all_reduce` After every rowwise projection, add `torch.ops.auto_deploy.all_reduce(..., layer_type=...)`. **Parallel branch rule:** when branches merge by addition, use a **single** `all_reduce` after the sum (e.g. MoE routed + shared expert; parallel attention + MLP residual branches). -### Step 7: Special ops (Conv1d, SSM, GatedDeltaNet, gated RMSNorm) +### Step 6: Special ops (Conv1d, SSM, GatedDeltaNet, gated RMSNorm) Add sharding hints on `torch_causal_conv1d`, `torch_ssm`, `torch_gated_delta_rule`, `torch_rmsnorm_gated` per docstrings—typically `shardable` / `output_sizes` / `tp_mode` as required. -### Step 8: MoE +### Step 7: MoE Pass `layer_type="moe"` into `torch_moe`; `apply_sharding_hints` handles EP/TP. -### Step 9: Verify registration +### Step 8: Verify registration The model's existing registration (`AutoModelForCausalLMFactory.register_custom_model_cls` at the bottom of the file and its import in `__init__.py`) stays unchanged. No new registration is needed — sharding hints do not change the model identity. -### Step 10: YAML — enable hint-driven sharding +### Step 9: YAML — enable hint-driven sharding Add `enable_sharder_ir.yaml` to the model's `yaml_extra` list in `examples/auto_deploy/model_registry/models.yaml` (if not already present). This composable fragment disables legacy sharding passes and enables `apply_sharding_hints`. Registry fragments are deep-merged in `yaml_extra` order (see `DynamicYamlMixInForSettings` in `tensorrt_llm/_torch/auto_deploy/utils/_config.py`). @@ -136,11 +127,11 @@ transforms: enabled: true ``` -Set `world_size` once, to the **maximum number of GPUs available on the machine**, auto-detected with `python -c 'import torch; print(torch.cuda.device_count())'` (or `nvidia-smi --list-gpus | wc -l`). Do **not** hardcode `world_size: 8` (or any other literal) — porting agents run on heterogeneous hardware and an 8-GPU literal will simply fail to launch on a 2- or 4-GPU machine. If the model's `num_attention_heads` (and, for GQA, `num_key_value_heads`) does not divide the detected GPU count, fall back to the largest power-of-two divisor that does (e.g. 4 on an 8-GPU machine if `num_attention_heads = 12`). Run the end-to-end command exactly once at that size — there is no value in repeating it at multiple smaller sizes, because the offline sharding equivalence test (Step 11b) already exercises 2- and 4-GPU dist configs cheaply. +Set `world_size` once, to the **maximum number of GPUs available on the machine**, auto-detected with `python -c 'import torch; print(torch.cuda.device_count())'` (or `nvidia-smi --list-gpus | wc -l`). Do **not** hardcode `world_size: 8` (or any other literal) — porting agents run on heterogeneous hardware and an 8-GPU literal will simply fail to launch on a 2- or 4-GPU machine. If the model's `num_attention_heads` (and, for GQA, `num_key_value_heads`) does not divide the detected GPU count, fall back to the largest power-of-two divisor that does (e.g. 4 on an 8-GPU machine if `num_attention_heads = 12`). Run the end-to-end command exactly once at that size — there is no value in repeating it at multiple smaller sizes, because the offline sharding equivalence test (Step 10b) already exercises 2- and 4-GPU dist configs cheaply. Optional `shard_layers` limits which `layer_type` hints are processed; unset means shard all shardable nodes. -### Step 11a — End-to-end run +### Step 10a — End-to-end run Do not report success until a run completes successfully. @@ -151,7 +142,7 @@ Do not report success until a run completes successfully. **Layer type strings** (for `layer_type` / `shard_layers`): use `"mha"`, `"mla"`, `"mlp"`, `"moe"`, `"ssm"`, `"delta"`, or `"unknown"` (default; skipped when `shard_layers` is set). Match the conventions used in `apply_sharding_hints` and project enums. -### Step 11b — Sharding equivalence test (MANDATORY) +### Step 10b — Sharding equivalence test (MANDATORY) Run the offline sharding-IR equivalence test ([`tests/unittest/auto_deploy/multigpu/transformations/library/test_sharding_ir_equivalence.py`](tests/unittest/auto_deploy/multigpu/transformations/library/test_sharding_ir_equivalence.py)) against the modeling file you just edited, under **every** parallelism configuration the test exposes. The port is **not** complete until every configuration passes. Skipping this step or treating a partial pass (e.g. only `tep`) as success is not allowed. @@ -191,10 +182,10 @@ done **Failure handling:** - A cell failing with `KeyError`, `AttributeError`, `ValueError: You must specify exactly one of input_ids or inputs_embeds`, or any exception *before* `[sharding-ir-eq]` prints means the **modeling code itself** does not yet build / export on a tiny config — fix the modeling code (within the Step 0 allowlist) before proceeding. Do not silently skip the cell. -- A cell where `[sharding-ir-eq]` prints `rel_rmse >= tol` (from the same log line) means a **sharding-hint bug**: a missing `all_reduce`, a wrong `tp_mode`, a `view` without `tp_scaled_dim`, a `split_with_sizes` whose sizes do not scale, etc. Re-read Step 6 (all_reduce), Step 3 (tp_mode), Step 5 (view), Step 4 (split_with_sizes) and the layer-specific patterns. Iterate on the hints until clean. If the failure is small (rel_rmse just slightly above tol) and you have reason to believe it is real numerical noise from the specific layer mix of this model rather than a sharding-hint bug, raise it with the parent agent rather than silently bumping `SHARDING_IR_REL_RMSE_TOL`. +- A cell where `[sharding-ir-eq]` prints `rel_rmse >= tol` (from the same log line) means a **sharding-hint bug**: a missing `all_reduce`, a wrong `tp_mode`, a `view` without `tp_scaled_dim`, a `split_with_sizes` whose sizes do not scale, etc. Re-read Step 5 (all_reduce), Step 2 (tp_mode), Step 4 (view), Step 3 (split_with_sizes) and the layer-specific patterns. Iterate on the hints until clean. If the failure is small (rel_rmse just slightly above tol) and you have reason to believe it is real numerical noise from the specific layer mix of this model rather than a sharding-hint bug, raise it with the parent agent rather than silently bumping `SHARDING_IR_REL_RMSE_TOL`. - A cell that the modeling file legitimately does not support (e.g. `ep-only` on a dense model with no MoE) is acceptable only if the failure is a documented `pytest.skip(...)` from the test infrastructure. A silent `FAIL` is **not** acceptable. -### Step 12 — Pre-finalization self-audit (MANDATORY) +### Step 11 — Pre-finalization self-audit (MANDATORY) Before reporting the file as done, you MUST diff your changes against the git baseline: @@ -209,8 +200,7 @@ Then classify every hunk into one of the following categories (defined in Step 0 | **A1** | yes | Op substitution (`linear` / `view` / `split`) | | **A2** | yes | Sharding-hint kwarg added (`tp_mode`, `layer_type`, `output_sizes`, `tp_min_local_shape`, `tp_scaled_dim`, `shardable`, `enable_sharding`) | | **A3** | yes | `auto_deploy.all_reduce` insertion | -| **A4** | yes | `custom_ops` side-effect import added | -| **A5** | yes | Module docstring update describing sharding strategy | +| **A4** | yes | Docstring updates: one-line module header + per-class `Sharding strategy:` blocks | | **F1** | NO | `torch.ops.trtllm.*` replaced with vanilla PyTorch | | **F2** | NO | Input contract change (asserts, fallbacks added/removed) | | **F3** | NO | Module hierarchy / parameter / buffer / load-hook change | @@ -261,8 +251,8 @@ You are NOT done until every row in the table is a yes-allowed category. ## Validation checklist (human review) -- All four configurations of the **sharding equivalence test** (Step 11b) pass with the parsed `rel_rmse` strictly below the parsed `tol` from the same rank-0 log line. Report the per-cell `rel_rmse` and `tol` pair. +- All four configurations of the **sharding equivalence test** (Step 10b) pass with the parsed `rel_rmse` strictly below the parsed `tol` from the same rank-0 log line. Report the per-cell `rel_rmse` and `tol` pair. - `world_size=1`: unsharded path; hints should not break correctness. -- `world_size=`: end-to-end run (Step 11a) at the maximum GPU count auto-detected on the machine (head-divisibility permitting; see Step 11). +- `world_size=`: end-to-end run (Step 10a) at the maximum GPU count auto-detected on the machine (head-divisibility permitting; see Step 10). - `apply_sharding_hints` node count vs expectation. - Optional: `shard_layers: ['moe']` to verify selective sharding. diff --git a/.claude/skills/trtllm-model-onboard-multimodal/SKILL.md b/.claude/skills/trtllm-model-onboard-multimodal/SKILL.md index 6cbf73dad66a..bef01b2e670b 100644 --- a/.claude/skills/trtllm-model-onboard-multimodal/SKILL.md +++ b/.claude/skills/trtllm-model-onboard-multimodal/SKILL.md @@ -83,7 +83,7 @@ metadata: When `@support_multimodal_disaggregated` is set and the deployment uses `TLLM_MULTIMODAL_DISAGGREGATED=1`: - **Encoder worker:** runs as a standalone `MultimodalEncoder` (`mm_encoder_only=True`). It executes only the multimodal encoder and ships `mm_embeddings` (+ mRoPE position ids/deltas) to prefill+decode workers as shared-tensor handles. -- **Prefill+decode worker:** the model's `__init__` skips constructing `self.mm_encoder` when `_is_disagg()` is true; the input processor's `_attach_multimodal_embeddings_impl()` override binds the encoder handles into the request (the base `attach_multimodal_embeddings` wrapper detokenizes tokenized inputs for non-fast-path VLMs, then delegates to your impl). For context-only requests, the engine re-clones mrope tensors so IPC handles outlive the encoder worker's freed memory — replicate that pattern for any new GPU-resident mm tensors. +- **Prefill+decode worker:** the model's `__init__` skips constructing `self.mm_encoder` when `_is_mm_disagg()` is true; the input processor's `attach_multimodal_embeddings()` override binds the encoder handles into the request. For context-only requests, the engine re-clones mrope tensors so IPC handles outlive the encoder worker's freed memory — replicate that pattern for any new GPU-resident mm tensors. ### Templates to study @@ -229,7 +229,7 @@ class {Name}Model(PreTrainedModel): if hasattr(self, "llm"): return # idempotency guard — re-entry from `post_config` etc. - if not _is_disagg(): + if not _is_mm_disagg(): self.mm_encoder = {Name}VisionModel(model_config) else: self.mm_encoder = None @@ -269,7 +269,7 @@ class {Name}Model(PreTrainedModel): multimodal_params = kwargs.get("multimodal_params", []) mm_embeds = [] - if len(multimodal_params) > 0 and not _is_disagg(): + if len(multimodal_params) > 0 and not _is_mm_disagg(): mm_embeds = get_multimodal_embeddings( encoder_forward_fn=self.mm_encoder.forward, multimodal_params=multimodal_params[:num_context_requests], @@ -341,7 +341,7 @@ class {Name}Model(PreTrainedModel): ... ```python def load_weights(self, weights, weight_mapper): - if not _is_disagg(): + if not _is_mm_disagg(): self.mm_encoder.load_weights(weights) # Release mmap pages backing the encoder weights as soon as we're done. if hasattr(weights, "mark_consumed"): diff --git a/.github/CODEOWNERS b/.github/CODEOWNERS index eb248da25149..3e34cf383e49 100644 --- a/.github/CODEOWNERS +++ b/.github/CODEOWNERS @@ -45,8 +45,8 @@ ## TensorRT-LLM Pytorch - VisualGen /tensorrt_llm/_torch/visual_gen @NVIDIA/trt-llm-torch-visual-gen-devs -/tensorrt_llm/_torch/visual_gen/attention_backend @NVIDIA/trt-llm-torch-attention-devs -/tensorrt_llm/_torch/visual_gen/modules/attention.py @NVIDIA/trt-llm-torch-attention-devs +/tensorrt_llm/_torch/visual_gen/attention_backend @NVIDIA/trt-llm-torch-attention-devs @NVIDIA/trt-llm-torch-visual-gen-devs +/tensorrt_llm/_torch/visual_gen/modules/attention.py @NVIDIA/trt-llm-torch-attention-devs @NVIDIA/trt-llm-torch-visual-gen-devs /tensorrt_llm/visual_gen @NVIDIA/trt-llm-llmapi-devs /tests/integration/defs/examples/test_visual_gen.py @NVIDIA/trt-llm-torch-visual-gen-devs /tests/integration/defs/visual_gen @NVIDIA/trt-llm-torch-visual-gen-devs diff --git a/.github/workflows/blossom-ci.yml b/.github/workflows/blossom-ci.yml index 2f2b79f4ad45..3158cfbe0e15 100644 --- a/.github/workflows/blossom-ci.yml +++ b/.github/workflows/blossom-ci.yml @@ -58,6 +58,7 @@ jobs: "arekay", "arysef", "aswinvisva", + "athena-nv", "atrifex", "Autumn1998", "baize97", @@ -234,6 +235,7 @@ jobs: "nv-anants", "nv-guomingz", "nv-lschneider", + "nv-xtf", "nv-yilinf", "nv-yna", "nvamyt", @@ -267,6 +269,7 @@ jobs: "qsang-nv", "raayandhar", "rabiel", + "rahul-steiger-nv", "rakib-hasan", "RayenTian", "raymochen", @@ -310,6 +313,7 @@ jobs: "taylor-yb-lee", "tburt-nv", "tcherckez-nvidia", + "tedzhouhk", "tfogal", "thorjohnsen", "tianyuxbear", diff --git a/.gitignore b/.gitignore index 962f47d13419..8d39054480f5 100644 --- a/.gitignore +++ b/.gitignore @@ -65,6 +65,9 @@ tensorrt_llm/scripts docs/source/**/*.rst !docs/source/examples/index.rst !docs/source/_includes/note_sections.rst +!docs/source/features/auto_deploy/transforms.rst +!docs/source/features/auto_deploy/transforms/ +!docs/source/features/auto_deploy/transforms/*.rst *.swp .nfs* diff --git a/3rdparty/fetch_content.json b/3rdparty/fetch_content.json index e6218c2629c2..6a4679db5262 100644 --- a/3rdparty/fetch_content.json +++ b/3rdparty/fetch_content.json @@ -26,7 +26,8 @@ "display_name": "deep_ep", "git_repository": "${github_base_url}/deepseek-ai/DeepEP", "git_tag": "5be51b228a7c82dbdb213ea58e77bffd12b38af8", - "use_url": true + "use_url": true, + "patch_file": "patches/deep_ep_intranode_combine_fix.patch" }, { "name": "deepgemm", diff --git a/3rdparty/patches/deep_ep_intranode_combine_fix.patch b/3rdparty/patches/deep_ep_intranode_combine_fix.patch new file mode 100644 index 000000000000..fbed0107f81b --- /dev/null +++ b/3rdparty/patches/deep_ep_intranode_combine_fix.patch @@ -0,0 +1,35 @@ +--- a/csrc/kernels/intranode.cu ++++ b/csrc/kernels/intranode.cu +@@ -844,9 +844,15 @@ + + #ifndef DISABLE_SM90_FEATURES + // Wait TMA arrival ++ // hidden_int4 is not always divisible by a warp. The final tile can have ++ // only a subset of lanes active, so synchronize only participating lanes. ++ auto const tile_start = i - lane_id; ++ auto const active_lanes = min(32, hidden_int4 - tile_start); ++ auto const sync_mask = active_lanes == 32 ? 0xffffffffu : ((1u << active_lanes) - 1u); ++ + if (lane_id == 0) + tma_store_wait(); +- __syncwarp(); ++ __syncwarp(sync_mask); + + // Write into TMA buffer + auto tma_stage_idx = (i / 32) % kNumStages; +@@ -854,13 +860,13 @@ + + // Issue TMA + tma_store_fence(); +- __syncwarp(); ++ __syncwarp(sync_mask); + if (lane_id == 0) { + auto tma_bytes = min(32, hidden_int4 - i) * static_cast(sizeof(int4)); + tma_store_1d(reinterpret_cast(tma_buffer) + tma_stage_idx * 32, + recv_int4 + token_idx * hidden_int4 + i, tma_bytes, false); + } +- __syncwarp(); ++ __syncwarp(sync_mask); + #else + recv_int4[token_idx * hidden_int4 + i] = out_int4; + #endif diff --git a/cpp/include/tensorrt_llm/batch_manager/kvCacheManager.h b/cpp/include/tensorrt_llm/batch_manager/kvCacheManager.h index 514e6f6e9155..d3966adf2f20 100644 --- a/cpp/include/tensorrt_llm/batch_manager/kvCacheManager.h +++ b/cpp/include/tensorrt_llm/batch_manager/kvCacheManager.h @@ -2196,6 +2196,31 @@ class BaseKVCacheManager [[nodiscard]] virtual executor::RetentionPriority getPriorityByBlockId( KVCacheBlock::IdType blockId, SizeType32 windowSize) const = 0; + + //! @brief Commit and return the chain of stored block hashes for \p llmRequest's currently-full blocks. + //! @details For each block index `b` in `[0, numFullBlocks)`: + //! - if the block has already been marked full (`isFull() == true`), reuse its stored hash; + //! - otherwise, build the BlockKey from `llmRequest`'s tokens for block `b`, then call + //! `setBlockKey(blockKey, /*isFull=*/true)` and `setHash()` so the block holds the same + //! hash that storeBlocks would later compute. Hashes chain through `mPrevBlockInSeq`, + //! identical to `BlockKeyHasher::hash(blockKey, prevHash)`. + //! + //! Beam-width-1 only. The connector enforces this at startup; this method + //! asserts the invariant defensively. + //! + //! Sliding-window attention with detached front blocks is not supported: once front + //! blocks are evicted they remain in the cache block ID list but no longer align with + //! token positions, so this method asserts `getNumFrontBlocksRemoved(windowSize) == 0`. + //! + //! @param llmRequest Request whose currently-allocated blocks should be hashed. + //! @param windowSize Attention window size identifying the per-window block manager. + //! @return Ordered hashes for full blocks at indices `[0, numFullBlocks)`, chained from + //! `mPrevBlockInSeq`. Empty when the request has no full blocks yet. + [[nodiscard]] virtual std::vector commitAndGetBlockHashesForRequest( + LlmRequest const& llmRequest, SizeType32 windowSize) + { + TLLM_THROW("commitAndGetBlockHashesForRequest is not implemented for this KV cache manager."); + } }; class KVCacheManager : public BaseKVCacheManager @@ -2515,6 +2540,9 @@ class KVCacheManager : public BaseKVCacheManager [[nodiscard]] executor::RetentionPriority getPriorityByBlockId( KVCacheBlock::IdType blockId, SizeType32 windowSize) const override; + [[nodiscard]] std::vector commitAndGetBlockHashesForRequest( + LlmRequest const& llmRequest, SizeType32 windowSize) override; + std::optional getLastBlockId(LlmRequest::RequestIdType requestId) const override; /// @brief Calculates the number of kv-cache blocks that a sequence will require, for a single beam. diff --git a/cpp/kernels/xqa/defines.h b/cpp/kernels/xqa/defines.h index b369b4304571..955a82c0f2ea 100644 --- a/cpp/kernels/xqa/defines.h +++ b/cpp/kernels/xqa/defines.h @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: Copyright (c) 2023-2025 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 2023-2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: Apache-2.0 * * Licensed under the Apache License, Version 2.0 (the "License"); @@ -165,6 +165,14 @@ static_assert(SPEC_DEC, "SPEC_Q_SEQ_LEN should only be used when SPEC_DEC is ena #endif #endif +// Number of head elements RoPE is applied to (rotary_embedding_dim). Defaults to the full head +// (HEAD_ELEMS) for full rotary; set smaller for partial rotary (partial_rotary_factor < 1). The +// trailing [ROPE_ELEMS, HEAD_ELEMS) elements are passed through unrotated. Defined unconditionally +// so validRopeElemsPerHead is well-formed even for kernels that do not apply RoPE in-kernel. +#ifndef ROPE_ELEMS +#define ROPE_ELEMS HEAD_ELEMS +#endif + // Output element type: // 0 - input element type // 1 - KV cache element type diff --git a/cpp/kernels/xqa/mha.h b/cpp/kernels/xqa/mha.h index 2c7ef50a8353..67f5ba07fb30 100644 --- a/cpp/kernels/xqa/mha.h +++ b/cpp/kernels/xqa/mha.h @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: Copyright (c) 2023-2025 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 2023-2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: Apache-2.0 * * Licensed under the Apache License, Version 2.0 (the "License"); @@ -30,6 +30,12 @@ constexpr bool isMLA = IS_MLA; static_assert((isMLA || validElemsPerHead <= 256) && (sizeof(CacheElem) * validElemsPerHead) % 16 == 0); constexpr uint32_t headElems = validElemsPerHead <= 64 ? 64 : (validElemsPerHead <= 128 ? 128 : (isMLA ? 576 : 256)); static_assert(headElems == 64 || headElems == 128 || headElems == 256 || headElems == 576, "not implemented"); +// Number of head elements RoPE is applied to. Equals validElemsPerHead for full rotary; smaller for +// partial rotary, in which case [validRopeElemsPerHead, validElemsPerHead) is passed through unrotated. +constexpr uint32_t validRopeElemsPerHead = ROPE_ELEMS; +static_assert(validRopeElemsPerHead > 0 && validRopeElemsPerHead <= validElemsPerHead && validRopeElemsPerHead % 2 == 0 + && (sizeof(CacheElem) * validRopeElemsPerHead) % 16 == 0, + "ROPE_ELEMS must be a positive, even multiple yielding 16B-aligned rope region and not exceed the head size"); constexpr uint32_t beamWidth = BEAM_WIDTH; constexpr uint32_t headGrpSize = HEAD_GRP_SIZE; #if SPEC_DEC @@ -153,7 +159,7 @@ void launchHopperF8MHA(cudaDeviceProp const& prop, uint32_t nbKHeads, #if USE_INPUT_KV InputHead const* qkv, #if ROPE_STYLE != 0 - Vec const* ropeCosSin, + Vec const* ropeCosSin, #endif #else InputHead const* q, diff --git a/cpp/kernels/xqa/mha_sm90.cu b/cpp/kernels/xqa/mha_sm90.cu index 4e9bf51e00b2..ba38804fc88f 100644 --- a/cpp/kernels/xqa/mha_sm90.cu +++ b/cpp/kernels/xqa/mha_sm90.cu @@ -500,32 +500,44 @@ __device__ void finalizeAndWriteOut_sync(uint32_t warpRank, DstHead* dst, Shared uint32_t nbKHeads /* only for final result in spec dec. set to 1 for workspace*/, uint32_t ctaNbValidTokens); #endif -inline constexpr uint32_t ropeNbPairsPerThrdImpl(uint32_t nbThrds) +// nbElems is the number of head elements processed as pairs. The RoPE'd q/k path uses the rope region +// (validRopeElemsPerHead); the V path and non-RoPE q/k path use the full head (validElemsPerHead). +inline constexpr uint32_t ropeNbPairsPerThrdImpl(uint32_t nbThrds, uint32_t nbElems) { - auto const val = divUp(exactDiv(validElemsPerHead, 2), nbThrds); + auto const val = divUp(exactDiv(nbElems, 2), nbThrds); assert(val <= 32); return val <= 2 ? val : (val <= 4 ? 4 : (val <= 8 ? 8 : (val <= 16 ? 16 : 32))); } -template -inline constexpr uint32_t ropeNbPairsPerThrd = ropeNbPairsPerThrdImpl(nbThrds); +template +inline constexpr uint32_t ropeNbPairsPerThrd = ropeNbPairsPerThrdImpl(nbThrds, nbElems); -template -__device__ Vec, ropeNbPairsPerThrd> loadHead( - Vec const& head, uint32_t tid); +// nbElems selects how many leading head elements are processed (default: the full head). srcElems is +// deduced from the argument: the q/k path passes a full head and only the first nbElems are read; the +// cos/sin path passes an nbElems-sized buffer. +template +__device__ Vec, ropeNbPairsPerThrd> loadHead( + Vec const& head, uint32_t tid); template __device__ mha::conditional_t, 2>, Vec, nbPairsPerThrd>> applyRoPE(Vec, nbPairsPerThrd> const& data, Vec, nbPairsPerThrd> const& ropeCosSin); -template +template __device__ void storeRotatedPairsForKV(GMemCacheHead& dst, - mha::conditional_t>, 2>, - Vec, ropeNbPairsPerThrd>> const& src, + mha::conditional_t>, 2>, + Vec, ropeNbPairsPerThrd>> const& src, uint32_t tid); -template +template __device__ void storeRotatedPairsForQ(SharedMem::QBuffer& dst, - mha::conditional_t>, 2>, - Vec, ropeNbPairsPerThrd>> const& src, + mha::conditional_t>, 2>, + Vec, ropeNbPairsPerThrd>> const& src, uint32_t row, uint32_t tid); +// Partial-rotary helpers: copy the unrotated tail [validRopeElemsPerHead, validElemsPerHead) of a head +// (no-ops when validRopeElemsPerHead == validElemsPerHead). +template +__device__ void storeUnrotatedTailForKV(GMemCacheHead& dst, InputHead const& src, float scale, uint32_t tid); +template +__device__ void storeUnrotatedTailForQ(SharedMem::QBuffer& dst, InputHead const& src, uint32_t row, uint32_t tid); class ScratchMem { @@ -682,7 +694,7 @@ CUBIN_EXPORT __global__ #if USE_INPUT_KV IOHead const* __restrict__ const qkv, // [nbReq][beamWidth][nbQHeads+nbKHeads+nbVHeads], #if ROPE_STYLE != 0 - Vec const* __restrict__ const ropeCosSin, // [maxNbPosEmb] + Vec const* __restrict__ const ropeCosSin, // [maxNbPosEmb] #endif #else IOHead const* __restrict__ const q, // [nbReq][beamWidth][nbQHeads], @@ -1457,8 +1469,9 @@ CUBIN_EXPORT __global__ smem.qBar.consumed.arrive_and_wait(); #if ROPE_STYLE != 0 auto const& ropeCosSinHead - = reinterpret_cast const&>(ropeCosSin[cacheSeqLen - 1]); - auto const cosSinPairs = loadHead(ropeCosSinHead, tid); + = reinterpret_cast const&>(ropeCosSin[cacheSeqLen - 1]); + auto const cosSinPairs + = loadHead(ropeCosSinHead, tid); #endif #if ENABLE_PDL == 2 acqBulk(); @@ -1474,10 +1487,17 @@ CUBIN_EXPORT __global__ #if ROPE_STYLE == 0 auto const rotatedPairs = loadHead(qData[idxHead], tid); #else - auto const pairs = loadHead(qData[idxHead], tid); + auto const pairs + = loadHead(qData[idxHead], tid); auto const rotatedPairs = applyRoPE(pairs, cosSinPairs); #endif - storeRotatedPairsForQ(smem.q, rotatedPairs, idxHead, tid); + // nbElems == validRopeElemsPerHead for the rope region; for ROPE_STYLE == 0 this equals + // validElemsPerHead (full head), matching the loadHead above. + storeRotatedPairsForQ(smem.q, rotatedPairs, idxHead, tid); +#if ROPE_STYLE != 0 + // Partial rotary: copy the unrotated tail of the head (no-op for full rotary). + storeUnrotatedTailForQ(smem.q, qData[idxHead], idxHead, tid); +#endif } #else TinyPtr const qData{q, headGrpSize * (nbKHeads * (beamWidth * ctaInputTokBeg) + idxHeadGrp)}; @@ -1543,12 +1563,18 @@ CUBIN_EXPORT __global__ kTilePartLoader.getHead(newTokenPos), convertedPairs, lane); #else constexpr bool isNeox = (ROPE_STYLE == 1); - auto const pairs = loadHead(inKHead, lane) * rcpKScale; + auto const pairs + = loadHead(inKHead, lane) + * rcpKScale; auto const& ropeCosSinHead - = reinterpret_cast const&>(ropeCosSin[cacheSeqLen - 1]); - auto const cosSinPairs = loadHead(ropeCosSinHead, lane); + = reinterpret_cast const&>(ropeCosSin[cacheSeqLen - 1]); + auto const cosSinPairs + = loadHead(ropeCosSinHead, lane); auto const rotatedPairs = applyRoPE(pairs, cosSinPairs); - storeRotatedPairsForKV(kTilePartLoader.getHead(newTokenPos), rotatedPairs, lane); + storeRotatedPairsForKV( + kTilePartLoader.getHead(newTokenPos), rotatedPairs, lane); + // Partial rotary: copy the unrotated tail of the head (no-op for full rotary). + storeUnrotatedTailForKV(kTilePartLoader.getHead(newTokenPos), inKHead, rcpKScale, lane); #endif static_assert(inputSeqLen == 1); __syncwarp(); @@ -3265,12 +3291,15 @@ __device__ inline void finalizeAndWriteOut_sync(uint32_t warpRank, DstHead* dst, } #endif -template -__device__ inline Vec, ropeNbPairsPerThrd> loadHead( - Vec const& head, uint32_t tid) +template +__device__ inline Vec, ropeNbPairsPerThrd> loadHead( + Vec const& head, uint32_t tid) { - constexpr uint32_t nbPairs = exactDiv(validElemsPerHead, 2); - constexpr uint32_t nbPairsPerThrd = ropeNbPairsPerThrd; + // Only the first nbElems elements are loaded; for NEOX the two halves sit at [0, nbElems/2) and + // [nbElems/2, nbElems). For the RoPE'd path nbElems == validRopeElemsPerHead (the rope region). + constexpr uint32_t nbPairs = exactDiv(nbElems, 2); + static_assert(srcElems >= nbElems); + constexpr uint32_t nbPairsPerThrd = ropeNbPairsPerThrd; constexpr uint32_t nbWorkingThrds = exactDiv(nbPairs, nbPairsPerThrd); bool const isWorkingThrd = (nbWorkingThrds == nbThrds || tid < nbWorkingThrds); static_assert(nbPairs % nbPairsPerThrd == 0); @@ -3339,14 +3368,14 @@ applyRoPE(Vec, nbPairsPerThrd> const& data, Vec, nbP } } -template +template __device__ inline void storeRotatedPairsForKV(GMemCacheHead& dst, - mha::conditional_t>, 2>, - Vec, ropeNbPairsPerThrd>> const& src, + mha::conditional_t>, 2>, + Vec, ropeNbPairsPerThrd>> const& src, uint32_t tid) { - constexpr uint32_t nbPairs = exactDiv(validElemsPerHead, 2); - constexpr uint32_t nbPairsPerThrd = ropeNbPairsPerThrd; + constexpr uint32_t nbPairs = exactDiv(nbElems, 2); + constexpr uint32_t nbPairsPerThrd = ropeNbPairsPerThrd; constexpr uint32_t nbWorkingThrds = exactDiv(nbPairs, nbPairsPerThrd); bool const isWorkingThrd = (nbWorkingThrds == nbThrds || tid < nbWorkingThrds); static_assert(nbPairs % nbPairsPerThrd == 0); @@ -3366,14 +3395,14 @@ __device__ inline void storeRotatedPairsForKV(GMemCacheHead& dst, } } -template +template __device__ inline void storeRotatedPairsForQ(SharedMem::QBuffer& dst, - mha::conditional_t>, 2>, - Vec, ropeNbPairsPerThrd>> const& src, + mha::conditional_t>, 2>, + Vec, ropeNbPairsPerThrd>> const& src, uint32_t row, uint32_t tid) { - constexpr uint32_t nbPairs = exactDiv(validElemsPerHead, 2); - constexpr uint32_t nbPairsPerThrd = ropeNbPairsPerThrd; + constexpr uint32_t nbPairs = exactDiv(nbElems, 2); + constexpr uint32_t nbPairsPerThrd = ropeNbPairsPerThrd; constexpr uint32_t nbWorkingThrds = exactDiv(nbPairs, nbPairsPerThrd); bool const isWorkingThrd = (nbWorkingThrds == nbThrds || tid < nbWorkingThrds); static_assert(nbPairs % nbPairsPerThrd == 0); @@ -3436,6 +3465,58 @@ __device__ inline void storeRotatedPairsForQ(SharedMem::QBuffer& dst, } } +// Copy the unrotated tail [validRopeElemsPerHead, validElemsPerHead) of a head into the (linear) K +// cache, converting InputElem -> CacheElem and applying the kv-cache scale. No-op for full rotary. +template +__device__ inline void storeUnrotatedTailForKV(GMemCacheHead& dst, InputHead const& src, float scale, uint32_t tid) +{ + if constexpr (validRopeElemsPerHead < validElemsPerHead) + { + constexpr uint32_t tailElems = validElemsPerHead - validRopeElemsPerHead; + constexpr uint32_t nbIters = divUp(tailElems, nbThrds); +#pragma unroll + for (uint32_t iter = 0; iter < nbIters; iter++) + { + uint32_t const e = validRopeElemsPerHead + tid + iter * nbThrds; + if (e >= validElemsPerHead) + { + break; + } + dst[e] = convert(Vec{float(src[e]) * scale})[0]; + } + } +} + +// Copy the unrotated tail [validRopeElemsPerHead, validElemsPerHead) of a head into the swizzled Q +// shared-memory buffer, converting InputElem -> CacheElem. Mirrors the byte->(part,grain) mapping in +// storeRotatedPairsForQ so the GMMA sees a contiguous head. No-op for full rotary. +template +__device__ inline void storeUnrotatedTailForQ(SharedMem::QBuffer& dst, InputHead const& src, uint32_t row, uint32_t tid) +{ + if constexpr (validRopeElemsPerHead < validElemsPerHead) + { + constexpr uint32_t tailElems = validElemsPerHead - validRopeElemsPerHead; + constexpr uint32_t nbIters = divUp(tailElems, nbThrds); +#pragma unroll + for (uint32_t iter = 0; iter < nbIters; iter++) + { + uint32_t const e = validRopeElemsPerHead + tid + iter * nbThrds; + if (e >= validElemsPerHead) + { + break; + } + CacheElem const val = convert(Vec{float(src[e])})[0]; + auto const byteOffset = BoundedVal{cacheElemSize * e}; + uint32_t const idxPart = byteOffset.template divBy().get(); + auto const byteOffsetInsidePart = byteOffset.template mod(); + uint32_t const idxGrain = byteOffsetInsidePart.template divBy().get(); + uint32_t const byteOffsetInsideGrain = byteOffsetInsidePart.template mod().get(); + LdGrain& grain = dst[idxPart].template at(row, idxGrain); + reinterpret_cast(reinterpret_cast(&grain) + byteOffsetInsideGrain)[0] = val; + } + } +} + #ifndef GENERATE_CUBIN uint32_t computeNbSubSeqPerSeqHopperF8MHA( cudaDeviceProp const& prop, uint32_t batchSize, uint32_t nbKHeads, uint32_t maxSeqLen) @@ -3466,7 +3547,7 @@ void launchHopperF8MHA(cudaDeviceProp const& prop, uint32_t nbKHeads, #if USE_INPUT_KV InputHead const* qkv, #if ROPE_STYLE != 0 - Vec const* ropeCosSin, + Vec const* ropeCosSin, #endif #else InputHead const* q, diff --git a/cpp/kernels/xqa/test/refAttention.h b/cpp/kernels/xqa/test/refAttention.h index a8dd32bab65f..8a3f67b53866 100644 --- a/cpp/kernels/xqa/test/refAttention.h +++ b/cpp/kernels/xqa/test/refAttention.h @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: Copyright (c) 2024-2025 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 2024-2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: Apache-2.0 * * Licensed under the Apache License, Version 2.0 (the "License"); @@ -103,14 +103,16 @@ Eigen::Matrix refAttenti #endif template -InputHead applyRoPE(InputHead const& head, Vec const& ropeCosSin) +InputHead applyRoPE(InputHead const& head, Vec const& ropeCosSin) { if constexpr (ropeStyle == 0) { return head; } - constexpr uint32_t nbPairs = exactDiv(validElemsPerHead, 2); - InputHead dst; + // Only the first validRopeElemsPerHead elements are rotated (the rope region); the trailing + // [validRopeElemsPerHead, validElemsPerHead) elements pass through unrotated (partial rotary). + constexpr uint32_t nbPairs = exactDiv(validRopeElemsPerHead, 2); + InputHead dst = head; constexpr bool isNeox = (ropeStyle == 1); for (uint32_t i = 0; i < nbPairs; i++) { diff --git a/cpp/kernels/xqa/test/test.cpp b/cpp/kernels/xqa/test/test.cpp index a3821e57d1e5..934b3d62d7ec 100644 --- a/cpp/kernels/xqa/test/test.cpp +++ b/cpp/kernels/xqa/test/test.cpp @@ -307,17 +307,35 @@ void runTest(uint32_t batchSize, uint32_t seqLen, bool testPerf, bool refCheck, std::unique_ptr const ticEv{tic, &cudaEventDestroy}; std::unique_ptr const tocEv{toc, &cudaEventDestroy}; - auto const ropeCosSin = ManagedMemBuf>(seqLen); + // The cos/sin cache only covers the rope region (validRopeElemsPerHead elements per position); + // for full rotary this equals the head size, for partial rotary it is smaller. + auto const ropeCosSin = ManagedMemBuf>(seqLen); +#if USE_INPUT_KV && ROPE_STYLE != 0 + auto const fullHeadRopeCosSin = ManagedMemBuf>(seqLen); +#endif #if USE_INPUT_KV && defined(ROPE_STYLE) && ROPE_STYLE for (uint32_t m = 0; m < seqLen; m++) { auto& pairs = ropeCosSin[m]; - constexpr uint32_t nbPairs = exactDiv(validElemsPerKHead, 2); +#if USE_INPUT_KV && ROPE_STYLE != 0 + auto& fullHeadPairs = fullHeadRopeCosSin[m]; + constexpr uint32_t nbFullHeadPairs = exactDiv(validElemsPerHead, 2); + for (uint32_t i = 0; i < nbFullHeadPairs; i++) + { + fullHeadPairs[i * 2] = 1.F; + fullHeadPairs[i * 2 + 1] = 0.F; + } +#endif + constexpr uint32_t nbPairs = exactDiv(validRopeElemsPerHead, 2); for (uint32_t i = 0; i < nbPairs; i++) { float const theta = m * std::pow(1E4F, (-1.F / nbPairs) * i); pairs[i * 2] = std::cos(theta); pairs[i * 2 + 1] = std::sin(theta); +#if USE_INPUT_KV && ROPE_STYLE != 0 + fullHeadPairs[i * 2] = pairs[i * 2]; + fullHeadPairs[i * 2 + 1] = pairs[i * 2 + 1]; +#endif } } #endif @@ -785,62 +803,115 @@ void runTest(uint32_t batchSize, uint32_t seqLen, bool testPerf, bool refCheck, }(); auto runKernel = [&]() { - auto const launchFunc = useQGMMA ? &launchHopperF8MHA : &launchMHA; - #if SPEC_DEC SpecDecParams const specDecParams{.qSeqLen = qSeqLen, .qCuSeqLens = reinterpret_cast(deviceCuQSeqLen), .mask = reinterpret_cast(devicePackedMask)}; #endif - launchFunc(prop, nbKHeads, + if (useQGMMA) + { + launchHopperF8MHA(prop, nbKHeads, #if SLIDING_WINDOW - slidingWinSize, + slidingWinSize, #endif - qScale, + qScale, #if SPEC_DEC - &output[0][0][0][0], + &output[0][0][0][0], #else - &output[0][0][0], + &output[0][0][0], #endif #if LOW_PREC_OUTPUT - rcpOutScale.get(), + rcpOutScale.get(), #endif #if USE_INPUT_KV - &qkvHeads[0][0][0], + &qkvHeads[0][0][0], #if ROPE_STYLE != 0 - ropeCosSin.get(), + ropeCosSin.get(), #endif #else #if SPEC_DEC - &qHeads[0][0][0][0], + &qHeads[0][0][0][0], #else - &qHeads[0][0][0], + &qHeads[0][0][0], #endif #endif - attentionSinksPtr, + attentionSinksPtr, #if PAGED_KV_CACHE_LAYOUT == 1 && USE_PAGED_KV_CACHE - cacheKHeads.get(), cacheVHeads.get(), + cacheKHeads.get(), cacheVHeads.get(), #else - cacheHeads.get(), + cacheHeads.get(), #endif #if USE_PAGED_KV_CACHE - pageListArg, + pageListArg, +#endif + maxSeqLen, &seqLenList[0][0], +#if BEAM_WIDTH > 1 + beamSearchParams, +#endif + batchSize, kvCacheScale.get(), +#if SPEC_DEC + specDecParams, +#endif +#if SKIP_SOFTMAX_ATTN + skipSoftmaxThresholdScaleFactor, +#if SKIP_SOFTMAX_ATTN_BLOCK_STATS + kernelSkippedBlockCount.get(), kernelTotalBlockCount.get(), +#endif +#endif + semaphores.get(), scratch, stream); + } + else + { + launchMHA(prop, nbKHeads, +#if SLIDING_WINDOW + slidingWinSize, +#endif + qScale, +#if SPEC_DEC + &output[0][0][0][0], +#else + &output[0][0][0], +#endif +#if LOW_PREC_OUTPUT + rcpOutScale.get(), +#endif +#if USE_INPUT_KV + &qkvHeads[0][0][0], +#if ROPE_STYLE != 0 + fullHeadRopeCosSin.get(), +#endif +#else +#if SPEC_DEC + &qHeads[0][0][0][0], +#else + &qHeads[0][0][0], +#endif +#endif + attentionSinksPtr, +#if PAGED_KV_CACHE_LAYOUT == 1 && USE_PAGED_KV_CACHE + cacheKHeads.get(), cacheVHeads.get(), +#else + cacheHeads.get(), #endif - maxSeqLen, &seqLenList[0][0], +#if USE_PAGED_KV_CACHE + pageListArg, +#endif + maxSeqLen, &seqLenList[0][0], #if BEAM_WIDTH > 1 - beamSearchParams, + beamSearchParams, #endif - batchSize, kvCacheScale.get(), + batchSize, kvCacheScale.get(), #if SPEC_DEC - specDecParams, + specDecParams, #endif #if SKIP_SOFTMAX_ATTN - skipSoftmaxThresholdScaleFactor, + skipSoftmaxThresholdScaleFactor, #if SKIP_SOFTMAX_ATTN_BLOCK_STATS - kernelSkippedBlockCount.get(), kernelTotalBlockCount.get(), + kernelSkippedBlockCount.get(), kernelTotalBlockCount.get(), #endif #endif - semaphores.get(), scratch, stream); + semaphores.get(), scratch, stream); + } checkCuda(cudaGetLastError()); }; #endif @@ -1506,9 +1577,9 @@ TEST(NVRTC, compile) "gmma.cuh", "gmma_impl.cuh", "barriers.cuh", "tma.h", "cuda_bf16.h", "cuda_bf16.hpp", "cuda_fp16.h", "cuda_fp16.hpp", "cuda_fp8.h", "cuda_fp8.hpp", "vector_types.h", "vector_functions.h", "device_types.h"}; assert(headers_content.size() == headers_name.size()); - auto test - = [&](int input_fp16, int cache_enum, int head_dim, int head_grp_size, bool use_paged_kv_cache, - int paged_kv_cache_layout, int beam_width, char const* source_file, int compileMajor, int compileMinor) + auto test = [&](int input_fp16, int cache_enum, int head_dim, int head_grp_size, bool use_paged_kv_cache, + int paged_kv_cache_layout, int beam_width, char const* source_file, int compileMajor, + int compileMinor, int rope_elems = 0) { std::string arch_flag = "-arch=sm_" + std::to_string(compileMajor) + std::to_string(compileMinor); if ((compileMajor == 9 || compileMajor == 10 || compileMajor == 12) && compileMinor == 0) @@ -1540,6 +1611,7 @@ TEST(NVRTC, compile) options.push_back("-DROPE_STYLE=1"); options.push_back("-DSLIDING_WINDOW=1"); options.push_back("-DLOW_PREC_OUTPUT=1"); + options.push_back("-DROPE_ELEMS=" + std::to_string(rope_elems != 0 ? rope_elems : head_dim)); } std::vector options_cstr; for (auto const& option : options) @@ -1619,6 +1691,14 @@ TEST(NVRTC, compile) } test(input_fp16, cache_enum, head_dim, 8, use_paged_kv_cache, paged_kv_cache_layout, beam_width, source_file, major, minor); + // Verify the partial-rotary in-kernel RoPE path also compiles (rope dim + // = head_dim/2, a 16-multiple for these head dims) on the sm90 fused path. + if (source_file == tensorrt_llm::kernels::mha_sm90_cu_content && cache_enum == 2 + && (head_dim / 2) % 16 == 0) + { + test(input_fp16, cache_enum, head_dim, 8, use_paged_kv_cache, paged_kv_cache_layout, + beam_width, source_file, major, minor, head_dim / 2); + } } } } diff --git a/cpp/tensorrt_llm/batch_manager/kvCacheManager.cpp b/cpp/tensorrt_llm/batch_manager/kvCacheManager.cpp index c6a6f392129d..0d3a8f164027 100644 --- a/cpp/tensorrt_llm/batch_manager/kvCacheManager.cpp +++ b/cpp/tensorrt_llm/batch_manager/kvCacheManager.cpp @@ -4408,6 +4408,79 @@ std::vector> const& KVCacheManager::getCacheBlockIds( return getSequence(requestId).getCacheBlockIds(windowSize); } +std::vector KVCacheManager::commitAndGetBlockHashesForRequest( + LlmRequest const& llmRequest, SizeType32 windowSize) +{ + constexpr SizeType32 beamIdx = 0; + TLLM_CHECK_WITH_INFO( + llmRequest.getTokens().size() == 1, "commitAndGetBlockHashesForRequest only supports beam width 1."); + + auto const& sequence = getSequence(llmRequest.mRequestId); + + // Under sliding-window attention, detached front blocks remain in the cache block ID list + // (see WindowBlockManager::detachFrontBlock) but no longer correspond to token range + // [b * tokensPerBlock, ...). Walking them here would hash/mutate recycled blocks and break + // the index<->token alignment this method relies on, so fail fast until SWA is supported. + TLLM_CHECK_WITH_INFO(sequence.getNumFrontBlocksRemoved(windowSize) == 0, + "commitAndGetBlockHashesForRequest does not support sliding-window attention with detached front blocks " + "(windowSize=%d, request %lu).", + windowSize, static_cast(llmRequest.mRequestId)); + + auto const& perBeamBlockIds = sequence.getCacheBlockIds(windowSize); + if (perBeamBlockIds.empty() || perBeamBlockIds[beamIdx].empty()) + { + return {}; + } + auto const& blockIds = perBeamBlockIds[beamIdx]; + + auto const& uniqueTokens = llmRequest.getUniqueTokens(beamIdx); + auto const tokensPerBlock = getTokensPerBlock(); + // Count full blocks from uniqueTokens.size() (NOT getUsableUniqueTokenCountForReuse). + // This is intentional: the connector chain front-runs storeBlocks, committing a block's + // hash the moment the block fills -- including a trailing block that lands exactly on a + // block boundary. getUsableUniqueTokenCountForReuse subtracts the final unmaterialized + // token, which would drop that just-filled trailing block and silently disable + // front-running. See KVCacheManagerTest.CommitAndGetBlockHashesFrontRunsTrailingFullBlock. + auto const numFullTokenBlocks = static_cast(uniqueTokens.size()) / tokensPerBlock; + auto const numAllocatedBlocks = static_cast(blockIds.size()); + // The allocator may have allocated a (partial) trailing block; clip to whichever count is + // smaller so we never index past either side. + auto const limit = std::min(numFullTokenBlocks, numAllocatedBlocks); + if (limit == 0) + { + return {}; + } + + bool const usesExtraIds = llmRequest.getInputTokensExtraIds().has_value(); + auto const loraTaskId = llmRequest.getLoraTaskId(); + auto const cacheSaltID = llmRequest.getCacheSaltID(); + + std::vector hashes; + hashes.reserve(static_cast(limit)); + for (SizeType32 b = 0; b < limit; ++b) + { + auto block = mBlockManager.getBlockById(blockIds[b], windowSize); + TLLM_CHECK_WITH_INFO(block != nullptr, + "commitAndGetBlockHashesForRequest: null block at index %d (blockId=%d, request %lu).", b, blockIds[b], + static_cast(llmRequest.mRequestId)); + if (!block->isFull()) + { + SizeType32 const tokenStart = b * tokensPerBlock; + SizeType32 const tokenEnd = tokenStart + tokensPerBlock; + auto extraKeys = generateBlockHashExtraKeys(llmRequest, tokenStart, tokenEnd); + VecUniqueTokens blockTokens(uniqueTokens.begin() + tokenStart, uniqueTokens.begin() + tokenEnd); + BlockKey blockKey(usesExtraIds, loraTaskId, std::move(blockTokens), std::move(extraKeys), cacheSaltID); + block->setBlockKey(blockKey, /*isFull=*/true); + // setHash() chains through mPrevBlockInSeq, which was wired in addBlockToBeam. The + // loop walks blocks in allocation order, so by the time we reach block b its + // predecessor (if any) has already been committed and exposes a stable hash. + block->setHash(); + } + hashes.push_back(static_cast(block->getHash())); + } + return hashes; +} + std::vector>> KVCacheManager::getBatchCacheBlockIds( std::vector const& requestIds, SizeType32 windowSize) const { diff --git a/cpp/tensorrt_llm/common/attentionOp.cpp b/cpp/tensorrt_llm/common/attentionOp.cpp index d38672283b25..36f92aa7a0aa 100644 --- a/cpp/tensorrt_llm/common/attentionOp.cpp +++ b/cpp/tensorrt_llm/common/attentionOp.cpp @@ -265,17 +265,6 @@ bool AttentionOp::convertMMHAParamsToXQAParams(tensorrt_llm::kernels::XQAParams& = mAttentionChunkSize && !tc::getEnvDisableChunkedAttentionInGenPhase() ? *mAttentionChunkSize : INT_MAX; xqaParams.max_attention_window_size = generationsParams.max_attention_window_size; xqaParams.cyclic_attention_window_size = generationsParams.cyclic_attention_window_size; - // Treat the layer as sliding-window-causal only for explicit SWA masks or - // in-attention positional encodings whose max position exceeds the layer window. - // Exclude sparse attention and chunked attention - bool const has_in_attention_pos_encoding = mPositionEmbeddingType != PositionEmbeddingType::kLEARNED_ABSOLUTE; - // chunked_attention_size is set to INT_MAX above as the "disabled" sentinel. - bool const chunked_attention_enabled - = xqaParams.chunked_attention_size > 0 && xqaParams.chunked_attention_size != INT_MAX; - xqaParams.is_sliding_window = !mUseSparseAttention && !chunked_attention_enabled - && ((mMaskType == AttentionMaskType::SLIDING_WINDOW_CAUSAL) - || (has_in_attention_pos_encoding && generationsParams.max_attention_window_size > 0 - && generationsParams.max_attention_window_size < mRotaryEmbeddingMaxPositions)); xqaParams.max_blocks_per_sequence = generationsParams.max_blocks_per_sequence; xqaParams.sink_token_length = generationsParams.sink_token_length; xqaParams.max_past_kv_length = generationsParams.max_past_kv_length; @@ -305,6 +294,10 @@ bool AttentionOp::convertMMHAParamsToXQAParams(tensorrt_llm::kernels::XQAParams& xqaParams.helix_position_offsets = generationsParams.helix_position_offsets; xqaParams.helix_is_inactive_rank = generationsParams.helix_is_inactive_rank; xqaParams.softmax_stats = generationsParams.softmax_stats; + xqaParams.trtllm_gen_jit_warmup = generationsParams.trtllm_gen_jit_warmup; + xqaParams.trtllm_gen_jit_warmup_max_num_requests = mMaxNumRequests; + xqaParams.trtllm_gen_jit_warmup_max_seq_len_q = mMaxContextLength; + xqaParams.trtllm_gen_jit_warmup_max_seq_len_kv = mMaxSeqLen; xqaParams.logn_scaling_ptr = generationsParams.logn_scaling_ptr; xqaParams.total_num_input_tokens = mCpSize > 1 ? generationsParams.num_requests : generationsParams.num_tokens; @@ -1136,13 +1129,11 @@ int AttentionOp::mlaGeneration( tllmRunnerParams.mMaxSeqLenCacheKv = generation_params.max_attention_window_size; // This should be set to numDraftTokens + 1. tllmRunnerParams.mMaxSeqLenQ = params.acc_q_len / batch_beam; - // Override mMaxSeqLenKv with the max cache capacity so FMHA picks the same kernel as - // CUDA graph warmup and avoids the eager-mode JIT miss/recompile. This is safe for - // PagedKv on this path because the strides do not depend on mMaxSeqLenKv, and extra - // KV CTAs exit early through seqLensKvPtr. - // TODO: mirror the is_swa + W+1 logic from xqaDispatcher.cpp when MLA gains SWA - // support (also requires adding Sliding cubins to the MLA gen kernel set). - tllmRunnerParams.mMaxSeqLenKv = generation_params.max_attention_window_size; + tllmRunnerParams.mMaxSeqLenKv = generation_params.max_past_kv_length; + tllmRunnerParams.mJITWarmup = generation_params.trtllm_gen_jit_warmup; + tllmRunnerParams.mJITWarmupMaxNumRequests = mMaxNumRequests; + tllmRunnerParams.mJITWarmupMaxSeqLenQ = mMaxContextLength; + tllmRunnerParams.mJITWarmupMaxSeqLenKv = mMaxSeqLen; tllmRunnerParams.mSumOfSeqLensQ = int(batch_beam * tllmRunnerParams.mMaxSeqLenQ); // Not used in the generation kernels as contiguous_kv or paged_kv layouts are used. tllmRunnerParams.mSumOfSeqLensKv = int(batch_beam * tllmRunnerParams.mMaxSeqLenKv); @@ -1993,6 +1984,10 @@ int AttentionOp::enqueueContext(EnqueueContextParams const& params, cudaStrea fmhaParams.stream = stream; fmhaParams.forceFp32Acc = mFMHAForceFP32Acc; fmhaParams.softmaxStatsPtr = params.softmax_stats; + fmhaParams.trtllmGenJITWarmup = params.trtllm_gen_jit_warmup; + fmhaParams.trtllmGenJITWarmupMaxNumRequests = mMaxNumRequests; + fmhaParams.trtllmGenJITWarmupMaxSeqLenQ = mMaxContextLength; + fmhaParams.trtllmGenJITWarmupMaxSeqLenKv = mMaxSeqLen; // Sparse attention parameters if (useTllmGenSparseAttention()) diff --git a/cpp/tensorrt_llm/common/attentionOp.h b/cpp/tensorrt_llm/common/attentionOp.h index 097dd7d9051d..f7822947b1ea 100644 --- a/cpp/tensorrt_llm/common/attentionOp.h +++ b/cpp/tensorrt_llm/common/attentionOp.h @@ -124,6 +124,8 @@ class AttentionOp float const* sage_attn_sfs_q = nullptr; float const* sage_attn_sfs_k = nullptr; float const* sage_attn_sfs_v = nullptr; + // Optional TRTLLM-Gen FMHA JIT warmup shape. + bool trtllm_gen_jit_warmup = false; }; template @@ -470,6 +472,8 @@ class AttentionOp bool mUnfuseQkvGemm = false; nvinfer1::DataType mType; int32_t mMaxContextLength = 0; + int32_t mMaxSeqLen = 0; + int32_t mMaxNumRequests = 0; bool mQKVBiasEnabled = false; bool mCrossAttention = false; int mMaxDistance = 0; @@ -551,17 +555,17 @@ class AttentionOp mRotaryEmbeddingLongMscale, mRotaryEmbeddingMaxPositions, mRotaryEmbeddingOriginalMaxPositions, (int8_t) mPositionEmbeddingType, mUseLognScaling, mRemovePadding, (int32_t) mMaskType, mBlockSparseParams.data(), mPagedKVCache, mTokensPerBlock, mKVCacheQuantMode.value(), mTpSize, mTpRank, - mUnfuseQkvGemm, (int32_t) mType, mMaxContextLength, mQKVBiasEnabled, mCrossAttention, mMaxDistance, - mPosShiftEnabled, mPagedContextFMHA, mFP8ContextFMHA, mFP8AttenOutput, mFP8ContextMLA, mFP8GenerationMLA, - mChunkPrefillBufferBatchSize, mDenseContextFMHA, mHasFullAttentionMask, mIsSpecDecodingEnabled, - mUseSpecDecoding, mIsSpecDecTree, mSpecDecodingIsGenerationLengthVariable, mSpecDecodingMaxGenerationLength, - mIsMLAEnabled, mIsGenerationMLA, mUseGenFlashMLA, mUseSparseAttention, mUseTllmGenSparseAttentionPaged, - mUseTllmGenSparseAttention, mMLAParams.data(), mCpSize, mCpRank, mCpGroup, mNumAttnHeads, mNumAttnKVHeads, - mNumKVHeadsOrigin, mAttnTpSize, mAttnTpRank, mAttnCpSize, mAttnCpRank, mUlyssesMQABroadcast, - mEnableContextFMHA, mFMHAForceFP32Acc, mMultiBlockMode, mEnableXQA, mUseKVCache, mSkipAttn, mFuseFp4Quant, - mNbMultiBlockSemaphores, mAttentionChunkSize.value_or(-1), mSkipSoftmaxThresholdScaleFactorPrefill, - mSkipSoftmaxThresholdScaleFactorDecode, mSageAttnNumEltsPerBlkQ, mSageAttnNumEltsPerBlkK, - mSageAttnNumEltsPerBlkV, mSageAttnQkInt8); + mUnfuseQkvGemm, (int32_t) mType, mMaxContextLength, mMaxSeqLen, mMaxNumRequests, mQKVBiasEnabled, + mCrossAttention, mMaxDistance, mPosShiftEnabled, mPagedContextFMHA, mFP8ContextFMHA, mFP8AttenOutput, + mFP8ContextMLA, mFP8GenerationMLA, mChunkPrefillBufferBatchSize, mDenseContextFMHA, mHasFullAttentionMask, + mIsSpecDecodingEnabled, mUseSpecDecoding, mIsSpecDecTree, mSpecDecodingIsGenerationLengthVariable, + mSpecDecodingMaxGenerationLength, mIsMLAEnabled, mIsGenerationMLA, mUseGenFlashMLA, mUseSparseAttention, + mUseTllmGenSparseAttentionPaged, mUseTllmGenSparseAttention, mMLAParams.data(), mCpSize, mCpRank, mCpGroup, + mNumAttnHeads, mNumAttnKVHeads, mNumKVHeadsOrigin, mAttnTpSize, mAttnTpRank, mAttnCpSize, mAttnCpRank, + mUlyssesMQABroadcast, mEnableContextFMHA, mFMHAForceFP32Acc, mMultiBlockMode, mEnableXQA, mUseKVCache, + mSkipAttn, mFuseFp4Quant, mNbMultiBlockSemaphores, mAttentionChunkSize.value_or(-1), + mSkipSoftmaxThresholdScaleFactorPrefill, mSkipSoftmaxThresholdScaleFactorDecode, mSageAttnNumEltsPerBlkQ, + mSageAttnNumEltsPerBlkK, mSageAttnNumEltsPerBlkV, mSageAttnQkInt8); }; private: diff --git a/cpp/tensorrt_llm/common/cublasMMWrapper.cpp b/cpp/tensorrt_llm/common/cublasMMWrapper.cpp index 5cbe1b30d3f1..f3b14e5cafeb 100644 --- a/cpp/tensorrt_llm/common/cublasMMWrapper.cpp +++ b/cpp/tensorrt_llm/common/cublasMMWrapper.cpp @@ -570,16 +570,16 @@ float const* getBetaDevicePointer() // BlockScaleGemm Version 1: Default algorithm (uses first valid heuristic) void CublasMMWrapper::BlockScaleGemm(cublasOperation_t transa, cublasOperation_t transb, int const m, int const n, int const k, void const* A, int const lda, void const* B, int const ldb, void* C, int const ldc, void const* a_sf, - void const* b_sf, float const* alpha) + void const* b_sf, float const* alpha, void const* bias) { // Forward to the overloaded version with nullptr (use default algorithm) - BlockScaleGemm(transa, transb, m, n, k, A, lda, B, ldb, C, ldc, a_sf, b_sf, alpha, nullptr); + BlockScaleGemm(transa, transb, m, n, k, A, lda, B, ldb, C, ldc, a_sf, b_sf, alpha, nullptr, bias); } // BlockScaleGemm Version 2: Specified algorithm (unified implementation) void CublasMMWrapper::BlockScaleGemm(cublasOperation_t transa, cublasOperation_t transb, int const m, int const n, int const k, void const* A, int const lda, void const* B, int const ldb, void* C, int const ldc, void const* a_sf, - void const* b_sf, float const* alpha, cublasLtMatmulAlgo_t const* algo) + void const* b_sf, float const* alpha, cublasLtMatmulAlgo_t const* algo, void const* bias) { // Verify input data types (currently supports FP4, can be extended to more formats in the future) TLLM_CHECK_WITH_INFO(mAType == CUDA_R_4F_E2M1 && mBType == CUDA_R_4F_E2M1, @@ -607,6 +607,11 @@ void CublasMMWrapper::BlockScaleGemm(cublasOperation_t transa, cublasOperation_t // Set block-wise scaling descriptors setScaleDescriptors(const_cast(a_sf), const_cast(b_sf)); + if (bias != nullptr) + { + setBiasDescriptor(const_cast(bias)); + } + // Validate cuBLASLt handle TLLM_CHECK_WITH_INFO(mCublasLtHandle != nullptr, "cuBLASLt handle is null"); diff --git a/cpp/tensorrt_llm/common/cublasMMWrapper.h b/cpp/tensorrt_llm/common/cublasMMWrapper.h index 78a68204ea37..f2b6cab90ebe 100644 --- a/cpp/tensorrt_llm/common/cublasMMWrapper.h +++ b/cpp/tensorrt_llm/common/cublasMMWrapper.h @@ -92,12 +92,12 @@ class CublasMMWrapper // Uses default/heuristic algorithm void BlockScaleGemm(cublasOperation_t transa, cublasOperation_t transb, int const m, int const n, int const k, void const* A, int const lda, void const* B, int const ldb, void* C, int const ldc, void const* a_sf, - void const* b_sf, float const* alpha); + void const* b_sf, float const* alpha, void const* bias = nullptr); - // Uses specified algorithm (for autotuning) + // Uses specified algorithm (for autotuning). Optional `bias` fused via CUBLASLT_EPILOGUE_BIAS. void BlockScaleGemm(cublasOperation_t transa, cublasOperation_t transb, int const m, int const n, int const k, void const* A, int const lda, void const* B, int const ldb, void* C, int const ldc, void const* a_sf, - void const* b_sf, float const* alpha, cublasLtMatmulAlgo_t const* algo); + void const* b_sf, float const* alpha, cublasLtMatmulAlgo_t const* algo, void const* bias = nullptr); #endif void stridedBatchedGemm(cublasOperation_t transa, cublasOperation_t transb, int const m, int const n, int const k, diff --git a/cpp/tensorrt_llm/kernels/IndexerTopK.h b/cpp/tensorrt_llm/kernels/IndexerTopK.h index e1e6e1abd8d1..324e597dc779 100644 --- a/cpp/tensorrt_llm/kernels/IndexerTopK.h +++ b/cpp/tensorrt_llm/kernels/IndexerTopK.h @@ -27,54 +27,47 @@ TRTLLM_NAMESPACE_BEGIN namespace kernels { -/// fp32 indexer TopK decode — L2-aware BS-threshold dispatcher with four -/// fallback tiers: -/// - GVR Heuristic (preIdx provided, kSeqSmall ≤ N < splitWork, BS < kBsLarge, K ∈ {512,1024,2048}) -/// - Insertion sort (N < kSortingAlgorithmThreshold) -/// - Radix sort (kSortingAlgorithmThreshold ≤ N < splitWork) -/// - Radix split-work (N ≥ splitWork — uses outLogitsAux / outIndicesAux) -void invokeIndexerTopKDecode(float const* logits, int const* seqLens, int* indices, float* outLogitsAux, - int* outIndicesAux, int const splitWorkThreshold, int const numRows, int const numColumns, int const stride0, - int const stride1, int const next_n, int const topK = 2048, int const* preIdx = nullptr, int const preIdxStride = 0, - int const preIdxCount = 0, float* heuristicScratch = nullptr, cudaStream_t const stream = 0); - -/// bf16 indexer TopK decode — same dispatch axes as the fp32 entry, except -/// kBsL2 uses sizeof(__nv_bfloat16) bytes/elem (L2 footprint is half) and -/// the split-work tier is unsupported (the bf16/fp16 entry does not expose -/// the float aux buffers required for split-work). Insertion + radix tiers -/// share topKPerRowDecode with fp32 — histogram and sort run on float keys -/// after a static_cast(InputT) at HBM-read sites. +/// Indexer TopK decode. Three tiers: +/// - GVR Heuristic (preIdx provided, K in {512,1024,2048}, numColumns in +/// [kSeqSmall, splitWorkThreshold), numRows below the +/// architecture-derived wave/L2 bound). +/// - Single-block (numColumns < split-work threshold) +/// - Multi-pass radix (numColumns >= split-work threshold; requires +/// `scratch` sized via indexerTopKDecodeScratchBytes, +/// zero-init on first call and may be reused). /// -/// Aborts with TLLM_CHECK if numColumns ≥ splitWorkThreshold; callers in -/// that regime must use the fp32 entry. +/// `is_prefill = true` forces single-block (split-work suppressed). +void invokeIndexerTopKDecode(float const* logits, int const* seqLens, int* indices, int const splitWorkThreshold, + int const numRows, int const numColumns, int const stride0, int const stride1, int const next_n, + int const topK = 2048, int const* preIdx = nullptr, int const preIdxStride = 0, int const preIdxCount = 0, + float* heuristicScratch = nullptr, cudaStream_t const stream = 0, void* scratch = nullptr, size_t scratchBytes = 0, + bool is_prefill = false); + +/// Size of the multi-pass radix `scratch` buffer for these shapes. +size_t indexerTopKDecodeScratchBytes(int numRows, int numColumns, int topK); + +/// bf16 overload; same contract. void invokeIndexerTopKDecode(__nv_bfloat16 const* logits, int const* seqLens, int* indices, int const splitWorkThreshold, int const numRows, int const numColumns, int const stride0, int const stride1, int const next_n, int const topK = 2048, int const* preIdx = nullptr, int const preIdxStride = 0, - int const preIdxCount = 0, __nv_bfloat16* heuristicScratch = nullptr, cudaStream_t const stream = 0); + int const preIdxCount = 0, __nv_bfloat16* heuristicScratch = nullptr, cudaStream_t const stream = 0, + void* scratch = nullptr, size_t scratchBytes = 0, bool is_prefill = false); -/// fp16 indexer TopK decode — see bf16 overload for dispatcher contract. +/// fp16 overload; same contract. void invokeIndexerTopKDecode(__half const* logits, int const* seqLens, int* indices, int const splitWorkThreshold, int const numRows, int const numColumns, int const stride0, int const stride1, int const next_n, int const topK = 2048, int const* preIdx = nullptr, int const preIdxStride = 0, int const preIdxCount = 0, - __half* heuristicScratch = nullptr, cudaStream_t const stream = 0); + __half* heuristicScratch = nullptr, cudaStream_t const stream = 0, void* scratch = nullptr, size_t scratchBytes = 0, + bool is_prefill = false); void invokeIndexerTopKPrefill(float const* logits, int const* rowStarts, int const* rowEnds, int* indices, int const numRows, int const numColumns, int const stride0, int const stride1, int const topK = 2048, cudaStream_t const stream = 0); -/// Returns true iff invokeIndexerTopKDecode would route to the GVR Heuristic -/// kernel for this (numRows, numColumns, topK) triple, assuming valid preIdx -/// is provided and stride1 == 1. Useful for callers that need to provision a -/// preIdx tensor or heuristicScratch buffer only when GVR will be selected. -/// -/// Mirrors the gating logic of the dispatcher: K ∈ {512, 1024, 2048}, -/// numColumns ∈ [kSeqSmall, splitWorkThreshold), numRows < kBsLarge, where -/// kBsLarge = min(kBsWave, kBsL2) and kBsL2 scales with bytesPerElem. -/// -/// @param numRows logits rows (batch · next_n) -/// @param numColumns logits columns (max sequence length) -/// @param topK requested output size -/// @param bytesPerElem element size of logits (4 for fp32, 2 for bf16/fp16) +/// True iff invokeIndexerTopKDecode would pick the GVR tier for this shape: +/// K in {512,1024,2048}, numColumns in [kSeqSmall, splitWorkThreshold), and +/// numRows below the architecture-derived wave/L2 bound. Lets callers +/// provision preIdx / heuristicScratch only when needed. bool canIndexerTopKDecodeUseGvr(int numRows, int numColumns, int topK, int bytesPerElem = 4); } // namespace kernels diff --git a/cpp/tensorrt_llm/kernels/contextFusedMultiHeadAttention/fused_multihead_attention_common.h b/cpp/tensorrt_llm/kernels/contextFusedMultiHeadAttention/fused_multihead_attention_common.h index d82ba97a29f3..68c567105665 100644 --- a/cpp/tensorrt_llm/kernels/contextFusedMultiHeadAttention/fused_multihead_attention_common.h +++ b/cpp/tensorrt_llm/kernels/contextFusedMultiHeadAttention/fused_multihead_attention_common.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2020-2025, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2020-2026, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. @@ -262,6 +262,11 @@ struct MHARunnerParams int totalQSeqLen; // The total number of KV sequence lengths in the batch. int totalKvSeqLen; + // Optional TRTLLM-Gen FMHA JIT warmup shape. + bool trtllmGenJITWarmup = false; + int32_t trtllmGenJITWarmupMaxNumRequests = 0; + int32_t trtllmGenJITWarmupMaxSeqLenQ = 0; + int32_t trtllmGenJITWarmupMaxSeqLenKv = 0; // Buffers. // The packed QKV buffer ptr. diff --git a/cpp/tensorrt_llm/kernels/customMoeRoutingKernels.cu b/cpp/tensorrt_llm/kernels/customMoeRoutingKernels.cu index c32b9662f832..58ccb4ac8ea8 100644 --- a/cpp/tensorrt_llm/kernels/customMoeRoutingKernels.cu +++ b/cpp/tensorrt_llm/kernels/customMoeRoutingKernels.cu @@ -39,7 +39,7 @@ static constexpr int WARP_SIZE = 32; // Default block size for kernels with small MaxNumExperts (<=128). // Large-expert variants (256/384/512) use a smaller block (see pickBlockSize) // to reduce register-file pressure and permit higher SM occupancy. -static constexpr int DEFAULT_BLOCK_SIZE = 1024; +static constexpr int DEFAULT_BLOCK_SIZE = 128; static constexpr int LARGE_BLOCK_SIZE = 256; template @@ -240,7 +240,7 @@ void invokeCustomMoeRouting(InputT* routerLogits, OutputT* topkValues, IdxT* top int64_t const numExperts, int64_t const topK, cudaStream_t const stream) { - const uint32_t maxNumBlocks = 1024; + const uint32_t maxNumBlocks = 8192; uint32_t maxNumExperts = nextPowerOfTwo(numExperts) < 32 ? 32 : nextPowerOfTwo(numExperts); uint32_t maxNumTopExperts = nextPowerOfTwo(topK); diff --git a/cpp/tensorrt_llm/kernels/cutlass_kernels/fp4_gemm/fp4_gemm_template.h b/cpp/tensorrt_llm/kernels/cutlass_kernels/fp4_gemm/fp4_gemm_template.h index f868c4634478..854581349af0 100644 --- a/cpp/tensorrt_llm/kernels/cutlass_kernels/fp4_gemm/fp4_gemm_template.h +++ b/cpp/tensorrt_llm/kernels/cutlass_kernels/fp4_gemm/fp4_gemm_template.h @@ -59,7 +59,7 @@ template , cute::Int<1>, cute::Int<1>, _1SM>(D, A, B, input_sf, weight_sf, global_sf, m, n, k, batch_count, gemmConfig, workspace, workspaceBytes, - stream, occupancy); + stream, occupancy, bias); break; case tkc::ClusterShape::ClusterShape_2x1x1: return genericFp4GemmKernelLauncher, cute::Int<1>, cute::Int<1>, _2SM>(D, A, B, input_sf, weight_sf, global_sf, m, n, k, batch_count, gemmConfig, workspace, workspaceBytes, - stream, occupancy); + stream, occupancy, bias); break; case tkc::ClusterShape::ClusterShape_1x2x1: return genericFp4GemmKernelLauncher, cute::Int<2>, cute::Int<1>, _1SM>(D, A, B, input_sf, weight_sf, global_sf, m, n, k, batch_count, gemmConfig, workspace, workspaceBytes, - stream, occupancy); + stream, occupancy, bias); break; case tkc::ClusterShape::ClusterShape_2x2x1: return genericFp4GemmKernelLauncher, cute::Int<2>, cute::Int<1>, _2SM>(D, A, B, input_sf, weight_sf, global_sf, m, n, k, batch_count, gemmConfig, workspace, workspaceBytes, - stream, occupancy); + stream, occupancy, bias); break; case tkc::ClusterShape::ClusterShape_1x4x1: return genericFp4GemmKernelLauncher, cute::Int<4>, cute::Int<1>, _1SM>(D, A, B, input_sf, weight_sf, global_sf, m, n, k, batch_count, gemmConfig, workspace, workspaceBytes, - stream, occupancy); + stream, occupancy, bias); break; case tkc::ClusterShape::ClusterShape_4x2x1: return genericFp4GemmKernelLauncher, cute::Int<2>, cute::Int<1>, _2SM>(D, A, B, input_sf, weight_sf, global_sf, m, n, k, batch_count, gemmConfig, workspace, workspaceBytes, - stream, occupancy); + stream, occupancy, bias); break; case tkc::ClusterShape::ClusterShape_2x4x1: return genericFp4GemmKernelLauncher, cute::Int<4>, cute::Int<1>, _2SM>(D, A, B, input_sf, weight_sf, global_sf, m, n, k, batch_count, gemmConfig, workspace, workspaceBytes, - stream, occupancy); + stream, occupancy, bias); break; case tkc::ClusterShape::ClusterShape_4x4x1: return genericFp4GemmKernelLauncher, cute::Int<4>, cute::Int<1>, _2SM>(D, A, B, input_sf, weight_sf, global_sf, m, n, k, batch_count, gemmConfig, workspace, workspaceBytes, - stream, occupancy); + stream, occupancy, bias); break; default: throw std::runtime_error( @@ -117,7 +117,7 @@ template size_t dispatchNVFP4xNVFP4GemmCTAShapeSm10x(T* D, void const* A, void const* B, void const* input_sf, void const* weight_sf, float const* global_sf, int m, int n, int k, int batch_count, tkc::CutlassGemmConfig gemmConfig, char* workspace, const size_t workspaceBytes, cudaStream_t stream, - int* occupancy = nullptr) + int* occupancy = nullptr, void const* bias = nullptr) { TLLM_LOG_DEBUG(__PRETTY_FUNCTION__); @@ -130,7 +130,7 @@ size_t dispatchNVFP4xNVFP4GemmCTAShapeSm10x(T* D, void const* A, void const* B, case tkc::CutlassTileConfigSM100::CtaShape##M##x##N##x##K##B: \ return dispatchNVFP4xNVFP4GemmClusterShapeSm10x, cute::Int, cute::Int>(D, A, B, \ input_sf, weight_sf, global_sf, m, n, k, batch_count, gemmConfig, workspace, workspaceBytes, stream, \ - occupancy); + occupancy, bias); #define CTA_CASE_DEFAULT \ case tkc::CutlassTileConfigSM100::Undefined: \ throw std::runtime_error("[TensorRT-LLM Error][FP4][dispatch_gemm_cta_shape] Gemm config undefined."); \ @@ -175,7 +175,7 @@ template size_t dispatchNVFP4xNVFP4GemmClusterShapeSm120(T* D, void const* A, void const* B, void const* input_sf, void const* weight_sf, float const* global_sf, int m, int n, int k, int batch_count, tkc::CutlassGemmConfig gemmConfig, char* workspace, const size_t workspaceBytes, cudaStream_t stream, - int* occupancy = nullptr) + int* occupancy = nullptr, void const* bias = nullptr) { TLLM_LOG_DEBUG(__PRETTY_FUNCTION__); @@ -185,7 +185,7 @@ size_t dispatchNVFP4xNVFP4GemmClusterShapeSm120(T* D, void const* A, void const* case tkc::ClusterShape::ClusterShape_1x1x1: return genericFp4GemmKernelLauncherSm120, cute::Int<1>, cute::Int<1>>(D, A, B, input_sf, weight_sf, global_sf, m, n, k, batch_count, gemmConfig, workspace, workspaceBytes, stream, - occupancy); + occupancy, bias); break; default: throw std::runtime_error( @@ -198,7 +198,7 @@ template size_t dispatchNVFP4xNVFP4GemmCTAShapeSm120(T* D, void const* A, void const* B, void const* input_sf, void const* weight_sf, float const* global_sf, int m, int n, int k, int batch_count, tkc::CutlassGemmConfig gemmConfig, char* workspace, const size_t workspaceBytes, cudaStream_t stream, - int* occupancy = nullptr) + int* occupancy = nullptr, void const* bias = nullptr) { TLLM_LOG_DEBUG(__PRETTY_FUNCTION__); @@ -209,17 +209,17 @@ size_t dispatchNVFP4xNVFP4GemmCTAShapeSm120(T* D, void const* A, void const* B, case tkc::CutlassTileConfigSM120::CtaShape128x128x128B: return dispatchNVFP4xNVFP4GemmClusterShapeSm120, cute::Int<128>, cute::Int<128>>(D, A, B, input_sf, weight_sf, global_sf, m, n, k, batch_count, gemmConfig, workspace, workspaceBytes, stream, - occupancy); + occupancy, bias); break; case tkc::CutlassTileConfigSM120::CtaShape128x128x256B: return dispatchNVFP4xNVFP4GemmClusterShapeSm120, cute::Int<128>, cute::Int<256>>(D, A, B, input_sf, weight_sf, global_sf, m, n, k, batch_count, gemmConfig, workspace, workspaceBytes, stream, - occupancy); + occupancy, bias); break; case tkc::CutlassTileConfigSM120::CtaShape256x128x128B: return dispatchNVFP4xNVFP4GemmClusterShapeSm120, cute::Int<128>, cute::Int<128>>(D, A, B, input_sf, weight_sf, global_sf, m, n, k, batch_count, gemmConfig, workspace, workspaceBytes, stream, - occupancy); + occupancy, bias); break; case tkc::CutlassTileConfigSM120::Undefined: throw std::runtime_error("[TensorRT LLM Error][FP4][sm120][dispatch_gemm_cta_shape] Gemm config undefined."); @@ -240,7 +240,7 @@ template size_t dispatchMXFP8xMXFP4GemmClusterShapeSm100(T* D, void const* A, void const* B, void const* input_sf, void const* weight_sf, float const* global_sf, int m, int n, int k, int batch_count, tkc::CutlassGemmConfig gemmConfig, char* workspace, const size_t workspaceBytes, cudaStream_t stream, - int* occupancy = nullptr) + int* occupancy = nullptr, void const* bias = nullptr) { TLLM_LOG_DEBUG(__PRETTY_FUNCTION__); @@ -250,27 +250,27 @@ size_t dispatchMXFP8xMXFP4GemmClusterShapeSm100(T* D, void const* A, void const* case tkc::ClusterShape::ClusterShape_2x1x1: return genericMXFP8xMXFP4GemmKernelLauncher, cute::Int<1>, cute::Int<1>, __2SM>(D, A, B, input_sf, weight_sf, global_sf, m, n, k, batch_count, gemmConfig, workspace, workspaceBytes, - stream, occupancy); + stream, occupancy, bias); break; case tkc::ClusterShape::ClusterShape_2x2x1: return genericMXFP8xMXFP4GemmKernelLauncher, cute::Int<2>, cute::Int<1>, __2SM>(D, A, B, input_sf, weight_sf, global_sf, m, n, k, batch_count, gemmConfig, workspace, workspaceBytes, - stream, occupancy); + stream, occupancy, bias); break; case tkc::ClusterShape::ClusterShape_4x2x1: return genericMXFP8xMXFP4GemmKernelLauncher, cute::Int<2>, cute::Int<1>, __2SM>(D, A, B, input_sf, weight_sf, global_sf, m, n, k, batch_count, gemmConfig, workspace, workspaceBytes, - stream, occupancy); + stream, occupancy, bias); break; case tkc::ClusterShape::ClusterShape_2x4x1: return genericMXFP8xMXFP4GemmKernelLauncher, cute::Int<4>, cute::Int<1>, __2SM>(D, A, B, input_sf, weight_sf, global_sf, m, n, k, batch_count, gemmConfig, workspace, workspaceBytes, - stream, occupancy); + stream, occupancy, bias); break; case tkc::ClusterShape::ClusterShape_4x4x1: return genericMXFP8xMXFP4GemmKernelLauncher, cute::Int<4>, cute::Int<1>, __2SM>(D, A, B, input_sf, weight_sf, global_sf, m, n, k, batch_count, gemmConfig, workspace, workspaceBytes, - stream, occupancy); + stream, occupancy, bias); break; default: throw std::runtime_error( @@ -283,7 +283,7 @@ template size_t dispatchMXFP8xMXFP4GemmCTAShapeSm100(T* D, void const* A, void const* B, void const* input_sf, void const* weight_sf, float const* global_sf, int m, int n, int k, int batch_count, tkc::CutlassGemmConfig gemmConfig, char* workspace, const size_t workspaceBytes, cudaStream_t stream, - int* occupancy = nullptr) + int* occupancy = nullptr, void const* bias = nullptr) { TLLM_LOG_DEBUG(__PRETTY_FUNCTION__); @@ -292,22 +292,22 @@ size_t dispatchMXFP8xMXFP4GemmCTAShapeSm100(T* D, void const* A, void const* B, case tkc::CutlassTileConfigSM100::CtaShape128x64x128B: return dispatchMXFP8xMXFP4GemmClusterShapeSm100, cute::Int<64>, cute::Int<128>>(D, A, B, input_sf, weight_sf, global_sf, m, n, k, batch_count, gemmConfig, workspace, workspaceBytes, stream, - occupancy); + occupancy, bias); break; case tkc::CutlassTileConfigSM100::CtaShape128x256x128B: return dispatchMXFP8xMXFP4GemmClusterShapeSm100, cute::Int<256>, cute::Int<128>>(D, A, B, input_sf, weight_sf, global_sf, m, n, k, batch_count, gemmConfig, workspace, workspaceBytes, stream, - occupancy); + occupancy, bias); break; case tkc::CutlassTileConfigSM100::CtaShape128x128x256B: return dispatchMXFP8xMXFP4GemmClusterShapeSm100, cute::Int<128>, cute::Int<256>>(D, A, B, input_sf, weight_sf, global_sf, m, n, k, batch_count, gemmConfig, workspace, workspaceBytes, stream, - occupancy); + occupancy, bias); break; case tkc::CutlassTileConfigSM100::CtaShape128x256x256B: return dispatchMXFP8xMXFP4GemmClusterShapeSm100, cute::Int<256>, cute::Int<256>>(D, A, B, input_sf, weight_sf, global_sf, m, n, k, batch_count, gemmConfig, workspace, workspaceBytes, stream, - occupancy); + occupancy, bias); break; case tkc::CutlassTileConfigSM100::Undefined: throw std::runtime_error("[TensorRT LLM Error][FP4][dispatch_gemm_cta_shape] Gemm config undefined."); @@ -343,14 +343,14 @@ template size_t CutlassFp4GemmRunner::dispatchToArch(T* D, void const* A, void const* B, void const* input_sf, void const* weight_sf, float const* global_sf, int m, int n, int k, int batch_count, tkc::CutlassGemmConfig gemmConfig, char* workspace, const size_t workspaceBytes, cudaStream_t stream, - int* occupancy) + int* occupancy, void const* bias) { if constexpr (fp4GemmType == FP4GemmType::W4A8_MXFP4_MXFP8) { if (mSm == 100 || mSm == 103) { return dispatchMXFP8xMXFP4GemmCTAShapeSm100(D, A, B, input_sf, weight_sf, global_sf, m, n, k, - batch_count, gemmConfig, workspace, workspaceBytes, stream, occupancy); + batch_count, gemmConfig, workspace, workspaceBytes, stream, occupancy, bias); } else { @@ -364,21 +364,21 @@ size_t CutlassFp4GemmRunner::dispatchToArch(T* D, void const* A, { #ifdef COMPILE_BLACKWELL_SM103_TMA_GEMMS return dispatchNVFP4xNVFP4GemmCTAShapeSm10x(D, A, B, input_sf, weight_sf, - global_sf, m, n, k, batch_count, gemmConfig, workspace, workspaceBytes, stream, occupancy); + global_sf, m, n, k, batch_count, gemmConfig, workspace, workspaceBytes, stream, occupancy, bias); #else return dispatchNVFP4xNVFP4GemmCTAShapeSm10x(D, A, B, input_sf, weight_sf, - global_sf, m, n, k, batch_count, gemmConfig, workspace, workspaceBytes, stream, occupancy); + global_sf, m, n, k, batch_count, gemmConfig, workspace, workspaceBytes, stream, occupancy, bias); #endif } else if (mSm == 100) { return dispatchNVFP4xNVFP4GemmCTAShapeSm10x(D, A, B, input_sf, weight_sf, - global_sf, m, n, k, batch_count, gemmConfig, workspace, workspaceBytes, stream, occupancy); + global_sf, m, n, k, batch_count, gemmConfig, workspace, workspaceBytes, stream, occupancy, bias); } else if (mSm == 120 || mSm == 121) { return dispatchNVFP4xNVFP4GemmCTAShapeSm120(D, A, B, input_sf, weight_sf, global_sf, m, n, k, - batch_count, gemmConfig, workspace, workspaceBytes, stream, occupancy); + batch_count, gemmConfig, workspace, workspaceBytes, stream, occupancy, bias); } else { @@ -396,11 +396,12 @@ size_t CutlassFp4GemmRunner::dispatchToArch(T* D, void const* A, template void CutlassFp4GemmRunner::gemm(void* D, void const* A, void const* B, void const* input_sf, void const* weight_sf, float const* global_sf, int m, int n, int k, int batch_count, - tkc::CutlassGemmConfig gemmConfig, char* workspace, const size_t workspaceBytes, cudaStream_t stream) + tkc::CutlassGemmConfig gemmConfig, char* workspace, const size_t workspaceBytes, cudaStream_t stream, + void const* bias) { TLLM_LOG_DEBUG(__PRETTY_FUNCTION__); CutlassFp4GemmRunner::dispatchToArch(reinterpret_cast(D), A, B, input_sf, weight_sf, global_sf, - m, n, k, batch_count, gemmConfig, workspace, workspaceBytes, stream); + m, n, k, batch_count, gemmConfig, workspace, workspaceBytes, stream, /*occupancy=*/nullptr, bias); } template diff --git a/cpp/tensorrt_llm/kernels/cutlass_kernels/fp4_gemm/mxfp8_mxfp4_gemm_template_sm100.h b/cpp/tensorrt_llm/kernels/cutlass_kernels/fp4_gemm/mxfp8_mxfp4_gemm_template_sm100.h index 3970563bc10c..276de55c69dc 100644 --- a/cpp/tensorrt_llm/kernels/cutlass_kernels/fp4_gemm/mxfp8_mxfp4_gemm_template_sm100.h +++ b/cpp/tensorrt_llm/kernels/cutlass_kernels/fp4_gemm/mxfp8_mxfp4_gemm_template_sm100.h @@ -91,7 +91,7 @@ template ; using LayoutB = cutlass::layout::ColumnMajor; static constexpr int AlignmentB = 128; - /* // Input C */ + /* // Input C: ElementC=void; per-N bias via LinCombPerColBias EVT. */ using ElementC = void; using LayoutC = cutlass::layout::RowMajor; static constexpr int AlignmentC = 128 / cutlass::sizeof_bits::value; @@ -131,7 +131,7 @@ struct DeviceGemmMXFP8xMXFP4GemmSm100 using CollectiveEpilogue = typename cutlass::epilogue::collective::CollectiveBuilder>::CollectiveOp; + cutlass::epilogue::fusion::LinCombPerColBias>::CollectiveOp; using CollectiveMainloop = typename cutlass::gemm::collective::CollectiveBuilder typename Gemm::Arguments prepareGemmArgsSm100(void* D, void const* A, void const* B, void const* input_sf, - void const* weight_sf, float const* global_sf, int m, int n, int k, int batch_count, dim3 prefered_cga, int XSM) + void const* weight_sf, float const* global_sf, int m, int n, int k, int batch_count, dim3 prefered_cga, int XSM, + void const* bias = nullptr) { using Sm1xxBlkScaledConfig = typename Gemm::GemmKernel::CollectiveMainloop::Sm1xxBlkScaledConfig; using ElementA = typename Gemm::ElementA; @@ -186,6 +187,7 @@ typename Gemm::Arguments prepareGemmArgsSm100(void* D, void const* A, void const operator_args.mode = cutlass::gemm::GemmUniversalMode::kGemm; auto& fusion_args = operator_args.epilogue.thread; fusion_args.alpha_ptr = static_cast(global_sf); + fusion_args.bias_ptr = static_cast(bias); operator_args.problem_shape = cute::make_shape(m, n, k, batch_count); @@ -228,7 +230,7 @@ template ::value, cutlass::half_t, T>::type; @@ -243,7 +245,7 @@ size_t genericMXFP8xMXFP4GemmKernelLauncher(void* D, void const* A, void const* typename DeviceGemmMXFP8xMXFP4GemmSm100::Gemm; MXFP8xMXFP4GemmOperator gemm; auto args = prepareGemmArgsSm100(D, A, B, input_sf, weight_sf, global_sf, m, n, k, - batch_count, dim3(CGA_M{}, CGA_N{}, CGA_K{}), MXSMTypeAdapter::Scale); + batch_count, dim3(CGA_M{}, CGA_N{}, CGA_K{}), MXSMTypeAdapter::Scale, bias); /* // Check shared memory size; throw when SMEM exceeds */ int smem_size = int(sizeof(typename MXFP8xMXFP4GemmOperator::GemmKernel::SharedStorage)); static int mMaxSmemSize = tk::getMaxSharedMemoryPerBlockOptin(); diff --git a/cpp/tensorrt_llm/kernels/cutlass_kernels/fp4_gemm/nvfp4_nvfp4_gemm_template_sm100.h b/cpp/tensorrt_llm/kernels/cutlass_kernels/fp4_gemm/nvfp4_nvfp4_gemm_template_sm100.h index 277a16aa1b91..013dc4830312 100644 --- a/cpp/tensorrt_llm/kernels/cutlass_kernels/fp4_gemm/nvfp4_nvfp4_gemm_template_sm100.h +++ b/cpp/tensorrt_llm/kernels/cutlass_kernels/fp4_gemm/nvfp4_nvfp4_gemm_template_sm100.h @@ -108,7 +108,7 @@ template size_t genericFp4GemmKernelLauncher(void* D, void const* A, void const* B, void const* input_sf, void const* weight_sf, float const* global_sf, int m, int n, int k, int batch_count, tkc::CutlassGemmConfig gemmConfig, char* workspace, - size_t const workspaceBytes, cudaStream_t stream, int* occupancy) + size_t const workspaceBytes, cudaStream_t stream, int* occupancy, void const* bias = nullptr) { static_assert(always_false, "Kernel should be explicitly instantiated."); return 0; @@ -122,7 +122,7 @@ size_t genericFp4GemmKernelLauncher(void* D, void const* A, void const* B, void cute::Int, cute::Int, cute::Int, cute::Int, XSM_>(void* D, void const* A, \ void const* B, void const* input_sf, void const* weight_sf, float const* global_sf, int m, int n, int k, \ int batch_count, tkc::CutlassGemmConfig gemmConfig, char* workspace, const size_t workspaceBytes, \ - cudaStream_t stream, int* occupancy) \ + cudaStream_t stream, int* occupancy, void const* bias) \ { \ throw std::runtime_error( \ "[TensorRT LLM Error][FP4 gemm Runner] TensorRT LLM is not compiled with support for this Architecture."); \ @@ -147,7 +147,7 @@ size_t genericFp4GemmKernelLauncher(void* D, void const* A, void const* B, void using ElementB = ElementType; \ using LayoutB = cutlass::layout::ColumnMajor; \ static constexpr int AlignmentB = 128 / cutlass::sizeof_bits::value; \ - /* // Input C */ \ + /* // Input C: ElementC=void (no C-tile SMEM); per-N bias via LinCombPerColBias EVT below. */ \ using ElementC = void; \ using LayoutC = cutlass::layout::RowMajor; \ static constexpr int AlignmentC = 128 / cutlass::sizeof_bits::value; \ @@ -162,10 +162,12 @@ size_t genericFp4GemmKernelLauncher(void* D, void const* A, void const* B, void using MainloopSchedule = SMTypeAdapter::MainloopSchedule; \ using MmaTileShape = cute::Shape::Scale>, cute::Int, \ cute::Int ? 3 : 1)>>; \ + /* D = alpha * Acc + bias[N]; bias_ptr=null resolves to null_default=0 (no-op). */ \ using CollectiveEpilogue = typename cutlass::epilogue::collective::CollectiveBuilder>::CollectiveOp; \ + cutlass::epilogue::fusion::LinCombPerColBias>::CollectiveOp; \ \ using CollectiveMainloop = typename cutlass::gemm::collective::CollectiveBuilder, LayoutA, AlignmentA, \ @@ -205,7 +207,7 @@ size_t genericFp4GemmKernelLauncher(void* D, void const* A, void const* B, void typename Gemm::Arguments \ prepareGemmArgs_##ARCH_##_##T##_##CTA_M_##_##CTA_N_##_##CTA_K_##_##CGA_M_##_##CGA_N_##_##CGA_K_##XSM_(void* D, \ void const* A, void const* B, void const* input_sf, void const* weight_sf, float const* global_sf, int m, \ - int n, int k, int batch_count) \ + int n, int k, int batch_count, void const* bias = nullptr) \ { \ using Sm1xxBlkScaledConfig = typename Gemm::GemmKernel::CollectiveMainloop::Sm1xxBlkScaledConfig; \ using ElementA = typename Gemm::ElementA; \ @@ -220,6 +222,7 @@ size_t genericFp4GemmKernelLauncher(void* D, void const* A, void const* B, void operator_args.mode = cutlass::gemm::GemmUniversalMode::kGemm; \ auto& fusion_args = operator_args.epilogue.thread; \ fusion_args.alpha_ptr = static_cast(global_sf); \ + fusion_args.bias_ptr = static_cast(bias); \ \ operator_args.problem_shape = cute::make_shape(m, n, k, batch_count); \ \ @@ -263,7 +266,7 @@ size_t genericFp4GemmKernelLauncher(void* D, void const* A, void const* B, void cute::Int, cute::Int, cute::Int, cute::Int, XSM_>(void* D, void const* A, \ void const* B, void const* input_sf, void const* weight_sf, float const* global_sf, int m, int n, int k, \ int batch_count, tkc::CutlassGemmConfig gemmConfig, char* workspace, const size_t workspaceBytes, \ - cudaStream_t stream, int* occupancy) \ + cudaStream_t stream, int* occupancy, void const* bias) \ { \ using ElementOutput__ = typename cutlass::platform::conditional::value, \ cutlass::half_t, T>::type; \ @@ -280,7 +283,7 @@ size_t genericFp4GemmKernelLauncher(void* D, void const* A, void const* B, void Fp4GemmOperator gemm; \ auto args \ = prepareGemmArgs_##ARCH_##_##T##_##CTA_M_##_##CTA_N_##_##CTA_K_##_##CGA_M_##_##CGA_N_##_##CGA_K_##XSM_< \ - Fp4GemmOperator>(D, A, B, input_sf, weight_sf, global_sf, m, n, k, batch_count); \ + Fp4GemmOperator>(D, A, B, input_sf, weight_sf, global_sf, m, n, k, batch_count, bias); \ /* // Check shared memory size; throw when SMEM exceeds */ \ int smem_size = int(sizeof(typename Fp4GemmOperator::GemmKernel::SharedStorage)); \ static int mMaxSmemSize = tk::getMaxSharedMemoryPerBlockOptin(); \ diff --git a/cpp/tensorrt_llm/kernels/cutlass_kernels/fp4_gemm/nvfp4_nvfp4_gemm_template_sm120.h b/cpp/tensorrt_llm/kernels/cutlass_kernels/fp4_gemm/nvfp4_nvfp4_gemm_template_sm120.h index eaa3378acb0e..315d760bb417 100644 --- a/cpp/tensorrt_llm/kernels/cutlass_kernels/fp4_gemm/nvfp4_nvfp4_gemm_template_sm120.h +++ b/cpp/tensorrt_llm/kernels/cutlass_kernels/fp4_gemm/nvfp4_nvfp4_gemm_template_sm120.h @@ -52,7 +52,7 @@ template , "Kernel should be explicitly instantiated."); return 0; @@ -66,7 +66,7 @@ size_t genericFp4GemmKernelLauncherSm120(void* D, void const* A, void const* B, cute::Int, cute::Int, cute::Int>(void* D, void const* A, void const* B, \ void const* input_sf, void const* weight_sf, float const* global_sf, int m, int n, int k, int batch_count, \ tkc::CutlassGemmConfig gemmConfig, char* workspace, const size_t workspaceBytes, cudaStream_t stream, \ - int* occupancy) \ + int* occupancy, void const* bias) \ { \ throw std::runtime_error( \ "[TensorRT LLM Error][FP4 gemm Runner] TensorRT LLM is not compiled with support for this Architecture."); \ @@ -89,7 +89,7 @@ size_t genericFp4GemmKernelLauncherSm120(void* D, void const* A, void const* B, using ElementB = cutlass::float_e2m1_t; \ using LayoutB = cutlass::layout::ColumnMajor; \ static constexpr int AlignmentB = 16 * 8 / cutlass::sizeof_bits::value; \ - /* // Input C */ \ + /* // Input C: ElementC=void (no C-tile SMEM); per-N bias via LinCombPerColBias EVT. */ \ using ElementC = void; \ using LayoutC = cutlass::layout::ColumnMajor; \ using LayoutD = cutlass::layout::RowMajor; \ @@ -98,7 +98,7 @@ size_t genericFp4GemmKernelLauncherSm120(void* D, void const* A, void const* B, using ElementPairA = cutlass::nv_float4_t; \ using ElementPairB = cutlass::nv_float4_t; \ using SFType = cutlass::float_ue4m3_t; \ - using FusionOperation = cutlass::epilogue::fusion::LinearCombination; \ + using FusionOperation = cutlass::epilogue::fusion::LinCombPerColBias; \ using ElementCompute = float; \ using ElementAccumulator = float; \ using CollectiveEpilogue = typename cutlass::epilogue::collective::CollectiveBuilder(global_sf); \ + fusion_args.bias_ptr = static_cast(bias); \ \ operator_args.problem_shape = cute::make_shape(m, n, k, batch_count); \ \ @@ -201,7 +202,7 @@ size_t genericFp4GemmKernelLauncherSm120(void* D, void const* A, void const* B, cute::Int, cute::Int, cute::Int>(void* D, void const* A, void const* B, \ void const* input_sf, void const* weight_sf, float const* global_sf, int m, int n, int k, int batch_count, \ tkc::CutlassGemmConfig gemmConfig, char* workspace, const size_t workspaceBytes, cudaStream_t stream, \ - int* occupancy) \ + int* occupancy, void const* bias) \ { \ using ElementOutput__ = typename cutlass::platform::conditional::value, \ cutlass::half_t, T>::type; \ @@ -216,7 +217,7 @@ size_t genericFp4GemmKernelLauncherSm120(void* D, void const* A, void const* B, = DeviceGemmFp4GemmSm120_##T##_##CTA_M_##_##CTA_N_##_##CTA_K_##_##CGA_M_##_##CGA_N_##_##CGA_K_::Gemm; \ Fp4GemmOperator gemm; \ auto args = prepareGemmArgs_Sm120_##T##_##CTA_M_##_##CTA_N_##_##CTA_K_##_##CGA_M_##_##CGA_N_##_##CGA_K_< \ - Fp4GemmOperator>(D, A, B, input_sf, weight_sf, global_sf, m, n, k, batch_count); \ + Fp4GemmOperator>(D, A, B, input_sf, weight_sf, global_sf, m, n, k, batch_count, bias); \ /* // Check shared memory size; throw when SMEM exceeds */ \ int smem_size = int(sizeof(typename Fp4GemmOperator::GemmKernel::SharedStorage)); \ static int mMaxSmemSize = tk::getMaxSharedMemoryPerBlockOptin(); \ diff --git a/cpp/tensorrt_llm/kernels/cutlass_kernels/include/fp4_gemm.h b/cpp/tensorrt_llm/kernels/cutlass_kernels/include/fp4_gemm.h index 944dbc0227da..b0e8a307df79 100644 --- a/cpp/tensorrt_llm/kernels/cutlass_kernels/include/fp4_gemm.h +++ b/cpp/tensorrt_llm/kernels/cutlass_kernels/include/fp4_gemm.h @@ -54,7 +54,7 @@ class CutlassFp4GemmRunnerInterface virtual void gemm(void* D, void const* A, void const* B, void const* input_sf, void const* weight_sf, float const* global_sf, int m, int n, int k, int batch_count, tkc::CutlassGemmConfig gemmConfig, - char* workspace, const size_t workspaceBytes, cudaStream_t stream) + char* workspace, const size_t workspaceBytes, cudaStream_t stream, void const* bias = nullptr) = 0; // Returns desired workspace size in bytes. @@ -78,7 +78,7 @@ class CutlassFp4GemmRunner : public virtual CutlassFp4GemmRunnerInterface void gemm(void* D, void const* A, void const* B, void const* input_sf, void const* weight_sf, float const* global_sf, int m, int n, int k, int batch_count, tkc::CutlassGemmConfig gemmConfig, - char* workspace, const size_t workspaceBytes, cudaStream_t stream) override; + char* workspace, const size_t workspaceBytes, cudaStream_t stream, void const* bias = nullptr) override; // Returns desired workspace size in bytes. size_t getWorkspaceSize(int const m, int const n, int const k, int const batch_count) override; @@ -88,7 +88,8 @@ class CutlassFp4GemmRunner : public virtual CutlassFp4GemmRunnerInterface private: size_t dispatchToArch(T* D, void const* A, void const* B, void const* input_sf, void const* weight_sf, float const* global_sf, int m, int n, int k, int batch_count, tkc::CutlassGemmConfig gemmConfig, - char* workspace, const size_t workspaceBytes, cudaStream_t stream, int* occupancy = nullptr); + char* workspace, const size_t workspaceBytes, cudaStream_t stream, int* occupancy = nullptr, + void const* bias = nullptr); size_t getWorkspaceSizeImpl(int const m, int const n, int const k, int const batch_count); diff --git a/cpp/tensorrt_llm/kernels/cutlass_kernels/include/moe_kernels.h b/cpp/tensorrt_llm/kernels/cutlass_kernels/include/moe_kernels.h index 4e76d2be5614..216877a4ffc7 100644 --- a/cpp/tensorrt_llm/kernels/cutlass_kernels/include/moe_kernels.h +++ b/cpp/tensorrt_llm/kernels/cutlass_kernels/include/moe_kernels.h @@ -21,6 +21,7 @@ #include "tensorrt_llm/common/cudaUtils.h" #include "tensorrt_llm/common/quantization.h" #include "tensorrt_llm/kernels/cutlass_kernels/fp8_blockscale_gemm/fp8_blockscale_gemm.h" +#include "tensorrt_llm/kernels/cutlass_kernels/include/moe_lora_device_path.h" #include #ifdef ENABLE_FP4 #include @@ -68,6 +69,14 @@ struct LoraParams cudaEvent_t* memcpy_event_ptr; + // Device-side capture-safe LoRA path scratch. When device_path.enabled is + // true, the kernel uses launchMoeLoraPointerExpand, launchMoeLoraProblemBuilder, + // and cudaGraph(SplitK)GroupedGemm instead of the legacy host-pointer + // LoraImpl::run path. The pointers refer to persistent allocations owned by + // the calling FusedMoeRunner, so their addresses are stable across + // CUDA-graph captures and replays. + ::tensorrt_llm::kernels::cutlass_kernels::MoeLoraDevicePath device_path; + LoraParams() = default; LoraParams(int num_reqs, int32_t const* fc1_lora_ranks, void const* const* fc1_lora_weight_ptrs, diff --git a/cpp/tensorrt_llm/kernels/cutlass_kernels/include/moe_lora_device_path.h b/cpp/tensorrt_llm/kernels/cutlass_kernels/include/moe_lora_device_path.h new file mode 100644 index 000000000000..2d2c133255c4 --- /dev/null +++ b/cpp/tensorrt_llm/kernels/cutlass_kernels/include/moe_lora_device_path.h @@ -0,0 +1,149 @@ +/* + * Copyright (c) 2026, NVIDIA CORPORATION. All rights reserved. + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#pragma once + +#include "tensorrt_llm/common/config.h" + +#include + +#include +#include + +TRTLLM_NAMESPACE_BEGIN + +namespace kernels::cutlass_kernels +{ + +// Forward declaration; the typedef below references it by name. +struct MoeLoraDevicePathModule; + +// Function-pointer dispatch for the libtorch-dependent GEMM stage of the MoE +// LoRA device path. The implementation lives in th_common (moeOp.cpp) because +// the cudaGraph(SplitK)GroupedGemm wrappers allocate workspace via at::Tensor, +// which cannot be linked from libmoe_gemm_src.a (that archive is also linked +// into the TensorRT plugin, which must not depend on libtorch). +// +// It repacks mod into a MoeLoraGemmGroupArrays, runs the problem builder, and +// dispatches the in/out GEMMs, accumulating into output_base (which the caller +// must initialize). data_type is the scalar dtype (fp16/bf16/fp32). +using MoeLoraDeviceRunFn = void (*)(MoeLoraDevicePathModule const& mod, int64_t num_permuted_tokens, + int64_t in_hidden_size, int64_t max_lora_rank, int64_t dtype_bytes, int64_t splitk_slices, void const* input_base, + void* output_base, nvinfer1::DataType data_type, cudaStream_t stream); + +// Per-module device-resident scratch for the MoE LoRA capture-safe path. +// Pointers refer to device memory unless noted. +// +// The struct is typed with void* rather than the concrete +// cutlass::gemm::GemmCoord* / int64_t* types so this header can be included +// from moe_kernels.h without dragging in cutlass headers. The concrete types +// are recovered at the call site (matching the contract documented in +// moe_lora_problem_builder.h): +// +// problem_sizes_* -> cutlass::gemm::GemmCoord* (device, [P_max]) +// a_ptrs_*/b/d -> void** (device, [P_max]) +// lda/ldb/ldd_* -> int64_t* (device, [P_max]) +// splitk_offsets -> int64_t* (device, [P_max + 1]) +// lowrank_ws_dev -> void* (device, [P_max, max_lora_rank, dtype_bytes]) +// host_max_* -> cutlass::gemm::GemmCoord* (pinned host, [1]) +// +// The split-K in-GEMM's partial-sum scratch is allocated internally by the +// cuda_graph_split_k_grouped_gemm wrapper (sized from the host max-problem +// hint); only the per-problem splitk_offsets are produced here. +// +// out_hidden_size is the trailing dimension of the module's output buffer; it +// is inter_size for fc1/gated and hidden_size for fc2. The output base address +// itself is passed directly to runMoeLoraDeviceModule at the call site. +struct MoeLoraDevicePathModule +{ + // Per-source-token (rank, A_ptr, B_ptr) device mirrors, staged via a + // pinned-host to device async H2D in FusedMoeRunner::buildMoeLoraParams. + // These feed launchMoeLoraPointerExpand as ranks_src / ptrs_src. + int32_t const* ranks_src_dev = nullptr; + int64_t const* ptrs_src_dev = nullptr; + + // Inner (A) and outer (B) dimensions for this module, fed to the + // pointer-expand kernel as dim_a / dim_b so it can compute the per-expert + // offset weight_index * dim * lora_rank. For fc1/gated this is + // (hidden_size, inter_size); for fc2 it is (inter_size, hidden_size). + int64_t dim_a = 0; + int64_t dim_b = 0; + + // Per-permuted-row (rank, A_ptr + offset, B_ptr + offset). + int32_t* permuted_ranks_dev = nullptr; + int64_t* permuted_ptrs_dev = nullptr; + + // cuda_graph_(split_k_)grouped_gemm-ready bundle. + void* problem_sizes_in_dev = nullptr; + void* problem_sizes_out_dev = nullptr; + void** a_ptrs_in_dev = nullptr; + void** b_ptrs_in_dev = nullptr; + void** d_ptrs_in_dev = nullptr; + void** b_ptrs_out_dev = nullptr; + void** d_ptrs_out_dev = nullptr; + int64_t* lda_in_dev = nullptr; + int64_t* ldb_in_dev = nullptr; + int64_t* ldd_in_dev = nullptr; + int64_t* ldb_out_dev = nullptr; + int64_t* ldd_out_dev = nullptr; + int64_t* splitk_offsets_dev = nullptr; + + // Low-rank intermediate workspace shared between the in- and out-GEMM. The + // split-K partial-sum scratch is owned by the GEMM wrapper, not here. + void* lowrank_workspace_dev = nullptr; + + // Host (pinned) per-call max problem size hints, required by the + // cuda_graph_*_grouped_gemm wrappers for kernel selection. The + // values are upper bounds (max_M, max_N, max_K) safe to fix at + // warmup time. + void* host_max_problem_in_pinned = nullptr; + void* host_max_problem_out_pinned = nullptr; + + // Trailing dimension of the module's output buffer (inter_size for + // fc1/gated, hidden_size for fc2). The output base address is supplied + // directly to runMoeLoraDeviceModule at the call site. + int64_t out_hidden_size = 0; +}; + +// Top-level device-path bundle attached to LoraParams when the device LoRA +// path is active. enabled == false means the FusedMoeRunner runs the legacy +// host path. +struct MoeLoraDevicePath +{ + bool enabled = false; + + // Scalars common to all three modules. Fixed for the lifetime of the + // FusedMoeRunner once the scratch is allocated. + int64_t in_hidden_size = 0; + int64_t max_lora_rank = 0; + int64_t dtype_bytes = 0; + int64_t splitk_slices = 0; + + bool has_gated = false; + + // libtorch-bound GEMM dispatch entry point, populated by moeOp.cpp when the + // device path is enabled. nullptr means the device path is unavailable from + // this consumer (for example, the TensorRT plugin). + MoeLoraDeviceRunFn run = nullptr; + + MoeLoraDevicePathModule fc1; + MoeLoraDevicePathModule fc2; + MoeLoraDevicePathModule gated; +}; + +} // namespace kernels::cutlass_kernels + +TRTLLM_NAMESPACE_END diff --git a/cpp/tensorrt_llm/kernels/cutlass_kernels/include/moe_lora_pointer_expand.h b/cpp/tensorrt_llm/kernels/cutlass_kernels/include/moe_lora_pointer_expand.h new file mode 100644 index 000000000000..c2f509c4ed9c --- /dev/null +++ b/cpp/tensorrt_llm/kernels/cutlass_kernels/include/moe_lora_pointer_expand.h @@ -0,0 +1,81 @@ +/* + * Copyright (c) 2026, NVIDIA CORPORATION. All rights reserved. + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#pragma once + +#include "tensorrt_llm/common/config.h" + +#include +#include + +TRTLLM_NAMESPACE_BEGIN + +namespace kernels::cutlass_kernels +{ + +// Device-side description of one LoRA module (fc1, fc2, or gated) for the +// MoE per-token A/B pointer-table expansion. All pointers refer to device +// memory. +// +// Inputs (per source token, indexed by the pre-permutation source row index): +// ranks_src: int32 [num_rows], per-source-token LoRA rank. +// ptrs_src: int64 [num_rows * 2], pointer bits laid out as (A_ptr, B_ptr) +// per source token. +// +// Outputs (per permuted row, sized expanded_num_rows == num_rows * top_k): +// ranks_out: int32 [expanded_num_rows], per-permuted-row LoRA rank. +// ptrs_out: int64 [expanded_num_rows * 2], per-permuted-row +// (A_ptr + offset, B_ptr + offset). The per-expert offset is +// weight_index * dim * rank * lora_dtype_bytes, so the consumer +// can reinterpret directly as the LoRA scalar type. +// +// dim_a and dim_b are the non-rank dimension of A and B respectively: +// fc1/gated use (hidden_size, inter_size); fc2 uses (inter_size, hidden_size). +struct MoeLoraExpandModule +{ + int32_t const* ranks_src = nullptr; + int64_t const* ptrs_src = nullptr; + int64_t dim_a = 0; + int64_t dim_b = 0; + int32_t* ranks_out = nullptr; + int64_t* ptrs_out = nullptr; +}; + +// Device-side replacement for the host-CPU pointer fan-out in +// CutlassMoeFCRunner::setupLoraWorkspace. Reads per-source-token LoRA metadata +// and permuted_rows, and writes per-permuted-row pointer tables directly into +// device memory. It performs no host synchronization and no cudaMemcpyAsync +// staging, so it is safe to launch from a captured CUDA graph. +// +// expert_first_token_offset has shape [num_experts_per_node + 1] (int64, +// device-resident). The kernel uses it both to find the expert a permuted row +// belongs to and to derive weight_index = local_expert_idx + start_expert for +// the per-expert weight-buffer stride. +// +// lora_dtype_bytes is the size in bytes of the LoRA matrix scalar (e.g. 2 for +// bf16/fp16). It scales the stride applied to the A/B pointers so consumers can +// reinterpret the result directly as the appropriate scalar type. +// +// gated may be nullptr for non-gated activations; when non-null, the gated +// module's outputs are produced in the same pass. +void launchMoeLoraPointerExpand(int32_t const* permuted_rows, int64_t const* expert_first_token_offset, + int32_t num_experts_per_node, int32_t start_expert, int64_t num_rows, int64_t expanded_num_rows, + int64_t lora_dtype_bytes, MoeLoraExpandModule const& fc1, MoeLoraExpandModule const& fc2, + MoeLoraExpandModule const* gated, cudaStream_t stream); + +} // namespace kernels::cutlass_kernels + +TRTLLM_NAMESPACE_END diff --git a/cpp/tensorrt_llm/kernels/cutlass_kernels/include/moe_lora_problem_builder.h b/cpp/tensorrt_llm/kernels/cutlass_kernels/include/moe_lora_problem_builder.h new file mode 100644 index 000000000000..a71e89b87864 --- /dev/null +++ b/cpp/tensorrt_llm/kernels/cutlass_kernels/include/moe_lora_problem_builder.h @@ -0,0 +1,118 @@ +/* + * Copyright (c) 2026, NVIDIA CORPORATION. All rights reserved. + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#pragma once + +#include "tensorrt_llm/common/config.h" + +#include "cutlass/gemm_coord.h" + +#include +#include + +TRTLLM_NAMESPACE_BEGIN + +namespace kernels::cutlass_kernels +{ + +// Caller-owned device-output bundle for one LoRA module. Each array is sized +// for the maximum permuted-token count the FusedMoeRunner expects to see; +// the builder fills the first num_permuted_tokens entries each call. +// +// Layout convention (mirrors attention LoRA in cuda_graph_grouped_gemm.h): +// In-GEMM: D = A @ B with C aliased to D when there's no bias. +// A = input slice [M=1, K=in_hidden_size] +// B = adapter A [K=in_hidden_size, N=rank] +// D = lowrank slice [M=1, N=rank] +// Out-GEMM: D = A @ B with C aliased to D. +// A = lowrank slice [M=1, K=rank] (= in-GEMM's D) +// B = adapter B [K=rank, N=out_hidden_size] +// D = output slice [M=1, N=out_hidden_size] +// +// Because ptrC aliases ptrD in both GEMMs (no bias), only ptrD is exposed +// per GEMM; the cuda_graph_grouped_gemm wrapper accepts the same address +// for both. d_ptrs_in also serves as a_ptrs_out (the LoRA intermediate is +// the input to the second GEMM); only one set of low-rank pointers is +// produced for that reason. +struct MoeLoraGemmGroupArrays +{ + // Per-problem (M, N, K) for the in-GEMM and out-GEMM respectively. + cutlass::gemm::GemmCoord* problem_sizes_in = nullptr; // [P] + cutlass::gemm::GemmCoord* problem_sizes_out = nullptr; // [P] + + // In-GEMM pointer arrays. ptr_c_in is implicit (== d_ptrs_in). + void** a_ptrs_in = nullptr; // [P]: input row pointer + void** b_ptrs_in = nullptr; // [P]: adapter A pointer (with per-expert offset) + void** d_ptrs_in = nullptr; // [P]: lowrank workspace row (also a_ptrs_out) + + // Out-GEMM pointer arrays. ptr_c_out is implicit (== d_ptrs_out). + void** b_ptrs_out = nullptr; // [P]: adapter B pointer (with per-expert offset) + void** d_ptrs_out = nullptr; // [P]: output row pointer + + // Leading dimensions. All row-major, fixed per problem given uniform + // input / lowrank-workspace / output strides. + int64_t* lda_in = nullptr; // [P]: in_hidden_size + int64_t* ldb_in = nullptr; // [P]: in_hidden_size (stride in adapter-A storage) + int64_t* ldd_in = nullptr; // [P]: max_lora_rank (workspace stride) + int64_t* ldb_out = nullptr; // [P]: per-token rank (stride in adapter-B storage) + int64_t* ldd_out = nullptr; // [P]: out_hidden_size + + // Per-problem exclusive prefix offset into the split-K scratch buffer + // used by the in-GEMM. Element [P] (one past the end) holds the total + // scratch size in fp32 elements, matching the layout that + // cuda_graph_split_k_grouped_gemm consumes. + int64_t* splitk_offsets = nullptr; // [P + 1] +}; + +// Device-side problem-and-pointer builder for one MoE LoRA module. It consumes +// the per-permuted-row outputs of launchMoeLoraPointerExpand plus uniform +// input, workspace, and output base addresses, and writes every device-resident +// input the cuda_graph_(split_k_)grouped_gemm wrappers need. +// +// Inputs: +// ranks_dev: int32 [P], per-permuted-row LoRA rank. +// ptrs_dev: int64 [P*2], per-permuted-row (A_ptr + offset, B_ptr + offset), +// already adjusted for the per-expert weight stride by the +// pointer-expand kernel. +// +// Base pointers (the per-token row offset is computed inside the kernel from +// i * stride * dtype_bytes): +// input_base: [P, in_hidden_size] +// lowrank_workspace: [P, max_lora_rank], reused as the in-GEMM output and +// the out-GEMM input. +// output_base: [P, out_hidden_size] +// +// Scalars: +// in_hidden_size: K for the in-GEMM, also lda_in[i] and ldb_in[i]. +// out_hidden_size: N for the out-GEMM, also ldd_out[i]. +// max_lora_rank: ldd_in[i], the workspace stride, fixed regardless of the +// per-token rank so the GEMM lands at a known offset. +// The out-GEMM's ldb_out[i] is the per-token rank (adapter B +// is stored [out_hidden_size, rank]), not out_hidden_size. +// dtype_bytes: scalar size in bytes (2 for bf16/fp16, 4 for fp32). +// splitk_slices: split-K factor for the in-GEMM; drives the per-problem +// split-K scratch stride. +// +// The split-K stride is a worst-case fixed value (max_lora_rank * splitk_slices +// per problem) so the offsets can be computed from i alone without a prefix-sum. +void launchMoeLoraProblemBuilder(int32_t const* ranks_dev, int64_t const* ptrs_dev, void const* input_base, + void* lowrank_workspace, void* output_base, int64_t num_permuted_tokens, int64_t in_hidden_size, + int64_t out_hidden_size, int64_t max_lora_rank, int64_t dtype_bytes, int64_t splitk_slices, + MoeLoraGemmGroupArrays const& out, cudaStream_t stream); + +} // namespace kernels::cutlass_kernels + +TRTLLM_NAMESPACE_END diff --git a/cpp/tensorrt_llm/kernels/cutlass_kernels/moe_gemm/moe_kernels.cu b/cpp/tensorrt_llm/kernels/cutlass_kernels/moe_gemm/moe_kernels.cu index a0b08a3df775..a99f42003e47 100644 --- a/cpp/tensorrt_llm/kernels/cutlass_kernels/moe_gemm/moe_kernels.cu +++ b/cpp/tensorrt_llm/kernels/cutlass_kernels/moe_gemm/moe_kernels.cu @@ -1,5 +1,5 @@ /* - * Copyright (c) 2020-2025, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2020-2026, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. @@ -58,7 +58,14 @@ #include "tensorrt_llm/kernels/preQuantScaleKernel.h" #include "tensorrt_llm/kernels/quantization.cuh" +#include "tensorrt_llm/kernels/cutlass_kernels/include/moe_lora_pointer_expand.h" #include "tensorrt_llm/kernels/cutlass_kernels/include/moe_util_kernels.h" +// NOTE: the device-path GEMM dispatch (cudaGraph(SplitK)GroupedGemm, +// launchMoeLoraProblemBuilder) is not called here. Those wrappers pull in +// libtorch via at::Tensor, and this file is archived into libmoe_gemm_src.a, +// which the TensorRT plugin also links and must keep libtorch-free. The +// dispatch is reached through the LoraParams::device_path.run function pointer, +// populated in moeOp.cpp. #ifndef CUDART_VERSION #error CUDART_VERSION Undefined! @@ -3657,6 +3664,49 @@ void CutlassMoeFCRunner +constexpr nvinfer1::DataType moeLoraNvInferType() +{ + if constexpr (std::is_same_v) + { + return nvinfer1::DataType::kHALF; + } +#if defined(ENABLE_BF16) + else if constexpr (std::is_same_v) + { + return nvinfer1::DataType::kBF16; + } +#endif + else if constexpr (std::is_same_v) + { + return nvinfer1::DataType::kFLOAT; + } + else + { + static_assert(sizeof(ScaleBiasType) == 0, "MoE LoRA device path supports fp16/bf16/fp32 only."); + } +} + template bool CutlassMoeFCRunner::setupLoraWorkspace( int64_t expanded_num_rows, int64_t num_rows, int64_t inter_size, int64_t hidden_size, int start_expert, @@ -3675,6 +3725,49 @@ bool CutlassMoeFCRunner(permuted_data_); } - void* lora_workspace = lora_params.workspace; - void* tmp_lora_fc_result = static_cast(lora_fc1_result); - int64_t num_valid_tokens = host_expert_first_token_offset[num_experts_per_node]; - int64_t num_reqs_lora = std::min(num_valid_tokens, static_cast(num_reqs * num_experts_per_node)); + // Device-path branch, running entirely on the stream. setupLoraWorkspace + // has already populated the per-permuted-row ranks and pointers for fc1 and + // gated via launchMoeLoraPointerExpand. + if (lora_params.device_path.enabled) + { + auto const& dp = lora_params.device_path; + nvinfer1::DataType const data_type = moeLoraNvInferType(); - ::tensorrt_llm::kernels::Lora_run(fc1_lora_impl.get(), num_valid_tokens, num_reqs_lora, input, - host_permuted_fc1_lora_ranks.data(), host_permuted_fc1_weight_ptrs.data(), 0, &tmp_lora_fc_result, - lora_workspace, stream); + // The device-path GEMM skips rank-0 rows, but the bias/reorder paths + // read lora_fc1_result_ for every valid row. Zero the buffer first so + // skipped rows are a deterministic no-op. It is contiguous and holds + // both the gated and fc1 halves when gated, so one memset covers both. + size_t const fc1_result_bytes = static_cast(expanded_num_rows) * static_cast(inter_size) + * (is_gated_activation ? 2u : 1u) * sizeof(ScaleBiasType); + TLLM_CUDA_CHECK(cudaMemsetAsync(lora_fc1_result_, 0, fc1_result_bytes, stream)); - if (is_gated_activation) + runMoeLoraDeviceModule(dp.fc1, expanded_num_rows, /*in_hidden_size=*/hidden_size, dp.max_lora_rank, + dp.dtype_bytes, dp.splitk_slices, /*input_base=*/static_cast(input), + /*output_base=*/static_cast(lora_fc1_result), dp.run, data_type, stream); + + if (is_gated_activation) + { + runMoeLoraDeviceModule(dp.gated, expanded_num_rows, /*in_hidden_size=*/hidden_size, dp.max_lora_rank, + dp.dtype_bytes, dp.splitk_slices, /*input_base=*/static_cast(input), + /*output_base=*/static_cast(lora_gated_out), dp.run, data_type, stream); + } + } + else { - void* tmp_lora_gated_result = static_cast(lora_gated_out); + void* lora_workspace = lora_params.workspace; + void* tmp_lora_fc_result = static_cast(lora_fc1_result); + int64_t num_valid_tokens = host_expert_first_token_offset[num_experts_per_node]; + int64_t num_reqs_lora = std::min(num_valid_tokens, static_cast(num_reqs * num_experts_per_node)); + ::tensorrt_llm::kernels::Lora_run(fc1_lora_impl.get(), num_valid_tokens, num_reqs_lora, input, - host_permuted_gated_lora_ranks.data(), host_permuted_gated_weight_ptrs.data(), 0, &tmp_lora_gated_result, + host_permuted_fc1_lora_ranks.data(), host_permuted_fc1_weight_ptrs.data(), 0, &tmp_lora_fc_result, lora_workspace, stream); + + if (is_gated_activation) + { + void* tmp_lora_gated_result = static_cast(lora_gated_out); + ::tensorrt_llm::kernels::Lora_run(fc1_lora_impl.get(), num_valid_tokens, num_reqs_lora, input, + host_permuted_gated_lora_ranks.data(), host_permuted_gated_weight_ptrs.data(), 0, + &tmp_lora_gated_result, lora_workspace, stream); + } } // add bias and reorder @@ -3849,6 +3972,28 @@ void CutlassMoeFCRunner(fc1_result_); } + // Device-path branch, mirroring loraFC1's branch. It consumes the + // per-permuted-row ranks and pointers that setupLoraWorkspace produced via + // launchMoeLoraPointerExpand. num_tokens here is expanded_num_rows from + // runMoe (top_k * num_rows). + if (lora_params.device_path.enabled) + { + auto const& dp = lora_params.device_path; + nvinfer1::DataType const data_type = moeLoraNvInferType(); + + // As in loraFC1, zero the output so rank-0 rows the GEMM skips do not + // feed stale data into the downstream add. + size_t const fc2_result_bytes + = static_cast(num_tokens) * static_cast(hidden_size) * sizeof(ScaleBiasType); + TLLM_CUDA_CHECK(cudaMemsetAsync(lora_fc2_result_, 0, fc2_result_bytes, stream)); + + runMoeLoraDeviceModule(dp.fc2, num_tokens, /*in_hidden_size=*/inter_size, dp.max_lora_rank, dp.dtype_bytes, + dp.splitk_slices, /*input_base=*/static_cast(input), + /*output_base=*/static_cast(lora_fc2_result_), dp.run, data_type, stream); + sync_check_cuda_error(stream); + return; + } + void* lora_workspace = lora_params.workspace; int64_t num_valid_tokens = host_expert_first_token_offset[num_experts_per_node]; void* tmp_lora_fc_result = static_cast(lora_fc2_result_); @@ -4086,7 +4231,11 @@ void CutlassMoeFCRunner& host_permuted_rows = host_lora_workspace_.host_permuted_rows; std::vector& host_expert_first_token_offset = host_lora_workspace_.host_expert_first_token_offset; diff --git a/cpp/tensorrt_llm/kernels/cutlass_kernels/moe_gemm/moe_lora_pointer_expand.cu b/cpp/tensorrt_llm/kernels/cutlass_kernels/moe_gemm/moe_lora_pointer_expand.cu new file mode 100644 index 000000000000..d130d917ad33 --- /dev/null +++ b/cpp/tensorrt_llm/kernels/cutlass_kernels/moe_gemm/moe_lora_pointer_expand.cu @@ -0,0 +1,178 @@ +/* + * Copyright (c) 2026, NVIDIA CORPORATION. All rights reserved. + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#include "tensorrt_llm/kernels/cutlass_kernels/include/moe_lora_pointer_expand.h" + +#include "tensorrt_llm/common/assert.h" +#include "tensorrt_llm/common/cudaUtils.h" + +#include + +TRTLLM_NAMESPACE_BEGIN + +namespace kernels::cutlass_kernels +{ + +namespace +{ + +// Threads-per-block. The kernel is bandwidth-bound, so block size mainly +// affects occupancy. 256 is a good default for Hopper/Blackwell. +constexpr int kBlockSize = 256; + +// Cap on num_experts_per_node staged in shared memory for the expert lookup. +// Above this the kernel falls back to a global-memory scan (still correct). +// Set well above realistic values (typical MoE uses 8-64 experts per node). +constexpr int kMaxExpertsInSmem = 1024; + +// Per-module expansion. Inlined into the main kernel so we only pay one +// permuted_rows[i] and expert lookup per output row. +__device__ inline void expandOneModule( + MoeLoraExpandModule const& mod, int64_t i, int32_t source_index, int64_t weight_index, int64_t lora_dtype_bytes) +{ + int32_t const rank = mod.ranks_src[source_index]; + + // Per-expert byte offsets: weight_index * dim * rank * sizeof(scalar). + int64_t const a_stride = weight_index * mod.dim_a * rank * lora_dtype_bytes; + int64_t const b_stride = weight_index * mod.dim_b * rank * lora_dtype_bytes; + + int64_t const a_src = mod.ptrs_src[2 * source_index + 0]; + int64_t const b_src = mod.ptrs_src[2 * source_index + 1]; + + // Pointer arithmetic in raw bytes (uintptr_t-equivalent). Consumers + // reinterpret to the LoRA scalar type with no further offset, matching + // the existing host-loop semantics in setupLoraWorkspace. + mod.ptrs_out[2 * i + 0] = a_src + a_stride; + mod.ptrs_out[2 * i + 1] = b_src + b_stride; + mod.ranks_out[i] = rank; +} + +// Reset one module's output slot to a rank-0 no-op. The device-path scratch is +// persistent and reused, so ghost rows must be explicitly zeroed; otherwise +// stale ranks or pointers survive into the next grouped GEMM. +__device__ inline void zeroOneModule(MoeLoraExpandModule const& mod, int64_t i) +{ + mod.ranks_out[i] = 0; + mod.ptrs_out[2 * i + 0] = 0; + mod.ptrs_out[2 * i + 1] = 0; +} + +// One thread per permuted row: find its expert via search over +// expert_first_token_offset (staged in shared memory), compute +// source_index = permuted_rows[i] % num_rows, and expand fc1, fc2, and +// (optionally) gated. Rank 0 is a per-token no-op in the grouped GEMM, so no +// global "any-token-has-lora" reduction is needed. +__global__ void moeLoraPointerExpandKernel(int32_t const* __restrict__ permuted_rows, + int64_t const* __restrict__ expert_first_token_offset, int32_t num_experts_per_node, int32_t start_expert, + int64_t num_rows, int64_t expanded_num_rows, int64_t lora_dtype_bytes, MoeLoraExpandModule fc1, + MoeLoraExpandModule fc2, MoeLoraExpandModule gated, bool has_gated) +{ + // Stage expert_first_token_offset in shared memory once per block; every + // thread reads it during the expert lookup below. + extern __shared__ int64_t smem_first_token_offset[]; + bool const use_smem = num_experts_per_node + 1 <= kMaxExpertsInSmem; + if (use_smem) + { + for (int e = threadIdx.x; e < num_experts_per_node + 1; e += blockDim.x) + { + smem_first_token_offset[e] = expert_first_token_offset[e]; + } + __syncthreads(); + } + + int64_t const i = static_cast(blockIdx.x) * blockDim.x + threadIdx.x; + if (i >= expanded_num_rows) + { + return; + } + + // Find expert_idx s.t. first_offset[expert_idx] <= i < first_offset[expert_idx + 1]. + // Linear scan; num_experts_per_node is small enough (~8-64 typical) that + // a binary search adds branch divergence with no meaningful speedup. + int64_t const* offsets = use_smem ? smem_first_token_offset : expert_first_token_offset; + int32_t expert_idx = 0; + for (int32_t e = 0; e < num_experts_per_node; ++e) + { + if (offsets[e + 1] > i) + { + expert_idx = e; + break; + } + expert_idx = e + 1; + } + // Tokens past the last valid offset (padding "ghost" rows) get + // expert_idx == num_experts_per_node; drop them so weight_index cannot run + // off the expert table. Zero their output slots first so reused scratch + // becomes a deterministic rank-0 no-op. + if (expert_idx >= num_experts_per_node) + { + zeroOneModule(fc1, i); + zeroOneModule(fc2, i); + if (has_gated) + { + zeroOneModule(gated, i); + } + return; + } + + int64_t const weight_index = static_cast(expert_idx) + start_expert; + int32_t const source_index = static_cast(permuted_rows[i] % num_rows); + + expandOneModule(fc1, i, source_index, weight_index, lora_dtype_bytes); + expandOneModule(fc2, i, source_index, weight_index, lora_dtype_bytes); + if (has_gated) + { + expandOneModule(gated, i, source_index, weight_index, lora_dtype_bytes); + } +} + +} // namespace + +void launchMoeLoraPointerExpand(int32_t const* permuted_rows, int64_t const* expert_first_token_offset, + int32_t num_experts_per_node, int32_t start_expert, int64_t num_rows, int64_t expanded_num_rows, + int64_t lora_dtype_bytes, MoeLoraExpandModule const& fc1, MoeLoraExpandModule const& fc2, + MoeLoraExpandModule const* gated, cudaStream_t stream) +{ + if (expanded_num_rows <= 0) + { + return; + } + TLLM_CHECK_WITH_INFO(permuted_rows != nullptr, "permuted_rows must be non-null"); + TLLM_CHECK_WITH_INFO(expert_first_token_offset != nullptr, "expert_first_token_offset must be non-null"); + TLLM_CHECK_WITH_INFO(num_experts_per_node > 0, "num_experts_per_node must be positive"); + TLLM_CHECK_WITH_INFO(num_rows > 0, "num_rows must be positive"); + TLLM_CHECK_WITH_INFO(lora_dtype_bytes > 0, "lora_dtype_bytes must be positive"); + + bool const has_gated = gated != nullptr; + MoeLoraExpandModule const gated_arg = has_gated ? *gated : MoeLoraExpandModule{}; + + int64_t const grid = (expanded_num_rows + kBlockSize - 1) / kBlockSize; + // Reserve shared memory only when the expert table fits. Above the cap the + // kernel falls back to global-memory reads (still correct, no staging), so + // we pass 0 bytes to avoid allocating shared memory we will not touch. + int const smem_entries = num_experts_per_node + 1; + size_t const smem_bytes + = (smem_entries <= kMaxExpertsInSmem) ? static_cast(smem_entries) * sizeof(int64_t) : 0; + + moeLoraPointerExpandKernel<<(grid), kBlockSize, smem_bytes, stream>>>(permuted_rows, + expert_first_token_offset, num_experts_per_node, start_expert, num_rows, expanded_num_rows, lora_dtype_bytes, + fc1, fc2, gated_arg, has_gated); + sync_check_cuda_error(stream); +} + +} // namespace kernels::cutlass_kernels + +TRTLLM_NAMESPACE_END diff --git a/cpp/tensorrt_llm/kernels/cutlass_kernels/moe_gemm/moe_lora_problem_builder.cu b/cpp/tensorrt_llm/kernels/cutlass_kernels/moe_gemm/moe_lora_problem_builder.cu new file mode 100644 index 000000000000..f1b6da4ca189 --- /dev/null +++ b/cpp/tensorrt_llm/kernels/cutlass_kernels/moe_gemm/moe_lora_problem_builder.cu @@ -0,0 +1,152 @@ +/* + * Copyright (c) 2026, NVIDIA CORPORATION. All rights reserved. + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#include "tensorrt_llm/kernels/cutlass_kernels/include/moe_lora_problem_builder.h" + +#include "tensorrt_llm/common/assert.h" +#include "tensorrt_llm/common/cudaUtils.h" + +#include +#include + +TRTLLM_NAMESPACE_BEGIN + +namespace kernels::cutlass_kernels +{ + +namespace +{ + +// Threads-per-block. The kernel is bandwidth-bound, so block size mainly +// controls occupancy. 256 is a good default for Hopper/Blackwell. +constexpr int kBlockSize = 256; + +// One thread per permuted row writes all output arrays. Each store stream is +// contiguous, so accesses coalesce; there is no inter-thread communication. +__global__ void moeLoraProblemBuilderKernel(int32_t const* __restrict__ ranks, int64_t const* __restrict__ ptrs, + int64_t input_base, int64_t lowrank_workspace, int64_t output_base, int64_t num_permuted_tokens, + int64_t in_hidden_size, int64_t out_hidden_size, int64_t max_lora_rank, int64_t dtype_bytes, int64_t splitk_slices, + cutlass::gemm::GemmCoord* __restrict__ problem_sizes_in, cutlass::gemm::GemmCoord* __restrict__ problem_sizes_out, + void** __restrict__ a_ptrs_in, void** __restrict__ b_ptrs_in, void** __restrict__ d_ptrs_in, + void** __restrict__ b_ptrs_out, void** __restrict__ d_ptrs_out, int64_t* __restrict__ lda_in, + int64_t* __restrict__ ldb_in, int64_t* __restrict__ ldd_in, int64_t* __restrict__ ldb_out, + int64_t* __restrict__ ldd_out, int64_t* __restrict__ splitk_offsets) +{ + int64_t const i = static_cast(blockIdx.x) * blockDim.x + threadIdx.x; + if (i >= num_permuted_tokens) + { + // The +1 splitk_offsets sentinel (one past num_permuted_tokens) is + // written by thread 0 of the last block; everyone else returns. + if (i == num_permuted_tokens && splitk_offsets != nullptr) + { + splitk_offsets[num_permuted_tokens] = num_permuted_tokens * max_lora_rank * splitk_slices; + } + return; + } + + int32_t const rank = ranks[i]; + // The workspace row and ldd_in[i] use max_lora_rank, so a larger rank makes + // the in-GEMM write past its slice. Callers validate ranks host-side (see + // moeOp.cpp); this assert is a debug-build backstop. + assert(rank <= max_lora_rank); + int64_t const a_ptr_bits = ptrs[2 * i + 0]; + int64_t const b_ptr_bits = ptrs[2 * i + 1]; + + // Problem sizes: each permuted token gets its own (M=1) GEMM. This matches + // worst-case scheduling with no run-length aggregation; a future + // optimization can aggregate consecutive identical-adapter tokens. + problem_sizes_in[i] = cutlass::gemm::GemmCoord(1, rank, static_cast(in_hidden_size)); + problem_sizes_out[i] = cutlass::gemm::GemmCoord(1, static_cast(out_hidden_size), rank); + + // Pointer rows. dtype_bytes scales the per-row stride so the same + // builder serves bf16/fp16/fp32 adapters without templating. + int64_t const in_row_stride = in_hidden_size * dtype_bytes; + int64_t const work_row_stride = max_lora_rank * dtype_bytes; + int64_t const out_row_stride = out_hidden_size * dtype_bytes; + + a_ptrs_in[i] = reinterpret_cast(input_base + i * in_row_stride); + b_ptrs_in[i] = reinterpret_cast(a_ptr_bits); + d_ptrs_in[i] = reinterpret_cast(lowrank_workspace + i * work_row_stride); + b_ptrs_out[i] = reinterpret_cast(b_ptr_bits); + d_ptrs_out[i] = reinterpret_cast(output_base + i * out_row_stride); + + // Leading dimensions. For the in-/out- GEMMs, lda/ldd correspond to the + // input row-stride / workspace row-stride / output row-stride; ldb is + // the per-problem stride in the LoRA adapter's storage and matches + // the cuda_graph_grouped_gemm convention used by attention LoRA + // (loraOp.cpp): + // in-GEMM: adapter A stored as [rank, in_hidden_size] + // -> ldb_in = in_hidden_size + // out-GEMM: adapter B stored as [out_hidden_size, rank] + // -> ldb_out = rank (per-token, since per-token rank + // can differ in slot-indexed multi-LoRA mode) + lda_in[i] = in_hidden_size; + ldb_in[i] = in_hidden_size; + ldd_in[i] = max_lora_rank; + ldb_out[i] = rank; + ldd_out[i] = out_hidden_size; + + // Split-K scratch offsets. Worst-case fixed stride (independent of + // per-token rank) so each thread computes its own offset locally; no + // cross-thread scan needed. + if (splitk_offsets != nullptr) + { + splitk_offsets[i] = i * max_lora_rank * splitk_slices; + } +} + +} // namespace + +void launchMoeLoraProblemBuilder(int32_t const* ranks_dev, int64_t const* ptrs_dev, void const* input_base, + void* lowrank_workspace, void* output_base, int64_t num_permuted_tokens, int64_t in_hidden_size, + int64_t out_hidden_size, int64_t max_lora_rank, int64_t dtype_bytes, int64_t splitk_slices, + MoeLoraGemmGroupArrays const& out, cudaStream_t stream) +{ + if (num_permuted_tokens <= 0) + { + return; + } + TLLM_CHECK_WITH_INFO(ranks_dev != nullptr, "ranks_dev must be non-null"); + TLLM_CHECK_WITH_INFO(ptrs_dev != nullptr, "ptrs_dev must be non-null"); + TLLM_CHECK_WITH_INFO(out.problem_sizes_in != nullptr, "problem_sizes_in must be non-null"); + TLLM_CHECK_WITH_INFO(out.problem_sizes_out != nullptr, "problem_sizes_out must be non-null"); + TLLM_CHECK_WITH_INFO(out.a_ptrs_in && out.b_ptrs_in && out.d_ptrs_in && out.b_ptrs_out && out.d_ptrs_out, + "All ptr_*_in/out arrays must be non-null"); + TLLM_CHECK_WITH_INFO( + out.lda_in && out.ldb_in && out.ldd_in && out.ldb_out && out.ldd_out, "All ld* arrays must be non-null"); + TLLM_CHECK_WITH_INFO(dtype_bytes > 0, "dtype_bytes must be positive"); + TLLM_CHECK_WITH_INFO(max_lora_rank > 0, "max_lora_rank must be positive"); + TLLM_CHECK_WITH_INFO(in_hidden_size > 0 && out_hidden_size > 0, "hidden sizes must be positive"); + TLLM_CHECK_WITH_INFO(splitk_slices > 0, "splitk_slices must be positive"); + + // Launch one extra thread so the splitk_offsets[num_permuted_tokens] + // sentinel can be filled by exactly one thread (cleaner than a + // dedicated tail launch). + int64_t const launch_count = num_permuted_tokens + (out.splitk_offsets != nullptr ? 1 : 0); + int64_t const grid = (launch_count + kBlockSize - 1) / kBlockSize; + + moeLoraProblemBuilderKernel<<(grid), kBlockSize, 0, stream>>>(ranks_dev, ptrs_dev, + reinterpret_cast(input_base), reinterpret_cast(lowrank_workspace), + reinterpret_cast(output_base), num_permuted_tokens, in_hidden_size, out_hidden_size, max_lora_rank, + dtype_bytes, splitk_slices, out.problem_sizes_in, out.problem_sizes_out, out.a_ptrs_in, out.b_ptrs_in, + out.d_ptrs_in, out.b_ptrs_out, out.d_ptrs_out, out.lda_in, out.ldb_in, out.ldd_in, out.ldb_out, out.ldd_out, + out.splitk_offsets); + sync_check_cuda_error(stream); +} + +} // namespace kernels::cutlass_kernels + +TRTLLM_NAMESPACE_END diff --git a/cpp/tensorrt_llm/kernels/decoderMaskedMultiheadAttention/decoderXQAImplCommon.cpp b/cpp/tensorrt_llm/kernels/decoderMaskedMultiheadAttention/decoderXQAImplCommon.cpp index dffc83764e3c..13aef6daaf9a 100644 --- a/cpp/tensorrt_llm/kernels/decoderMaskedMultiheadAttention/decoderXQAImplCommon.cpp +++ b/cpp/tensorrt_llm/kernels/decoderMaskedMultiheadAttention/decoderXQAImplCommon.cpp @@ -1,5 +1,5 @@ /* - * Copyright (c) 2020-2023, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2020-2026, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. @@ -55,11 +55,13 @@ XQAKernelRuntimeHashKey getRuntimeHashKeyFromXQAParams(XQAParams const& xqaParam unsigned int kernel_m_tilesize = getKernelMTileSize( num_q_heads_over_kv, xqaParams.multi_query_tokens, qSeqLen, isXqaJit, supportQGMMA, supportMLA); + bool const includesRotaryDim = isXqaJit && jit::appliesRoPEInXqaKernel(xqaParams, supportQGMMA); // precompiled XQA does not use is_fp8_output as hashing key return {xqaParams.kv_cache_data_type, head_size, beam_width, kernel_num_q_heads_over_kv, kernel_m_tilesize, xqaParams.paged_kv_cache ? static_cast(xqaParams.tokens_per_block) : 0, xqaParams.paged_kv_cache, xqaParams.multi_query_tokens, isXqaJit ? xqaParams.is_fp8_output : false, - isXqaJit ? std::optional(xqaParams.position_embedding_type) : std::nullopt}; + isXqaJit ? std::optional(xqaParams.position_embedding_type) : std::nullopt, + includesRotaryDim ? std::optional(xqaParams.rotary_embedding_dim) : std::nullopt}; } } // namespace kernels diff --git a/cpp/tensorrt_llm/kernels/decoderMaskedMultiheadAttention/decoderXQAImplCommon.h b/cpp/tensorrt_llm/kernels/decoderMaskedMultiheadAttention/decoderXQAImplCommon.h index 60a5524de09e..38b315387929 100644 --- a/cpp/tensorrt_llm/kernels/decoderMaskedMultiheadAttention/decoderXQAImplCommon.h +++ b/cpp/tensorrt_llm/kernels/decoderMaskedMultiheadAttention/decoderXQAImplCommon.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2020-2023, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2020-2026, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. @@ -70,6 +70,11 @@ struct XQAKernelRuntimeHashKey bool multi_query_tokens; bool is_fp8_output; std::optional position_embedding_type; + // Rotary embedding dim (head elements RoPE is applied to). Only meaningful for the JIT path, + // where it selects between full- and partial-rotary cubins (which bake ROPE_ELEMS in). Left as + // std::nullopt for the precompiled path, whose kernels never apply RoPE in-kernel and are thus + // rotary-agnostic (RoPE handled by invokeQKVPreprocessing). + std::optional rotary_embedding_dim; bool operator==(XQAKernelRuntimeHashKey const& other) const { @@ -77,7 +82,8 @@ struct XQAKernelRuntimeHashKey && num_q_heads_per_kv == other.num_q_heads_per_kv && beam_size == other.beam_size && multi_query_tokens == other.multi_query_tokens && m_tilesize == other.m_tilesize && tokens_per_page == other.tokens_per_page && paged_kv_cache == other.paged_kv_cache - && is_fp8_output == other.is_fp8_output && position_embedding_type == other.position_embedding_type; + && is_fp8_output == other.is_fp8_output && position_embedding_type == other.position_embedding_type + && rotary_embedding_dim == other.rotary_embedding_dim; } }; @@ -109,6 +115,8 @@ struct XQAKernelRuntimeHasher key ^= s.is_fp8_output; key <<= 8; key ^= static_cast(s.position_embedding_type.value_or(static_cast(-1))); + key <<= 9; // rotary dims are <= 256; 0 distinguishes the std::nullopt (precompiled) case + key ^= static_cast(s.rotary_embedding_dim.value_or(0)); return key; } }; diff --git a/cpp/tensorrt_llm/kernels/decoderMaskedMultiheadAttention/decoderXQAImplJIT/compileEngine.cpp b/cpp/tensorrt_llm/kernels/decoderMaskedMultiheadAttention/decoderXQAImplJIT/compileEngine.cpp index 9571737f04a2..b9c58643664d 100644 --- a/cpp/tensorrt_llm/kernels/decoderMaskedMultiheadAttention/decoderXQAImplJIT/compileEngine.cpp +++ b/cpp/tensorrt_llm/kernels/decoderMaskedMultiheadAttention/decoderXQAImplJIT/compileEngine.cpp @@ -1,5 +1,5 @@ /* - * Copyright (c) 2020-2023, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2020-2026, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. @@ -57,10 +57,7 @@ CubinObj CompileEngine::compile() const tllmXqaJitProgram program; bool const useQGMMAKernel = supportConfigQGMMA(mXqaParams, mSM, true); tllmXqaJitRopeStyle ropeStyle = tllmXqaJitRopeStyle::TLLM_XQA_JIT_ROPE_NONE; - bool const applyRoPEInXqaKernel = !mXqaParams.multi_query_tokens && useQGMMAKernel - && tensorrt_llm::common::contains({PositionEmbeddingType::kLONG_ROPE, PositionEmbeddingType::kROPE_GPT_NEOX, - PositionEmbeddingType::kROPE_GPTJ}, - mXqaParams.position_embedding_type); + bool const applyRoPEInXqaKernel = appliesRoPEInXqaKernel(mXqaParams, useQGMMAKernel); if (applyRoPEInXqaKernel) { TLLM_CHECK(useQGMMAKernel); @@ -105,6 +102,11 @@ CubinObj CompileEngine::compile() const // scratch in this case. /*use_input_kv=*/applyRoPEInXqaKernel, /*rope_style=*/ropeStyle, + // When applying RoPE in-kernel, pass the actual rotary dim + // Otherwise pass head_size so the (unused) ROPE_ELEMS is valid for static_asserts. + /*rotary_embedding_dim=*/ + applyRoPEInXqaKernel ? static_cast(mXqaParams.rotary_embedding_dim) + : static_cast(mXqaParams.head_size), /*is_spec_dec_tree=*/mXqaParams.is_spec_dec_tree, /*use_skip_softmax_attn=*/mXqaParams.skip_softmax_threshold_scale_factor != 0}; if (context.kernel_type == TLLM_XQA_JIT_MLA) diff --git a/cpp/tensorrt_llm/kernels/decoderMaskedMultiheadAttention/decoderXQAImplJIT/decoderXQAImplJIT.cpp b/cpp/tensorrt_llm/kernels/decoderMaskedMultiheadAttention/decoderXQAImplJIT/decoderXQAImplJIT.cpp index 877a780072c4..881a17a05405 100644 --- a/cpp/tensorrt_llm/kernels/decoderMaskedMultiheadAttention/decoderXQAImplJIT/decoderXQAImplJIT.cpp +++ b/cpp/tensorrt_llm/kernels/decoderMaskedMultiheadAttention/decoderXQAImplJIT/decoderXQAImplJIT.cpp @@ -1,5 +1,5 @@ /* - * Copyright (c) 2020-2023, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2020-2026, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. @@ -39,7 +39,7 @@ XQAKernelRuntimeHashKey getRuntimeHashKeyFromKernelMeta(XQAKernelMetaInfo const& { return {kernelMeta.mKVDataType, kernelMeta.mHeadDim, kernelMeta.mBeamWidth, kernelMeta.mNumQHeadsOverKV, kernelMeta.mMTileSize, kernelMeta.mTokensPerPage, kernelMeta.mPagedKVCache, kernelMeta.mMultiQueryTokens, false, - std::nullopt}; + std::nullopt, std::nullopt}; } } // anonymous namespace @@ -247,11 +247,8 @@ void DecoderXQAImplJIT::runImpl(XQAParams const& xqaParams, KVCacheBuffer const& // * If applyRoPEInXqaKernel is false, a separate kernel applies RoPE (see invokeQKVPreprocessing), then XQA kernel // performs SDPA. // In this case, xqa_q_input_ptr (see below) serves as the scratch space to store intermediate RoPE output. - bool const applyRoPEInXqaKernel = isGMMAKernel && !isSpecDec - && tensorrt_llm::common::contains({PositionEmbeddingType::kLONG_ROPE, PositionEmbeddingType::kROPE_GPT_NEOX, - PositionEmbeddingType::kROPE_GPTJ}, - xqaParams.position_embedding_type) - && !xqaParams.isMLA(); + + bool const applyRoPEInXqaKernel = jit::appliesRoPEInXqaKernel(xqaParams, isGMMAKernel); unsigned int head_size = xqaParams.head_size; int num_q_heads = xqaParams.num_q_heads; diff --git a/cpp/tensorrt_llm/kernels/decoderMaskedMultiheadAttention/decoderXQAImplJIT/kernelUtils.cpp b/cpp/tensorrt_llm/kernels/decoderMaskedMultiheadAttention/decoderXQAImplJIT/kernelUtils.cpp index f6f73dab2e6a..564b4d77cc77 100644 --- a/cpp/tensorrt_llm/kernels/decoderMaskedMultiheadAttention/decoderXQAImplJIT/kernelUtils.cpp +++ b/cpp/tensorrt_llm/kernels/decoderMaskedMultiheadAttention/decoderXQAImplJIT/kernelUtils.cpp @@ -1,5 +1,5 @@ /* - * Copyright (c) 2020-2023, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2020-2026, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. @@ -82,6 +82,25 @@ bool supportConfigCommon(XQAParams const& xqaParams, bool forConfigurePlugin) } // anonymous namespace +bool appliesRoPEInXqaKernel(XQAParams const& xqaParams, bool isQGMMAKernel) +{ + // In-kernel RoPE is only implemented by the Hopper QGMMA kernel, and only for non-spec-dec, non-MLA + // cases. + if (!isQGMMAKernel || xqaParams.multi_query_tokens || xqaParams.isMLA()) + { + return false; + } + // The in-kernel RoPE rotates the first rotary_embedding_dim head elements and copies the rest + // unrotated; it requires the rope region to be 16B-aligned for any supported cache dtype + // (rotary_embedding_dim a multiple of 16). Unsupported shapes fall back to invokeQKVPreprocessing. + bool const isSupportedRotary = xqaParams.rotary_embedding_dim > 0 + && xqaParams.rotary_embedding_dim <= xqaParams.head_size && xqaParams.rotary_embedding_dim % 16 == 0; + return isSupportedRotary + && tensorrt_llm::common::contains({PositionEmbeddingType::kLONG_ROPE, PositionEmbeddingType::kROPE_GPT_NEOX, + PositionEmbeddingType::kROPE_GPTJ}, + xqaParams.position_embedding_type); +} + bool supportConfigQGMMA(XQAParams const& xqaParams, int SM, bool forConfigurePlugin) { if (!supportConfigCommon(xqaParams, forConfigurePlugin)) diff --git a/cpp/tensorrt_llm/kernels/decoderMaskedMultiheadAttention/decoderXQAImplJIT/kernelUtils.h b/cpp/tensorrt_llm/kernels/decoderMaskedMultiheadAttention/decoderXQAImplJIT/kernelUtils.h index 8d3b43b44f65..e6215cacbd78 100644 --- a/cpp/tensorrt_llm/kernels/decoderMaskedMultiheadAttention/decoderXQAImplJIT/kernelUtils.h +++ b/cpp/tensorrt_llm/kernels/decoderMaskedMultiheadAttention/decoderXQAImplJIT/kernelUtils.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2020-2023, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2020-2026, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. @@ -31,6 +31,8 @@ bool supportConfigMLA(XQAParams const& xqaParams, int SM, bool forConfigurePlugi bool supportConfigTllmGen( XQAParams const& xqaParams, int SM, bool forConfigurePlugin, TllmGenFmhaRunner const* tllmRunner); +bool appliesRoPEInXqaKernel(XQAParams const& xqaParams, bool isQGMMAKernel); + } // namespace jit } // namespace kernels diff --git a/cpp/tensorrt_llm/kernels/decoderMaskedMultiheadAttention/decoderXQAImplJIT/nvrtcWrapper/include/nvrtcWrapper.h b/cpp/tensorrt_llm/kernels/decoderMaskedMultiheadAttention/decoderXQAImplJIT/nvrtcWrapper/include/nvrtcWrapper.h index b132e769188b..a2ed22e627b2 100644 --- a/cpp/tensorrt_llm/kernels/decoderMaskedMultiheadAttention/decoderXQAImplJIT/nvrtcWrapper/include/nvrtcWrapper.h +++ b/cpp/tensorrt_llm/kernels/decoderMaskedMultiheadAttention/decoderXQAImplJIT/nvrtcWrapper/include/nvrtcWrapper.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2020-2025, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2020-2026, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. @@ -64,6 +64,11 @@ extern "C" bool use_input_kv; tllmXqaJitRopeStyle rope_style; // useful only when use_input_kv is true. + // Number of head elements RoPE is applied to (rotary_embedding_dim). Equals head_size for + // full rotary; smaller for partial rotary (partial_rotary_factor < 1). Useful only when + // rope_style != NONE; callers may leave it 0, in which case it defaults to head_size. + unsigned int rotary_embedding_dim; + bool is_spec_dec_tree = true; // useful only when multi_query_tokens, should be true unless using linear tree in spec-dec. bool use_skip_softmax_attn; diff --git a/cpp/tensorrt_llm/kernels/decoderMaskedMultiheadAttention/decoderXQAImplJIT/nvrtcWrapper/src/nvrtcWrapper.cpp b/cpp/tensorrt_llm/kernels/decoderMaskedMultiheadAttention/decoderXQAImplJIT/nvrtcWrapper/src/nvrtcWrapper.cpp index d24ca45379df..680106fb304c 100644 --- a/cpp/tensorrt_llm/kernels/decoderMaskedMultiheadAttention/decoderXQAImplJIT/nvrtcWrapper/src/nvrtcWrapper.cpp +++ b/cpp/tensorrt_llm/kernels/decoderMaskedMultiheadAttention/decoderXQAImplJIT/nvrtcWrapper/src/nvrtcWrapper.cpp @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: Copyright (c) 2024-2025 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 2024-2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: Apache-2.0 * * Licensed under the Apache License, Version 2.0 (the "License"); @@ -188,6 +188,9 @@ tllmXqaJitStatus getMacroFlags(tllmXqaJitContext const* context, std::vectorfp8_output ? "1" : "0"; macros["USE_INPUT_KV"] = context->use_input_kv ? "1" : "0"; macros["ROPE_STYLE"] = std::to_string(int(context->rope_style)); + // Number of head elements RoPE is applied to. Defaults to head_size (full rotary) when unset. + macros["ROPE_ELEMS"] + = std::to_string(context->rotary_embedding_dim != 0 ? context->rotary_embedding_dim : head_size); macros["IS_SPEC_DEC_TREE"] = context->is_spec_dec_tree ? "1" : "0"; macros["SKIP_SOFTMAX_ATTN"] = context->use_skip_softmax_attn ? "1" : "0"; #ifdef SKIP_SOFTMAX_STAT diff --git a/cpp/tensorrt_llm/kernels/decoderMaskedMultiheadAttention/decoderXQAImplPrecompiled.cpp b/cpp/tensorrt_llm/kernels/decoderMaskedMultiheadAttention/decoderXQAImplPrecompiled.cpp index d37c7a7a4037..50bbbff6201d 100644 --- a/cpp/tensorrt_llm/kernels/decoderMaskedMultiheadAttention/decoderXQAImplPrecompiled.cpp +++ b/cpp/tensorrt_llm/kernels/decoderMaskedMultiheadAttention/decoderXQAImplPrecompiled.cpp @@ -1,5 +1,5 @@ /* - * Copyright (c) 2020-2023, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2020-2026, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. @@ -100,7 +100,7 @@ class XQAKernelList } XQAKernelRuntimeHashKey hash_key{kernelMeta.mKVDataType, kernelMeta.mHeadDim, kernelMeta.mBeamWidth, kernelMeta.mNumQHeadsOverKV, kernelMeta.mMTileSize, kernelMeta.mTokensPerPage, kernelMeta.mPagedKVCache, - kernelMeta.mMultiQueryTokens, false, std::nullopt}; + kernelMeta.mMultiQueryTokens, false, std::nullopt, std::nullopt}; mFunctions.insert(std::make_pair(hash_key, funcInfo)); } @@ -132,7 +132,7 @@ class XQAKernelList = {xqaParams.kv_cache_data_type, head_size, beam_width, kernel_num_q_heads_over_kv, m_tilesize, xqaParams.paged_kv_cache ? static_cast(xqaParams.tokens_per_block) : 0, xqaParams.paged_kv_cache, xqaParams.multi_query_tokens, 0, /* xqa jit param is_fp8_output */ - std::nullopt}; + std::nullopt, /* position_embedding_type */ std::nullopt /* rotary_embedding_dim */}; auto const findIter = mFunctions.find(hash_key); return findIter != mFunctions.end(); } diff --git a/cpp/tensorrt_llm/kernels/decoderMaskedMultiheadAttention/xqaParams.h b/cpp/tensorrt_llm/kernels/decoderMaskedMultiheadAttention/xqaParams.h index cccfbf1ded88..e421be0a6bd7 100644 --- a/cpp/tensorrt_llm/kernels/decoderMaskedMultiheadAttention/xqaParams.h +++ b/cpp/tensorrt_llm/kernels/decoderMaskedMultiheadAttention/xqaParams.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2020-2025, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2020-2026, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. @@ -48,10 +48,6 @@ struct XQAParams int32_t chunked_attention_size = INT_MAX; int32_t max_attention_window_size = 0; int32_t cyclic_attention_window_size = 0; - // Whether this is a sliding-window-causal layer. Computed once in AttentionOp from the - // declared mask type / RoPE config so kernel-selection code does not need to re-derive - // it from window/rope heuristics. See AttentionOp::convertMMHAParamsToXQAParams. - bool is_sliding_window = false; int32_t sink_token_length = 0; int max_past_kv_length = 0; void const* qkv_bias; @@ -73,6 +69,11 @@ struct XQAParams bool const* helix_is_inactive_rank = nullptr; // Softmax stats output buffer for Helix parallelism (max and LSE per head). float2* softmax_stats = nullptr; + // Optional TRTLLM-Gen FMHA JIT warmup shape. + bool trtllm_gen_jit_warmup = false; + int32_t trtllm_gen_jit_warmup_max_num_requests = 0; + int32_t trtllm_gen_jit_warmup_max_seq_len_q = 0; + int32_t trtllm_gen_jit_warmup_max_seq_len_kv = 0; // almost copy from GPTAttentionPluginCommon. // maybe use one struct for parameters in GPTAttentionPluginCommon and share the same here. diff --git a/cpp/tensorrt_llm/kernels/fmhaDispatcher.cpp b/cpp/tensorrt_llm/kernels/fmhaDispatcher.cpp index 3d1ffa741f67..88ff741d6941 100644 --- a/cpp/tensorrt_llm/kernels/fmhaDispatcher.cpp +++ b/cpp/tensorrt_llm/kernels/fmhaDispatcher.cpp @@ -238,6 +238,10 @@ void FmhaDispatcher::run(MHARunnerParams runnerParams) tllmRunnerParams.mChunkedAttentionSize = runnerParams.chunkedAttentionSize; tllmRunnerParams.mSumOfSeqLensQ = runnerParams.totalQSeqLen; tllmRunnerParams.mSumOfSeqLensKv = runnerParams.totalKvSeqLen; + tllmRunnerParams.mJITWarmup = runnerParams.trtllmGenJITWarmup; + tllmRunnerParams.mJITWarmupMaxNumRequests = runnerParams.trtllmGenJITWarmupMaxNumRequests; + tllmRunnerParams.mJITWarmupMaxSeqLenQ = runnerParams.trtllmGenJITWarmupMaxSeqLenQ; + tllmRunnerParams.mJITWarmupMaxSeqLenKv = runnerParams.trtllmGenJITWarmupMaxSeqLenKv; tllmRunnerParams.mMaxNumPagesPerSeqKv = maxBlocksPerSeq; tllmRunnerParams.mNumTokensPerPage = (qkvLayout == QkvLayout::PagedKv) ? numTokensPerBlock : 0; tllmRunnerParams.mScaleQ = mFixedParams.qScaling; @@ -267,6 +271,7 @@ void FmhaDispatcher::run(MHARunnerParams runnerParams) tllmRunnerParams.mSparseTopK = runnerParams.sparse_params.num_sparse_topk; tllmRunnerParams.ptrSparseMlaTopKLens = runnerParams.sparse_params.sparse_mla_topk_lens; tllmRunnerParams.mKernelType = FmhaKernelType::Generation; + tllmRunnerParams.mUseGenKernelForPrefill = true; tllmRunnerParams.mMaskType = TrtllmGenAttentionMaskType::Causal; tllmRunnerParams.kvPageIdxPtr = reinterpret_cast(runnerParams.sparse_params.sparse_attn_indices); diff --git a/cpp/tensorrt_llm/kernels/fusedQKNormRopeKernel.cu b/cpp/tensorrt_llm/kernels/fusedQKNormRopeKernel.cu index 8c9b502027e0..e06b0f200e4b 100644 --- a/cpp/tensorrt_llm/kernels/fusedQKNormRopeKernel.cu +++ b/cpp/tensorrt_llm/kernels/fusedQKNormRopeKernel.cu @@ -32,6 +32,30 @@ namespace kernels //////////////////////////////////////////////////////////////////////////////////////////////////// +// Select the RoPE position id for a given rotary half-dim under interleaved mRoPE. +// Mirrors MRotaryEmbedding.apply_interleaved_rope: section 1 (height) drives +// dims {1,4,7,...} up to mrope_section1*3, section 2 (width) drives {2,5,8,...} +// up to mrope_section2*3, everything else uses section 0 (temporal). +// position_ids is [num_tokens] for the non-mRoPE case (sec is always 0) and +// [3, num_tokens] (row-major: sec*num_tokens + tokenIdx) for mRoPE. +__device__ __forceinline__ float selectMRopePosId(int const* position_ids, int tokenIdx, int num_tokens, int half_dim, + bool use_mrope, int mrope_section1, int mrope_section2) +{ + int sec = 0; + if (use_mrope) + { + if (half_dim % 3 == 1 && half_dim < mrope_section1 * 3) + { + sec = 1; + } + else if (half_dim % 3 == 2 && half_dim < mrope_section2 * 3) + { + sec = 2; + } + } + return static_cast(position_ids[sec * num_tokens + tokenIdx]); +} + // Perform per-head QK Norm and RoPE in a single kernel. // head_dim: the dimension of each head // interleave: interleave=!is_neox. @@ -54,7 +78,12 @@ __global__ void fusedQKNormRopeKernel( float high, // threshold for low frequency float attention_factor, // attention_factor applied on cos and sin // stop of parameters for yarn - bool is_qk_norm // Whether to apply QK norm + bool is_qk_norm, // Whether to apply QK norm + bool use_gemma, // Whether QK norm uses Gemma-style RMSNorm (scale by (1 + weight)) + // parameters for interleaved mRoPE (use_mrope=false -> plain RoPE, single position per token) + bool use_mrope, // Whether to use interleaved mRoPE position selection + int mrope_section1, // mrope_section[1] (height); section 0 (temporal) is implied + int mrope_section2 // mrope_section[2] (width) ) { int const warpsPerBlock = blockDim.x / 32; @@ -133,7 +162,8 @@ __global__ void fusedQKNormRopeKernel( { int dim = laneId * numElemsPerThread + i; float weight = isQ ? __bfloat162float(q_weight[dim]) : __bfloat162float(k_weight[dim]); - elements[i] *= rms_rcp * weight; + // Gemma RMSNorm scales by (1 + weight); standard RMSNorm scales by weight. + elements[i] *= rms_rcp * (use_gemma ? (1.0f + weight) : weight); } } // Apply RoPE to normalized elements @@ -141,7 +171,8 @@ __global__ void fusedQKNormRopeKernel( float cos_vals[numElemsPerThread]; float sin_vals[numElemsPerThread]; - float pos_id = static_cast(position_ids[tokenIdx]); + // pos_id is selected per rotary half-dim (interleaved mRoPE); for plain RoPE + // selectMRopePosId always returns position_ids[tokenIdx]. // TODO: cos sin calculation could be halved. if constexpr (interleave) @@ -180,6 +211,8 @@ __global__ void fusedQKNormRopeKernel( + inv_freq_extrapolation * inv_freq_extrapolation_factor; } + float pos_id = selectMRopePosId( + position_ids, tokenIdx, num_tokens, half_dim, use_mrope, mrope_section1, mrope_section2); float theta = pos_id * freq; __sincosf(theta, &sin_vals[i], &cos_vals[i]); } @@ -221,6 +254,8 @@ __global__ void fusedQKNormRopeKernel( + inv_freq_extrapolation * inv_freq_extrapolation_factor; } + float pos_id = selectMRopePosId( + position_ids, tokenIdx, num_tokens, half_dim, use_mrope, mrope_section1, mrope_section2); float theta = pos_id * freq; __sincosf(theta, &sin_vals[i], &cos_vals[i]); } @@ -279,7 +314,8 @@ __global__ void fusedQKNormRopeKernel( void launchFusedQKNormRope(void* qkv, int const num_tokens, int const num_heads_q, int const num_heads_k, int const num_heads_v, int const head_dim, int const rotary_dim, float const eps, void const* q_weight, void const* k_weight, float const base, bool const interleave, int const* position_ids, float factor, float low, - float high, float attention_factor, cudaStream_t stream, bool is_qk_norm) + float high, float attention_factor, cudaStream_t stream, bool is_qk_norm, bool use_gemma, bool use_mrope, + int mrope_section1, int mrope_section2) { if (factor == 1.0f) { @@ -310,26 +346,29 @@ void launchFusedQKNormRope(void* qkv, int const num_tokens, int const num_heads_ { case 64: DISPATCH_INTERLEAVE(interleave, INTERLEAVE, { - fusedQKNormRopeKernel<64, INTERLEAVE><<>>( - reinterpret_cast<__nv_bfloat16*>(qkv), num_heads_q, num_heads_k, num_heads_v, rotary_dim, eps, - reinterpret_cast<__nv_bfloat16 const*>(q_weight), reinterpret_cast<__nv_bfloat16 const*>(k_weight), - base, position_ids, num_tokens, factor, low, high, attention_factor, is_qk_norm); + fusedQKNormRopeKernel<64, INTERLEAVE> + <<>>(reinterpret_cast<__nv_bfloat16*>(qkv), num_heads_q, num_heads_k, + num_heads_v, rotary_dim, eps, reinterpret_cast<__nv_bfloat16 const*>(q_weight), + reinterpret_cast<__nv_bfloat16 const*>(k_weight), base, position_ids, num_tokens, factor, low, high, + attention_factor, is_qk_norm, use_gemma, use_mrope, mrope_section1, mrope_section2); }); break; case 128: DISPATCH_INTERLEAVE(interleave, INTERLEAVE, { - fusedQKNormRopeKernel<128, INTERLEAVE><<>>( - reinterpret_cast<__nv_bfloat16*>(qkv), num_heads_q, num_heads_k, num_heads_v, rotary_dim, eps, - reinterpret_cast<__nv_bfloat16 const*>(q_weight), reinterpret_cast<__nv_bfloat16 const*>(k_weight), - base, position_ids, num_tokens, factor, low, high, attention_factor, is_qk_norm); + fusedQKNormRopeKernel<128, INTERLEAVE> + <<>>(reinterpret_cast<__nv_bfloat16*>(qkv), num_heads_q, num_heads_k, + num_heads_v, rotary_dim, eps, reinterpret_cast<__nv_bfloat16 const*>(q_weight), + reinterpret_cast<__nv_bfloat16 const*>(k_weight), base, position_ids, num_tokens, factor, low, high, + attention_factor, is_qk_norm, use_gemma, use_mrope, mrope_section1, mrope_section2); }); break; case 256: DISPATCH_INTERLEAVE(interleave, INTERLEAVE, { - fusedQKNormRopeKernel<256, INTERLEAVE><<>>( - reinterpret_cast<__nv_bfloat16*>(qkv), num_heads_q, num_heads_k, num_heads_v, rotary_dim, eps, - reinterpret_cast<__nv_bfloat16 const*>(q_weight), reinterpret_cast<__nv_bfloat16 const*>(k_weight), - base, position_ids, num_tokens, factor, low, high, attention_factor, is_qk_norm); + fusedQKNormRopeKernel<256, INTERLEAVE> + <<>>(reinterpret_cast<__nv_bfloat16*>(qkv), num_heads_q, num_heads_k, + num_heads_v, rotary_dim, eps, reinterpret_cast<__nv_bfloat16 const*>(q_weight), + reinterpret_cast<__nv_bfloat16 const*>(k_weight), base, position_ids, num_tokens, factor, low, high, + attention_factor, is_qk_norm, use_gemma, use_mrope, mrope_section1, mrope_section2); }); break; default: TLLM_THROW("Unsupported head dimension for fusedQKNormRope: %d", head_dim); diff --git a/cpp/tensorrt_llm/kernels/fusedQKNormRopeKernel.h b/cpp/tensorrt_llm/kernels/fusedQKNormRopeKernel.h index c976f2a0fe30..4e2421cb57a2 100644 --- a/cpp/tensorrt_llm/kernels/fusedQKNormRopeKernel.h +++ b/cpp/tensorrt_llm/kernels/fusedQKNormRopeKernel.h @@ -45,7 +45,11 @@ void launchFusedQKNormRope( float high, // threshold for low frequency float attention_factor, // attention_factor applied on cos and sin cudaStream_t stream, // CUDA stream - bool is_qk_norm); + bool is_qk_norm, // Whether to apply QK norm + bool use_gemma, // Whether QK norm uses Gemma-style RMSNorm (scale by (1 + weight)) + bool use_mrope, // Whether to use interleaved mRoPE position selection + int mrope_section1, // mrope_section[1] (height) + int mrope_section2); // mrope_section[2] (width) } // namespace kernels diff --git a/cpp/tensorrt_llm/kernels/indexerTopK.cu b/cpp/tensorrt_llm/kernels/indexerTopK.cu index 6929dc2a178d..ad1e728b3298 100644 --- a/cpp/tensorrt_llm/kernels/indexerTopK.cu +++ b/cpp/tensorrt_llm/kernels/indexerTopK.cu @@ -271,13 +271,18 @@ __device__ bool processHistogramStep(int const* indices, InputT const* logits, i // The threshold bin. thresholdBinIdx = smemThresholdBinIdx[0]; + // Skip auto-promote at step 0 when we'll continue: half-precision bins + // don't align with step 2's full-precision bit-pattern filter, so a + // step-0 promote would be double-counted at step 2. + bool const step0WillContinue = (step == 0) && (smemFinalBinSize[0] > kNumFinalItems); + auto processBins = [&](InputT logitIn, int idx) { float const logit = static_cast(logitIn); if (isPartialMatch(logit, logitPattern)) { uint32_t binIdx = extractBinIdx(logit); - if (binIdx < thresholdBinIdx) + if (binIdx < thresholdBinIdx && !step0WillContinue) { // The element is part of the top-k selection int dstIdx = atomicAdd(&smemFoundTopKValues[0], 1); @@ -363,28 +368,21 @@ __device__ bool processHistogramStep(int const* indices, InputT const* logits, i return smemFinalBinSize[0] > kNumFinalItems; } -// Follows half - 11 - 11 - 10 bit iterations -template -static __device__ void topKPerRowJob(int const* indices, InputT const* logits, int rowStart, int rowEnd, - int* outIndices, float* outLogits, int stride1, int topK) +// Smem holder for topKPerRowJob's final-sort. Always reserves +// BlockRadixSort::TempStorage so the sort algorithm can be picked at runtime +// (the union's size is dominated by FinalItems = 16 KB at our shapes). +template +struct TopKSmem { - // The number of slots for the final pass. static constexpr int kNumFinalItems = 2048; - // The number of elements per thread for the final sort. static constexpr int kNumFinalItemsPerThread = kNumFinalItems / kNumThreadsPerBlock; - // The class to sort the elements during the final pass. using FinalSort = cub::BlockRadixSort; - using FinalSortTempStorage = std::conditional_t; - // The class to compute the inclusive prefix-sum over the histogram. + using FinalSortTempStorage = typename FinalSort::TempStorage; using Scan = cub::BlockScan; - // The structure to store the final items (for the final pass). struct FinalItems { - // Shared memory to store the indices for the final pass. int indices[kNumFinalItems]; - // Shared memory to store the logits for the final pass. float logits[kNumFinalItems]; }; @@ -394,34 +392,47 @@ static __device__ void topKPerRowJob(int const* indices, InputT const* logits, i int data[kNumBins]; }; - // Shared memory to compute the block sort. - __shared__ union + union Final { FinalItems items; FinalSortTempStorage finalSort; Histogram histo; - } smemFinal; + }; + + Final smemFinal; + int smemThresholdBinIdx[1]; + int smemFinalDstIdx[1]; + int smemFinalBinSize[1]; + int smemFoundTopKValues[1]; +}; + +// Follows half - 11 - 11 - 10 bit iterations +template +static __device__ void topKPerRowJob(int const* indices, InputT const* logits, int rowStart, int rowEnd, + int* outIndices, float* outLogits, int stride1, int topK, TopKSmem& smem) +{ + static constexpr int kNumFinalItems = TopKSmem::kNumFinalItems; + static constexpr int kNumFinalItemsPerThread = TopKSmem::kNumFinalItemsPerThread; + using FinalSort = typename TopKSmem::FinalSort; + + auto& smemFinal = smem.smemFinal; + int* smemThresholdBinIdx = smem.smemThresholdBinIdx; + int* smemFinalDstIdx = smem.smemFinalDstIdx; + int* smemFinalBinSize = smem.smemFinalBinSize; + int* smemFoundTopKValues = smem.smemFoundTopKValues; // Shared memory to store the selected indices. // If we are processing using multiple blocks, we need to store the logits and // indices. extern __shared__ int32_t smemOutput[]; - // Shared memory to store the threshold bin. - __shared__ int smemThresholdBinIdx[1]; - // Shared memory counter to register the candidates for the final phase. - __shared__ int smemFinalDstIdx[1]; - // Shared memory to determine if the threshold bin fits in the final items. - __shared__ int smemFinalBinSize[1]; - // Shared memory to keep track of the top-k values found so far by the - // previous iterations - __shared__ int smemFoundTopKValues[1]; - // The length of the row. int rowLen = rowEnd - rowStart; // Shortcut if the length of the row is smaller than Top-K. Indices are not - // sorted by their corresponding logit. + // sorted by their corresponding logit. Unreachable when mergeBlocks=true: + // both merge callers pass rowLen = numBlocksPerRow * topK > topK. if (rowLen <= topK) { for (int rowIt = threadIdx.x; rowIt < rowLen; rowIt += kNumThreadsPerBlock) @@ -491,10 +502,12 @@ static __device__ void topKPerRowJob(int const* indices, InputT const* logits, i if (!continueToNextStep) { - // The histogram did not proceed to the final 10 bits, therefore we need to - // sort the final items The logits of the elements to be sorted in the final - // pass. - if constexpr (useRadixSort) + // Sort the threshold-bin candidates. Insertion sort wins below ~512 + // items (O(n^2/T) with no fixed cost); BlockRadixSort wins above + // (constant cost padded to kNumFinalItems = 2048). + constexpr int kInsertionSortBranchThreshold = 512; + int const finalCount = smemFinalDstIdx[0]; + if (finalCount > kInsertionSortBranchThreshold) { // Sorting with radix sort float finalLogits[kNumFinalItemsPerThread]; @@ -512,7 +525,7 @@ static __device__ void topKPerRowJob(int const* indices, InputT const* logits, i for (int ii = 0; ii < kNumFinalItemsPerThread; ++ii) { int srcIdx = ii * kNumThreadsPerBlock + threadIdx.x; - if (srcIdx < smemFinalDstIdx[0]) + if (srcIdx < finalCount) { finalLogits[ii] = smemFinal.items.logits[srcIdx]; finalIndices[ii] = smemFinal.items.indices[srcIdx]; @@ -545,13 +558,13 @@ static __device__ void topKPerRowJob(int const* indices, InputT const* logits, i } else { - // Sorting with insertion sort + // Sorting with insertion sort. auto baseIdx = smemFoundTopKValues[0]; - for (int i = threadIdx.x; i < smemFinalDstIdx[0]; i += kNumThreadsPerBlock) + for (int i = threadIdx.x; i < finalCount; i += kNumThreadsPerBlock) { int outIndex = 0; auto logit = smemFinal.items.logits[i]; - for (int j = 0; j < smemFinalDstIdx[0]; j++) + for (int j = 0; j < finalCount; j++) { auto otherLogit = smemFinal.items.logits[j]; if (logit < otherLogit || (logit == otherLogit && i < j)) @@ -559,7 +572,6 @@ static __device__ void topKPerRowJob(int const* indices, InputT const* logits, i outIndex++; } } - // Store if outIndex is in bounds if (outIndex + baseIdx < topK) { smemOutput[outIndex + baseIdx] = smemFinal.items.indices[i]; @@ -581,6 +593,10 @@ static __device__ void topKPerRowJob(int const* indices, InputT const* logits, i outIndices[i] = smemOutput[i]; outLogits[i] = reinterpret_cast(smemOutput + topK)[i]; } + else if constexpr (mergeBlocks) + { + outIndices[i] = smemOutput[i]; + } else { if (stride1 == 1) @@ -597,7 +613,7 @@ static __device__ void topKPerRowJob(int const* indices, InputT const* logits, i } } // namespace -template +template static __global__ __launch_bounds__(kNumThreadsPerBlock) void topKPerRowPrefill(InputT const* logits, int const* rowStarts, int const* rowEnds, int* outIndices, int stride0, int stride1, int const topK, int const offsetIndex) @@ -619,15 +635,15 @@ static __global__ __launch_bounds__(kNumThreadsPerBlock) void topKPerRowPrefill( outIndices += static_cast(rowIdx) * topK; logits += static_cast(rowIdx) * stride0; - topKPerRowJob( - nullptr, logits, rowStart, rowEnd, outIndices, nullptr, stride1, topK); + __shared__ TopKSmem smem; + topKPerRowJob( + nullptr, logits, rowStart, rowEnd, outIndices, nullptr, stride1, topK, smem); #if (defined(__CUDA_ARCH__) && (__CUDA_ARCH__ >= 900)) cudaTriggerProgrammaticLaunchCompletion(); #endif } -template +template static __global__ __launch_bounds__(kNumThreadsPerBlock) void topKPerRowDecode(InputT const* logits, int const* seqLens, int* outIndices, int stride0, int stride1, int const topK, int next_n, float* outLogits = nullptr, int const numBlocksToMerge = 0, int const* indices = nullptr) @@ -667,8 +683,9 @@ static __global__ __launch_bounds__(kNumThreadsPerBlock) void topKPerRowDecode(I } logits += static_cast(rowIdx) * stride0; - topKPerRowJob( - indices, logits, rowStart, rowEnd, outIndices, outLogits, stride1, topK); + __shared__ TopKSmem smem; + topKPerRowJob( + indices, logits, rowStart, rowEnd, outIndices, outLogits, stride1, topK, smem); #if (defined(__CUDA_ARCH__) && (__CUDA_ARCH__ >= 900)) cudaTriggerProgrammaticLaunchCompletion(); #endif @@ -677,10 +694,415 @@ static __global__ __launch_bounds__(kNumThreadsPerBlock) void topKPerRowDecode(I namespace { -// Scheme X bound calculator — shared between fp32 and bf16/fp16 dispatchers. -// Caches hardware attrs (SM count, L2 capacity) and the small-N threshold -// once per process via std::call_once. Per-call cost is just two reads -// from cached static variables plus a small arithmetic block, no syscalls. +// Multi-pass radix: 4 launches (half-precision top-11 bits, then float bits +// [21..32), [10..21), [0..10)). Per-row state lives in DRAM scratch; candidate +// data uses two ping-pong buffers. Pass 3's last block emits the final top-K. +static constexpr int kRadixBins = 2048; + +// Per-row scratch state. The last block of each pass (picked via +// `finishedBlocks`) scans the global histogram and writes the next pass's +// threshold. +struct alignas(64) RadixState +{ + int candCount; // candidates entering current pass + int outIdx; // running outIndices write position + int kRemaining; // topK - outIdx + int filterCnt; // running candidate-buf write position + int thresholdBin; // prior pass's threshold; overwritten this pass's last block + int finishedBlocks; // last-block atomic, reset between passes + int thresholdLess; // count of bins below thresholdBin; pass-3 emit routes + // ties (bin == threshold) into a disjoint slot range. + int padding[1]; +}; + +// Common last-block trailer: prefix-scan the merged global histogram, locate +// the bin where the running count crosses kRemaining, stash to state for the +// next pass. step < 3 also resets the per-row global histogram. In step 1 +// the trailer writes st.candCount = full row length for pass 2 to consume +// (pass 1 reads the length inline from seqLens, so no init kernel is needed). +template +__device__ __forceinline__ void radixLastBlockTrailer(int* gHist, RadixState& st, int topK, int rowFullLen) +{ + using Scan = cub::BlockScan; + __shared__ typename Scan::TempStorage scanStorage; + __shared__ int s_thresholdBin; + __shared__ int s_runningBefore; + __shared__ int s_thresholdCount; + + if (threadIdx.x == 0) + { + s_thresholdBin = -1; + s_runningBefore = 0; + s_thresholdCount = 0; + } + __syncthreads(); + + // kRemaining for THIS pass: + // step 1: topK (no auto-promotes have happened yet). + // step 2/3: topK - outIdx (where outIdx was atomic-incremented during + // the filter loop). The histogram for the next pass's + // threshold pick must target this fresh value, not the + // stale state.kRemaining left over from the previous pass. + int const kRem = (step == 1) ? topK : (topK - st.outIdx); + if (kRem <= 0) + { + // All top-k slots already filled by auto-promotes in this pass — + // no need for a next pass to emit anything. + if (threadIdx.x == 0) + { + st.thresholdBin = -1; + st.candCount = 0; + st.kRemaining = 0; + st.finishedBlocks = 0; + st.filterCnt = 0; + (void) rowFullLen; + } + if constexpr (step < 3) + { + __syncthreads(); + for (int i = threadIdx.x; i < kRadixBins; i += kThreads) + gHist[i] = 0; + } + return; + } + constexpr int kRoundsPerScan = kRadixBins / kThreads; + int running = 0; + for (int r = 0; r < kRoundsPerScan; ++r) + { + int bin = r * kThreads + threadIdx.x; + int c = gHist[bin]; + int prefix, total; + Scan(scanStorage).ExclusiveSum(c, prefix, total); + prefix += running; + int next = prefix + c; + if (prefix < kRem && next >= kRem && s_thresholdBin == -1) + { + atomicCAS(&s_thresholdBin, -1, bin); + if (s_thresholdBin == bin) + { + s_runningBefore = prefix; + s_thresholdCount = c; + } + } + running += total; + __syncthreads(); + if (s_thresholdBin != -1) + break; + } + __syncthreads(); + + if (threadIdx.x == 0) + { + // If the cumsum over the whole histogram never reached kRem the row + // has fewer items than we still need (e.g. decode rows shorter than + // topK). Set thresholdBin to a sentinel above any valid bin so the + // next pass's `bin < thresholdBin` test accepts every surviving + // candidate as auto-promote. + st.thresholdBin = (s_thresholdBin == -1) ? kRadixBins : s_thresholdBin; + // s_runningBefore is the count of histogram items in bins < threshold. + // In the sentinel case it stays at its init 0; that's fine because + // pass-3's inline final-emit only uses thresholdLess to position the + // ties (bin == threshold) write base, and the sentinel branch has + // no items in the threshold bin (the sentinel is above all valid bins). + st.thresholdLess = s_runningBefore; + st.finishedBlocks = 0; + if constexpr (step == 1) + { + // Pass 2 also scans the full row from `logits`, so it reads + // st.candCount = full row length. Pass 1 did not write to it + // and the state struct started at zero (cudaMemsetAsync). + st.candCount = rowFullLen; + (void) s_thresholdCount; + (void) kRem; + } + else + { + st.candCount = st.filterCnt; + int newKRem = topK - st.outIdx; + if (newKRem < 0) + newKRem = 0; + st.kRemaining = newKRem; + st.filterCnt = 0; + } + } + if constexpr (step < 3) + { + __syncthreads(); + for (int i = threadIdx.x; i < kRadixBins; i += kThreads) + gHist[i] = 0; + } +} + +// Fused histogram + filter pass kernel. +// +// step == 1: pass 1, no filter, just histogram top-11 bits of the row. +// step == 2: pass 2 reads `logits` (pass 1 didn't write a candidate buffer), +// for each item: +// bin1 < thresholdBin1 → write to outIndices (auto-promote) +// bin1 == thresholdBin1 → append to candBufOut, count its bin2 +// in the histogram for pass 2 +// else → drop +// step == 3: same as step 2 but reads `candBufIn` (pass 2's output) and +// uses extractBinIdx<2> for the prior-bits check, extractBinIdx<3> +// for the histogram. +// +// Last block of every pass runs `radixLastBlockTrailer` to compute the +// next pass's threshold and reset cross-pass state. +template +static __global__ __launch_bounds__(kThreads) void radixPassKernel(InputT const* logits, int const* seqLens, + int* outIndices, int const* candBufIn, int* candBufOut, int* histograms, RadixState* state, int stride0, int next_n, + int topK) +{ + int rowIdx = blockIdx.y; + int blockInRow = blockIdx.x; + int blocksPerRow = gridDim.x; + + RadixState& st = state[rowIdx]; + int* gHist = histograms + static_cast(rowIdx) * kRadixBins; + + __shared__ int sHist[kRadixBins]; + for (int i = threadIdx.x; i < kRadixBins; i += kThreads) + sHist[i] = 0; + __syncthreads(); + + if constexpr (step == 1) + { + // Read seqLen inline so pass 1 does not depend on st.candCount being + // pre-initialised by a separate init kernel; the cudaMemsetAsync that + // zeroes state+histograms together is enough. Pass-1 trailer below + // writes st.candCount = seqLens[rowIdx] for pass 2 to consume. + int const rowEnd = seqLens[rowIdx / next_n] - next_n + (rowIdx % next_n) + 1; + InputT const* in = logits + static_cast(rowIdx) * stride0; + size_t threadRank = static_cast(blockInRow) * kThreads + threadIdx.x; + size_t numThreads = static_cast(blocksPerRow) * kThreads; + auto f = [&](InputT vIn, size_t /*idx*/) + { + float const v = static_cast(vIn); + uint32_t bin = extractBinIdx(v); + atomicAdd(&sHist[bin], 1); + }; + vectorized_process(threadRank, numThreads, in, static_cast(rowEnd), f); + } + else if constexpr (step == 2) + { + int const rowEnd = st.candCount; + InputT const* in = logits + static_cast(rowIdx) * stride0; + int* outIdxArr = outIndices + static_cast(rowIdx) * topK; + int* candArr = candBufOut + static_cast(rowIdx) * stride0; + int const prevThresh = st.thresholdBin; + size_t threadRank = static_cast(blockInRow) * kThreads + threadIdx.x; + size_t numThreads = static_cast(blocksPerRow) * kThreads; + auto f = [&](InputT vIn, size_t i) + { + float const v = static_cast(vIn); + int bin1 = static_cast(extractBinIdx<1>(v)); + if (bin1 < prevThresh) + { + int pos = atomicAdd(&st.outIdx, 1); + if (pos < topK) + outIdxArr[pos] = static_cast(i); + } + else if (bin1 == prevThresh) + { + int pos = atomicAdd(&st.filterCnt, 1); + candArr[pos] = static_cast(i); + uint32_t bin2 = extractBinIdx(v); + atomicAdd(&sHist[bin2], 1); + } + }; + vectorized_process(threadRank, numThreads, in, static_cast(rowEnd), f); + } + else // step == 3 + { + int const candCnt = st.candCount; + int const* candArrIn = candBufIn + static_cast(rowIdx) * stride0; + InputT const* in = logits + static_cast(rowIdx) * stride0; + int* outIdxArr = outIndices + static_cast(rowIdx) * topK; + int* candArrOut = candBufOut + static_cast(rowIdx) * stride0; + int const prevThresh = st.thresholdBin; + for (int i = blockInRow * kThreads + threadIdx.x; i < candCnt; i += blocksPerRow * kThreads) + { + int srcIdx = candArrIn[i]; + float v = static_cast(in[srcIdx]); + int bin2 = static_cast(extractBinIdx<2>(v)); + if (bin2 < prevThresh) + { + int pos = atomicAdd(&st.outIdx, 1); + if (pos < topK) + outIdxArr[pos] = srcIdx; + } + else if (bin2 == prevThresh) + { + int pos = atomicAdd(&st.filterCnt, 1); + candArrOut[pos] = srcIdx; + uint32_t bin3 = extractBinIdx(v); + atomicAdd(&sHist[bin3], 1); + } + } + } + __syncthreads(); + + for (int i = threadIdx.x; i < kRadixBins; i += kThreads) + { + int c = sHist[i]; + if (c) + atomicAdd(&gHist[i], c); + } + + __threadfence(); + __shared__ int isLast; + if (threadIdx.x == 0) + { + int prev = atomicAdd(&st.finishedBlocks, 1); + isLast = (prev == blocksPerRow - 1) ? 1 : 0; + } + __syncthreads(); + if (!isLast) + return; + + int const rowFullLen = (step == 1) ? (seqLens[rowIdx / next_n] - next_n + (rowIdx % next_n) + 1) : 0; + radixLastBlockTrailer(gHist, st, topK, rowFullLen); + + if constexpr (step == 3) + { + // Final emit, folded into the last block of pass 3. Scan candBufOut + // (top 22 bits == thresholdBin2) and route items into outIndices by + // bin3 vs thresholdBin3. Two-counter scheme so threshold-bin ties + // don't race definite top-k items on the same atomic: + // bin3 < thresh3 → slots [ltBase, ltBase + prefix3) + // bin3 == thresh3 → slots [ltBase + prefix3, topK) + __syncthreads(); + int const filterCnt = st.candCount; + int const thresh3 = st.thresholdBin; + int const prefix3 = st.thresholdLess; + int const* candArr = candBufOut + static_cast(rowIdx) * stride0; + InputT const* in = logits + static_cast(rowIdx) * stride0; + int* outIdxArr = outIndices + static_cast(rowIdx) * topK; + int const ltBase = st.outIdx; // already at outBase here + int const eqBase = ltBase + prefix3; + int const eqCap = topK - eqBase; // ≥ 0 by trailer invariant + __shared__ int sEqEmitted; + if (threadIdx.x == 0) + sEqEmitted = 0; + __syncthreads(); + for (int i = threadIdx.x; i < filterCnt; i += kThreads) + { + int srcIdx = candArr[i]; + float v = static_cast(in[srcIdx]); + int bin3 = static_cast(extractBinIdx<3>(v)); + if (bin3 < thresh3) + { + // atomicAdd on st.outIdx is safe: by construction exactly + // prefix3 items fall in this branch, so pos stays in + // [ltBase, eqBase) which is strictly inside [0, topK). + int pos = atomicAdd(&st.outIdx, 1); + outIdxArr[pos] = srcIdx; + } + else if (bin3 == thresh3) + { + int pos = atomicAdd(&sEqEmitted, 1); + if (pos < eqCap) + outIdxArr[eqBase + pos] = srcIdx; + } + } + __syncthreads(); + if (threadIdx.x == 0) + { + int eq = sEqEmitted < eqCap ? sEqEmitted : eqCap; + int filled = eqBase + eq; + if (filled > topK) + filled = topK; + for (int i = filled; i < topK; ++i) + outIdxArr[i] = -1; + } + // Reset the per-row global histogram and st.outIdx so the next call + // sees a clean state without a per-call cudaMemsetAsync. Caller must + // zero-initialize the scratch buffer before the first call. + __syncthreads(); + for (int i = threadIdx.x; i < kRadixBins; i += kThreads) + gHist[i] = 0; + if (threadIdx.x == 0) + st.outIdx = 0; + } +} + +// Scratch layout (uint8 buffer, 64-byte aligned regions): +// RadixState[numRows] +// int histograms[numRows * kRadixBins] (zeroed on first call by +// torch::zeros allocator; pass-3 +// trailer zeroes for subsequent +// calls) +// int candBuf1[numRows * stride0] (pass 2 → pass 3 input) +// int candBuf2[numRows * stride0] (pass 3 → fused final filter) +static size_t radixScratchBytes(int numRows, int numColumns) +{ + auto roundUp = [](size_t x) { return (x + 63) & ~size_t(63); }; + size_t s = 0; + s += roundUp(sizeof(RadixState) * numRows); + s += roundUp(sizeof(int) * static_cast(numRows) * kRadixBins); + s += roundUp(sizeof(int) * static_cast(numRows) * numColumns); + s += roundUp(sizeof(int) * static_cast(numRows) * numColumns); + return s; +} + +template +static void launchMultiPassRadix(void* scratch, InputT const* logits, int const* seqLens, int* outIndices, int numRows, + int numColumns, int topK, int stride0, int next_n, cudaLaunchAttribute const* attrs, cudaStream_t stream) +{ + auto roundUp = [](size_t x) { return (x + 63) & ~size_t(63); }; + char* base = static_cast(scratch); + RadixState* state = reinterpret_cast(base); + base += roundUp(sizeof(RadixState) * numRows); + int* histograms = reinterpret_cast(base); + base += roundUp(sizeof(int) * static_cast(numRows) * kRadixBins); + int* candBuf1 = reinterpret_cast(base); + base += roundUp(sizeof(int) * static_cast(numRows) * numColumns); + int* candBuf2 = reinterpret_cast(base); + + int sm_cnt = 132; + { + int dev = 0; + cudaGetDevice(&dev); + cudaDeviceGetAttribute(&sm_cnt, cudaDevAttrMultiProcessorCount, dev); + } + // Block fan-out heuristic: target ~4 active blocks/SM (one wave at the + // achievable occupancy of radixPassKernel<512, 1>), with a per-block work + // floor of 2048 items (4 items/thread at 512-wide). + int targetTotalBlocks = sm_cnt * 4; + int numBlocksPerRow = (targetTotalBlocks + numRows - 1) / numRows; + int maxByCols = numColumns / 2048; + if (numBlocksPerRow > maxByCols) + numBlocksPerRow = maxByCols; + if (numBlocksPerRow < 1) + numBlocksPerRow = 1; + + constexpr int kPassThreads = 512; + + auto launchPass = [&](void const* kernel, int const* candIn, int* candOut) + { + cudaLaunchConfig_t cfg{}; + cfg.gridDim = dim3(numBlocksPerRow, numRows); + cfg.blockDim = kPassThreads; + cfg.dynamicSmemBytes = 0; + cfg.stream = stream; + cfg.numAttrs = 1; + cfg.attrs = const_cast(attrs); + void* args[] = {(void*) &logits, (void*) &seqLens, (void*) &outIndices, (void*) &candIn, (void*) &candOut, + (void*) &histograms, (void*) &state, (void*) &stride0, (void*) &next_n, (void*) &topK}; + cudaLaunchKernelExC(&cfg, kernel, args); + }; + + launchPass( + reinterpret_cast(&radixPassKernel), (int const*) nullptr, (int*) nullptr); + launchPass( + reinterpret_cast(&radixPassKernel), (int const*) nullptr, candBuf1); + // Pass 3 emits the final top-K inline in its last-block trailer (see + // radixPassKernel) instead of requiring a separate filter launch. + launchPass( + reinterpret_cast(&radixPassKernel), (int const*) candBuf1, candBuf2); +} + +// Architecture-derived GVR eligibility bounds (cached per-process). struct SchemeXBounds { int smCount; @@ -729,89 +1151,33 @@ inline SchemeXBounds getSchemeXBounds(int numColumns, int bytesPerElem) return b; } -} // anonymous namespace - -void invokeIndexerTopKDecode(float const* logits, int const* seqLens, int* indices, float* outLogitsAux, - int* outIndicesAux, int const splitWorkThreshold, int const numRows, int const numColumns, int const stride0, - int const stride1, int const next_n, int const topK, int const* preIdx, int const preIdxStride, - int const preIdxCount, float* heuristicScratch, cudaStream_t const stream) +// Unified dispatcher (fp32 / bf16 / fp16). Each tier's kernel is templated on +// InputT and casts to float at HBM-read sites; the scratch buffer is uint8. +template +void invokeIndexerTopKDecodeImpl(InputT const* logits, int const* seqLens, int* indices, int const splitWorkThreshold, + int const numRows, int const numColumns, int const stride0, int const stride1, int const next_n, int const topK, + int const* preIdx, int const preIdxStride, int const preIdxCount, InputT* heuristicScratch, + cudaStream_t const stream, void* scratch, size_t scratchBytes, bool is_prefill) { - - // INVARIANT: kSortingAlgorithmThreshold is the ORIGINAL TRT-LLM Radix-path - // internal boundary (Insertion vs Radix-radix). v1.2.X dispatcher leaves it - // at 12288 — the GVR Heuristic axis (kSeqSmall, see below) is INDEPENDENT, - // so when canUseHeuristic is false (e.g. preIdx missing, BS too large, or - // numColumns < kSeqSmall), this function falls back to BYTE-IDENTICAL - // original radix dispatcher behavior. Do not touch this constant. - constexpr int kSortingAlgorithmThreshold = 12288; - constexpr int kDefaultSplitWorkThreshold = 200 * 1000; + // Split-work cutoff: matches main's 200k default. is_prefill forces + // single-block via a 1<<30 threshold no shape can reach: prefill chunks are + // bounded by max_num_tokens, well below the multi-pass radix crossover at + // any practical setting. + int const adaptiveSplitWorkThreshold = is_prefill ? (1 << 30) : 200 * 1000; + int const effectiveSplitWorkThreshold = splitWorkThreshold > 0 ? splitWorkThreshold : adaptiveSplitWorkThreshold; constexpr int kNumThreadsPerBlock = 512; - int const effectiveSplitWorkThreshold = splitWorkThreshold > 0 ? splitWorkThreshold : kDefaultSplitWorkThreshold; - - // ======================================================================== - // Small-N dispatch axis. - // - // GVR Heuristic Top-K has a *fixed* per-launch overhead from Phase-1 - // (preIdx stats reduction over M=2048) and Phase-4 (2048-bin histogram - // snap), totaling ~11 µs regardless of N. For small N (≤16K), this - // fixed cost dominates and the kernel loses to the existing - // insertion-sort/radix path. Empirically (random data, B200 BS=1): - // N=8192 : Heuristic 16.5 µs vs Radix 11.2 µs (radix 1.47× faster) - // N=16384 : Heuristic 21.9 µs vs Radix 22.0 µs (parity) - // N=32768 : Heuristic 26.1 µs vs Radix 32.9 µs (heuristic 1.26× faster) - // N=131072 : Heuristic 43.4 µs vs Radix 76.1 µs (heuristic 1.75× faster) - // - // Route N < kSeqSmall to the existing Radix/Insertion path (which itself - // splits at kSortingAlgorithmThreshold=12288). kSeqSmall is set at the - // empirical crossover point. - // - // ======================================================================== - // Architecture-derived BS-threshold dispatch — jointly bounded by - // occupancy AND L2 cache capacity. - // - // Two physical constraints bound when the per-row heuristic kernel - // remains faster than a radix streaming kernel: - // - // (A) Occupancy bound — 3·SM − SM/8 (wave geometry + setup margin) - // Each CTA uses ~58 KB SMEM (fixed, independent of N), so B200's - // 228 KB dynamic SMEM allows max 3 CTA/SM. Above 3·SM rows per - // launch, tail-wave imbalance causes stragglers. The -SM/8 margin - // (~1/8 wave) covers CTA setup + L2 ingestion overhead. - // On B200(148 SM): 3×148 − 18 = 426. - // - // (B) L2 cache bound — 0.9·L2 / (4·N) per-CTA logits fit - // Each CTA streams its row (N×4B) through L2 per Phase-2 iter. - // With num_concurrent_CTAs × N × 4B > L2, eviction dominates. - // On B200(126 MB L2) with N=70K: 0.9·126MB/(4·70690) ≈ 440, - // which is ~ equal to (A)=426 — the two constraints cross over - // near the SWE-Bench data point. - // For N > 73K the L2 bound tightens below (A) and must take - // over; e.g. N=128K → kBsL2=238, N=196K → kBsL2=155. - // - // Dispatch threshold = min(kBsWave, kBsL2), still data-agnostic (only - // queries hardware attrs). At N≈70K both bounds produce ~426, so the - // L2 axis is a no-op there; for larger N it auto-tightens the threshold. - // - // Small-N lower bound `kSeqSmall` (default 12288) lets the Heuristic - // axis take over wherever the original Radix-radix branch would have - // triggered. Random-data benchmarks suggest the crossover is 16384, - // but workloads with strongly preIdx-correlated logits make P1 stats - // accurate and P2 converge in 1-2 iterations, shifting the real - // crossover into the [12288, 16384] band. Configurable via - // TRTLLM_HEURISTIC_NMIN env (>=1024). - // ======================================================================== - auto const bounds = getSchemeXBounds(numColumns, /*bytesPerElem=*/4); - int const kBsWave = bounds.kBsWave; - int const kBsL2 = bounds.kBsL2; - int const kBsLarge = bounds.kBsLarge; - int const kSeqSmall = bounds.kSeqSmall; + // GVR eligibility (matches main's rule): supported K, stride1 contiguous, + // preIdx + scratch provided, numColumns in [kSeqSmall, splitWorkThreshold), + // and numRows below the architecture-derived wave/L2 bound. is_prefill + // suppresses GVR through effectiveSplitWorkThreshold being huge. + auto const bounds = getSchemeXBounds(numColumns, /*bytesPerElem=*/static_cast(sizeof(InputT))); bool const isSupportedTopK = (topK == 512 || topK == 1024 || topK == 2048); bool const canUseHeuristic = preIdx != nullptr && stride1 == 1 && isSupportedTopK && preIdxCount == topK - && preIdxStride >= preIdxCount && numColumns < effectiveSplitWorkThreshold && numColumns >= kSeqSmall - && heuristicScratch != nullptr && numRows < kBsLarge; + && preIdxStride >= preIdxCount && heuristicScratch != nullptr && numColumns >= bounds.kSeqSmall + && numColumns < effectiveSplitWorkThreshold && numRows < bounds.kBsLarge; - // Optional env-gated dispatch trace (set TRTLLM_SCHEMEX_DEBUG=1 to enable) + // Env-gated dispatch trace (TRTLLM_SCHEMEX_DEBUG=1). { static std::once_flag sDebugOnceFlag; static bool sDebug = false; @@ -823,12 +1189,8 @@ void invokeIndexerTopKDecode(float const* logits, int const* seqLens, int* indic }); if (sDebug) { - fprintf(stderr, - "[Scheme X] numRows=%d numColumns=%d kBsWave=%d kBsL2=%d kBsLarge=%d kSeqSmall=%d smCount=%d " - "L2=%dMB -> %s path%s\n", - numRows, numColumns, kBsWave, kBsL2, kBsLarge, kSeqSmall, bounds.smCount, - bounds.l2Bytes / (1024 * 1024), canUseHeuristic ? "Heuristic" : "Radix", - (numColumns < kSeqSmall) ? " (small-N route)" : ""); + fprintf(stderr, "[Scheme X] numRows=%d numColumns=%d kBsLarge=%d kSeqSmall=%d -> %s path\n", numRows, + numColumns, bounds.kBsLarge, bounds.kSeqSmall, canUseHeuristic ? "Heuristic" : "Radix"); } } @@ -837,30 +1199,11 @@ void invokeIndexerTopKDecode(float const* logits, int const* seqLens, int* indic launchHeuristicTopKDecode(logits, seqLens, preIdx, indices, heuristicScratch, stride0, next_n, topK, preIdxStride, preIdxCount, numRows, stream); } - else if (numColumns < kSortingAlgorithmThreshold) - { - // Use insertion sort - auto* kernel_instance = &topKPerRowDecode; - - cudaLaunchConfig_t config; - config.gridDim = numRows; - config.blockDim = kNumThreadsPerBlock; - config.dynamicSmemBytes = topK * sizeof(int32_t); - config.stream = stream; - cudaLaunchAttribute attrs[1]; - attrs[0].id = cudaLaunchAttributeProgrammaticStreamSerialization; - attrs[0].val.programmaticStreamSerializationAllowed = tensorrt_llm::common::getEnvEnablePDL(); - config.numAttrs = 1; - config.attrs = attrs; - - cudaLaunchKernelEx( - &config, kernel_instance, logits, seqLens, indices, stride0, stride1, topK, next_n, nullptr, 0, nullptr); - } else if (numColumns < effectiveSplitWorkThreshold) { - // From this threshold, use radix sort instead - auto* kernel_instance = &topKPerRowDecode; - + // Single-block tier: one CTA per row. + auto* kernel_instance = &topKPerRowDecode; cudaLaunchConfig_t config; config.gridDim = numRows; config.blockDim = kNumThreadsPerBlock; @@ -871,192 +1214,74 @@ void invokeIndexerTopKDecode(float const* logits, int const* seqLens, int* indic attrs[0].val.programmaticStreamSerializationAllowed = tensorrt_llm::common::getEnvEnablePDL(); config.numAttrs = 1; config.attrs = attrs; - - cudaLaunchKernelEx( - &config, kernel_instance, logits, seqLens, indices, stride0, stride1, topK, next_n, nullptr, 0, nullptr); + cudaLaunchKernelEx(&config, kernel_instance, logits, seqLens, indices, stride0, stride1, topK, next_n, + /*outLogits=*/nullptr, /*numBlocksToMerge=*/0, /*indices=*/nullptr); } else { - // Long sequences are run in two steps - constexpr auto multipleBlocksPerRowConfig = 10; - auto* kernel_instance_part1 = &topKPerRowDecode; - cudaLaunchConfig_t config_part1; - config_part1.gridDim = dim3(numRows, multipleBlocksPerRowConfig); - config_part1.blockDim = kNumThreadsPerBlock; - config_part1.dynamicSmemBytes = 2 * topK * sizeof(int32_t); - config_part1.stream = stream; - cudaLaunchAttribute attrs[1]; - attrs[0].id = cudaLaunchAttributeProgrammaticStreamSerialization; - attrs[0].val.programmaticStreamSerializationAllowed = tensorrt_llm::common::getEnvEnablePDL(); - config_part1.numAttrs = 1; - config_part1.attrs = attrs; - - cudaLaunchKernelEx(&config_part1, kernel_instance_part1, logits, seqLens, outIndicesAux, stride0, stride1, topK, - next_n, outLogitsAux, 0, nullptr); - - constexpr int kNumThreadsPerBlockMerge = 1024; - auto* kernel_instance_part2 = &topKPerRowDecode; - cudaLaunchConfig_t config_part2; - config_part2.gridDim = numRows; - config_part2.blockDim = kNumThreadsPerBlockMerge; - config_part2.dynamicSmemBytes = topK * sizeof(int32_t); - config_part2.stream = stream; - // Reuse attrs array since part1 kernel has already been launched - config_part2.numAttrs = 1; - config_part2.attrs = attrs; - - cudaLaunchKernelEx(&config_part2, kernel_instance_part2, outLogitsAux, seqLens, indices, - multipleBlocksPerRowConfig * topK, 1, topK, next_n, nullptr, multipleBlocksPerRowConfig, outIndicesAux); + // Multi-pass radix. radixPassKernel reads logits contiguously, so + // strided inputs would rank the wrong values — gate on stride1 == 1. + // (The single-block tier handles stride1 != 1 via topKPerRowJob's + // strided fallback.) + TLLM_CHECK_WITH_INFO(stride1 == 1, "indexer top-k split-work tier (multi-pass radix) requires stride1 == 1."); + TLLM_CHECK_WITH_INFO(scratch != nullptr && scratchBytes >= radixScratchBytes(numRows, numColumns), + "indexer top-k split-work tier: scratch buffer missing or too small."); + cudaLaunchAttribute radixAttrs[1]; + radixAttrs[0].id = cudaLaunchAttributeProgrammaticStreamSerialization; + radixAttrs[0].val.programmaticStreamSerializationAllowed = tensorrt_llm::common::getEnvEnablePDL(); + launchMultiPassRadix( + scratch, logits, seqLens, indices, numRows, numColumns, topK, stride0, next_n, radixAttrs, stream); } sync_check_cuda_error(stream); } -// ============================================================================ -// bf16 / fp16 dispatcher overloads -// ============================================================================ -// Reuses the BS-threshold + small-N dispatch axes (kBsLarge, kSeqSmall) from -// the fp32 dispatcher, except kBsL2 uses sizeof(InputT) bytes/element instead -// of 4 — L2 footprint is half, so bf16/fp16 path remains valid for larger BS -// than fp32 at the same N. -// -// Fallback chain when GVR-Heuristic preconditions are not met (preIdx -// missing, BS too large, or numColumns < kSeqSmall): -// numColumns < kSortingAlgorithmThreshold (12288) → insertion sort -// kSortingAlgorithmThreshold ≤ numColumns < splitWorkThreshold → radix sort -// numColumns ≥ splitWorkThreshold (200K default) → unsupported -// -// Insertion + radix tiers use the same topKPerRowDecode kernel as fp32 with -// InputT propagated through; the histogram and sort steps operate on float -// keys after a static_cast(InputT) at HBM-read sites, so accuracy is -// identical to casting input to fp32 before the kernel. -// -// The split-work tier requires float aux buffers (outLogitsAux / -// outIndicesAux) that the bf16/fp16 entry does not expose; callers in that -// regime must use the fp32 entry. - -namespace -{ +} // anonymous namespace -template -void invokeIndexerTopKDecodeDtype(InputT const* logits, int const* seqLens, int* indices, int const splitWorkThreshold, +void invokeIndexerTopKDecode(float const* logits, int const* seqLens, int* indices, int const splitWorkThreshold, int const numRows, int const numColumns, int const stride0, int const stride1, int const next_n, int const topK, - int const* preIdx, int const preIdxStride, int const preIdxCount, InputT* heuristicScratch, - cudaStream_t const stream) + int const* preIdx, int const preIdxStride, int const preIdxCount, float* heuristicScratch, + cudaStream_t const stream, void* scratch, size_t scratchBytes, bool is_prefill) { - static_assert(std::is_same_v || std::is_same_v, - "invokeIndexerTopKDecodeDtype is for bf16/fp16 only"); - - constexpr int kSortingAlgorithmThreshold = 12288; - constexpr int kDefaultSplitWorkThreshold = 200 * 1000; - constexpr int kNumThreadsPerBlock = 512; - int const effectiveSplitWorkThreshold = splitWorkThreshold > 0 ? splitWorkThreshold : kDefaultSplitWorkThreshold; - - // bf16/fp16: bytes_per_element = sizeof(InputT) = 2 → kBsL2 doubles vs fp32. - auto const bounds = getSchemeXBounds(numColumns, /*bytesPerElem=*/static_cast(sizeof(InputT))); - int const kBsLarge = bounds.kBsLarge; - int const kSeqSmall = bounds.kSeqSmall; - - bool const isSupportedTopK = (topK == 512 || topK == 1024 || topK == 2048); - bool const canUseHeuristic = preIdx != nullptr && stride1 == 1 && isSupportedTopK && preIdxCount == topK - && preIdxStride >= preIdxCount && numColumns < effectiveSplitWorkThreshold && numColumns >= kSeqSmall - && heuristicScratch != nullptr && numRows < kBsLarge; - - if (canUseHeuristic) - { - launchHeuristicTopKDecode(logits, seqLens, preIdx, indices, heuristicScratch, stride0, next_n, topK, - preIdxStride, preIdxCount, numRows, stream); - } - else if (numColumns < kSortingAlgorithmThreshold) - { - // Insertion sort path — InputT propagated; histogram/sort run on float keys. - auto* kernel_instance = &topKPerRowDecode; - - cudaLaunchConfig_t config; - config.gridDim = numRows; - config.blockDim = kNumThreadsPerBlock; - config.dynamicSmemBytes = topK * sizeof(int32_t); - config.stream = stream; - cudaLaunchAttribute attrs[1]; - attrs[0].id = cudaLaunchAttributeProgrammaticStreamSerialization; - attrs[0].val.programmaticStreamSerializationAllowed = tensorrt_llm::common::getEnvEnablePDL(); - config.numAttrs = 1; - config.attrs = attrs; - - cudaLaunchKernelEx( - &config, kernel_instance, logits, seqLens, indices, stride0, stride1, topK, next_n, nullptr, 0, nullptr); - } - else if (numColumns < effectiveSplitWorkThreshold) - { - // Radix sort path — InputT propagated; histogram/sort run on float keys. - auto* kernel_instance = &topKPerRowDecode; - - cudaLaunchConfig_t config; - config.gridDim = numRows; - config.blockDim = kNumThreadsPerBlock; - config.dynamicSmemBytes = topK * sizeof(int32_t); - config.stream = stream; - cudaLaunchAttribute attrs[1]; - attrs[0].id = cudaLaunchAttributeProgrammaticStreamSerialization; - attrs[0].val.programmaticStreamSerializationAllowed = tensorrt_llm::common::getEnvEnablePDL(); - config.numAttrs = 1; - config.attrs = attrs; - - cudaLaunchKernelEx( - &config, kernel_instance, logits, seqLens, indices, stride0, stride1, topK, next_n, nullptr, 0, nullptr); - } - else - { - TLLM_CHECK_WITH_INFO(false, - "indexer_topk_decode bf16/fp16 path does not support numColumns >= splitWorkThreshold " - "(split-work path requires float aux buffers not exposed in the bf16/fp16 entry). " - "Got numColumns=%d splitWorkThreshold=%d. Use the fp32 entry for this regime.", - numColumns, effectiveSplitWorkThreshold); - } - - sync_check_cuda_error(stream); + invokeIndexerTopKDecodeImpl(logits, seqLens, indices, splitWorkThreshold, numRows, numColumns, stride0, + stride1, next_n, topK, preIdx, preIdxStride, preIdxCount, heuristicScratch, stream, scratch, scratchBytes, + is_prefill); } -} // anonymous namespace +size_t indexerTopKDecodeScratchBytes(int numRows, int numColumns, int /*topK*/) +{ + return radixScratchBytes(numRows, numColumns); +} void invokeIndexerTopKDecode(__nv_bfloat16 const* logits, int const* seqLens, int* indices, int const splitWorkThreshold, int const numRows, int const numColumns, int const stride0, int const stride1, int const next_n, int const topK, int const* preIdx, int const preIdxStride, int const preIdxCount, - __nv_bfloat16* heuristicScratch, cudaStream_t const stream) + __nv_bfloat16* heuristicScratch, cudaStream_t const stream, void* scratch, size_t scratchBytes, bool is_prefill) { - invokeIndexerTopKDecodeDtype<__nv_bfloat16>(logits, seqLens, indices, splitWorkThreshold, numRows, numColumns, - stride0, stride1, next_n, topK, preIdx, preIdxStride, preIdxCount, heuristicScratch, stream); + invokeIndexerTopKDecodeImpl<__nv_bfloat16>(logits, seqLens, indices, splitWorkThreshold, numRows, numColumns, + stride0, stride1, next_n, topK, preIdx, preIdxStride, preIdxCount, heuristicScratch, stream, scratch, + scratchBytes, is_prefill); } void invokeIndexerTopKDecode(__half const* logits, int const* seqLens, int* indices, int const splitWorkThreshold, int const numRows, int const numColumns, int const stride0, int const stride1, int const next_n, int const topK, int const* preIdx, int const preIdxStride, int const preIdxCount, __half* heuristicScratch, - cudaStream_t const stream) + cudaStream_t const stream, void* scratch, size_t scratchBytes, bool is_prefill) { - invokeIndexerTopKDecodeDtype<__half>(logits, seqLens, indices, splitWorkThreshold, numRows, numColumns, stride0, - stride1, next_n, topK, preIdx, preIdxStride, preIdxCount, heuristicScratch, stream); + invokeIndexerTopKDecodeImpl<__half>(logits, seqLens, indices, splitWorkThreshold, numRows, numColumns, stride0, + stride1, next_n, topK, preIdx, preIdxStride, preIdxCount, heuristicScratch, stream, scratch, scratchBytes, + is_prefill); } void invokeIndexerTopKPrefill(float const* logits, int const* rowStarts, int const* rowEnds, int* indices, int const numRows, int const numColumns, int const stride0, int const stride1, int const topK, cudaStream_t const stream) { - constexpr int kSortingAlgorithmThreshold = 12288; constexpr int kNumThreadsPerBlock = 512; - int numInsertionBlocks = std::min(numRows, kSortingAlgorithmThreshold); - topKPerRowPrefill - <<>>( - logits, rowStarts, rowEnds, indices, stride0, stride1, topK, 0); - - if (numRows > kSortingAlgorithmThreshold) - { - int numRadixBlocks = numRows - kSortingAlgorithmThreshold; - topKPerRowPrefill - <<>>( - logits, rowStarts, rowEnds, indices, stride0, stride1, topK, kSortingAlgorithmThreshold); - } + // One launch over all rows; the per-row sort algorithm is picked at + // runtime inside topKPerRowJob. + topKPerRowPrefill<<>>( + logits, rowStarts, rowEnds, indices, stride0, stride1, topK, 0); sync_check_cuda_error(stream); } @@ -1068,6 +1293,7 @@ bool canIndexerTopKDecodeUseGvr(int numRows, int numColumns, int topK, int bytes { return false; } + // Mirrors the dispatcher's effectiveSplitWorkThreshold default. constexpr int kDefaultSplitWorkThreshold = 200 * 1000; auto const bounds = getSchemeXBounds(numColumns, bytesPerElem); return numColumns >= bounds.kSeqSmall && numColumns < kDefaultSplitWorkThreshold && numRows < bounds.kBsLarge; diff --git a/cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/fmhaKernels.h b/cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/fmhaKernels.h index b88989746c85..7e5e41769198 100644 --- a/cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/fmhaKernels.h +++ b/cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/fmhaKernels.h @@ -18,9 +18,11 @@ #include "cuda_runtime_api.h" #include "tensorrt_llm/common/config.h" +#include #include #include #include +#include #include #include #include @@ -29,6 +31,7 @@ #include #include #include +#include #include "tensorrt_llm/common/cudaDriverWrapper.h" #include "tensorrt_llm/common/cudaUtils.h" @@ -40,6 +43,7 @@ #include "fmhaReduction.h" #include "fmhaRunnerParams.h" #include "prepareCustomMask.h" +#include // Switch to streaming-style TLLM_LOG_* macros for trtllm-gen export headers, // which use streaming syntax (e.g., TLLM_LOG_INFO("val=", x)) instead of @@ -296,6 +300,137 @@ class TllmGenFmhaKernel } } +private: + inline static std::vector const kDefaultWarmupBatchSizeCandidates + = {1, 2, 3, 4, 5, 6, 7, 8, 10, 12, 14, 16, 20, 24, 28, 32, 40, 48, 56, 64, 80, 96, 128, 256, 512, 1024}; + inline static std::vector const kDefaultWarmupPrefillBatchSizeCandidates + = {1, 2, 3, 4, 6, 8, 12, 16, 24, 32, 48, 64, 128, 256}; + inline static std::vector const kDefaultWarmupSeqLenQkvCandidates + = {1, 128, 512, 1024, 2048, 4096, 8192, 16384, 32768}; + + static std::vector makeWarmupCandidateSizes(std::vector const& defaultCandidateSizes, int maxSize) + { + std::vector candidateSizes; + for (int size : defaultCandidateSizes) + { + if (size >= maxSize) + { + break; + } + candidateSizes.push_back(size); + } + candidateSizes.push_back(maxSize); + return candidateSizes; + } + + void warmupOneKernel(RunnerParams const& params) + { + if (params.mMaxSeqLenQ == 0 || params.mBatchSize == 0 + || (!isContextKernel(params.mKernelType) && params.mMaxSeqLenKv == 0)) + { + return; + } + + int32_t ctaDim = 512; + FmhaOptions options; + FmhaOptionsFromArgs optionsFromArgs; + parseOptionsFromRunnerParams(params, options); + options.mCudaArch = intToCudaArch(mSM); + + FmhaAutoTuner autoTuner(options, optionsFromArgs, params.mMultiProcessorCount); + std::tie(options, optionsFromArgs, ctaDim) = autoTuner.selectKernel(); + + checkFmhaOptions(options, optionsFromArgs); + updateFmhaOptions(options, optionsFromArgs); + + auto [numCtasX, numCtasY, numCtasZ] = computeNumCtas(options, params.mMultiProcessorCount); + tg::CudaRunner::Grid grid{numCtasX, numCtasY, numCtasZ}; + + if (shouldUseNvrtc(options)) + { + FmhaConfig fmhaConfig; + fmhaConfig.mOptions = options; + std::ostringstream sstream; + populateJsonConfig(options, sstream); + fmhaConfig.mGenCfgJsonStr = sstream.str(); + + fmhaConfig.mExecPath = getExecPath().c_str(); + fmhaConfig.mCtaDim = ctaDim; + fmhaConfig.mGrid = grid; + auto const compileStart = std::chrono::steady_clock::now(); + mFmhaInterface.generateAndCompileKernel(fmhaConfig); + auto const compileElapsed = std::chrono::steady_clock::now() - compileStart; + auto const compileElapsedMs = std::chrono::duration(compileElapsed).count(); + if (compileElapsedMs > 1000.0) // FIXME: Change to return cache status from FmhaInterface + { + auto const& kernelName = fmhaConfig.mFunctionName; + TLLM_LOG_INFO("JIT Warmup: Warmup for %s took %.3f ms", kernelName.c_str(), compileElapsedMs); + } + } + } + + void runJITWarmupGridIfRequested(RunnerParams const& runnerParams) + { + if (!runnerParams.mJITWarmup || runnerParams.mKernelType != FmhaKernelType::Generation) + { + return; + } + + cudaStreamCaptureStatus captureStatus = cudaStreamCaptureStatusNone; + TLLM_CUDA_CHECK(cudaStreamIsCapturing(runnerParams.stream, &captureStatus)); + TLLM_CHECK_WITH_INFO(captureStatus == cudaStreamCaptureStatusNone, + "TRTLLM-Gen FMHA JIT warmup must not run during CUDA graph capture."); + + bool const useGenKernelForPrefill = runnerParams.mUseGenKernelForPrefill; + int const maxBatchSize = runnerParams.mJITWarmupMaxNumRequests; + int const maxSeqLenQ = runnerParams.mJITWarmupMaxSeqLenQ; + int const maxSeqLenKv = runnerParams.mJITWarmupMaxSeqLenKv; + + TLLM_LOG_DEBUG( + "TRTLLM-Gen Fmha Warmup Params: maxBatchSize=%d, maxSeqLenKv=%d, useGenKernelForPrefill=%d, maxSeqLenQ=%d", + maxBatchSize, maxSeqLenKv, useGenKernelForPrefill, maxSeqLenQ); + TLLM_CHECK_WITH_INFO(maxBatchSize > 0 && maxSeqLenKv > 0 && (!useGenKernelForPrefill || maxSeqLenQ > 0), + "TRTLLM-Gen Fmha Warmup Param is invalid."); + + auto const& batchSizeDefaults + = useGenKernelForPrefill ? kDefaultWarmupPrefillBatchSizeCandidates : kDefaultWarmupBatchSizeCandidates; + std::vector batchSizeCandidates = makeWarmupCandidateSizes(batchSizeDefaults, maxBatchSize); + // Use specified Q for generation, and use our Q grid for prefill + std::vector seqLenQCandidates = useGenKernelForPrefill + ? makeWarmupCandidateSizes(kDefaultWarmupSeqLenQkvCandidates, maxSeqLenQ) + : std::vector{runnerParams.mMaxSeqLenQ}; + std::vector seqLenKvCandidates = makeWarmupCandidateSizes(kDefaultWarmupSeqLenQkvCandidates, maxSeqLenKv); + + auto warmupParams = runnerParams; + + for (int batchSize : batchSizeCandidates) + { + warmupParams.mBatchSize = batchSize; + for (int seqLenQ : seqLenQCandidates) + { + warmupParams.mMaxSeqLenQ = seqLenQ; + for (int seqLenKv : seqLenKvCandidates) + { + warmupParams.mMaxSeqLenKv = seqLenKv; + int64_t const sumOfSeqLensQ + = static_cast(warmupParams.mBatchSize) * warmupParams.mMaxSeqLenQ; + int64_t const sumOfSeqLensKv + = static_cast(warmupParams.mBatchSize) * warmupParams.mMaxSeqLenKv; + warmupParams.mSumOfSeqLensQ + = static_cast(std::min(sumOfSeqLensQ, std::numeric_limits::max())); + warmupParams.mSumOfSeqLensKv + = static_cast(std::min(sumOfSeqLensKv, std::numeric_limits::max())); + if (useGenKernelForPrefill && warmupParams.mMaxSeqLenKv < warmupParams.mMaxSeqLenQ) + { + continue; + } + warmupOneKernel(warmupParams); + } + } + } + } + +public: void run(RunnerParams const& params) { if (params.mMaxSeqLenQ == 0 || params.mBatchSize == 0 @@ -303,6 +438,7 @@ class TllmGenFmhaKernel { return; } + runJITWarmupGridIfRequested(params); int32_t ctaDim = 512; FmhaOptions options; @@ -313,6 +449,13 @@ class TllmGenFmhaKernel FmhaAutoTuner autoTuner(options, optionsFromArgs, params.mMultiProcessorCount); std::tie(options, optionsFromArgs, ctaDim) = autoTuner.selectKernel(); + // Overwrite AutoTuner decision: SageAttention with SfsPV is known to cause regression to persistent scheduler. + // Remove this overwritten once we refresh the cubin kernels that containing the related fix. + if (mNumEltsPerSageAttnBlkP + mNumEltsPerSageAttnBlkV > 0) + { + options.mTileScheduler = TileScheduler::Static; + } + // Check if the options are valid or not. checkFmhaOptions(options, optionsFromArgs); // Update the options if needed. @@ -360,7 +503,18 @@ class TllmGenFmhaKernel fmhaConfig.mExecPath = getExecPath().c_str(); fmhaConfig.mCtaDim = ctaDim; fmhaConfig.mGrid = grid; + auto const compileStart = std::chrono::steady_clock::now(); mFmhaInterface.generateAndCompileKernel(fmhaConfig); + auto const compileElapsed = std::chrono::steady_clock::now() - compileStart; + auto const compileElapsedMs = std::chrono::duration(compileElapsed).count(); + if (compileElapsedMs > 1000.0) // FIXME: Change to return cache status from FmhaInterface + { + auto const& kernelName = fmhaConfig.mFunctionName; + TLLM_LOG_WARNING( + "Possible JIT Cache Missing: TRTLLM-Gen FMHA generateAndCompileKernel took %.3f ms, kernelName=%s, " + "batchSize=%d, maxSeqLenQ=%d, maxSeqLenKv=%d. This could affect performance measurement.", + compileElapsedMs, kernelName.c_str(), params.mBatchSize, params.mMaxSeqLenQ, params.mMaxSeqLenKv); + } mFmhaInterface.run(fmhaConfig, fmhaData, params.stream, params.mMultiProcessorCount, 0); } else diff --git a/cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/fmhaRunnerParams.h b/cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/fmhaRunnerParams.h index ef29d85e63d5..19486cd6cf50 100644 --- a/cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/fmhaRunnerParams.h +++ b/cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/fmhaRunnerParams.h @@ -298,6 +298,13 @@ struct TllmGenFmhaRunnerParams int mMaxSeqLenQ; // The max kv sequence length. int mMaxSeqLenKv; + // Optional JIT warmup shape. + bool mJITWarmup = false; + int mJITWarmupMaxNumRequests = 0; + int mJITWarmupMaxSeqLenQ = 0; + int mJITWarmupMaxSeqLenKv = 0; + // True when a prefill/context path intentionally uses a generation kernel. + bool mUseGenKernelForPrefill = false; // The attention window size for sliding window attention (sliding-window-attention is enabled when seqLenKv > // mAttentionWindowSize). int mAttentionWindowSize; diff --git a/cpp/tensorrt_llm/kernels/ulyssesPermuteScatterKernel.cu b/cpp/tensorrt_llm/kernels/ulyssesPermuteScatterKernel.cu new file mode 100644 index 000000000000..aba929755690 --- /dev/null +++ b/cpp/tensorrt_llm/kernels/ulyssesPermuteScatterKernel.cu @@ -0,0 +1,107 @@ +/* + * Copyright (c) 2025-2026, NVIDIA CORPORATION. All rights reserved. + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#include "tensorrt_llm/kernels/ulyssesPermuteScatterKernel.h" + +#include +#include +#include + +TRTLLM_NAMESPACE_BEGIN + +namespace kernels +{ + +namespace +{ + +// Vector type: int4 = 16 bytes = 8 bf16. Issues LDG.E.128 / STG.E.128. +constexpr int VEC = 8; +constexpr int BLOCK_S = 32; // rows per CTA +constexpr int THREADS_PER_BLOCK = 128; // 4 warps + +// 1 CTA handles BLOCK_S rows × 1 head × full D. +// For fixed h (per CTA), peer = h // H_local is constant — no warp divergence. +// All writes within one CTA go to the same destination slot, contiguous in +// dst space. Matches the access pattern of PyTorch inductor's permute kernel +// epilogue stores. +__global__ void __launch_bounds__(THREADS_PER_BLOCK) + ulyssesPermuteScatterKernel(__nv_bfloat16 const* __restrict__ input, // [B, S_local, H, D] + __nv_bfloat16* __restrict__ send_buf, // [P, B, S_local, H/P, D] + __nv_bfloat16* __restrict__ recv_buf, // [P, B, S_local, H/P, D] + int const my_rank, + int const n_rows, // B * S_local + int const H, int const D, + int const H_local) // H / P +{ + int const bs_block = blockIdx.x; + int const h = blockIdx.y; + + // Scalar branch — same destination slot for all threads in this CTA. + int const peer = h / H_local; + int const h_local = h - peer * H_local; + int const slot_idx = (peer == my_rank) ? my_rank : peer; + __nv_bfloat16* __restrict__ dst_base = (peer == my_rank) ? recv_buf : send_buf; + + int const n_d_chunks = D / VEC; + int const total_tasks = BLOCK_S * n_d_chunks; + int const t = threadIdx.x; + + int const row_base = bs_block * BLOCK_S; + + int4 const* __restrict__ in_v = reinterpret_cast(input); + int4* __restrict__ dst_v = reinterpret_cast(dst_base); + + int const row_in_stride_v = (H * D) / VEC; // = H * n_d_chunks + int const head_in_off_v = h * n_d_chunks; + int const slot_off_v = slot_idx * n_rows * H_local * n_d_chunks; + int const row_dst_stride_v = H_local * n_d_chunks; + int const head_dst_off_v = h_local * n_d_chunks; + +#pragma unroll 1 + for (int idx = t; idx < total_tasks; idx += blockDim.x) + { + int const s_in_block = idx / n_d_chunks; + int const d_chunk = idx - s_in_block * n_d_chunks; + int const row = row_base + s_in_block; + if (row >= n_rows) + continue; + + int const src_idx = row * row_in_stride_v + head_in_off_v + d_chunk; + int const dst_idx = slot_off_v + row * row_dst_stride_v + head_dst_off_v + d_chunk; + + dst_v[dst_idx] = in_v[src_idx]; + } +} + +} // anonymous namespace + +void launchUlyssesPermuteScatter(void const* input, void* send_buf, void* recv_buf, int my_rank, int B, int S_local, + int H, int D, int P, cudaStream_t stream) +{ + int const n_rows = B * S_local; + int const H_local = H / P; + dim3 const grid((n_rows + BLOCK_S - 1) / BLOCK_S, H); + dim3 const block(THREADS_PER_BLOCK); + + ulyssesPermuteScatterKernel<<>>(reinterpret_cast<__nv_bfloat16 const*>(input), + reinterpret_cast<__nv_bfloat16*>(send_buf), reinterpret_cast<__nv_bfloat16*>(recv_buf), my_rank, n_rows, H, D, + H_local); +} + +} // namespace kernels + +TRTLLM_NAMESPACE_END diff --git a/cpp/tensorrt_llm/kernels/ulyssesPermuteScatterKernel.h b/cpp/tensorrt_llm/kernels/ulyssesPermuteScatterKernel.h new file mode 100644 index 000000000000..1b2738ac29b3 --- /dev/null +++ b/cpp/tensorrt_llm/kernels/ulyssesPermuteScatterKernel.h @@ -0,0 +1,52 @@ +/* + * Copyright (c) 2025-2026, NVIDIA CORPORATION. All rights reserved. + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ +#pragma once + +#include + +#include "tensorrt_llm/common/config.h" + +TRTLLM_NAMESPACE_BEGIN + +namespace kernels +{ + +// Fused permute + scatter for Ulysses A2A (peer-WRITE variant). +// +// Replaces the .permute(2,0,1,3,4).contiguous() materialization that would +// otherwise happen pre-A2A. Reads `input [B, S_local, H, D]` once and +// scatters each (b,s,h,d) element to one of two destinations: +// - peer != my_rank → send_buf[peer, b, s, h-peer*H_local, d] (local) +// - peer == my_rank → recv_buf[my_rank, b, s, h-my_rank*H_local, d] (symm-mem) +// +// After this kernel runs, the caller fires (P-1) cudaMemcpyBatchAsync +// entries to push send_buf[p] → peer[p].recv_buf[my_rank], then an LSA +// barrier (both folded into ulysses_a2a_async). +// +// Layout (all contiguous bf16): +// input : [B, S_local, H, D] row-major +// send_buf : [P, B, S_local, H/P, D] row-major +// recv_buf : [P, B, S_local, H/P, D] row-major +// +// Requires: D % 8 == 0 (int4 vec load); H % P == 0; bf16 only. +void launchUlyssesPermuteScatter(void const* input, // bf16 [B, S_local, H, D] + void* send_buf, // bf16 [P, B, S_local, H/P, D] + void* recv_buf, // bf16 [P, B, S_local, H/P, D] + int my_rank, int B, int S_local, int H, int D, int P, cudaStream_t stream); + +} // namespace kernels + +TRTLLM_NAMESPACE_END diff --git a/cpp/tensorrt_llm/kernels/ulyssesPostUnscatterKernel.cu b/cpp/tensorrt_llm/kernels/ulyssesPostUnscatterKernel.cu new file mode 100644 index 000000000000..c5f61ff3431d --- /dev/null +++ b/cpp/tensorrt_llm/kernels/ulyssesPostUnscatterKernel.cu @@ -0,0 +1,111 @@ +/* + * Copyright (c) 2026, NVIDIA CORPORATION. All rights reserved. + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#include "tensorrt_llm/common/cudaUtils.h" +#include "ulyssesPostUnscatterKernel.h" +#include +#include + +TRTLLM_NAMESPACE_BEGIN + +namespace kernels +{ + +namespace +{ + +// Each block handles one (p, b, sp) tile across all H heads. +// Reads H*D bf16 contiguous from input; writes the same bytes scattered across +// H rows of the output in NHD layout [B, P*Sp, H, D]. The caller (op wrapper) +// returns this storage as a transpose-view when an HND-shape output is needed, +// so the resulting tensor is HND-shape with NHD-stride (matching what the +// sync `_forward_unfused` path produces via `q.transpose(1, 2)`). +// +// threads/block = H * (D / 8); each thread copies one uint4 (8 bf16). +template +__global__ void ulyssesPostUnscatterKernel(T const* __restrict__ q_in, T const* __restrict__ k_in, + T const* __restrict__ v_in, T* __restrict__ q_out, T* __restrict__ k_out, T* __restrict__ v_out, int const P, + int const B, int const Sp, int const H, int const D, int const vec_per_row) +{ + constexpr int VEC = 8; + + int const h = threadIdx.x / vec_per_row; + int const vec_idx = threadIdx.x - h * vec_per_row; + + int const psp = blockIdx.x; // 0 .. P*Sp-1 + int const p = psp / Sp; + int const sp = psp - p * Sp; + int const b = blockIdx.y; + int const PSp = P * Sp; + + T const* in_ptr; + T* out_ptr; + switch (blockIdx.z) + { + case 0: + in_ptr = q_in; + out_ptr = q_out; + break; + case 1: + in_ptr = k_in; + out_ptr = k_out; + break; + default: + in_ptr = v_in; + out_ptr = v_out; + break; + } + + // in[p, b, sp, h, d]: ((((p*B + b)*Sp + sp)*H + h)*D + vec_idx*VEC) + // NHD out[b, p*Sp+sp, h, d]: (((b*PSp + psp)*H + h)*D + vec_idx*VEC) + // int64_t: P*B*Sp*H*D can exceed 2^31 at large workloads. + int64_t const in_base = ((((static_cast(p) * B + b) * Sp + sp) * H + h) * D) + vec_idx * VEC; + int64_t const out_base = (((static_cast(b) * PSp + psp) * H + h) * D) + vec_idx * VEC; + + uint4 const* in_v4 = reinterpret_cast(in_ptr + in_base); + uint4* out_v4 = reinterpret_cast(out_ptr + out_base); + *out_v4 = *in_v4; +} + +} // namespace + +void launchUlyssesPostUnscatter(void const* q_in, void const* k_in, void const* v_in, void* q_out, void* k_out, + void* v_out, int P, int B, int Sp, int H, int D, cudaStream_t stream) +{ + constexpr int VEC = 8; + TLLM_CHECK_WITH_INFO(D % VEC == 0, "ulyssesPostUnscatter: D must be a multiple of 8 (uint4 vec), got %d", D); + int const vec_per_row = D / VEC; + int const threads = H * vec_per_row; + TLLM_CHECK_WITH_INFO(threads <= 1024, + "ulyssesPostUnscatter: threads/block (H*D/8) must be <= 1024, got H=%d D=%d -> %d", H, D, threads); + + dim3 const grid(P * Sp, B, 3); + dim3 const block(threads); + + auto* q_in_typed = reinterpret_cast<__nv_bfloat16 const*>(q_in); + auto* k_in_typed = reinterpret_cast<__nv_bfloat16 const*>(k_in); + auto* v_in_typed = reinterpret_cast<__nv_bfloat16 const*>(v_in); + auto* q_out_typed = reinterpret_cast<__nv_bfloat16*>(q_out); + auto* k_out_typed = reinterpret_cast<__nv_bfloat16*>(k_out); + auto* v_out_typed = reinterpret_cast<__nv_bfloat16*>(v_out); + + ulyssesPostUnscatterKernel<__nv_bfloat16><<>>( + q_in_typed, k_in_typed, v_in_typed, q_out_typed, k_out_typed, v_out_typed, P, B, Sp, H, D, vec_per_row); +} + +} // namespace kernels + +TRTLLM_NAMESPACE_END diff --git a/cpp/tensorrt_llm/kernels/ulyssesPostUnscatterKernel.h b/cpp/tensorrt_llm/kernels/ulyssesPostUnscatterKernel.h new file mode 100644 index 000000000000..f5a2932dacdf --- /dev/null +++ b/cpp/tensorrt_llm/kernels/ulyssesPostUnscatterKernel.h @@ -0,0 +1,65 @@ +/* + * Copyright (c) 2022-2026, NVIDIA CORPORATION. All rights reserved. + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#ifndef TRTLLM_ULYSSESPOSTUNSCATTERKERNEL_H +#define TRTLLM_ULYSSESPOSTUNSCATTERKERNEL_H + +#include "tensorrt_llm/common/config.h" +#include + +TRTLLM_NAMESPACE_BEGIN + +namespace kernels +{ + +// Post-Ulysses A2A unscatter for Q/K/V. Pairs with ulyssesPermuteScatter: +// PermuteScatter prepares send_buf pre-A2A; PostUnscatter consumes recv_buf +// post-A2A and produces SDPA-ready tensors in NHD layout. +// +// After the head-dim → seq-dim all-to-all, each rank holds tensors of shape +// [P, B, Sp, H, D] where P = sequence-parallel world size, Sp = local seq +// len, H = heads-per-rank, D = head dim. This kernel always writes NHD-contig +// [B, P*Sp, H, D] storage. The op wrapper returns the storage as-is for NHD +// callers (TRTLLM / FA4) or as a transpose-view for HND callers (VANILLA / +// torch SDPA) — the HND-shape return is thus HND-shape with NHD-stride, +// mirroring what the sync `_forward_unfused` path produces via +// `q.transpose(1, 2)` (without `.contiguous()`). This stride pattern lets +// cudnn SDPA preserve NHD-stride through its output, so the downstream +// `_output_a2a`'s `.transpose(1, 2).contiguous()` collapses to a no-op. +// +// Equivalent eager expression this kernel replaces: +// t.permute(1, 0, 2, 3, 4).reshape(B, P*Sp, H, D).contiguous() +// +// Layout: +// - Each block reads one fully contiguous (p, b, sp, :H, :D) tile of +// H*D bf16 +// - H*(D/8) threads/block — each thread copies one uint4 (8 bf16) +// - Grid (P*Sp, B, 3): blockIdx.z selects Q / K / V +// +// Constraints: +// - dtype must be bf16 +// - D must be a multiple of 8 (uint4 vector load/store, 8 bf16 per thread) +// - threads/block = H * (D / 8) must be <= 1024 (CUDA hw limit) +void launchUlyssesPostUnscatter(void const* q_in, // [P, B, Sp, H, D] + void const* k_in, void const* v_in, + void* q_out, // [B, P*Sp, H, D] NHD-contig + void* k_out, void* v_out, int P, int B, int Sp, int H, int D, cudaStream_t stream); + +} // namespace kernels + +TRTLLM_NAMESPACE_END + +#endif // TRTLLM_ULYSSESPOSTUNSCATTERKERNEL_H diff --git a/cpp/tensorrt_llm/kernels/weightOnlyBatchedGemv/cudaCoreGemmNVFP4.cu b/cpp/tensorrt_llm/kernels/weightOnlyBatchedGemv/cudaCoreGemmNVFP4.cu index 1d208a293b6c..8df4bf96b616 100644 --- a/cpp/tensorrt_llm/kernels/weightOnlyBatchedGemv/cudaCoreGemmNVFP4.cu +++ b/cpp/tensorrt_llm/kernels/weightOnlyBatchedGemv/cudaCoreGemmNVFP4.cu @@ -30,7 +30,7 @@ template __device__ void cudaCoreGemmImpl(InputType const* __restrict__ act, InputType const* __restrict__ weight, ScaleType const* __restrict__ scale_a, ScaleType const* __restrict__ scale_w, float const alpha, - OutputType* __restrict__ output, SizeType32 m, SizeType32 n, SizeType32 k) + OutputType* __restrict__ output, OutputType const* __restrict__ bias, SizeType32 m, SizeType32 n, SizeType32 k) { using VecType = int4; @@ -63,6 +63,7 @@ __device__ void cudaCoreGemmImpl(InputType const* __restrict__ act, InputType co act += tile_id_m * k / 2; weight += tile_id_n * k / 2; output += tile_id_m * n + tile_id_n; + OutputType const* __restrict__ bias_tile = (bias != nullptr) ? bias + tile_id_n : nullptr; scale_a += tile_id_m * k / nvfp4_scale_granularity; @@ -154,6 +155,10 @@ __device__ void cudaCoreGemmImpl(InputType const* __restrict__ act, InputType co { val += shmem[jj * TILE_M * TILE_N + ii]; } + if (bias_tile != nullptr) + { + val += static_cast(bias_tile[nid]); + } output[mid * n + nid] = static_cast(val); } @@ -166,13 +171,13 @@ template __global__ void cudaCoreGemmFp4(InputType const* __restrict__ act, InputType const* __restrict__ weight, ScaleType const* __restrict__ scale_a, ScaleType const* __restrict__ scale_w, float const* alpha_ptr, - OutputType* __restrict__ output, SizeType32 m, SizeType32 n, SizeType32 k) + OutputType* __restrict__ output, OutputType const* __restrict__ bias, SizeType32 m, SizeType32 n, SizeType32 k) { float alpha = alpha_ptr[0]; cudaCoreGemmImpl( reinterpret_cast(act), reinterpret_cast(weight), reinterpret_cast(scale_a), reinterpret_cast(scale_w), alpha, - reinterpret_cast(output), m, n, k); + reinterpret_cast(output), reinterpret_cast(bias), m, n, k); } template , reinterpret_cast(params.act), reinterpret_cast(params.weight), reinterpret_cast(params.scale_a), reinterpret_cast(params.scale_b), - params.alpha_ptr, reinterpret_cast(params.output), params.m, params.n, params.k)); + params.alpha_ptr, reinterpret_cast(params.output), + reinterpret_cast(params.bias), params.m, params.n, params.k)); } } else @@ -213,7 +219,8 @@ void cudaCoreGemmKernel(Params const& params, cudaStream_t stream) cudaCoreGemmFp4<<>>( reinterpret_cast(params.act), reinterpret_cast(params.weight), reinterpret_cast(params.scale_a), reinterpret_cast(params.scale_b), - params.alpha_ptr, reinterpret_cast(params.output), params.m, params.n, params.k); + params.alpha_ptr, reinterpret_cast(params.output), + reinterpret_cast(params.bias), params.m, params.n, params.k); } } } diff --git a/cpp/tensorrt_llm/kernels/weightOnlyBatchedGemv/cudaCoreGemmNVFP4.h b/cpp/tensorrt_llm/kernels/weightOnlyBatchedGemv/cudaCoreGemmNVFP4.h index d47d37c06aef..616f9d25c2bf 100644 --- a/cpp/tensorrt_llm/kernels/weightOnlyBatchedGemv/cudaCoreGemmNVFP4.h +++ b/cpp/tensorrt_llm/kernels/weightOnlyBatchedGemv/cudaCoreGemmNVFP4.h @@ -56,11 +56,13 @@ struct Params __nv_fp8_e4m3 const* scale_a; __nv_fp8_e4m3 const* scale_b; float const* alpha_ptr; + // Optional per-N bias broadcast: shape [n], same dtype as output. May be nullptr. + void const* bias; // used by torch flow Params(void const* _act, void const* _weight, void* _output, SizeType32 _m, SizeType32 _n, SizeType32 _k, __nv_fp8_e4m3 const* _scale_a, __nv_fp8_e4m3 const* _scale_b, cudaDataType_t _inputType, - cudaDataType_t _outputType, float const* _alpha_ptr) + cudaDataType_t _outputType, float const* _alpha_ptr, void const* _bias = nullptr) : act(_act) , weight(_weight) , output(_output) @@ -72,6 +74,7 @@ struct Params , scale_a(_scale_a) , scale_b(_scale_b) , alpha_ptr(_alpha_ptr) + , bias(_bias) { } }; diff --git a/cpp/tensorrt_llm/kernels/xqaDispatcher.cpp b/cpp/tensorrt_llm/kernels/xqaDispatcher.cpp index 809d5e5afb21..37f248687e91 100644 --- a/cpp/tensorrt_llm/kernels/xqaDispatcher.cpp +++ b/cpp/tensorrt_llm/kernels/xqaDispatcher.cpp @@ -1,5 +1,5 @@ /* - * Copyright (c) 2020-2024, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2020-2026, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. @@ -494,14 +494,11 @@ void XqaDispatcher::runImpl( // It is used to construct contiguous kv cache TMA descriptors. tllmRunnerParams.mMaxSeqLenCacheKv = params.max_attention_window_size; tllmRunnerParams.mMaxSeqLenQ = params.generation_input_length; - // Pin mMaxSeqLenKv to a static per-layer value so warmup and runtime pick the same - // FMHA kernel (no JIT miss). For PagedKv we use the per-layer attention window: - // strides do not depend on mMaxSeqLenKv, and extra KV CTAs exit early via - // seqLensKvPtr. ContiguousKv keeps its true past-kv length because its strides - // depend on it. - tllmRunnerParams.mMaxSeqLenKv = (tllmRunnerParams.mQkvLayout == QkvLayout::PagedKv) - ? params.max_attention_window_size - : params.max_past_kv_length; + tllmRunnerParams.mMaxSeqLenKv = params.max_past_kv_length; + tllmRunnerParams.mJITWarmup = params.trtllm_gen_jit_warmup; + tllmRunnerParams.mJITWarmupMaxNumRequests = params.trtllm_gen_jit_warmup_max_num_requests; + tllmRunnerParams.mJITWarmupMaxSeqLenQ = params.trtllm_gen_jit_warmup_max_seq_len_q; + tllmRunnerParams.mJITWarmupMaxSeqLenKv = params.trtllm_gen_jit_warmup_max_seq_len_kv; tllmRunnerParams.mSumOfSeqLensQ = int(params.batch_size * beam_width * tllmRunnerParams.mMaxSeqLenQ); // The sliding window attention size. tllmRunnerParams.mAttentionWindowSize = params.cyclic_attention_window_size; @@ -517,12 +514,8 @@ void XqaDispatcher::runImpl( tllmRunnerParams.stream = params.stream; tllmRunnerParams.mSfStartTokenIdx = params.start_token_idx_sf; tllmRunnerParams.mIsSpecDecTree = params.is_spec_dec_tree && params.multi_query_tokens; - // Declare SWA layers as SlidingOrChunkedCausal directly so warmup and runtime - // pick the same kernel bucket (no JIT miss) - tllmRunnerParams.mMaskType = tllmRunnerParams.mIsSpecDecTree - ? TrtllmGenAttentionMaskType::Custom - : (params.is_sliding_window ? TrtllmGenAttentionMaskType::SlidingOrChunkedCausal - : TrtllmGenAttentionMaskType::Causal); + tllmRunnerParams.mMaskType + = tllmRunnerParams.mIsSpecDecTree ? TrtllmGenAttentionMaskType::Custom : TrtllmGenAttentionMaskType::Causal; tllmRunnerParams.mLayerIdx = params.layer_idx; tllmRunnerParams.seqLensQPtr = params.spec_decoding_generation_lengths; tllmRunnerParams.generalPackedCustoMaskPtr = params.spec_decoding_packed_mask; diff --git a/cpp/tensorrt_llm/nanobind/batch_manager/kvCacheManager.cpp b/cpp/tensorrt_llm/nanobind/batch_manager/kvCacheManager.cpp index 63c07b4f2de2..12b29d4981e2 100644 --- a/cpp/tensorrt_llm/nanobind/batch_manager/kvCacheManager.cpp +++ b/cpp/tensorrt_llm/nanobind/batch_manager/kvCacheManager.cpp @@ -629,7 +629,9 @@ void tb::kv_cache_manager::KVCacheManagerBindings::initBindings(nb::module_& m) .def("unpin_blocks_by_id", &BaseKVCacheManager::unpinBlocksById, nb::call_guard()) .def("reset_reuse_state", &BaseKVCacheManager::resetReuseState, nb::call_guard()) .def("get_priority_by_block_id", &BaseKVCacheManager::getPriorityByBlockId, nb::arg("block_id"), - nb::arg("window_size"), nb::call_guard()); + nb::arg("window_size"), nb::call_guard()) + .def("commit_and_get_block_hashes_for_request", &BaseKVCacheManager::commitAndGetBlockHashesForRequest, + nb::arg("llm_request"), nb::arg("window_size"), nb::call_guard()); nb::bind_vector(m, "CacheBlockIds") .def("__getstate__", [](CacheBlockIds const& v) { return nb::make_tuple(v); }) diff --git a/cpp/tensorrt_llm/nanobind/thop/bindings.cpp b/cpp/tensorrt_llm/nanobind/thop/bindings.cpp index c88edfd432a1..08e1578bcfc1 100644 --- a/cpp/tensorrt_llm/nanobind/thop/bindings.cpp +++ b/cpp/tensorrt_llm/nanobind/thop/bindings.cpp @@ -34,11 +34,12 @@ namespace tensorrt_llm::nanobind::thop namespace { -nb::object optionalTensorToObject(std::optional const& tensor) +template +nb::object optionalToObject(std::optional const& value) { - if (tensor.has_value()) + if (value.has_value()) { - return nb::cast(*tensor); + return nb::cast(*value); } return nb::none(); } @@ -72,9 +73,9 @@ nb::tuple trtllmGenContextPreprocessBinding(torch::Tensor qkv_input, torch::Tens total_num_blocks, kv_factor, need_build_kv_cache_metadata); }(); - return nb::make_tuple(std::get<0>(result), optionalTensorToObject(std::get<1>(result)), - optionalTensorToObject(std::get<2>(result)), optionalTensorToObject(std::get<3>(result)), - optionalTensorToObject(std::get<4>(result)), optionalTensorToObject(std::get<5>(result)), std::get<6>(result), + return nb::make_tuple(std::get<0>(result), optionalToObject(std::get<1>(result)), + optionalToObject(std::get<2>(result)), optionalToObject(std::get<3>(result)), + optionalToObject(std::get<4>(result)), optionalToObject(std::get<5>(result)), std::get<6>(result), std::get<7>(result), std::get<8>(result), std::get<9>(result), std::get<10>(result), std::get<11>(result)); } @@ -108,9 +109,9 @@ nb::tuple trtllmGenGenerationPreprocessBinding(torch::Tensor qkv_input, torch::T need_build_kv_cache_metadata); }(); - return nb::make_tuple(std::get<0>(result), optionalTensorToObject(std::get<1>(result)), - optionalTensorToObject(std::get<2>(result)), optionalTensorToObject(std::get<3>(result)), std::get<4>(result), - std::get<5>(result), std::get<6>(result), optionalTensorToObject(std::get<7>(result)), std::get<8>(result), + return nb::make_tuple(std::get<0>(result), optionalToObject(std::get<1>(result)), + optionalToObject(std::get<2>(result)), optionalToObject(std::get<3>(result)), std::get<4>(result), + std::get<5>(result), std::get<6>(result), optionalToObject(std::get<7>(result)), std::get<8>(result), std::get<9>(result), std::get<10>(result), std::get<11>(result)); } @@ -145,11 +146,11 @@ void initBindings(nb::module_& m) nb::arg("is_fused_qkv"), nb::arg("update_kv_cache"), nb::arg("predicted_tokens_per_seq"), nb::arg("local_layer_idx"), nb::arg("num_heads"), nb::arg("num_kv_heads"), nb::arg("head_size"), nb::arg("tokens_per_block").none(), nb::arg("max_num_requests"), nb::arg("max_context_length"), - nb::arg("attention_window_size"), nb::arg("beam_width"), nb::arg("mask_type"), nb::arg("quant_mode"), - nb::arg("q_scaling"), nb::arg("position_embedding_type"), nb::arg("rope_dim"), nb::arg("rope_base"), - nb::arg("rope_scale_type"), nb::arg("rope_scale"), nb::arg("rope_short_m_scale"), nb::arg("rope_long_m_scale"), - nb::arg("rope_max_positions"), nb::arg("rope_original_max_positions"), nb::arg("use_paged_context_fmha"), - nb::arg("attention_input_type").none(), nb::arg("is_mla_enable"), + nb::arg("max_seq_len"), nb::arg("attention_window_size"), nb::arg("beam_width"), nb::arg("mask_type"), + nb::arg("quant_mode"), nb::arg("q_scaling"), nb::arg("position_embedding_type"), nb::arg("rope_dim"), + nb::arg("rope_base"), nb::arg("rope_scale_type"), nb::arg("rope_scale"), nb::arg("rope_short_m_scale"), + nb::arg("rope_long_m_scale"), nb::arg("rope_max_positions"), nb::arg("rope_original_max_positions"), + nb::arg("use_paged_context_fmha"), nb::arg("attention_input_type").none(), nb::arg("is_mla_enable"), nb::arg("chunked_prefill_buffer_batch_size").none(), nb::arg("q_lora_rank").none(), nb::arg("kv_lora_rank").none(), nb::arg("qk_nope_head_dim").none(), nb::arg("qk_rope_head_dim").none(), nb::arg("v_head_dim").none(), nb::arg("rope_append").none(), nb::arg("mrope_rotary_cos_sin").none(), @@ -172,8 +173,8 @@ void initBindings(nb::module_& m) nb::arg("flash_mla_num_splits") = std::nullopt, nb::arg("sage_attn_num_elts_per_blk_q") = 0, nb::arg("sage_attn_num_elts_per_blk_k") = 0, nb::arg("sage_attn_num_elts_per_blk_v") = 0, nb::arg("sage_attn_qk_int8") = false, nb::arg("num_contexts") = 0, nb::arg("num_ctx_tokens") = 0, - nb::arg("compressed_kv_cache_pool_ptr") = std::nullopt, "Multi-head attention operation", - nb::call_guard()); + nb::arg("trtllm_gen_jit_warmup") = false, nb::arg("compressed_kv_cache_pool_ptr") = std::nullopt, + "Multi-head attention operation", nb::call_guard()); m.def( "get_helix_workspace_size_per_rank", @@ -305,7 +306,7 @@ void initBindings(nb::module_& m) auto const mapping = torch_ext::readKvCachePoolMapping(host_kv_cache_pool_mapping, layer_idx); blockTables = kv_cache_block_offsets.select(0, mapping.poolIndex).narrow(0, batch_start, batch_size); } - return nb::make_tuple(nb::cast(kvPool), nb::cast(blockTables), optionalTensorToObject(kvScalePool)); + return nb::make_tuple(nb::cast(kvPool), nb::cast(blockTables), optionalToObject(kvScalePool)); }, nb::arg("host_kv_cache_pool_pointers"), nb::arg("host_kv_cache_pool_mapping"), nb::arg("kv_cache_block_offsets"), nb::arg("layer_idx"), nb::arg("num_kv_heads"), nb::arg("tokens_per_block"), diff --git a/cpp/tensorrt_llm/thop/CMakeLists.txt b/cpp/tensorrt_llm/thop/CMakeLists.txt index 90239c56f526..1942a00556b4 100644 --- a/cpp/tensorrt_llm/thop/CMakeLists.txt +++ b/cpp/tensorrt_llm/thop/CMakeLists.txt @@ -41,6 +41,7 @@ add_library( allgatherOp.cpp allreduceOp.cpp alltoallOp.cpp + asyncUlyssesOp.cpp attentionOp.cpp causalConv1dOp.cpp convertSpecDecodingMaskToPackedMaskOp.cpp @@ -69,6 +70,8 @@ add_library( fusedDiTQKNormRopeOp.cpp fusedDiTSplitQKNormRopeOp.cpp fusedDiTSplitNormOp.cpp + ulyssesPostUnscatterOp.cpp + ulyssesPermuteScatterOp.cpp fusedAddRMSNormQuant.cpp fusedActivationQuant.cpp fusedGatedRMSNormQuant.cpp diff --git a/cpp/tensorrt_llm/thop/IndexerTopKOp.cpp b/cpp/tensorrt_llm/thop/IndexerTopKOp.cpp index 92e94b8d7fb9..696b8d471043 100644 --- a/cpp/tensorrt_llm/thop/IndexerTopKOp.cpp +++ b/cpp/tensorrt_llm/thop/IndexerTopKOp.cpp @@ -1,5 +1,5 @@ /* - * Copyright (c) 2022-2025, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2022-2026, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. @@ -38,7 +38,8 @@ namespace torch_ext void indexer_topk_decode(th::Tensor const& logits, th::Tensor const& seq_lens, th::Tensor const& indices, int64_t next_n, int64_t index_topk, std::optional const& pre_idx, - std::optional const& heuristic_scratch) + std::optional const& heuristic_scratch, std::optional const& done_counter_scratch, + std::optional const& scratch, bool is_prefill) { TORCH_CHECK(logits.is_cuda() && seq_lens.is_cuda() && indices.is_cuda(), @@ -109,41 +110,70 @@ void indexer_topk_decode(th::Tensor const& logits, th::Tensor const& seq_lens, t heuristicScratchPtr = scratchTensor.data_ptr(); } - int32_t splitWorkThreshold = 200 * 1000; + // Multi-pass radix scratch. Pre-allocate it for CUDA-graph stable + // addresses, or let the wrapper allocate internally below. + void* multiPassScratchPtr = nullptr; + size_t multiPassScratchBytes = 0; + if (scratch.has_value()) + { + auto const& t = scratch.value(); + TORCH_CHECK(t.is_cuda(), "scratch must be a CUDA tensor"); + TORCH_CHECK(t.device() == logits.device(), "scratch must be on the same device as logits"); + TORCH_CHECK(t.is_contiguous(), "scratch must be contiguous"); + TORCH_CHECK(t.scalar_type() == at::ScalarType::Byte, "scratch must be uint8"); + multiPassScratchPtr = t.data_ptr(); + multiPassScratchBytes = static_cast(t.numel()); + } + + // 0 lets invokeIndexerTopKDecode pick its numRows-aware threshold. + int32_t const splitWorkThreshold = 0; auto stream = at::cuda::getCurrentCUDAStream(logits.get_device()); + // Mirror the kernel's threshold so we only allocate when split-work fires. + int32_t const adaptiveSplitWorkThreshold = 200 * 1000; + th::Tensor scratch_internal; + if (num_columns >= adaptiveSplitWorkThreshold && multiPassScratchPtr == nullptr) + { + size_t const bytes = tk::indexerTopKDecodeScratchBytes(num_rows, num_columns, static_cast(index_topk)); + // Zero-init: the radix kernel reads the per-row state on first call. + scratch_internal + = th::zeros({static_cast(bytes)}, th::TensorOptions().dtype(th::kByte).device(logits.device())); + multiPassScratchPtr = scratch_internal.data_ptr(); + multiPassScratchBytes = bytes; + } + + // `done_counter_scratch` is kept on the op signature for source compat + // but unused since the fused split-work tier was removed. Warn once so + // callers still passing it know to drop the argument. + if (done_counter_scratch.has_value()) + { + TORCH_WARN_ONCE( + "indexer_topk_decode: `done_counter_scratch` is deprecated and ignored since the fused split-work tier " + "was removed; drop this argument. The multi-pass radix path allocates its scratch internally, or you may " + "pass a pre-allocated buffer via `scratch` for CUDA-graph capture."); + } + if (logits_dtype == at::ScalarType::Float) { - // fp32 path — full Scheme X v1.2 dispatcher (GVR / Insertion / Radix / - // Radix-split-work). aux_logits/aux_indices needed only by split-work. - th::Tensor aux_indices = th::empty({0}, th::TensorOptions().dtype(th::kInt32).device(logits.device())); - th::Tensor aux_logits = th::empty({0}, th::TensorOptions().dtype(th::kFloat32).device(logits.device())); - constexpr auto multipleBlocksPerRowConfig = 10; - if (num_columns >= splitWorkThreshold) - { - aux_indices = th::empty({num_rows, multipleBlocksPerRowConfig, index_topk}, - th::TensorOptions().dtype(th::kInt32).device(logits.device())); - aux_logits = th::empty({num_rows, multipleBlocksPerRowConfig, index_topk}, - th::TensorOptions().dtype(th::kFloat32).device(logits.device())); - } tk::invokeIndexerTopKDecode(logits.data_ptr(), seq_lens.data_ptr(), indices.data_ptr(), - aux_logits.data_ptr(), aux_indices.data_ptr(), splitWorkThreshold, num_rows, num_columns, - logits_stride_0, logits_stride_1, static_cast(next_n), static_cast(index_topk), preIdxPtr, - preIdxStride, preIdxCount, static_cast(heuristicScratchPtr), stream); + splitWorkThreshold, num_rows, num_columns, logits_stride_0, logits_stride_1, static_cast(next_n), + static_cast(index_topk), preIdxPtr, preIdxStride, preIdxCount, + static_cast(heuristicScratchPtr), stream, multiPassScratchPtr, multiPassScratchBytes, is_prefill); } else if (logits_dtype == at::ScalarType::BFloat16) { tk::invokeIndexerTopKDecode(reinterpret_cast<__nv_bfloat16 const*>(logits.data_ptr()), seq_lens.data_ptr(), indices.data_ptr(), splitWorkThreshold, num_rows, num_columns, logits_stride_0, logits_stride_1, static_cast(next_n), static_cast(index_topk), preIdxPtr, - preIdxStride, preIdxCount, static_cast<__nv_bfloat16*>(heuristicScratchPtr), stream); + preIdxStride, preIdxCount, static_cast<__nv_bfloat16*>(heuristicScratchPtr), stream, multiPassScratchPtr, + multiPassScratchBytes, is_prefill); } else // Half { tk::invokeIndexerTopKDecode(reinterpret_cast<__half const*>(logits.data_ptr()), seq_lens.data_ptr(), indices.data_ptr(), splitWorkThreshold, num_rows, num_columns, logits_stride_0, logits_stride_1, static_cast(next_n), static_cast(index_topk), preIdxPtr, preIdxStride, preIdxCount, - static_cast<__half*>(heuristicScratchPtr), stream); + static_cast<__half*>(heuristicScratchPtr), stream, multiPassScratchPtr, multiPassScratchBytes, is_prefill); } } @@ -183,6 +213,16 @@ void indexer_topk_prefill(th::Tensor const& logits, th::Tensor const& row_starts static_cast(logits_stride_1), static_cast(index_topk), stream); } +// Returns the size in bytes of the `scratch` buffer required by +// indexer_topk_decode's multi-pass radix path for the given shape. Callers +// can allocate `torch.empty(size, dtype=torch.uint8, device='cuda')` and +// pass the result as the `scratch` argument. +int64_t indexer_topk_decode_scratch_bytes(int64_t num_rows, int64_t num_columns, int64_t index_topk) +{ + return static_cast(tk::indexerTopKDecodeScratchBytes( + static_cast(num_rows), static_cast(num_columns), static_cast(index_topk))); +} + } // end namespace torch_ext TRTLLM_NAMESPACE_END @@ -191,7 +231,9 @@ TORCH_LIBRARY_FRAGMENT(trtllm, m) { m.def( "indexer_topk_decode(Tensor logits, Tensor seq_lens, Tensor indices, int next_n, int index_topk=2048, " - "Tensor? pre_idx=None, Tensor? heuristic_scratch=None) -> ()"); + "Tensor? pre_idx=None, Tensor? heuristic_scratch=None, Tensor? done_counter_scratch=None, " + "Tensor? scratch=None, bool is_prefill=False) -> ()"); + m.def("indexer_topk_decode_scratch_bytes(int num_rows, int num_columns, int index_topk) -> int"); } TORCH_LIBRARY_IMPL(trtllm, CUDA, m) @@ -199,6 +241,11 @@ TORCH_LIBRARY_IMPL(trtllm, CUDA, m) m.impl("indexer_topk_decode", &tensorrt_llm::torch_ext::indexer_topk_decode); } +TORCH_LIBRARY_IMPL(trtllm, CompositeExplicitAutograd, m) +{ + m.impl("indexer_topk_decode_scratch_bytes", &tensorrt_llm::torch_ext::indexer_topk_decode_scratch_bytes); +} + TORCH_LIBRARY_FRAGMENT(trtllm, m) { m.def( diff --git a/cpp/tensorrt_llm/thop/asyncUlyssesOp.cpp b/cpp/tensorrt_llm/thop/asyncUlyssesOp.cpp new file mode 100644 index 000000000000..b0c01c673b1f --- /dev/null +++ b/cpp/tensorrt_llm/thop/asyncUlyssesOp.cpp @@ -0,0 +1,516 @@ +/* + * SPDX-FileCopyrightText: Copyright (c) 2025-2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ +// +// Async Ulysses A2A — PyTorch _SymmetricMemory CUDA-IPC backend. +// +// Pipeline (paired with UlyssesAttention.forward_async in +// tensorrt_llm/_torch/visual_gen/attention_backend/parallel.py): +// +// recv, send_h = ulysses_a2a_async_prepare(input, pg) # default stream +// ev.record() +// with torch.cuda.stream(comm_stream): +// ev.wait() +// ulysses_a2a_async_push(send_h, pg) # CE push only +// ... repeat _prepare/_push for next V/Q/K ... +// with torch.cuda.stream(comm_stream): +// ulysses_a2a_async_barrier(pg) # one per deferred push +// +// Phase 1 (`_prepare`) on the caller's compute stream: +// - lazily allocate one slot of a ring of P-symmetric-memory buffers +// via empty_strided_p2p + rendezvous (PyTorch CUDA-IPC backend); +// - launch the fused permute+scatter kernel into (slot.sendBuf for +// peer chunks, slot.basePtr+my_rank for self chunk); +// - return the 5D recv view and an opaque SendHandle. +// +// Phase 2 (`_async`) on the comm stream: +// - cudaMemcpyBatchAsync (capture-safe per-peer loop fallback) pushes +// each peer's slice of sendBuf into peer.basePtr[my_rank]; +// - PT symm-mem `barrier(channel, timeout_ms)` is the cross-rank fence. +// +// No NCCL device API; no LSA barrier kernel. +// + +#include "tensorrt_llm/common/cudaUtils.h" +#include "tensorrt_llm/kernels/ulyssesPermuteScatterKernel.h" +#include "tensorrt_llm/thop/thUtils.h" + +#include +#include +#include +#include +#include +#include + +#include +#include +#include +#include +#include +#include + +TRTLLM_NAMESPACE_BEGIN + +namespace torch_ext +{ + +// Opaque handle returned by `_prepare`, consumed by `_async`. Hides raw +// pointer plumbing from Python; `send_t` keeps the slot's sendBuf tensor +// view alive across the two op calls. +// +// `group_name` binds the handle to the PG that produced it: peer_recv_ptrs +// are valid only in that PG's symm-mem registration. `_async` rejects any +// PG whose group name doesn't match — two distinct PGs of the same size +// would otherwise pass the peer-pointer-count check and silently push +// into the wrong group's buffers. +struct SendHandle : torch::CustomClassHolder +{ + torch::Tensor send_t; + std::vector peer_recv_ptrs; + int64_t slot_bytes; + std::string group_name; +}; + +#if ENABLE_MULTI_DEVICE + +namespace +{ + +class AsyncUlyssesOp +{ +public: + // Slot ring depth. Minimum 3 = one slot each for V/Q/K within a single + // forward_async call. A slot is touched by 4 ops in sequence: + // (a) default-stream Phase-1 write — permute+scatter into slot.sendBuf + // (b) side-stream Phase-2 CE push — reads slot.sendBuf + // (c) side-stream Phase-2 barrier — peer writes into slot.recv + // (d) default-stream SDPA read — reads slot.recv + // Intra-layer hazard: V/Q/K must use distinct slots, otherwise (a) on the + // default stream races (b) on the side stream — they touch the same + // sendBuf and there is no stream sync between them until _join_async. + // Cross-layer hazard (Layer N+1 V reusing Layer N V's slot): safe because + // _join_async at end of Layer N waits the side stream's K barrier event, + // and SDPA on the default stream drains the recv read before Layer N+1 + // starts. So kNumSlots = 3 is the tight minimum. + static constexpr int kNumSlots = 3; + + explicit AsyncUlyssesOp(c10::intrusive_ptr pg) + : mPg(std::move(pg)) + { + } + + void initialize() + { + TLLM_CHECK_WITH_INFO(mPg, "AsyncUlyssesOp requires a torch ProcessGroup"); + TLLM_CHECK_WITH_INFO(mPg->getSize() >= 1, "ProcessGroup size must be >= 1"); + // Register the PG's group_info with PT symm-mem (one-shot per process per group). + ensureGroupRegistered(); + } + + int getPgSize() const + { + return mPg->getSize(); + } + + int getPgRank() const + { + return mPg->getRank(); + } + + // Phase 1: lazy-alloc next ring slot via PT symm-mem; return tensor + // views over send_buf (local push source) and recv_buf (peer-writable) + // plus the host-side peer-pointer array. + std::tuple, int64_t> acquireSlotPair( + at::IntArrayRef shape, c10::ScalarType dtype) + { + int64_t const elemSize = static_cast(c10::elementSize(dtype)); + TORCH_CHECK(elemSize > 0, "dtype must have positive itemsize"); + int64_t numel = 1; + for (auto d : shape) + { + TORCH_CHECK(d > 0, "shape dims must be positive"); + numel *= d; + } + int64_t const bufferBytes = numel * elemSize; + TORCH_CHECK(bufferBytes > 0, "bufferBytes must be positive"); + int const pSize = mPg->getSize(); + TORCH_CHECK(bufferBytes % pSize == 0, "bufferBytes must be divisible by world_size"); + + int const slotIdx = nextSlotIdx(); + Slot& slot = getOrAllocSlot(slotIdx, static_cast(bufferBytes)); + + auto opts = torch::dtype(dtype).device(torch::kCUDA); + auto sendT = torch::from_blob( + slot.sendBuf, shape, /*deleter=*/[](void*) {}, opts); + auto recvT = torch::from_blob( + slot.basePtr, shape, /*deleter=*/[](void*) {}, opts); + + std::vector peerRecvPtrs(pSize); + for (int p = 0; p < pSize; ++p) + { + peerRecvPtrs[p] = reinterpret_cast(slot.peerPtrs[p]); + } + + int64_t const slotBytes = bufferBytes / pSize; + return std::make_tuple(sendT, recvT, std::move(peerRecvPtrs), slotBytes); + } + + // Phase 2 (data): out-of-capture uses cudaMemcpyBatchAsync (multi-CE + // engine fan-out); under stream capture we serialize via per-peer + // cudaMemcpyAsync (cudaMemcpyBatchAsync is not graph-capture-safe). + // Self chunk is NOT pushed (already written by the upstream + // fused-permute kernel into recv_buf[my_rank]). + void runCePush(torch::Tensor send_buf, std::vector const& peer_recv_ptrs, int64_t slot_bytes) + { + int const pSize = mPg->getSize(); + int const pgRank = mPg->getRank(); + TORCH_CHECK(static_cast(peer_recv_ptrs.size()) == pSize, "peer_recv_ptrs size must equal world_size"); + + int const nPeers = pSize - 1; + if (nPeers == 0) + { + // P=1: self-only; recv_buf already populated by the permute kernel. + return; + } + + char const* sendBase = static_cast(send_buf.data_ptr()); + auto stream = at::cuda::getCurrentCUDAStream().stream(); + + cudaStreamCaptureStatus captureStatus; + TLLM_CUDA_CHECK(cudaStreamIsCapturing(stream, &captureStatus)); + bool const underCapture = (captureStatus != cudaStreamCaptureStatusNone); + + if (!underCapture) + { + std::vector dsts; + dsts.reserve(nPeers); + std::vector srcs; + srcs.reserve(nPeers); + std::vector sizes; + sizes.reserve(nPeers); + for (int p = 0; p < pSize; ++p) + { + if (p == pgRank) + continue; + void* peerBase = reinterpret_cast(peer_recv_ptrs[p]); + dsts.push_back( + static_cast(peerBase) + static_cast(pgRank) * static_cast(slot_bytes)); + srcs.push_back(sendBase + static_cast(p) * static_cast(slot_bytes)); + sizes.push_back(static_cast(slot_bytes)); + } + cudaMemcpyAttributes attrs[1]; + std::memset(&attrs[0], 0, sizeof(attrs[0])); + attrs[0].srcAccessOrder = cudaMemcpySrcAccessOrderStream; + attrs[0].flags = 1u; + size_t attrIdxs[1] = {0}; + TLLM_CUDA_CHECK(cudaMemcpyBatchAsync( + dsts.data(), srcs.data(), sizes.data(), static_cast(nPeers), attrs, attrIdxs, 1, stream)); + } + else + { + for (int p = 0; p < pSize; ++p) + { + if (p == pgRank) + continue; + void* peerBase = reinterpret_cast(peer_recv_ptrs[p]); + void* dst + = static_cast(peerBase) + static_cast(pgRank) * static_cast(slot_bytes); + void const* src = sendBase + static_cast(p) * static_cast(slot_bytes); + TLLM_CUDA_CHECK( + cudaMemcpyAsync(dst, src, static_cast(slot_bytes), cudaMemcpyDeviceToDevice, stream)); + } + } + } + + // Phase 2 (fence): PT symm-mem barrier on the current CUDA stream. + // Any allocated slot's handle works — they all belong to the same group. + void emitBarrier() + { + TLLM_CHECK_WITH_INFO( + mCanonicalHandle, "emitBarrier: no slot allocated yet — _prepare must precede the first _async barrier."); + // 10s timeout: on hang, the kernel traps with rank+channel diagnostic instead of spinning silently + // until SLURM wall-clock kills. Generous enough to absorb first-touch IPC + first cuda_graph + // capture jitter. channel=0: V/Q/K issues all run on the same per-device side stream so + // they FIFO-serialize; channel multiplexing only matters across distinct streams. + mCanonicalHandle->barrier(/*channel=*/0, /*timeout_ms=*/10000); + } + +private: + struct Slot + { + // PT _SymmetricMemory-backed recv buffer (peer-writable). + at::Tensor symm_tensor; + c10::intrusive_ptr handle; + void* basePtr = nullptr; // aliases symm_tensor.data_ptr() + size_t size = 0; + std::vector peerPtrs; // from handle->get_buffer_ptrs() + + // Local-only push source (no symm-mem). cudaMalloc'd eagerly to + // stay cuda_graph-capture-safe. + void* sendBuf = nullptr; + size_t sendBufBytes = 0; + }; + + // One-shot per process per group: register PG's (name, rank, size, store) + // with PT symm-mem's group registry. Subsequent rendezvous() calls reuse it. + void ensureGroupRegistered() + { + static std::set sRegistered; + static std::mutex sMutex; + std::string const& name = mPg->getGroupName(); + std::lock_guard lock(sMutex); + if (sRegistered.count(name)) + { + return; + } + c10d::symmetric_memory::set_group_info(name, mPg->getRank(), mPg->getSize(), mPg->getStore()); + sRegistered.insert(name); + } + + int nextSlotIdx() + { + std::lock_guard lock(mNextMutex); + int idx = mNextIdx; + mNextIdx = (mNextIdx + 1) % kNumSlots; + return idx; + } + + // Lazy collective allocator. Cached when size is sufficient; reallocates + // (releasing the old handle) on size-up. All ranks must reach this in the + // same order (collective rendezvous). + // + // Commit-on-success: every allocation step writes to local variables + // first, and the cached `slot` is mutated only after all steps succeed. + // If `empty_strided_p2p`, `rendezvous`, `get_buffer_ptrs`, or `cudaMalloc` + // throws mid-way, the local at::Tensor / intrusive_ptr clean up via RAII + // and the previously-cached slot remains untouched (so the next call + // either retries or reuses the still-valid prior state). + Slot& getOrAllocSlot(int slotIdx, size_t requiredSize) + { + std::lock_guard lock(mSlotsMutex); + Slot& slot = mSlots[slotIdx]; + + if (slot.basePtr != nullptr && slot.size >= requiredSize) + { + return slot; + } + + // First-time / size-up allocation is NOT capture-safe: + // empty_strided_p2p + rendezvous + cudaMalloc all violate stream + // capture invariants. Caller must warm up out-of-capture so the slot + // is allocated and cached before any cuda_graph capture begins. + cudaStream_t const stream = at::cuda::getCurrentCUDAStream().stream(); + cudaStreamCaptureStatus captureStatus = cudaStreamCaptureStatusNone; + TLLM_CUDA_CHECK(cudaStreamIsCapturing(stream, &captureStatus)); + TORCH_CHECK(captureStatus == cudaStreamCaptureStatusNone, + "async-ulysses: slot allocation (empty_strided_p2p + rendezvous + cudaMalloc) " + "is not graph-capture-safe. Warm up the model out-of-capture (run one forward " + "pass before enabling cuda_graph capture) so slots are cached."); + + int currentDev = -1; + TLLM_CUDA_CHECK(cudaGetDevice(¤tDev)); + c10::Device device(c10::DeviceType::CUDA, currentDev); + std::string const& groupName = mPg->getGroupName(); + int const pSize = mPg->getSize(); + + // Build new state in local variables — no mutation of `slot` yet. + at::Tensor newSymmTensor = c10d::symmetric_memory::empty_strided_p2p( + /*size=*/{static_cast(requiredSize)}, /*stride=*/{1}, + /*dtype=*/at::kByte, device, + /*group_name=*/std::make_optional(groupName), /*alloc_id=*/std::nullopt); + auto newHandle = c10d::symmetric_memory::rendezvous(newSymmTensor, groupName); + TLLM_CHECK_WITH_INFO(newHandle, "rendezvous returned null handle"); + + auto ptrs = newHandle->get_buffer_ptrs(); + TLLM_CHECK_WITH_INFO( + static_cast(ptrs.size()) == pSize, "get_buffer_ptrs size %zu != world_size %d", ptrs.size(), pSize); + std::vector newPeerPtrs(ptrs.begin(), ptrs.end()); + + // cudaMalloc last so any throw above is cleaned up by newSymmTensor / + // newHandle RAII without leaking GPU memory. + void* newSendBuf = nullptr; + TLLM_CUDA_CHECK(cudaMalloc(&newSendBuf, requiredSize)); + + // All allocations succeeded — commit. Free old sendBuf (the raw void* + // isn't owned by any RAII type in Slot); the at::Tensor / intrusive_ptr + // fields are released by move-assign. + if (slot.sendBuf != nullptr) + { + (void) cudaFree(slot.sendBuf); + } + slot.symm_tensor = std::move(newSymmTensor); + slot.handle = std::move(newHandle); + slot.basePtr = slot.symm_tensor.data_ptr(); + slot.size = requiredSize; + slot.peerPtrs = std::move(newPeerPtrs); + slot.sendBuf = newSendBuf; + slot.sendBufBytes = requiredSize; + + // Cache the first allocated handle for emitBarrier() (any handle from + // this PG yields the same channel-N barrier semantics). + if (!mCanonicalHandle) + { + mCanonicalHandle = slot.handle; + } + + return slot; + } + + c10::intrusive_ptr mPg; + + int mNextIdx{0}; + std::mutex mNextMutex; + + std::array mSlots{}; + std::mutex mSlotsMutex; + + // Cached on the first slot allocation. SymmetricMemory::barrier() is a + // PG-level sync (any handle from this PG triggers the same channel-N + // barrier), so emitBarrier() can use this directly instead of scanning + // mSlots for a non-null handle on every call. + c10::intrusive_ptr mCanonicalHandle; +}; + +// Process-lifetime cache of AsyncUlyssesOp instances keyed by group_name. +static std::shared_ptr getOrCreateOp(c10::intrusive_ptr const& pg) +{ + TLLM_CHECK_WITH_INFO(pg, "ProcessGroup is null"); + static std::map> sCache; + static std::mutex sMutex; + std::string const& groupName = pg->getGroupName(); + std::lock_guard lock(sMutex); + auto it = sCache.find(groupName); + if (it != sCache.end()) + { + return it->second; + } + auto op = std::make_shared(pg); + op->initialize(); + sCache[groupName] = op; + return op; +} + +// Step 1 (caller's compute stream): acquire slot ring entry + CUDA C +// permute+scatter (writes peer chunks to send_buf, self chunk directly to +// recv_buf[my_rank]). Returns the 5D recv-buf view (for downstream SDPA) +// and an opaque SendHandle that the second op consumes. +std::tuple> ulysses_a2a_async_prepare( + torch::Tensor input_4d, c10::intrusive_ptr const& pg) +{ + TORCH_CHECK(input_4d.is_cuda(), "input must be on CUDA"); + TORCH_CHECK(input_4d.is_contiguous(), "input must be contiguous"); + TORCH_CHECK(input_4d.dim() == 4, "input must be [B, S_local, H, D]"); + TORCH_CHECK(input_4d.scalar_type() == at::ScalarType::BFloat16, "bf16 only"); + + // Bind current device + slot allocator + kernel launch to the input's + // device. `getOrAllocSlot` reads `cudaGetDevice()`, and the kernel stream + // is taken from `input_4d.get_device()`; without this guard the two can + // diverge (e.g. caller forgot a torch.cuda.set_device) → slot allocated + // on dev A, kernel launched on dev B → illegal memory access. + c10::cuda::CUDAGuard device_guard(input_4d.device()); + + int const B = static_cast(input_4d.size(0)); + int const S_local = static_cast(input_4d.size(1)); + int const H = static_cast(input_4d.size(2)); + int const D = static_cast(input_4d.size(3)); + TORCH_CHECK(D % 8 == 0, "D must be divisible by 8 (int4 vec)"); + + auto op = getOrCreateOp(pg); + + int const P = op->getPgSize(); + int const my_rank = op->getPgRank(); + TORCH_CHECK(H % P == 0, "H must be divisible by world_size"); + int const H_local = H / P; + + auto [send_t, recv_t, peer_recv_ptrs, slot_bytes] = op->acquireSlotPair( + {(int64_t) P, (int64_t) B, (int64_t) S_local, (int64_t) H_local, (int64_t) D}, input_4d.scalar_type()); + + cudaStream_t stream = at::cuda::getCurrentCUDAStream(input_4d.get_device()).stream(); + tensorrt_llm::kernels::launchUlyssesPermuteScatter( + input_4d.data_ptr(), send_t.data_ptr(), recv_t.data_ptr(), my_rank, B, S_local, H, D, P, stream); + + auto send_h = c10::make_intrusive(); + send_h->send_t = std::move(send_t); + send_h->peer_recv_ptrs = std::move(peer_recv_ptrs); + send_h->slot_bytes = slot_bytes; + send_h->group_name = pg->getGroupName(); + + return std::make_tuple(std::move(recv_t), send_h); +} + +// Step 2a (caller's comm stream): CE push only, no barrier. Issue V/Q/K +// pushes back-to-back on the side stream so they FIFO through copy-engines +// without barrier-induced stalls; defer all fences to `ulysses_a2a_async_barrier` +// at join time. Caller must event-sync from compute stream before calling. +// +// Reject cross-PG handle use: peer_recv_ptrs are valid only in the symm-mem +// group registered for the PG that produced this handle. Two PGs of the same +// size would otherwise pass the peer-count check inside runCePush and silently +// push into the wrong group's buffers. +void ulysses_a2a_async_push( + c10::intrusive_ptr const& send_h, c10::intrusive_ptr const& pg) +{ + TORCH_CHECK(send_h.get() != nullptr, "send_h is null"); + TORCH_CHECK(send_h->send_t.defined(), "send_h.send_t is undefined"); + TORCH_CHECK(send_h->group_name == pg->getGroupName(), "SendHandle was produced by ProcessGroup '", + send_h->group_name, "' but ulysses_a2a_async_push was called with ProcessGroup '", pg->getGroupName(), + "'. Handle and PG must match."); + auto op = getOrCreateOp(pg); + op->runCePush(send_h->send_t, send_h->peer_recv_ptrs, send_h->slot_bytes); +} + +// Step 2b (caller's comm stream): emit a symm-mem barrier on channel 0. +// Pairs with `ulysses_a2a_async_push`; one call per deferred push (e.g. +// V/Q/K -> 3 barriers at join). +void ulysses_a2a_async_barrier(c10::intrusive_ptr const& pg) +{ + auto op = getOrCreateOp(pg); + op->emitBarrier(); +} + +} // namespace + +#endif // ENABLE_MULTI_DEVICE + +} // namespace torch_ext + +TRTLLM_NAMESPACE_END + +TORCH_LIBRARY_FRAGMENT(trtllm, m) +{ + m.class_("SendHandle"); + + m.def( + "ulysses_a2a_async_prepare(Tensor input, " + "__torch__.torch.classes.c10d.ProcessGroup pg) " + "-> (Tensor, __torch__.torch.classes.trtllm.SendHandle)"); + m.def( + "ulysses_a2a_async_push(__torch__.torch.classes.trtllm.SendHandle send_h, " + "__torch__.torch.classes.c10d.ProcessGroup pg) -> ()"); + m.def("ulysses_a2a_async_barrier(__torch__.torch.classes.c10d.ProcessGroup pg) -> ()"); +} + +// Both ops take/return a custom-class handle, not tensors, so the dispatcher +// can't pick a backend from input types. Register on CompositeExplicitAutograd +// (the underlying CUDA work runs on the caller's current CUDA stream). +TORCH_LIBRARY_IMPL(trtllm, CompositeExplicitAutograd, m) +{ +#if ENABLE_MULTI_DEVICE + m.impl("ulysses_a2a_async_prepare", &tensorrt_llm::torch_ext::ulysses_a2a_async_prepare); + m.impl("ulysses_a2a_async_push", &tensorrt_llm::torch_ext::ulysses_a2a_async_push); + m.impl("ulysses_a2a_async_barrier", &tensorrt_llm::torch_ext::ulysses_a2a_async_barrier); +#endif +} diff --git a/cpp/tensorrt_llm/thop/attentionOp.cpp b/cpp/tensorrt_llm/thop/attentionOp.cpp index 735de38e8c93..2cc7adb7fa1b 100644 --- a/cpp/tensorrt_llm/thop/attentionOp.cpp +++ b/cpp/tensorrt_llm/thop/attentionOp.cpp @@ -375,8 +375,8 @@ class RunnerBase std::optional fmha_scheduler_counter, std::optional mla_bmm1_scale, std::optional mla_bmm2_scale, std::optional quant_q_buffer, std::optional flash_mla_tile_scheduler_metadata, - std::optional flash_mla_num_splits, - std::optional compressed_kv_cache_pool_ptr = std::nullopt) const + std::optional flash_mla_num_splits, bool trtllm_gen_jit_warmup, + std::optional compressed_kv_cache_pool_ptr) const = 0; }; @@ -443,7 +443,7 @@ class Runner : public RunnerBase std::optional fmha_scheduler_counter, std::optional mla_bmm1_scale, std::optional mla_bmm2_scale, std::optional quant_q_buffer, std::optional flash_mla_tile_scheduler_metadata, - std::optional flash_mla_num_splits, + std::optional flash_mla_num_splits, bool trtllm_gen_jit_warmup, std::optional compressed_kv_cache_pool_ptr) const override { auto stream = at::cuda::getCurrentCUDAStream(qkv_or_q.get_device()); @@ -746,6 +746,7 @@ class Runner : public RunnerBase common_enqueue_params.context_lengths = context_lengths_ptr; common_enqueue_params.host_context_lengths = host_context_lengths.data_ptr(); common_enqueue_params.workspace = workspace_ptr; + common_enqueue_params.trtllm_gen_jit_warmup = trtllm_gen_jit_warmup; if (softmax_stats_tensor.has_value()) { TLLM_CHECK_WITH_INFO(softmax_stats_tensor.value().scalar_type() == at::ScalarType::Float, @@ -934,9 +935,9 @@ void attention(torch::Tensor q, std::optional k, std::optional const tokens_per_block, int64_t const max_num_requests, int64_t const max_context_length, - int64_t const attention_window_size, int64_t const beam_width, int64_t const mask_type, int64_t const quant_mode, - double const q_scaling, int64_t const position_embedding_type, int64_t const rope_dim, double const rope_base, - int64_t const rope_scale_type, double const rope_scale, double const rope_short_m_scale, + int64_t const max_seq_len, int64_t const attention_window_size, int64_t const beam_width, int64_t const mask_type, + int64_t const quant_mode, double const q_scaling, int64_t const position_embedding_type, int64_t const rope_dim, + double const rope_base, int64_t const rope_scale_type, double const rope_scale, double const rope_short_m_scale, double const rope_long_m_scale, int64_t const rope_max_positions, int64_t const rope_original_max_positions, bool const use_paged_context_fmha, std::optional attention_input_type, bool is_mla_enable, std::optional chunked_prefill_buffer_batch_size, std::optional q_lora_rank, @@ -963,7 +964,7 @@ void attention(torch::Tensor q, std::optional k, std::optional mla_bmm2_scale, std::optional quant_q_buffer, std::optional flash_mla_tile_scheduler_metadata, std::optional flash_mla_num_splits, int64_t sage_attn_num_elts_per_blk_q, int64_t sage_attn_num_elts_per_blk_k, int64_t sage_attn_num_elts_per_blk_v, - bool sage_attn_qk_int8, int64_t num_contexts, int64_t num_ctx_tokens, + bool sage_attn_qk_int8, int64_t num_contexts, int64_t num_ctx_tokens, bool trtllm_gen_jit_warmup, std::optional compressed_kv_cache_pool_ptr) { TLLM_LOG_TRACE("Attention op starts at layer %d", local_layer_idx); @@ -1060,6 +1061,8 @@ void attention(torch::Tensor q, std::optional k, std::optionalmFP8GenerationMLA = false; op->mFuseFp4Quant = is_fp4_out; op->mMaxContextLength = max_context_length; + op->mMaxSeqLen = max_seq_len; + op->mMaxNumRequests = max_num_requests; op->mQScaling = q_scaling; op->mPositionEmbeddingType = static_cast(int8_t(position_embedding_type)); @@ -1239,7 +1242,7 @@ void attention(torch::Tensor q, std::optional k, std::optional 0) && (attn_input_type != AttentionInputType::ContextOnly)) @@ -1261,7 +1264,7 @@ void attention(torch::Tensor q, std::optional k, std::optional k, std::optional const tokens_per_block, int64_t const max_num_requests, int64_t const max_context_length, - int64_t const attention_window_size, int64_t const beam_width, int64_t const mask_type, int64_t const quant_mode, - double const q_scaling, int64_t const position_embedding_type, int64_t const rope_dim, double const rope_base, - int64_t const rope_scale_type, double const rope_scale, double const rope_short_m_scale, + int64_t const max_seq_len, int64_t const attention_window_size, int64_t const beam_width, int64_t const mask_type, + int64_t const quant_mode, double const q_scaling, int64_t const position_embedding_type, int64_t const rope_dim, + double const rope_base, int64_t const rope_scale_type, double const rope_scale, double const rope_short_m_scale, double const rope_long_m_scale, int64_t const rope_max_positions, int64_t const rope_original_max_positions, bool const use_paged_context_fmha, std::optional attention_input_type, bool is_mla_enable, std::optional chunked_prefill_buffer_batch_size, std::optional q_lora_rank, @@ -89,7 +89,7 @@ void attention(torch::Tensor q, std::optional k, std::optional flash_mla_tile_scheduler_metadata = std::nullopt, std::optional flash_mla_num_splits = std::nullopt, int64_t sage_attn_num_elts_per_blk_q = 0, int64_t sage_attn_num_elts_per_blk_k = 0, int64_t sage_attn_num_elts_per_blk_v = 0, bool sage_attn_qk_int8 = false, - int64_t num_contexts = 0, int64_t num_ctx_tokens = 0, + int64_t num_contexts = 0, int64_t num_ctx_tokens = 0, bool trtllm_gen_jit_warmup = false, std::optional compressed_kv_cache_pool_ptr = std::nullopt); struct KvCachePoolPointers diff --git a/cpp/tensorrt_llm/thop/cublasFp4ScaledMM.cpp b/cpp/tensorrt_llm/thop/cublasFp4ScaledMM.cpp index 760ca6e3dd70..a9ad46ad8f04 100644 --- a/cpp/tensorrt_llm/thop/cublasFp4ScaledMM.cpp +++ b/cpp/tensorrt_llm/thop/cublasFp4ScaledMM.cpp @@ -79,7 +79,8 @@ inline cudaDataType_t getCudaDataType(at::ScalarType dtype) } void cublas_fp4_gemm_caller(torch::Tensor& out, torch::Tensor const& a, torch::Tensor const& b, - torch::Tensor const& scale_a, torch::Tensor const& scale_b, torch::Tensor const& alpha) + torch::Tensor const& scale_a, torch::Tensor const& scale_b, torch::Tensor const& alpha, + c10::optional const& bias = c10::nullopt) { int32_t m = a.sizes()[0]; int32_t n = b.sizes()[0]; @@ -144,11 +145,26 @@ void cublas_fp4_gemm_caller(torch::Tensor& out, torch::Tensor const& a, torch::T // 3. Passing dimensions as (n, m, k) instead of (m, n, k) // 4. Swapping scaling factors to match (b_sf_ptr, a_sf_ptr) // Note: beta is always 0 and is managed internally by BlockScaleGemm + void const* bias_ptr = nullptr; + if (bias.has_value() && bias->defined()) + { + TLLM_CHECK_WITH_INFO(bias->is_cuda(), "bias must be a CUDA tensor for cuBLASLt epilogue"); + TLLM_CHECK_WITH_INFO( + bias->device() == out.device(), "bias must reside on the same CUDA device as the GEMM output"); + TLLM_CHECK_WITH_INFO(bias->is_contiguous(), "bias must be contiguous for cuBLASLt epilogue"); + TLLM_CHECK_WITH_INFO(bias->dim() == 1 && bias->size(0) == n, + "bias must be a 1-D tensor of shape [N] matching the GEMM output dim"); + TLLM_CHECK_WITH_INFO( + bias->scalar_type() == out.scalar_type(), "bias dtype must match output dtype for cuBLASLt epilogue"); + bias_ptr = bias->data_ptr(); + } + cublasWrapper->BlockScaleGemm(CUBLAS_OP_T, CUBLAS_OP_N, n, m, k, b_ptr, k, // B matrix (swapped to first position) a_ptr, k, // A matrix (swapped to second position) out_ptr, n, // Output: C[m, n] in row-major b_sf_ptr, a_sf_ptr, // Scaling factors (also swapped) - alpha_ptr); // Uses default algorithm (nullptr) + alpha_ptr, // Uses default algorithm (nullptr) + bias_ptr); // Optional bias } } // namespace @@ -176,10 +192,12 @@ class CublasLtFP4GemmRunner : public torch::CustomClassHolder return static_cast(num_algos); } - // Run GEMM with specified tactic (-1 for default/best) + // Run GEMM with specified tactic (-1 for default/best). Optional `bias` + // is fused via CUBLASLT_EPILOGUE_BIAS. at::Tensor runGemm(at::Tensor const& mat1, at::Tensor const& mat2, at::Tensor const& mat1_scale, at::Tensor const& mat2_scale, at::Tensor const& alpha, int64_t output_buffer_kind, int64_t tactic, - c10::optional> group = c10::nullopt) const + c10::optional> group = c10::nullopt, + c10::optional bias = c10::nullopt) const { int m = mat1.size(0); int k_compressed = mat1.size(1); @@ -221,7 +239,8 @@ class CublasLtFP4GemmRunner : public torch::CustomClassHolder // Execute GEMM (beta is always 0 and is managed internally) if (has_algo) { - cublas_fp4_gemm_caller_with_algo(out, mat1, mat2, mat1_scale, mat2_scale, alpha, *algo_ptr, mOutputDtype); + cublas_fp4_gemm_caller_with_algo( + out, mat1, mat2, mat1_scale, mat2_scale, alpha, *algo_ptr, mOutputDtype, bias); } else { @@ -230,7 +249,7 @@ class CublasLtFP4GemmRunner : public torch::CustomClassHolder "CublasLtFP4GemmRunner: No valid algorithm found (tactic=%ld, available=%zu), falling back to default " "for shape (m=%d, n=%d, k=%d)", tactic, cache.heuristics.size(), m, n, k); - cublas_fp4_gemm_caller(out, mat1, mat2, mat1_scale, mat2_scale, alpha); + cublas_fp4_gemm_caller(out, mat1, mat2, mat1_scale, mat2_scale, alpha, bias); } return out; @@ -354,7 +373,8 @@ class CublasLtFP4GemmRunner : public torch::CustomClassHolder // Helper function to run GEMM with a specific algorithm static void cublas_fp4_gemm_caller_with_algo(torch::Tensor& out, torch::Tensor const& a, torch::Tensor const& b, torch::Tensor const& scale_a, torch::Tensor const& scale_b, torch::Tensor const& alpha, - cublasLtMatmulAlgo_t const& algo, at::ScalarType output_dtype) + cublasLtMatmulAlgo_t const& algo, at::ScalarType output_dtype, + c10::optional const& bias = c10::nullopt) { int32_t m = a.sizes()[0]; int32_t n = b.sizes()[0]; @@ -409,6 +429,20 @@ class CublasLtFP4GemmRunner : public torch::CustomClassHolder // 3. Passing dimensions as (n, m, k) instead of (m, n, k) // 4. Swapping scaling factors to match matrices (b_sf_ptr, a_sf_ptr) + void const* bias_ptr = nullptr; + if (bias.has_value() && bias->defined()) + { + TLLM_CHECK_WITH_INFO(bias->is_cuda(), "bias must be a CUDA tensor for cuBLASLt epilogue"); + TLLM_CHECK_WITH_INFO( + bias->device() == out.device(), "bias must reside on the same CUDA device as the GEMM output"); + TLLM_CHECK_WITH_INFO(bias->is_contiguous(), "bias must be contiguous for cuBLASLt epilogue"); + TLLM_CHECK_WITH_INFO(bias->dim() == 1 && bias->size(0) == n, + "bias must be a 1-D tensor of shape [N] matching the GEMM output dim"); + TLLM_CHECK_WITH_INFO( + bias->scalar_type() == out.scalar_type(), "bias dtype must match output dtype for cuBLASLt epilogue"); + bias_ptr = bias->data_ptr(); + } + // Use BlockScaleGemm with specified algorithm for autotuning // Note: beta is always 0 and is managed internally by BlockScaleGemm cublasWrapper->BlockScaleGemm(CUBLAS_OP_T, CUBLAS_OP_N, n, m, k, b_ptr, @@ -417,7 +451,8 @@ class CublasLtFP4GemmRunner : public torch::CustomClassHolder out_ptr, n, // Output: C[m, n] in row-major b_sf_ptr, a_sf_ptr, // Scaling factors (also swapped) alpha_ptr, // Alpha - &algo); // Use specified algorithm + &algo, // Use specified algorithm + bias_ptr); // Optional bias for CUBLASLT_EPILOGUE_BIAS } }; diff --git a/cpp/tensorrt_llm/thop/cudaNvfp4MM.cpp b/cpp/tensorrt_llm/thop/cudaNvfp4MM.cpp index b71270b1d08f..d98bfc53986e 100644 --- a/cpp/tensorrt_llm/thop/cudaNvfp4MM.cpp +++ b/cpp/tensorrt_llm/thop/cudaNvfp4MM.cpp @@ -36,7 +36,7 @@ namespace using tensorrt_llm::common::check; void cuda_core_nvfp4_gemm_caller(Tensor& out, Tensor const& a, Tensor const& b, Tensor const& scale_a, - Tensor const& scale_b, Tensor const& alpha, bool fast_acc = false) + Tensor const& scale_b, Tensor const& alpha, std::optional const& bias, bool fast_acc = false) { int32_t m = a.sizes()[0]; int32_t n = b.sizes()[0]; @@ -67,9 +67,22 @@ void cuda_core_nvfp4_gemm_caller(Tensor& out, Tensor const& a, Tensor const& b, cudaDataType_t alphaType = convert_torch_dtype(alpha.scalar_type()); TORCH_CHECK(alphaType == CUDA_R_32F); + void const* bias_ptr = nullptr; + if (bias.has_value()) + { + auto const& bias_tensor = *bias; + CHECK_TH_CUDA(bias_tensor); + TORCH_CHECK(bias_tensor.device() == out.device(), "bias must reside on the same CUDA device as the output"); + TORCH_CHECK(bias_tensor.is_contiguous(), "bias must be contiguous"); + TORCH_CHECK(bias_tensor.dim() == 1, "bias must be 1-D"); + TORCH_CHECK(bias_tensor.sizes()[0] == n, "bias size must equal n=", n); + TORCH_CHECK(bias_tensor.scalar_type() == out.scalar_type(), "bias dtype must match output dtype"); + bias_ptr = bias_tensor.data_ptr(); + } + tensorrt_llm::kernels::cuda_core_gemm_nvfp4::Params params(a_ptr, b_ptr, out_ptr, m, n, k, reinterpret_cast<__nv_fp8_e4m3 const*>(a_scale), reinterpret_cast<__nv_fp8_e4m3 const*>(b_scale), aType, - outType, reinterpret_cast(alpha_ptr)); + outType, reinterpret_cast(alpha_ptr), bias_ptr); bool dispatched = tensorrt_llm::kernels::cuda_core_gemm_nvfp4::cudaCoreGemmDispatcher(params, stream); TORCH_CHECK(dispatched, "Failed to dispatch cudaCoreGemmLauncher"); } @@ -94,12 +107,10 @@ Tensor& cuda_core_nvfp4_gemm_out(Tensor const& mat_a, Tensor const& mat_b, Tenso TORCH_CHECK(mat_a.sizes()[1] == mat_b.sizes()[1]); TORCH_CHECK(mat_b.sizes()[0] == out.sizes()[1]); - TORCH_CHECK(!bias.has_value(), "bias is not support yet"); - TORCH_CHECK(scale_a.dtype() == SF_DTYPE); TORCH_CHECK(scale_b.dtype() == SF_DTYPE); - cuda_core_nvfp4_gemm_caller(out, mat_a, mat_b, scale_a, scale_b, alpha, true); + cuda_core_nvfp4_gemm_caller(out, mat_a, mat_b, scale_a, scale_b, alpha, bias, true); return out; } diff --git a/cpp/tensorrt_llm/thop/fp4Gemm.cpp b/cpp/tensorrt_llm/thop/fp4Gemm.cpp index 98ceb358c590..f0066c714624 100644 --- a/cpp/tensorrt_llm/thop/fp4Gemm.cpp +++ b/cpp/tensorrt_llm/thop/fp4Gemm.cpp @@ -96,7 +96,7 @@ tkc::CutlassGemmConfig getDefaultGemmConfig(int64_t m, int64_t n, int64_t k, FP4 template void runGemm(at::Tensor& out, at::Tensor const& mat1, at::Tensor const& mat2, at::Tensor const& mat1Scale, at::Tensor const& mat2Scale, at::Tensor const& globalScale, int64_t m, int64_t n, int64_t k, int64_t batch_count, - tkc::CutlassGemmConfig const& gemmConfig, FP4GemmType fp4GemmType) + tkc::CutlassGemmConfig const& gemmConfig, FP4GemmType fp4GemmType, void const* bias_ptr = nullptr) { if (fp4GemmType == FP4GemmType::W4A8_MXFP4_MXFP8) { @@ -107,7 +107,8 @@ void runGemm(at::Tensor& out, at::Tensor const& mat1, at::Tensor const& mat2, at gemmRunner.gemm(out.data_ptr(), mat1.const_data_ptr(), mat2.const_data_ptr(), mat1Scale.const_data_ptr(), mat2Scale.const_data_ptr(), globalScale.data_ptr(), m, n, k, batch_count, gemmConfig, - reinterpret_cast(workspace.data_ptr()), wsBytes, at::cuda::getCurrentCUDAStream(mat1.get_device())); + reinterpret_cast(workspace.data_ptr()), wsBytes, at::cuda::getCurrentCUDAStream(mat1.get_device()), + bias_ptr); } else if (fp4GemmType == FP4GemmType::W4A4_NVFP4_NVFP4) { @@ -118,7 +119,8 @@ void runGemm(at::Tensor& out, at::Tensor const& mat1, at::Tensor const& mat2, at gemmRunner.gemm(out.data_ptr(), mat1.const_data_ptr(), mat2.const_data_ptr(), mat1Scale.const_data_ptr(), mat2Scale.const_data_ptr(), globalScale.data_ptr(), m, n, k, batch_count, gemmConfig, - reinterpret_cast(workspace.data_ptr()), wsBytes, at::cuda::getCurrentCUDAStream(mat1.get_device())); + reinterpret_cast(workspace.data_ptr()), wsBytes, at::cuda::getCurrentCUDAStream(mat1.get_device()), + bias_ptr); } } @@ -133,7 +135,8 @@ void runGemm(at::Tensor& out, at::Tensor const& mat1, at::Tensor const& mat2, at at::Tensor fp4_bmm_impl(at::Tensor const& mat1, at::Tensor const& mat2, at::Tensor const& mat1Scale, at::Tensor const& mat2Scale, at::Tensor const& globalScale, FP4GemmType fp4GemmType, std::optional out_dtype, int64_t output_buffer_kind, - tkc::CutlassGemmConfig const* maybe_config = nullptr, c10::optional> group = c10::nullopt) + tkc::CutlassGemmConfig const* maybe_config = nullptr, c10::optional> group = c10::nullopt, + std::optional const& bias = std::nullopt) { if (fp4GemmType == FP4GemmType::W4A8_MXFP4_MXFP8) { @@ -198,16 +201,31 @@ at::Tensor fp4_bmm_impl(at::Tensor const& mat1, at::Tensor const& mat2, at::Tens std::vector out_shape = mat1.dim() == 2 ? std::vector{m, n} : std::vector{b, m, n}; auto [out, _] = torch_ext::allocate_output( out_shape, out_dtype.value(), mat1.device(), static_cast(output_buffer_kind), group); + + void const* bias_ptr = nullptr; + if (bias.has_value()) + { + auto const& bias_tensor = *bias; + CHECK_TH_CUDA(bias_tensor); + TORCH_CHECK(bias_tensor.device() == out.device(), "bias must reside on the same CUDA device as the output"); + TORCH_CHECK(bias_tensor.is_contiguous(), "bias must be contiguous"); + TORCH_CHECK(bias_tensor.dim() == 1, "bias must be 1-D"); + TORCH_CHECK(bias_tensor.sizes()[0] == n, "bias size must equal n=", n); + TORCH_CHECK(bias_tensor.scalar_type() == out.scalar_type(), "bias dtype must match output dtype"); + bias_ptr = bias_tensor.const_data_ptr(); + } + switch (out_dtype.value()) { case at::ScalarType::Half: - runGemm(out, mat1, mat2, mat1Scale, mat2Scale, globalScale, m, n, k, b, config, fp4GemmType); + runGemm(out, mat1, mat2, mat1Scale, mat2Scale, globalScale, m, n, k, b, config, fp4GemmType, bias_ptr); break; case at::ScalarType::BFloat16: - runGemm<__nv_bfloat16>(out, mat1, mat2, mat1Scale, mat2Scale, globalScale, m, n, k, b, config, fp4GemmType); + runGemm<__nv_bfloat16>( + out, mat1, mat2, mat1Scale, mat2Scale, globalScale, m, n, k, b, config, fp4GemmType, bias_ptr); break; case at::ScalarType::Float: - runGemm(out, mat1, mat2, mat1Scale, mat2Scale, globalScale, m, n, k, b, config, fp4GemmType); + runGemm(out, mat1, mat2, mat1Scale, mat2Scale, globalScale, m, n, k, b, config, fp4GemmType, bias_ptr); break; default: C10_THROW_ERROR(NotImplementedError, "out_dtype must be one of fp16/bf16/fp32."); } @@ -278,7 +296,8 @@ class FP4GemmRunner : public torch::CustomClassHolder at::Tensor runGemm(at::Tensor const& mat1, at::Tensor const& mat2, at::Tensor const& mat1Scale, at::Tensor const& mat2Scale, at::Tensor const& globalScale, int64_t output_buffer_kind, int64_t configIdx, - c10::optional> group = c10::nullopt) const + c10::optional> group = c10::nullopt, + std::optional const& bias = std::nullopt) const { tkc::CutlassGemmConfig const* config = nullptr; if (configIdx != -1) @@ -287,7 +306,7 @@ class FP4GemmRunner : public torch::CustomClassHolder config = &mConfigs.at(configIdx); } return fp4_bmm_impl(mat1, mat2, mat1Scale, mat2Scale, globalScale, mfp4GemmType, mOutputDtype, - output_buffer_kind, config, group); + output_buffer_kind, config, group, bias); } at::ScalarType getOutputDtype() const diff --git a/cpp/tensorrt_llm/thop/fp4Quantize.cpp b/cpp/tensorrt_llm/thop/fp4Quantize.cpp index a1ba8ff10c72..859f1489b2b6 100644 --- a/cpp/tensorrt_llm/thop/fp4Quantize.cpp +++ b/cpp/tensorrt_llm/thop/fp4Quantize.cpp @@ -36,6 +36,7 @@ namespace torch_ext // nvfp4: sfVecSize = 16, sfUseUE8M0 = false // mxfp4: sfVecSize = 32, sfUseUE8M0 = true // alignment: sfVecSize +// sfUseUE8M0: bool, if true, scale factors use UE8M0 format (MXFP4); otherwise UE4M3 (NVFP4). // isSfSwizzledLayout: bool, if true, the scale factors are stored in swizzled layout, otherwise in linear layout. // See QuantizationSFLayout enum for more details about the two layouts. // returns self_fp4, self_block_scale_factors diff --git a/cpp/tensorrt_llm/thop/fusedQKNormRopeOp.cpp b/cpp/tensorrt_llm/thop/fusedQKNormRopeOp.cpp index a6635c0285af..4ff4cff6d3ba 100644 --- a/cpp/tensorrt_llm/thop/fusedQKNormRopeOp.cpp +++ b/cpp/tensorrt_llm/thop/fusedQKNormRopeOp.cpp @@ -46,12 +46,19 @@ void fused_qk_norm_rope( double low, // threshold for high frequency double high, // threshold for low frequency double attention_factor, // attention_factor applied on cos and sin - bool is_qk_norm // Whether to apply QK norm + bool is_qk_norm, // Whether to apply QK norm + bool use_gemma, // Whether QK norm uses Gemma-style RMSNorm (scale by (1 + weight)) + bool use_mrope, // Whether to use interleaved mRoPE position selection + int64_t mrope_section1, // mrope_section[1] (height); ignored when use_mrope is false + int64_t mrope_section2 // mrope_section[2] (width) ) { // Input validation TORCH_CHECK(qkv.dim() == 2, "QKV tensor must be 2D: [num_tokens, (num_heads_q+num_heads_k+num_heads_v)*head_dim]"); - TORCH_CHECK(position_ids.dim() == 1, "Position IDs must be 1D: [num_tokens]"); + // Plain RoPE: position_ids is 1D [num_tokens]. Interleaved mRoPE: 2D [3, num_tokens]. + TORCH_CHECK(position_ids.dim() == 1 || (position_ids.dim() == 2 && position_ids.size(0) == 3), + "Position IDs must be 1D [num_tokens] (plain RoPE) or 2D [3, num_tokens] (mRoPE)"); + TORCH_CHECK(!use_mrope || position_ids.dim() == 2, "use_mrope requires 2D [3, num_tokens] position_ids"); TORCH_CHECK(q_weight.dim() == 1, "Query weights must be 1D: [head_dim]"); TORCH_CHECK(k_weight.dim() == 1, "Key weights must be 1D: [head_dim]"); TORCH_CHECK(q_weight.size(0) == head_dim, "Query weights size must match head dimension"); @@ -63,7 +70,7 @@ void fused_qk_norm_rope( CHECK_INPUT(k_weight, torch::kBFloat16); int64_t num_tokens = qkv.size(0); - TORCH_CHECK(position_ids.size(0) == num_tokens, "Number of tokens in position_ids must match QKV"); + TORCH_CHECK(position_ids.size(-1) == num_tokens, "Number of tokens in position_ids must match QKV"); int64_t total_heads = num_heads_q + num_heads_k + num_heads_v; TORCH_CHECK( @@ -78,7 +85,8 @@ void fused_qk_norm_rope( reinterpret_cast<__nv_bfloat16*>(k_weight.data_ptr()), static_cast(base), !is_neox, // interleave reinterpret_cast(position_ids.data_ptr()), static_cast(factor), static_cast(low), - static_cast(high), static_cast(attention_factor), stream, is_qk_norm); + static_cast(high), static_cast(attention_factor), stream, is_qk_norm, use_gemma, use_mrope, + static_cast(mrope_section1), static_cast(mrope_section2)); } // Register the PyTorch operators @@ -88,7 +96,8 @@ TORCH_LIBRARY_FRAGMENT(trtllm, m) "fused_qk_norm_rope(Tensor(a!) qkv, int num_heads_q, int num_heads_k, int num_heads_v, int head_dim, int " "rotary_dim, float " "eps, Tensor q_weight, Tensor k_weight, float base, bool is_neox, Tensor position_ids, float factor, float " - "low, float high, float attention_factor, bool is_qk_norm) -> ()"); + "low, float high, float attention_factor, bool is_qk_norm, bool use_gemma, bool use_mrope, int " + "mrope_section1, int mrope_section2) -> ()"); } // Register the CUDA implementation diff --git a/cpp/tensorrt_llm/thop/moeOp.cpp b/cpp/tensorrt_llm/thop/moeOp.cpp index 454dbe07dcb9..b69e2987771f 100644 --- a/cpp/tensorrt_llm/thop/moeOp.cpp +++ b/cpp/tensorrt_llm/thop/moeOp.cpp @@ -21,12 +21,17 @@ #include "moe_kernels.h" #endif // Always include the public header for moe_gemm_kernels.h +#include "cutlass/gemm_coord.h" #include "tensorrt_llm/kernels/cutlass_kernels/include/moe_gemm_kernels.h" +#include "tensorrt_llm/kernels/cutlass_kernels/include/moe_lora_device_path.h" +#include "tensorrt_llm/kernels/cutlass_kernels/include/moe_lora_problem_builder.h" #include "tensorrt_llm/common/config.h" #include "tensorrt_llm/common/cublasMMWrapper.h" +#include "tensorrt_llm/common/dataType.h" #include "tensorrt_llm/common/opUtils.h" #include "tensorrt_llm/common/workspace.h" +#include "tensorrt_llm/kernels/cuda_graph_grouped_gemm.h" #include "tensorrt_llm/kernels/cutlass_kernels/fp8_blockscale_gemm/fp8_blockscale_gemm.h" #include "tensorrt_llm/kernels/cutlass_kernels/include/cutlass_kernel_selector.h" #include "tensorrt_llm/kernels/lora/lora.h" @@ -68,6 +73,70 @@ enum class MoeLoraRequestType : int32_t kGENERATION = 1 }; +// --------------------------------------------------------------------------- +// libtorch-bound implementation of MoeLoraDeviceRunFn. +// +// The per-module GEMM dispatch for the device LoRA path: builds the per-token +// problem descriptors on device via launchMoeLoraProblemBuilder, then +// dispatches cudaGraph(SplitK)GroupedGemm. The latter allocates workspace via +// at::Tensor, so this lives in th_common (which links libtorch); moe_kernels.cu +// reaches it through LoraParams::device_path.run, keeping libmoe_gemm_src.a +// (and the TensorRT plugin) libtorch-free. +// --------------------------------------------------------------------------- +inline void moeLoraDeviceRunImpl(::tensorrt_llm::kernels::cutlass_kernels::MoeLoraDevicePathModule const& mod, + int64_t num_permuted_tokens, int64_t in_hidden_size, int64_t max_lora_rank, int64_t dtype_bytes, + int64_t splitk_slices, void const* input_base, void* output_base, nvinfer1::DataType data_type, cudaStream_t stream) +{ + TLLM_CHECK_WITH_INFO(mod.permuted_ranks_dev != nullptr, + "Device-path LoRA module is missing permuted ranks buffer (forgot to populate device_path?)."); + + // Repack the device-resident scratch into the bundle the problem-builder + // consumes. The typed casts recover the concrete pointer types that + // MoeLoraDevicePathModule stores as void* for header decoupling. + ::tensorrt_llm::kernels::cutlass_kernels::MoeLoraGemmGroupArrays arrays{}; + arrays.problem_sizes_in = static_cast(mod.problem_sizes_in_dev); + arrays.problem_sizes_out = static_cast(mod.problem_sizes_out_dev); + arrays.a_ptrs_in = mod.a_ptrs_in_dev; + arrays.b_ptrs_in = mod.b_ptrs_in_dev; + arrays.d_ptrs_in = mod.d_ptrs_in_dev; + arrays.b_ptrs_out = mod.b_ptrs_out_dev; + arrays.d_ptrs_out = mod.d_ptrs_out_dev; + arrays.lda_in = mod.lda_in_dev; + arrays.ldb_in = mod.ldb_in_dev; + arrays.ldd_in = mod.ldd_in_dev; + arrays.ldb_out = mod.ldb_out_dev; + arrays.ldd_out = mod.ldd_out_dev; + arrays.splitk_offsets = mod.splitk_offsets_dev; + + ::tensorrt_llm::kernels::cutlass_kernels::launchMoeLoraProblemBuilder(mod.permuted_ranks_dev, mod.permuted_ptrs_dev, + input_base, mod.lowrank_workspace_dev, output_base, num_permuted_tokens, in_hidden_size, mod.out_hidden_size, + max_lora_rank, dtype_bytes, splitk_slices, arrays, stream); + sync_check_cuda_error(stream); + + // The cuda_graph_(split_k_)grouped_gemm wrappers accept ldc == ldd when C + // aliases D (the no-bias case). The problem-builder produces a single + // ldd_in / ldd_out per stage, reused for ldcGpu below. + auto* host_max_in = static_cast(mod.host_max_problem_in_pinned); + auto* host_max_out = static_cast(mod.host_max_problem_out_pinned); + + // kMinKN mirrors the value attention LoRA uses for kernel selection. The + // wrappers fall back to the smaller-tile family when min(K, N) < kMinKN. + constexpr int kMinKN = 16; + + ::tensorrt_llm::kernels::cudaGraphSplitKGroupedGemm(arrays.problem_sizes_in, static_cast(num_permuted_tokens), + arrays.a_ptrs_in, arrays.b_ptrs_in, arrays.d_ptrs_in, arrays.d_ptrs_in, arrays.lda_in, arrays.ldb_in, + arrays.ldd_in, arrays.ldd_in, + /*isLoraIn=*/true, data_type, static_cast(splitk_slices), kMinKN, host_max_in, arrays.splitk_offsets, + stream); + sync_check_cuda_error(stream); + + ::tensorrt_llm::kernels::cudaGraphGroupedGemm(arrays.problem_sizes_out, static_cast(num_permuted_tokens), + arrays.d_ptrs_in /*== a_ptrs_out*/, arrays.b_ptrs_out, arrays.d_ptrs_out, arrays.d_ptrs_out, arrays.ldd_in, + arrays.ldb_out, arrays.ldd_out, arrays.ldd_out, + /*isLoraIn=*/false, data_type, kMinKN, host_max_out, stream); + sync_check_cuda_error(stream); +} + class FusedMoeRunner : public torch::CustomClassHolder { public: @@ -249,6 +318,16 @@ class FusedMoeRunner : public torch::CustomClassHolder mGemm1Profiles = mKernelRunner->getTactics(MoeGemmId::GEMM_1); mGemm2Profiles = mKernelRunner->getTactics(MoeGemmId::GEMM_2); cuInit(0); + + // Device-LoRA-path opt-in for the per-request schema. Any non-empty + // value other than "0"/"OFF"/"off" enables the capture-safe on-device + // LoRA path (pointer-expand + problem-builder + grouped-GEMM) instead of + // the legacy host-pointer path, matching LORA_USE_UNIFIED_GEMM. + if (char const* envv = std::getenv("TLLM_MOE_LORA_USE_DEVICE_PATH")) + { + std::string val(envv); + mUseDeviceLoraPath = !val.empty() && val != "0" && val != "OFF" && val != "off"; + } } ~FusedMoeRunner() @@ -297,7 +376,7 @@ class FusedMoeRunner : public torch::CustomClassHolder bool use_dynamic_fc2_scale = false, // Routed-expert LoRA inputs (all optional; presence of fc1_lora_ranks activates LoRA). // Each *_ranks : CPU int32 [num_seqs] - // Each *_weights : CPU int64 [num_seqs, 3] -- (A_ptr, B_ptr, DoRA_ptr-unused) + // Each *_weights : CPU int64 [num_seqs, 3], holding (A_ptr, B_ptr, DoRA_ptr); DoRA unused. torch::optional const& fc1_lora_ranks = torch::nullopt, torch::optional const& fc1_lora_weight_ptrs = torch::nullopt, torch::optional const& fc2_lora_ranks = torch::nullopt, @@ -492,22 +571,30 @@ class FusedMoeRunner : public torch::CustomClassHolder "MoE LoRA only supports fp16 and bf16 activation dtypes."); TORCH_CHECK(mWeightDtype == c10::ScalarType::Half || mWeightDtype == c10::ScalarType::BFloat16, "MoE LoRA only supports unquantized fp16/bf16 expert weights."); - // CUDA-graph capture is incompatible with the kernel's LoRA path, - // which performs a host-side `cudaEventSynchronize` and CPU-side - // per-token pointer expansion inside `setupLoraWorkspace`. The - // event-synchronize cannot be recorded into a graph, so reject here - // with a clear message to avoid a segfault during capture. - TORCH_CHECK(!tensorrt_llm::common::isCapturing(stream), - "MoE LoRA is not supported under CUDA graph capture. The fused-MoE kernel's " - "LoRA path performs a host-side cudaEventSynchronize after a D2H pointer-expansion copy, " - "which is not capturable. Run the LoRA path eagerly, or disable MoE LoRA when capturing."); + // CUDA-graph capture is only safe on the device LoRA path. The legacy + // host path performs a host-side cudaEventSynchronize and per-token + // pointer expansion in setupLoraWorkspace, plus host-side run-length + // encoding in LoraImpl::run, none of which is capturable. The device + // path (launchMoeLoraPointerExpand and runMoeLoraDeviceModule in + // moe_kernels.cu) runs entirely on the stream and is opted into via + // TLLM_MOE_LORA_USE_DEVICE_PATH. + TORCH_CHECK(mUseDeviceLoraPath || !tensorrt_llm::common::isCapturing(stream), + "MoE LoRA + CUDA graph capture requires the device LoRA path. The per-request schema runs " + "the legacy host path by default, which performs a host-side cudaEventSynchronize after a " + "D2H pointer-expansion copy and is not capturable. Set TLLM_MOE_LORA_USE_DEVICE_PATH=1, run " + "LoRA eagerly, or disable MoE LoRA when capturing."); } // Build LoraParams up-front so we can compute the required cuBLAS workspace before allocation. auto lora_params_opt = buildMoeLoraParams(fc1_lora_ranks, fc1_lora_weight_ptrs, fc2_lora_ranks, fc2_lora_weight_ptrs, gated_lora_ranks, gated_lora_weight_ptrs, host_request_types, host_context_lengths, - /*num_tokens=*/num_rows, hidden_size, inter_size, mActivationDtype, lora_max_low_rank, is_gated_act); + /*num_tokens=*/num_rows, hidden_size, inter_size, mActivationDtype, lora_max_low_rank, is_gated_act, stream, + static_cast(experts_per_token)); size_t lora_workspace_size = 0; - if (lora_params_opt.has_value()) + // The device path uses persistent device scratch and never touches the + // legacy cuBLAS lora_workspace, so skip computing/allocating it there to + // avoid duplicating LoRA scratch per stream (and the resulting OOM risk + // at large top_k/rank). + if (lora_params_opt.has_value() && !lora_params_opt->device_path.enabled) { auto const lora_dtype = loraTypeFromActDtype(mActivationDtype); lora_workspace_size = computeLoraWorkspaceSize(lora_params_opt->fc1_lora_impl, @@ -546,7 +633,7 @@ class FusedMoeRunner : public torch::CustomClassHolder // LoraParams is either the populated one we just built or a default-constructed empty one (use_lora=false). ::tensorrt_llm::kernels::LoraParams lora_params = lora_params_opt.value_or(::tensorrt_llm::kernels::LoraParams{}); - if (lora_active) + if (lora_active && !lora_params.device_path.enabled) { lora_params.workspace = workspace_info.lora_workspace; } @@ -909,14 +996,101 @@ class FusedMoeRunner : public torch::CustomClassHolder // Sync event used by setupLoraWorkspace (kernel waits on this before reading // host-side permuted_rows arrays). Created lazily. cudaEvent_t mLoraMemcpyEvent = nullptr; - // Scratch storage for the per-token expanded LoRA pointer/rank arrays. - // Reused across calls; .clear() drops content but retains capacity. - std::vector mLoraExpandFC1WeightPtrs; - std::vector mLoraExpandFC2WeightPtrs; - std::vector mLoraExpandGatedWeightPtrs; - std::vector mLoraExpandFC1Ranks; - std::vector mLoraExpandFC2Ranks; - std::vector mLoraExpandGatedRanks; + + // Pinned-host and persistent-device buffers for the capture-safe MoE LoRA + // path. The pinned-host tensors hold the per-token expanded LoRA tables + // (ranks and weight-pointer pairs) so the in-op async H2D into the device + // mirrors is graph-capturable; an async H2D from pageable host memory + // silently becomes synchronous and breaks capture. Both tensors are sized + // at mLoraHostBufCapacity (max_num_tokens) and reused across calls so the + // source and destination addresses are stable across capture and replay. + // Only the first num_tokens entries are valid each call. + at::Tensor mLoraExpandFC1RanksPinned; // [max_num_tokens] int32 + at::Tensor mLoraExpandFC1WeightPtrsPinned; // [max_num_tokens * 2] int64 (A, B) + at::Tensor mLoraExpandFC2RanksPinned; // [max_num_tokens] int32 + at::Tensor mLoraExpandFC2WeightPtrsPinned; // [max_num_tokens * 2] int64 + at::Tensor mLoraExpandGatedRanksPinned; // [max_num_tokens] int32 + at::Tensor mLoraExpandGatedWeightPtrsPinned; // [max_num_tokens * 2] int64 + at::Tensor mLoraExpandFC1RanksDevice; + at::Tensor mLoraExpandFC1WeightPtrsDevice; + at::Tensor mLoraExpandFC2RanksDevice; + at::Tensor mLoraExpandFC2WeightPtrsDevice; + at::Tensor mLoraExpandGatedRanksDevice; + at::Tensor mLoraExpandGatedWeightPtrsDevice; + // Tracks how many entries were populated this call so the H2D copies only + // the live portion. Per module; gated may be inactive for non-gated layers. + int64_t mLoraExpandFC1Size = 0; + int64_t mLoraExpandFC2Size = 0; + int64_t mLoraExpandGatedSize = 0; + // Highest max_num_tokens we have allocated storage for. Grown lazily by + // buildMoeLoraParams; resizing reallocates and changes the buffer addresses. + int64_t mLoraHostBufCapacity = 0; + + // Set once a CUDA-graph capture has been observed on the LoRA path. After + // that, growing the persistent scratch is forbidden even outside capture, + // since a captured graph keeps replaying against the freed addresses. + // Mutable so the const capture-safety check can record it. + mutable bool mLoraCaptureObserved = false; + + // Persistent device-resident scratch backing the capture-safe MoE LoRA + // path. One LoraDevicePathBuffers per module (fc1, fc2, gated). All + // at::Tensor members are allocated by ensureLoraDeviceScratch and reused + // across calls so the addresses baked into a captured graph remain valid + // for replay. Pointers from these tensors are packed into + // LoraParams::device_path by buildMoeLoraParams when the device path is taken. + struct LoraDevicePathBuffers + { + // Per-permuted-row (rank, A_ptr + offset, B_ptr + offset). + at::Tensor permuted_ranks; // int32 [P_max] + at::Tensor permuted_ptrs; // int64 [2 * P_max] + + // Grouped-GEMM bundle. Concrete types restored at the LoraParams boundary. + at::Tensor problem_sizes_in; // int8 [P_max * sizeof(GemmCoord)] + at::Tensor problem_sizes_out; // int8 [P_max * sizeof(GemmCoord)] + at::Tensor a_ptrs_in; // int64 [P_max] + at::Tensor b_ptrs_in; // int64 [P_max] + at::Tensor d_ptrs_in; // int64 [P_max] + at::Tensor b_ptrs_out; // int64 [P_max] + at::Tensor d_ptrs_out; // int64 [P_max] + at::Tensor lda_in; // int64 [P_max] + at::Tensor ldb_in; // int64 [P_max] + at::Tensor ldd_in; // int64 [P_max] + at::Tensor ldb_out; // int64 [P_max] + at::Tensor ldd_out; // int64 [P_max] + at::Tensor splitk_offsets; // int64 [P_max + 1] + + // GEMM data-flow buffers. The split-K in-GEMM's partial-sum scratch is + // allocated internally by cuda_graph_split_k_grouped_gemm, so only the + // low-rank intermediate is owned here. + at::Tensor lowrank_workspace; // dtype [P_max * max_lora_rank] + + // Pinned-host single GemmCoord upper bounds; required by the + // cuda_graph_*_grouped_gemm wrappers for kernel selection. + at::Tensor host_max_problem_in; // int8 pinned [sizeof(GemmCoord)] + at::Tensor host_max_problem_out; // int8 pinned [sizeof(GemmCoord)] + }; + + LoraDevicePathBuffers mFc1DeviceBuf; + LoraDevicePathBuffers mFc2DeviceBuf; + LoraDevicePathBuffers mGatedDeviceBuf; + + // Tracks the shape parameters baked into the current scratch + // allocation. (Re)allocation is required if any of these grows or if + // the dtype changes. + int64_t mLoraDeviceScratchCapacity = 0; // P_max = max(num_tokens * top_k) + int64_t mLoraDeviceScratchMaxLoraRank = 0; + int64_t mLoraDeviceScratchDtypeBytes = 0; + int64_t mLoraDeviceScratchSplitKSlices = 0; + bool mLoraDeviceScratchHasGated = false; + + // Set from the TLLM_MOE_LORA_USE_DEVICE_PATH environment variable at + // construction time. Selects the capture-safe device LoRA path. + bool mUseDeviceLoraPath = false; + + // Split-K slice count for the device-path low-rank in-GEMM. Mirrors the + // value LoraImpl uses internally so the device-path split-K scratch is sized + // identically. + static constexpr int64_t kDevicePathSplitKSlices = 16; void freeProfileWorkspace() { @@ -1086,9 +1260,14 @@ class FusedMoeRunner : public torch::CustomClassHolder // num_tokens: total tokens flowing through this op (used as a consistency check) // // Outputs the two `expand_*` vectors with shapes [num_tokens] / [num_tokens * 2]. + // Writes the [num_tokens] expanded LoRA tables into the caller-owned + // pinned-host buffers expand_ranks_data ([num_tokens] int32) and + // expand_ptrs_data ([num_tokens * 2] int64; each pair is (A, B) as + // raw pointer bits stored in int64). The buffers must already be + // allocated to at least num_tokens / num_tokens * 2 elements. void expandPerRequestLoraTo(torch::Tensor const& ranks, torch::Tensor const& weight_ptrs, torch::Tensor const& host_request_types, torch::Tensor const& host_context_lengths, int64_t num_tokens, - std::vector& expand_ranks, std::vector& expand_ptrs) + int32_t* expand_ranks_data, int64_t* expand_ptrs_data) { CHECK_CPU_INPUT(ranks, at::ScalarType::Int) CHECK_CPU_INPUT(weight_ptrs, at::ScalarType::Long) @@ -1109,28 +1288,43 @@ class FusedMoeRunner : public torch::CustomClassHolder auto const* req_types = static_cast(host_request_types.data_ptr()); auto const* ctx_lens = static_cast(host_context_lengths.data_ptr()); - expand_ranks.clear(); - expand_ptrs.clear(); - expand_ranks.reserve(num_tokens); - expand_ptrs.reserve(num_tokens * 2); - int64_t produced = 0; for (int64_t req_id = 0; req_id < num_seqs; ++req_id) { int32_t const rank = rank_data[req_id]; - void const* const a_ptr = reinterpret_cast(ptr_data[req_id * 3 + 0]); - void const* const b_ptr = reinterpret_cast(ptr_data[req_id * 3 + 1]); + int64_t const a_ptr = ptr_data[req_id * 3 + 0]; + int64_t const b_ptr = ptr_data[req_id * 3 + 1]; // ptr_data[req_id * 3 + 2] is the optional DoRA magnitude vector pointer; ignored here // (MoE+DoRA is rejected at load time, see tensorrt_llm/lora_manager.py). - auto const req_type = static_cast(req_types[req_id]); + // Validate the raw request type before trusting it. An unexpected + // value would otherwise fall into the CONTEXT branch and read an + // arbitrary context length, producing a negative/garbage repeat. + int32_t const req_type_raw = req_types[req_id]; + TORCH_CHECK(req_type_raw == static_cast(MoeLoraRequestType::kCONTEXT) + || req_type_raw == static_cast(MoeLoraRequestType::kGENERATION), + "MoE LoRA host_request_types[", req_id, "] must be 0 (context) or 1 (generation); got ", req_type_raw); + auto const req_type = static_cast(req_type_raw); + if (req_type == MoeLoraRequestType::kCONTEXT) + { + TORCH_CHECK(ctx_lens[req_id] >= 0, "MoE LoRA host_context_lengths[", req_id, + "] must be non-negative; got ", ctx_lens[req_id]); + } int64_t const repeat = (req_type == MoeLoraRequestType::kGENERATION) ? int64_t{1} : static_cast(ctx_lens[req_id]); + // Guard the destination writes BEFORE producing them. expand_*_data + // point at fixed-capacity pinned buffers sized for num_tokens, so a + // malformed host_context_lengths (summing past num_tokens) must be a + // clean error rather than an out-of-bounds write into pinned memory. + TORCH_CHECK(repeat >= 0 && produced + repeat <= num_tokens, "MoE LoRA per-request expansion overran the ", + num_tokens, "-token buffer at request ", req_id, " (produced ", produced, " + ", repeat, + "). Check host_request_types / host_context_lengths against the op's token count."); for (int64_t i = 0; i < repeat; ++i) { - expand_ranks.push_back(rank); - expand_ptrs.push_back(a_ptr); - expand_ptrs.push_back(b_ptr); + int64_t const t = produced + i; + expand_ranks_data[t] = rank; + expand_ptrs_data[2 * t + 0] = a_ptr; + expand_ptrs_data[2 * t + 1] = b_ptr; } produced += repeat; } @@ -1138,10 +1332,196 @@ class FusedMoeRunner : public torch::CustomClassHolder " tokens but op input has ", num_tokens, " tokens."); } + // Reallocating MoE-LoRA scratch hands out fresh addresses, which silently + // invalidates any CUDA graph that baked in the old ones. Reject reallocation + // both while capturing and after any capture has been observed, since an + // earlier graph keeps replaying. Callers invoke this only when reallocation + // is imminent. No-op before the first capture (e.g. warmup pre-sizing). + void checkLoraReallocSafeDuringCapture(cudaStream_t stream, int64_t requested, int64_t current) const + { + bool const capturing = (stream != nullptr && tensorrt_llm::common::isCapturing(stream)); + if (capturing) + { + mLoraCaptureObserved = true; + } + if (!capturing && !mLoraCaptureObserved) + { + return; + } + TORCH_CHECK(false, "MoE LoRA scratch (current capacity ", current, ") is too small for ", requested, + capturing ? " entries during CUDA graph capture." : " entries after a CUDA graph capture was observed.", + " Growing it would invalidate addresses baked into already-captured graphs. Run the device LoRA path " + "eagerly through the worst-case shape before capture so the scratch is pre-sized."); + } + + // Internal helper: (re)allocate the six pinned-host + six device tensor + // pairs to hold capacity expanded tokens. Called by buildMoeLoraParams + // (lazy on first call at a given size). The (re)allocation drops the + // previous storage; callers must make sure any in-flight CUDA graph that + // references the old addresses has either been destroyed or never replays + // again. + void ensureLoraExpandBuffers(int64_t capacity) + { + auto const pinned_int_opts = at::TensorOptions().dtype(at::kInt).pinned_memory(true); + auto const pinned_long_opts = at::TensorOptions().dtype(at::kLong).pinned_memory(true); + auto const dev_int_opts = at::TensorOptions().dtype(at::kInt).device(at::kCUDA); + auto const dev_long_opts = at::TensorOptions().dtype(at::kLong).device(at::kCUDA); + + mLoraExpandFC1RanksPinned = at::empty({capacity}, pinned_int_opts); + mLoraExpandFC2RanksPinned = at::empty({capacity}, pinned_int_opts); + mLoraExpandGatedRanksPinned = at::empty({capacity}, pinned_int_opts); + mLoraExpandFC1WeightPtrsPinned = at::empty({capacity * 2}, pinned_long_opts); + mLoraExpandFC2WeightPtrsPinned = at::empty({capacity * 2}, pinned_long_opts); + mLoraExpandGatedWeightPtrsPinned = at::empty({capacity * 2}, pinned_long_opts); + + mLoraExpandFC1RanksDevice = at::empty({capacity}, dev_int_opts); + mLoraExpandFC2RanksDevice = at::empty({capacity}, dev_int_opts); + mLoraExpandGatedRanksDevice = at::empty({capacity}, dev_int_opts); + mLoraExpandFC1WeightPtrsDevice = at::empty({capacity * 2}, dev_long_opts); + mLoraExpandFC2WeightPtrsDevice = at::empty({capacity * 2}, dev_long_opts); + mLoraExpandGatedWeightPtrsDevice = at::empty({capacity * 2}, dev_long_opts); + } + + // Allocate the per-module device-path scratch for the capture-safe LoRA + // path. The buffers are sized in permuted tokens (P = num_tokens * top_k) + // and the per-token LoRA rank upper bound max_lora_rank; both feed the + // pointer-expand, problem-builder, and cuda_graph_*_grouped_gemm kernels. + // + // The function is idempotent at or below the current capacity and + // reallocates only when one of (capacity, max_lora_rank, dtype_bytes, + // splitk_slices, has_gated) grows. Reallocation drops the previous storage, + // so callers must ensure any in-flight CUDA graph referencing the old + // addresses has been destroyed or will not replay. + // + // The host-side max-problem-size pins hold one GemmCoord each; the value is + // a worst-case upper bound, independent of per-call data. + void ensureLoraDeviceScratch(int64_t capacity, int64_t max_lora_rank, int64_t dtype_bytes, int64_t splitk_slices, + bool has_gated, cudaStream_t stream = nullptr) + { + TORCH_CHECK(capacity > 0, "device-path capacity must be positive; got ", capacity); + TORCH_CHECK(max_lora_rank > 0, "device-path max_lora_rank must be positive; got ", max_lora_rank); + TORCH_CHECK(dtype_bytes > 0, "device-path dtype_bytes must be positive; got ", dtype_bytes); + TORCH_CHECK(splitk_slices > 0, "device-path splitk_slices must be positive; got ", splitk_slices); + + bool const need_resize = capacity > mLoraDeviceScratchCapacity || max_lora_rank > mLoraDeviceScratchMaxLoraRank + || dtype_bytes != mLoraDeviceScratchDtypeBytes || splitk_slices != mLoraDeviceScratchSplitKSlices + || (has_gated && !mLoraDeviceScratchHasGated); + if (!need_resize) + { + return; + } + // Refuse to grow device scratch mid-capture (see helper for rationale). + checkLoraReallocSafeDuringCapture(stream, capacity, mLoraDeviceScratchCapacity); + + // Grow each field to the requested upper bound and remember the + // dtype/rank/splitk combo so subsequent calls can early-exit. + int64_t const new_capacity = std::max(capacity, mLoraDeviceScratchCapacity); + int64_t const new_max_lora_rank = std::max(max_lora_rank, mLoraDeviceScratchMaxLoraRank); + bool const new_has_gated = mLoraDeviceScratchHasGated || has_gated; + + // c10::ScalarType for the lowrank workspace. The kernel treats the + // buffer opaquely (per-byte stride is dtype_bytes), so we pick a + // dtype with matching element size to keep at::Tensor accounting + // sensible; consumers cast via .data_ptr(). + c10::ScalarType const dtype_scalar = (dtype_bytes == 2) ? at::kBFloat16 + : (dtype_bytes == 4) ? at::kFloat + : at::kByte; + // Callers should pass bf16/fp16 (2 bytes). Other sizes still work at the + // byte level, but this assertion catches accidental misuse. + TORCH_CHECK(dtype_bytes == 1 || dtype_bytes == 2 || dtype_bytes == 4, + "device-path lowrank workspace dtype_bytes must be 1/2/4; got ", dtype_bytes); + + auto const dev_int8_opts = at::TensorOptions().dtype(at::kByte).device(at::kCUDA); + auto const dev_int32_opts = at::TensorOptions().dtype(at::kInt).device(at::kCUDA); + auto const dev_int64_opts = at::TensorOptions().dtype(at::kLong).device(at::kCUDA); + auto const dev_dtype_opts = at::TensorOptions().dtype(dtype_scalar).device(at::kCUDA); + auto const pinned_int8_opts = at::TensorOptions().dtype(at::kByte).pinned_memory(true); + + // sizeof(cutlass::gemm::GemmCoord) == sizeof(int) * 3 in practice; + // we ask for the exact byte count at allocation time so the bound + // tracks any cutlass struct-layout change. + int64_t const gemm_coord_bytes = static_cast(sizeof(cutlass::gemm::GemmCoord)); + + auto alloc_one = [&](LoraDevicePathBuffers& mod) + { + mod.permuted_ranks = at::empty({new_capacity}, dev_int32_opts); + mod.permuted_ptrs = at::empty({new_capacity * 2}, dev_int64_opts); + + mod.problem_sizes_in = at::empty({new_capacity * gemm_coord_bytes}, dev_int8_opts); + mod.problem_sizes_out = at::empty({new_capacity * gemm_coord_bytes}, dev_int8_opts); + + mod.a_ptrs_in = at::empty({new_capacity}, dev_int64_opts); + mod.b_ptrs_in = at::empty({new_capacity}, dev_int64_opts); + mod.d_ptrs_in = at::empty({new_capacity}, dev_int64_opts); + mod.b_ptrs_out = at::empty({new_capacity}, dev_int64_opts); + mod.d_ptrs_out = at::empty({new_capacity}, dev_int64_opts); + + mod.lda_in = at::empty({new_capacity}, dev_int64_opts); + mod.ldb_in = at::empty({new_capacity}, dev_int64_opts); + mod.ldd_in = at::empty({new_capacity}, dev_int64_opts); + mod.ldb_out = at::empty({new_capacity}, dev_int64_opts); + mod.ldd_out = at::empty({new_capacity}, dev_int64_opts); + mod.splitk_offsets = at::empty({new_capacity + 1}, dev_int64_opts); + + mod.lowrank_workspace = at::empty({new_capacity * new_max_lora_rank}, dev_dtype_opts); + + mod.host_max_problem_in = at::empty({gemm_coord_bytes}, pinned_int8_opts); + mod.host_max_problem_out = at::empty({gemm_coord_bytes}, pinned_int8_opts); + }; + + alloc_one(mFc1DeviceBuf); + alloc_one(mFc2DeviceBuf); + if (new_has_gated) + { + alloc_one(mGatedDeviceBuf); + } + + mLoraDeviceScratchCapacity = new_capacity; + mLoraDeviceScratchMaxLoraRank = new_max_lora_rank; + mLoraDeviceScratchDtypeBytes = dtype_bytes; + mLoraDeviceScratchSplitKSlices = splitk_slices; + mLoraDeviceScratchHasGated = new_has_gated; + } + + // Pack the per-module at::Tensor scratch into the typed pointer bundle + // attached to LoraParams. The buffers are owned by FusedMoeRunner, so the + // resulting pointers stay valid as long as the runner outlives the + // LoraParams use. dim_a/dim_b, ranks_src_dev, and out_hidden_size are filled + // in by buildMoeLoraParams; the output base is passed directly to + // runMoeLoraDeviceModule at the call site. + void populateLoraDevicePathModule( + LoraDevicePathBuffers& mod, ::tensorrt_llm::kernels::cutlass_kernels::MoeLoraDevicePathModule& out) const + { + out.permuted_ranks_dev = mod.permuted_ranks.data_ptr(); + out.permuted_ptrs_dev = mod.permuted_ptrs.data_ptr(); + + out.problem_sizes_in_dev = mod.problem_sizes_in.data_ptr(); + out.problem_sizes_out_dev = mod.problem_sizes_out.data_ptr(); + out.a_ptrs_in_dev = reinterpret_cast(mod.a_ptrs_in.data_ptr()); + out.b_ptrs_in_dev = reinterpret_cast(mod.b_ptrs_in.data_ptr()); + out.d_ptrs_in_dev = reinterpret_cast(mod.d_ptrs_in.data_ptr()); + out.b_ptrs_out_dev = reinterpret_cast(mod.b_ptrs_out.data_ptr()); + out.d_ptrs_out_dev = reinterpret_cast(mod.d_ptrs_out.data_ptr()); + out.lda_in_dev = mod.lda_in.data_ptr(); + out.ldb_in_dev = mod.ldb_in.data_ptr(); + out.ldd_in_dev = mod.ldd_in.data_ptr(); + out.ldb_out_dev = mod.ldb_out.data_ptr(); + out.ldd_out_dev = mod.ldd_out.data_ptr(); + out.splitk_offsets_dev = mod.splitk_offsets.data_ptr(); + + out.lowrank_workspace_dev = mod.lowrank_workspace.data_ptr(); + out.host_max_problem_in_pinned = mod.host_max_problem_in.data_ptr(); + out.host_max_problem_out_pinned = mod.host_max_problem_out.data_ptr(); + + // out_hidden_size is set by buildMoeLoraParams; default it here. + out.out_hidden_size = 0; + } + // Build a populated LoraParams from the optional CPU tensors. Caller is // responsible for setting `lora_params.workspace` (the cuBLAS scratch). // Returns std::nullopt when LoRA is inactive (no fc1 ranks tensor). - // Mutates the mLoraExpand* member vectors. + // Mutates the mLoraExpand* pinned tensors and queues an async H2D into + // the device mirrors on stream. std::optional<::tensorrt_llm::kernels::LoraParams> buildMoeLoraParams( torch::optional const& fc1_lora_ranks, torch::optional const& fc1_lora_weight_ptrs, @@ -1151,7 +1531,8 @@ class FusedMoeRunner : public torch::CustomClassHolder torch::optional const& gated_lora_weight_ptrs, torch::optional const& host_request_types, torch::optional const& host_context_lengths, int64_t num_tokens, int64_t hidden_size, - int64_t inter_size, c10::ScalarType act_dtype, int64_t lora_max_low_rank, bool is_gated_activation) + int64_t inter_size, c10::ScalarType act_dtype, int64_t lora_max_low_rank, bool is_gated_activation, + cudaStream_t stream, int experts_per_token) { if (!fc1_lora_ranks.has_value()) { @@ -1164,8 +1545,8 @@ class FusedMoeRunner : public torch::CustomClassHolder TORCH_CHECK(host_request_types.has_value() && host_context_lengths.has_value(), "MoE LoRA requires host_request_types and host_context_lengths CPU tensors."); // For gated activations (e.g. SwiGLU) the kernel's setupLoraWorkspace - // unconditionally dereferences `lora_params.gated_lora_ranks` / - // `gated_lora_weight_ptrs`, so the caller MUST provide them. + // unconditionally dereferences gated_lora_ranks and gated_lora_weight_ptrs, + // so the caller must provide them. if (is_gated_activation) { TORCH_CHECK(gated_lora_ranks.has_value() && gated_lora_weight_ptrs.has_value(), @@ -1182,36 +1563,181 @@ class FusedMoeRunner : public torch::CustomClassHolder int64_t const num_seqs = fc1_lora_ranks->size(0); bool const has_gated = is_gated_activation && gated_lora_ranks.has_value(); + // Every per-request rank must fit within lora_max_low_rank, which sizes + // both the lowrank workspace and the max-problem hints. A larger rank + // would make the device path build GEMM problems wider than the + // allocated scratch and write out of bounds, so reject it up front. + auto validate_rank_tensor = [&](char const* name, torch::Tensor const& ranks_tensor) + { + CHECK_CPU_INPUT(ranks_tensor, at::ScalarType::Int) + auto const* rank_data = ranks_tensor.data_ptr(); + for (int64_t i = 0; i < ranks_tensor.size(0); ++i) + { + TORCH_CHECK(rank_data[i] >= 0 && rank_data[i] <= lora_max_low_rank, name, "[", i, "]=", rank_data[i], + " is outside [0, ", lora_max_low_rank, "]."); + } + }; + validate_rank_tensor("fc1_lora_ranks", *fc1_lora_ranks); + validate_rank_tensor("fc2_lora_ranks", *fc2_lora_ranks); + if (has_gated) + { + validate_rank_tensor("gated_lora_ranks", *gated_lora_ranks); + } + + // Ensure pinned/device buffers can hold num_tokens entries. + // Idempotent at-or-below current capacity. + if (num_tokens > mLoraHostBufCapacity) + { + checkLoraReallocSafeDuringCapture(stream, num_tokens, mLoraHostBufCapacity); + ensureLoraExpandBuffers(num_tokens); + mLoraHostBufCapacity = num_tokens; + } + expandPerRequestLoraTo(*fc1_lora_ranks, *fc1_lora_weight_ptrs, *host_request_types, *host_context_lengths, - num_tokens, mLoraExpandFC1Ranks, mLoraExpandFC1WeightPtrs); + num_tokens, mLoraExpandFC1RanksPinned.data_ptr(), + mLoraExpandFC1WeightPtrsPinned.data_ptr()); expandPerRequestLoraTo(*fc2_lora_ranks, *fc2_lora_weight_ptrs, *host_request_types, *host_context_lengths, - num_tokens, mLoraExpandFC2Ranks, mLoraExpandFC2WeightPtrs); + num_tokens, mLoraExpandFC2RanksPinned.data_ptr(), + mLoraExpandFC2WeightPtrsPinned.data_ptr()); + mLoraExpandFC1Size = num_tokens; + mLoraExpandFC2Size = num_tokens; if (has_gated) { expandPerRequestLoraTo(*gated_lora_ranks, *gated_lora_weight_ptrs, *host_request_types, - *host_context_lengths, num_tokens, mLoraExpandGatedRanks, mLoraExpandGatedWeightPtrs); + *host_context_lengths, num_tokens, mLoraExpandGatedRanksPinned.data_ptr(), + mLoraExpandGatedWeightPtrsPinned.data_ptr()); + mLoraExpandGatedSize = num_tokens; } else { - mLoraExpandGatedRanks.clear(); - mLoraExpandGatedWeightPtrs.clear(); + mLoraExpandGatedSize = 0; } + // Queue an async H2D into the persistent device mirrors. The copy + // source is pinned, so the async copy is truly async and capturable, and + // the destination is a persistent device buffer with a stable address + // across captures. The device path consumes these mirrors via + // launchMoeLoraPointerExpand; the legacy host path ignores them and + // reads the pinned host pointers through LoraParams below. + auto issue_h2d = [&](at::Tensor const& src, at::Tensor& dst, int64_t numel) + { + if (numel == 0) + { + return; + } + TLLM_CUDA_CHECK(cudaMemcpyAsync(dst.data_ptr(), src.data_ptr(), + static_cast(numel) * src.element_size(), cudaMemcpyHostToDevice, stream)); + }; + issue_h2d(mLoraExpandFC1RanksPinned, mLoraExpandFC1RanksDevice, mLoraExpandFC1Size); + issue_h2d(mLoraExpandFC1WeightPtrsPinned, mLoraExpandFC1WeightPtrsDevice, mLoraExpandFC1Size * 2); + issue_h2d(mLoraExpandFC2RanksPinned, mLoraExpandFC2RanksDevice, mLoraExpandFC2Size); + issue_h2d(mLoraExpandFC2WeightPtrsPinned, mLoraExpandFC2WeightPtrsDevice, mLoraExpandFC2Size * 2); + issue_h2d(mLoraExpandGatedRanksPinned, mLoraExpandGatedRanksDevice, mLoraExpandGatedSize); + issue_h2d(mLoraExpandGatedWeightPtrsPinned, mLoraExpandGatedWeightPtrsDevice, mLoraExpandGatedSize * 2); + auto impls = getOrCreateLoraImpls(hidden_size, inter_size, act_dtype, static_cast(lora_max_low_rank)); + // The host-side LoRA path (LoraImpl::run) reads the per-token ranks and + // pointers through these raw host pointers, which point at the pinned + // host tensors populated above. ::tensorrt_llm::kernels::LoraParams lora_params{ static_cast(num_seqs), - mLoraExpandFC1Ranks.data(), - mLoraExpandFC1WeightPtrs.data(), - mLoraExpandFC2Ranks.data(), - mLoraExpandFC2WeightPtrs.data(), + mLoraExpandFC1RanksPinned.data_ptr(), + reinterpret_cast(mLoraExpandFC1WeightPtrsPinned.data_ptr()), + mLoraExpandFC2RanksPinned.data_ptr(), + reinterpret_cast(mLoraExpandFC2WeightPtrsPinned.data_ptr()), impls.first, impls.second, /*workspace=*/nullptr, // caller fills in &mLoraMemcpyEvent, - has_gated ? mLoraExpandGatedRanks.data() : nullptr, - has_gated ? mLoraExpandGatedWeightPtrs.data() : nullptr, + has_gated ? mLoraExpandGatedRanksPinned.data_ptr() : nullptr, + has_gated ? reinterpret_cast(mLoraExpandGatedWeightPtrsPinned.data_ptr()) : nullptr, }; + + // Device-LoRA-path scratch. Allocate the per-module device-resident + // buffers and pack their pointers into lora_params.device_path. The + // device path is taken when the env-var opts in (TLLM_MOE_LORA_USE_DEVICE_PATH). + bool const use_device_path = mUseDeviceLoraPath; + if (use_device_path) + { + int64_t const dtype_bytes = static_cast(common::getDTypeSize(loraTypeFromActDtype(act_dtype))); + int64_t const capacity = num_tokens * static_cast(experts_per_token); + // Pass stream so a mid-capture resize (which would invalidate + // previously captured graphs) is rejected with a clear error + // rather than silently corrupting replay. + ensureLoraDeviceScratch(capacity, lora_max_low_rank, dtype_bytes, kDevicePathSplitKSlices, + /*has_gated=*/has_gated, stream); + + auto& dp = lora_params.device_path; + dp.enabled = true; + dp.in_hidden_size = hidden_size; + dp.max_lora_rank = lora_max_low_rank; + dp.dtype_bytes = dtype_bytes; + dp.splitk_slices = kDevicePathSplitKSlices; + dp.has_gated = has_gated; + // Populate the libtorch-bound GEMM dispatch entry point so + // runMoeLoraDeviceModule in moe_kernels.cu can call through + // it without dragging libtorch into libmoe_gemm_src.a. + dp.run = &moeLoraDeviceRunImpl; + populateLoraDevicePathModule(mFc1DeviceBuf, dp.fc1); + populateLoraDevicePathModule(mFc2DeviceBuf, dp.fc2); + if (has_gated) + { + populateLoraDevicePathModule(mGatedDeviceBuf, dp.gated); + } + + // Per-module dim_a/dim_b describe the LoRA adapter shape the + // pointer-expand kernel offsets into; per-module out_hidden_size + // describes the LoRA delta sink the problem-builder kernel writes + // into. The runner passes the output base (lora_fc1_result_ / + // lora_fc2_result_ / lora_gated_out) directly to + // runMoeLoraDeviceModule at the loraFC1/loraFC2 call sites so the + // GEMMs land where the downstream bias/reorder kernels expect. + // + // For fc1 (and gated): adapter A is [hidden, rank], B is [rank, inter]. + // For fc2: adapter A is [inter, rank], B is [rank, hidden]. + dp.fc1.dim_a = hidden_size; + dp.fc1.dim_b = inter_size; + dp.fc1.ranks_src_dev = mLoraExpandFC1RanksDevice.data_ptr(); + dp.fc1.ptrs_src_dev = mLoraExpandFC1WeightPtrsDevice.data_ptr(); + dp.fc1.out_hidden_size = inter_size; + + dp.fc2.dim_a = inter_size; + dp.fc2.dim_b = hidden_size; + dp.fc2.ranks_src_dev = mLoraExpandFC2RanksDevice.data_ptr(); + dp.fc2.ptrs_src_dev = mLoraExpandFC2WeightPtrsDevice.data_ptr(); + dp.fc2.out_hidden_size = hidden_size; + + if (has_gated) + { + dp.gated.dim_a = hidden_size; + dp.gated.dim_b = inter_size; + dp.gated.ranks_src_dev = mLoraExpandGatedRanksDevice.data_ptr(); + dp.gated.ptrs_src_dev = mLoraExpandGatedWeightPtrsDevice.data_ptr(); + dp.gated.out_hidden_size = inter_size; + } + + // Pinned-host max-problem-size hints used by cuda_graph_*_grouped_gemm + // for kernel selection. Values are upper bounds safe to fix at + // warmup time (M=1 since each problem is one row; N/K depend on + // module direction and max_lora_rank). + auto fill_max_problem = [](void* host_ptr, int m, int n, int k) + { + auto* coord = static_cast(host_ptr); + *coord = cutlass::gemm::GemmCoord(m, n, k); + }; + // In-GEMM: M=1, N=max_lora_rank, K=in_dim. Out-GEMM: M=1, N=out_dim, K=max_lora_rank. + fill_max_problem(dp.fc1.host_max_problem_in_pinned, 1, lora_max_low_rank, hidden_size); + fill_max_problem(dp.fc1.host_max_problem_out_pinned, 1, inter_size, lora_max_low_rank); + fill_max_problem(dp.fc2.host_max_problem_in_pinned, 1, lora_max_low_rank, inter_size); + fill_max_problem(dp.fc2.host_max_problem_out_pinned, 1, hidden_size, lora_max_low_rank); + if (has_gated) + { + fill_max_problem(dp.gated.host_max_problem_in_pinned, 1, lora_max_low_rank, hidden_size); + fill_max_problem(dp.gated.host_max_problem_out_pinned, 1, inter_size, lora_max_low_rank); + } + } + return lora_params; } diff --git a/cpp/tensorrt_llm/thop/moeUtilOp.cpp b/cpp/tensorrt_llm/thop/moeUtilOp.cpp index c11fe1703bf8..e5496a89cdb0 100644 --- a/cpp/tensorrt_llm/thop/moeUtilOp.cpp +++ b/cpp/tensorrt_llm/thop/moeUtilOp.cpp @@ -1,5 +1,5 @@ /* - * Copyright (c) 2022-2025, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2022-2026, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. @@ -48,7 +48,7 @@ void runPermute(void const* input_activations_void, void const* input_sf_void, i int* blocked_expert_counts_, int* blocked_expert_counts_cumsum_, int* blocked_row_to_unpermuted_row_, cutlass_kernels::MOEParallelismConfig parallelism_config, bool use_lora, kernels::LoraParams& lora_params, bool use_fp8_block_scaling, bool min_latency_mode, cutlass_kernels::MoeMinLatencyParams& min_latency_params, - cudaStream_t stream) + bool skip_data_expand, cudaStream_t stream) { TLLM_CHECK_WITH_INFO(experts_per_token * full_num_experts <= std::numeric_limits::max(), "experts_per_token * num_experts is too large"); @@ -79,14 +79,17 @@ void runPermute(void const* input_activations_void, void const* input_sf_void, i } sync_check_cuda_error(stream); - using ExpandedActivationsType = T; - float const* token_topk_unpermuted_scales = token_final_scales; - cutlass_kernels::expandInputRowsKernelLauncher(input_activations, - reinterpret_cast(permuted_data_), token_topk_unpermuted_scales, - permuted_token_final_scales_, permuted_row_to_unpermuted_row_, num_rows, hidden_size, experts_per_token, - num_experts_per_node, quant_params, /*use_per_expert_act_scale*/ false, expert_first_token_offset_, - /* fc1_fp4_act_scale_ */ nullptr, input_sf, true, /* prequant_scales */ nullptr, stream); - sync_check_cuda_error(stream); + if (!skip_data_expand) + { + using ExpandedActivationsType = T; + float const* token_topk_unpermuted_scales = token_final_scales; + cutlass_kernels::expandInputRowsKernelLauncher(input_activations, + reinterpret_cast(permuted_data_), token_topk_unpermuted_scales, + permuted_token_final_scales_, permuted_row_to_unpermuted_row_, num_rows, hidden_size, experts_per_token, + num_experts_per_node, quant_params, /*use_per_expert_act_scale*/ false, expert_first_token_offset_, + /* fc1_fp4_act_scale_ */ nullptr, input_sf, true, /* prequant_scales */ nullptr, stream); + sync_check_cuda_error(stream); + } } std::tuple moe_permute_op( @@ -95,7 +98,7 @@ std::tuple> quant_scales, torch::optional input_sf, int64_t const num_experts_on_rank, int64_t const tp_size, int64_t const tp_rank, int64_t const ep_size, int64_t const ep_rank, int64_t const cluster_size, - int64_t const cluster_rank, bool min_latency_mode, bool use_fp8_block_scaling) + int64_t const cluster_rank, bool min_latency_mode, bool use_fp8_block_scaling, bool skip_data_expand) { TORCH_CHECK(cluster_size == 1 && cluster_rank == 0, "smart_router is supported in min_latency mode"); TORCH_CHECK(min_latency_mode == false, "min_latency_mode is not supported now"); @@ -178,7 +181,7 @@ std::tuple(blocked_expert_counts_tensor.data_ptr()), static_cast(blocked_expert_counts_cumsum_tensor.data_ptr()), static_cast(blocked_row_to_unpermuted_row_tensor.data_ptr()), parallelism_config, /*use_lora*/ false, - lora_params, use_fp8_block_scaling, min_latency_mode, min_latency_params, stream); + lora_params, use_fp8_block_scaling, min_latency_mode, min_latency_params, skip_data_expand, stream); break; case torch::kBFloat16: runPermute<__nv_bfloat16>(input.const_data_ptr(), @@ -199,7 +202,7 @@ std::tuple(blocked_expert_counts_tensor.data_ptr()), static_cast(blocked_expert_counts_cumsum_tensor.data_ptr()), static_cast(blocked_row_to_unpermuted_row_tensor.data_ptr()), parallelism_config, /*use_lora*/ false, - lora_params, use_fp8_block_scaling, min_latency_mode, min_latency_params, stream); + lora_params, use_fp8_block_scaling, min_latency_mode, min_latency_params, skip_data_expand, stream); break; case torch::kHalf: runPermute(input.const_data_ptr(), input_sf.has_value() ? input_sf.value().const_data_ptr() : nullptr, @@ -219,7 +222,7 @@ std::tuple(blocked_expert_counts_tensor.data_ptr()), static_cast(blocked_expert_counts_cumsum_tensor.data_ptr()), static_cast(blocked_row_to_unpermuted_row_tensor.data_ptr()), parallelism_config, /*use_lora*/ false, - lora_params, use_fp8_block_scaling, min_latency_mode, min_latency_params, stream); + lora_params, use_fp8_block_scaling, min_latency_mode, min_latency_params, skip_data_expand, stream); break; default: throw std::invalid_argument( @@ -339,7 +342,7 @@ TORCH_LIBRARY_FRAGMENT(trtllm, m) "moe_permute_op(Tensor input, Tensor token_selected_experts, Tensor? token_final_scales, Tensor " "fc1_expert_weights, Tensor fc2_expert_weights, Tensor[]? quant_scales, Tensor? input_sf, int " "num_experts_on_rank, int tp_size, int tp_rank, int ep_size, int ep_rank, int cluster_size, int cluster_rank, " - "bool min_latency_mode, bool use_fp8_block_scaling)" + "bool min_latency_mode, bool use_fp8_block_scaling, bool skip_data_expand=False)" "-> (Tensor, Tensor, Tensor, Tensor, Tensor, Tensor)"); m.def( "moe_finalize_scale_op(Tensor gemm2_output, Tensor? biases, Tensor unpermuted_final_scales, Tensor " diff --git a/cpp/tensorrt_llm/thop/trtllmGenQKVProcessOp.cpp b/cpp/tensorrt_llm/thop/trtllmGenQKVProcessOp.cpp index b1401f8d4bec..9302e2a4978f 100644 --- a/cpp/tensorrt_llm/thop/trtllmGenQKVProcessOp.cpp +++ b/cpp/tensorrt_llm/thop/trtllmGenQKVProcessOp.cpp @@ -50,8 +50,6 @@ using tensorrt_llm::runtime::TorchUtils; namespace { -constexpr size_t kFlashinferTrtllmGenCounterWorkspaceSize = 8 * 1024 * 1024; - int64_t computeWindowLeft( int64_t const cyclicAttentionWindowSize, int64_t const maxKvLength, int64_t const attentionChunkSize) { @@ -81,22 +79,6 @@ cudaStream_t currentStreamFor(at::Tensor const& tensor) return at::cuda::getCurrentCUDAStream(tensor.get_device()).stream(); } -void zeroFlashinferTrtllmGenCounterWorkspaceAsync(at::Tensor const& workspace, cudaStream_t stream) -{ - // FlashInfer reserves the first 8 MiB of the trtllm-gen workspace for - // multi-CTA KV semaphores. The remaining scratch space is overwritten by - // the FMHA kernels and does not need to be cleared. - auto const workspaceBytes = static_cast(workspace.nbytes()); - auto const counterBytes = workspaceBytes < kFlashinferTrtllmGenCounterWorkspaceSize - ? workspaceBytes - : kFlashinferTrtllmGenCounterWorkspaceSize; - if (counterBytes == 0) - { - return; - } - check_cuda_error(cudaMemsetAsync(workspace.data_ptr(), 0, counterBytes, stream)); -} - struct WorkspaceAccessor { uint8_t* base{}; @@ -291,7 +273,7 @@ trtllmGenContextPreprocess(torch::Tensor qkv_input, torch::Tensor workspace, tor TORCH_CHECK(host_kv_cache_pool_mapping.has_value(), "host_kv_cache_pool_mapping is required."); TORCH_CHECK(kv_cache_block_offsets.has_value(), "kv_cache_block_offsets is required."); - bool const separateQKvOutput = paged_context_fmha; + bool const separateQKvOutput = paged_context_fmha || fp8_context_fmha; auto const qkvScalarType = qkv_input.scalar_type(); auto const qkvElementSize = static_cast(qkv_input.element_size()); auto const quantMode = tensorrt_llm::common::QuantMode(static_cast(kv_cache_quant_mode)); @@ -403,7 +385,7 @@ trtllmGenContextPreprocess(torch::Tensor qkv_input, torch::Tensor workspace, tor qkvParams.position_embedding_type = static_cast(position_embedding_type); qkvParams.position_shift_enabled = false; qkvParams.cache_type = cacheTypeFromQuantMode(quantMode); - qkvParams.separate_q_kv_output = paged_context_fmha; + qkvParams.separate_q_kv_output = separateQKvOutput; qkvParams.quantized_fp8_output = fp8_context_fmha; qkvParams.generation_phase = false; qkvParams.multi_processor_count = static_cast(multi_processor_count); @@ -454,8 +436,8 @@ trtllmGenContextPreprocess(torch::Tensor qkv_input, torch::Tensor workspace, tor qProcessed = qkv_input.slice(1, 0, num_heads * head_size).view({num_tokens, num_heads, head_size}); } - zeroFlashinferTrtllmGenCounterWorkspaceAsync(views.trtllmGenWorkspace, stream); - + // FlashInfer paged context launches trtllm-gen with multi-CTA-KV mode disabled, so it does not + // consume the counter slab reserved at the head of the workspace. auto const windowLeft = computeWindowLeft(cyclic_attention_window_size, max_past_kv_length, attention_chunk_size); return {qProcessed, kvPool, blockTables, kvScalePool, views.fmhaBmm1Scale, views.fmhaBmm2Scale, views.trtllmGenWorkspace, views.cuQSeqlens, views.cuKvSeqlens, input_seq_length, max_past_kv_length, @@ -481,6 +463,7 @@ void trtllmGenContextPostprocess(torch::Tensor qkv_input, torch::Tensor workspac auto const qkvScalarType = qkv_input.scalar_type(); auto const qkvElementSize = static_cast(qkv_input.element_size()); auto const quantMode = tensorrt_llm::common::QuantMode(static_cast(kv_cache_quant_mode)); + bool const separateQKvOutput = paged_context_fmha || fp8_context_fmha; auto const ptrs = [&] { auto const layout = TrtllmAttentionWorkspaceManager::buildContextLayout( @@ -548,7 +531,7 @@ void trtllmGenContextPostprocess(torch::Tensor qkv_input, torch::Tensor workspac qkvParams.position_embedding_type = static_cast(position_embedding_type); qkvParams.position_shift_enabled = false; qkvParams.cache_type = cacheTypeFromQuantMode(quantMode); - qkvParams.separate_q_kv_output = paged_context_fmha; + qkvParams.separate_q_kv_output = separateQKvOutput; qkvParams.quantized_fp8_output = fp8_context_fmha; qkvParams.generation_phase = false; qkvParams.multi_processor_count = static_cast(multi_processor_count); @@ -767,7 +750,6 @@ trtllmGenGenerationPreprocess(torch::Tensor qkv_input, torch::Tensor workspace, } auto qProcessed = views.qBuf.view({num_tokens, num_heads, head_size}); - zeroFlashinferTrtllmGenCounterWorkspaceAsync(views.trtllmGenWorkspace, stream); auto const windowLeft = computeWindowLeft(cyclic_attention_window_size, max_past_kv_length, attention_chunk_size); return {qProcessed, kvPool, blockTables, kvScalePool, views.bmm1Scale, views.bmm2Scale, views.trtllmGenWorkspace, diff --git a/cpp/tensorrt_llm/thop/ulyssesPermuteScatterOp.cpp b/cpp/tensorrt_llm/thop/ulyssesPermuteScatterOp.cpp new file mode 100644 index 000000000000..5637b49a9a73 --- /dev/null +++ b/cpp/tensorrt_llm/thop/ulyssesPermuteScatterOp.cpp @@ -0,0 +1,104 @@ +/* + * Copyright (c) 2022-2026, NVIDIA CORPORATION. All rights reserved. + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#include "tensorrt_llm/kernels/ulyssesPermuteScatterKernel.h" +#include "tensorrt_llm/thop/thUtils.h" + +#include +#include + +TRTLLM_NAMESPACE_BEGIN + +namespace torch_ext +{ + +// Standalone Python entry point for ulyssesPermuteScatterKernel — used by +// unit tests. The production caller is the Ulysses async A2A path in +// alltoallOp.cpp, which combines this kernel with IPC writes + an LSA +// barrier; that whole sequence is multi-rank and not amenable to a +// single-GPU pytest. By exposing just the kernel, we can validate the +// permute+scatter layout transform independently. +// +// Layout: +// input : bf16 [B, S_local, H, D] contiguous +// send_buf : bf16 [P, B, S_local, H/P, D] contiguous +// recv_buf : bf16 [P, B, S_local, H/P, D] contiguous +// For each (b, s, h, d): +// peer = h // (H/P) +// h_local = h % (H/P) +// dst = (recv_buf if peer == my_rank else send_buf) +// slot = peer // applies to both branches +// dst[slot, b, s, h_local, d] = input[b, s, h, d] +void ulysses_permute_scatter(torch::Tensor& input, // [B, S_local, H, D] + torch::Tensor& send_buf, // [P, B, S_local, H/P, D] + torch::Tensor& recv_buf, // [P, B, S_local, H/P, D] + int64_t my_rank, int64_t P) +{ + TORCH_CHECK(input.dim() == 4, "input must be 4D [B, S_local, H, D]"); + TORCH_CHECK(send_buf.dim() == 5 && recv_buf.dim() == 5, "send_buf / recv_buf must be 5D [P, B, S_local, H/P, D]"); + CHECK_INPUT(input, torch::kBFloat16); + CHECK_INPUT(send_buf, torch::kBFloat16); + CHECK_INPUT(recv_buf, torch::kBFloat16); + + // Validate P first: P=0 would crash on `H % P` below (UB; SIGFPE on x86) + // and on `my_rank < P` after `0 <= my_rank` trivially passes. + TORCH_CHECK(P > 0, "P (world_size) must be positive"); + + int64_t const B = input.size(0); + int64_t const S_local = input.size(1); + int64_t const H = input.size(2); + int64_t const D = input.size(3); + TORCH_CHECK(H % P == 0, "H must be divisible by P"); + TORCH_CHECK(D % 8 == 0, "D must be divisible by 8 (uint4 vec)"); + int64_t const H_local = H / P; + TORCH_CHECK(send_buf.size(0) == P && send_buf.size(1) == B && send_buf.size(2) == S_local + && send_buf.size(3) == H_local && send_buf.size(4) == D, + "send_buf shape mismatch"); + TORCH_CHECK(recv_buf.size(0) == P && recv_buf.size(1) == B && recv_buf.size(2) == S_local + && recv_buf.size(3) == H_local && recv_buf.size(4) == D, + "recv_buf shape mismatch"); + TORCH_CHECK(0 <= my_rank && my_rank < P, "my_rank out of range"); + + // Empty-tensor no-op: B=0 or S_local=0 produces zero grid extent in the + // kernel launcher (undefined cuLaunchKernel behavior across CUDA versions). + // Shape consistency between input/send_buf/recv_buf was already enforced + // above, so empty input implies empty buffers — nothing to write. + if (input.numel() == 0) + { + return; + } + + auto stream = at::cuda::getCurrentCUDAStream(); + tensorrt_llm::kernels::launchUlyssesPermuteScatter(input.data_ptr(), send_buf.data_ptr(), recv_buf.data_ptr(), + static_cast(my_rank), static_cast(B), static_cast(S_local), static_cast(H), + static_cast(D), static_cast(P), stream); +} + +TORCH_LIBRARY_FRAGMENT(trtllm, m) +{ + m.def( + "ulysses_permute_scatter(Tensor(a!) input, Tensor(b!) send_buf, Tensor(c!) recv_buf, " + "int my_rank, int P) -> ()"); +} + +TORCH_LIBRARY_IMPL(trtllm, CUDA, m) +{ + m.impl("ulysses_permute_scatter", &ulysses_permute_scatter); +} + +} // namespace torch_ext + +TRTLLM_NAMESPACE_END diff --git a/cpp/tensorrt_llm/thop/ulyssesPostUnscatterOp.cpp b/cpp/tensorrt_llm/thop/ulyssesPostUnscatterOp.cpp new file mode 100644 index 000000000000..9d45b4f0b119 --- /dev/null +++ b/cpp/tensorrt_llm/thop/ulyssesPostUnscatterOp.cpp @@ -0,0 +1,120 @@ +/* + * Copyright (c) 2022-2026, NVIDIA CORPORATION. All rights reserved. + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#include "tensorrt_llm/kernels/ulyssesPostUnscatterKernel.h" +#include "tensorrt_llm/thop/thUtils.h" + +#include +#include + +TRTLLM_NAMESPACE_BEGIN + +namespace torch_ext +{ + +// Post-Ulysses A2A unscatter: take Q/K/V tensors of shape [P, B, Sp, H, D] +// (output of the head-dim -> seq-dim all-to-all) and produce SDPA-ready Q/K/V. +// The kernel ALWAYS writes NHD-contig storage [B, P*Sp, H, D]. The returned +// tensor shape depends on ``layout``: +// layout=0 (HND) → returns transpose-view [B, H, P*Sp, D] +// (HND-shape, NHD-stride, NON-contig — mirrors the +// `q.transpose(1, 2)` result in the sync `_forward_unfused` +// path, which lets cudnn SDPA preserve NHD-stride through +// its output and collapses the downstream +// `_output_a2a.transpose(1, 2).contiguous()` to a no-op) +// layout=1 (NHD) → returns storage as-is [B, P*Sp, H, D] (NHD contig) +// Replaces the eager chain +// t.permute(1, 0, 2, 3, 4).reshape(B, P * Sp, H, D).contiguous() // NHD +// [.transpose(1, 2)] // HND: stride view only +// for Q, K, V in one kernel launch. +std::tuple ulysses_post_unscatter_qkv( + torch::Tensor& q_in, // [P, B, Sp, H, D] + torch::Tensor& k_in, // [P, B, Sp, H, D] + torch::Tensor& v_in, // [P, B, Sp, H, D] + int64_t layout) // 0 = HND, 1 = NHD +{ + TORCH_CHECK(q_in.dim() == 5 && k_in.dim() == 5 && v_in.dim() == 5, + "ulysses_post_unscatter_qkv expects 5D tensors [P, B, Sp, H, D]"); + TORCH_CHECK(q_in.sizes() == k_in.sizes() && q_in.sizes() == v_in.sizes(), "Q/K/V must share the same shape"); + TORCH_CHECK(layout == 0 || layout == 1, "layout must be 0 (HND) or 1 (NHD), got ", layout); + + CHECK_INPUT(q_in, torch::kBFloat16); + CHECK_INPUT(k_in, torch::kBFloat16); + CHECK_INPUT(v_in, torch::kBFloat16); + + // D % 8 enforced here at op boundary (mirrors sibling ulysses_permute_scatter). + // Without this, torch::empty allocates the three output tensors before the + // kernel launcher's TLLM_CHECK_WITH_INFO fires, producing a less-actionable + // error path. Vec width is 8 elements for bf16 (16-byte vectorized stores). + TORCH_CHECK(q_in.size(-1) % 8 == 0, "D (last dim) must be divisible by 8 (bf16 vec=8)"); + + int64_t const P = q_in.size(0); + int64_t const B = q_in.size(1); + int64_t const Sp = q_in.size(2); + int64_t const H = q_in.size(3); + int64_t const D = q_in.size(4); + + bool const is_hnd = (layout == 0); + auto opts = q_in.options(); + // Always allocate NHD-contig storage [B, P*Sp, H, D]. + auto const storage_shape = std::vector{B, P * Sp, H, D}; + auto q_out = torch::empty(storage_shape, opts); + auto k_out = torch::empty(storage_shape, opts); + auto v_out = torch::empty(storage_shape, opts); + + // Empty-tensor no-op: P=0/B=0/Sp=0 produces zero grid extent in the + // kernel launcher (undefined cuLaunchKernel behavior across CUDA versions). + // The three output tensors above are already empty-shaped via P*Sp=0 or B=0, + // so returning them directly preserves the output-shape contract. + if (q_in.numel() == 0) + { + if (is_hnd) + { + return std::make_tuple(q_out.transpose(1, 2), k_out.transpose(1, 2), v_out.transpose(1, 2)); + } + return std::make_tuple(q_out, k_out, v_out); + } + + auto stream = at::cuda::getCurrentCUDAStream(); + tensorrt_llm::kernels::launchUlyssesPostUnscatter(q_in.data_ptr(), k_in.data_ptr(), v_in.data_ptr(), + q_out.data_ptr(), k_out.data_ptr(), v_out.data_ptr(), static_cast(P), static_cast(B), + static_cast(Sp), static_cast(H), static_cast(D), stream); + + // HND callers get a transpose-view of the NHD storage (zero-copy stride + // reinterpretation). NHD callers get the storage as-is. + if (is_hnd) + { + return std::make_tuple(q_out.transpose(1, 2), k_out.transpose(1, 2), v_out.transpose(1, 2)); + } + return std::make_tuple(q_out, k_out, v_out); +} + +TORCH_LIBRARY_FRAGMENT(trtllm, m) +{ + // layout: 0 = HND [B, H, P*Sp, D], 1 = NHD [B, P*Sp, H, D]. Default 0 keeps + // backward compatibility with the original HND-only callers. + m.def( + "ulysses_post_unscatter_qkv(Tensor q_in, Tensor k_in, Tensor v_in, int layout=0) -> (Tensor, Tensor, Tensor)"); +} + +TORCH_LIBRARY_IMPL(trtllm, CUDA, m) +{ + m.impl("ulysses_post_unscatter_qkv", &ulysses_post_unscatter_qkv); +} + +} // namespace torch_ext + +TRTLLM_NAMESPACE_END diff --git a/cpp/tests/unit_tests/batch_manager/kvCacheManagerTest.cpp b/cpp/tests/unit_tests/batch_manager/kvCacheManagerTest.cpp index 8b15651e2c97..a5d566f3b408 100644 --- a/cpp/tests/unit_tests/batch_manager/kvCacheManagerTest.cpp +++ b/cpp/tests/unit_tests/batch_manager/kvCacheManagerTest.cpp @@ -4483,6 +4483,216 @@ TEST_F(KVCacheManagerTest, GetPriorityByBlockId) EXPECT_EQ(invalidOutOfRange, KvCacheRetentionConfig::kDefaultRetentionPriority); } +TEST_F(KVCacheManagerTest, CommitAndGetBlockHashesForRequest) +{ + // Validates KVCacheManager::commitAndGetBlockHashesForRequest (the hash chain exposed to + // the KV cache connector): + // * a request with fewer than one full block yields an empty chain, + // * one hash is returned per *full* block; a partial trailing block is clipped, + // * the chain matches BlockKeyHasher applied block-by-block to the request's tokens, + // * a block that fills during generation is committed in the same step (the front-running + // semantic exercising the "set" branch, not just the already-full lookup branch), + // * repeated calls are idempotent (already-full blocks become pure lookups), and + // * the committed hashes equal the hashes the KV cache Stored events later emit. + auto constexpr numLayers = 2; + auto constexpr numKvHeads = 2; + auto constexpr sizePerHead = 16; + auto constexpr tokensPerBlock = 4; + auto constexpr numBlocks = 8; + auto constexpr maxAttentionWindow = 32; + auto constexpr maxNumSequences = 4; + auto constexpr beamWidth = 1; + auto constexpr beamIdx = 0; + auto constexpr dtype = nvinfer1::DataType::kHALF; + auto const stream = std::make_shared(); + SizeType32 constexpr maxNewTokens = 8; + tr::SamplingConfig const samplingConfig{beamWidth}; + bool constexpr isStreaming{false}; + + auto const blocksPerWindow = BlocksPerWindow{{maxAttentionWindow, {numBlocks, 0}}}; + + KVCacheManager kvCacheManager(numLayers, numKvHeads, sizePerHead, tokensPerBlock, blocksPerWindow, maxNumSequences, + beamWidth, std::vector{maxAttentionWindow}, dtype, 0, stream, maxAttentionWindow, + maxAttentionWindow, /*enableBlockReuse=*/true, CacheType::kSELF, std::nullopt, + std::make_unique(1024)); + kvCacheManager.allocatePools(false); + (void) getEvents(kvCacheManager); // Drain the Created event. + + // Ground truth: chain BlockKeyHasher over the request's full token blocks, exactly as the + // production storeBlocks path (and KV cache events) would for a freshly-allocated sequence. + auto const expectedChain = [&](LlmRequest const& req) + { + auto const& uniqueTokens = req.getUniqueTokens(beamIdx); + auto const numFull = static_cast(uniqueTokens.size()) / tokensPerBlock; + std::vector expected; + std::size_t parentHash = 0; + for (SizeType32 b = 0; b < numFull; ++b) + { + VecUniqueTokens slice( + uniqueTokens.begin() + b * tokensPerBlock, uniqueTokens.begin() + (b + 1) * tokensPerBlock); + BlockKey const blockKey(/*usesExtraIds=*/false, /*loraTaskId=*/std::nullopt, std::move(slice)); + auto const hash = BlockKeyHasher::hash(blockKey, parentHash); + expected.push_back(static_cast(hash)); + parentHash = hash; + } + return expected; + }; + + // Case 1: fewer than one full block -> empty chain. + { + auto inputTokens = std::make_shared(VecTokens{0, 1}); + auto llmRequest = std::make_shared(0, maxNewTokens, inputTokens, samplingConfig, isStreaming); + kvCacheManager.addSequenceBatch( + {{{0, static_cast(inputTokens->size()), beamWidth}}}, {std::ref(*llmRequest)}); + EXPECT_TRUE(kvCacheManager.commitAndGetBlockHashesForRequest(*llmRequest, maxAttentionWindow).empty()); + tensorrt_llm::testing::KvCacheManagerTestUtil::simulatePrefillCompletion(*llmRequest); + (void) kvCacheManager.removeSequence(0, llmRequest); + } + + // Case 2: 6 context tokens -> 1 full block (committed at allocation, lookup branch) + a + // partial trailing block. The partial 2nd block must be clipped, so only one hash is returned. + auto inputTokens = std::make_shared(VecTokens{10, 11, 12, 13, 14, 15}); + auto llmRequest = std::make_shared(1, maxNewTokens, inputTokens, samplingConfig, isStreaming); + kvCacheManager.addSequenceBatch( + {{{1, static_cast(inputTokens->size()), beamWidth}}}, {std::ref(*llmRequest)}); + tensorrt_llm::testing::KvCacheManagerTestUtil::simulatePrefillCompletion(*llmRequest); + + auto contextHashes = kvCacheManager.commitAndGetBlockHashesForRequest(*llmRequest, maxAttentionWindow); + auto contextExpected = expectedChain(*llmRequest); + ASSERT_EQ(contextExpected.size(), 1u); // Partial 2nd block must be clipped. + EXPECT_EQ(contextHashes, contextExpected); + + // Generate tokens 16, 17, 18 so the 2nd block (tokens 14..17) fills *during generation*. It + // was allocated partial, so commitAndGetBlockHashesForRequest must take the "set" branch: + // build the full BlockKey, mark the block full, and hash it chained from the first block. + // Token 18 starts a 3rd (partial) block so that block 2 is no longer the sequence's trailing + // block: storeBlocks drops the final unusable token, and we want block 2 keyed with all four + // tokens at store time so its stored hash matches the committed one (see the event check). + for (auto const token : {16, 17, 18}) + { + llmRequest->addNewToken(token, beamIdx); + kvCacheManager.addToken(1); + } + + auto hashes = kvCacheManager.commitAndGetBlockHashesForRequest(*llmRequest, maxAttentionWindow); + auto expected = expectedChain(*llmRequest); + ASSERT_EQ(expected.size(), 2u); + EXPECT_EQ(hashes, expected); + // The first block's hash is unchanged from the context-only call (front-running only appends). + EXPECT_EQ(hashes.front(), contextHashes.front()); + + // Idempotent: a repeated call (now pure lookups on full blocks) returns the same chain. + EXPECT_EQ(kvCacheManager.commitAndGetBlockHashesForRequest(*llmRequest, maxAttentionWindow), hashes); + + // The committed hashes must match the hashes the KV cache Stored events emit for the same + // blocks once the sequence is released and its full blocks are stored for reuse. This holds + // for blocks that are not the sequence's trailing block (storeBlocks drops the final unusable + // token, which would otherwise shorten the trailing block's key relative to the committed one). + (void) getEvents(kvCacheManager); // Drain pending events before storing. + tensorrt_llm::testing::KvCacheManagerTestUtil::simulatePrefillCompletion(*llmRequest); + (void) kvCacheManager.removeSequence(1, llmRequest); + + std::set storedHashes; + for (auto const& event : getEvents(kvCacheManager)) + { + if (std::holds_alternative(event.data)) + { + for (auto const& block : std::get(event.data).blocks) + { + storedHashes.insert(static_cast(block.blockHash)); + } + } + } + for (auto const hash : hashes) + { + EXPECT_GT(storedHashes.count(hash), 0u) << "committed hash not emitted by a Stored event"; + } +} + +TEST_F(KVCacheManagerTest, CommitAndGetBlockHashesFrontRunsTrailingFullBlock) +{ + // Regression guard for the front-running contract: when a block fills *exactly* on a block + // boundary so that it is the sequence's trailing block (no partial block follows it), + // commitAndGetBlockHashesForRequest must still commit and return that block's hash in the + // same step. The sibling test CommitAndGetBlockHashesForRequest only covers a just-filled + // block that is followed by a partial block, so it would still pass if the implementation + // switched to getUsableUniqueTokenCountForReuse (which subtracts the final unmaterialized + // token and would drop the trailing full block). This test pins the exact-boundary case so + // that regression fails loudly: with tokensPerBlock=4 and 8 tokens, the usable-count path + // would yield (8 - 1) / 4 = 1 block, whereas the correct front-running chain has 2. + auto constexpr numLayers = 2; + auto constexpr numKvHeads = 2; + auto constexpr sizePerHead = 16; + auto constexpr tokensPerBlock = 4; + auto constexpr numBlocks = 8; + auto constexpr maxAttentionWindow = 32; + auto constexpr maxNumSequences = 4; + auto constexpr beamWidth = 1; + auto constexpr beamIdx = 0; + auto constexpr dtype = nvinfer1::DataType::kHALF; + auto const stream = std::make_shared(); + SizeType32 constexpr maxNewTokens = 8; + tr::SamplingConfig const samplingConfig{beamWidth}; + bool constexpr isStreaming{false}; + + auto const blocksPerWindow = BlocksPerWindow{{maxAttentionWindow, {numBlocks, 0}}}; + + KVCacheManager kvCacheManager(numLayers, numKvHeads, sizePerHead, tokensPerBlock, blocksPerWindow, maxNumSequences, + beamWidth, std::vector{maxAttentionWindow}, dtype, 0, stream, maxAttentionWindow, + maxAttentionWindow, /*enableBlockReuse=*/true, CacheType::kSELF, std::nullopt); + kvCacheManager.allocatePools(false); + + // Chain BlockKeyHasher over the request's full token blocks (keyed by uniqueTokens.size()), + // mirroring the front-running chain the connector expects. + auto const expectedChain = [&](LlmRequest const& req) + { + auto const& uniqueTokens = req.getUniqueTokens(beamIdx); + auto const numFull = static_cast(uniqueTokens.size()) / tokensPerBlock; + std::vector expected; + std::size_t parentHash = 0; + for (SizeType32 b = 0; b < numFull; ++b) + { + VecUniqueTokens slice( + uniqueTokens.begin() + b * tokensPerBlock, uniqueTokens.begin() + (b + 1) * tokensPerBlock); + BlockKey const blockKey(/*usesExtraIds=*/false, /*loraTaskId=*/std::nullopt, std::move(slice)); + auto const hash = BlockKeyHasher::hash(blockKey, parentHash); + expected.push_back(static_cast(hash)); + parentHash = hash; + } + return expected; + }; + + // 6 context tokens -> block 0 full (10..13), block 1 partial (14, 15). + auto inputTokens = std::make_shared(VecTokens{10, 11, 12, 13, 14, 15}); + auto llmRequest = std::make_shared(0, maxNewTokens, inputTokens, samplingConfig, isStreaming); + kvCacheManager.addSequenceBatch( + {{{0, static_cast(inputTokens->size()), beamWidth}}}, {std::ref(*llmRequest)}); + tensorrt_llm::testing::KvCacheManagerTestUtil::simulatePrefillCompletion(*llmRequest); + + auto contextHashes = kvCacheManager.commitAndGetBlockHashesForRequest(*llmRequest, maxAttentionWindow); + ASSERT_EQ(contextHashes.size(), 1u); // block 1 is still partial here. + + // Generate exactly tokens 16, 17 so block 1 (tokens 14..17) fills and becomes the *trailing* + // block -- no further (partial) block is started. The just-filled trailing block must be + // committed via the "set" branch in this same step. + for (auto const token : {16, 17}) + { + llmRequest->addNewToken(token, beamIdx); + kvCacheManager.addToken(0); + } + + auto hashes = kvCacheManager.commitAndGetBlockHashesForRequest(*llmRequest, maxAttentionWindow); + auto expected = expectedChain(*llmRequest); + ASSERT_EQ(expected.size(), 2u); + // The crux: 2 hashes, not 1. A usable-count implementation would drop the trailing block. + EXPECT_EQ(hashes, expected); + // Front-running only appends; block 0's hash is unchanged from the context-only call. + EXPECT_EQ(hashes.front(), contextHashes.front()); + + tensorrt_llm::testing::KvCacheManagerTestUtil::simulatePrefillCompletion(*llmRequest); + (void) kvCacheManager.removeSequence(0, llmRequest); +} + TEST(KVCacheManagerHelpersTest, ChopVectorIntoBlocksBasicNoPartial) { using namespace tensorrt_llm::batch_manager::kv_cache_manager; diff --git a/cpp/tests/unit_tests/kernels/CMakeLists.txt b/cpp/tests/unit_tests/kernels/CMakeLists.txt index 95d33e421050..fbef4ed88c2a 100644 --- a/cpp/tests/unit_tests/kernels/CMakeLists.txt +++ b/cpp/tests/unit_tests/kernels/CMakeLists.txt @@ -95,6 +95,11 @@ target_link_libraries(routingKernelsTest PRIVATE Python3::Python) add_gtest(moeLoadBalanceKernelTest moeLoadBalanceKernelTest.cpp) +if(USING_OSS_CUTLASS_MOE_GEMM) + add_gtest(moeLoraPointerExpandTest moeLoraPointerExpandTest.cu) + add_gtest(moeLoraProblemBuilderTest moeLoraProblemBuilderTest.cu) +endif() + add_gtest(eaglePackDataTest eaglePackDataTest.cpp) add_gtest(sparseKvCacheTest sparseKvCacheTest.cu) add_gtest(prepareCustomMaskTest prepareCustomMaskTest.cpp) diff --git a/cpp/tests/unit_tests/kernels/moeLoraPointerExpandTest.cu b/cpp/tests/unit_tests/kernels/moeLoraPointerExpandTest.cu new file mode 100644 index 000000000000..78f61d424a77 --- /dev/null +++ b/cpp/tests/unit_tests/kernels/moeLoraPointerExpandTest.cu @@ -0,0 +1,420 @@ +/* + * Copyright (c) 2026, NVIDIA CORPORATION. All rights reserved. + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#include "tensorrt_llm/common/cudaUtils.h" +#include "tensorrt_llm/kernels/cutlass_kernels/include/moe_lora_pointer_expand.h" + +#include +#include +#include + +namespace +{ + +using ::tensorrt_llm::kernels::cutlass_kernels::launchMoeLoraPointerExpand; +using ::tensorrt_llm::kernels::cutlass_kernels::MoeLoraExpandModule; + +// Host-side reference reproducing the per-permuted-row pointer arithmetic +// from CutlassMoeFCRunner::setupLoraWorkspace. Same control flow as the +// device kernel; used only as ground truth for parity checks. +struct RefModule +{ + std::vector ranks_src; + std::vector ptrs_src; + int64_t dim_a; + int64_t dim_b; + std::vector ranks_out; + std::vector ptrs_out; +}; + +void cpuExpand(std::vector const& permuted_rows, std::vector const& expert_first_token_offset, + int32_t num_experts_per_node, int32_t start_expert, int64_t num_rows, int64_t expanded_num_rows, + int64_t lora_dtype_bytes, RefModule& fc1, RefModule& fc2, RefModule* gated) +{ + auto expand_one = [&](RefModule& mod, int64_t i, int32_t source_index, int64_t weight_index) + { + int32_t const rank = mod.ranks_src[source_index]; + int64_t const a_stride = weight_index * mod.dim_a * rank * lora_dtype_bytes; + int64_t const b_stride = weight_index * mod.dim_b * rank * lora_dtype_bytes; + mod.ptrs_out[2 * i + 0] = mod.ptrs_src[2 * source_index + 0] + a_stride; + mod.ptrs_out[2 * i + 1] = mod.ptrs_src[2 * source_index + 1] + b_stride; + mod.ranks_out[i] = rank; + }; + + fc1.ranks_out.assign(expanded_num_rows, 0); + fc1.ptrs_out.assign(expanded_num_rows * 2, 0); + fc2.ranks_out.assign(expanded_num_rows, 0); + fc2.ptrs_out.assign(expanded_num_rows * 2, 0); + if (gated) + { + gated->ranks_out.assign(expanded_num_rows, 0); + gated->ptrs_out.assign(expanded_num_rows * 2, 0); + } + + for (int32_t expert_idx = 0; expert_idx < num_experts_per_node; ++expert_idx) + { + int64_t const weight_index = static_cast(expert_idx) + start_expert; + for (int64_t i = expert_first_token_offset[expert_idx]; i < expert_first_token_offset[expert_idx + 1]; ++i) + { + int32_t const source_index = static_cast(permuted_rows[i] % num_rows); + expand_one(fc1, i, source_index, weight_index); + expand_one(fc2, i, source_index, weight_index); + if (gated) + { + expand_one(*gated, i, source_index, weight_index); + } + } + } +} + +template +T* deviceUpload(std::vector const& host) +{ + T* dev = nullptr; + auto const bytes = host.size() * sizeof(T); + if (bytes > 0) + { + TLLM_CUDA_CHECK(cudaMalloc(&dev, bytes)); + TLLM_CUDA_CHECK(cudaMemcpy(dev, host.data(), bytes, cudaMemcpyHostToDevice)); + } + return dev; +} + +template +T* deviceAllocZero(size_t count) +{ + T* dev = nullptr; + auto const bytes = count * sizeof(T); + TLLM_CUDA_CHECK(cudaMalloc(&dev, bytes)); + TLLM_CUDA_CHECK(cudaMemset(dev, 0, bytes)); + return dev; +} + +// Like deviceAllocZero but pre-fills with a non-zero byte pattern. Simulates +// reused scratch holding stale values, so tests can verify the kernel actively +// zeroes ghost rows. +template +T* deviceAllocFilled(size_t count, int byte_pattern) +{ + T* dev = nullptr; + auto const bytes = count * sizeof(T); + TLLM_CUDA_CHECK(cudaMalloc(&dev, bytes)); + TLLM_CUDA_CHECK(cudaMemset(dev, byte_pattern, bytes)); + return dev; +} + +template +void deviceDownload(T* dev, std::vector& host) +{ + if (host.empty()) + { + return; + } + TLLM_CUDA_CHECK(cudaMemcpy(host.data(), dev, host.size() * sizeof(T), cudaMemcpyDeviceToHost)); +} + +class MoeLoraPointerExpandTest : public ::testing::Test +{ +protected: + void SetUp() override + { + TLLM_CUDA_CHECK(cudaStreamCreate(&mStream)); + } + + void TearDown() override + { + for (auto* p : mAllocations) + { + (void) cudaFree(p); + } + (void) cudaStreamDestroy(mStream); + } + + template + T* upload(std::vector const& host) + { + T* p = deviceUpload(host); + if (p != nullptr) + { + mAllocations.push_back(p); + } + return p; + } + + template + T* allocZero(size_t count) + { + T* p = deviceAllocZero(count); + mAllocations.push_back(p); + return p; + } + + template + T* allocFilled(size_t count, int byte_pattern) + { + T* p = deviceAllocFilled(count, byte_pattern); + mAllocations.push_back(p); + return p; + } + + // Run the kernel against ref and assert the device outputs match. When + // prefill_garbage is true the output buffers start with a non-zero pattern, + // forcing the kernel to explicitly zero ghost rows for the comparison to + // pass. + void runAndCompare(std::vector const& permuted_rows, std::vector const& expert_first_token_offset, + int32_t num_experts_per_node, int32_t start_expert, int64_t num_rows, int64_t expanded_num_rows, + int64_t lora_dtype_bytes, RefModule& fc1_ref, RefModule& fc2_ref, RefModule* gated_ref, + bool prefill_garbage = false) + { + cpuExpand(permuted_rows, expert_first_token_offset, num_experts_per_node, start_expert, num_rows, + expanded_num_rows, lora_dtype_bytes, fc1_ref, fc2_ref, gated_ref); + + auto* permuted_rows_dev = upload(permuted_rows); + auto* offsets_dev = upload(expert_first_token_offset); + + auto build_module = [&](RefModule const& r) + { + MoeLoraExpandModule m; + m.ranks_src = upload(r.ranks_src); + m.ptrs_src = upload(r.ptrs_src); + m.dim_a = r.dim_a; + m.dim_b = r.dim_b; + m.ranks_out = prefill_garbage ? allocFilled(expanded_num_rows, 0x7F) + : allocZero(expanded_num_rows); + m.ptrs_out = prefill_garbage ? allocFilled(expanded_num_rows * 2, 0x7F) + : allocZero(expanded_num_rows * 2); + return m; + }; + + MoeLoraExpandModule fc1_dev = build_module(fc1_ref); + MoeLoraExpandModule fc2_dev = build_module(fc2_ref); + MoeLoraExpandModule gated_dev{}; + MoeLoraExpandModule const* gated_dev_ptr = nullptr; + if (gated_ref != nullptr) + { + gated_dev = build_module(*gated_ref); + gated_dev_ptr = &gated_dev; + } + + launchMoeLoraPointerExpand(permuted_rows_dev, offsets_dev, num_experts_per_node, start_expert, num_rows, + expanded_num_rows, lora_dtype_bytes, fc1_dev, fc2_dev, gated_dev_ptr, mStream); + TLLM_CUDA_CHECK(cudaStreamSynchronize(mStream)); + + // Compare per-module. + auto compare = [&](RefModule const& ref_mod, MoeLoraExpandModule const& dev_mod, char const* name) + { + std::vector host_ranks(expanded_num_rows, 0); + std::vector host_ptrs(expanded_num_rows * 2, 0); + deviceDownload(dev_mod.ranks_out, host_ranks); + deviceDownload(dev_mod.ptrs_out, host_ptrs); + for (int64_t i = 0; i < expanded_num_rows; ++i) + { + EXPECT_EQ(host_ranks[i], ref_mod.ranks_out[i]) << name << " rank mismatch at i=" << i; + EXPECT_EQ(host_ptrs[2 * i + 0], ref_mod.ptrs_out[2 * i + 0]) << name << " A ptr mismatch at i=" << i; + EXPECT_EQ(host_ptrs[2 * i + 1], ref_mod.ptrs_out[2 * i + 1]) << name << " B ptr mismatch at i=" << i; + } + }; + + compare(fc1_ref, fc1_dev, "fc1"); + compare(fc2_ref, fc2_dev, "fc2"); + if (gated_ref != nullptr) + { + compare(*gated_ref, gated_dev, "gated"); + } + } + + cudaStream_t mStream{}; + std::vector mAllocations; +}; + +// Helper: build a "fake but distinct" pointer for source token s of module +// tag. Encoding the (tag, s, side) lets the test cheaply verify the +// kernel reads the right slot of ptrs_src. The high bits guarantee +// (ptr + per-expert-byte-offset) doesn't alias another (tag, s, side). +int64_t fakePtr(int tag, int32_t s, int side) +{ + return (static_cast(tag) << 56) | (static_cast(side) << 48) | (static_cast(s + 1) << 32); +} + +// Smallest non-trivial case: 4 source tokens, 3 experts, top_k=2 so the +// permuted batch has 8 rows. Per-expert, no gated. +TEST_F(MoeLoraPointerExpandTest, PerExpertNoGated) +{ + int32_t const num_experts_per_node = 3; + int32_t const start_expert = 0; + int64_t const num_rows = 4; + int64_t const expanded_num_rows = 8; // top_k=2 + + // (expert_id assignment is irrelevant to the kernel; we only need + // expert_first_token_offset for the lookup and permuted_rows for the + // source-index reverse.) + std::vector permuted_rows = {0, 4, 1, 5, 2, 6, 3, 7}; + std::vector expert_first_token_offset = {0, 3, 5, 8}; + + RefModule fc1{}; + fc1.dim_a = 16; // "hidden_size" + fc1.dim_b = 32; // "inter_size" + fc1.ranks_src = {2, 0, 4, 1}; + fc1.ptrs_src.resize(num_rows * 2); + for (int32_t s = 0; s < num_rows; ++s) + { + fc1.ptrs_src[2 * s + 0] = fakePtr(/*tag=*/1, s, /*side=*/0); + fc1.ptrs_src[2 * s + 1] = fakePtr(/*tag=*/1, s, /*side=*/1); + } + + RefModule fc2{}; + fc2.dim_a = 32; + fc2.dim_b = 16; + fc2.ranks_src = {1, 2, 0, 3}; + fc2.ptrs_src.resize(num_rows * 2); + for (int32_t s = 0; s < num_rows; ++s) + { + fc2.ptrs_src[2 * s + 0] = fakePtr(/*tag=*/2, s, /*side=*/0); + fc2.ptrs_src[2 * s + 1] = fakePtr(/*tag=*/2, s, /*side=*/1); + } + + runAndCompare(permuted_rows, expert_first_token_offset, num_experts_per_node, start_expert, num_rows, + expanded_num_rows, /*lora_dtype_bytes=*/2, fc1, fc2, /*gated=*/nullptr); +} + +// Gated activation: three modules, exercises the gated arg path. +TEST_F(MoeLoraPointerExpandTest, GatedActivation) +{ + int32_t const num_experts_per_node = 4; + int32_t const start_expert = 2; // exercises start_expert != 0 + int64_t const num_rows = 5; + int64_t const expanded_num_rows = 10; + + std::vector permuted_rows = {0, 5, 1, 6, 2, 7, 3, 8, 4, 9}; + std::vector expert_first_token_offset = {0, 2, 5, 7, 10}; + + auto build_basic = [&](int tag, int64_t dim_a, int64_t dim_b) + { + RefModule m{}; + m.dim_a = dim_a; + m.dim_b = dim_b; + m.ranks_src = {3, 0, 1, 4, 2}; + m.ptrs_src.resize(num_rows * 2); + for (int32_t s = 0; s < num_rows; ++s) + { + m.ptrs_src[2 * s + 0] = fakePtr(tag, s, 0); + m.ptrs_src[2 * s + 1] = fakePtr(tag, s, 1); + } + return m; + }; + + RefModule fc1 = build_basic(/*tag=*/1, /*hidden=*/8, /*inter=*/24); + RefModule fc2 = build_basic(/*tag=*/2, /*inter=*/24, /*hidden=*/8); + RefModule gated = build_basic(/*tag=*/3, /*hidden=*/8, /*inter=*/24); + runAndCompare(permuted_rows, expert_first_token_offset, num_experts_per_node, start_expert, num_rows, + expanded_num_rows, /*lora_dtype_bytes=*/2, fc1, fc2, &gated); +} + +// Non-trivial lora_dtype_bytes (e.g. fp32 = 4) to verify the stride scaling +// flows through the offset arithmetic. +TEST_F(MoeLoraPointerExpandTest, Fp32StrideBytes) +{ + int32_t const num_experts_per_node = 2; + int32_t const start_expert = 0; + int64_t const num_rows = 2; + int64_t const expanded_num_rows = 4; + + std::vector permuted_rows = {0, 1, 0, 1}; + std::vector expert_first_token_offset = {0, 2, 4}; + + RefModule fc1{}; + fc1.dim_a = 4; + fc1.dim_b = 8; + fc1.ranks_src = {2, 3}; + fc1.ptrs_src = {fakePtr(1, 0, 0), fakePtr(1, 0, 1), fakePtr(1, 1, 0), fakePtr(1, 1, 1)}; + + RefModule fc2 = fc1; + fc2.dim_a = 8; + fc2.dim_b = 4; + + runAndCompare(permuted_rows, expert_first_token_offset, num_experts_per_node, start_expert, num_rows, + expanded_num_rows, /*lora_dtype_bytes=*/4, fc1, fc2, /*gated=*/nullptr); +} + +// Ghost rows: expanded_num_rows exceeds the last valid expert offset, so the +// trailing rows have expert_idx == num_experts_per_node and must be zeroed by +// the kernel. Buffers are pre-filled with garbage to verify the kernel actively +// resets them. +TEST_F(MoeLoraPointerExpandTest, GhostRowsRemainZero) +{ + int32_t const num_experts_per_node = 3; + int32_t const start_expert = 0; + int64_t const num_rows = 4; + // expert_first_token_offset.back() == 6, but we run two extra ghost rows. + int64_t const expanded_num_rows = 8; + + std::vector permuted_rows = {0, 4, 1, 5, 2, 6, 0, 0}; + std::vector expert_first_token_offset = {0, 2, 4, 6}; + + RefModule fc1{}; + fc1.dim_a = 16; + fc1.dim_b = 32; + fc1.ranks_src = {2, 0, 4, 1}; + fc1.ptrs_src.resize(num_rows * 2); + for (int32_t s = 0; s < num_rows; ++s) + { + fc1.ptrs_src[2 * s + 0] = fakePtr(/*tag=*/1, s, /*side=*/0); + fc1.ptrs_src[2 * s + 1] = fakePtr(/*tag=*/1, s, /*side=*/1); + } + + RefModule fc2 = fc1; + fc2.dim_a = 32; + fc2.dim_b = 16; + + runAndCompare(permuted_rows, expert_first_token_offset, num_experts_per_node, start_expert, num_rows, + expanded_num_rows, /*lora_dtype_bytes=*/2, fc1, fc2, /*gated=*/nullptr, /*prefill_garbage=*/true); +} + +// num_experts_per_node above kMaxExpertsInSmem (1024) forces the kernel to take +// the global-memory expert-offset scan instead of the shared-memory path. +TEST_F(MoeLoraPointerExpandTest, ForceGlobalScanNumExperts1025) +{ + int32_t const num_experts_per_node = 1025; + int32_t const start_expert = 0; + int64_t const num_rows = 4; + int64_t const expanded_num_rows = 4; // top_k=1 + + std::vector permuted_rows = {0, 1, 2, 3}; + // All tokens land in expert 0; every other expert is empty. Offset array has + // num_experts_per_node + 1 == 1026 entries. + std::vector expert_first_token_offset(num_experts_per_node + 1, expanded_num_rows); + expert_first_token_offset[0] = 0; + + RefModule fc1{}; + fc1.dim_a = 8; + fc1.dim_b = 16; + fc1.ranks_src = {1, 2, 3, 4}; + fc1.ptrs_src.resize(num_rows * 2); + for (int32_t s = 0; s < num_rows; ++s) + { + fc1.ptrs_src[2 * s + 0] = fakePtr(/*tag=*/1, s, /*side=*/0); + fc1.ptrs_src[2 * s + 1] = fakePtr(/*tag=*/1, s, /*side=*/1); + } + + RefModule fc2 = fc1; + fc2.dim_a = 16; + fc2.dim_b = 8; + + runAndCompare(permuted_rows, expert_first_token_offset, num_experts_per_node, start_expert, num_rows, + expanded_num_rows, /*lora_dtype_bytes=*/2, fc1, fc2, /*gated=*/nullptr); +} + +} // namespace diff --git a/cpp/tests/unit_tests/kernels/moeLoraProblemBuilderTest.cu b/cpp/tests/unit_tests/kernels/moeLoraProblemBuilderTest.cu new file mode 100644 index 000000000000..e9a414e837ca --- /dev/null +++ b/cpp/tests/unit_tests/kernels/moeLoraProblemBuilderTest.cu @@ -0,0 +1,364 @@ +/* + * Copyright (c) 2026, NVIDIA CORPORATION. All rights reserved. + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#include "tensorrt_llm/common/cudaUtils.h" +#include "tensorrt_llm/kernels/cutlass_kernels/include/moe_lora_problem_builder.h" + +#include "cutlass/gemm_coord.h" + +#include +#include +#include + +namespace +{ + +using ::tensorrt_llm::kernels::cutlass_kernels::launchMoeLoraProblemBuilder; +using ::tensorrt_llm::kernels::cutlass_kernels::MoeLoraGemmGroupArrays; + +// Host-side reference reproducing the builder's per-row logic. Same +// formulas as the kernel; used only as parity ground truth. +struct RefOutputs +{ + std::vector problem_sizes_in; + std::vector problem_sizes_out; + std::vector a_ptrs_in; // store as int64 bits for simple compare + std::vector b_ptrs_in; + std::vector d_ptrs_in; + std::vector b_ptrs_out; + std::vector d_ptrs_out; + std::vector lda_in; + std::vector ldb_in; + std::vector ldd_in; + std::vector ldb_out; + std::vector ldd_out; + std::vector splitk_offsets; +}; + +RefOutputs cpuReference(std::vector const& ranks, std::vector const& ptrs, int64_t input_base, + int64_t lowrank_workspace, int64_t output_base, int64_t in_hidden_size, int64_t out_hidden_size, + int64_t max_lora_rank, int64_t dtype_bytes, int64_t splitk_slices) +{ + int64_t const P = static_cast(ranks.size()); + RefOutputs r; + r.problem_sizes_in.resize(P); + r.problem_sizes_out.resize(P); + r.a_ptrs_in.resize(P); + r.b_ptrs_in.resize(P); + r.d_ptrs_in.resize(P); + r.b_ptrs_out.resize(P); + r.d_ptrs_out.resize(P); + r.lda_in.resize(P); + r.ldb_in.resize(P); + r.ldd_in.resize(P); + r.ldb_out.resize(P); + r.ldd_out.resize(P); + r.splitk_offsets.resize(P + 1); + for (int64_t i = 0; i < P; ++i) + { + int32_t const rank = ranks[i]; + r.problem_sizes_in[i] = cutlass::gemm::GemmCoord(1, rank, static_cast(in_hidden_size)); + r.problem_sizes_out[i] = cutlass::gemm::GemmCoord(1, static_cast(out_hidden_size), rank); + + int64_t const in_row_stride = in_hidden_size * dtype_bytes; + int64_t const work_row_stride = max_lora_rank * dtype_bytes; + int64_t const out_row_stride = out_hidden_size * dtype_bytes; + + r.a_ptrs_in[i] = input_base + i * in_row_stride; + r.b_ptrs_in[i] = ptrs[2 * i + 0]; + r.d_ptrs_in[i] = lowrank_workspace + i * work_row_stride; + r.b_ptrs_out[i] = ptrs[2 * i + 1]; + r.d_ptrs_out[i] = output_base + i * out_row_stride; + + r.lda_in[i] = in_hidden_size; + r.ldb_in[i] = in_hidden_size; + r.ldd_in[i] = max_lora_rank; + r.ldb_out[i] = rank; + r.ldd_out[i] = out_hidden_size; + + r.splitk_offsets[i] = i * max_lora_rank * splitk_slices; + } + r.splitk_offsets[P] = P * max_lora_rank * splitk_slices; + return r; +} + +template +T* deviceUpload(std::vector const& host) +{ + if (host.empty()) + { + return nullptr; + } + T* dev = nullptr; + TLLM_CUDA_CHECK(cudaMalloc(&dev, host.size() * sizeof(T))); + TLLM_CUDA_CHECK(cudaMemcpy(dev, host.data(), host.size() * sizeof(T), cudaMemcpyHostToDevice)); + return dev; +} + +template +T* deviceAllocZero(size_t count) +{ + T* dev = nullptr; + TLLM_CUDA_CHECK(cudaMalloc(&dev, count * sizeof(T))); + TLLM_CUDA_CHECK(cudaMemset(dev, 0, count * sizeof(T))); + return dev; +} + +template +void deviceDownload(T const* dev, std::vector& host) +{ + if (host.empty()) + { + return; + } + TLLM_CUDA_CHECK(cudaMemcpy(host.data(), dev, host.size() * sizeof(T), cudaMemcpyDeviceToHost)); +} + +class MoeLoraProblemBuilderTest : public ::testing::Test +{ +protected: + void SetUp() override + { + TLLM_CUDA_CHECK(cudaStreamCreate(&mStream)); + } + + void TearDown() override + { + for (auto* p : mAllocations) + { + (void) cudaFree(p); + } + (void) cudaStreamDestroy(mStream); + } + + template + T* upload(std::vector const& h) + { + T* p = deviceUpload(h); + if (p) + { + mAllocations.push_back(p); + } + return p; + } + + template + T* allocZero(size_t n) + { + T* p = deviceAllocZero(n); + mAllocations.push_back(p); + return p; + } + + // When with_splitk is false, out.splitk_offsets is left null to exercise the + // kernel's null-offset branch (and the launch_count path that drops the +1 + // sentinel thread); the splitk_offsets comparison is then skipped. + void runAndCompare(std::vector const& ranks, std::vector const& ptrs, int64_t input_base, + int64_t lowrank_workspace, int64_t output_base, int64_t in_hidden_size, int64_t out_hidden_size, + int64_t max_lora_rank, int64_t dtype_bytes, int64_t splitk_slices, bool with_splitk = true) + { + auto const P = static_cast(ranks.size()); + RefOutputs ref = cpuReference(ranks, ptrs, input_base, lowrank_workspace, output_base, in_hidden_size, + out_hidden_size, max_lora_rank, dtype_bytes, splitk_slices); + + int32_t* ranks_dev = upload(ranks); + int64_t* ptrs_dev = upload(ptrs); + + MoeLoraGemmGroupArrays out; + out.problem_sizes_in + = reinterpret_cast(allocZero(P * sizeof(cutlass::gemm::GemmCoord))); + out.problem_sizes_out + = reinterpret_cast(allocZero(P * sizeof(cutlass::gemm::GemmCoord))); + out.a_ptrs_in = reinterpret_cast(allocZero(P)); + out.b_ptrs_in = reinterpret_cast(allocZero(P)); + out.d_ptrs_in = reinterpret_cast(allocZero(P)); + out.b_ptrs_out = reinterpret_cast(allocZero(P)); + out.d_ptrs_out = reinterpret_cast(allocZero(P)); + out.lda_in = allocZero(P); + out.ldb_in = allocZero(P); + out.ldd_in = allocZero(P); + out.ldb_out = allocZero(P); + out.ldd_out = allocZero(P); + out.splitk_offsets = with_splitk ? allocZero(P + 1) : nullptr; + + launchMoeLoraProblemBuilder(ranks_dev, ptrs_dev, reinterpret_cast(input_base), + reinterpret_cast(lowrank_workspace), reinterpret_cast(output_base), P, in_hidden_size, + out_hidden_size, max_lora_rank, dtype_bytes, splitk_slices, out, mStream); + TLLM_CUDA_CHECK(cudaStreamSynchronize(mStream)); + + // Compare device outputs to host reference. + auto check_int64 = [&](char const* name, int64_t* dev, std::vector const& ref_vec) + { + std::vector host(ref_vec.size(), 0); + deviceDownload(dev, host); + for (size_t i = 0; i < ref_vec.size(); ++i) + { + EXPECT_EQ(host[i], ref_vec[i]) << name << " mismatch at i=" << i; + } + }; + auto check_ptr_array = [&](char const* name, void** dev, std::vector const& ref_vec) + { check_int64(name, reinterpret_cast(dev), ref_vec); }; + auto check_problem_sizes + = [&](char const* name, cutlass::gemm::GemmCoord* dev, std::vector const& ref_vec) + { + std::vector host(ref_vec.size()); + TLLM_CUDA_CHECK(cudaMemcpy( + host.data(), dev, ref_vec.size() * sizeof(cutlass::gemm::GemmCoord), cudaMemcpyDeviceToHost)); + for (size_t i = 0; i < ref_vec.size(); ++i) + { + EXPECT_EQ(host[i].m(), ref_vec[i].m()) << name << " M mismatch at i=" << i; + EXPECT_EQ(host[i].n(), ref_vec[i].n()) << name << " N mismatch at i=" << i; + EXPECT_EQ(host[i].k(), ref_vec[i].k()) << name << " K mismatch at i=" << i; + } + }; + + check_problem_sizes("problem_sizes_in", out.problem_sizes_in, ref.problem_sizes_in); + check_problem_sizes("problem_sizes_out", out.problem_sizes_out, ref.problem_sizes_out); + check_ptr_array("a_ptrs_in", out.a_ptrs_in, ref.a_ptrs_in); + check_ptr_array("b_ptrs_in", out.b_ptrs_in, ref.b_ptrs_in); + check_ptr_array("d_ptrs_in", out.d_ptrs_in, ref.d_ptrs_in); + check_ptr_array("b_ptrs_out", out.b_ptrs_out, ref.b_ptrs_out); + check_ptr_array("d_ptrs_out", out.d_ptrs_out, ref.d_ptrs_out); + check_int64("lda_in", out.lda_in, ref.lda_in); + check_int64("ldb_in", out.ldb_in, ref.ldb_in); + check_int64("ldd_in", out.ldd_in, ref.ldd_in); + check_int64("ldb_out", out.ldb_out, ref.ldb_out); + check_int64("ldd_out", out.ldd_out, ref.ldd_out); + if (with_splitk) + { + check_int64("splitk_offsets", out.splitk_offsets, ref.splitk_offsets); + } + } + + cudaStream_t mStream{}; + std::vector mAllocations; +}; + +// "Pretend" adapter pointers. The kernel treats these as opaque bits, so +// we use easily-distinguishable patterns to catch indexing mistakes. +int64_t fakeAdapter(int tag, int32_t i, int side) +{ + return (static_cast(tag) << 56) | (static_cast(side) << 48) | (static_cast(i + 1) << 32); +} + +TEST_F(MoeLoraProblemBuilderTest, Bf16Smoke) +{ + int64_t const in_hidden_size = 16; + int64_t const out_hidden_size = 32; + int64_t const max_lora_rank = 8; + int64_t const dtype_bytes = 2; + int64_t const splitk_slices = 4; + + int64_t const input_base = static_cast(0x1'0000'0000ull); + int64_t const lowrank_workspace = static_cast(0x2'0000'0000ull); + int64_t const output_base = static_cast(0x3'0000'0000ull); + + std::vector ranks = {2, 0, 4, 1, 8, 3}; + std::vector ptrs; + for (int32_t i = 0; i < static_cast(ranks.size()); ++i) + { + ptrs.push_back(fakeAdapter(/*tag=*/1, i, /*side=*/0)); + ptrs.push_back(fakeAdapter(/*tag=*/1, i, /*side=*/1)); + } + + runAndCompare(ranks, ptrs, input_base, lowrank_workspace, output_base, in_hidden_size, out_hidden_size, + max_lora_rank, dtype_bytes, splitk_slices); +} + +TEST_F(MoeLoraProblemBuilderTest, Fp32StrideBytes) +{ + int64_t const in_hidden_size = 12; + int64_t const out_hidden_size = 24; + int64_t const max_lora_rank = 16; + int64_t const dtype_bytes = 4; + int64_t const splitk_slices = 8; + + int64_t const input_base = static_cast(0x4'0000'0000ull); + int64_t const lowrank_workspace = static_cast(0x5'0000'0000ull); + int64_t const output_base = static_cast(0x6'0000'0000ull); + + std::vector ranks = {1, 16, 8}; + std::vector ptrs; + for (int32_t i = 0; i < static_cast(ranks.size()); ++i) + { + ptrs.push_back(fakeAdapter(/*tag=*/2, i, /*side=*/0)); + ptrs.push_back(fakeAdapter(/*tag=*/2, i, /*side=*/1)); + } + + runAndCompare(ranks, ptrs, input_base, lowrank_workspace, output_base, in_hidden_size, out_hidden_size, + max_lora_rank, dtype_bytes, splitk_slices); +} + +// Cover an empty call (no-op) and a single-token call (smallest live case) +// to lock down the corner cases the larger tests don't exercise. +TEST_F(MoeLoraProblemBuilderTest, BoundaryCases) +{ + int64_t const in_hidden_size = 8; + int64_t const out_hidden_size = 8; + int64_t const max_lora_rank = 4; + int64_t const dtype_bytes = 2; + int64_t const splitk_slices = 2; + int64_t const input_base = static_cast(0x7'0000'0000ull); + int64_t const lowrank_workspace = static_cast(0x8'0000'0000ull); + int64_t const output_base = static_cast(0x9'0000'0000ull); + + // Empty call: P = 0, no allocations needed; launch should be a no-op. + { + MoeLoraGemmGroupArrays empty{}; + launchMoeLoraProblemBuilder(nullptr, nullptr, reinterpret_cast(input_base), + reinterpret_cast(lowrank_workspace), reinterpret_cast(output_base), + /*num_permuted_tokens=*/0, in_hidden_size, out_hidden_size, max_lora_rank, dtype_bytes, splitk_slices, + empty, mStream); + TLLM_CUDA_CHECK(cudaStreamSynchronize(mStream)); + } + + // Single-token call: P = 1, exercises the +1 sentinel write at index 1. + { + std::vector ranks = {3}; + std::vector ptrs = {fakeAdapter(3, 0, 0), fakeAdapter(3, 0, 1)}; + runAndCompare(ranks, ptrs, input_base, lowrank_workspace, output_base, in_hidden_size, out_hidden_size, + max_lora_rank, dtype_bytes, splitk_slices); + } +} + +// splitk_offsets == nullptr: the caller does not need the split-K scratch +// offsets, so the kernel must skip the sentinel write and the per-row offset +// store while still producing all other arrays correctly. +TEST_F(MoeLoraProblemBuilderTest, NullSplitkOffsets) +{ + int64_t const in_hidden_size = 16; + int64_t const out_hidden_size = 32; + int64_t const max_lora_rank = 8; + int64_t const dtype_bytes = 2; + int64_t const splitk_slices = 4; + + int64_t const input_base = static_cast(0xA'0000'0000ull); + int64_t const lowrank_workspace = static_cast(0xB'0000'0000ull); + int64_t const output_base = static_cast(0xC'0000'0000ull); + + std::vector ranks = {2, 0, 4, 1, 8}; + std::vector ptrs; + for (int32_t i = 0; i < static_cast(ranks.size()); ++i) + { + ptrs.push_back(fakeAdapter(/*tag=*/4, i, /*side=*/0)); + ptrs.push_back(fakeAdapter(/*tag=*/4, i, /*side=*/1)); + } + + runAndCompare(ranks, ptrs, input_base, lowrank_workspace, output_base, in_hidden_size, out_hidden_size, + max_lora_rank, dtype_bytes, splitk_slices, /*with_splitk=*/false); +} + +} // namespace diff --git a/docker/Dockerfile.multi b/docker/Dockerfile.multi index 62a5cb028fe3..d4bf170470ac 100644 --- a/docker/Dockerfile.multi +++ b/docker/Dockerfile.multi @@ -129,35 +129,41 @@ WORKDIR /app/tensorrt_llm RUN --mount=type=cache,target=/root/.cache/pip --mount=type=bind,from=wheel,source=/src/tensorrt_llm/build,target=/tmp/wheel \ pip install /tmp/wheel/tensorrt_llm*.whl -COPY README.md ./ -COPY --from=wheel /src/tensorrt_llm/build/tensorrt_llm*.whl ./ -COPY docs docs -COPY cpp/include include - -RUN ln -sv $(python3 -c 'import site; print(f"{site.getsitepackages()[0]}/tensorrt_llm/bin")') bin && \ - test -f bin/executorWorker && \ - ln -sv $(python3 -c 'import site; print(f"{site.getsitepackages()[0]}/tensorrt_llm/libs")') lib && \ - test -f lib/libnvinfer_plugin_tensorrt_llm.so && \ - echo "/app/tensorrt_llm/lib" > /etc/ld.so.conf.d/tensorrt_llm.conf && \ - ldconfig && \ - ! ( ldd -v bin/executorWorker | grep tensorrt_llm | grep -q "not found" ) - -ARG SRC_DIR=/src/tensorrt_llm -COPY --from=wheel ${SRC_DIR}/benchmarks benchmarks -ARG CPP_BUILD_DIR=${SRC_DIR}/cpp/build -COPY --from=wheel \ - ${CPP_BUILD_DIR}/benchmarks/bertBenchmark \ - ${CPP_BUILD_DIR}/benchmarks/gptManagerBenchmark \ - ${CPP_BUILD_DIR}/benchmarks/disaggServerBenchmark \ - benchmarks/cpp/ - -COPY examples examples -RUN chmod -R a+w examples && \ +RUN --mount=type=bind,source=README.md,target=/mnt/ctx/README.md \ + --mount=type=bind,source=docs,target=/mnt/ctx/docs \ + --mount=type=bind,source=cpp/include,target=/mnt/ctx/include \ + --mount=type=bind,source=examples,target=/mnt/ctx/examples \ + --mount=type=bind,from=wheel,source=/src/tensorrt_llm/build,target=/mnt/wheel \ + --mount=type=bind,from=wheel,source=/src/tensorrt_llm/benchmarks,target=/mnt/benchmarks \ + --mount=type=bind,from=wheel,source=/src/tensorrt_llm/cpp/build/benchmarks,target=/mnt/cpp_benchmarks \ + # Copy build context files + cp /mnt/ctx/README.md ./ && \ + cp -r /mnt/ctx/docs ./docs && \ + cp -r /mnt/ctx/include ./include && \ + cp -r /mnt/ctx/examples ./examples && \ + chmod -R a+w examples && \ + # Copy wheel stage outputs + cp /mnt/wheel/tensorrt_llm*.whl ./ && \ + cp -r /mnt/benchmarks ./benchmarks && \ + mkdir -p benchmarks/cpp && \ + cp /mnt/cpp_benchmarks/bertBenchmark \ + /mnt/cpp_benchmarks/gptManagerBenchmark \ + /mnt/cpp_benchmarks/disaggServerBenchmark \ + benchmarks/cpp/ && \ rm -v \ benchmarks/cpp/bertBenchmark.cpp \ benchmarks/cpp/gptManagerBenchmark.cpp \ benchmarks/cpp/disaggServerBenchmark.cpp \ benchmarks/cpp/CMakeLists.txt && \ + # Create symlinks to installed package binaries and libraries + ln -sv $(python3 -c 'import site; print(f"{site.getsitepackages()[0]}/tensorrt_llm/bin")') bin && \ + test -f bin/executorWorker && \ + ln -sv $(python3 -c 'import site; print(f"{site.getsitepackages()[0]}/tensorrt_llm/libs")') lib && \ + test -f lib/libnvinfer_plugin_tensorrt_llm.so && \ + echo "/app/tensorrt_llm/lib" > /etc/ld.so.conf.d/tensorrt_llm.conf && \ + ldconfig && \ + ! ( ldd -v bin/executorWorker | grep tensorrt_llm | grep -q "not found" ) && \ + # Clean up caches and CVE workarounds rm -rf /root/.cache/uv/archive-v0 && \ # WAR against https://github.com/advisories/GHSA-58pv-8j8x-9vj2 rm -rf /usr/local/lib/python3.12/dist-packages/setuptools/_vendor/jaraco.context-5.3.0.dist-info && \ @@ -171,8 +177,8 @@ ENV TRT_LLM_GIT_COMMIT=${GIT_COMMIT} \ TRT_LLM_VERSION=${TRT_LLM_VER} # Generate OSS attribution file for release image -COPY scripts/generate_container_oss_attribution.sh /tmp/generate_container_oss_attribution.sh -RUN bash /tmp/generate_container_oss_attribution.sh "release" "${TRT_LLM_VER}" "${TARGETARCH}" && rm /tmp/generate_container_oss_attribution.sh +RUN --mount=type=bind,source=scripts/generate_container_oss_attribution.sh,target=/mnt/gen_attribution.sh \ + bash /mnt/gen_attribution.sh "release" "${TRT_LLM_VER}" "${TARGETARCH}" FROM wheel AS tritonbuild diff --git a/docs/source/_ext/trtllm_auto_deploy.py b/docs/source/_ext/trtllm_auto_deploy.py new file mode 100644 index 000000000000..44943432b842 --- /dev/null +++ b/docs/source/_ext/trtllm_auto_deploy.py @@ -0,0 +1,470 @@ +# SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. +# SPDX-License-Identifier: Apache-2.0 + +from __future__ import annotations + +import ast +import pkgutil +from dataclasses import dataclass +from pathlib import Path + +import yaml +from docutils import nodes +from docutils.statemachine import StringList +from sphinx.application import Sphinx +from sphinx.util.docutils import SphinxDirective +from sphinx.util.nodes import nested_parse_with_titles + +AUTO_DEPLOY_TRANSFORM_LIBRARY_PACKAGE = "tensorrt_llm._torch.auto_deploy.transform.library" +AUTO_DEPLOY_TRANSFORM_LIBRARY_PATH = Path("tensorrt_llm/_torch/auto_deploy/transform/library") +AUTO_DEPLOY_TRANSFORM_CONFIGS = ( + ("graph", Path("tensorrt_llm/_torch/auto_deploy/config/default.yaml")), + ( + "transformers", + Path("tensorrt_llm/_torch/auto_deploy/config/transformers.yaml"), + ), +) +AUTOCLASS_OPTIONS = ( + " :members:", + " :show-inheritance:", +) + +STAGE_TITLES = { + "factory": "Factory", + "export": "Export", + "post_export": "Post-Export", + "pattern_matcher": "Pattern Matching", + "sharding": "Sharding", + "weight_load": "Weight Loading", + "post_load_fusion": "Post-Load Fusion", + "cache_init": "Cache Initialization", + "visualize": "Visualization", + "compile": "Compilation", +} + +TITLE_REPLACEMENTS = { + "fp8": "FP8", + "gdn": "GDN", + "kv": "KV", + "kvcache": "KV Cache", + "l2": "L2", + "mlir": "MLIR", + "mla": "MLA", + "moe": "MoE", + "mrope": "mRoPE", + "mxfp4": "MXFP4", + "noop": "No-op", + "nvfp4": "NVFP4", + "rmsnorm": "RMSNorm", + "rope": "RoPE", + "silu": "SiLU", + "ssm": "SSM", + "swiglu": "SwiGLU", + "trtllm": "TRT-LLM", +} + + +@dataclass(frozen=True) +class RegisteredTransform: + key: str + module_name: str + class_name: str + config_class_name: str + config_module_name: str | None + + @property + def qualified_class_name(self) -> str: + return f"{AUTO_DEPLOY_TRANSFORM_LIBRARY_PACKAGE}.{self.module_name}.{self.class_name}" + + @property + def qualified_module_name(self) -> str: + return f"{AUTO_DEPLOY_TRANSFORM_LIBRARY_PACKAGE}.{self.module_name}" + + @property + def qualified_config_class_name(self) -> str | None: + if self.config_module_name is None: + return None + return ( + f"{AUTO_DEPLOY_TRANSFORM_LIBRARY_PACKAGE}.{self.config_module_name}" + f".{self.config_class_name}" + ) + + +@dataclass(frozen=True) +class ParsedClass: + module_name: str + class_name: str + base_class_names: tuple[str, ...] + config_class_name: str | None + transform_keys: tuple[str, ...] + + +@dataclass +class ConfiguredTransform: + key: str + stage: str + modes: list[str] + + +def _repo_root_from_source_dir(source_dir: str) -> Path: + """Return the nearest ancestor that contains the AutoDeploy transform library.""" + source_path = Path(source_dir).resolve() + for path in (source_path, *source_path.parents): + if (path / AUTO_DEPLOY_TRANSFORM_LIBRARY_PATH).is_dir(): + return path + raise FileNotFoundError( + f"Could not find repository root containing {AUTO_DEPLOY_TRANSFORM_LIBRARY_PATH}" + ) + + +def _discover_transform_modules(library_path: Path) -> list[str]: + """Discover public AutoDeploy transform modules without importing them.""" + if not library_path.is_dir(): + raise FileNotFoundError(f"AutoDeploy transform library not found: {library_path}") + + return sorted( + module_info.name + for module_info in pkgutil.iter_modules([str(library_path)]) + if not module_info.name.startswith("_") + ) + + +def _module_title(module_name: str) -> str: + """Convert a transform module name into a readable section title.""" + words = [TITLE_REPLACEMENTS.get(part, part.title()) for part in module_name.split("_")] + return " ".join(words) + + +def _mode_list(modes: list[str]) -> str: + return ", ".join(f"``{mode}``" for mode in sorted(modes)) + + +def _register_key_from_decorator(decorator: ast.expr) -> str | None: + if not isinstance(decorator, ast.Call): + return None + if not isinstance(decorator.func, ast.Attribute): + return None + if decorator.func.attr != "register": + return None + if not isinstance(decorator.func.value, ast.Name): + return None + if decorator.func.value.id != "TransformRegistry": + return None + if not decorator.args: + return None + key_arg = decorator.args[0] + if isinstance(key_arg, ast.Constant) and isinstance(key_arg.value, str): + return key_arg.value + return None + + +def _name_from_expr(expr: ast.expr) -> str | None: + if isinstance(expr, ast.Name): + return expr.id + if isinstance(expr, ast.Attribute): + return expr.attr + return None + + +def _get_config_class_name(node: ast.ClassDef) -> str | None: + for child_node in node.body: + if not isinstance(child_node, ast.FunctionDef): + continue + if child_node.name != "get_config_class": + continue + for statement in child_node.body: + if isinstance(statement, ast.Return): + return _name_from_expr(statement.value) + return None + + +def _parse_transform_classes( + library_path: Path, +) -> tuple[list[ParsedClass], dict[str, list[ParsedClass]]]: + parsed_classes: list[ParsedClass] = [] + classes_by_name: dict[str, list[ParsedClass]] = {} + + for module_name in _discover_transform_modules(library_path): + module_path = library_path / f"{module_name}.py" + tree = ast.parse(module_path.read_text(encoding="utf-8")) + + for node in tree.body: + if not isinstance(node, ast.ClassDef): + continue + + parsed_class = ParsedClass( + module_name=module_name, + class_name=node.name, + base_class_names=tuple( + base_class_name + for base in node.bases + if (base_class_name := _name_from_expr(base)) is not None + ), + config_class_name=_get_config_class_name(node), + transform_keys=tuple( + transform_key + for decorator in node.decorator_list + if (transform_key := _register_key_from_decorator(decorator)) is not None + ), + ) + parsed_classes.append(parsed_class) + classes_by_name.setdefault(parsed_class.class_name, []).append(parsed_class) + + return parsed_classes, classes_by_name + + +def _get_library_class( + class_name: str, + module_name: str, + classes_by_name: dict[str, list[ParsedClass]], +) -> ParsedClass | None: + classes = classes_by_name.get(class_name, []) + if len(classes) == 1: + return classes[0] + for parsed_class in classes: + if parsed_class.module_name == module_name: + return parsed_class + return None + + +def _resolve_config_class( + parsed_class: ParsedClass, + classes_by_name: dict[str, list[ParsedClass]], + seen: set[str] | None = None, +) -> ParsedClass | None: + """Resolve a transform's config class, following simple inheritance.""" + if parsed_class.config_class_name: + if parsed_class.config_class_name == "TransformConfig": + return None + return _get_library_class( + parsed_class.config_class_name, + parsed_class.module_name, + classes_by_name, + ) + + seen = seen or set() + seen.add(parsed_class.class_name) + for base_class_name in parsed_class.base_class_names: + if base_class_name in seen: + continue + base_classes = classes_by_name.get(base_class_name, []) + if len(base_classes) != 1: + continue + return _resolve_config_class(base_classes[0], classes_by_name, seen) + + return None + + +def _discover_registered_transforms(library_path: Path) -> dict[str, RegisteredTransform]: + """Discover registered transform classes without importing transform modules.""" + registered_transforms: dict[str, RegisteredTransform] = {} + parsed_classes, classes_by_name = _parse_transform_classes(library_path) + + for parsed_class in parsed_classes: + config_class = _resolve_config_class(parsed_class, classes_by_name) + for transform_key in parsed_class.transform_keys: + if transform_key in registered_transforms: + previous = registered_transforms[transform_key] + raise ValueError( + f"Transform {transform_key!r} is registered by both " + f"{previous.qualified_class_name} and " + f"{parsed_class.module_name}.{parsed_class.class_name}" + ) + registered_transforms[transform_key] = RegisteredTransform( + key=transform_key, + module_name=parsed_class.module_name, + class_name=parsed_class.class_name, + config_class_name=config_class.class_name if config_class else "TransformConfig", + config_module_name=config_class.module_name if config_class else None, + ) + + return registered_transforms + + +def _load_configured_transforms(repo_root: Path) -> list[ConfiguredTransform]: + """Load transform stage metadata from the checked-in AutoDeploy configs.""" + configured_by_key: dict[str, ConfiguredTransform] = {} + configured_transforms: list[ConfiguredTransform] = [] + + for mode, config_path in AUTO_DEPLOY_TRANSFORM_CONFIGS: + config = yaml.safe_load((repo_root / config_path).read_text(encoding="utf-8")) + transforms = config.get("transforms", {}) + + for transform_key, transform_config in transforms.items(): + stage = transform_config.get("stage") + if not stage: + raise ValueError( + f"Transform {transform_key!r} in {config_path} does not define a stage" + ) + + configured_transform = configured_by_key.get(transform_key) + if configured_transform is not None: + if configured_transform.stage != stage: + raise ValueError( + f"Transform {transform_key!r} has stages " + f"{configured_transform.stage!r} and {stage!r}" + ) + configured_transform.modes.append(mode) + continue + + configured_transform = ConfiguredTransform( + key=transform_key, + stage=stage, + modes=[mode], + ) + configured_by_key[transform_key] = configured_transform + configured_transforms.append(configured_transform) + + return configured_transforms + + +def _transform_section( + transform_key: str, + registered_transform: RegisteredTransform, + modes: list[str] | None = None, +) -> list[str]: + title = _module_title(transform_key) + config_lines: list[str] = [ + ".. rubric:: YAML configuration", + "", + ] + if registered_transform.qualified_config_class_name is None: + config_lines.extend( + [ + "Uses the common ``TransformConfig`` fields documented in :doc:`core`.", + "", + ] + ) + else: + config_lines.extend( + [ + "The fields below can be set under this transform's entry in the " + "AutoDeploy config YAML.", + "", + f".. autopydantic_model:: {registered_transform.qualified_config_class_name}", + " :members:", + " :show-inheritance:", + " :no-index:", + "", + ] + ) + + return [ + title, + "~" * len(title), + "", + f"Transform key: ``{transform_key}``", + "", + f"Source module: ``{registered_transform.qualified_module_name}``", + "", + *(["Configured modes: " + _mode_list(modes), ""] if modes else []), + f".. autoclass:: {registered_transform.qualified_class_name}", + *AUTOCLASS_OPTIONS, + "", + *config_lines, + ] + + +def _note_auto_deploy_dependencies(directive: SphinxDirective, repo_root: Path) -> None: + library_path = repo_root / AUTO_DEPLOY_TRANSFORM_LIBRARY_PATH + directive.env.note_dependency(str(library_path)) + for path in sorted(library_path.glob("*.py")): + directive.env.note_dependency(str(path)) + for _, config_path in AUTO_DEPLOY_TRANSFORM_CONFIGS: + directive.env.note_dependency(str(repo_root / config_path)) + + +class AutoDeployTransformStageDirective(SphinxDirective): + """Render autodoc sections for configured transforms in one pipeline stage.""" + + has_content = False + required_arguments = 1 + + def run(self) -> list[nodes.Node]: + stage = self.arguments[0] + repo_root = _repo_root_from_source_dir(self.env.app.srcdir) + library_path = repo_root / AUTO_DEPLOY_TRANSFORM_LIBRARY_PATH + _note_auto_deploy_dependencies(self, repo_root) + + registered_transforms = _discover_registered_transforms(library_path) + configured_transforms = [ + transform + for transform in _load_configured_transforms(repo_root) + if transform.stage == stage + ] + + if not configured_transforms: + title = STAGE_TITLES.get(stage, stage) + return [ + nodes.paragraph( + text=f"No AutoDeploy transforms are configured for the {title} stage." + ) + ] + + generated_lines = StringList() + for configured_transform in configured_transforms: + registered_transform = registered_transforms.get(configured_transform.key) + if registered_transform is None: + raise ValueError( + f"Configured transform {configured_transform.key!r} is not registered" + ) + for line in _transform_section( + configured_transform.key, + registered_transform, + configured_transform.modes, + ): + generated_lines.append(line, source=str(library_path)) + + container = nodes.container() + nested_parse_with_titles(self.state, generated_lines, container) + return container.children + + +class AutoDeployAdditionalTransformsDirective(SphinxDirective): + """Render registered transforms that are not referenced by checked-in configs.""" + + has_content = False + + def run(self) -> list[nodes.Node]: + repo_root = _repo_root_from_source_dir(self.env.app.srcdir) + library_path = repo_root / AUTO_DEPLOY_TRANSFORM_LIBRARY_PATH + _note_auto_deploy_dependencies(self, repo_root) + + registered_transforms = _discover_registered_transforms(library_path) + configured_keys = {transform.key for transform in _load_configured_transforms(repo_root)} + additional_transforms = [ + registered_transform + for transform_key, registered_transform in sorted(registered_transforms.items()) + if transform_key not in configured_keys + ] + + if not additional_transforms: + return [ + nodes.paragraph( + text="Every registered AutoDeploy transform is referenced by a checked-in config." + ) + ] + + generated_lines = StringList() + for registered_transform in additional_transforms: + for line in _transform_section( + registered_transform.key, + registered_transform, + ): + generated_lines.append(line, source=str(library_path)) + + container = nodes.container() + nested_parse_with_titles(self.state, generated_lines, container) + return container.children + + +def setup(app: Sphinx) -> dict[str, bool | str]: + app.add_directive( + "trtllm_auto_deploy_transform_stage", + AutoDeployTransformStageDirective, + ) + app.add_directive( + "trtllm_auto_deploy_additional_transforms", + AutoDeployAdditionalTransformsDirective, + ) + return {"version": "0.1", "parallel_read_safe": True, "parallel_write_safe": True} diff --git a/docs/source/_static/config_db.json b/docs/source/_static/config_db.json index 2856a32e5c0f..d7fc859f92f6 100644 --- a/docs/source/_static/config_db.json +++ b/docs/source/_static/config_db.json @@ -12,6 +12,18 @@ "model_url": "https://huggingface.co/nvidia/NVIDIA-Nemotron-3-Super-120B-A12B-NVFP4", "scenario": "Max Throughput" }, + { + "command": "trtllm-serve nvidia/NVIDIA-Nemotron-3-Ultra-550B-A55B-NVFP4 --config ${TRTLLM_DIR}/examples/configs/curated/nemotron-3-ultra-throughput.yaml", + "config_filename": "nemotron-3-ultra-throughput.yaml", + "config_github_url": "https://github.com/NVIDIA/TensorRT-LLM/blob/main/examples/configs/curated/nemotron-3-ultra-throughput.yaml", + "config_path": "examples/configs/curated/nemotron-3-ultra-throughput.yaml", + "config_raw_url": "https://raw.githubusercontent.com/NVIDIA/TensorRT-LLM/main/examples/configs/curated/nemotron-3-ultra-throughput.yaml", + "gpu_compatibility": "B200, B300, GB200, GB300, H100, H200", + "model": "nvidia/NVIDIA-Nemotron-3-Ultra-550B-A55B-NVFP4", + "model_display_name": "Nemotron v3 Ultra (NVFP4)", + "model_url": "https://huggingface.co/nvidia/NVIDIA-Nemotron-3-Ultra-550B-A55B-NVFP4", + "scenario": "Max Throughput" + }, { "command": "trtllm-serve Qwen/Qwen3-Next-80B-A3B-Thinking --config ${TRTLLM_DIR}/examples/configs/curated/qwen3-next.yaml", "config_filename": "qwen3-next.yaml", @@ -24,6 +36,18 @@ "model_url": "https://huggingface.co/Qwen/Qwen3-Next-80B-A3B-Thinking", "scenario": "Max Throughput" }, + { + "command": "trtllm-serve nvidia/Qwen3.5-397B-A17B-NVFP4 --config ${TRTLLM_DIR}/examples/configs/curated/qwen3.5.yaml", + "config_filename": "qwen3.5.yaml", + "config_github_url": "https://github.com/NVIDIA/TensorRT-LLM/blob/main/examples/configs/curated/qwen3.5.yaml", + "config_path": "examples/configs/curated/qwen3.5.yaml", + "config_raw_url": "https://raw.githubusercontent.com/NVIDIA/TensorRT-LLM/main/examples/configs/curated/qwen3.5.yaml", + "gpu_compatibility": "B200, B300, GB200, GB300", + "model": "nvidia/Qwen3.5-397B-A17B-NVFP4", + "model_display_name": "Qwen3.5-397B-A17B (NVFP4)", + "model_url": "https://huggingface.co/nvidia/Qwen3.5-397B-A17B-NVFP4", + "scenario": "Max Throughput" + }, { "command": "trtllm-serve Qwen/Qwen3-30B-A3B --config ${TRTLLM_DIR}/examples/configs/curated/qwen3.yaml", "config_filename": "qwen3.yaml", @@ -3516,6 +3540,14 @@ "display_name": "Nemotron v3 Super (NVFP4)", "url": "https://huggingface.co/nvidia/NVIDIA-Nemotron-3-Super-120B-A12B-NVFP4" }, + "nvidia/NVIDIA-Nemotron-3-Ultra-550B-A55B-NVFP4": { + "display_name": "Nemotron v3 Ultra (NVFP4)", + "url": "https://huggingface.co/nvidia/NVIDIA-Nemotron-3-Ultra-550B-A55B-NVFP4" + }, + "nvidia/Qwen3.5-397B-A17B-NVFP4": { + "display_name": "Qwen3.5-397B-A17B (NVFP4)", + "url": "https://huggingface.co/nvidia/Qwen3.5-397B-A17B-NVFP4" + }, "openai/gpt-oss-120b": { "display_name": "gpt-oss-120b", "url": "https://huggingface.co/openai/gpt-oss-120b" diff --git a/docs/source/blogs/tech_blog/blog22_Helix_Parallelism_Scaling_Multi_Million_Token_Decoding_with_KV_Cache_Sharding.md b/docs/source/blogs/tech_blog/blog22_Helix_Parallelism_Scaling_Multi_Million_Token_Decoding_with_KV_Cache_Sharding.md index ac81bf32e9cf..16cdbc354412 100644 --- a/docs/source/blogs/tech_blog/blog22_Helix_Parallelism_Scaling_Multi_Million_Token_Decoding_with_KV_Cache_Sharding.md +++ b/docs/source/blogs/tech_blog/blog22_Helix_Parallelism_Scaling_Multi_Million_Token_Decoding_with_KV_Cache_Sharding.md @@ -60,7 +60,7 @@ The following roofline analysis illustrates why decoupling attention and FFN sha
- Roofline analysis for KV cache and Linear weight reads + Roofline analysis for KV cache and Linear weight reads

Figure 1. Roofline analysis for KV cache and Linear weight reads on GB200 NVLink72. (Left) DRAM read latency vs. TP width - benefits plateau beyond TP=K due to full KV duplication, highlighting the need for KV sharding in Helix. (Middle) DRAM read time vs. KV length S - self-attention cost scales linearly with S, eventually dominating latency. (Right) DRAM read time vs. KVP width - Helix applies KVP in attention to reduce per-GPU memory traffic and achieve linear scaling, enabling multi-million-token inference.

@@ -82,7 +82,7 @@ Helix is a hybrid sharding strategy that uses different parallelism strategies f
- Helix execution flow per transformer layer + Helix execution flow per transformer layer

Figure 2. End-to-end Helix workflow for a single transformer layer. (Top) During attention, each KVP GPU independently computes QKV projections and runs FlashAttention on its local KV shard, producing partial outputs and log-sum-exp scalars. A single All-to-All exchanges these fragments across KVP ranks; each GPU rescales and sums them into the exact softmax-normalized result. (Bottom) For FFNs, the same N GPUs are re-provisioned as either TP_F=N for dense models, or TP_F × EP for MoE models. Adapted from Bhatia et al., 2025.

@@ -95,7 +95,7 @@ Helix applies KV Parallelism (KVP) by sharding the KV cache along the sequence d
- Comparison of attention sharding strategies + Comparison of attention sharding strategies

Figure 3. Attention sharding strategies for GQA with Q=4 query heads and K=2 KV heads. (a) No TP: all heads co-located, no duplication. (b) TP=2: clean split since TP ≤ K. (c) TP=4: more shards than KV heads, forcing KV cache duplication. (d) Helix (TP=2, KVP=2): avoids duplication by forming a 2D layout - TP splits heads, KVP splits the sequence dimension. Adapted from Bhatia et al., 2025.

@@ -252,7 +252,7 @@ The following results for DeepSeek-R1 are obtained on GB300 NVL72 using TensorRT
- DeepSeek-R1 FP4 throughput-latency Pareto on GB300 NVL72 with Helix, with parallelism configuration (concurrency, KVP, TP/DP, EP, PP) annotated at each Pareto point + DeepSeek-R1 FP4 throughput-latency Pareto on GB300 NVL72 with Helix, with parallelism configuration (concurrency, KVP, TP/DP, EP, PP) annotated at each Pareto point

Figure 4. Throughput-latency Pareto frontier of serving DeepSeek-R1 (FP4) on GB300 NVL72 with Helix on the generation servers. Helix pushes the frontier outward, enabling both higher throughput and lower latency.

diff --git a/docs/source/commands/trtllm-serve/trtllm-serve.rst b/docs/source/commands/trtllm-serve/trtllm-serve.rst index d4b335472a65..4008b234b23e 100644 --- a/docs/source/commands/trtllm-serve/trtllm-serve.rst +++ b/docs/source/commands/trtllm-serve/trtllm-serve.rst @@ -317,7 +317,7 @@ Example output: Configuring with YAML Files ---------------------------- -You can configure various options of ``trtllm-serve`` using YAML files by setting the ``--config`` option to the path of a YAML file. The arguments in the file override the corresponding command line arguments. +You can configure various options of ``trtllm-serve`` using YAML files by setting the ``--config`` option to the path of a YAML file. Explicit CLI flags take precedence over values in the YAML; un-set CLI flags fall back to the YAML. .. include:: ../../_includes/note_sections.rst :start-after: .. start-note-config-flag-alias diff --git a/docs/source/conf.py b/docs/source/conf.py index 2ffe947cd72f..34d0e8328257 100644 --- a/docs/source/conf.py +++ b/docs/source/conf.py @@ -67,6 +67,7 @@ 'sphinxcontrib.autodoc_pydantic', 'sphinx_togglebutton', 'sphinxcontrib.mermaid', + 'trtllm_auto_deploy', 'trtllm_config_selector', ] diff --git a/docs/source/deployment-guide/deployment-guide-for-nemotron-3-super-on-trtllm.md b/docs/source/deployment-guide/deployment-guide-for-nemotron-3-on-trtllm.md similarity index 67% rename from docs/source/deployment-guide/deployment-guide-for-nemotron-3-super-on-trtllm.md rename to docs/source/deployment-guide/deployment-guide-for-nemotron-3-on-trtllm.md index ac0ddcf279d5..da286825f438 100644 --- a/docs/source/deployment-guide/deployment-guide-for-nemotron-3-super-on-trtllm.md +++ b/docs/source/deployment-guide/deployment-guide-for-nemotron-3-on-trtllm.md @@ -1,8 +1,13 @@ -# Deployment Guide for Nemotron v3 Super on TensorRT LLM - Blackwell & Hopper Hardware +# Deployment Guide for Nemotron v3 (Ultra & Super) on TensorRT LLM - Blackwell & Hopper Hardware ## Introduction -This deployment guide provides step-by-step instructions for running the NVIDIA Nemotron v3 Super 120B-A12B model using TensorRT LLM. Nemotron v3 Super is a hybrid architecture model combining Mixture-of-Experts (MoE) with SSM (Mamba) and attention layers, delivering 120B total parameters with only 12B active parameters per token for efficient inference. This guide covers model access, environment setup, server configuration, and inference validation. +This deployment guide provides step-by-step instructions for running the NVIDIA Nemotron v3 family of models using TensorRT LLM. It covers two models: + +* **Nemotron v3 Ultra (550B-A55B)** — 550B total parameters with 55B active per token. +* **Nemotron v3 Super (120B-A12B)** — 120B total parameters with 12B active per token. + +Both models share a hybrid architecture (`NemotronHForCausalLM`) that interleaves Mamba-2 (SSM), Mixture-of-Experts (MoE), and attention layers for efficient inference. Nemotron v3 Ultra additionally uses a Latent Mixture-of-Experts (LatentMoE) design and ships with built-in Multi-Token Prediction (MTP) layers. On TensorRT LLM, Nemotron v3 Ultra supports MTP, prefix caching (KV cache reuse), and disaggregated serving. This guide covers model access, environment setup, server configuration, and inference validation for both models. ## Prerequisites @@ -14,6 +19,13 @@ This deployment guide provides step-by-step instructions for running the NVIDIA ## Models +### Nemotron v3 Ultra (550B-A55B) + +* [NVIDIA-Nemotron-3-Ultra-550B-A55B-Base-BF16](https://huggingface.co/nvidia/NVIDIA-Nemotron-3-Ultra-550B-A55B-Base-BF16) +* [NVIDIA-Nemotron-3-Ultra-550B-A55B-NVFP4](https://huggingface.co/nvidia/NVIDIA-Nemotron-3-Ultra-550B-A55B-NVFP4) + +### Nemotron v3 Super (120B-A12B) + * [NVIDIA-Nemotron-3-Super-120B-A12B-Base-BF16](https://huggingface.co/nvidia/NVIDIA-Nemotron-3-Super-120B-A12B-Base-BF16) * [NVIDIA-Nemotron-3-Super-120B-A12B-FP8](https://huggingface.co/nvidia/NVIDIA-Nemotron-3-Super-120B-A12B-FP8) * [NVIDIA-Nemotron-3-Super-120B-A12B-NVFP4](https://huggingface.co/nvidia/NVIDIA-Nemotron-3-Super-120B-A12B-NVFP4) @@ -22,7 +34,27 @@ All models are available under the [nvidia/nvidia-nemotron-v3](https://huggingfa ## GPU Requirements -Nemotron v3 Super 120B-A12B has 120B total parameters. The minimum GPU memory required depends on the precision: +The minimum GPU memory required depends on the model size and precision. + +### Nemotron v3 Ultra (550B-A55B) + +The NVFP4 checkpoint is the recommended (and minimum-footprint) deployment precision for Ultra. The published minimum GPU requirements for the NVFP4 checkpoint are: + +| Platform | Minimum GPUs | +|----------|--------------| +| B200 | 4x B200 | +| B300 | 4x B300 | +| GB200 | 4x GB200 | +| GB300 | 4x GB300 | +| H100 | 8x H100 \* | + +The NVFP4 checkpoint uses an FP8 KV cache. On Blackwell (B200/B300) and Grace Blackwell (GB200/GB300), a single node of 4 GPUs fits the NVFP4 weights plus the KV cache with headroom. + +\* The same NVFP4 checkpoint can also be served on Hopper. Because Hopper lacks a native NVFP4 tensor-core GEMM, NVFP4 weights are run through a W4A16 fallback path that dequantizes them on the fly; this requires a minimum of 8x H100 (fewer may suffice on the higher-memory H200) and delivers somewhat lower throughput than Blackwell. No checkpoint conversion or command change is needed — the runtime selects the fallback automatically. + +The `Base-BF16` checkpoint is the pre-training checkpoint and is primarily intended for research and fine-tuning rather than serving. + +### Nemotron v3 Super (120B-A12B) | Checkpoint | Minimum GPUs (H100/H200 80GB) | Minimum GPUs (B200/GB200 192GB) | |------------|-------------------------------|---------------------------------| @@ -61,12 +93,36 @@ We maintain YAML configuration files with recommended performance settings in th ```shell TRTLLM_DIR=/app/tensorrt_llm # change as needed to match your environment +``` + +Select the config file that matches the model you are deploying: + +```shell +# Nemotron v3 Ultra +EXTRA_LLM_API_FILE=${TRTLLM_DIR}/examples/configs/curated/nemotron-3-ultra-throughput.yaml + +# Nemotron v3 Super EXTRA_LLM_API_FILE=${TRTLLM_DIR}/examples/configs/curated/nemotron-3-super-throughput.yaml ``` -Note: if you don't have access to the source code locally, you can manually create the YAML config file using the code in the dropdown below. +Note: if you don't have access to the source code locally, you can manually create the YAML config file using the code in the dropdowns below. -````{admonition} Show code +````{admonition} Show Nemotron v3 Ultra config +:class: dropdown + +```{literalinclude} ../../../examples/configs/curated/nemotron-3-ultra-throughput.yaml +--- +language: shell +prepend: | + EXTRA_LLM_API_FILE=/tmp/config.yml + + cat << EOF > ${EXTRA_LLM_API_FILE} +append: EOF +--- +``` +```` + +````{admonition} Show Nemotron v3 Super config :class: dropdown ```{literalinclude} ../../../examples/configs/curated/nemotron-3-super-throughput.yaml @@ -81,16 +137,25 @@ append: EOF ``` ```` +The Ultra config is a starting point tuned for max throughput on 4x B200; adjust the parallelism, batch sizes, and KV cache fraction to match your hardware and traffic pattern. + ### Launch the TensorRT LLM Server -Below are example commands to launch the TensorRT LLM server with the Nemotron v3 Super model from within the container. +Below are example commands to launch the TensorRT LLM server from within the container. Make sure `EXTRA_LLM_API_FILE` points to the config that matches your model (see above). + +**Nemotron v3 Ultra — NVFP4 model (recommended):** + +```shell +trtllm-serve nvidia/NVIDIA-Nemotron-3-Ultra-550B-A55B-NVFP4 --host 0.0.0.0 --port 8000 --reasoning_parser nemotron-v3 --tool_parser qwen3_coder --config ${EXTRA_LLM_API_FILE} +``` -**NVFP4 model (recommended, lowest memory footprint):** +**Nemotron v3 Super — NVFP4 model (recommended, lowest memory footprint):** ```shell trtllm-serve nvidia/NVIDIA-Nemotron-3-Super-120B-A12B-NVFP4 --host 0.0.0.0 --port 8000 --reasoning_parser nano-v3 --tool_parser qwen3_coder --config ${EXTRA_LLM_API_FILE} ``` +The `nemotron-v3` and `nano-v3` reasoning parsers are aliases for the same Nemotron v3 parser and are interchangeable. Reasoning can be toggled per request by passing `enable_thinking` through `chat_template_kwargs` in the request body, for example `{"chat_template_kwargs": {"enable_thinking": true}}` (set it to `false` to disable reasoning). After the server is set up, the client can now send prompt requests to the server and receive results. @@ -102,7 +167,7 @@ These options provide control over TensorRT LLM's behavior and are set within th #### `tensor_parallel_size` -* **Description:** Sets the **tensor-parallel size**. This should typically match the number of GPUs you intend to use for a single model instance. For BF16, use 4 or more GPUs on H100/H200. For NVFP4, 2 GPUs on H100/H200 may suffice. +* **Description:** Sets the **tensor-parallel size**. This should typically match the number of GPUs you intend to use for a single model instance. For Super BF16, use 4 or more GPUs on H100/H200; for Super NVFP4, 2 GPUs on H100/H200 may suffice. For Ultra NVFP4, use 4 GPUs (single node on B200). #### `moe_expert_parallel_size` @@ -158,11 +223,11 @@ curl -s -o /dev/null -w "Status: %{http_code}\n" "http://localhost:8000/health" When the `Status: 200` code is returned, the server is ready for queries. Note that the very first query may take longer due to initialization and compilation. -After the TensorRT LLM server is set up and shows Application startup complete, you can send requests to the server. +After the TensorRT LLM server is set up and shows Application startup complete, you can send requests to the server. The example below uses Nemotron v3 Ultra; replace the `model` field with the model you launched (for example `nvidia/NVIDIA-Nemotron-3-Super-120B-A12B-NVFP4`). ```shell curl http://localhost:8000/v1/chat/completions -H "Content-Type: application/json" -d '{ - "model": "nvidia/NVIDIA-Nemotron-3-Super-120B-A12B-NVFP4", + "model": "nvidia/NVIDIA-Nemotron-3-Ultra-550B-A55B-NVFP4", "messages": [ { "role": "user", @@ -182,7 +247,7 @@ Here is an example response: "id": "chatcmpl-abc123def456", "object": "chat.completion", "created": 1759022940, - "model": "nvidia/NVIDIA-Nemotron-3-Super-120B-A12B-NVFP4", + "model": "nvidia/NVIDIA-Nemotron-3-Ultra-550B-A55B-NVFP4", "choices": [ { "index": 0, @@ -209,7 +274,7 @@ Here is an example response: * For performance issues, check GPU utilization with `nvidia-smi` while the server is running. * If the container fails to start, verify that the NVIDIA Container Toolkit is properly installed. * For connection issues, make sure the server port (`8000` in this guide) is not being used by another application. -* Nemotron v3 Super is a hybrid SSM/attention model with MoE — ensure you have sufficient GPU memory for the full 120B parameter weights even though only 12B parameters are active per token. +* Nemotron v3 is a hybrid SSM/attention model with MoE — ensure you have sufficient GPU memory for the full parameter weights even though only a fraction of parameters are active per token (12B for Super, 55B for Ultra). ## Benchmarking Performance @@ -220,14 +285,14 @@ cat <<'EOF' > bench.sh #!/usr/bin/env bash set -euo pipefail -# Adjust the model name based on which Nemotron v3 Super variant you're benchmarking -MODEL_NAME="nvidia/NVIDIA-Nemotron-3-Super-120B-A12B-NVFP4" +# Adjust the model name based on which Nemotron v3 variant you're benchmarking +MODEL_NAME="nvidia/NVIDIA-Nemotron-3-Ultra-550B-A55B-NVFP4" concurrency_list="1 2 4 8 16 32 64 128" multi_round=5 isl=1024 osl=1024 -result_dir=/tmp/nemotron_super_output +result_dir=/tmp/nemotron_v3_output for concurrency in ${concurrency_list}; do num_prompts=$((concurrency * multi_round)) diff --git a/docs/source/deployment-guide/deployment-guide-for-qwen3-next-on-trtllm.md b/docs/source/deployment-guide/deployment-guide-for-qwen3.5-on-trtllm.md similarity index 53% rename from docs/source/deployment-guide/deployment-guide-for-qwen3-next-on-trtllm.md rename to docs/source/deployment-guide/deployment-guide-for-qwen3.5-on-trtllm.md index ea46ae8107d7..dfb0f6192a14 100644 --- a/docs/source/deployment-guide/deployment-guide-for-qwen3-next-on-trtllm.md +++ b/docs/source/deployment-guide/deployment-guide-for-qwen3.5-on-trtllm.md @@ -1,8 +1,8 @@ -# Deployment Guide for Qwen3 Next on TensorRT LLM - Blackwell & Hopper Hardware +# Deployment Guide for Qwen3.5 on TensorRT LLM - Blackwell & Hopper Hardware ## Introduction -This is a functional quick-start guide for running the Qwen3-Next model on TensorRT LLM. It focuses on a working setup with recommended defaults. Additional performance optimizations and support will be rolled out in future updates. +This deployment guide provides step-by-step instructions for running the Qwen3.5-397B-A17B model using TensorRT LLM. It covers model access, environment setup, server configuration, and inference validation. ## Prerequisites @@ -14,20 +14,47 @@ This is a functional quick-start guide for running the Qwen3-Next model on Tenso ## Models -* BF16 model: [Qwen3-Next-80B-A3B-Thinking](https://huggingface.co/Qwen/Qwen3-Next-80B-A3B-Thinking) +* [nvidia/Qwen3.5-397B-A17B-NVFP4](https://huggingface.co/nvidia/Qwen3.5-397B-A17B-NVFP4) +* [Qwen/Qwen3.5-397B-A17B](https://huggingface.co/Qwen/Qwen3.5-397B-A17B) (base, BF16) + +## GPU Requirements + +The NVFP4 checkpoint is the recommended (and minimum-footprint) deployment precision for Qwen3.5. It quantizes the linear layers in the MoE blocks to NVFP4 and uses an FP8 KV cache. + +| Platform | Minimum GPUs | +|----------|--------------| +| B200 | 4x B200 | +| B300 | 4x B300 | +| GB200 | 4x GB200 | +| GB300 | 4x GB300 | + +The NVFP4 checkpoint has been validated on B200 with `tensor_parallel_size = 4`. A single node of 4 Blackwell GPUs fits the NVFP4 weights plus the KV cache with headroom. ## Deployment Steps ### Run Docker Container -Build and run the docker container. See the [Docker guide](../../../docker/README.md) for details. +Run the docker container using the TensorRT LLM NVIDIA NGC image. + +```shell +docker run --rm -it \ +--ipc=host \ +--gpus all \ +-p 8000:8000 \ +-v ~/.cache:/root/.cache:rw \ +--name tensorrt_llm \ +nvcr.io/nvidia/tensorrt-llm/release:x.y.z \ +/bin/bash ``` -cd TensorRT-LLM -make -C docker release_build IMAGE_TAG=qwen3-next-local +Note: -make -C docker release_run IMAGE_NAME=tensorrt_llm IMAGE_TAG=qwen3-next-local LOCAL_USER=1 -``` +* The command mounts your user `.cache` directory to save the downloaded model checkpoints which are saved to `~/.cache/huggingface/hub/` by default. This prevents having to redownload the weights each time you rerun the container. If the `~/.cache` directory doesn't exist please create it using `$ mkdir ~/.cache`. +* You can mount additional directories and paths using the `-v :` flag if needed, such as mounting the downloaded weight paths. +* The command also maps port `8000` from the container to your host so you can access the LLM API endpoint from your host. +* See the for all the available containers. The containers published in the main branch weekly have `rcN` suffix, while the monthly release with QA tests has no `rcN` suffix. Use the `rc` release to get the latest model and feature support. + +If you want to use latest main branch, you can choose to build from source to install TensorRT LLM, the steps refer to [https://nvidia.github.io/TensorRT-LLM/latest/installation/build-from-source.html](https://nvidia.github.io/TensorRT-LLM/latest/installation/build-from-source.html) ### Recommended Performance Settings @@ -35,7 +62,7 @@ We maintain YAML configuration files with recommended performance settings in th ```shell TRTLLM_DIR=/app/tensorrt_llm # change as needed to match your environment -EXTRA_LLM_API_FILE=${TRTLLM_DIR}/examples/configs/curated/qwen3-next.yaml +EXTRA_LLM_API_FILE=${TRTLLM_DIR}/examples/configs/curated/qwen3.5.yaml ``` Note: if you don't have access to the source code locally, you can manually create the YAML config file using the code in the dropdown below. @@ -43,7 +70,7 @@ Note: if you don't have access to the source code locally, you can manually crea ````{admonition} Show code :class: dropdown -```{literalinclude} ../../../examples/configs/curated/qwen3-next.yaml +```{literalinclude} ../../../examples/configs/curated/qwen3.5.yaml --- language: shell prepend: | @@ -55,15 +82,18 @@ append: EOF ``` ```` +The config is a starting point tuned for max throughput on 4x B200; adjust the parallelism, batch sizes, and KV cache fraction to match your hardware and traffic pattern. ### Launch the TensorRT LLM Server -Below is an example command to launch the TensorRT LLM server with the Qwen3-Next model from within the container. +Below is an example command to launch the TensorRT LLM server with the Qwen3.5 NVFP4 model from within the container. ```shell -trtllm-serve Qwen/Qwen3-Next-80B-A3B-Thinking --host 0.0.0.0 --port 8000 --reasoning_parser deepseek-r1 --config ${EXTRA_LLM_API_FILE} +trtllm-serve nvidia/Qwen3.5-397B-A17B-NVFP4 --host 0.0.0.0 --port 8000 --reasoning_parser qwen3_5 --tool_parser qwen3 --config ${EXTRA_LLM_API_FILE} ``` +Qwen3.5 uses the `qwen3_5` reasoning parser (its chat template pre-injects a `` block, so reasoning starts at the beginning of the response). The `qwen3` tool parser handles the Qwen3 function-call format. + After the server is set up, the client can now send prompt requests to the server and receive results. ### LLM API Options (YAML Configuration) @@ -80,12 +110,15 @@ These options provide control over TensorRT LLM's behavior and are set within th * **Description:** Sets the **expert-parallel size** for Mixture-of-Experts (MoE) models. Like `tensor_parallel_size`, this should generally match the number of GPUs you're using. This setting has no effect on non-MoE models. +#### `enable_attention_dp` + +* **Description:** Enables **attention data parallelism** for the attention/linear-attention layers while keeping the MoE expert-parallel. This generally improves throughput at high concurrency and long context. + #### `kv_cache_config.free_gpu_memory_fraction` * **Description:** A value between `0.0` and `1.0` that specifies the fraction of free GPU memory to reserve for the KV cache after the model is loaded. Since memory usage can fluctuate, this buffer helps prevent out-of-memory (OOM) errors. * **Recommendation:** If you experience OOM errors, try reducing this value to `0.7` or lower. - #### `max_batch_size` * **Description:** The maximum number of user requests that can be grouped into a single batch for processing. The actual max batch size that can be achieved depends on total sequence length (input + output). @@ -147,7 +180,7 @@ After the TensorRT LLM server is set up and shows Application startup complete, ```shell curl http://localhost:8000/v1/chat/completions -H "Content-Type: application/json" -d '{ - "model": "Qwen/Qwen3-Next-80B-A3B-Thinking", + "model": "nvidia/Qwen3.5-397B-A17B-NVFP4", "messages": [ { "role": "user", @@ -159,21 +192,14 @@ curl http://localhost:8000/v1/chat/completions -H "Content-Type: application/jso }' -w "\n" ``` -Here is an example response: - -``` -{"id":"chatcmpl-64ac201c77bf46a7a3a4eca7759b1fd8","object":"chat.completion","created":1759022940,"model":"Qwen/Qwen3-Next-80B-A3B-Thinking","choices":[{"index":0,"message":{"role":"assistant","content":"Okay, the user is asking \"Where is New York?\" Hmm, this seems straightforward but I need to be careful. New York could mean different things—maybe they're confused about the city versus the state. \n\nFirst thought: Are they a tourist planning a trip? Or maybe a student doing homework? Could even be someone国外 who's only heard \"New York\" in movies and isn't sure if it's a city or state. \n\nI should clarify both possibilities immediately. People often mix them up. Like, if someone says \"I'm going to New York\" they're probably talking about NYC, but technically New York State is bigger. \n\nLet me break it down: \n- New York City (NYC) is the famous one—Manhattan, skyscrapers, Times Square. \n- Then New York State (NY) is the whole state, which includes NYC but also upstate areas like Albany (the capital), Buffalo, and even the Adirondacks. \n\nWait, should I mention that NYC is in New York State? Yeah, that's crucial. Otherwise they might think it's two separate things. Also, where is the state located? Northeast US, borders other states like Pennsylvania, New Jersey... maybe name a few neighbors for context. \n\nOh! And the city vs state confusion is super common. Like, people say \"New York\" for the city but forget it's part of a larger state. Should I give examples? \n- \"If someone says 'hot dogs in New York' they mean NYC\" \n- But \"the New York State Police\" covers the whole state\" \n\n...Maybe add a fun fact? Like how NYC is just one city within the state? Or that the state capital isn't NYC but Albany? Yeah, that'll help clear confusion. \n\nAlso—should I ask if they meant the city or the state? Nah, better to cover both upfront. Keep it simple but precise. No jargon. They might not know terms like \"metropolitan area\" or \"boroughs,\" so explain \"boroughs\" as neighborhoods (Manhattan, Brooklyn etc.). \n\nCoordinates: 40.7°N, 74°W? Maybe overkill unless they're into geography. But for the state, roughly 42°N to 45°N latitude? Hmm, probably unnecessary. Stick to landmarks: borders Lake Erie, Atlantic coast... \n\nWait—user might be asking literally for GPS coordinates? Unlikely, but just in case I can add: \"Geographically, New York City is at approximately 40.7°N latitude and 74.0°W longitude...\" but only if the answer feels too dry otherwise. \n\nPriority: Clear, simple, correct. No assuming prior knowledge. Say \"New York can refer to...\" then split into two cases. End with \"Most people mean the city when they say 'New York' in casual talk.\" That’s the key takeaway. \n\n...Double-check: Is Albany really the capital? Yes. And NYC is the largest city but not capital. Got it. Also, New York State is the 27th largest by area? Maybe not relevant. Stick to basics. \n\nFinal structure: \n1. \"New York can mean two things: the city or the state.\" \n2. For city: \n - Where it is (Northeast US) \n - Inside New York State \n - Famous parts (Manhattan etc.) \n3. For state: \n - Larger area, includes city \n - Borders (PA, NJ, CT, MA, VT, Canada) \n - Capital is Albany (not NYC!) \n4. Clear summary: \"In everyday talk, 'New York' usually means NYC.\" \n\nYeah. That covers it without overwhelming them. No markdown, just plain English. Keep it warm—add a \"hope that helps!\" at the end.\n\n\nThat's a common point of confusion! **\"New York\" can refer to two different things**, and it's important to distinguish between them:\n\n### 1. **New York City (NYC)** \n - **What it is**: The largest and most famous city in the United States, known for landmarks like Times Square, Central Park, the Statue of Liberty, and Wall Street. \n - **Where it is**: \n - Located in the **northeastern United States**. \n - Situated at the mouth of the **Hudson River**, where it meets the **Atlantic Ocean**. \n - Part of **New York State** (see below). \n - **Geographic details**: \n - Coordinates: Approximately **40.7° N latitude, 74.0° W longitude**. \n - Composed of **5 boroughs**: Manhattan (the \"city\" most people picture), Brooklyn, Queens, The Bronx, and Staten Island. \n - Panoramic view of NYC (including Brooklyn and New Jersey skyline):","reasoning_content":null,"reasoning":null,"tool_calls":[]},"logprobs":null,"finish_reason":"length","stop_reason":null,"mm_embedding_handle":null,"disaggregated_params":null,"avg_decoded_tokens_per_iter":1.0}],"usage":{"prompt_tokens":15,"total_tokens":1039,"completion_tokens":1024},"prompt_token_ids":null} -``` - ### Troubleshooting Tips -* If you encounter CUDA out-of-memory errors, try reducing `max_batch_size` or `max_seq_len`. +* If you encounter CUDA out-of-memory errors, try reducing `max_batch_size`, `max_num_tokens`, or `kv_cache_config.free_gpu_memory_fraction`. * Ensure your model checkpoints are compatible with the expected format. -* For performance issues, check GPU utilization with nvidia-smi while the server is running. +* For performance issues, check GPU utilization with `nvidia-smi` while the server is running. * If the container fails to start, verify that the NVIDIA Container Toolkit is properly installed. * For connection issues, make sure the server port (`8000` in this guide) is not being used by another application. -* If you are using trtllm-serve and the thinking model of Qwen3-Next, make sure to add this server arg `--reasoning_parser deepseek-r1`. - +* Reasoning is controlled with `--reasoning_parser qwen3_5`. To toggle thinking per request, pass `enable_thinking` through `chat_template_kwargs` in the request body, for example `{"chat_template_kwargs": {"enable_thinking": true}}` (set it to `false` to disable reasoning). ## Benchmarking Performance @@ -184,16 +210,18 @@ cat <<'EOF' > bench.sh #!/usr/bin/env bash set -euo pipefail +MODEL_NAME="nvidia/Qwen3.5-397B-A17B-NVFP4" + concurrency_list="1 2 4 8 16 32 64 128 256" multi_round=5 isl=1024 osl=1024 -result_dir=/tmp/qwen3_output +result_dir=/tmp/qwen3_5_output for concurrency in ${concurrency_list}; do num_prompts=$((concurrency * multi_round)) python -m tensorrt_llm.serve.scripts.benchmark_serving \ - --model Qwen/Qwen3-Next-80B-A3B-Thinking \ + --model ${MODEL_NAME} \ --backend openai \ --dataset-name "random" \ --random-input-len ${isl} \ diff --git a/docs/source/deployment-guide/index.rst b/docs/source/deployment-guide/index.rst index 9c30c72f8698..db0f537908d0 100644 --- a/docs/source/deployment-guide/index.rst +++ b/docs/source/deployment-guide/index.rst @@ -28,12 +28,12 @@ The deployment guides below provide more detailed instructions for serving speci :maxdepth: 1 :name: Deployment Guides - deployment-guide-for-nemotron-3-super-on-trtllm.md + deployment-guide-for-nemotron-3-on-trtllm.md deployment-guide-for-deepseek-r1-on-trtllm.md deployment-guide-for-llama3.3-70b-on-trtllm.md deployment-guide-for-llama4-scout-on-trtllm.md deployment-guide-for-gpt-oss-on-trtllm.md deployment-guide-for-qwen3-on-trtllm.md - deployment-guide-for-qwen3-next-on-trtllm.md + deployment-guide-for-qwen3.5-on-trtllm.md deployment-guide-for-kimi-k2-thinking-on-trtllm.md deployment-guide-for-glm-5-on-trtllm.md diff --git a/docs/source/features/auto_deploy/auto-deploy.md b/docs/source/features/auto_deploy/auto-deploy.md index d9bdc548ed58..35f33ae8c88f 100644 --- a/docs/source/features/auto_deploy/auto-deploy.md +++ b/docs/source/features/auto_deploy/auto-deploy.md @@ -53,6 +53,10 @@ The exported graph then undergoes a series of automated transformations, includi - [Support Matrix](support_matrix.md) +## API Reference + +- [AutoDeploy Transforms](transforms.rst) + ## Advanced Usage - [Example Run Script](./advanced/example_run.md) diff --git a/docs/source/features/auto_deploy/pipeline_cache_design.md b/docs/source/features/auto_deploy/pipeline_cache_design.md new file mode 100644 index 000000000000..d3ceaec65a1a --- /dev/null +++ b/docs/source/features/auto_deploy/pipeline_cache_design.md @@ -0,0 +1,334 @@ + + +# AutoDeploy Pipeline Cache Design + +## Summary + +The AutoDeploy pipeline cache skips the expensive front half of the AutoDeploy transform pipeline +for repeated runs of the same model, checkpoint, distributed configuration, and transform prefix. + +The cache point is represented as a normal AutoDeploy transform named `pipeline_cache`. On a cache +miss, the transform snapshots the incoming pre-weight-loading module. On a cache hit, the optimizer +restores that snapshot before running the transform prefix and resumes execution immediately after +the cache point. + +The current implementation intentionally supports only the minimal surface needed by the validated +pipeline cache path: + +- FX `GraphModule` snapshots, including wrappers that contain `GraphModule` children. +- Pre-weight-loading modules. +- Declarative load-state-dict pre-hooks required by export, sharding, deduplication, and aliasing. +- Per-rank cache entries for distributed runs. + +Unsupported hooks and unsupported module shapes cause cache save/restore to be skipped instead of +adding broader serialization logic. + +## Goals + +- Reduce repeated AutoDeploy startup time by avoiding rebuild/export/pattern-match/sharding work + before the configured cache point. +- Keep cache correctness tied to model identity, checkpoint identity, transform-prefix config, and + relevant distributed config. +- Store artifacts that are durable across processes without depending on raw FX graph pickling. +- Keep the supported hook surface explicit and small. +- Fail open: if a cache entry is missing, invalid, or unsupported, run the normal pipeline. + +## Non-Goals + +- Caching post-weight-loading modules or GPU-resident parameters. +- Supporting arbitrary Python hooks. +- Supporting forward hooks. +- Making cache entries portable across arbitrary code changes. +- Replacing later runtime compilation, KV cache allocation, or CUDA graph capture. + +## Pipeline Placement + +`pipeline_cache` must be placed at or before the sharding stage and before `load_weights`. + +```text +build_model -> export_to_gm -> pattern transforms -> sharding -> pipeline_cache + -> load_weights -> post-load fusion -> cache init -> compile +``` + +On a miss, execution is unchanged except the cache transform writes an artifact at the cache point. +On a hit, the optimizer restores the cached module and resumes after `pipeline_cache`: + +```text +restore cached module -> load_weights -> post-load fusion -> cache init -> compile +``` + +This placement keeps weights out of the artifact while still skipping the expensive model build, +export, graph cleanup, pattern matching, and sharding prefix. + +## Optimizer Integration + +`InferenceOptimizer` keeps two versions of the transform config: + +- `self.config`: the normal config used to run transforms. +- `self._cache_key_config`: a deep copy captured before transforms mutate config objects. + +Before running transforms, the optimizer asks cache-capable transforms whether they can restore: + +```text +InferenceOptimizer.__call__ + -> _maybe_restore_from_cache() + -> PipelineCache.maybe_restore() +``` + +If restore succeeds, the optimizer starts at the transform immediately after `pipeline_cache`. +If restore fails or misses, the optimizer starts from the beginning. + +The cache transform receives the stable `self._cache_key_config` so cache keys are based on the +original user configuration, not on mutations performed by earlier transforms. + +## Cache Key + +The cache key is a hash of: + +- Model identity from `ModelFactory.get_pipeline_cache_model_identifier()`. +- Checkpoint fingerprint from `ModelFactory.get_pipeline_cache_checkpoint_fingerprint()`. +- Hash of transform configs before the `pipeline_cache` transform. +- Distributed config when the cached prefix includes sharding-stage transforms. + +The distributed config excludes rank, so all ranks in the same run agree on the same cache entry +directory but write separate rank subdirectories. + +The cache entry path is: + +```text +{root}/{cache_key}/rank_{rank}/ +``` + +The default root is: + +```text +~/.cache/tensorrt_llm/auto_deploy/pipeline_cache +``` + +## Cache Reuse Across Config Changes + +The cache key covers only the model/checkpoint identity, the transform configs before +`pipeline_cache`, and the distributed topology needed by that prefix. On a hit, the optimizer resumes +at the transform immediately after `pipeline_cache`, so later transforms and executor/runtime setup +run with the current run's configuration. + +For example YAML files such as `examples/auto_deploy/nano_v3.yaml`, +`examples/auto_deploy/nano_v3_multi_device.yaml`, and the files under +`examples/auto_deploy/model_registry/configs/`, use this rule: + +- Fields that are only used after `pipeline_cache` can change and still reuse the same cache entry. + This includes all `transforms.*` entries whose stage is after the `pipeline_cache` stage. +- Fields used at or before `pipeline_cache` must be kept fixed for cache reuse, because changing them + changes the module snapshot that the cache is meant to represent. + +Common top-level fields in those YAML configs: + +- `max_batch_size`: cache-reusable. It sizes runtime buffers, schedulers, and CUDA graph capture after + restore. +- `enable_chunked_prefill`: cache-reusable. It is consumed by runtime scheduling after model + optimization. +- `attn_backend`: cache-reusable for the default graph pipeline configs. The shortcut updates cached + attention insertion, which runs after `pipeline_cache`. +- `compile_backend` and `cuda_graph_config`: cache-reusable. They affect compile/CUDA graph work after + restore. +- `kv_cache_config`: cache-reusable when it only changes cache allocation/runtime sizing. +- `max_seq_len`: not generally cache-reusable today. Although Nano-style configs mark it as tunable, + pre-cache graph rewrites can consult the factory's `max_seq_len` before `pipeline_cache`. Clear the + cache, move the cache point earlier, or extend the cache key before relying on cache reuse across + `max_seq_len` changes. +- `max_num_tokens`: cache-reusable only when it is not embedded by pre-cache sharding. MoE all-to-all + sharding paths can write this value into graph ops before the default cache point, so treat it as + cache-affecting for those configs. + +The important boundary is behavioral, not the field name. If a field changes graph construction, +export, pattern matching, quantization, sharding, hook generation, or distributed layout before the +cache point, it must either be included in the cache key or cause a cache miss. Examples include model +identity, checkpoint identity, tokenizer/model kwargs that affect model construction, transform +configs before `pipeline_cache`, and distributed topology when sharding is in the cached prefix. + +## Artifacts + +Each rank directory contains three files: + +```text +manifest.json +module.pt +hooks.json +``` + +`module.pt` stores the structural module snapshot. + +`hooks.json` stores load-state-dict pre-hook specs that are scrubbed before `module.pt` is written +and reattached after restore. + +`manifest.json` stores: + +- Cache key. +- Rank. +- SHA-256 checksums for `module.pt` and `hooks.json`. + +Restore only proceeds when every rank directory for the world size has all required files and the +local manifest/checksums match. + +## Save Flow + +On a miss, `PipelineCache._save_module()` performs: + +1. Synchronize ranks. +1. Create a per-rank temporary directory. +1. Validate the module is pre-weight-loading. +1. Collect supported load hook specs. +1. Reject forward hooks and unsupported load hooks. +1. Temporarily clear load hooks from the module. +1. Write `module.pt`. +1. Restore the in-memory load hooks. +1. Write `hooks.json`. +1. Write `manifest.json` with file checksums. +1. Atomically publish the temporary rank directory. +1. Synchronize ranks. + +If any rank fails to save, all ranks skip the cache entry and remove partial output. + +## Restore Flow + +On a hit, `PipelineCache.maybe_restore()` performs: + +1. Build the expected cache context and cache key. +1. Check that every rank directory has a complete snapshot. +1. Validate local manifest and file checksums. +1. Collectively agree that all ranks can restore. +1. Load `module.pt`. +1. Load `hooks.json`. +1. Rebuild and reattach supported load hooks. +1. Collectively agree restore succeeded. +1. Return the restored module to the optimizer. + +If any step fails on any rank, restore returns `None` and the normal transform pipeline runs. + +## Structural Module Snapshot + +Raw `GraphModule` pickling is brittle because it can capture private FX state, live node objects, +runtime-only module fields, and direct self-references. The cache therefore stores a structural +payload instead of pickling the FX graph directly. + +For a direct `GraphModule`, `module.pt` stores: + +- GraphModule class name. +- Sanitized GraphModule body. +- Ordered graph node state. +- Importable or literal node targets. +- Structurally encoded node args/kwargs. +- Pickleable node metadata. +- Fake tensor specs for placeholder/get_attr `meta["val"]`. +- PyTree codegen state when present. +- Rebindable GraphModule bound-method specs. + +For wrapper modules, the cache: + +1. Finds root `GraphModule` children. +1. Replaces each child with a temporary placeholder during `torch.save`. +1. Saves the wrapper plus structural payloads for the child graph modules. +1. Restores the original children in memory after saving. + +On load, structural graph state is reconstructed into new `GraphModule` objects and inserted back +into the wrapper. + +After restore, cached shape metadata tied to weight nodes is marked invalid so later transforms do +not trust stale shape-prop history. + +## Hook Contract + +Load hooks are not serialized inside `module.pt`. Instead, the cache serializes a small declarative +hook spec surface in `hooks.json`. + +Supported hook types: + +- `importable_load_hook`: importable functions, partials without positional args, and bound methods + whose owner can be represented as JSON. +- `shard_tp`: tensor-parallel sharding hooks used by the validated sharding path. +- `dedup`: parameter deduplication hooks from export. +- `alias`: aliasing hooks from export. + +Unsupported: + +- Load-state-dict post hooks. +- `with_module=True` load hooks. +- Unknown marked hook specs. +- Arbitrary closures. +- Forward pre-hooks and forward hooks. + +Unsupported hooks cause cache save to be skipped. This keeps the restore implementation small and +prevents false confidence from serializing hooks that are not needed by the validated cache path. + +## Distributed Behavior + +Each rank writes and restores its own rank-local snapshot. A cache entry is considered valid only +when all rank directories exist for the expected `world_size`. + +Collective boolean checks are used for save and restore agreement: + +- If any rank cannot save, no rank publishes a usable cache hit. +- If any rank cannot restore, all ranks fall back to the normal pipeline. + +The cache key excludes rank but includes distributed topology when the cached prefix reaches +sharding. This allows rank-local artifacts under a shared cache entry while avoiding cross-topology +reuse. + +## Failure Behavior + +The cache is best-effort. Failures do not fail the model build unless they happen after normal +pipeline execution resumes. + +Examples that skip cache save/restore: + +- Missing files. +- Manifest mismatch. +- Checksum mismatch. +- Unsupported module payload. +- Materialized parameters. +- Unsupported hooks. +- Any rank failing distributed agreement. + +The expected fallback is to run the original AutoDeploy pipeline and optionally overwrite the cache +entry with a valid snapshot on the miss path. + +## Validated Coverage + +The current minimal hook surface was validated by deleting the cache root and running each model +twice: + +- `Qwen/Qwen3.5-35B-A3B` with world size 2. +- `google/gemma-4-26B-A4B-it`. +- `zai-org/GLM-4.7-Flash`. + +The first pass created fresh cache entries. The second pass restored from those entries. + +Fresh cache hook specs were: + +```text +Qwen rank 0/1: importable_load_hook, shard_tp +Gemma rank 0: alias, dedup, importable_load_hook +GLM rank 0: importable_load_hook +``` + +The focused unit test suite also passed: + +```bash +TLLM_DISABLE_MPI=1 pytest -vv tests/unittest/auto_deploy/singlegpu/transformations/test_pipeline_cache.py +``` + +Result: + +```text +42 passed +``` + +## Open Items + +- Decide whether to expose cache diagnostics in a structured way instead of relying on log lines. +- Decide whether future quantized/sharded paths should opt into cache support by adding explicit + hook specs, or remain cache-miss paths. +- Consider adding a small cache inspection tool for artifact summaries and hook-spec counts. diff --git a/docs/source/features/auto_deploy/transforms.rst b/docs/source/features/auto_deploy/transforms.rst new file mode 100644 index 000000000000..b1d9e9ba183d --- /dev/null +++ b/docs/source/features/auto_deploy/transforms.rst @@ -0,0 +1,30 @@ +.. SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. +.. SPDX-License-Identifier: Apache-2.0 + +AutoDeploy Transforms +===================== + +This section documents the AutoDeploy transform interfaces and registered +pipeline transforms. Use the stage pages to find where a transform runs in the +optimization pipeline, what graph or runtime change it performs, and which +configuration fields are available. + +For an overview of how transforms fit into the AutoDeploy pipeline, see +:doc:`auto-deploy`. For information on configuring which transforms run and in +what order, see :doc:`advanced/expert_configurations`. + +.. toctree:: + :maxdepth: 1 + + transforms/core + transforms/factory + transforms/export + transforms/post_export + transforms/pattern_matcher + transforms/sharding + transforms/weight_load + transforms/post_load_fusion + transforms/cache_init + transforms/visualize + transforms/compile + transforms/additional diff --git a/docs/source/features/auto_deploy/transforms/additional.rst b/docs/source/features/auto_deploy/transforms/additional.rst new file mode 100644 index 000000000000..87b92d93924c --- /dev/null +++ b/docs/source/features/auto_deploy/transforms/additional.rst @@ -0,0 +1,12 @@ +.. SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. +.. SPDX-License-Identifier: Apache-2.0 + +Additional Registered Transforms +================================ + +These transforms are registered in the AutoDeploy transform library but are not +part of the standard graph-mode or transformers-mode pipelines. They are useful +for specialized experiments, explicit opt-in configurations, or development +workflows. + +.. trtllm_auto_deploy_additional_transforms:: diff --git a/docs/source/features/auto_deploy/transforms/cache_init.rst b/docs/source/features/auto_deploy/transforms/cache_init.rst new file mode 100644 index 000000000000..105a12b1db24 --- /dev/null +++ b/docs/source/features/auto_deploy/transforms/cache_init.rst @@ -0,0 +1,12 @@ +.. SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. +.. SPDX-License-Identifier: Apache-2.0 + +Cache Initialization Stage +========================== + +Cache initialization rewrites attention and recurrent state operations for +cached inference. This stage prepares runtime cache resources such as KV-cache +storage, SSM state, residual hidden-state capture, and model-specific cache +metadata. + +.. trtllm_auto_deploy_transform_stage:: cache_init diff --git a/docs/source/features/auto_deploy/transforms/compile.rst b/docs/source/features/auto_deploy/transforms/compile.rst new file mode 100644 index 000000000000..1dc46362b6a3 --- /dev/null +++ b/docs/source/features/auto_deploy/transforms/compile.rst @@ -0,0 +1,12 @@ +.. SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. +.. SPDX-License-Identifier: Apache-2.0 + +Compilation Stage +================= + +Compilation is the final transform stage before execution. It applies +runtime-oriented and compiler-oriented changes after graph structure, weights, +and caches are ready, such as multi-stream kernels, final cleanup, and CUDA graph +or ``torch.compile`` execution. + +.. trtllm_auto_deploy_transform_stage:: compile diff --git a/docs/source/features/auto_deploy/transforms/core.rst b/docs/source/features/auto_deploy/transforms/core.rst new file mode 100644 index 000000000000..5ad73ec5ec00 --- /dev/null +++ b/docs/source/features/auto_deploy/transforms/core.rst @@ -0,0 +1,41 @@ +.. SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. +.. SPDX-License-Identifier: Apache-2.0 + +Core Transform APIs +=================== + +Common Transform Configuration +------------------------------ + +Most transforms accept these common fields. Stage pages also show +transform-specific configuration models when a transform extends this base +configuration. + +.. autopydantic_model:: tensorrt_llm._torch.auto_deploy.transform.interface.TransformConfig + :members: + :show-inheritance: + :no-index: + +Transform Interface +------------------- + +.. automodule:: tensorrt_llm._torch.auto_deploy.transform.interface + :members: + :undoc-members: + :show-inheritance: + +Optimizer +--------- + +.. automodule:: tensorrt_llm._torch.auto_deploy.transform.optimizer + :members: + :undoc-members: + :show-inheritance: + +Graph Module Visualizer +----------------------- + +.. automodule:: tensorrt_llm._torch.auto_deploy.transform.graph_module_visualizer + :members: + :undoc-members: + :show-inheritance: diff --git a/docs/source/features/auto_deploy/transforms/export.rst b/docs/source/features/auto_deploy/transforms/export.rst new file mode 100644 index 000000000000..b4613f158c61 --- /dev/null +++ b/docs/source/features/auto_deploy/transforms/export.rst @@ -0,0 +1,11 @@ +.. SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. +.. SPDX-License-Identifier: Apache-2.0 + +Export Stage +============ + +Export converts the model into a graph representation that later stages can +inspect and rewrite. After this point, transforms operate on graph structure +rather than only on the original model object. + +.. trtllm_auto_deploy_transform_stage:: export diff --git a/docs/source/features/auto_deploy/transforms/factory.rst b/docs/source/features/auto_deploy/transforms/factory.rst new file mode 100644 index 000000000000..145bf66a49b3 --- /dev/null +++ b/docs/source/features/auto_deploy/transforms/factory.rst @@ -0,0 +1,11 @@ +.. SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. +.. SPDX-License-Identifier: Apache-2.0 + +Factory Stage +============= + +Factory transforms create or wrap the starting model object for AutoDeploy. This +stage establishes the module that later graph, weight-loading, cache, and +runtime transforms will optimize. + +.. trtllm_auto_deploy_transform_stage:: factory diff --git a/docs/source/features/auto_deploy/transforms/pattern_matcher.rst b/docs/source/features/auto_deploy/transforms/pattern_matcher.rst new file mode 100644 index 000000000000..84c82703cd52 --- /dev/null +++ b/docs/source/features/auto_deploy/transforms/pattern_matcher.rst @@ -0,0 +1,12 @@ +.. SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. +.. SPDX-License-Identifier: Apache-2.0 + +Pattern Matching Stage +====================== + +Pattern matching canonicalizes model-specific PyTorch graphs into AutoDeploy's +standard graph representation. These transforms identify attention, MoE, +normalization, quantization, activation, and layout patterns before sharding and +post-load fusion run. + +.. trtllm_auto_deploy_transform_stage:: pattern_matcher diff --git a/docs/source/features/auto_deploy/transforms/post_export.rst b/docs/source/features/auto_deploy/transforms/post_export.rst new file mode 100644 index 000000000000..8519ed50954d --- /dev/null +++ b/docs/source/features/auto_deploy/transforms/post_export.rst @@ -0,0 +1,11 @@ +.. SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. +.. SPDX-License-Identifier: Apache-2.0 + +Post-Export Stage +================= + +Post-export transforms remove low-level export artifacts and simple no-op graph +patterns. This keeps later pattern-matching, sharding, and fusion passes focused +on meaningful graph structure. + +.. trtllm_auto_deploy_transform_stage:: post_export diff --git a/docs/source/features/auto_deploy/transforms/post_load_fusion.rst b/docs/source/features/auto_deploy/transforms/post_load_fusion.rst new file mode 100644 index 000000000000..efe4c6831fee --- /dev/null +++ b/docs/source/features/auto_deploy/transforms/post_load_fusion.rst @@ -0,0 +1,12 @@ +.. SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. +.. SPDX-License-Identifier: Apache-2.0 + +Post-Load Fusion Stage +====================== + +Post-load fusion applies performance optimizations that need loaded weights, +device tensors, or the final post-sharding graph structure. This stage includes +kernel fusions for quantized linear layers, MoE, normalization, activation, RoPE, +and related inference patterns. + +.. trtllm_auto_deploy_transform_stage:: post_load_fusion diff --git a/docs/source/features/auto_deploy/transforms/sharding.rst b/docs/source/features/auto_deploy/transforms/sharding.rst new file mode 100644 index 000000000000..798841c3baa1 --- /dev/null +++ b/docs/source/features/auto_deploy/transforms/sharding.rst @@ -0,0 +1,11 @@ +.. SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. +.. SPDX-License-Identifier: Apache-2.0 + +Sharding Stage +============== + +Sharding determines and applies distributed execution layout. These transforms +identify tensor, expert, and batch-matmul sharding choices, then apply graph +rewrites and communication hints needed for multi-rank execution. + +.. trtllm_auto_deploy_transform_stage:: sharding diff --git a/docs/source/features/auto_deploy/transforms/visualize.rst b/docs/source/features/auto_deploy/transforms/visualize.rst new file mode 100644 index 000000000000..f29a99081313 --- /dev/null +++ b/docs/source/features/auto_deploy/transforms/visualize.rst @@ -0,0 +1,11 @@ +.. SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. +.. SPDX-License-Identifier: Apache-2.0 + +Visualization Stage +=================== + +Visualization emits graph artifacts for debugging and inspection. This stage is +intended to help developers understand transform output without changing +inference semantics. + +.. trtllm_auto_deploy_transform_stage:: visualize diff --git a/docs/source/features/auto_deploy/transforms/weight_load.rst b/docs/source/features/auto_deploy/transforms/weight_load.rst new file mode 100644 index 000000000000..1d800b1c77cf --- /dev/null +++ b/docs/source/features/auto_deploy/transforms/weight_load.rst @@ -0,0 +1,11 @@ +.. SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. +.. SPDX-License-Identifier: Apache-2.0 + +Weight Loading Stage +==================== + +Weight loading materializes model weights and moves required state to the target +device after graph structure and sharding decisions have been made. This stage +bridges graph preparation and weight-dependent fusion. + +.. trtllm_auto_deploy_transform_stage:: weight_load diff --git a/docs/source/features/kv-cache-connector.md b/docs/source/features/kv-cache-connector.md index a0d9c83804c9..dc16209c31ad 100644 --- a/docs/source/features/kv-cache-connector.md +++ b/docs/source/features/kv-cache-connector.md @@ -29,7 +29,7 @@ These methods run on the leader process and drive the connector's behavior. * **`build_connector_meta(self, scheduler_output: SchedulerOutput) -> object`** * **Description**: The core orchestration method. Called during the scheduling phase. It examines the current requests and decides which blocks need to be loaded from or saved to the external store. - * **Arguments**: `scheduler_output` contains information about new requests, blocks allocated, and current request states. + * **Arguments**: `scheduler_output` contains information about new requests, blocks allocated, current request states, and the cumulative `RequestData.block_hashes` chain. `block_hashes` is read directly from each KV cache block's stored hash, which the KV cache manager commits as soon as a block becomes full -- the value matches the hash that KV cache events will subsequently emit for the same block. The chain only covers beam 0; the executor rejects `kv_connector_config` at startup when `max_beam_width > 1`, so connectors may assume beam-width-1 inputs. * **Returns**: An arbitrary metadata object (picklable) that describes the tasks for the workers. This object is broadcasted to all workers. * **`get_num_new_matched_tokens(self, request: LlmRequest, num_computed_tokens: int) -> tuple[int, bool]`** diff --git a/docs/source/index.rst b/docs/source/index.rst index 2f96834c3a3f..5b5a163278f3 100644 --- a/docs/source/index.rst +++ b/docs/source/index.rst @@ -79,6 +79,7 @@ Welcome to TensorRT LLM's Documentation! features/speculative-decoding.md features/checkpoint-loading.md features/auto_deploy/auto-deploy.md + features/auto_deploy/transforms.rst features/ray-orchestrator.md features/torch_compile_and_piecewise_cuda_graph.md features/helix.md diff --git a/docs/source/models/supported-models.md b/docs/source/models/supported-models.md index 802d324b5405..3bfbece3a549 100644 --- a/docs/source/models/supported-models.md +++ b/docs/source/models/supported-models.md @@ -5,6 +5,7 @@ The following is a table of supported models for the PyTorch backend: | Architecture | Model | HuggingFace Example | | ------------------------------------ | ---------------------------------- | -------------------------------------------- | +| `AfmoeForCausalLM` | Arcee Foundation MoE (Trinity) | `arcee-ai/Trinity-Mini` | | `BertForSequenceClassification` | BERT-based | `textattack/bert-base-uncased-yelp-polarity` | | `Cohere2ForCausalLM` | Command A | `CohereLabs/c4ai-command-a-03-2025` | | `DeciLMForCausalLM` | Nemotron | `nvidia/Llama-3_1-Nemotron-51B-Instruct` | @@ -35,7 +36,7 @@ The following is a table of supported models for the PyTorch backend: | `MixtralForCausalLM` | Mixtral | `mistralai/Mixtral-8x7B-v0.1` | | `MllamaForConditionalGeneration` | Llama 3.2 | `meta-llama/Llama-3.2-11B-Vision` | | `NemotronForCausalLM` | Nemotron-3, Nemotron-4, Minitron | `nvidia/Minitron-8B-Base` | -| `NemotronHForCausalLM` | Nemotron-3-Nano, Nemotron-3-Super | `nvidia/nvidia-nemotron-v3` | +| `NemotronHForCausalLM` | Nemotron-3-Nano, Nemotron-3-Super, Nemotron-3-Ultra | `nvidia/nvidia-nemotron-v3` | | `NemotronNASForCausalLM` | NemotronNAS | `nvidia/Llama-3_3-Nemotron-Super-49B-v1` | | `Olmo3ForCausalLM` [^5] | OLMo 3, OLMo 3.1 | `allenai/Olmo-3.1-32B-Instruct` | | `OpenELMForCausalLM` [^5] | OpenELM | `apple/OpenELM-270M-Instruct` | @@ -46,7 +47,7 @@ The following is a table of supported models for the PyTorch backend: | `Qwen3ForCausalLM` | Qwen3 | `Qwen/Qwen3-8B` | | `Qwen3MoeForCausalLM` | Qwen3MoE | `Qwen/Qwen3-30B-A3B` | | `Qwen3NextForCausalLM` | Qwen3Next | `Qwen/Qwen3-Next-80B-A3B-Thinking` | -| `Qwen3_5MoeForCausalLM` [^5] | Qwen3.5-MoE | `Qwen/Qwen3.5-397B-A17B` | +| `Qwen3_5MoeForCausalLM` | Qwen3.5-MoE | `Qwen/Qwen3.5-397B-A17B` | | `SeedOssForCausalLM` [^5] | Seed OSS, Seed-Coder | `ByteDance-Seed/Seed-OSS-36B-Instruct` | | `SkyworkR1V2ForConditionalGeneration` [^5] | Skywork R1V2, Skywork SWE | `Skywork/Skywork-R1V2-38B` | | `SmolLM3ForCausalLM` [^5] | SmolLM3 | `HuggingFaceTB/SmolLM3-3B` | @@ -64,11 +65,11 @@ Note: Support for other models may vary. Features marked "N/A" are not applicabl | `Glm4MoeForCausalLM` | Yes | Yes | Yes | Untested | Yes | Yes | No | No | No | Yes | Yes | Untested | N/A | Yes | Yes | | `Qwen3MoeForCausalLM` | Yes | Yes | Yes | Yes | Yes | No | Yes | Yes | No | Yes | Yes | Yes | N/A | Yes | Yes | | `Qwen3NextForCausalLM` [^3] | Yes | Yes | Yes | Untested | Yes | No | No | No | No | Yes | Yes | No | No | Untested | Untested | +| `Qwen3_5MoeForCausalLM` | Yes | Yes | Yes | Yes | Yes | Yes | No | No | No | Yes | Untested | Yes | N/A | Untested | Untested | | `Llama4ForConditionalGeneration` | Yes | Yes | Yes | Yes | Yes | No | Yes | Yes | No | Yes | Yes | Untested | N/A | Yes | Yes | | `GptOssForCausalLM` | Yes | Yes | Yes | Yes | Yes | No | Yes | No | Yes | Yes | Yes | Yes | N/A | Yes | Yes | -| `Qwen3_5MoeForCausalLM` [^5] | Yes | Yes | Untested | Untested | Yes | No | No | No | No | Yes | Untested | Yes | N/A | Untested | Untested | | `Glm4MoeLiteForCausalLM` [^5] | Yes | Yes | Untested | Untested | Yes | No | No | No | No | Yes | Untested | Untested | N/A | Untested | Untested | -| `NemotronHForCausalLM` (Super) | Yes | Yes | Untested | Untested | Yes | Yes | No | No | No | Yes | Yes | Untested | N/A | Untested | Untested | +| `NemotronHForCausalLM` | Yes | Yes | Yes | Yes | Yes | Yes | No | No | No | Yes | Yes | Yes | N/A | Untested | Untested | | `Gemma4ForConditionalGeneration` | Untested | Yes | Untested | No | Yes | No | No | No | No | Yes | Untested | No | Yes | Untested | Untested | | `Step3p7ForConditionalGeneration`| Yes | Yes | Yes | Untested | Untested | Yes | No | No | No | Yes | Untested | Untested | Yes | Untested | Untested | @@ -80,6 +81,7 @@ Note: Support for other models may vary. Features marked "N/A" are not applicabl [^7]: Text-only support via the [AutoDeploy](../features/auto_deploy/auto-deploy.md) backend. [^8]: Supports text and image inputs. The vision tower runs in BF16 even when the text decoder is quantized (FP8 block-scale or NVFP4). The text decoder is also usable standalone (text-only) via the `Step3p5ForCausalLM` architecture. [^9]: Audio modality only supported on E2B/E4B variants. +[^10]: Audio requires a checkpoint with a `sound_config` and is supported only on the full (non-disaggregated) model path, not the EPD disaggregated path. # Multimodal Feature Support Matrix (PyTorch Backend) @@ -93,7 +95,7 @@ Note: Support for other models may vary. Features marked "N/A" are not applicabl | `LlavaNextForConditionalGeneration` | Yes | Yes | Yes | Yes | Yes | Yes | Yes | Yes | L + I | | `Llama4ForConditionalGeneration` | Yes | Yes | No | Yes | Yes | No | Yes | No | L + I | | `Mistral3ForConditionalGeneration` | Yes | Yes | Yes | Yes | Yes | Yes | Yes | No | L + I | -| `NemotronH_Nano_VL_V2` | Yes | Yes | Yes | Yes | Yes | N/A | Yes | No | L + I + V | +| `NemotronH_Nano_VL_V2` | Yes | Yes | Yes | Yes | Yes | N/A | Yes | Yes | L + I + V + A [^10] | | `Phi4MMForCausalLM` | Yes | Yes | Yes | Yes | Yes | Yes | Yes | No | L + I + A | | `Qwen2VLForConditionalGeneration` | Yes | Yes | Yes | Yes | Yes | Yes | Yes | No | L + I + V | | `Qwen2_5_VLForConditionalGeneration` | Yes | Yes | Yes | Yes | Yes | Yes | Yes | Yes | L + I + V | @@ -128,16 +130,19 @@ For full documentation, see the [Visual Generation](./visual-generation.md) page | `Lightricks/LTX-2` | Text-to-Video (with Audio), Image-to-Video (with Audio) | | `Qwen/Qwen-Image` | Text-to-Image | | `Qwen/Qwen-Image-2512` | Text-to-Image | - -## Feature Matrix - -| Model | TeaCache | CFG Parallelism | Ulysses Parallelism | Parallel VAE | CUDA Graph | torch.compile | trtllm-serve | -|---|---|---|---|---|---|---|---| -| **FLUX.1** | Yes | No [^vg1] | Yes | No | Yes | Yes | Yes | -| **FLUX.2** | Yes | No [^vg1] | Yes | No | Yes | Yes | Yes | -| **Wan 2.1** | Yes | Yes | Yes | Yes | Yes | Yes | Yes | -| **Wan 2.2** | No | Yes | Yes | Yes | Yes | Yes | Yes | -| **LTX-2** | No | Yes | Yes | No | Yes | Yes | Yes | -| **Qwen-Image** | No | No | Yes | No | Yes | Yes | Yes | +| `nvidia/Cosmos3-Nano` | Text-to-Image, Text-to-Video, Image-to-Video | +| `nvidia/Cosmos3-Super` | Text-to-Image, Text-to-Video, Image-to-Video | + +### Feature Matrix + +| Model | FP8 blockwise | NVFP4 | TeaCache | CFG Parallelism | Ulysses Parallelism | Parallel VAE | CUDA Graph | torch.compile | trtllm-serve | Attention2D | Ring Attention | Tensor Parallelism | +|---|---|---|---|---|---|---|---|---|---|--|--|--| +| **FLUX.1** | Yes | Yes | Yes | No [^1] | Yes | No | Yes | Yes | Yes | Yes | Yes | Yes | +| **FLUX.2** | Yes | Yes | Yes | No [^1] | Yes | No | Yes | Yes | Yes | Yes | Yes | Yes | +| **Wan 2.1** | Yes | Yes | Yes | Yes | Yes | Yes | Yes | Yes | Yes | Yes | Yes | Yes | +| **Wan 2.2** | Yes | Yes | No | Yes | Yes | Yes | Yes | Yes | Yes | Yes | Yes | Yes | +| **LTX-2** | Yes | Yes | No | Yes | Yes | No | No | Yes | Yes | Yes | Yes | No | +| **Qwen-Image** [^2] | Yes | Yes | No | No | Yes | No | Yes | Yes | Yes | Yes | Yes | No | +| **Cosmos3** | Yes | Yes | No | Yes | Yes | Yes | Yes | Yes | Yes | No | No | Yes | [^vg1]: FLUX models use embedded guidance and do not have a separate negative prompt path, so CFG parallelism is not applicable. diff --git a/docs/source/models/visual-generation.md b/docs/source/models/visual-generation.md index db8c73912969..0fe823ced41b 100644 --- a/docs/source/models/visual-generation.md +++ b/docs/source/models/visual-generation.md @@ -35,6 +35,8 @@ TensorRT-LLM **VisualGen** provides a unified inference stack for diffusion mode | `Lightricks/LTX-2` | Text-to-Video (with Audio), Image-to-Video (with Audio) | | `Qwen/Qwen-Image` | Text-to-Image | | `Qwen/Qwen-Image-2512` | Text-to-Image | +| `nvidia/Cosmos3-Nano` | Text-to-Image, Text-to-Video, Image-to-Video | +| `nvidia/Cosmos3-Super` | Text-to-Image, Text-to-Video, Image-to-Video | Models are auto-detected from the checkpoint directory. Diffusers-format models are detected via `model_index.json`; LTX-2 monolithic safetensors checkpoints are detected via embedded metadata. The `AutoPipeline` registry selects the appropriate pipeline class automatically. @@ -48,6 +50,7 @@ Models are auto-detected from the checkpoint directory. Diffusers-format models | **Wan 2.2** | Yes | Yes | No | Yes | Yes | Yes | Yes | Yes | Yes | Yes | Yes | Yes | | **LTX-2** | Yes | Yes | No | Yes | Yes | No | No | Yes | Yes | Yes | Yes | No | | **Qwen-Image** [^2] | Yes | Yes | No | No | Yes | No | Yes | Yes | Yes | Yes | Yes | No | +| **Cosmos3** | Yes | Yes | No | Yes | Yes | Yes | Yes | Yes | Yes | No | No | Yes | [^1]: FLUX models use embedded guidance and do not have a separate negative prompt path, so CFG parallelism is not applicable. @@ -169,6 +172,7 @@ Configured under `VisualGenArgs.parallel_config`. Modes can be combined: - **CFG Parallelism** (`cfg_size: 2`): Splits positive/negative guidance prompts across GPUs. - **Ulysses Parallelism** (`ulysses_size: N`): Splits the sequence dimension across GPUs for longer sequences. + - **Async Ulysses A2A pipeline** (`async_ulysses: true` in `parallel_config`): Overlaps per-rank V/Q/K projection compute with the cross-rank all-to-all on a dedicated side stream. Requires `ulysses_size > 1` and an NVLink-connected GPU domain (uses PyTorch `_SymmetricMemory` with CUDA IPC for peer pushes; not currently supported across nodes without MNNVL). Currently wired for WAN and LTX-2 self-attention. - **Parallel VAE** (`parallel_vae_size: N`): Shards the final VAE decode along a spatial axis (constraint: `parallel_vae_size ≤ world_size`; WAN/Cosmos3 only). - **Context Parallel (CP)** — Partitions the sequence into shards so that each rank computes partial attention. Requires an LSE-capable attention backend (`FA4` or `CUTEDSL`). CP can be composed with Ulysses, giving a total sequence-parallel (SP) degree = `cp_size · ulysses_size`. The CP degree depends on the implementation below: - **Attention2D** (`attn2d_size: [N, M]`): Shards the sequence axis across an `N × M` device mesh (CP degree = `N · M`; total SP degree = `N · M · ulysses_size`). diff --git a/docs/source/release-notes.md b/docs/source/release-notes.md index b5aee8cf0c0e..9f0ed17d4f76 100644 --- a/docs/source/release-notes.md +++ b/docs/source/release-notes.md @@ -26,6 +26,8 @@ All published functionality in the Release Notes has been fully tested and verif ### API Changes +- `trtllm-serve`, `trtllm-eval`, `trtllm-bench`: explicit CLI flags now take precedence over values in `--config` / `--extra_llm_api_options` YAML files (was: YAML overrode CLI). Un-set CLI flags continue to fall back to the YAML, then to model-specific and built-in defaults. + ### Fixed Issues ### Known Issues diff --git a/examples/auto_deploy/cookbooks/gpt_oss_trtllm_cookbook.ipynb b/examples/auto_deploy/cookbooks/gpt_oss_trtllm_cookbook.ipynb index 0dcf571feb0b..a99513ba25a0 100644 --- a/examples/auto_deploy/cookbooks/gpt_oss_trtllm_cookbook.ipynb +++ b/examples/auto_deploy/cookbooks/gpt_oss_trtllm_cookbook.ipynb @@ -100,48 +100,12 @@ { "cell_type": "markdown", "metadata": {}, - "source": [ - "## OpenAI-Compatible Server\n", - "\n", - "Start a local OpenAI-compatible server with TensorRT-LLM via the terminal, within the running docker container.\n", - "\n", - "Each gpt-oss size has its own AutoDeploy YAML under `examples/auto_deploy/model_registry/configs/`:\n", - "- `gpt_oss_20b.yaml` (world_size=2)\n", - "- `gpt_oss_120b.yaml` (world_size=8)\n", - "\n", - "Pick the YAML that matches the model size you want to deploy." - ] + "source": "## OpenAI-Compatible Server\n\nStart a local OpenAI-compatible server with TensorRT-LLM via the terminal, within the running docker container.\n\nBoth gpt-oss sizes share a single AutoDeploy YAML at `examples/auto_deploy/model_registry/configs/gpt_oss.yaml`. The same file is reused for 20B and 120B — only the HuggingFace model id changes between launches." }, { "cell_type": "markdown", "metadata": {}, - "source": [ - "### Load `gpt-oss-20b`\n", - "\n", - "Launch the TensorRT-LLM server on 2 GPUs:\n", - "\n", - "```shell\n", - "trtllm-serve \"openai/gpt-oss-20b\" \\\n", - " --host 0.0.0.0 \\\n", - " --port 8000 \\\n", - " --backend _autodeploy \\\n", - " --extra_llm_api_options examples/auto_deploy/model_registry/configs/gpt_oss_20b.yaml\n", - "```\n", - "\n", - "### Load `gpt-oss-120b`\n", - "\n", - "Launch the TensorRT-LLM server on 8 GPUs:\n", - "\n", - "```shell\n", - "trtllm-serve \"openai/gpt-oss-120b\" \\\n", - " --host 0.0.0.0 \\\n", - " --port 8000 \\\n", - " --backend _autodeploy \\\n", - " --extra_llm_api_options examples/auto_deploy/model_registry/configs/gpt_oss_120b.yaml\n", - "```\n", - "\n", - "Both YAMLs are self-contained — they include the compile backend, attention backend, world size, KV-cache settings and the CUDA-graph batch-size buckets needed for serving." - ] + "source": "### Load `gpt-oss-20b`\n\nLaunch the TensorRT-LLM server:\n\n```shell\ntrtllm-serve \"openai/gpt-oss-20b\" \\\n --host 0.0.0.0 \\\n --port 8000 \\\n --backend _autodeploy \\\n --extra_llm_api_options examples/auto_deploy/model_registry/configs/gpt_oss.yaml\n```\n\n### Load `gpt-oss-120b`\n\nLaunch the TensorRT-LLM server:\n\n```shell\ntrtllm-serve \"openai/gpt-oss-120b\" \\\n --host 0.0.0.0 \\\n --port 8000 \\\n --backend _autodeploy \\\n --extra_llm_api_options examples/auto_deploy/model_registry/configs/gpt_oss.yaml\n```\n\nThe shared YAML is self-contained — it includes the compile backend, attention backend, KV-cache settings and the CUDA-graph batch-size buckets needed for serving. `world_size` is supplied separately via the registry (e.g., `world_size_1.yaml`); pass it explicitly via `--extra_llm_api_options` when launching outside the registry." }, { "cell_type": "markdown", diff --git a/examples/auto_deploy/llmc/create_standalone_package.py b/examples/auto_deploy/llmc/create_standalone_package.py index 38feef3e516e..ff7c7295686e 100644 --- a/examples/auto_deploy/llmc/create_standalone_package.py +++ b/examples/auto_deploy/llmc/create_standalone_package.py @@ -153,6 +153,8 @@ "test_torch_gated_delta_rule_cache.py", "test_gated_delta_rule_cache.py", "test_kv_cache_transformers.py", + # trtllm attention backend (insert_cached_attention backend=trtllm) not available standalone + "test_kv_cache_trtllm_multipool.py", # Require TRT-LLM CUDA causal conv / mamba kernels (ops not registered standalone) "test_cuda_causal_conv_cached_op.py", "test_triton_causal_conv_cached_op.py", @@ -183,6 +185,10 @@ # Imports utils.util.skip_pre_blackwell (not shipped in standalone) and exercises # fuse_finegrained_fp8_swiglu which depends on TRT-LLM runtime. "test_finegrained_fp8_swiglu.py", + # Exercise trtllm-gen MXFP4 MoE kernels (Blackwell-only) and import the + # prepare_trtllm_gen_moe_mxfp4_weights / utils.util helpers not in standalone. + "test_fuse_mxfp4_moe.py", + "test_trtllm_quant_mxfp4_trtllm_gen_moe.py", } # Import path rewrite: old -> new (applied to test files only). diff --git a/examples/auto_deploy/model_registry/configs/disagg_ctx.yaml b/examples/auto_deploy/model_registry/configs/disagg_ctx.yaml new file mode 100644 index 000000000000..8039084f6c3b --- /dev/null +++ b/examples/auto_deploy/model_registry/configs/disagg_ctx.yaml @@ -0,0 +1,9 @@ +# SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. +# SPDX-License-Identifier: Apache-2.0 +# Selects the KV-cache transport used to move cache blocks between disaggregated workers. +# DEFAULT lets TensorRT-LLM choose; explicit backend values include UCX and NIXL. +# See examples/disaggregated/README.md for backend details. +cache_transceiver_config: + backend: DEFAULT +# Overlap scheduling is currently unsupported for disaggregated context workers. +disable_overlap_scheduler: true diff --git a/examples/auto_deploy/model_registry/configs/disagg_gen.yaml b/examples/auto_deploy/model_registry/configs/disagg_gen.yaml new file mode 100644 index 000000000000..6a90950635a7 --- /dev/null +++ b/examples/auto_deploy/model_registry/configs/disagg_gen.yaml @@ -0,0 +1,7 @@ +# SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. +# SPDX-License-Identifier: Apache-2.0 +# Selects the KV-cache transport used to move cache blocks between disaggregated workers. +# DEFAULT lets TensorRT-LLM choose; explicit backend values include UCX and NIXL. +# See examples/disaggregated/README.md for backend details. +cache_transceiver_config: + backend: DEFAULT diff --git a/examples/auto_deploy/model_registry/configs/gemma4_e2b.yaml b/examples/auto_deploy/model_registry/configs/gemma4_e2b.yaml index 756035edbca2..856546f4c678 100644 --- a/examples/auto_deploy/model_registry/configs/gemma4_e2b.yaml +++ b/examples/auto_deploy/model_registry/configs/gemma4_e2b.yaml @@ -20,7 +20,9 @@ kv_cache_config: free_gpu_memory_fraction: 0.8 transforms: compile_model: - piecewise_enabled: true + # Gemma4 E2B uses VSWA cache pools; piecewise graph warmup currently + # creates a single-pool cache location and fails during capture. + piecewise_enabled: false mlir_elementwise_fusion: # MLIR elementwise kernels currently corrupt piecewise CUDA graph replay for Gemma4 E2B. enabled: false diff --git a/examples/auto_deploy/model_registry/configs/gpt_oss.yaml b/examples/auto_deploy/model_registry/configs/gpt_oss.yaml new file mode 100644 index 000000000000..f6078b77fdb8 --- /dev/null +++ b/examples/auto_deploy/model_registry/configs/gpt_oss.yaml @@ -0,0 +1,47 @@ +# SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. +# SPDX-License-Identifier: Apache-2.0 + +# OpenAI GPT-OSS (20B / 120B, MXFP4 quantized) — shared AD serving config. +# - 20B: 24 layers, 32 experts, top-4 +# - 120B: 36 layers, 128 experts, top-4 +# Both share GQA (64 Q / 8 KV heads), head_dim=64, hidden=2880, and MXFP4 +# weights on HF that AD's `quantize_mxfp4_moe` transform handles. +# world_size is set via the registry's `world_size_N.yaml` overlay — not here. +model_factory: AutoModelForCausalLM +model_kwargs: + dtype: bfloat16 +attn_backend: trtllm +compile_backend: torch-cudagraph +skip_loading_weights: false +max_batch_size: 128 +max_seq_len: 4096 +max_num_tokens: 8192 +enable_chunked_prefill: true +cuda_graph_config: + batch_sizes: [1, 2, 4, 8, 16, 32, 64, 128] +kv_cache_config: + enable_block_reuse: false + free_gpu_memory_fraction: 0.8 +transforms: + detect_sharding: + enabled: false + sharding_transform_executor: + enabled: false + apply_sharding_hints: + enabled: true + requires_shape_prop: true + shard_layers: ["mha", "moe", "lm_head"] # V3: vocab-parallel lm_head (colwise + all_gather) + # TP2 trial: AUTO -> tunable_allreduce picks oneshot-lamport fused AR. + # NCCL has no fused residual+rmsnorm kernel -> RING_LL + separate rmsnorm. + allreduce_strategy: AUTO + quantize_mxfp4_moe: + backend: trtllm + trtllm_quant_act: mxfp8 + fuse_gemms_mixed_children: + enabled: true + fuse_gemms: + enabled: true + fuse_rope_into_trtllm_attention: + enabled: true + fuse_add_rms_norm: + enabled: true diff --git a/examples/auto_deploy/model_registry/configs/gpt_oss_120b.yaml b/examples/auto_deploy/model_registry/configs/gpt_oss_120b.yaml deleted file mode 100644 index 9ca974a5727e..000000000000 --- a/examples/auto_deploy/model_registry/configs/gpt_oss_120b.yaml +++ /dev/null @@ -1,21 +0,0 @@ -# SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. -# SPDX-License-Identifier: Apache-2.0 - -# OpenAI GPT-OSS-120B (128 experts, top-4, MXFP4 quantized) — standalone AD serving config. -# 36 layers (alternating sliding/full), GQA (64 Q / 8 KV heads), head_dim=64, hidden=2880. -# Weights are stored in MXFP4 on HF; AD's quantize_mxfp4_moe transform handles it. -runtime: trtllm -model_factory: AutoModelForCausalLM -attn_backend: trtllm -compile_backend: torch-cudagraph -skip_loading_weights: false -world_size: 4 -max_batch_size: 128 -max_seq_len: 4096 -max_num_tokens: 8192 -enable_chunked_prefill: true -cuda_graph_config: - batch_sizes: [1, 2, 4, 8, 16, 32, 64, 128] -kv_cache_config: - enable_block_reuse: false - free_gpu_memory_fraction: 0.8 diff --git a/examples/auto_deploy/model_registry/configs/gpt_oss_20b.yaml b/examples/auto_deploy/model_registry/configs/gpt_oss_20b.yaml deleted file mode 100644 index fee088fe9d4b..000000000000 --- a/examples/auto_deploy/model_registry/configs/gpt_oss_20b.yaml +++ /dev/null @@ -1,21 +0,0 @@ -# SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. -# SPDX-License-Identifier: Apache-2.0 - -# OpenAI GPT-OSS-20B (32 experts, top-4, MXFP4 quantized) — standalone AD serving config. -# 24 layers (alternating sliding/full), GQA (64 Q / 8 KV heads), head_dim=64, hidden=2880. -# Weights are stored in MXFP4 on HF; AD's quantize_mxfp4_moe transform handles it. -runtime: trtllm -model_factory: AutoModelForCausalLM -attn_backend: trtllm -compile_backend: torch-cudagraph -skip_loading_weights: false -world_size: 1 -max_batch_size: 128 -max_seq_len: 4096 -max_num_tokens: 8192 -enable_chunked_prefill: true -cuda_graph_config: - batch_sizes: [1, 2, 4, 8, 16, 32, 64, 128] -kv_cache_config: - enable_block_reuse: false - free_gpu_memory_fraction: 0.8 diff --git a/examples/auto_deploy/model_registry/models.yaml b/examples/auto_deploy/model_registry/models.yaml index 5ecfd108f746..c301d17171a7 100644 --- a/examples/auto_deploy/model_registry/models.yaml +++ b/examples/auto_deploy/model_registry/models.yaml @@ -168,10 +168,9 @@ models: - name: nvidia/Mistral-NeMo-Minitron-8B-Base config_id: default_ws_2 yaml_extra: ['dashboard_default.yaml', 'world_size_2.yaml'] -# OOM during AutoDeploy run. -# - name: openai/gpt-oss-20b -# config_id: gpt_oss_20b -# yaml_extra: ['gpt_oss_20b.yaml'] +- name: openai/gpt-oss-20b + config_id: gpt_oss + yaml_extra: ['gpt_oss.yaml', 'world_size_1.yaml'] - name: ibm-granite/granite-3.0-8b-instruct config_id: default_ws_1 yaml_extra: ['dashboard_default.yaml', 'world_size_1.yaml'] @@ -310,10 +309,9 @@ models: # - name: deepseek-ai/DeepSeek-R1 # config_id: deepseek_r1 # yaml_extra: ['dashboard_default.yaml', 'world_size_8.yaml', 'deepseek-r1.yaml', 'enable_sharder_ir.yaml'] -# OOM during AutoDeploy run. -# - name: deepseek-ai/DeepSeek-R1-0528 -# config_id: deepseek_r1 -# yaml_extra: ['dashboard_default.yaml', 'world_size_8.yaml', 'deepseek-r1.yaml', 'enable_sharder_ir.yaml'] +- name: deepseek-ai/DeepSeek-R1-0528 + config_id: deepseek_r1 + yaml_extra: ['dashboard_default.yaml', 'world_size_8.yaml', 'deepseek-r1.yaml', 'enable_sharder_ir.yaml'] # OOM during AutoDeploy run. # - name: deepseek-ai/DeepSeek-Coder-V2-Instruct # config_id: deepseek_v2_ep @@ -334,10 +332,9 @@ models: # - name: meta-llama/Llama-3.2-90B-Vision-Instruct # config_id: multimodal # yaml_extra: ['dashboard_default.yaml', 'world_size_8.yaml', 'multimodal.yaml'] -# torch.distributed.DistStoreError: Timed out after 601 seconds waiting for clients. 1/4 clients joined. -# - name: openai/gpt-oss-120b -# config_id: gpt_oss_120b -# yaml_extra: ['gpt_oss_120b.yaml'] +- name: openai/gpt-oss-120b + config_id: gpt_oss + yaml_extra: ['gpt_oss.yaml', 'world_size_2.yaml'] # [RANK 3] Error querying confidential compute state: Function Not Found # - name: meta-llama/Llama-4-Scout-17B-16E-Instruct # config_id: multimodal__llama4_scout @@ -374,14 +371,12 @@ models: # config_id: default_ws_4 # yaml_extra: ['dashboard_default.yaml', 'world_size_4.yaml'] # --- Qwen3.5 MoE (Feb 2026) --- -# tensorrt_llm.executor.utils.RequestError: Ran into a kwarg keyword mismatch. -# - name: Qwen/Qwen3.5-35B-A3B -# config_id: qwen3_5_moe_35b -# yaml_extra: ['dashboard_default.yaml', 'world_size_2.yaml', 'qwen3.5_moe_35b.yaml', 'enable_sharder_ir.yaml'] -# OOM during AutoDeploy run. -# - name: Qwen/Qwen3.5-397B-A17B -# config_id: qwen3_5_moe_400b -# yaml_extra: ['dashboard_default.yaml', 'world_size_8.yaml', 'qwen3.5_moe_400b.yaml', 'enable_sharder_ir.yaml'] +- name: Qwen/Qwen3.5-35B-A3B + config_id: qwen3_5_moe_35b + yaml_extra: ['dashboard_default.yaml', 'world_size_2.yaml', 'qwen3.5_moe_35b.yaml', 'enable_sharder_ir.yaml'] +- name: Qwen/Qwen3.5-397B-A17B + config_id: qwen3_5_moe_400b + yaml_extra: ['dashboard_default.yaml', 'world_size_8.yaml', 'qwen3.5_moe_400b.yaml', 'enable_sharder_ir.yaml'] # --- GLM-5 (Feb 2026) --- - name: zai-org/GLM-5 config_id: glm_5 @@ -537,18 +532,16 @@ models: # config_id: multimodal # yaml_extra: ['dashboard_default.yaml', 'world_size_2.yaml', 'multimodal.yaml'] # --- Gemma 4 (2026) - MoE with K=V attention --- -# Error querying confidential compute state: Function Not Found -# - name: google/gemma-4-E2B-it -# config_id: gemma4_e2b -# yaml_extra: ['dashboard_default.yaml', 'world_size_1.yaml', 'gemma4_e2b.yaml'] +- name: google/gemma-4-E2B-it + config_id: gemma4_e2b + yaml_extra: ['dashboard_default.yaml', 'world_size_1.yaml', 'gemma4_e2b.yaml'] # AttributeError: 'GraphModule' object has no attribute 'get_per_layer_inputs' # - name: google/gemma-4-26B-A4B # config_id: gemma4_moe_base # yaml_extra: ['dashboard_default.yaml', 'world_size_1.yaml', 'gemma4_moe_base.yaml'] -# AttributeError: 'GraphModule' object has no attribute 'get_per_layer_inputs' -# - name: google/gemma-4-26B-A4B-it -# config_id: gemma4_moe -# yaml_extra: ['dashboard_default.yaml', 'world_size_1.yaml', 'gemma4_moe.yaml'] +- name: google/gemma-4-26B-A4B-it + config_id: gemma4_moe + yaml_extra: ['dashboard_default.yaml', 'world_size_1.yaml', 'gemma4_moe.yaml'] # --- Gemma 4 (2026) - Dense 31B --- # AttributeError: 'GraphModule' object has no attribute 'get_per_layer_inputs' # - name: google/gemma-4-31B-it @@ -588,10 +581,9 @@ models: # config_id: multimodal # yaml_extra: ['dashboard_default.yaml', 'world_size_4.yaml', 'multimodal.yaml'] # --- MiniMax M2 (2025) --- -# RuntimeError: NVRTC compilation failed. See https://github.com/NVIDIA/TensorRT-LLM/issues/14676 -# - name: MiniMaxAI/MiniMax-M2 -# config_id: minimax_m2 -# yaml_extra: ['dashboard_default.yaml', 'world_size_8.yaml', 'minimax_m2.yaml'] +- name: MiniMaxAI/MiniMax-M2 + config_id: minimax_m2 + yaml_extra: ['dashboard_default.yaml', 'world_size_8.yaml', 'minimax_m2.yaml'] # --- Tencent Hunyuan small (2025) --- - name: tencent/Hunyuan-1.8B-Instruct config_id: default_ws_1 diff --git a/examples/configs/curated/lookup.yaml b/examples/configs/curated/lookup.yaml index 8ada2085a063..74d1b497fa17 100644 --- a/examples/configs/curated/lookup.yaml +++ b/examples/configs/curated/lookup.yaml @@ -4,11 +4,21 @@ config_path: examples/configs/curated/nemotron-3-super-throughput.yaml scenario: Max Throughput gpu_compatibility: "B200, GB200" +- model: nvidia/NVIDIA-Nemotron-3-Ultra-550B-A55B-NVFP4 + arch: NemotronHForCausalLM + config_path: examples/configs/curated/nemotron-3-ultra-throughput.yaml + scenario: Max Throughput + gpu_compatibility: "B200, B300, GB200, GB300, H100, H200" - model: Qwen/Qwen3-Next-80B-A3B-Thinking arch: Qwen3NextForCausalLM config_path: examples/configs/curated/qwen3-next.yaml scenario: Max Throughput gpu_compatibility: "Any" +- model: nvidia/Qwen3.5-397B-A17B-NVFP4 + arch: Qwen3_5MoeForCausalLM + config_path: examples/configs/curated/qwen3.5.yaml + scenario: Max Throughput + gpu_compatibility: "B200, B300, GB200, GB300" - model: Qwen/Qwen3-30B-A3B arch: Qwen3MoeForCausalLM config_path: examples/configs/curated/qwen3.yaml diff --git a/examples/configs/curated/nemotron-3-ultra-throughput.yaml b/examples/configs/curated/nemotron-3-ultra-throughput.yaml new file mode 100644 index 000000000000..72dcc2fe888a --- /dev/null +++ b/examples/configs/curated/nemotron-3-ultra-throughput.yaml @@ -0,0 +1,19 @@ +max_batch_size: 256 +max_num_tokens: 2048 +tensor_parallel_size: 4 +moe_expert_parallel_size: 4 +trust_remote_code: true +enable_attention_dp: true +cuda_graph_config: + enable_padding: true + max_batch_size: 256 +kv_cache_config: + free_gpu_memory_fraction: 0.8 + enable_block_reuse: false + mamba_ssm_cache_dtype: float16 + mamba_ssm_philox_rounds: 5 + mamba_ssm_stochastic_rounding: true +moe_config: + backend: CUTEDSL +num_postprocess_workers: 4 +stream_interval: 10 diff --git a/examples/configs/curated/qwen3.5.yaml b/examples/configs/curated/qwen3.5.yaml new file mode 100644 index 000000000000..ee9255d6567d --- /dev/null +++ b/examples/configs/curated/qwen3.5.yaml @@ -0,0 +1,15 @@ +max_batch_size: 512 +max_num_tokens: 2048 +tensor_parallel_size: 4 +moe_expert_parallel_size: 4 +trust_remote_code: true +enable_attention_dp: true +cuda_graph_config: + enable_padding: true + max_batch_size: 256 +moe_config: + backend: CUTEDSL +kv_cache_config: + free_gpu_memory_fraction: 0.8 + enable_block_reuse: false +num_postprocess_workers: 4 diff --git a/examples/models/core/nemotron/README_nemotron_super_v3.md b/examples/models/core/nemotron/README_nemotron_super_v3.md index 0c9637a42256..e78992359c19 100644 --- a/examples/models/core/nemotron/README_nemotron_super_v3.md +++ b/examples/models/core/nemotron/README_nemotron_super_v3.md @@ -200,4 +200,4 @@ Key options: # Notes * prefix-cache is not supported for Nemotron Super V3 yet, so please set `enable_block_reuse: false` when launching a server. -* For detailed deployment instructions, see the [deployment guide](https://github.com/NVIDIA/TensorRT-LLM/blob/main/docs/source/deployment-guide/deployment-guide-for-nemotron-3-super-on-trtllm.md). +* For detailed deployment instructions, see the [deployment guide](https://github.com/NVIDIA/TensorRT-LLM/blob/main/docs/source/deployment-guide/deployment-guide-for-nemotron-3-on-trtllm.md). diff --git a/examples/visual_gen/README.md b/examples/visual_gen/README.md index 0991276b3c2c..c38656472b35 100644 --- a/examples/visual_gen/README.md +++ b/examples/visual_gen/README.md @@ -18,9 +18,16 @@ for feature details. # Defaults python quickstart_example.py python models/wan_t2v.py +python models/ltx2.py +python models/flux1.py +python models/flux2.py # With engine config (quant, parallelism, etc.) python models/wan_t2v.py --visual_gen_args configs/wan2.2-t2v-fp4-1gpu.yaml +python models/wan_i2v.py --visual_gen_args configs/wan2.2-i2v-fp4-1gpu.yaml --image /path/to/image.png +python models/ltx2.py --visual_gen_args configs/ltx2-t2v-fp8-1-gpu.yaml +python models/flux1.py --visual_gen_args configs/flux1-dev-fp4-1gpu.yaml +python models/flux2.py --visual_gen_args configs/flux2-dev-fp4-1gpu.yaml ``` Install deps from the repo root: `pip install -r requirements-dev.txt`. diff --git a/examples/visual_gen/configs/cosmos3-nano-1gpu.yaml b/examples/visual_gen/configs/cosmos3-nano-1gpu.yaml new file mode 100644 index 000000000000..b67ab39e235b --- /dev/null +++ b/examples/visual_gen/configs/cosmos3-nano-1gpu.yaml @@ -0,0 +1,32 @@ +# SPDX-FileCopyrightText: Copyright (c) 2022-2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. +# SPDX-License-Identifier: Apache-2.0 +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. + +# 1-GPU Cosmos3 (Nano / Super) with FP8 dynamic quantization. +# Model: nvidia/Cosmos3-Nano or nvidia/Cosmos3-Super +# Shared by offline examples (--visual_gen_args) and trtllm-serve. +# +# Cosmos3 constraints: VANILLA attention only; +# no Attention2D / Ring. Use CFG + Ulysses for multi-GPU (see cosmos3-super-4gpu.yaml). +quant_config: + quant_algo: FP8 + dynamic: true + ignore: ["language_model.*", "vae2llm", "llm2vae", "time_embedder.*"] +attention_config: + backend: VANILLA +parallel_config: + cfg_size: 1 + ulysses_size: 1 +cuda_graph_config: + enable: false diff --git a/examples/visual_gen/configs/cosmos3-super-4gpu.yaml b/examples/visual_gen/configs/cosmos3-super-4gpu.yaml new file mode 100644 index 000000000000..34ddec38ceea --- /dev/null +++ b/examples/visual_gen/configs/cosmos3-super-4gpu.yaml @@ -0,0 +1,31 @@ +# SPDX-FileCopyrightText: Copyright (c) 2022-2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. +# SPDX-License-Identifier: Apache-2.0 +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. + +# 4-GPU Cosmos3-Super with FP8 dynamic quantization (CFG + Ulysses + parallel VAE). +# Launch with 4 processes, e.g. torchrun --nproc_per_node=4 ... +# Model: nvidia/Cosmos3-Super +# Shared by offline examples (--visual_gen_args) and trtllm-serve. +# +# GPU layout: cfg_size=2 (positive | negative) x ulysses_size=2 (sequence split). +quant_config: + quant_algo: FP8 + dynamic: true + ignore: ["language_model.*", "vae2llm", "llm2vae", "time_embedder.*"] +attention_config: + backend: VANILLA +parallel_config: + cfg_size: 2 + ulysses_size: 2 + parallel_vae_size: 4 diff --git a/examples/visual_gen/configs/flux1-dev-fp4-1gpu.yaml b/examples/visual_gen/configs/flux1-dev-fp4-1gpu.yaml new file mode 100644 index 000000000000..54d54d26fd22 --- /dev/null +++ b/examples/visual_gen/configs/flux1-dev-fp4-1gpu.yaml @@ -0,0 +1,27 @@ +# SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. +# SPDX-License-Identifier: Apache-2.0 +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. + +# 1-GPU FLUX.1-dev with NVFP4 dynamic quantization. +# Shared by offline examples (--visual_gen_args) and trtllm-serve. +quant_config: + quant_algo: NVFP4 + dynamic: true +attention_config: + backend: VANILLA +parallel_config: + cfg_size: 1 + ulysses_size: 1 +cuda_graph_config: + enable: false diff --git a/examples/visual_gen/configs/flux2-dev-fp4-1gpu.yaml b/examples/visual_gen/configs/flux2-dev-fp4-1gpu.yaml new file mode 100644 index 000000000000..5da70c1536e2 --- /dev/null +++ b/examples/visual_gen/configs/flux2-dev-fp4-1gpu.yaml @@ -0,0 +1,27 @@ +# SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. +# SPDX-License-Identifier: Apache-2.0 +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. + +# 1-GPU FLUX.2-dev with NVFP4 dynamic quantization. +# Shared by offline examples (--visual_gen_args) and trtllm-serve. +quant_config: + quant_algo: NVFP4 + dynamic: true +attention_config: + backend: VANILLA +parallel_config: + cfg_size: 1 + ulysses_size: 1 +cuda_graph_config: + enable: false diff --git a/examples/visual_gen/configs/ltx2-4gpu.yaml b/examples/visual_gen/configs/ltx2-4gpu.yaml new file mode 100644 index 000000000000..a667a147c9e5 --- /dev/null +++ b/examples/visual_gen/configs/ltx2-4gpu.yaml @@ -0,0 +1,28 @@ +# SPDX-FileCopyrightText: Copyright (c) 2022-2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. +# SPDX-License-Identifier: Apache-2.0 +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. + +# 4-GPU LTX-2 AudioVideo parallel config (precision-agnostic — picks up +# whatever checkpoint is passed via --model_path). Shared by offline +# examples (--extra_visual_gen_options) and trtllm-serve. +attention_config: + backend: VANILLA +parallel_config: + cfg_size: 2 + ulysses_size: 2 + async_ulysses: true +torch_compile_config: + enable: true +cuda_graph_config: + enable: true diff --git a/examples/visual_gen/configs/ltx2-t2v-fp4-1gpu.yaml b/examples/visual_gen/configs/ltx2-t2v-fp4-1gpu.yaml new file mode 100644 index 000000000000..862d8a4fa640 --- /dev/null +++ b/examples/visual_gen/configs/ltx2-t2v-fp4-1gpu.yaml @@ -0,0 +1,27 @@ +# SPDX-FileCopyrightText: Copyright (c) 2022-2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. +# SPDX-License-Identifier: Apache-2.0 +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. + +# 1-GPU LTX-2 text-to-video with audio. +# Shared by offline examples (--visual_gen_args) and trtllm-serve. +quant_config: + quant_algo: NVFP4 + dynamic: true +attention_config: + backend: VANILLA +parallel_config: + cfg_size: 1 + ulysses_size: 1 +cuda_graph_config: + enable: false diff --git a/examples/visual_gen/configs/ltx2-t2v-fp8-1gpu.yaml b/examples/visual_gen/configs/ltx2-t2v-fp8-1gpu.yaml new file mode 100644 index 000000000000..0f4afcdb4384 --- /dev/null +++ b/examples/visual_gen/configs/ltx2-t2v-fp8-1gpu.yaml @@ -0,0 +1,27 @@ +# SPDX-FileCopyrightText: Copyright (c) 2022-2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. +# SPDX-License-Identifier: Apache-2.0 +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. + +# 1-GPU LTX-2 text-to-video with audio. +# Shared by offline examples (--visual_gen_args) and trtllm-serve. +quant_config: + quant_algo: FP8_BLOCK_SCALES + dynamic: true +attention_config: + backend: VANILLA +parallel_config: + cfg_size: 1 + ulysses_size: 1 +cuda_graph_config: + enable: false diff --git a/examples/visual_gen/configs/wan2.2-i2v-fp4-1gpu.yaml b/examples/visual_gen/configs/wan2.2-i2v-fp4-1gpu.yaml new file mode 100644 index 000000000000..8fbda2c55b64 --- /dev/null +++ b/examples/visual_gen/configs/wan2.2-i2v-fp4-1gpu.yaml @@ -0,0 +1,27 @@ +# SPDX-FileCopyrightText: Copyright (c) 2022-2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. +# SPDX-License-Identifier: Apache-2.0 +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. + +# 1-GPU Wan 2.2 I2V with NVFP4 dynamic quantization. +# Shared by offline examples (--visual_gen_args) and trtllm-serve. +quant_config: + quant_algo: NVFP4 + dynamic: true +attention_config: + backend: VANILLA +parallel_config: + cfg_size: 1 + ulysses_size: 1 +cuda_graph_config: + enable: false diff --git a/examples/visual_gen/configs/wan2.2-t2v-fp4-4gpu.yaml b/examples/visual_gen/configs/wan2.2-t2v-fp4-4gpu.yaml index a645bbe7794b..82a033090aed 100644 --- a/examples/visual_gen/configs/wan2.2-t2v-fp4-4gpu.yaml +++ b/examples/visual_gen/configs/wan2.2-t2v-fp4-4gpu.yaml @@ -23,6 +23,7 @@ attention_config: parallel_config: cfg_size: 2 ulysses_size: 2 + async_ulysses: true parallel_vae_size: 4 cuda_graph_config: enable: false diff --git a/examples/visual_gen/models/cosmos3_ti2v.py b/examples/visual_gen/models/cosmos3_ti2v.py new file mode 100644 index 000000000000..69e50e3b7c52 --- /dev/null +++ b/examples/visual_gen/models/cosmos3_ti2v.py @@ -0,0 +1,134 @@ +#!/usr/bin/env python3 +# SPDX-FileCopyrightText: Copyright (c) 2022-2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. +# SPDX-License-Identifier: Apache-2.0 +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. +r"""Cosmos3 Text(+Image)-to-Video generation. + +Cosmos3 OmniMoT supports text-only (T2V) and image-conditioned (I2V/TI2V) +generation from the same checkpoint. Pass ``--image_path`` to condition on a +reference frame. + +Checkpoints (pass the Hub ID or local path via ``--model``): + +- `nvidia/Cosmos3-Nano `_ +- `nvidia/Cosmos3-Super `_ + +Guardrails are enabled by default (required by the +`NVIDIA Open Model License Agreement +`_). +Install and authenticate as follows:: + + pip install cosmos_guardrail==0.3.0 && pip uninstall opencv-python + +Accept the terms for the guardrail checkpoint at +https://huggingface.co/nvidia/Cosmos-1.0-Guardrail and set a valid ``HF_TOKEN`` +(the checkpoint is downloaded automatically on first run). + +To run without guardrails (you are responsible for safe deployment):: + + export TRTLLM_DISABLE_COSMOS3_GUARDRAILS=1 + +Deployment configs (``examples/visual_gen/configs/``): + +- ``cosmos3-nano-1gpu.yaml`` — 1 GPU, FP8 dynamic quant +- ``cosmos3-super-4gpu.yaml`` — 4 GPU, CFG + Ulysses + parallel VAE + +Usage: + python cosmos3_ti2v.py --model nvidia/Cosmos3-Nano \\ + --prompt "The video opens with a view of a well-lit indoor space featuring a " \\ + "wooden display case with compartments filled with various fruits, " \\ + "including bananas, apples, pears, oranges, and carambolas. " \\ + "The bananas are neatly arranged in the middle compartment, while apples " \\ + "are in the left and a mix of pears, oranges, and carambolas are in the " \\ + "right. " \\ + "Two robotic arms with grippers are positioned at the bottom of the frame, " \\ + "with the one on the left remaining stationary, partially obscuring the " \\ + "apples. " \\ + "The robotic arm on the right begins its action, extending towards the " \\ + "right side of the display case. " \\ + "It carefully picks up a pear from the fruit section, placing it into a " \\ + "plastic bag in the shopping cart nearby, which has red handles. " \\ + "After securing the pear, the arm retracts back to its original position. " \\ + "The process repeats as the robotic arm picks up an orange and places it " \\ + "in the bag, followed by a carambola. " \\ + "The final frame captures the robotic arm returning to its initial " \\ + "position, leaving the display case and surrounding area unchanged. " \\ + "The video showcases a seamless and efficient automated fruit-picking " \\ + "process, highlighting the precision and efficiency of modern robotics " \\ + "in a retail setting." \\ + --visual_gen_args ../configs/cosmos3-nano-1gpu.yaml +""" + +import argparse + +from tensorrt_llm import VisualGen, VisualGenArgs + + +def main(): + parser = argparse.ArgumentParser(description="Cosmos3 Text(+Image)-to-Video example") + parser.add_argument( + "--model", + type=str, + default="nvidia/Cosmos3-Nano", + help="Model path or HuggingFace Hub ID (nvidia/Cosmos3-Nano, nvidia/Cosmos3-Super)", + ) + parser.add_argument( + "--visual_gen_args", + "--extra_visual_gen_options", + dest="visual_gen_args", + type=str, + default=None, + help="Path to YAML config (same as trtllm-serve --visual_gen_args)", + ) + parser.add_argument( + "--prompt", + type=str, + required=True, + help="Text prompt for generation", + ) + parser.add_argument( + "--image_path", + type=str, + default=None, + help="Optional conditioning image path for I2V/TI2V", + ) + parser.add_argument( + "--output_path", + type=str, + default="cosmos3_ti2v_output.mp4", + help="Path to save the output video", + ) + args = parser.parse_args() + + # Engine config from shared YAML (optional); model-specific defaults apply otherwise. + extra_args = VisualGenArgs.from_yaml(args.visual_gen_args) if args.visual_gen_args else None + visual_gen = VisualGen(model=args.model, args=extra_args) + + # --- Model-specific: T2V / TI2V request construction --- + # Query per-model defaults (resolution, steps, guidance, seed, etc.). + params = visual_gen.default_params + if args.image_path is not None: + params.image = args.image_path + + output = visual_gen.generate( + inputs=args.prompt, + params=params, + ) + + output.save(args.output_path) + print(f"Saved: {args.output_path}") + + +if __name__ == "__main__": + main() diff --git a/examples/visual_gen/models/flux1.py b/examples/visual_gen/models/flux1.py new file mode 100644 index 000000000000..269610db541b --- /dev/null +++ b/examples/visual_gen/models/flux1.py @@ -0,0 +1,91 @@ +#!/usr/bin/env python3 +# SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. +# SPDX-License-Identifier: Apache-2.0 +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. +"""FLUX.1 text-to-image generation. + +Usage: + python flux1.py + python flux1.py --visual_gen_args ../configs/flux1-dev-fp4-1gpu.yaml +""" + +import argparse +from pathlib import Path + +from tensorrt_llm import VisualGen, VisualGenArgs + + +def _output_paths(output_path: str, num_images: int) -> str | list[str]: + if num_images == 1: + return output_path + + path = Path(output_path) + return [str(path.with_name(f"{path.stem}_{idx + 1}{path.suffix}")) for idx in range(num_images)] + + +def main(): + parser = argparse.ArgumentParser(description="FLUX.1 Text-to-Image example") + parser.add_argument( + "--model", + type=str, + default="black-forest-labs/FLUX.1-dev", + help="Model path or HuggingFace Hub ID", + ) + parser.add_argument( + "--visual_gen_args", + "--extra_visual_gen_options", + dest="visual_gen_args", + type=str, + default=None, + help="Path to YAML config (same as trtllm-serve --visual_gen_args)", + ) + parser.add_argument( + "--prompt", + type=str, + default="A cat sitting on a windowsill, cinematic lighting, highly detailed", + help="Text prompt for image generation", + ) + parser.add_argument( + "--num_images_per_prompt", + type=int, + default=1, + help="Number of images to generate for the prompt", + ) + parser.add_argument( + "--output_path", + type=str, + default="flux1_output.png", + help="Path to save the output image. For multiple images, an index is appended.", + ) + args = parser.parse_args() + if args.num_images_per_prompt < 1: + raise ValueError("--num_images_per_prompt must be >= 1") + + # Engine config from shared YAML (optional); model-specific defaults apply otherwise. + extra_args = VisualGenArgs.from_yaml(args.visual_gen_args) if args.visual_gen_args else None + visual_gen = VisualGen(model=args.model, args=extra_args) + + # --- Model-specific: T2I request construction --- + # Start from per-model defaults (resolution, steps, guidance, seed, etc.) and set image count. + params = visual_gen.default_params + params.num_images_per_prompt = args.num_images_per_prompt + + output = visual_gen.generate(inputs=args.prompt, params=params) + + saved = output.save(_output_paths(args.output_path, args.num_images_per_prompt)) + print(f"Saved: {saved}") + + +if __name__ == "__main__": + main() diff --git a/examples/visual_gen/models/flux2.py b/examples/visual_gen/models/flux2.py new file mode 100644 index 000000000000..7147b1c7ea28 --- /dev/null +++ b/examples/visual_gen/models/flux2.py @@ -0,0 +1,91 @@ +#!/usr/bin/env python3 +# SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. +# SPDX-License-Identifier: Apache-2.0 +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. +"""FLUX.2 text-to-image generation. + +Usage: + python flux2.py + python flux2.py --visual_gen_args ../configs/flux2-dev-fp4-1gpu.yaml +""" + +import argparse +from pathlib import Path + +from tensorrt_llm import VisualGen, VisualGenArgs + + +def _output_paths(output_path: str, num_images: int) -> str | list[str]: + if num_images == 1: + return output_path + + path = Path(output_path) + return [str(path.with_name(f"{path.stem}_{idx + 1}{path.suffix}")) for idx in range(num_images)] + + +def main(): + parser = argparse.ArgumentParser(description="FLUX.2 Text-to-Image example") + parser.add_argument( + "--model", + type=str, + default="black-forest-labs/FLUX.2-dev", + help="Model path or HuggingFace Hub ID", + ) + parser.add_argument( + "--visual_gen_args", + "--extra_visual_gen_options", + dest="visual_gen_args", + type=str, + default=None, + help="Path to YAML config (same as trtllm-serve --visual_gen_args)", + ) + parser.add_argument( + "--prompt", + type=str, + default="A cat sitting on a windowsill, cinematic lighting, highly detailed", + help="Text prompt for image generation", + ) + parser.add_argument( + "--num_images_per_prompt", + type=int, + default=1, + help="Number of images to generate for the prompt", + ) + parser.add_argument( + "--output_path", + type=str, + default="flux2_output.png", + help="Path to save the output image. For multiple images, an index is appended.", + ) + args = parser.parse_args() + if args.num_images_per_prompt < 1: + raise ValueError("--num_images_per_prompt must be >= 1") + + # Engine config from shared YAML (optional); model-specific defaults apply otherwise. + extra_args = VisualGenArgs.from_yaml(args.visual_gen_args) if args.visual_gen_args else None + visual_gen = VisualGen(model=args.model, args=extra_args) + + # --- Model-specific: T2I request construction --- + # Start from per-model defaults (resolution, steps, guidance, seed, etc.) and set image count. + params = visual_gen.default_params + params.num_images_per_prompt = args.num_images_per_prompt + + output = visual_gen.generate(inputs=args.prompt, params=params) + + saved = output.save(_output_paths(args.output_path, args.num_images_per_prompt)) + print(f"Saved: {saved}") + + +if __name__ == "__main__": + main() diff --git a/examples/visual_gen/models/ltx2.py b/examples/visual_gen/models/ltx2.py new file mode 100644 index 000000000000..c3d2616ff347 --- /dev/null +++ b/examples/visual_gen/models/ltx2.py @@ -0,0 +1,97 @@ +#!/usr/bin/env python3 +# SPDX-FileCopyrightText: Copyright (c) 2022-2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. +# SPDX-License-Identifier: Apache-2.0 +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. +"""LTX-2 Text-to-Video generation with audio. + +Usage: + python ltx2.py + python ltx2.py --visual_gen_args ../configs/ltx2.yaml +""" + +import argparse + +from tensorrt_llm import VisualGen, VisualGenArgs + + +def main(): + parser = argparse.ArgumentParser(description="LTX-2 Text-to-Video example") + parser.add_argument( + "--model", + type=str, + default="Lightricks/LTX-2", + help="Model path or HuggingFace Hub ID", + ) + parser.add_argument( + "--visual_gen_args", + "--extra_visual_gen_options", + dest="visual_gen_args", + type=str, + default=None, + help="Path to YAML config (same as trtllm-serve --visual_gen_args)", + ) + parser.add_argument( + "--text_encoder_path", + type=str, + default=None, + help=( + "Gemma3 text encoder path. Overrides pipeline_config.text_encoder_path " + "from --visual_gen_args when set." + ), + ) + parser.add_argument( + "--output_path", + type=str, + default="ltx2_t2v_output.mp4", + help="Path to save the output video", + ) + args = parser.parse_args() + + # LTX-2 requires pipeline_config.text_encoder_path for the Gemma3 text + # encoder. The YAML path is preferred for production configs; the default + # below keeps this script runnable as a minimal offline example. + extra_args = ( + VisualGenArgs.from_yaml(args.visual_gen_args) if args.visual_gen_args else VisualGenArgs() + ) + text_encoder_path = args.text_encoder_path + if text_encoder_path is None and not args.visual_gen_args: + text_encoder_path = "google/gemma-3-12b-it" + if text_encoder_path is not None: + extra_args.pipeline_config = { + **extra_args.pipeline_config, + "text_encoder_path": text_encoder_path, + } + visual_gen = VisualGen(model=args.model, args=extra_args) + + # --- Model-specific: T2V request construction --- + # Start from LTX-2 defaults and override the main request shape explicitly. + params = visual_gen.default_params + params.height = 512 + params.width = 768 + params.num_frames = 121 + params.frame_rate = 24.0 + params.num_inference_steps = 40 + params.guidance_scale = 4.0 + + output = visual_gen.generate( + inputs="A cinematic shot of a cat walking through a field of flowers", + params=params, + ) + + output.save(args.output_path) + print(f"Saved: {args.output_path}") + + +if __name__ == "__main__": + main() diff --git a/examples/visual_gen/models/wan_i2v.py b/examples/visual_gen/models/wan_i2v.py new file mode 100644 index 000000000000..854ed43784b3 --- /dev/null +++ b/examples/visual_gen/models/wan_i2v.py @@ -0,0 +1,80 @@ +#!/usr/bin/env python3 +# SPDX-FileCopyrightText: Copyright (c) 2022-2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. +# SPDX-License-Identifier: Apache-2.0 +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. +"""Wan Image-to-Video generation. + +Usage: + python wan_i2v.py + python wan_i2v.py --visual_gen_args ../configs/wan2.2-i2v-fp4-1gpu.yaml +""" + +import argparse +import os + +from tensorrt_llm import VisualGen, VisualGenArgs + +_DEFAULT_IMAGE = os.path.join(os.path.dirname(os.path.abspath(__file__)), "..", "cat_piano.png") + + +def main(): + parser = argparse.ArgumentParser(description="Wan Image-to-Video example") + parser.add_argument( + "--model", + type=str, + default="Wan-AI/Wan2.2-I2V-A14B-Diffusers", + help="Model path or HuggingFace Hub ID", + ) + parser.add_argument( + "--visual_gen_args", + "--extra_visual_gen_options", + dest="visual_gen_args", + type=str, + default=None, + help="Path to YAML config (same as trtllm-serve --visual_gen_args)", + ) + parser.add_argument( + "--image", + type=str, + default=_DEFAULT_IMAGE, + help="Path to input image for I2V conditioning", + ) + parser.add_argument( + "--output_path", + type=str, + default="wan_i2v_output.mp4", + help="Path to save the output video", + ) + args = parser.parse_args() + + # Engine config from shared YAML (optional); model-specific defaults apply otherwise. + extra_args = VisualGenArgs.from_yaml(args.visual_gen_args) if args.visual_gen_args else None + visual_gen = VisualGen(model=args.model, args=extra_args) + + # --- Model-specific: I2V request construction --- + # Start from per-model defaults (steps, guidance, seed, etc.) and set the input image. + params = visual_gen.default_params + params.image = args.image + + output = visual_gen.generate( + inputs="A cat presses the piano keys with its paws, soft notes filling the quiet room.", + params=params, + ) + + output.save(args.output_path) + print(f"Saved: {args.output_path}") + + +if __name__ == "__main__": + main() diff --git a/jenkins/L0_MergeRequest.groovy b/jenkins/L0_MergeRequest.groovy index 27d2e1bef8e6..d24501dcf7bd 100644 --- a/jenkins/L0_MergeRequest.groovy +++ b/jenkins/L0_MergeRequest.groovy @@ -769,27 +769,24 @@ def getCbtsResult(pipeline, testFilter, globalVars) "Reasons: ${result.reasons.join('; ')}") return null } - // Piggyback input JSON on testFilter so each L0_Test stage agent can - // re-run main.py and regenerate cbts_test_db/ locally. The payload is - // base64-encoded because the raw JSON contains PR diffs and may include - // ${...} or {...} sequences that the Jenkins tokenmacro plugin would - // try to evaluate when the parent serializes globalVars for the - // Parameterized-Remote-Trigger plugin, raising MacroEvaluationException - // and blocking test dispatch. Capped at 256 KB (post-encoding, since - // that is what travels on the wire); oversize → drop piggyback, - // Layer 3 falls back to source. - final int CBTS_INPUT_PIGGYBACK_MAX_BYTES = 256000 - def inputJsonB64 = inputJson.bytes.encodeBase64().toString() - def inputJsonB64Size = inputJsonB64.length() - if (inputJsonB64Size <= CBTS_INPUT_PIGGYBACK_MAX_BYTES) { - result.cbts_input_json_b64 = inputJsonB64 - pipeline.echo("CBTS Layer 3: cbts_input_json_b64 piggyback enabled " + - "(${inputJsonB64Size} bytes encoded, ${inputJson.length()} bytes raw)") - } else { - pipeline.echo("CBTS Layer 3: cbts_input_json_b64 is ${inputJsonB64Size} bytes, " + - "exceeds ${CBTS_INPUT_PIGGYBACK_MAX_BYTES}-byte piggyback limit; " + - "downstream stages will fall back to source test-db " + - "(Layer 2 stage filtering still applies)") + // Upload the generated cbts_test_db/ to Artifactory so each L0_Test + // stage agent can download it directly instead of re-running main.py + // with the raw PR diff. This avoids passing large payloads as Jenkins + // parameters (env vars), which caused "Argument list too long" failures + // when diffs were large. Agents fall back to the source test-db if the + // download fails. + if (result.test_db_dir_override) { + try { + sh "tar czf /tmp/cbts_test_db.tar.gz -C ${LLM_ROOT} ${result.test_db_dir_override}" + trtllm_utils.uploadArtifacts("/tmp/cbts_test_db.tar.gz", "${UPLOAD_PATH}/cbts/") + result.cbts_test_db_artifact_path = "${UPLOAD_PATH}/cbts/cbts_test_db.tar.gz" + pipeline.echo("CBTS Layer 3: uploaded cbts_test_db to ${result.cbts_test_db_artifact_path}") + } catch (InterruptedException e) { + throw e + } catch (Exception e) { + pipeline.echo("CBTS Layer 3: artifact upload failed (${e.message}); " + + "agents will fall back to source test-db") + } } pipeline.echo("CBTS: scope=${result.scope}, " + "stages=${result.affected_stages.size()}") @@ -1096,10 +1093,11 @@ def getOnlyOneGroupChanged(pipeline, testFilter, globalVars) { return "" } -def collectTestResults(pipeline, testFilter) +def collectTestResults(pipeline, testFilter, globalVars) { collectResultPodSpec = createKubernetesPodConfig("", "agent") trtllm_utils.launchKubernetesPod(pipeline, collectResultPodSpec, "alpine", { + // 1. Serial: download tarballs, extract, and run junit stage ("Collect Test Result") { sh "rm -rf **/*.xml *.tar.gz" @@ -1129,80 +1127,192 @@ def collectTestResults(pipeline, testFilter) } junit(testResults: '**/results*.xml', allowEmptyResults : true) - } // Collect test result stage - stage("Rerun Report") { - sh "rm -rf rerun && mkdir -p rerun" - sh "find . -type f -wholename '*/rerun_results.xml' -exec sh -c 'mv \"{}\" \"rerun/\$(basename \$(dirname \"{}\"))_rerun_results.xml\"' \\; || true" - sh "find rerun -type f" - def rerunFileCount = sh(returnStdout: true, script: 'find rerun -type f | wc -l').replaceAll("\\s","").toInteger() - if (rerunFileCount == 0) { - echo "Rerun report is skipped because there is no rerun test data file." - return - } - def xmlFiles = findFiles(glob: 'rerun/**/*.xml') - def xmlFileList = xmlFiles.collect { it.path } - def inputfiles = xmlFileList.join(',') - echo "inputfiles: ${inputfiles}" - trtllm_utils.llmExecStepWithRetry(pipeline, script: "apk add python3") + + // Pre-install shared dependencies for parallel tasks trtllm_utils.llmExecStepWithRetry(pipeline, script: "apk add py3-pip") trtllm_utils.llmExecStepWithRetry(pipeline, script: "pip3 config set global.break-system-packages true") - sh """ - python3 llm/jenkins/scripts/test_rerun.py \ - generate_rerun_report \ - --output-file=rerun/rerun_report.xml \ - --input-files=${inputfiles} - """ - trtllm_utils.uploadArtifacts("rerun/rerun_report.html", "${UPLOAD_PATH}/test-results/") - echo "Rerun report: https://urm.nvidia.com/artifactory/${UPLOAD_PATH}/test-results/rerun_report.html" - catchError( - buildResult: 'SUCCESS', - stageResult: 'UNSTABLE') { - error "Some failed tests were reruned, please check the rerun report." - } - } // Rerun report stage - try { - stage("Test Coverage") { - sh "ls" - def CUR_PATH = sh(returnStdout: true, script: 'pwd').replaceAll("\\s","") - sh "echo ${CUR_PATH}" - sh "rm -rf cov && mkdir -p cov" - sh "find . -type f -wholename '*/.coverage.*' -exec mv {} cov/ \\; || true" - sh "cd cov && find . -type f" - def fileCount = sh(returnStdout: true, script: 'find cov -type f | wc -l').replaceAll("\\s","").toInteger() - if (fileCount == 0) { - echo "Test coverage is skipped because there is no test data file." + } // Collect test result stage + + // 2. Parallel: Rerun Report, Test Coverage, and AI Failure Analysis + def parallelTasks = [:] + parallelTasks["Rerun Report"] = { + try { + timeout(time: 10, unit: 'MINUTES') { + stage("Rerun Report") { + sh "rm -rf rerun && mkdir -p rerun" + sh "find . -type f -wholename '*/rerun_results.xml' -exec sh -c 'mv \"{}\" \"rerun/\$(basename \$(dirname \"{}\"))_rerun_results.xml\"' \\; || true" + sh "find rerun -type f" + def rerunFileCount = sh(returnStdout: true, script: 'find rerun -type f | wc -l').replaceAll("\\s","").toInteger() + if (rerunFileCount == 0) { + echo "Rerun report is skipped because there is no rerun test data file." return } - trtllm_utils.llmExecStepWithRetry(pipeline, script: "apk add py3-pip") - trtllm_utils.llmExecStepWithRetry(pipeline, script: "pip3 config set global.break-system-packages true") - trtllm_utils.llmExecStepWithRetry(pipeline, script: "pip3 install coverage") - sh "coverage --version" - - sh "cp llm/examples/openai_triton/manual_plugin/fmha_triton.py llm/examples/openai_triton/plugin_autogen/" - def coverageConfigFile = "cov/.coveragerc" + def xmlFiles = findFiles(glob: 'rerun/**/*.xml') + def xmlFileList = xmlFiles.collect { it.path } + def inputfiles = xmlFileList.join(',') + echo "inputfiles: ${inputfiles}" sh """ - echo '[paths]' > ${coverageConfigFile} - echo 'source1=\n ${CUR_PATH}/llm/examples/\n */TensorRT-LLM/src/examples/' >> ${coverageConfigFile} - echo 'source2=\n ${CUR_PATH}/llm/tensorrt_llm/\n */tensorrt_llm/' >> ${coverageConfigFile} - cat ${coverageConfigFile} + python3 llm/jenkins/scripts/test_rerun.py \ + generate_rerun_report \ + --output-file=rerun/rerun_report.xml \ + --input-files=${inputfiles} """ - - sh "cd cov && coverage combine" - sh "cd cov && find . -type f" - sh "cd cov && coverage report -i" // -i: ignore errors. Ignore the error that the source code file cannot be found. - sh "cd cov && coverage html -d test_coverage_html -i" - trtllm_utils.uploadArtifacts("cov/test_coverage_html/*", "${UPLOAD_PATH}/test-results/coverage-report/") - echo "Test coverage report: https://urm.nvidia.com/artifactory/${UPLOAD_PATH}/test-results/coverage-report/index.html" - } // Test coverage + trtllm_utils.uploadArtifacts("rerun/rerun_report.html", "${UPLOAD_PATH}/test-results/") + echo "Rerun report: https://urm.nvidia.com/artifactory/${UPLOAD_PATH}/test-results/rerun_report.html" + catchError( + buildResult: 'SUCCESS', + stageResult: 'UNSTABLE') { + error "Some failed tests were reruned, please check the rerun report." + } + } // Rerun report stage + } // timeout 10 min + } catch (Exception e) { + echo "Rerun Report failed or timed out: ${e.toString()}" + } } - catch (InterruptedException e) - { - throw e + parallelTasks["Test Coverage"] = { + try { + timeout(time: 10, unit: 'MINUTES') { + try { + stage("Test Coverage") { + sh "ls" + def CUR_PATH = sh(returnStdout: true, script: 'pwd').replaceAll("\\s","") + sh "echo ${CUR_PATH}" + sh "rm -rf cov && mkdir -p cov" + sh "find . -type f -wholename '*/.coverage.*' -exec mv {} cov/ \\; || true" + sh "cd cov && find . -type f" + def fileCount = sh(returnStdout: true, script: 'find cov -type f | wc -l').replaceAll("\\s","").toInteger() + if (fileCount == 0) { + echo "Test coverage is skipped because there is no test data file." + return + } + trtllm_utils.llmExecStepWithRetry(pipeline, script: "pip3 install coverage") + sh "coverage --version" + + sh "cp llm/examples/openai_triton/manual_plugin/fmha_triton.py llm/examples/openai_triton/plugin_autogen/" + def coverageConfigFile = "cov/.coveragerc" + sh """ + echo '[paths]' > ${coverageConfigFile} + echo 'source1=\n ${CUR_PATH}/llm/examples/\n */TensorRT-LLM/src/examples/' >> ${coverageConfigFile} + echo 'source2=\n ${CUR_PATH}/llm/tensorrt_llm/\n */tensorrt_llm/' >> ${coverageConfigFile} + cat ${coverageConfigFile} + """ + + sh "cd cov && coverage combine" + sh "cd cov && find . -type f" + sh "cd cov && coverage report -i" // -i: ignore errors. Ignore the error that the source code file cannot be found. + sh "cd cov && coverage html -d test_coverage_html -i" + trtllm_utils.uploadArtifacts("cov/test_coverage_html/*", "${UPLOAD_PATH}/test-results/coverage-report/") + echo "Test coverage report: https://urm.nvidia.com/artifactory/${UPLOAD_PATH}/test-results/coverage-report/index.html" + } // Test coverage + } + catch (InterruptedException e) + { + throw e + } + catch (Exception e) + { + pipeline.echo("Test coverage failed execution.") + } + } // timeout 10 min + } catch (Exception e) { + echo "Test Coverage failed or timed out: ${e.toString()}" + } } - catch (Exception e) - { - pipeline.echo("Test coverage failed execution.") + if (currentBuild.currentResult == 'FAILURE') { + parallelTasks["AI Failure Analysis"] = { + try { + timeout(time: 10, unit: 'MINUTES') { + stage("AI Failure Analysis") { + try { + def prNumber = null + if (globalVars[GITHUB_PR_API_URL]) { + def prMatch = (globalVars[GITHUB_PR_API_URL] =~ /\/pulls?\/(\d+)/) + if (prMatch) { + prNumber = prMatch[0][1] + } + } + def analysis = trtllm_utils.analyzePipelineFailureWithAgent( + pipeline, env.JOB_NAME, env.BUILD_NUMBER, prNumber) + if (analysis) { + def bucket = 'sw-tensorrt-ci-analysis' + def key = "${env.JOB_NAME}/${env.BUILD_NUMBER}/failure_analysis.html" + def htmlUrl = "https://pbss.s8k.io/v1/AUTH_svc_tensorrt/${bucket}/${key}" + // Self-rendering HTML page: marked.js parses the analysis at page load + // and DOMPurify sanitises the result before injection into the DOM. The + // analysis text comes from the CI agent which consumes build logs (which + // can include attacker-controlled PR content), so we treat it as untrusted. + // Hardening: + // 1. CDN scripts pinned to specific versions and protected with SRI. + // 2. Analysis embedded in a `` + // and break out of the data block. + // 3. marked output is run through DOMPurify before innerHTML assignment + // to strip event-handler attributes and other XSS vectors. + def jsonAnalysis = groovy.json.JsonOutput.toJson(analysis).replace("<", "\\u003c") + def htmlDoc = """ + +CI Failure Analysis · ${env.JOB_NAME} #${env.BUILD_NUMBER} + + + + +
${env.JOB_NAME} #${env.BUILD_NUMBER}
+
+ + + +""" + writeFile file: 'failure_analysis.html', text: htmlDoc + trtllm_utils.llmExecStepWithRetry(pipeline, script: 'apk add --no-cache aws-cli') + // Alpine's musl libc fires A and AAAA queries in parallel; pbss.s8k.io's AAAA + // returns SERVFAIL and musl treats that as a fatal lookup failure (glibc would + // not). Pin the A-record IP in /etc/hosts so getaddrinfo resolves from files. + trtllm_utils.llmExecStepWithRetry(pipeline, script: ''' + if ! grep -q 'pbss.s8k.io' /etc/hosts; then + ip=$(nslookup -type=A pbss.s8k.io 2>/dev/null | awk '/^Address[: ]/ && $NF !~ /:53$/ && $NF !~ /#53$/ { print $NF; exit }') + if [ -n "$ip" ]; then + printf '%s\\n' "$ip pbss.s8k.io" >> /etc/hosts + fi + fi + ''') + withCredentials([string( + credentialsId: 'svc_tensorrt-swift-stack-key', + variable: 'AWS_SECRET_ACCESS_KEY')]) { + trtllm_utils.llmExecStepWithRetry(pipeline, script: + "AWS_ACCESS_KEY_ID=svc_tensorrt aws s3 cp failure_analysis.html" + + " 's3://${bucket}/${key}' --endpoint-url https://pbss.s8k.io" + + " --content-type text/html") + } + // Surface the URL via currentBuild.description so the upstream PR_Github + // wrapper can extract it and include it in the GitHub PR comment. + def existingDesc = currentBuild.description ?: "" + currentBuild.description = existingDesc + + (existingDesc ? "
" : "") + + "CI Agent Failure Analysis" + echo "CI Agent Failure Analysis: ${htmlUrl}" + } + } catch (Exception e) { + // Analysis is best-effort; do not fail the pipeline + } + } + } // timeout 10 min + } catch (Exception e) { + echo "AI Failure Analysis failed or timed out: ${e.toString()}" + } + } } + parallel parallelTasks }) } @@ -1613,98 +1723,8 @@ pipeline { } } } - failure { - script { - try { - def prNumber = null - if (globalVars[GITHUB_PR_API_URL]) { - def prMatch = (globalVars[GITHUB_PR_API_URL] =~ /\/pulls?\/(\d+)/) - if (prMatch) { - prNumber = prMatch[0][1] - } - } - def analysis = trtllm_utils.analyzePipelineFailureWithAgent( - this, env.JOB_NAME, env.BUILD_NUMBER, prNumber) - if (analysis) { - def bucket = 'sw-tensorrt-ci-analysis' - def key = "${env.JOB_NAME}/${env.BUILD_NUMBER}/failure_analysis.html" - def htmlUrl = "https://pbss.s8k.io/v1/AUTH_svc_tensorrt/${bucket}/${key}" - // Self-rendering HTML page: marked.js parses the analysis at page load - // and DOMPurify sanitises the result before injection into the DOM. The - // analysis text comes from the CI agent which consumes build logs (which - // can include attacker-controlled PR content), so we treat it as untrusted. - // Hardening: - // 1. CDN scripts pinned to specific versions and protected with SRI. - // 2. Analysis embedded in a `` - // and break out of the data block. - // 3. marked output is run through DOMPurify before innerHTML assignment - // to strip event-handler attributes and other XSS vectors. - def jsonAnalysis = groovy.json.JsonOutput.toJson(analysis).replace("<", "\\u003c") - def htmlDoc = """ - -CI Failure Analysis · ${env.JOB_NAME} #${env.BUILD_NUMBER} - - - - -
${env.JOB_NAME} #${env.BUILD_NUMBER}
-
- - - -""" - writeFile file: 'failure_analysis.html', text: htmlDoc - container("alpine") { - trtllm_utils.llmExecStepWithRetry(this, script: 'apk add --no-cache aws-cli') - // Alpine's musl libc fires A and AAAA queries in parallel; pbss.s8k.io's AAAA - // returns SERVFAIL and musl treats that as a fatal lookup failure (glibc would - // not). Pin the A-record IP in /etc/hosts so getaddrinfo resolves from files. - trtllm_utils.llmExecStepWithRetry(this, script: ''' - if ! grep -q 'pbss.s8k.io' /etc/hosts; then - ip=$(nslookup -type=A pbss.s8k.io 2>/dev/null | awk '/^Address[: ]/ && $NF !~ /:53$/ && $NF !~ /#53$/ { print $NF; exit }') - if [ -n "$ip" ]; then - printf '%s\\n' "$ip pbss.s8k.io" >> /etc/hosts - fi - fi - ''') - withCredentials([string( - credentialsId: 'svc_tensorrt-swift-stack-key', - variable: 'AWS_SECRET_ACCESS_KEY')]) { - trtllm_utils.llmExecStepWithRetry(this, script: - "AWS_ACCESS_KEY_ID=svc_tensorrt aws s3 cp failure_analysis.html" + - " 's3://${bucket}/${key}' --endpoint-url https://pbss.s8k.io" + - " --content-type text/html") - } - } - // Surface the URL via currentBuild.description so the upstream PR_Github - // wrapper can extract it and include it in the GitHub PR comment. - def existingDesc = currentBuild.description ?: "" - currentBuild.description = existingDesc + - (existingDesc ? "
" : "") + - "CI Agent Failure Analysis" - echo "CI Agent Failure Analysis: ${htmlUrl}" - } - } catch (Exception e) { - // Analysis is best-effort; do not fail the pipeline - } - } - } always { script { - if (!isReleaseCheckMode && !GEN_POST_MERGE_BUILDS_ONLY) { - collectTestResults(this, testFilter) - } stage("Upload Build Info") { try { def branch = env.gitlabBranch ? env.gitlabBranch : "main" @@ -1722,6 +1742,9 @@ pipeline { echo "Upload Build Info failed: ${e.toString()}" } } + if (!isReleaseCheckMode && !GEN_POST_MERGE_BUILDS_ONLY) { + collectTestResults(this, testFilter, globalVars) + } } } } diff --git a/jenkins/L0_Test.groovy b/jenkins/L0_Test.groovy index 60f68382e988..590d5b27171e 100644 --- a/jenkins/L0_Test.groovy +++ b/jenkins/L0_Test.groovy @@ -29,6 +29,7 @@ LLM_ROOT = "llm" ARTIFACT_PATH = env.artifactPath ? env.artifactPath : "sw-tensorrt-generic/llm-artifacts/${JOB_NAME}/${BUILD_NUMBER}" UPLOAD_PATH = env.uploadPath ? env.uploadPath : "sw-tensorrt-generic/llm-artifacts/${JOB_NAME}/${BUILD_NUMBER}" +URM_ARTIFACTORY_BASE = "https://urm.nvidia.com/artifactory" X86_64_TRIPLE = "x86_64-linux-gnu" AARCH64_TRIPLE = "aarch64-linux-gnu" @@ -299,7 +300,7 @@ def runIsolatedTests(preprocessedLists, testCmdLine, llmSrc, stageName) { return rerunFailed // Return the updated value } -def processShardTestList(llmSrc, testDBList, splitId, splits, perfMode=false) { +def processShardTestList(llmSrc, testDBList, splitId, splits, perfMode=false, durationsPath="") { // Preprocess testDBList to extract ISOLATION markers echo "Preprocessing testDBList to extract ISOLATION markers..." @@ -366,8 +367,11 @@ def processShardTestList(llmSrc, testDBList, splitId, splits, perfMode=false) { "--test-list=${cleanedTestDBList}", "--quiet", "--splits ${splits}", - "--group ${splitId}" + "--group ${splitId}", ] + if (durationsPath) { + testListCmd += ["--durations-path ${durationsPath}"] + } try { // First execute the pytest command and check if it succeeds @@ -581,7 +585,7 @@ def cleanUpNodeResources(def pipeline, SlurmCluster cluster, String clusterName, } } -def runLLMTestlistWithAgent(pipeline, platform, testList, config=VANILLA_CONFIG, perfMode=false, stageName="Undefined", splitId=1, splits=1, gpuCount=1, skipInstallWheel=false, cpver="cp312", String postTag="") +def runLLMTestlistWithAgent(pipeline, platform, testList, config=VANILLA_CONFIG, perfMode=false, stageName="Undefined", splitId=1, splits=1, gpuCount=1, skipInstallWheel=false, cpver="cp312", String postTag="", boolean useClusterDurations=false) { SlurmPartition partition = SlurmConfig.resolvePlatform(platform) SlurmCluster cluster = SlurmConfig.clusterConfig[partition.clusterName] @@ -651,46 +655,14 @@ def runLLMTestlistWithAgent(pipeline, platform, testList, config=VANILLA_CONFIG, stage('Check If Node Is Online') { CloudManager.withSlurmSshCredentials(pipeline, partition.clusterName, cluster) { remote -> - def counter = 0 - // We submit the Slurm job with 5 hours timeout, and the K8S pod will be evicted after 22 hours. - // Let's use 15 hours to check if the node is online, and with 2 hours buffer. - while (!CloudManager.isNodeOnline(nodeName) && counter < 90) { - // Wait 10 minutes to check status of the node again - sleep(time: 10, unit: 'MINUTES') - // Avoid the node being stuck in the held state. - if (counter % 3 == 0) { - Utils.exec(pipeline, script: Utils.sshUserCmd(remote, "\"scontrol release ${slurmJobID} || true\""), numRetries: 3) - } - counter++ - // If entrypoint script fails to start, do not poll for agent connection + // Check the SLURM job once; if it is no longer active, raise a typed + // InfraFailure(SLURM) so the retry layer routes it via instanceof (scope=SLURM). + def checkSlurmJobActive = { try { SlurmConfig.checkJobStatus(pipeline, cluster, slurmJobID, remote) } catch (InterruptedException e) { throw e } catch (Exception e) { - // If the exception is about job being inactive, throw a typed - // InfraFailure(SLURM) so downstream consumers route via instanceof - // rather than substring matching the catalog. The " outer rethrows - // without retry. No double-budget consumption. if (e.message?.contains("is no longer active")) { throw new InfraFailure( "${e.message}. Check SLURM logs at /home/svc_tensorrt/slurm-logs/slurm-${slurmJobID}-${nodeName}.out on ${cluster.host}", @@ -701,6 +673,66 @@ def runLLMTestlistWithAgent(pipeline, platform, testList, config=VANILLA_CONFIG, } } + // Phase 1: wait for the job to leave the queue (PENDING -> RUNNING), polling + // every 3 min. The whole loop runs in a SINGLE shell step so a long queue wait + // only adds one flow-node to the Blue Ocean graph (instead of one per iteration, + // which overflowed the per-stage step cap). Release the held job every 10 + // iterations (~30 min). 300 iterations * 3 min = 15h budget. + // Exit codes: 0 = job RUNNING, 3 = job no longer active, 4 = timed out. + def sacctStateCmd = Utils.sshUserCmd(remote, "\"sacct -j ${slurmJobID} --format=State -Pn --allocations\"") + def releaseCmd = Utils.sshUserCmd(remote, "\"scontrol release ${slurmJobID} || true\"") + def waitRc = pipeline.sh(returnStatus: true, script: """ + set +e + counter=0 + while [ \$counter -lt 300 ]; do + # Avoid the job being stuck in the held state. Release every 10 iterations (~30 min). + if [ \$(( counter % 10 )) -eq 0 ]; then + ${releaseCmd} || true + fi + STATE=\$(${sacctStateCmd} | head -1 | cut -d'|' -f1 | awk '{print \$1}') + echo "[node-wait] iteration \$counter: SLURM job ${slurmJobID} state='\$STATE'" + case "\$STATE" in + RUNNING|COMPLETING) + echo "[node-wait] SLURM job ${slurmJobID} is running." + exit 0 + ;; + PENDING|CONFIGURING|REQUEUED|RESIZING|SUSPENDED|SIGNALING|STOPPED|"") + # Still queued, or a transient sacct/ssh hiccup (empty state): keep waiting. + ;; + *) + echo "[node-wait] SLURM job ${slurmJobID} is no longer active (state='\$STATE')." + exit 3 + ;; + esac + counter=\$(( counter + 1 )) + # Wait 3 minutes before checking the job state again. + sleep 180 + done + echo "[node-wait] Timed out waiting for SLURM job ${slurmJobID} to start." + exit 4 + """) + + // If the job reached a terminal state while queued, confirm via the canonical + // status check so the exact typed InfraFailure(SLURM) is raised. + if (waitRc == 3) { + checkSlurmJobActive() + } + + // Phase 2: job is RUNNING; wait for the Jenkins agent to come online. isNodeOnline() + // and Thread.sleep() emit no flow-nodes, so poll every 30s without bloating Blue + // Ocean, and probe job status every ~3 min (every 6th iter) to fail fast if the + // job dies during bring-up. 120 * 30s = 1h. + if (waitRc == 0) { + def onlineCounter = 0 + while (!CloudManager.isNodeOnline(nodeName) && onlineCounter < 120) { + Thread.sleep(30L * 1000L) + if (onlineCounter % 6 == 0) { + checkSlurmJobActive() + } + onlineCounter++ + } + } + if (CloudManager.isNodeOnline(nodeName)) { node(nodeName) { sh """ @@ -772,7 +804,7 @@ def runLLMTestlistWithAgent(pipeline, platform, testList, config=VANILLA_CONFIG, } else { throw new Exception("Unsupported container runtime: ${cluster.containerRuntime}") } - executeLLMTestOnSlurm(pipeline, platform, testList, config, perfMode, stageName, splitId, splits, skipInstallWheel, cpver, slurmRunner, postTag) + executeLLMTestOnSlurm(pipeline, platform, testList, config, perfMode, stageName, splitId, splits, skipInstallWheel, cpver, slurmRunner, postTag, useClusterDurations) } finally { stage("Clean Up Slurm Resource") { // Workaround to handle the interruption during clean up SLURM resources @@ -787,12 +819,12 @@ def runLLMTestlistWithAgent(pipeline, platform, testList, config=VANILLA_CONFIG, } } -def executeLLMTestOnSlurm(pipeline, platform, testList, config=VANILLA_CONFIG, perfMode=false, stageName="Undefined", splitId=1, splits=1, skipInstallWheel=false, cpver="cp312", runner, String postTag="") +def executeLLMTestOnSlurm(pipeline, platform, testList, config=VANILLA_CONFIG, perfMode=false, stageName="Undefined", splitId=1, splits=1, skipInstallWheel=false, cpver="cp312", runner, String postTag="", boolean useClusterDurations=false) { runner { // TODO: refactor the finallyRunner to reuse within slurm or nonslurm job. cacheErrorAndUploadResult(stageName, { - runLLMTestlistOnPlatformImpl(pipeline, platform, testList, config, perfMode, stageName, splitId, splits, skipInstallWheel, cpver, false, postTag) + runLLMTestlistOnPlatformImpl(pipeline, platform, testList, config, perfMode, stageName, splitId, splits, skipInstallWheel, cpver, false, postTag, useClusterDurations) }, { // If the execution test list is null, remove the test result xml sh """ @@ -951,7 +983,7 @@ def getMountListForSlurmTest(SlurmCluster cluster, boolean useSbatch = false) return mounts } -def runLLMTestlistWithSbatch(pipeline, platform, testList, config=VANILLA_CONFIG, perfMode=false, stageName="Undefined", splitId=1, splits=1, gpuCount=1, nodeCount=1, skipInstallWheel=false, cpver="cp312", String postTag="") +def runLLMTestlistWithSbatch(pipeline, platform, testList, config=VANILLA_CONFIG, perfMode=false, stageName="Undefined", splitId=1, splits=1, gpuCount=1, nodeCount=1, skipInstallWheel=false, cpver="cp312", String postTag="", boolean useClusterDurations=false) { SlurmPartition partition = SlurmConfig.resolvePlatform(platform) SlurmCluster cluster = SlurmConfig.clusterConfig[partition.clusterName] @@ -1035,7 +1067,8 @@ def runLLMTestlistWithSbatch(pipeline, platform, testList, config=VANILLA_CONFIG // line is "Mako options:", maybe we can make it more generic, which // if the line cannot be split by "=", just ignore that line. def makoOptsJson = transformMakoArgsToJson(["Mako options:"] + makoArgs) - def testListPathLocal = renderTestDB(pipeline, testList, llmSrcLocal, stageName, makoOptsJson) + String clusterNameForDurations = useClusterDurations ? partition.clusterName.replaceAll('[^a-zA-Z0-9]', '_') : null + def testListPathLocal = renderTestDB(pipeline, testList, llmSrcLocal, stageName, makoOptsJson, clusterNameForDurations) Utils.copyFileToRemoteHost( pipeline, remote, @@ -1082,6 +1115,12 @@ def runLLMTestlistWithSbatch(pipeline, platform, testList, config=VANILLA_CONFIG pytestUtil = "$llmSrcNode/tensorrt_llm/llmapi/trtllm-llmapi-launch" } + def clusterDurationsArgsNode = [] + if (useClusterDurations) { + def clusterKey = partition.clusterName.replaceAll('[^a-zA-Z0-9]', '_') + def clusterDurationsPathNode = "${llmSrcNode}/tests/integration/defs/.test_durations_${clusterKey}" + clusterDurationsArgsNode = ["--durations-path ${clusterDurationsPathNode}"] + } def pytestCommand = getPytestBaseCommandLine( llmSrcNode, stageName, @@ -1095,7 +1134,8 @@ def runLLMTestlistWithSbatch(pipeline, platform, testList, config=VANILLA_CONFIG "--test-list=$testListPathNode", "--splitting-algorithm least_duration", "--splits $splits", - "--group $splitId" + "--group $splitId", + *clusterDurationsArgsNode, ] ).join(" ") @@ -1484,7 +1524,7 @@ def _cbtsMaybeCollapseSplits(stageName, splitId, splits) { return [skip: false, splits: 1, splitId: 1] } -def runLLMTestlistOnSlurm(pipeline, platform, testList, config=VANILLA_CONFIG, perfMode=false, stageName="Undefined", splitId=1, splits=1, gpuCount=1, nodeCount=1, runWithSbatch=false, skipInstallWheel=false, cpver="cp312", String outerAttemptTag="") +def runLLMTestlistOnSlurm(pipeline, platform, testList, config=VANILLA_CONFIG, perfMode=false, stageName="Undefined", splitId=1, splits=1, gpuCount=1, nodeCount=1, runWithSbatch=false, skipInstallWheel=false, cpver="cp312", String outerAttemptTag="", boolean useClusterDurations=false) { def collapse = _cbtsMaybeCollapseSplits(stageName, splitId, splits) if (collapse.skip) { @@ -1519,9 +1559,9 @@ def runLLMTestlistOnSlurm(pipeline, platform, testList, config=VANILLA_CONFIG, p def postTag = "${outerAttemptTag}${innerSuffix}" if (nodeCount > 1 || runWithSbatch) { - runLLMTestlistWithSbatch(pipeline, platform, testList, config, perfMode, stageName, splitId, splits, gpuCount, nodeCount, skipInstallWheel, cpver, postTag) + runLLMTestlistWithSbatch(pipeline, platform, testList, config, perfMode, stageName, splitId, splits, gpuCount, nodeCount, skipInstallWheel, cpver, postTag, useClusterDurations) } else { - runLLMTestlistWithAgent(pipeline, platform, testList, config, perfMode, stageName, splitId, splits, gpuCount, skipInstallWheel, cpver, postTag) + runLLMTestlistWithAgent(pipeline, platform, testList, config, perfMode, stageName, splitId, splits, gpuCount, skipInstallWheel, cpver, postTag, useClusterDurations) } // Job succeeded @@ -1683,9 +1723,9 @@ class GlobalState { static final int MAX_PORT = 32000 // Maximum port number to avoid system ports } -def recordRenderedStageAttemptEstimate(pipeline, String llmSrc, String testListPath, String stageName, def renderedTestCount) +def recordRenderedStageAttemptEstimate(pipeline, String llmSrc, String testListPath, String stageName, def renderedTestCount, String clusterName=null) { - def estimate = trtllm_utils.estimateRenderedStageAttemptMillis(pipeline, llmSrc, testListPath, stageName, renderedTestCount) + def estimate = trtllm_utils.estimateRenderedStageAttemptMillis(pipeline, llmSrc, testListPath, stageName, renderedTestCount, clusterName) if (estimate.error) { echo "[CI-BUDGET] ${stageName}: failed to read .test_durations; using count-based estimate. Error: ${estimate.error}" } @@ -2452,7 +2492,7 @@ def getMakoArgsFromStageName(stageName, parseSysinfo=false) { return makoArgs } -def renderTestDB(pipeline, testContext, llmSrc, stageName, preDefinedMakoOpts=null) { +def renderTestDB(pipeline, testContext, llmSrc, stageName, preDefinedMakoOpts=null, String clusterName=null) { def makoOpts = preDefinedMakoOpts if (!makoOpts) { @@ -2462,28 +2502,24 @@ def renderTestDB(pipeline, testContext, llmSrc, stageName, preDefinedMakoOpts=nu } sh "pip3 install --extra-index-url https://urm.nvidia.com/artifactory/api/pypi/sw-tensorrt-pypi/simple --ignore-installed trt-test-db==1.8.5+bc6df7" - // CBTS Layer 3: regenerate cbts_test_db/ on this stage agent from the - // piggybacked input JSON if not already present. The piggyback payload is - // base64-encoded on the orchestrator (see getCbtsResult in - // L0_MergeRequest.groovy) to keep tokenmacro from interpreting ${...} or - // {...} fragments inside the PR diff when globalVars is serialized. If - // decoding or regeneration throws (truncated/malformed payload), we - // swallow the error: the override directory will be absent below, the - // overrideYaml check will fail, and renderTestDB falls back to the - // source test-db. + // CBTS Layer 3: download the pre-built cbts_test_db/ tarball that the + // orchestrator uploaded to Artifactory (see getCbtsResult in + // L0_MergeRequest.groovy). This avoids re-running main.py locally and + // avoids passing large PR-diff payloads as Jenkins parameters (env vars). + // If the download or extraction fails we swallow the error: the override + // directory will be absent below, the overrideYaml check will fail, and + // renderTestDB falls back to the source test-db. def cbts = testFilter[(CBTS_RESULT)] - if (cbts != null && cbts.test_db_dir_override && cbts.cbts_input_json_b64) { + if (cbts != null && cbts.test_db_dir_override && cbts.cbts_test_db_artifact_path) { def overrideDir = "${llmSrc}/${cbts.test_db_dir_override}" def dirExists = sh(returnStdout: true, script: "test -d ${overrideDir} && echo yes || echo no").trim() if (dirExists != "yes") { try { - def cbtsInputJson = new String(cbts.cbts_input_json_b64.decodeBase64()) - def cbtsInputLocal = Utils.createTempLocation(pipeline, "./cbts_input.json") - pipeline.writeFile(file: cbtsInputLocal, text: cbtsInputJson) - sh "apt-get update -qq && apt-get install -y -qq python3-yaml || true" - sh "cd ${llmSrc} && python3 jenkins/scripts/cbts/main.py ${cbtsInputLocal} > /dev/null 2>&1 || true" + def artifactUrl = "${URM_ARTIFACTORY_BASE}/${cbts.cbts_test_db_artifact_path}" + sh "wget -q '${artifactUrl}' -O /tmp/cbts_test_db.tar.gz && tar xzf /tmp/cbts_test_db.tar.gz -C ${llmSrc}" + echo "CBTS Layer 3: extracted cbts_test_db from artifact" } catch (Exception e) { - echo "CBTS Layer 3: failed to materialize piggyback payload " + + echo "CBTS Layer 3: artifact download failed " + "(${e.class.simpleName}: ${e.message}); falling back to source test-db" } } @@ -2518,7 +2554,7 @@ def renderTestDB(pipeline, testContext, llmSrc, stageName, preDefinedMakoOpts=nu def testDBLabel = (cbts != null && cbts.test_db_dir_override) ? "CBTS-narrowed [${cbts.scope}]" : "source" echo "renderTestDB: stage=${stageName} context=${testContext} test-db=${testDBLabel} dir=${testDBPath} -> ${testCount} tests" sh(script: "cat ${testList}") - recordRenderedStageAttemptEstimate(pipeline, llmSrc, testList, stageName, testCount) + recordRenderedStageAttemptEstimate(pipeline, llmSrc, testList, stageName, testCount, clusterName) return testList } @@ -3028,7 +3064,7 @@ def priorAttemptTags(String postTag) { return priors } -def runLLMTestlistOnPlatformImpl(pipeline, platform, testList, config=VANILLA_CONFIG, perfMode=false, stageName="Undefined", splitId=1, splits=1, skipInstallWheel=false, cpver="cp312", typeCheck=false, String postTag="") +def runLLMTestlistOnPlatformImpl(pipeline, platform, testList, config=VANILLA_CONFIG, perfMode=false, stageName="Undefined", splitId=1, splits=1, skipInstallWheel=false, cpver="cp312", typeCheck=false, String postTag="", boolean useClusterDurations=false) { // Step 1: create LLM_ROOT dir and clean up the workspace def llmRootConfig = "${LLM_ROOT}${config}" @@ -3178,7 +3214,23 @@ def runLLMTestlistOnPlatformImpl(pipeline, platform, testList, config=VANILLA_CO def noRegularTests = false def noIsolateTests = false def rerunFailed = false - def testDBList = renderTestDB(pipeline, testList, llmSrc, stageName) + + // When useClusterDurations is set, use a per-cluster durations file keyed on + // partition.clusterName (e.g. "aws-dfw", "dlcluster"). This lets each cluster + // build its own timing baseline so sharding is not skewed by timings collected + // on different hardware. Falls back to the shared .test_durations when unset. + def clusterDurationsArgs = [] + def clusterDurationsPath = "" + String clusterNameForDurations = null + if (useClusterDurations) { + def partition = SlurmConfig.resolvePlatform(platform) + def clusterKey = partition.clusterName.replaceAll('[^a-zA-Z0-9]', '_') + clusterNameForDurations = clusterKey + clusterDurationsPath = "${llmSrc}/tests/integration/defs/.test_durations_${clusterKey}" + clusterDurationsArgs = ["--durations-path ${clusterDurationsPath}"] + } + + def testDBList = renderTestDB(pipeline, testList, llmSrc, stageName, null, clusterNameForDurations) // Download and Merge waives.txt mergeWaivesTxt(pipeline, llmSrc, stageName) @@ -3189,7 +3241,7 @@ def runLLMTestlistOnPlatformImpl(pipeline, platform, testList, config=VANILLA_CO } // Process shard test list and create separate files for regular and isolate tests - def preprocessedLists = processShardTestList(llmSrc, testDBList, splitId, splits, perfMode) + def preprocessedLists = processShardTestList(llmSrc, testDBList, splitId, splits, perfMode, clusterDurationsPath) // Test Coverage def TRTLLM_WHL_PATH = sh(returnStdout: true, script: "pip3 show tensorrt_llm | grep Location | cut -d ' ' -f 2").replaceAll("\\s","") @@ -3223,7 +3275,7 @@ def runLLMTestlistOnPlatformImpl(pipeline, platform, testList, config=VANILLA_CO TRTLLM_WHL_PATH, coverageConfigFile, "", // pytestUtil - [], // extraArgs + clusterDurationsArgs, containerPortStart, containerPortNum ) @@ -3395,7 +3447,7 @@ def runLLMTestlistOnPlatformImpl(pipeline, platform, testList, config=VANILLA_CO // composed with an attempt tag by the helper) and `isFinalAttempt` (so this // function's `cacheErrorAndUploadResult` can suppress synthetic stage-fail XML // and junit() for intermediate retryable failures). -def runLLMTestlistOnPlatform(pipeline, platform, testList, config=VANILLA_CONFIG, perfMode=false, stageName="Undefined", splitId=1, splits=1, skipInstallWheel=false, cpver="cp312", postTag="", typeCheck=false, boolean isFinalAttempt=true, Map retryContext=null) +def runLLMTestlistOnPlatform(pipeline, platform, testList, config=VANILLA_CONFIG, perfMode=false, stageName="Undefined", splitId=1, splits=1, skipInstallWheel=false, cpver="cp312", postTag="", typeCheck=false, boolean isFinalAttempt=true, Map retryContext=null, boolean useClusterDurations=false) { def collapse = _cbtsMaybeCollapseSplits(stageName, splitId, splits) if (collapse.skip) { @@ -3405,7 +3457,7 @@ def runLLMTestlistOnPlatform(pipeline, platform, testList, config=VANILLA_CONFIG splitId = collapse.splitId cacheErrorAndUploadResult(stageName, { - runLLMTestlistOnPlatformImpl(pipeline, platform, testList, config, perfMode, stageName, splitId, splits, skipInstallWheel, cpver, typeCheck, postTag) + runLLMTestlistOnPlatformImpl(pipeline, platform, testList, config, perfMode, stageName, splitId, splits, skipInstallWheel, cpver, typeCheck, postTag, useClusterDurations) }, { if (testFilter[(DEBUG_MODE)]) { try { @@ -3900,11 +3952,11 @@ def runKubernetesPodWithInfraRetry(Map opts = [:], pipeline, podSpec, containerN } } -def buildStageConfigs(stageName, platform, testlist, testCount, gpuCount, nodeCount, runWithSbatch=false) { +def buildStageConfigs(stageName, platform, testlist, testCount, gpuCount, nodeCount, runWithSbatch=false, useClusterDurations=false) { def configs = [:] for (int k = 1; k <= testCount; k++) { def key = "${stageName}-${k}" - configs[key] = [platform, testlist, k, testCount, gpuCount, nodeCount, runWithSbatch] + configs[key] = [platform, testlist, k, testCount, gpuCount, nodeCount, runWithSbatch, useClusterDurations] } return configs } @@ -4031,11 +4083,9 @@ def launchTestJobs(pipeline, testFilter) "DGX_A100-FMHA-Post-Merge-1": ["auto:dgx-a100-x1", "l0_a100", 1, 1], "DGX_H100-2_GPUs-PyTorch-Others-1": ["auto:dgx-h100-x2", "l0_dgx_h100", 1, 2, 2], "DGX_H100-2_GPUs-PyTorch-Others-2": ["auto:dgx-h100-x2", "l0_dgx_h100", 2, 2, 2], - "DGX_H100-2_GPUs-PyTorch-GptOss-1": ["auto:dgx-h100-x2", "l0_dgx_h100", 1, 2, 2], - "DGX_H100-2_GPUs-PyTorch-GptOss-2": ["auto:dgx-h100-x2", "l0_dgx_h100", 2, 2, 2], + "DGX_H100-2_GPUs-PyTorch-GptOss-1": ["auto:dgx-h100-x2", "l0_dgx_h100", 1, 1, 2], "DGX_H100-2_GPUs-PyTorch-Ray-1": ["auto:dgx-h100-x2", "l0_dgx_h100", 1, 1, 2], - "DGX_H100-4_GPUs-PyTorch-DeepSeek-1": ["auto:dgx-h100-x4", "l0_dgx_h100", 1, 2, 4], - "DGX_H100-4_GPUs-PyTorch-DeepSeek-2": ["auto:dgx-h100-x4", "l0_dgx_h100", 2, 2, 4], + "DGX_H100-4_GPUs-PyTorch-DeepSeek-1": ["auto:dgx-h100-x4", "l0_dgx_h100", 1, 1, 4], "DGX_H100-4_GPUs-PyTorch-GptOss-1": ["auto:dgx-h100-x4", "l0_dgx_h100", 1, 1, 4], "DGX_H100-4_GPUs-PyTorch-Others-1": ["auto:dgx-h100-x4", "l0_dgx_h100", 1, 2, 4], "DGX_H100-4_GPUs-PyTorch-Others-2": ["auto:dgx-h100-x4", "l0_dgx_h100", 2, 2, 4], @@ -4053,6 +4103,7 @@ def launchTestJobs(pipeline, testFilter) "DGX_B200-Triton-Post-Merge-1": ["auto:dgx-b200-flex", "l0_b200", 1, 1, 1, 1, true], "DGX_B200-PyTorch-Post-Merge-1": ["auto:dgx-b200-flex", "l0_b200", 1, 2, 1, 1, true], "DGX_B200-PyTorch-Post-Merge-2": ["auto:dgx-b200-flex", "l0_b200", 2, 2, 1, 1, true], + "DGX_B200-2_GPUs-PyTorch-1": ["auto:dgx-b200-flex", "l0_dgx_b200", 1, 1, 2, 1, true], "DGX_B200-4_GPUs-PyTorch-1": ["auto:dgx-b200-flex", "l0_dgx_b200", 1, 3, 4, 1, true], "DGX_B200-4_GPUs-PyTorch-2": ["auto:dgx-b200-flex", "l0_dgx_b200", 2, 3, 4, 1, true], "DGX_B200-4_GPUs-PyTorch-3": ["auto:dgx-b200-flex", "l0_dgx_b200", 3, 3, 4, 1, true], @@ -4127,9 +4178,15 @@ def launchTestJobs(pipeline, testFilter) fullSet += SBSATestConfigs.keySet() SBSASlurmTestConfigs = [ - "GB200-4_GPUs-PyTorch-1": ["auto:gb200-x4", "l0_gb200_multi_gpus", 1, 2, 4], - "GB200-4_GPUs-PyTorch-2": ["auto:gb200-x4", "l0_gb200_multi_gpus", 2, 2, 4], - "GB200-4_GPUs-PyTorch-Post-Merge-1": ["auto:gb200-x4", "l0_gb200_multi_gpus", 1, 1, 4], + // [platform, testList, splitId, splits, gpuCount, nodeCount?, runWithSbatch?, useClusterDurations?] + // useClusterDurations=true: record actual test times so each cluster builds its own + // .test_durations_ baseline for load-balanced sharding. + "GB200-4_GPUs-PyTorch-1": ["auto:gb200-x4-split", "l0_gb200_multi_gpus", 1, 5, 4, 1, false, true], + "GB200-4_GPUs-PyTorch-2": ["auto:gb200-x4-split", "l0_gb200_multi_gpus", 2, 5, 4, 1, false, true], + "GB200-4_GPUs-PyTorch-3": ["auto:gb200-x4-split", "l0_gb200_multi_gpus", 3, 5, 4, 1, false, true], + "GB200-4_GPUs-PyTorch-4": ["auto:gb200-x4-split", "l0_gb200_multi_gpus", 4, 5, 4, 1, false, true], + "GB200-4_GPUs-PyTorch-5": ["auto:gb200-x4-split", "l0_gb200_multi_gpus", 5, 5, 4, 1, false, true], + "GB200-4_GPUs-PyTorch-Post-Merge-1": ["auto:gb200-x4-split", "l0_gb200_multi_gpus", 1, 1, 4, 1, false, true], "GB10-PyTorch-Post-Merge-1": ["gb10x-single", "l0_gb10", 1, 1], "GB300-PyTorch-1": ["auto:gb300-x4", "l0_gb300", 1, 1], "GB300-4_GPUs-PyTorch-Post-Merge-1": ["auto:gb300-x4", "l0_gb300_multi_gpus", 1, 3, 4], @@ -4154,11 +4211,11 @@ def launchTestJobs(pipeline, testFilter) multiNodesSBSAConfigs = [ // Each testcase uses 8 GPUs and 2 nodes. // https://nvbugs/5598863 (uncorrectable NVLink error detected during the execution) may not exist in OCI machines. - "GB200-8_GPUs-2_Nodes-PyTorch-1": ["auto:gb200-flex", "l0_gb200_multi_nodes", 1, 2, 8, 2], - "GB200-8_GPUs-2_Nodes-PyTorch-2": ["auto:gb200-flex", "l0_gb200_multi_nodes", 2, 2, 8, 2], - "GB200-8_GPUs-2_Nodes-PyTorch-Post-Merge-1": ["auto:gb200-flex", "l0_gb200_multi_nodes", 1, 3, 8, 2], - "GB200-8_GPUs-2_Nodes-PyTorch-Post-Merge-2": ["auto:gb200-flex", "l0_gb200_multi_nodes", 2, 3, 8, 2], - "GB200-8_GPUs-2_Nodes-PyTorch-Post-Merge-3": ["auto:gb200-flex", "l0_gb200_multi_nodes", 3, 3, 8, 2], + "GB200-8_GPUs-2_Nodes-PyTorch-1": ["auto:gb200-flex-split", "l0_gb200_multi_nodes", 1, 2, 8, 2], + "GB200-8_GPUs-2_Nodes-PyTorch-2": ["auto:gb200-flex-split", "l0_gb200_multi_nodes", 2, 2, 8, 2], + "GB200-8_GPUs-2_Nodes-PyTorch-Post-Merge-1": ["auto:gb200-flex-split", "l0_gb200_multi_nodes", 1, 3, 8, 2], + "GB200-8_GPUs-2_Nodes-PyTorch-Post-Merge-2": ["auto:gb200-flex-split", "l0_gb200_multi_nodes", 2, 3, 8, 2], + "GB200-8_GPUs-2_Nodes-PyTorch-Post-Merge-3": ["auto:gb200-flex-split", "l0_gb200_multi_nodes", 3, 3, 8, 2], ] // PerfSanity post-merge aggregated // 2 Nodes @@ -4317,7 +4374,7 @@ def launchTestJobs(pipeline, testFilter) if (env.targetArch == AARCH64_TRIPLE) { parallelJobs = SBSATestConfigs.collectEntries{key, values -> [key, [createKubernetesPodConfig(LLM_DOCKER_IMAGE, values[0], "arm64"), { attemptTag, isFinalAttempt, retryContext = null -> - runLLMTestlistOnPlatform(pipeline, values[0], values[1], LINUX_AARCH64_CONFIG, false, key, values[2], values[3], false, "cp312", attemptTag, false, isFinalAttempt, retryContext) + runLLMTestlistOnPlatform(pipeline, values[0], values[1], LINUX_AARCH64_CONFIG, false, key, values[2], values[3], false, "cp312", attemptTag, false, isFinalAttempt, retryContext, values[4] ?: false) }]]} // Add SBSA Slurm jobs @@ -4336,7 +4393,7 @@ def launchTestJobs(pipeline, testFilter) if (key.contains("llvm")) { config = LLVM_CONFIG } - runLLMTestlistOnSlurm(pipeline, values[0], values[1], config, key.contains("-Perf-"), key, values[2], values[3], values[4] ?: 1, values[5] ?: 1, values[6] ?: false, false, "cp312", attemptTag) + runLLMTestlistOnSlurm(pipeline, values[0], values[1], config, key.contains("-Perf-"), key, values[2], values[3], values[4] ?: 1, values[5] ?: 1, values[6] ?: false, false, "cp312", attemptTag, values[7] ?: false) }, [singleAttempt: true]]]} parallelJobs += parallelSlurmJobs @@ -4350,7 +4407,7 @@ def launchTestJobs(pipeline, testFilter) if (key.contains("llvm")) { config = LLVM_CONFIG } - runLLMTestlistOnSlurm(pipeline, values[0], values[1], config, key.contains("-Perf-"), key, values[2], values[3], values[4] ?: 1, values[5] ?: 2, values[6] ?: false, false, "cp312", attemptTag) + runLLMTestlistOnSlurm(pipeline, values[0], values[1], config, key.contains("-Perf-"), key, values[2], values[3], values[4] ?: 1, values[5] ?: 2, values[6] ?: false, false, "cp312", attemptTag, values[7] ?: false) }, [singleAttempt: true]]]} parallelJobs += parallelMultiNodesSBSAJobs diff --git a/jenkins/current_image_tags.properties b/jenkins/current_image_tags.properties index e0e879d8f9d4..e220c19ae3bd 100644 --- a/jenkins/current_image_tags.properties +++ b/jenkins/current_image_tags.properties @@ -13,8 +13,8 @@ # images are adopted from PostMerge pipelines, the abbreviated commit hash is used instead. IMAGE_NAME=urm.nvidia.com/sw-tensorrt-docker/tensorrt-llm -LLM_DOCKER_IMAGE=urm.nvidia.com/sw-tensorrt-docker/tensorrt-llm:pytorch-26.02-py3-x86_64-ubuntu24.04-trt10.15.1.29-skip-tritondevel-202606012126-14025 -LLM_SBSA_DOCKER_IMAGE=urm.nvidia.com/sw-tensorrt-docker/tensorrt-llm:pytorch-26.02-py3-sbsa-ubuntu24.04-trt10.15.1.29-skip-tritondevel-202606012126-14025 -LLM_ROCKYLINUX8_PY310_DOCKER_IMAGE=urm.nvidia.com/sw-tensorrt-docker/tensorrt-llm:cuda-13.1.0-devel-rocky8-x86_64-rocky8-py310-trt10.15.1.29-skip-tritondevel-202606012126-14025 -LLM_ROCKYLINUX8_PY312_DOCKER_IMAGE=urm.nvidia.com/sw-tensorrt-docker/tensorrt-llm:cuda-13.1.0-devel-rocky8-x86_64-rocky8-py312-trt10.15.1.29-skip-tritondevel-202606012126-14025 -LLM_SBSA_WHEEL_DOCKER_IMAGE=urm.nvidia.com/sw-tensorrt-docker/tensorrt-llm:cuda-13.1.0-devel-ubuntu24.04-sbsa-ubuntu24.04-py312-trt10.15.1.29-skip-tritondevel-202606012126-14025 +LLM_DOCKER_IMAGE=urm.nvidia.com/sw-tensorrt-docker/tensorrt-llm:pytorch-26.02-py3-x86_64-ubuntu24.04-trt10.15.1.29-skip-tritondevel-202606051544-14972 +LLM_SBSA_DOCKER_IMAGE=urm.nvidia.com/sw-tensorrt-docker/tensorrt-llm:pytorch-26.02-py3-sbsa-ubuntu24.04-trt10.15.1.29-skip-tritondevel-202606051544-14972 +LLM_ROCKYLINUX8_PY310_DOCKER_IMAGE=urm.nvidia.com/sw-tensorrt-docker/tensorrt-llm:cuda-13.1.0-devel-rocky8-x86_64-rocky8-py310-trt10.15.1.29-skip-tritondevel-202606051544-14972 +LLM_ROCKYLINUX8_PY312_DOCKER_IMAGE=urm.nvidia.com/sw-tensorrt-docker/tensorrt-llm:cuda-13.1.0-devel-rocky8-x86_64-rocky8-py312-trt10.15.1.29-skip-tritondevel-202606051544-14972 +LLM_SBSA_WHEEL_DOCKER_IMAGE=urm.nvidia.com/sw-tensorrt-docker/tensorrt-llm:cuda-13.1.0-devel-ubuntu24.04-sbsa-ubuntu24.04-py312-trt10.15.1.29-skip-tritondevel-202606051544-14972 diff --git a/jenkins/scripts/cbts/rules/out_of_scope_rule.py b/jenkins/scripts/cbts/rules/out_of_scope_rule.py index 28b233c8ce93..7017abc65ad1 100644 --- a/jenkins/scripts/cbts/rules/out_of_scope_rule.py +++ b/jenkins/scripts/cbts/rules/out_of_scope_rule.py @@ -38,6 +38,8 @@ # consumed by any L0 pipeline. # - tests/integration/defs/.test_durations : pytest-split timing cache; # used at runtime, doesn't affect test selection. +# - tests/integration/defs/.test_durations_* : per-cluster timing caches +# (e.g. .test_durations_aws_dfw); same rationale as above. # - tests/integration/defs/agg_unit_mem_df.csv : per-(gpu, case) # pytest-xdist parallel_factor table consumed by test_unittests.py; # tunes worker count only, no impact on which tests run or their diff --git a/jenkins/scripts/perf/local/run_disagg.sh b/jenkins/scripts/perf/local/run_disagg.sh index 74cdb191dcb1..2f773e038b0c 100755 --- a/jenkins/scripts/perf/local/run_disagg.sh +++ b/jenkins/scripts/perf/local/run_disagg.sh @@ -174,28 +174,36 @@ fi # Default strip list — see note inside the loop. : "${strip_sbatch_opts:=--segment}" -# Per-test loop: each test gets its own subdir (when >1), its own slurm_launch.sh, -# and its own sbatch submission. Failures are collected, not fatal, so a bad -# test_id doesn't stop the rest of the batch. +# Per-test loop: each test gets its own subdir (named by the test-id bracket), +# its own slurm_launch.sh, and its own sbatch submission. Failures are collected, +# not fatal, so a bad test_id doesn't stop the rest of the batch. num_tests=${#test_ids[@]} submitted_count=0 failed_tests=() +# CI machine-readable bookkeeping (consumed by trt_jenkins gen_disagg_junit.py). +# expected_tests.txt : every test_id we intend to run (for expected-vs-produced diff) +# failed_submit.txt : test_id|reason for submit-time failures (no job / no xml) +# slurm_jobs.txt : | for jobs that submitted (Jenkins polls these) +failed_submit_file="$work_dir/failed_submit.txt" +slurm_jobs_file="$work_dir/slurm_jobs.txt" +expected_file="$work_dir/expected_tests.txt" +: > "$failed_submit_file"; : > "$slurm_jobs_file"; : > "$expected_file" +printf '%s\n' "${test_ids[@]}" > "$expected_file" + for idx in "${!test_ids[@]}"; do tid="${test_ids[$idx]}" - # When running a single test, keep the flat layout (back-compat); for - # multi-test, drop each into its own subdir named by a slug of the test id. - if [[ $num_tests -gt 1 ]]; then - slug="${tid#*[}" # strip everything up to and including '[' - slug="${slug%]*}" # strip trailing ']' and beyond - slug="${slug//[^a-zA-Z0-9_.-]/_}" - test_work_dir="$work_dir/$(printf '%02d_%s' "$idx" "$slug")" - test_job_name="${job_name}_${idx}" - else - test_work_dir="$work_dir" - test_job_name="$job_name" - fi + # Each test gets its own subdir named by the test-id bracket content, e.g. + # 'disagg-e2e-' / 'aggr-ctx_only-'. This matches the trtllm-ci + # multinode layout so downstream perf parsing (parse_perf_logs.py discover_cases, + # which keys off 'disagg-*' / 'aggr-*' dir names + test_list.txt) and JUnit + # generation find cases uniformly. submit.py writes test_list.txt + report.xml + # into --work-dir (this subdir), so we don't create test_list.txt ourselves. + case_name="${tid#*[}" # strip up to and including '[' + case_name="${case_name%]*}" # strip trailing ']' and beyond + test_work_dir="$work_dir/$case_name" + test_job_name="${job_name}_${idx}" mkdir -p "$test_work_dir" echo @@ -228,6 +236,7 @@ for idx in "${!test_ids[@]}"; do $capture_nsys_flag; then echo "ERROR: submit.py failed for $tid — skipping." >&2 failed_tests+=("$tid (submit.py failed)") + echo "$tid|submit_py_failed" >> "$failed_submit_file" continue fi @@ -244,12 +253,17 @@ for idx in "${!test_ids[@]}"; do rm -f "$test_work_dir/slurm_launch.sh.bak" fi - # 2. Submit - if ( cd "$test_work_dir" && sbatch slurm_launch.sh ); then + # 2. Submit — capture job id, do NOT block (Jenkins polls squeue/sacct later, so a + # long queue wait survives SSH drops; --wait would hang one ssh for hours). + jid_raw=$( cd "$test_work_dir" && sbatch --parsable slurm_launch.sh 2>>"$work_dir/sbatch.err" || true ) + jid="${jid_raw%%;*}" # 'jobid' or 'jobid;cluster' -> jobid + if [[ "$jid" =~ ^[0-9]+$ ]]; then + echo "$jid|$tid" >> "$slurm_jobs_file" submitted_count=$((submitted_count + 1)) else echo "ERROR: sbatch failed for $tid" >&2 failed_tests+=("$tid (sbatch failed)") + echo "$tid|sbatch_failed" >> "$failed_submit_file" fi done diff --git a/jenkins/scripts/slurm_run.sh b/jenkins/scripts/slurm_run.sh index a8ca9b006eba..eea9733d2d2d 100755 --- a/jenkins/scripts/slurm_run.sh +++ b/jenkins/scripts/slurm_run.sh @@ -80,6 +80,14 @@ if [[ "$containerLDLibPath" != *"$containerPipLLMLibPath"* ]]; then containerLDLibPath="${containerLDLibPath%:}" fi export LD_LIBRARY_PATH=$containerLDLibPath + +# Slurm ENROOT/pyxis may inject UCX_TLS=tcp from the host MPI stack (intended for +# host-only MPI jobs). That disables CUDA transports and breaks NIXL GPU memory +# registration. Unset it so UCX can auto-select. +if [ "${UCX_TLS:-}" = "tcp" ]; then + unset UCX_TLS + echo "Unset UCX_TLS (cluster injected UCX_TLS=tcp)" +fi echo "Library Path:" echo "$LD_LIBRARY_PATH" env | sort diff --git a/scripts/generate_config_table.py b/scripts/generate_config_table.py index 7f21932bf868..a560514d2025 100644 --- a/scripts/generate_config_table.py +++ b/scripts/generate_config_table.py @@ -42,6 +42,10 @@ "display_name": "Nemotron v3 Super (NVFP4)", "url": "https://huggingface.co/nvidia/NVIDIA-Nemotron-3-Super-120B-A12B-NVFP4", }, + "nvidia/NVIDIA-Nemotron-3-Ultra-550B-A55B-NVFP4": { + "display_name": "Nemotron v3 Ultra (NVFP4)", + "url": "https://huggingface.co/nvidia/NVIDIA-Nemotron-3-Ultra-550B-A55B-NVFP4", + }, "deepseek-ai/DeepSeek-R1-0528": { "display_name": "DeepSeek-R1", "url": "https://huggingface.co/deepseek-ai/DeepSeek-R1-0528", @@ -66,6 +70,10 @@ "display_name": "Qwen3-Next-80B", "url": "https://huggingface.co/Qwen/Qwen3-Next-80B-A3B-Thinking", }, + "nvidia/Qwen3.5-397B-A17B-NVFP4": { + "display_name": "Qwen3.5-397B-A17B (NVFP4)", + "url": "https://huggingface.co/nvidia/Qwen3.5-397B-A17B-NVFP4", + }, "Qwen/Qwen3-30B-A3B": { "display_name": "Qwen3-30B-A3B", "url": "https://huggingface.co/Qwen/Qwen3-30B-A3B", diff --git a/scripts/generate_duration.py b/scripts/generate_duration.py index 10d69978f572..fec429c305e6 100644 --- a/scripts/generate_duration.py +++ b/scripts/generate_duration.py @@ -10,6 +10,13 @@ type=str, default="new_test_duration.json", help="Path to the output duration file (default: new_test_duration.json)") +parser.add_argument( + "--cluster", + type=str, + default=None, + help="Cluster name (e.g. 'aws_dfw'). When set, writes " + "tests/integration/defs/.test_durations_ relative to the " + "repo root instead of --duration-file.") args = parser.parse_args() # Define the directory containing the test result folders @@ -17,7 +24,12 @@ # Define the output file paths FULL_RESULT_LOG = "full_result.log" -NEW_TEST_DURATION = args.duration_file +if args.cluster: + _repo_root = os.path.dirname(os.path.dirname(os.path.abspath(__file__))) + NEW_TEST_DURATION = os.path.join(_repo_root, "tests", "integration", "defs", + f".test_durations_{args.cluster}") +else: + NEW_TEST_DURATION = args.duration_file # Step 1: Prepare full_result.log with open(FULL_RESULT_LOG, 'w') as full_result_file: diff --git a/security_scanning/docs/poetry.lock b/security_scanning/docs/poetry.lock index 38c3ff29f437..3cc109c14f71 100644 --- a/security_scanning/docs/poetry.lock +++ b/security_scanning/docs/poetry.lock @@ -84,14 +84,14 @@ dev = ["backports.zoneinfo ; python_version < \"3.9\"", "freezegun (>=1.0,<2.0)" [[package]] name = "beautifulsoup4" -version = "4.14.3" +version = "4.15.0" description = "Screen-scraping library" optional = false python-versions = ">=3.7.0" groups = ["main"] files = [ - {file = "beautifulsoup4-4.14.3-py3-none-any.whl", hash = "sha256:0918bfe44902e6ad8d57732ba310582e98da931428d231a5ecb9e7c703a735bb"}, - {file = "beautifulsoup4-4.14.3.tar.gz", hash = "sha256:6292b1c5186d356bba669ef9f7f051757099565ad9ada5dd630bd9de5fa7fb86"}, + {file = "beautifulsoup4-4.15.0-py3-none-any.whl", hash = "sha256:d6f88de62e1d4e38ecb1077eb9724cd0eff29d2a08ca16a401e9b9e93f117cf9"}, + {file = "beautifulsoup4-4.15.0.tar.gz", hash = "sha256:288e3ca7d54b06f2ac191970bc275c1939cb46d450b255bf6718b04aa37ab4f7"}, ] [package.dependencies] diff --git a/security_scanning/examples/apps/poetry.lock b/security_scanning/examples/apps/poetry.lock index 06cbf5b70b82..a906e6fbb59e 100644 --- a/security_scanning/examples/apps/poetry.lock +++ b/security_scanning/examples/apps/poetry.lock @@ -477,14 +477,14 @@ files = [ [[package]] name = "tqdm" -version = "4.67.3" +version = "4.68.2" description = "Fast, Extensible Progress Meter" optional = false python-versions = ">=3.7" groups = ["main"] files = [ - {file = "tqdm-4.67.3-py3-none-any.whl", hash = "sha256:ee1e4c0e59148062281c49d80b25b67771a127c85fc9676d3be5f243206826bf"}, - {file = "tqdm-4.67.3.tar.gz", hash = "sha256:7d825f03f89244ef73f1d4ce193cb1774a8179fd96f31d7e1dcde62092b960bb"}, + {file = "tqdm-4.68.2-py3-none-any.whl", hash = "sha256:d4240441fb5353290b87d6a85968c9decc131a99b8c7faa28269d829de669ede"}, + {file = "tqdm-4.68.2.tar.gz", hash = "sha256:89c230e8dbc67c7615c142487111222f878c77427ea09549960f62389e258add"}, ] [package.dependencies] @@ -492,10 +492,10 @@ colorama = {version = "*", markers = "platform_system == \"Windows\""} [package.extras] dev = ["nbval", "pytest (>=6)", "pytest-asyncio (>=0.24)", "pytest-cov", "pytest-timeout"] -discord = ["requests"] +discord = ["envwrap", "requests"] notebook = ["ipywidgets (>=6)"] -slack = ["slack-sdk"] -telegram = ["requests"] +slack = ["envwrap", "slack-sdk"] +telegram = ["envwrap", "requests"] [[package]] name = "typing-extensions" diff --git a/security_scanning/examples/auto_deploy/poetry.lock b/security_scanning/examples/auto_deploy/poetry.lock index 91da0e3677d4..348d4db39d56 100644 --- a/security_scanning/examples/auto_deploy/poetry.lock +++ b/security_scanning/examples/auto_deploy/poetry.lock @@ -110,131 +110,131 @@ files = [ [[package]] name = "aiohttp" -version = "3.14.0" +version = "3.14.1" description = "Async http client/server framework (asyncio)" optional = false python-versions = ">=3.10" groups = ["main"] files = [ - {file = "aiohttp-3.14.0-cp310-cp310-macosx_10_9_universal2.whl", hash = "sha256:692e409052e7436029bbb32977cd7c5bf806ac5fa4085b973996785ffadad33c"}, - {file = "aiohttp-3.14.0-cp310-cp310-macosx_10_9_x86_64.whl", hash = "sha256:40af7ebe53c7990e110dc4ad03566b12c3ac996254298a3d39046dd69cfcb2c2"}, - {file = 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a/tensorrt_llm/_torch/attention_backend/sparse/dsa.py b/tensorrt_llm/_torch/attention_backend/sparse/dsa.py index 204b81d95a58..ab16aac4d716 100644 --- a/tensorrt_llm/_torch/attention_backend/sparse/dsa.py +++ b/tensorrt_llm/_torch/attention_backend/sparse/dsa.py @@ -2138,6 +2138,19 @@ def sparse_attn_indexer( # avoids materializing a 2D contiguous tensor per call. dsl_context_lens = metadata.kv_lens_cuda_runtime[ num_contexts:num_contexts + num_generations] + # Wave-aware atom-split: the picker in `_pick_dsl_expand` caches + # (factor, atom) on metadata with invariant + # `factor * atom == 1 + max_draft_tokens` (the target/verify-time + # next_n). MTPEagle reuses the same metadata for its multi-step + # draft loop; after i=0 it mutates seq_lens to 1, so i≥1 + # iterations run with next_n=1. The reshape + # `(num_gen, next_n, ...) -> (num_gen*factor, atom, ...)` is only + # valid when the caller actually supplies next_n == factor * atom + # tokens; gate here so i≥1 draft calls fall back to the + # kernel-native next_n=1 path. + dsl_atom_split = (metadata.dsl_expand_factor > 1 + and next_n == metadata.dsl_expand_factor * + metadata.dsl_atom) if self.use_fp4: # FP4 DSL signature splits DG's (q, sf_q) tuple into two # separate args and requires q.dtype == uint8 (q_decode @@ -2151,16 +2164,7 @@ def sparse_attn_indexer( dsl_q = q_decode.view(torch.uint8) dsl_block_table = block_table dsl_schedule_meta = metadata.scheduler_metadata_buffer - - # DSL FP4 kernel natively supports next_n ∈ {1, 2, 3}. - # The wave-aware picker in `_pick_dsl_expand` is run - # once per metadata prepare and the result cached on - # `metadata.dsl_{expand_factor, atom}`. Trigger expand - # whenever the picker decided to split (factor > 1), - # regardless of next_n — this lets next_n ∈ {2, 3} also - # benefit from atom-split when low-batch leaves SMs idle, - # in addition to the mandatory next_n=4 case. - if metadata.dsl_expand_factor > 1: + if dsl_atom_split: factor = metadata.dsl_expand_factor eff_next_n = metadata.dsl_atom exp_B = num_generations * factor @@ -2180,16 +2184,14 @@ def sparse_attn_indexer( max_seq_len) else: # FP8 DSL kernel natively supports next_n ∈ {1, 2, 3, 4}. - # Apply wave-aware atom-split when the picker decided to - # split (factor > 1) — typically benefits small-batch / - # low-ntask configs by raising SM utilization at the cost - # of factor× KV HBM re-reads. Picker decision was cached - # on metadata.{dsl_expand_factor, dsl_atom} during prepare. + # Atom-split benefits small-batch / low-ntask configs by + # raising SM utilization at the cost of factor× KV HBM + # re-reads; guard logic shared via dsl_atom_split above. dsl_q = q_decode fp8_ctx_lens = dsl_context_lens fp8_block_table = block_table fp8_schedule_meta = metadata.scheduler_metadata_buffer - if metadata.dsl_expand_factor > 1: + if dsl_atom_split: factor = metadata.dsl_expand_factor atom = metadata.dsl_atom exp_B = num_generations * factor @@ -2652,26 +2654,25 @@ def get_cache_size_per_token(model_config: ModelConfig, num_attention_layers = KVCacheManager._resolve_num_attention_layers( model_config, mapping, num_layers) + # MLA latent K cache: stored at the KV cache dtype (BF16/FP8). mem_per_token *= num_attention_layers * head_dim - # 1 for K, others for indexer K cache - head_dim_factor = (indexer_data_dim + - index_head_dim // quant_block_size * 4) / head_dim - kv_factor = 1 + head_dim_factor - mem_per_token *= kv_factor + # Indexer K cache: physically allocated as raw UINT8 in + # WindowBlockManager::allocatePools (poolDtype = kUINT8), so we assume + # 1 byte/element here -- it is NOT scaled by the KV cache dtype (unlike + # the latent above). The data-portion byte count already reflects fp8 vs + # fp4 via indexer_data_dim. + indexer_bytes_per_token = num_attention_layers * ( + indexer_data_dim + index_head_dim // quant_block_size * 4) + mem_per_token += indexer_bytes_per_token return mem_per_token def get_cache_bytes_per_token(self): """Compute actual cache bytes per token from instance configuration.""" - # self.kv_factor for K, others for indexer K cache. - # Under FP4 the indexer data portion is halved (two E2M1 codes per - # byte); scale bytes are unchanged. - indexer_data_dim = self.index_head_dim // 2 if self.use_fp4 else self.index_head_dim - head_dim_factor = (indexer_data_dim + self.index_head_dim // - self.quant_block_size * 4) / self.head_dim - kv_factor = self.kv_factor + head_dim_factor + # MLA latent K cache: stored at the KV cache dtype (self.dtype). The + # indexer K cache is added separately below. cache_size_per_token = math.ceil( - kv_factor * sum(self.num_kv_heads_per_layer) * self.head_dim) + self.kv_factor * sum(self.num_kv_heads_per_layer) * self.head_dim) if self.dtype not in (DataType.FP8, DataType.HALF, DataType.BF16, DataType.FLOAT, DataType.NVFP4): @@ -2684,4 +2685,15 @@ def get_cache_bytes_per_token(self): cache_size_per_token, quant_vector_size=16, scaling_factor_dtype=DataType.FP8) + + # Indexer K cache: physically allocated as raw UINT8 in + # WindowBlockManager::allocatePools (poolDtype = kUINT8), so we assume + # 1 byte/element here -- it is NOT scaled by the KV cache dtype (unlike + # the latent above). Under FP4 the indexer data portion is halved (two + # E2M1 codes per byte); the scale bytes are unchanged. + indexer_data_dim = self.index_head_dim // 2 if self.use_fp4 else self.index_head_dim + indexer_bytes_per_token = sum(self.num_kv_heads_per_layer) * ( + indexer_data_dim + self.index_head_dim // self.quant_block_size * 4) + cache_size_bytes_per_token += indexer_bytes_per_token + return cache_size_bytes_per_token diff --git a/tensorrt_llm/_torch/attention_backend/trtllm.py b/tensorrt_llm/_torch/attention_backend/trtllm.py index 1eda4819930c..0f01774e9a49 100644 --- a/tensorrt_llm/_torch/attention_backend/trtllm.py +++ b/tensorrt_llm/_torch/attention_backend/trtllm.py @@ -29,7 +29,7 @@ # Enable TRTLLM-Gen attention backend by default. Set # TRTLLM_ENABLE_TRTLLM_GEN_ATTENTION=0 to force the thop.attention path. _TRTLLM_ENABLE_TRTLLM_GEN_ATTENTION = (os.environ.get( - "TRTLLM_ENABLE_TRTLLM_GEN_ATTENTION", "0") == "1") + "TRTLLM_ENABLE_TRTLLM_GEN_ATTENTION", "1") == "1") # ``AttentionForwardArgs`` fields that this backend does not consume. # Sync test (test_attention_op_sync.py) requires every other field to map to a @@ -124,6 +124,9 @@ class TrtllmAttentionMetadata(AttentionMetadata): spec_decoding_bl_tree_mask: Optional[torch.Tensor] = None spec_bl_tree_first_sparse_mask_offset_kv: Optional[torch.Tensor] = None + # TRTLLM-Gen FMHA JIT warmup controls. + trtllm_gen_jit_warmup: bool = False + # Flag to enable helix parallelism. enable_helix: bool = False @@ -1512,30 +1515,26 @@ def _run( assert metadata.kv_cache_manager is None assert metadata.num_contexts == metadata.num_seqs - helix_active = metadata.helix_position_offsets is not None - use_sage_attn = (forward_args.sage_attn_num_elts_per_blk_q > 0 - or forward_args.sage_attn_num_elts_per_blk_k > 0 - or forward_args.sage_attn_num_elts_per_blk_v > 0) - use_trtllm_gen = False if _TRTLLM_ENABLE_TRTLLM_GEN_ATTENTION: trtllm_gen_backend = self._get_trtllm_gen_backend() use_trtllm_gen = trtllm_gen_backend.is_supported( q, - metadata=metadata, - forward_args=forward_args, - mask_type=int(forward_args.mask_type), - active_helix=helix_active, - use_sage_attn=use_sage_attn, + k, + v, + attn=self, + meta=metadata, + fwd=forward_args, )[0] if use_trtllm_gen: - trtllm_gen_backend.attention( + trtllm_gen_backend.forward( q, - metadata=metadata, - forward_args=forward_args, - mask_type=int(forward_args.mask_type), - use_paged_context_fmha=metadata.use_paged_context_fmha, + k, + v, + attn=self, + meta=metadata, + fwd=forward_args, ) else: # Every kwarg sources from ``self`` / ``metadata`` / @@ -1590,6 +1589,8 @@ def _run( num_contexts=metadata.num_contexts, num_ctx_tokens=metadata.num_ctx_tokens, max_context_length=metadata.max_context_length, + max_seq_len=metadata.max_seq_len, + trtllm_gen_jit_warmup=metadata.trtllm_gen_jit_warmup, # --- Per-call (AttentionForwardArgs) --- out_scale=forward_args.out_scale, diff --git a/tensorrt_llm/_torch/attention_backend/trtllm_gen.py b/tensorrt_llm/_torch/attention_backend/trtllm_gen.py index a7fb8ccfa2fe..70adab96e959 100644 --- a/tensorrt_llm/_torch/attention_backend/trtllm_gen.py +++ b/tensorrt_llm/_torch/attention_backend/trtllm_gen.py @@ -1,3 +1,18 @@ +# SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. +# SPDX-License-Identifier: Apache-2.0 +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. + """ TrtLLM-Gen Attention Backend @@ -9,24 +24,22 @@ - QKV preprocessing & RoPE: C++ kernels via tensorrt_llm.bindings.internal.thop, same as thop.attention. Writes K/V to paged KV cache via pool pointers. - Attention: flashinfer trtllm-gen FMHA kernels, reading KV cache through - the KV cache manager carried by attention metadata. + the paged KV cache fields carried by FmhaParams. Entry points: FlashInferTrtllmGenAttention.is_supported() - Check if trtllm-gen can handle the given config. - FlashInferTrtllmGenAttention.attention() - Main attention method (called from TrtllmAttention.run). + FlashInferTrtllmGenAttention.forward() - Main attention method. Example: backend = FlashInferTrtllmGenAttention(attention_layer=...) - supported, reason = backend.is_supported( - q, metadata=..., forward_args=..., ...) + supported, reason = backend.is_supported(q, k, v, attn=..., meta=..., fwd=...) if supported: - backend.attention(q, metadata=..., forward_args=..., ...) + backend.forward(q, k, v, attn=..., meta=..., fwd=...) else: Fallback to thop.attention() """ import math -import weakref from dataclasses import dataclass from functools import lru_cache from typing import TYPE_CHECKING, List, Optional, Tuple @@ -39,12 +52,10 @@ import flashinfer from tensorrt_llm._torch.attention_backend.interface import AttentionForwardArgs, AttentionInputType -from tensorrt_llm._utils import get_sm_version, is_sm_100f +from tensorrt_llm._utils import get_sm_version, is_sm_100f, torch_dtype_to_binding from tensorrt_llm.bindings import DataType from tensorrt_llm.bindings.internal import thop from tensorrt_llm.functional import AttentionMaskType -from tensorrt_llm.logger import logger -from tensorrt_llm.models.modeling_utils import QuantConfig from tensorrt_llm.quantization.mode import QuantMode if TYPE_CHECKING: @@ -54,283 +65,163 @@ ) -class TrtllmGenSupportChecker: - """ - Validates if a configuration is supported by trtllm-gen backend. - - Implements all checks from the original C++ AttentionOp to determine - if trtllm-gen kernel can handle the attention computation. - """ - - # Supported data types - SUPPORTED_INPUT_DTYPES = {torch.float16, torch.bfloat16, torch.float8_e4m3fn} - SUPPORTED_KV_CACHE_DTYPES = { - DataType.HALF, - DataType.BF16, - DataType.FP8, - DataType.NVFP4, - } - SUPPORTED_OUT_DTYPES = {torch.float16, torch.bfloat16, torch.float8_e4m3fn} - - # Supported Q:KV:O dtype combinations for trtllm-gen kernels - # Format: (q_dtype: torch.dtype, kv_dtype: DataType, o_dtype: torch.dtype) - # Context phase supported combinations - SUPPORTED_DTYPE_COMBOS_CONTEXT = { - # e4m3:e4m3:e4m3 - (torch.float8_e4m3fn, DataType.FP8, torch.float8_e4m3fn), - # fp16:fp16:fp16 - (torch.float16, DataType.HALF, torch.float16), - # bf16:bf16:bf16 - (torch.bfloat16, DataType.BF16, torch.bfloat16), - # e4m3:e4m3:fp16 - (torch.float8_e4m3fn, DataType.FP8, torch.float16), - # e4m3:e4m3:bf16 - (torch.float8_e4m3fn, DataType.FP8, torch.bfloat16), - # e4m3:nvfp4:* - (torch.float8_e4m3fn, DataType.NVFP4, torch.float8_e4m3fn), - (torch.float8_e4m3fn, DataType.NVFP4, torch.float16), - (torch.float8_e4m3fn, DataType.NVFP4, torch.bfloat16), - } - - # Generation phase supported combinations (includes context + additional) - SUPPORTED_DTYPE_COMBOS_GENERATION = { - # All context combinations - (torch.float8_e4m3fn, DataType.FP8, torch.float8_e4m3fn), - (torch.float16, DataType.HALF, torch.float16), - (torch.bfloat16, DataType.BF16, torch.bfloat16), - (torch.float8_e4m3fn, DataType.FP8, torch.float16), - (torch.float8_e4m3fn, DataType.FP8, torch.bfloat16), - # Additional generation-only combinations - # bf16:e4m3:bf16 - (torch.bfloat16, DataType.FP8, torch.bfloat16), - # fp16:e4m3:fp16 - (torch.float16, DataType.FP8, torch.float16), - # e4m3:nvfp4:* - (torch.float8_e4m3fn, DataType.NVFP4, torch.float8_e4m3fn), - (torch.float8_e4m3fn, DataType.NVFP4, torch.float16), - (torch.float8_e4m3fn, DataType.NVFP4, torch.bfloat16), - } - - # Unsupported head sizes for context FMHA. - # 96 is excluded because trtllm-gen kernel library does not ship - # context kernels for headDim=96 (affects Phi-3 family models). - UNSUPPORTED_HEAD_SIZES_CONTEXT = {72, 80, 96} - - # Maximum heads ratio for generation. - MAX_HEADS_RATIO_GENERATION = 32 - - # Minimum tokens per block, tokens_per_block < 8 is not supported by TRTLLM-GEN kernels. - MIN_TOKENS_PER_BLOCK = 8 - - # Supported tokens_per_block values for trtllm-gen kernels - SUPPORTED_TOKENS_PER_BLOCK = {16, 32, 64} - - # MLA shapes accepted by FlashInfer's trtllm-gen wrapper/launcher. The decode API - # uses kv_lora_rank as headDimV and kv_lora_rank + qk_rope_head_dim as headDimQk. - SUPPORTED_MLA_GENERATION_HEAD_DIMS = { - (320, 256), - (576, 512), - } - - # Known FlashInfer package gap: this shape can pass the coarse checks but then fail - # in the TRTLLM-GEN launcher with "Missing TRTLLM-GEN kernel". - MISSING_MLA_GENERATION_KERNELS = { - (576, 512, 32), - } - - @classmethod - def _check_mla_generation_support( - cls, - head_size: int, - tokens_per_block: int, - kv_lora_rank: Optional[int], - qk_rope_head_dim: Optional[int], - ) -> Tuple[bool, str]: - missing_params = [ - name - for name, value in ( - ("kv_lora_rank", kv_lora_rank), - ("qk_rope_head_dim", qk_rope_head_dim), - ) - if value is None or value <= 0 - ] - if missing_params: - return ( - False, - f"[Generation][MLA] Missing required MLA parameter(s): {', '.join(missing_params)}.", - ) - - kv_rank = int(kv_lora_rank) - qk_rope_dim = int(qk_rope_head_dim) - head_dim_qk = kv_rank + qk_rope_dim - head_dim_v = kv_rank - if head_size != head_dim_qk: - return ( - False, - f"[Generation][MLA] head_size ({head_size}) must match " - f"kv_lora_rank + qk_rope_head_dim ({head_dim_qk}).", - ) - - if (head_dim_qk, head_dim_v) not in cls.SUPPORTED_MLA_GENERATION_HEAD_DIMS: - supported = sorted(cls.SUPPORTED_MLA_GENERATION_HEAD_DIMS) - return ( - False, - f"[Generation][MLA] Unsupported head dimensions: " - f"headDimQk={head_dim_qk}, headDimV={head_dim_v}. Supported: {supported}.", - ) - - if (head_dim_qk, head_dim_v, tokens_per_block) in cls.MISSING_MLA_GENERATION_KERNELS: - return ( - False, - f"[Generation][MLA] Missing TRTLLM-GEN decode kernel for " - f"headDimQk={head_dim_qk}, headDimV={head_dim_v}, " - f"tokens_per_block={tokens_per_block}.", - ) - - return True, "" - - @classmethod - def is_supported( - cls, - q_dtype: torch.dtype, - kv_cache_dtype: DataType, - num_heads: int, - num_kv_heads: int, - head_size: int, - attention_input_type: Optional[int] = None, - out_dtype: Optional[torch.dtype] = None, - mask_type: int = 1, - beam_width: int = 1, - tokens_per_block: Optional[int] = 64, - use_paged_kv_cache: bool = True, - is_mla_enable: bool = False, - kv_lora_rank: Optional[int] = None, - qk_rope_head_dim: Optional[int] = None, - cross_attention: bool = False, - is_spec_decoding: bool = False, - has_alibi: bool = False, - is_padded: bool = False, - position_shift_enabled: bool = False, - quant_config: Optional[QuantConfig] = None, - has_sparse_attention: bool = False, - has_skip_softmax_attention: bool = False, - ) -> Tuple[bool, str]: - if tokens_per_block is None: - tokens_per_block = 0 - has_context_phase = True - has_generation_phase = True - if attention_input_type is not None: - attn_input_type = AttentionInputType(attention_input_type) - has_context_phase = attn_input_type != AttentionInputType.generation_only - has_generation_phase = attn_input_type != AttentionInputType.context_only - - sm = get_sm_version() - if not is_sm_100f(sm): - return (False, f"trtllm-gen requires SM100 or SM103 (Blackwell). Current: SM{sm}.") - - if has_skip_softmax_attention: - return ( - False, - "Skip-softmax attention is not supported by trtllm-gen backend.", - ) +def _clear_multi_ctas_kv_counter_workspace( + fmha_workspace: torch.Tensor, + num_heads: int, + max_num_requests: int, + multi_processor_count: Optional[int], +) -> None: + counter_size = _get_multi_ctas_kv_counter_size( + num_heads, + max_num_requests, + multi_processor_count, + ) + fmha_workspace.narrow(0, 0, counter_size).zero_() - if has_sparse_attention: - return False, "Sparse attention is not supported by trtllm-gen backend." - if is_mla_enable and has_context_phase: - return False, ( - "MLA context and mixed phases fall back to thop.attention until " - "FlashInfer context support is ready." - ) - if cross_attention: - return False, "Cross attention is not supported by trtllm-gen backend." - if q_dtype not in cls.SUPPORTED_INPUT_DTYPES: - return False, f"Input dtype {q_dtype} not supported. Supported: FP16, BF16, FP8 (E4M3)." - if kv_cache_dtype not in cls.SUPPORTED_KV_CACHE_DTYPES: - return ( - False, - f"KV cache dtype {kv_cache_dtype} not supported. Supported: FP16, BF16, FP8, NVFP4.", +def _get_multi_ctas_kv_counter_size( + num_heads: int, + max_num_requests: int, + multi_processor_count: Optional[int], +) -> int: + return max(num_heads * max_num_requests, multi_processor_count or 0) + + +def _get_bmm1_scale_log2(bmm1_scale: torch.Tensor) -> torch.Tensor: + if bmm1_scale.numel() < 2: + raise RuntimeError("trtllm-gen bmm1_scale workspace must contain raw and log2 scales.") + return bmm1_scale.narrow(0, 1, 1) + + +def _trtllm_gen_batch_decode_with_kv_cache( + query: torch.Tensor, + kv_pool: torch.Tensor, + workspace_buffer: torch.Tensor, + block_tables: torch.Tensor, + seq_lens: torch.Tensor, + max_seq_len: int, + bmm1_scale: float | torch.Tensor, + bmm2_scale: float | torch.Tensor, + window_left: int, + out: torch.Tensor, + sinks: Optional[torch.Tensor], + enable_pdl: bool, + q_len_per_req: Optional[int], + max_q_len: Optional[int], + cum_seq_lens_q: Optional[torch.Tensor], + kv_scale_pool: Optional[torch.Tensor], + uses_shared_paged_kv_idx: bool, +) -> None: + if q_len_per_req is not None: + decode_max_q_len = q_len_per_req + batch_size = query.size(0) // q_len_per_req + else: + if max_q_len is None or cum_seq_lens_q is None: + raise RuntimeError( + "trtllm-gen multi-token generation requires max_q_len and cum_seq_lens_q." ) - if out_dtype is not None and out_dtype not in cls.SUPPORTED_OUT_DTYPES: - return False, f"Output dtype {out_dtype} not supported. Supported: FP16, BF16, FP8." + decode_max_q_len = max_q_len + batch_size = cum_seq_lens_q.size(0) - 1 - assert num_heads > 0, "num_heads must be positive." - assert num_kv_heads > 0, "num_kv_heads must be positive." - if num_heads % num_kv_heads != 0: - return ( - False, - f"num_heads ({num_heads}) must be divisible by num_kv_heads ({num_kv_heads}).", - ) + bmm1_scale_arg = ( + _get_bmm1_scale_log2(bmm1_scale) if isinstance(bmm1_scale, torch.Tensor) else bmm1_scale + ) - o_dtype = out_dtype if out_dtype is not None else q_dtype + run_func = flashinfer.decode.get_trtllm_gen_fmha_module().trtllm_paged_attention_decode + sm_count = flashinfer.decode.get_device_sm_count(query.device) + run_func( + out, + None, # out_scale_factor + query, + kv_pool, + kv_pool, + workspace_buffer, + block_tables, + seq_lens, + decode_max_q_len, + max_seq_len, + bmm1_scale_arg, + bmm2_scale, + -1.0, # o_sf_scale + -1, # o_sf_vec_size + 0, # o_sf_start_index + batch_size, + window_left, + 0, # sparse_mla_top_k + sm_count, + enable_pdl, + workspace_buffer.numel() * workspace_buffer.element_size(), + sinks, + cum_seq_lens_q, + kv_scale_pool, # k_block_scales + kv_scale_pool, # v_block_scales + None, # skip_softmax_threshold_scale_factor + uses_shared_paged_kv_idx, + None, # lse + 0, # lse_stride_tokens + 0, # lse_stride_heads + ) - check_context_phase = has_context_phase and not is_mla_enable - if check_context_phase: - if head_size in cls.UNSUPPORTED_HEAD_SIZES_CONTEXT: - return False, f"[Context] Head size {head_size} is not supported." - try: - if AttentionMaskType(mask_type) == AttentionMaskType.custom_mask: - return False, "[Context] Custom mask is not supported." - except ValueError: - return False, f"[Context] Invalid mask_type: {mask_type}." - if has_alibi: - return False, "[Context] ALiBi is not supported." - if is_padded: - return False, "[Context] Padded input is not supported." - if (q_dtype, kv_cache_dtype, o_dtype) not in cls.SUPPORTED_DTYPE_COMBOS_CONTEXT: - return False, ( - f"[Context] Unsupported dtype combination: Q={q_dtype}, KV={kv_cache_dtype}, O={o_dtype}." - ) - if has_generation_phase: - if beam_width != 1: - return ( - False, - f"[Generation] Beam search (beam_width={beam_width}) is not supported. Must be 1.", - ) - if position_shift_enabled: - return False, "[Generation] Position shift is not supported." - if tokens_per_block < cls.MIN_TOKENS_PER_BLOCK: - return ( - False, - f"[Generation] tokens_per_block ({tokens_per_block}) must be >= {cls.MIN_TOKENS_PER_BLOCK}.", - ) - heads_ratio = num_heads // num_kv_heads - if not is_mla_enable and heads_ratio > cls.MAX_HEADS_RATIO_GENERATION: - return ( - False, - f"[Generation] heads ratio ({heads_ratio}) exceeds maximum ({cls.MAX_HEADS_RATIO_GENERATION}).", - ) - if has_alibi: - return False, "[Generation] ALiBi is not supported." - if (q_dtype, kv_cache_dtype, o_dtype) not in cls.SUPPORTED_DTYPE_COMBOS_GENERATION: - return False, ( - f"[Generation] Unsupported dtype combination: Q={q_dtype}, KV={kv_cache_dtype}, O={o_dtype}." - ) - if is_mla_enable: - supported, reason = cls._check_mla_generation_support( - head_size=head_size, - tokens_per_block=tokens_per_block, - kv_lora_rank=kv_lora_rank, - qk_rope_head_dim=qk_rope_head_dim, - ) - if not supported: - return False, reason - - if use_paged_kv_cache: - if tokens_per_block <= 0: - return False, "tokens_per_block must be positive." - if tokens_per_block & (tokens_per_block - 1) != 0: - return False, f"tokens_per_block ({tokens_per_block}) must be power of 2." - if tokens_per_block not in cls.SUPPORTED_TOKENS_PER_BLOCK: - supported = sorted(cls.SUPPORTED_TOKENS_PER_BLOCK) - return ( - False, - f"tokens_per_block ({tokens_per_block}) is not supported " - f"by trtllm-gen kernels. Supported: {supported}.", - ) +def _trtllm_gen_batch_context_with_kv_cache( + query: torch.Tensor, + kv_pool: torch.Tensor, + workspace_buffer: torch.Tensor, + block_tables: torch.Tensor, + seq_lens: torch.Tensor, + max_q_len: int, + max_kv_len: int, + bmm1_scale: float | torch.Tensor, + bmm2_scale: float | torch.Tensor, + batch_size: int, + cum_seq_lens_q: torch.Tensor, + cum_seq_lens_kv: torch.Tensor, + window_left: int, + out: torch.Tensor, + sinks: Optional[torch.Tensor], + enable_pdl: bool, + kv_scale_pool: Optional[torch.Tensor], + uses_shared_paged_kv_idx: bool, +) -> None: + bmm1_scale_arg = ( + _get_bmm1_scale_log2(bmm1_scale) if isinstance(bmm1_scale, torch.Tensor) else bmm1_scale + ) - return True, "" + run_func = flashinfer.prefill.get_trtllm_gen_fmha_module().trtllm_paged_attention_context + sm_count = flashinfer.prefill.get_device_sm_count(query.device) + run_func( + out, + None, # out_scale_factor + query, + kv_pool, + kv_pool, + workspace_buffer, + block_tables, + seq_lens, + max_q_len, + max_kv_len, + bmm1_scale_arg, + bmm2_scale, + -1.0, # o_sf_scale + -1, # o_sf_vec_size + 0, # o_sf_start_index + batch_size, + window_left, + cum_seq_lens_q, + cum_seq_lens_kv, + sm_count, + enable_pdl, + workspace_buffer.numel() * workspace_buffer.element_size(), + sinks, + kv_scale_pool, # key_block_scales + kv_scale_pool, # value_block_scales + None, # skip_softmax_threshold_scale_factor + uses_shared_paged_kv_idx, + True, # causal + None, # lse + 0, # lse_stride_tokens + 0, # lse_stride_heads + ) @lru_cache(maxsize=128) @@ -460,24 +351,16 @@ def _get_workspace_size( @dataclass(slots=True) -class EnqueueParams: - """Per-call dynamic parameters for trtllm-gen attention. - - Layer-static properties (num_heads, head_size, rotary params, etc.) are - read directly from ``FlashInferTrtllmGenAttention`` cached attributes - to avoid redundant copies on every forward call. - """ - - forward: AttentionForwardArgs +class FmhaParams: + attn: "TrtllmAttention" + meta: "TrtllmAttentionMetadata" + fwd: AttentionForwardArgs + workspace: torch.Tensor attention_input: Optional[torch.Tensor] = None qkv_input: Optional[torch.Tensor] = None context_buf: Optional[torch.Tensor] = None - workspace: Optional[torch.Tensor] = None sequence_lengths: Optional[torch.Tensor] = None context_lengths: Optional[torch.Tensor] = None - kv_cache_block_offsets: Optional[torch.Tensor] = None - host_kv_cache_pool_pointers: Optional[torch.Tensor] = None - host_kv_cache_pool_mapping: Optional[torch.Tensor] = None input_seq_length: int = 0 max_past_kv_length: int = 0 max_attention_window_size: int = 0 @@ -485,22 +368,15 @@ class EnqueueParams: num_tokens: int = 0 seq_offset: int = 0 tokens_per_block: int = 64 - mask_type: int = 1 - kv_cache_quant_mode: int = 0 - layer_idx: int = 0 fp8_context_fmha: bool = False - paged_context_fmha: bool = False kv_factor: int = 0 total_num_blocks: int = 0 # Context-only fields batch_size: int = 0 # Generation-only fields - beam_width: int = 1 num_requests: int = 0 - predicted_tokens_per_seq: int = 1 spec_decoding_generation_lengths: Optional[torch.Tensor] = None spec_decoding_position_offsets: Optional[torch.Tensor] = None - spec_decoding_packed_mask: Optional[torch.Tensor] = None class FlashInferTrtllmGenAttention: @@ -515,12 +391,55 @@ class FlashInferTrtllmGenAttention: # block-table layout used by the fused preprocessing path. USE_SHARED_PAGED_KV_IDX = False + # Supported data types + SUPPORTED_INPUT_DTYPES = {torch.float16, torch.bfloat16, torch.float8_e4m3fn} + SUPPORTED_KV_CACHE_DTYPES = {DataType.HALF, DataType.BF16, DataType.FP8, DataType.NVFP4} + SUPPORTED_OUT_DTYPES = {torch.float16, torch.bfloat16, torch.float8_e4m3fn} + + # Supported Q:KV:O dtype combinations for trtllm-gen kernels + # Format: (q_dtype: torch.dtype, kv_dtype: DataType, o_dtype: torch.dtype) + SUPPORTED_DTYPE_COMBOS_CONTEXT = { + (torch.float8_e4m3fn, DataType.FP8, torch.float8_e4m3fn), + (torch.float16, DataType.HALF, torch.float16), + (torch.bfloat16, DataType.BF16, torch.bfloat16), + (torch.float8_e4m3fn, DataType.FP8, torch.float16), + (torch.float8_e4m3fn, DataType.FP8, torch.bfloat16), + # e4m3:nvfp4:* + (torch.float8_e4m3fn, DataType.NVFP4, torch.float8_e4m3fn), + (torch.float8_e4m3fn, DataType.NVFP4, torch.float16), + (torch.float8_e4m3fn, DataType.NVFP4, torch.bfloat16), + } + SUPPORTED_DTYPE_COMBOS_GENERATION = { + (torch.float8_e4m3fn, DataType.FP8, torch.float8_e4m3fn), + (torch.float16, DataType.HALF, torch.float16), + (torch.bfloat16, DataType.BF16, torch.bfloat16), + (torch.float8_e4m3fn, DataType.FP8, torch.float16), + (torch.float8_e4m3fn, DataType.FP8, torch.bfloat16), + (torch.bfloat16, DataType.FP8, torch.bfloat16), + (torch.float16, DataType.FP8, torch.float16), + # e4m3:nvfp4:* + (torch.float8_e4m3fn, DataType.NVFP4, torch.float8_e4m3fn), + (torch.float8_e4m3fn, DataType.NVFP4, torch.float16), + (torch.float8_e4m3fn, DataType.NVFP4, torch.bfloat16), + } + + # 96 is excluded because trtllm-gen does not ship context kernels for it. + UNSUPPORTED_HEAD_SIZES_CONTEXT = {72, 80, 96} + MAX_HEADS_RATIO_GENERATION = 32 + MIN_TOKENS_PER_BLOCK = 8 + SUPPORTED_TOKENS_PER_BLOCK = {16, 32, 64} + SUPPORTED_MLA_GENERATION_HEAD_DIMS = { + (320, 256), + (576, 512), + } + MISSING_MLA_GENERATION_KERNELS = { + (576, 512, 32), + } + def __init__( self, attention_layer: "TrtllmAttention", ): - self._attention_layer_ref = weakref.ref(attention_layer) - self._checker = TrtllmGenSupportChecker() self._layout = self.DEFAULT_KV_LAYOUT # Read once so the hot path is not sensitive to later environment changes. self._enable_pdl = get_env_enable_pdl() @@ -530,54 +449,7 @@ def __init__( f"trtllm-gen requires fused nanobind ops, missing: {', '.join(missing_ops)}." ) - # Cache layer-static properties to avoid repeated attribute lookups - # through the weakref on every layer forward call. - self._num_heads = attention_layer.num_heads - self._num_kv_heads = attention_layer.num_kv_heads - self._head_dim = attention_layer.head_dim - self._quant_mode = attention_layer.quant_mode - self._q_scaling = attention_layer.q_scaling - self._position_embedding_type = attention_layer.position_embedding_type - self._is_mla_enable = attention_layer.is_mla_enable - self._kv_lora_rank = attention_layer.kv_lora_rank or 0 - self._qk_nope_head_dim = attention_layer.qk_nope_head_dim or 0 - self._qk_rope_head_dim = attention_layer.qk_rope_head_dim or 0 - self._v_head_dim = attention_layer.v_head_dim - self._predicted_tokens_per_seq = attention_layer.predicted_tokens_per_seq - self._rotary_embedding_dim = attention_layer.rope_params.dim - self._rotary_embedding_base = attention_layer.rope_params.theta - self._rotary_embedding_scale_type = int(attention_layer.rope_params.scale_type) - self._rotary_embedding_scale = attention_layer.rope_params.scale - self._rotary_embedding_max_positions = attention_layer.rope_params.max_positions - self._bmm1_scale = 1.0 / (math.sqrt(self._head_dim) * self._q_scaling) - self._rotary_inv_freq = attention_layer.rotary_inv_freq - self._rotary_cos_sin = attention_layer.rotary_cos_sin - self._attention_chunk_size = ( - attention_layer.attention_chunk_size - if attention_layer.attention_chunk_size is not None - else 0 - ) - - # Static keyword args shared across preprocess / postprocess C++ calls. - # Built once to avoid dict construction on every forward call. - self._static_kw: dict[str, object] = dict( - num_heads=self._num_heads, - num_kv_heads=self._num_kv_heads, - head_size=self._head_dim, - rotary_embedding_dim=self._rotary_embedding_dim, - rotary_embedding_base=self._rotary_embedding_base, - rotary_embedding_scale_type=self._rotary_embedding_scale_type, - rotary_embedding_scale=self._rotary_embedding_scale, - rotary_embedding_max_positions=self._rotary_embedding_max_positions, - position_embedding_type=self._position_embedding_type, - bmm1_scale=self._bmm1_scale, - attention_chunk_size=self._attention_chunk_size, - ) - - # Cached is_supported() result. None means not yet checked; - # a positive result is stable (model-static) and cached permanently. - self._support_result: Optional[Tuple[bool, str]] = None - # Lazily set on the first attention() call from the query device. + # Lazily set on the first forward() call from the query device. self._multi_processor_count: Optional[int] = None @property @@ -585,12 +457,6 @@ def layout(self) -> str: """KV cache layout.""" return self._layout - def _get_attention_layer(self) -> "TrtllmAttention": - attention_layer = self._attention_layer_ref() - if attention_layer is None: - raise RuntimeError("trtllm-gen attention layer has been destroyed.") - return attention_layer - def _get_kv_scale_params( self, forward_args: AttentionForwardArgs, @@ -616,76 +482,279 @@ def _get_kv_scale_params( return kv_scale_orig_quant, kv_scale_quant_orig + @staticmethod + def _get_kv_cache_dtype_and_total_blocks( + meta: "TrtllmAttentionMetadata", + is_mla_enable: bool, + ) -> Tuple[Optional[DataType], int]: + kv_cache_dtype = None + total_num_blocks = 0 + kv_cache_manager = meta.kv_cache_manager + if kv_cache_manager is not None: + kv_cache_dtype = kv_cache_manager.dtype + kv_factor = 1 if is_mla_enable else 2 + blocks_in_primary_pool = getattr(kv_cache_manager, "blocks_in_primary_pool", None) + if blocks_in_primary_pool is None: + blocks_per_window = getattr(kv_cache_manager, "blocks_per_window", None) + if blocks_per_window: + blocks_in_primary_pool = max( + int(primary) for primary, _ in blocks_per_window.values() + ) + if blocks_in_primary_pool is not None: + total_num_blocks = ( + int(blocks_in_primary_pool) * kv_cache_manager.num_local_layers * kv_factor + ) + return kv_cache_dtype, total_num_blocks + + @staticmethod + def _get_kv_factor(attn: "TrtllmAttention") -> int: + return 1 if attn.is_mla_enable else 2 + + @staticmethod + def _get_generation_out_head_size(attn: "TrtllmAttention") -> int: + kv_lora_rank = attn.kv_lora_rank or 0 + if attn.is_mla_enable and kv_lora_rank: + return kv_lora_rank + return attn.head_dim + + @staticmethod + def _get_context_out_head_size(attn: "TrtllmAttention") -> int: + if attn.is_mla_enable and attn.v_head_dim: + return attn.v_head_dim + return attn.head_dim + + @staticmethod + def _get_bmm1_scale(attn: "TrtllmAttention") -> float: + return 1.0 / (math.sqrt(attn.head_dim) * attn.q_scaling) + + @staticmethod + def _get_attention_chunk_size(attn: "TrtllmAttention") -> int: + return attn.attention_chunk_size if attn.attention_chunk_size is not None else 0 + + @classmethod + def _check_mla_generation_support( + cls, + head_size: int, + tokens_per_block: int, + kv_lora_rank: Optional[int], + qk_rope_head_dim: Optional[int], + ) -> Tuple[bool, str]: + missing_params = [ + name + for name, value in ( + ("kv_lora_rank", kv_lora_rank), + ("qk_rope_head_dim", qk_rope_head_dim), + ) + if value is None or value <= 0 + ] + if missing_params: + return ( + False, + "[Generation][MLA] Missing required MLA parameter(s): " + f"{', '.join(missing_params)}.", + ) + + kv_rank = int(kv_lora_rank) + qk_rope_dim = int(qk_rope_head_dim) + head_dim_qk = kv_rank + qk_rope_dim + head_dim_v = kv_rank + if head_size != head_dim_qk: + return ( + False, + f"[Generation][MLA] head_size ({head_size}) must match " + f"kv_lora_rank + qk_rope_head_dim ({head_dim_qk}).", + ) + + if (head_dim_qk, head_dim_v) not in cls.SUPPORTED_MLA_GENERATION_HEAD_DIMS: + supported = sorted(cls.SUPPORTED_MLA_GENERATION_HEAD_DIMS) + return ( + False, + f"[Generation][MLA] Unsupported head dimensions: " + f"headDimQk={head_dim_qk}, headDimV={head_dim_v}. Supported: {supported}.", + ) + + if (head_dim_qk, head_dim_v, tokens_per_block) in cls.MISSING_MLA_GENERATION_KERNELS: + return ( + False, + f"[Generation][MLA] Missing TRTLLM-GEN decode kernel for " + f"headDimQk={head_dim_qk}, headDimV={head_dim_v}, " + f"tokens_per_block={tokens_per_block}.", + ) + + return True, "" + def is_supported( self, q: torch.Tensor, - *, - metadata: "TrtllmAttentionMetadata", - forward_args: AttentionForwardArgs, - mask_type: int, - active_helix: bool, - use_sage_attn: bool, + k: Optional[torch.Tensor], + v: Optional[torch.Tensor], + attn: "TrtllmAttention", + meta: "TrtllmAttentionMetadata", + fwd: AttentionForwardArgs, ) -> Tuple[bool, str]: - if use_sage_attn: + is_mla_enable = attn.is_mla_enable + has_skip_softmax = ( + attn.skip_softmax_threshold_scale_factor_prefill is not None + or attn.skip_softmax_threshold_scale_factor_decode is not None + ) + if ( + fwd.sage_attn_num_elts_per_blk_q > 0 + or fwd.sage_attn_num_elts_per_blk_k > 0 + or fwd.sage_attn_num_elts_per_blk_v > 0 + ): return False, "trtllm-gen does not support sage attention." - if active_helix: + if meta.helix_position_offsets is not None: return False, "trtllm-gen does not support helix parallelism." - # Return cached positive result after the first supported call. - if self._support_result is not None: - return self._support_result + sparse_kv_indices = fwd.sparse.sparse_kv_indices + sparse_attn_indices = fwd.sparse.sparse_attn_indices + if ( + (sparse_kv_indices is not None and sparse_kv_indices.numel() > 0) + or (sparse_attn_indices is not None and sparse_attn_indices.numel() > 0) + or meta.num_sparse_topk > 0 + ): + return False, "trtllm-gen does not support sparse attention." + if has_skip_softmax: + return False, "trtllm-gen does not support skip-softmax attention." + if meta.use_spec_decoding and meta.is_spec_dec_tree: + return ( + False, + "FlashInfer trtllm-gen does not support spec-dec tree/custom masks.", + ) + if is_mla_enable and fwd.attention_input_type != AttentionInputType.generation_only: + return False, "trtllm-gen MLA supports generation-only attention." if not IS_FLASHINFER_AVAILABLE: return False, "flashinfer package is not installed." - kv_cache_manager = metadata.kv_cache_manager - if kv_cache_manager is None: - return False, "trtllm-gen requires a KVCacheManager." - use_paged_kv_cache = metadata.kv_cache_block_offsets is not None - if not use_paged_kv_cache: + if meta.kv_cache_block_offsets is None: return False, "trtllm-gen requires paged KV cache." - - output = forward_args.output + output = fwd.output if output is None: - return False, "trtllm-gen requires forward_args.output." + return False, "trtllm-gen requires output." - attention_layer = self._get_attention_layer() - sparse_attention_config = attention_layer.sparse_attention_config - has_skip_softmax_attention = ( - getattr(sparse_attention_config, "algorithm", None) == "skip_softmax" - ) - has_sparse_attention = ( - sparse_attention_config is not None and not has_skip_softmax_attention - ) + tokens_per_block = meta.tokens_per_block + if tokens_per_block is None: + tokens_per_block = 0 + + attn_input_type = fwd.attention_input_type + has_context_phase = attn_input_type != AttentionInputType.generation_only + has_generation_phase = attn_input_type != AttentionInputType.context_only q_dtype = q.dtype - if kv_cache_manager.dtype == DataType.NVFP4: - q_dtype = torch.float8_e4m3fn + o_dtype = output.dtype - result = self._checker.is_supported( - q_dtype=q_dtype, - kv_cache_dtype=kv_cache_manager.dtype, - num_heads=self._num_heads, - num_kv_heads=self._num_kv_heads, - head_size=self._head_dim, - attention_input_type=int(forward_args.attention_input_type), - out_dtype=output.dtype, - mask_type=mask_type, - beam_width=metadata.beam_width, - tokens_per_block=metadata.tokens_per_block, - use_paged_kv_cache=use_paged_kv_cache, - is_mla_enable=self._is_mla_enable, - kv_lora_rank=self._kv_lora_rank, - qk_rope_head_dim=self._qk_rope_head_dim, - cross_attention=False, - is_spec_decoding=metadata.is_spec_decoding_enabled, - has_alibi=self._position_embedding_type in (4, 5), - is_padded=False, - position_shift_enabled=False, - quant_config=attention_layer.quant_config, - has_sparse_attention=has_sparse_attention, - has_skip_softmax_attention=has_skip_softmax_attention, + sm = get_sm_version() + if not is_sm_100f(sm): + return False, (f"trtllm-gen requires SM100 or SM103 (Blackwell). Current: SM{sm}.") + + if q_dtype not in self.SUPPORTED_INPUT_DTYPES: + return False, ( + f"Input dtype {q_dtype} not supported. Supported: FP16, BF16, FP8 (E4M3)." + ) + + kv_cache_dtype, _ = self._get_kv_cache_dtype_and_total_blocks(meta, is_mla_enable) + if kv_cache_dtype is None: + kv_cache_dtype = torch_dtype_to_binding(q_dtype) + + is_fp8_out = output.dtype == torch.float8_e4m3fn + is_fp4_out = output.dtype == torch.uint8 + has_fp8_kv = kv_cache_dtype == DataType.FP8 + has_fp4_kv = kv_cache_dtype == DataType.NVFP4 + fp8_context_fmha = ( + is_fp8_out or is_fp4_out or has_fp4_kv or (has_fp8_kv and has_context_phase) ) - if result[0]: - self._support_result = result - return result + if has_fp4_kv or fp8_context_fmha: + q_dtype = torch.float8_e4m3fn + + if kv_cache_dtype not in self.SUPPORTED_KV_CACHE_DTYPES: + return False, ( + f"KV cache dtype {kv_cache_dtype} not supported. Supported: FP16, BF16, FP8, NVFP4." + ) + if o_dtype not in self.SUPPORTED_OUT_DTYPES: + return False, f"Output dtype {o_dtype} not supported. Supported: FP16, BF16, FP8." + + assert attn.num_heads > 0, "num_heads must be positive." + assert attn.num_kv_heads > 0, "num_kv_heads must be positive." + if attn.num_heads % attn.num_kv_heads != 0: + return ( + False, + f"num_heads ({attn.num_heads}) must be divisible by " + f"num_kv_heads ({attn.num_kv_heads}).", + ) + + has_alibi = attn.position_embedding_type in (4, 5) + check_context_phase = has_context_phase and not is_mla_enable + if check_context_phase: + if attn.head_dim in self.UNSUPPORTED_HEAD_SIZES_CONTEXT: + return False, f"[Context] Head size {attn.head_dim} is not supported." + try: + if AttentionMaskType(fwd.mask_type) == AttentionMaskType.custom_mask: + return False, "[Context] Custom mask is not supported." + except ValueError: + return False, f"[Context] Invalid mask_type: {fwd.mask_type}." + if has_alibi: + return False, "[Context] ALiBi is not supported." + if (q_dtype, kv_cache_dtype, o_dtype) not in self.SUPPORTED_DTYPE_COMBOS_CONTEXT: + return False, ( + f"[Context] Unsupported dtype combination: " + f"Q={q_dtype}, KV={kv_cache_dtype}, O={o_dtype}." + ) + + if has_generation_phase: + if meta.beam_width != 1: + return ( + False, + f"[Generation] Beam search (beam_width={meta.beam_width}) " + "is not supported. Must be 1.", + ) + sink_token_length = 0 + if sink_token_length != 0: + return ( + False, + f"[Generation] StreamingLLM " + f"(sink_token_length={sink_token_length}) is not supported.", + ) + if tokens_per_block < self.MIN_TOKENS_PER_BLOCK: + return ( + False, + f"[Generation] tokens_per_block ({tokens_per_block}) " + f"must be >= {self.MIN_TOKENS_PER_BLOCK}.", + ) + heads_ratio = attn.num_heads // attn.num_kv_heads + if not is_mla_enable and heads_ratio > self.MAX_HEADS_RATIO_GENERATION: + return ( + False, + f"[Generation] heads ratio ({heads_ratio}) exceeds maximum " + f"({self.MAX_HEADS_RATIO_GENERATION}).", + ) + if has_alibi: + return False, "[Generation] ALiBi is not supported." + if (q_dtype, kv_cache_dtype, o_dtype) not in self.SUPPORTED_DTYPE_COMBOS_GENERATION: + return False, ( + f"[Generation] Unsupported dtype combination: " + f"Q={q_dtype}, KV={kv_cache_dtype}, O={o_dtype}." + ) + if is_mla_enable: + supported, reason = self._check_mla_generation_support( + head_size=attn.head_dim, + tokens_per_block=tokens_per_block, + kv_lora_rank=attn.kv_lora_rank, + qk_rope_head_dim=attn.qk_rope_head_dim, + ) + if not supported: + return False, reason + + if tokens_per_block <= 0: + return False, "tokens_per_block must be positive." + if tokens_per_block & (tokens_per_block - 1) != 0: + return False, f"tokens_per_block ({tokens_per_block}) must be power of 2." + if tokens_per_block not in self.SUPPORTED_TOKENS_PER_BLOCK: + supported = sorted(self.SUPPORTED_TOKENS_PER_BLOCK) + return ( + False, + f"tokens_per_block ({tokens_per_block}) is not supported " + f"by trtllm-gen kernels. Supported: {supported}.", + ) + + return True, "" @staticmethod @lru_cache(maxsize=None) @@ -701,67 +770,56 @@ def _get_multi_processor_count(self, device: torch.device) -> int: device_index = torch.cuda.current_device() return self._get_multi_processor_count_for_device(device_index) - def attention( + def forward( self, q: torch.Tensor, - *, - metadata: "TrtllmAttentionMetadata", - forward_args: AttentionForwardArgs, - mask_type: int, - use_paged_context_fmha: bool, + k: Optional[torch.Tensor], + v: Optional[torch.Tensor], + attn: "TrtllmAttention", + meta: "TrtllmAttentionMetadata", + fwd: AttentionForwardArgs, ) -> None: - attention_layer = self._get_attention_layer() - layer_idx = attention_layer.get_local_layer_idx(metadata) - logger.debug(f"trtllm_gen_attention starts at layer {layer_idx}") - - output = forward_args.output + output = fwd.output if output is None: - raise RuntimeError("trtllm-gen attention requires forward_args.output.") + raise RuntimeError("trtllm-gen attention requires output.") + if meta.kv_cache_block_offsets is None: + raise RuntimeError("trtllm-gen attention requires paged KV cache.") - workspace = ( - metadata.workspace if not metadata.is_cuda_graph else metadata.cuda_graph_workspace - ) + workspace = meta.effective_workspace + if workspace is None: + workspace = torch.empty((0,), device=q.device, dtype=torch.int8) # Lazily cache the SM count from the first query tensor's device. if self._multi_processor_count is None: self._multi_processor_count = self._get_multi_processor_count(q.device) - # Use cached layer-static properties. - num_heads = self._num_heads - num_kv_heads = self._num_kv_heads - head_size = self._head_dim - quant_mode = self._quant_mode - is_mla_enable = self._is_mla_enable - kv_lora_rank = self._kv_lora_rank - v_head_dim = self._v_head_dim - - # Per-call dynamic values from metadata / forward_args. - tokens_per_block = metadata.tokens_per_block - max_num_requests = metadata.max_num_requests - max_context_length = min(metadata.max_seq_len - 1, metadata.max_num_tokens) - attention_window_size = forward_args.attention_window_size or metadata.max_seq_len - beam_width = metadata.beam_width - attention_input_type = int(forward_args.attention_input_type) + num_heads = attn.num_heads + num_kv_heads = attn.num_kv_heads + head_size = attn.head_dim + quant_mode = attn.quant_mode + is_mla_enable = attn.is_mla_enable + tokens_per_block = meta.tokens_per_block + max_num_requests = meta.max_num_requests + max_context_length = meta.max_context_length + attention_window_size = fwd.attention_window_size + beam_width = meta.beam_width + num_tokens = q.size(0) + attn_input_type = fwd.attention_input_type + is_gen_only = attn_input_type == AttentionInputType.generation_only is_fp8_out = output.dtype == torch.float8_e4m3fn is_fp4_out = output.dtype == torch.uint8 kv_cache_quant_mode = QuantMode(quant_mode) fp8_context_fmha = ( is_fp8_out or is_fp4_out - or ( - (kv_cache_quant_mode.has_fp8_kv_cache() or kv_cache_quant_mode.has_fp4_kv_cache()) - and use_paged_context_fmha - ) + or kv_cache_quant_mode.has_fp4_kv_cache() + or (kv_cache_quant_mode.has_fp8_kv_cache() and not is_gen_only) ) - num_tokens = q.size(0) - attn_input_type = AttentionInputType(attention_input_type) - is_gen_only = attn_input_type == AttentionInputType.generation_only - - num_contexts = metadata.num_contexts - num_ctx_tokens = metadata.num_ctx_tokens - num_generations = metadata.host_request_types_runtime.size(0) - num_contexts + num_contexts = meta.num_contexts + num_ctx_tokens = meta.num_ctx_tokens + num_generations = meta.num_generations num_gen_tokens = num_tokens if is_gen_only else num_tokens - num_ctx_tokens if num_gen_tokens < 0: raise RuntimeError( @@ -772,41 +830,35 @@ def attention( workspace_max_tokens = max(num_tokens, max_context_length) workspace_max_gen_tokens = max(num_gen_tokens, max_num_requests) required_workspace_size = _get_workspace_size( - q.dtype, - workspace_max_tokens, - workspace_max_gen_tokens, - num_heads, - num_kv_heads, - head_size, - max_num_requests, - self._rotary_embedding_dim, - fp8_context_fmha, - ) - - current_workspace_size = ( - workspace.numel() * workspace.element_size() if workspace is not None else 0 + dtype=q.dtype, + num_tokens=workspace_max_tokens, + num_gen_tokens=workspace_max_gen_tokens, + num_heads=num_heads, + num_kv_heads=num_kv_heads, + head_size=head_size, + max_num_requests=max_num_requests, + rotary_embedding_dim=attn.rope_dim, + fp8_context_fmha=fp8_context_fmha, ) + current_workspace_size = workspace.numel() * workspace.element_size() if current_workspace_size < required_workspace_size: - logger.warning( - f"Attention workspace size is not enough, increase the size from " - f"{current_workspace_size} bytes to {required_workspace_size} bytes" - ) - if workspace is None: - workspace = torch.zeros(required_workspace_size, device=q.device, dtype=torch.uint8) - else: - workspace.resize_(required_workspace_size) - workspace.zero_() - - if is_mla_enable and is_gen_only and kv_lora_rank: - out_head_size = kv_lora_rank - elif is_mla_enable and v_head_dim: - out_head_size = v_head_dim - else: - out_head_size = head_size + if meta.is_cuda_graph and torch.cuda.is_current_stream_capturing(): + raise RuntimeError( + "Attention CUDA graph workspace is smaller than the " + "required size for trtllm-gen." + ) + required_workspace_numel = math.ceil(required_workspace_size / workspace.element_size()) + workspace.resize_((required_workspace_numel,)) + + out_head_size = ( + self._get_generation_out_head_size(attn) + if is_gen_only + else self._get_context_out_head_size(attn) + ) out_tensor = output.view(num_tokens, num_heads, out_head_size) - cache_indirection = metadata.cache_indirection + cache_indirection = meta.cache_indirection max_attn_window_size = ( attention_window_size if beam_width == 1 @@ -817,42 +869,39 @@ def attention( ) ) cyclic_attn_window_size = attention_window_size - kv_factor, total_num_blocks = self._get_kv_cache_metadata(metadata, is_mla_enable) - params = EnqueueParams( - forward=forward_args, + tokens_per_block = tokens_per_block if tokens_per_block is not None else 64 + _, total_num_blocks = self._get_kv_cache_dtype_and_total_blocks(meta, is_mla_enable) + + params = FmhaParams( + attn=attn, + meta=meta, + fwd=fwd, workspace=workspace, max_attention_window_size=max_attn_window_size, cyclic_attention_window_size=cyclic_attn_window_size, - kv_cache_block_offsets=metadata.kv_cache_block_offsets, - host_kv_cache_pool_pointers=metadata.host_kv_cache_pool_pointers, - host_kv_cache_pool_mapping=metadata.host_kv_cache_pool_mapping, - tokens_per_block=tokens_per_block if tokens_per_block is not None else 64, - mask_type=mask_type, - kv_cache_quant_mode=quant_mode, - layer_idx=layer_idx, + tokens_per_block=tokens_per_block, fp8_context_fmha=fp8_context_fmha, - paged_context_fmha=use_paged_context_fmha, - kv_factor=kv_factor, + kv_factor=self._get_kv_factor(attn), total_num_blocks=total_num_blocks, ) - sequence_length = metadata.kv_lens_cuda_runtime - host_past_key_value_lengths = metadata.kv_lens_runtime - context_lengths = metadata.prompt_lens_cuda_runtime - host_context_lengths = metadata.prompt_lens_cpu_runtime + sequence_length = meta.kv_lens_cuda_runtime + host_past_key_value_lengths = meta.kv_lens_runtime if num_contexts > 0 and attn_input_type != AttentionInputType.generation_only: seq_offset = 0 token_offset = 0 num_seqs = num_contexts + context_lengths = meta.prompt_lens_cuda_runtime + host_context_lengths = meta.prompt_lens_cpu_runtime max_context_q_len = int(host_context_lengths[seq_offset : seq_offset + num_seqs].max()) max_past_kv_len = int( host_past_key_value_lengths[seq_offset : seq_offset + num_seqs].max() ) params.attention_input = q[token_offset : token_offset + num_ctx_tokens] - params.qkv_input = q[token_offset : token_offset + num_ctx_tokens] + params.qkv_input = params.attention_input params.context_buf = out_tensor[token_offset : token_offset + num_ctx_tokens] params.sequence_lengths = sequence_length[seq_offset:] params.context_lengths = context_lengths[seq_offset:] @@ -873,45 +922,32 @@ def attention( ) input_seq_length = num_gen_tokens // num_seqs if num_seqs > 0 else 1 - predicted_tokens_per_seq = self._predicted_tokens_per_seq + predicted_tokens_per_seq = attn.predicted_tokens_per_seq spec_gen_lengths = None spec_pos_offsets = None - spec_packed_mask = None - if ( - metadata.is_spec_decoding_enabled - and metadata.use_spec_decoding - and predicted_tokens_per_seq > 1 - ): - spec_gen_lengths = metadata.spec_decoding_generation_lengths - position_offsets_for_cpp = metadata.spec_decoding_position_offsets + if meta.is_spec_decoding_enabled and predicted_tokens_per_seq > 1: + spec_gen_lengths = meta.spec_decoding_generation_lengths + position_offsets_for_cpp = meta.spec_decoding_position_offsets_for_cpp if position_offsets_for_cpp is not None and position_offsets_for_cpp.dim() == 1: - position_offsets_for_cpp = position_offsets_for_cpp.view( - metadata.max_num_requests, -1 - ) + position_offsets_for_cpp = position_offsets_for_cpp.view(max_num_requests, -1) spec_pos_offsets = position_offsets_for_cpp - spec_packed_mask = metadata.spec_decoding_packed_mask params.attention_input = q[token_offset : token_offset + num_gen_tokens] - params.qkv_input = q[token_offset : token_offset + num_gen_tokens] + params.qkv_input = params.attention_input params.context_buf = out_tensor[token_offset : token_offset + num_gen_tokens] params.sequence_lengths = sequence_length[seq_offset:] - params.context_lengths = context_lengths[seq_offset:] params.max_past_kv_length = max_past_kv_len params.num_tokens = num_gen_tokens params.seq_offset = seq_offset params.input_seq_length = input_seq_length - params.beam_width = beam_width params.num_requests = num_seqs // beam_width - params.predicted_tokens_per_seq = predicted_tokens_per_seq params.spec_decoding_generation_lengths = spec_gen_lengths params.spec_decoding_position_offsets = spec_pos_offsets - params.spec_decoding_packed_mask = spec_packed_mask if is_mla_enable: self.run_mla_generation(params) else: self.run_generation(params) - - logger.debug(f"trtllm_gen_attention stops at layer {layer_idx}") + return @staticmethod def _compute_window_left( @@ -927,7 +963,8 @@ def _compute_window_left( """ if attention_chunk_size != 0 and cyclic_attention_window_size < max_kv_length: raise ValueError( - "Chunked-attention and sliding-window-attention should not be enabled at the same time." + "Chunked-attention and sliding-window-attention should not " + "be enabled at the same time." ) if 0 < cyclic_attention_window_size < max_kv_length: return cyclic_attention_window_size - 1 @@ -945,42 +982,16 @@ def _missing_fused_nanobind_ops() -> List[str]: ) return [op for op in required_ops if not hasattr(thop, op)] - def _get_kv_cache_metadata( - self, - metadata: "TrtllmAttentionMetadata", - is_mla_enable: bool, - ) -> Tuple[int, int]: - """Return (kv_factor, total_num_blocks) for building KV cache views.""" - kv_cache_manager = metadata.kv_cache_manager - if kv_cache_manager is None: - raise RuntimeError("trtllm-gen requires a KVCacheManager.") - - kv_factor = 1 if is_mla_enable else 2 - blocks_in_primary_pool = getattr(kv_cache_manager, "blocks_in_primary_pool", None) - if blocks_in_primary_pool is None: - blocks_per_window = getattr(kv_cache_manager, "blocks_per_window", None) - if blocks_per_window: - blocks_in_primary_pool = max( - int(primary) for primary, _ in blocks_per_window.values() - ) - if blocks_in_primary_pool is None: - raise RuntimeError( - "trtllm-gen could not determine blocks_in_primary_pool from the KVCacheManager." - ) - total_num_blocks = ( - int(blocks_in_primary_pool) * kv_cache_manager.num_local_layers * kv_factor - ) - return kv_factor, total_num_blocks - def run_context( self, - params: EnqueueParams, - ): - kv_scale_orig_quant, kv_scale_quant_orig = self._get_kv_scale_params( - params.forward, params.kv_cache_quant_mode - ) - attention_output_orig_quant = params.forward.out_scale - mrope_rotary_cos_sin = params.forward.mrope_rotary_cos_sin + params: FmhaParams, + ) -> None: + attn = params.attn + meta = params.meta + fwd = params.fwd + rope_params = attn.rope_params + bmm1_scale_static = self._get_bmm1_scale(attn) + attention_chunk_size = self._get_attention_chunk_size(attn) ( q_processed, @@ -996,118 +1007,137 @@ def run_context( max_kv_len, window_left, ) = thop.trtllm_gen_context_preprocess( - qkv_input=params.qkv_input, - workspace=params.workspace, - sequence_lengths=params.sequence_lengths, - context_lengths=params.context_lengths, - kv_cache_block_offsets=params.kv_cache_block_offsets, - host_kv_cache_pool_pointers=params.host_kv_cache_pool_pointers, - host_kv_cache_pool_mapping=params.host_kv_cache_pool_mapping, - kv_scale_orig_quant=kv_scale_orig_quant, - kv_scale_quant_orig=kv_scale_quant_orig, - attention_output_orig_quant=attention_output_orig_quant, - rotary_inv_freq=self._rotary_inv_freq, - rotary_cos_sin=self._rotary_cos_sin, - mrope_rotary_cos_sin=mrope_rotary_cos_sin, - layer_idx=params.layer_idx, - tokens_per_block=params.tokens_per_block, - mask_type=params.mask_type, - kv_cache_quant_mode=params.kv_cache_quant_mode, - max_attention_window_size=params.max_attention_window_size, - cyclic_attention_window_size=params.cyclic_attention_window_size, - num_tokens=params.num_tokens, - batch_size=params.batch_size, - input_seq_length=params.input_seq_length, - max_past_kv_length=params.max_past_kv_length, - bmm2_scale=1.0, - fp8_context_fmha=params.fp8_context_fmha, - paged_context_fmha=params.paged_context_fmha, - is_mla_enable=self._is_mla_enable, - total_num_blocks=params.total_num_blocks, - kv_factor=params.kv_factor, - need_build_kv_cache_metadata=True, - multi_processor_count=self._multi_processor_count, - **self._static_kw, + params.qkv_input, # qkv_input + params.workspace, # workspace + params.sequence_lengths, # sequence_lengths + params.context_lengths, # context_lengths + meta.kv_cache_block_offsets, # kv_cache_block_offsets + meta.host_kv_cache_pool_pointers, # host_kv_cache_pool_pointers + meta.host_kv_cache_pool_mapping, # host_kv_cache_pool_mapping + fwd.kv_scale_orig_quant, # kv_scale_orig_quant + fwd.kv_scale_quant_orig, # kv_scale_quant_orig + fwd.out_scale, # attention_output_orig_quant + attn.rotary_inv_freq, # rotary_inv_freq + attn.rotary_cos_sin, # rotary_cos_sin + fwd.mrope_rotary_cos_sin, # mrope_rotary_cos_sin + attn.local_layer_idx, # layer_idx + attn.num_heads, # num_heads + attn.num_kv_heads, # num_kv_heads + attn.head_dim, # head_size + params.tokens_per_block, # tokens_per_block + fwd.mask_type, # mask_type + attn.quant_mode, # kv_cache_quant_mode + params.max_attention_window_size, # max_attention_window_size + params.cyclic_attention_window_size, # cyclic_attention_window_size + params.num_tokens, # num_tokens + params.batch_size, # batch_size + params.input_seq_length, # input_seq_length + params.max_past_kv_length, # max_past_kv_length + rope_params.dim, # rotary_embedding_dim + rope_params.theta, # rotary_embedding_base + int(rope_params.scale_type), # rotary_embedding_scale_type + rope_params.scale, # rotary_embedding_scale + rope_params.max_positions, # rotary_embedding_max_positions + attn.position_embedding_type, # position_embedding_type + bmm1_scale_static, # bmm1_scale + 1.0, # bmm2_scale + attention_chunk_size, # attention_chunk_size + params.fp8_context_fmha, # fp8_context_fmha + meta.use_paged_context_fmha, # paged_context_fmha + attn.is_mla_enable, # is_mla_enable + self._multi_processor_count, # multi_processor_count + params.total_num_blocks, # total_num_blocks + params.kv_factor, # kv_factor + True, # need_build_kv_cache_metadata ) - # FlashInfer accepts a split K/V tuple; TensorRT-LLM stores both views - # in one flat paged KV pool, so both tuple entries intentionally alias. - kv_cache_sf = None - if kv_scale_pool is not None: - kv_cache_sf = (kv_scale_pool, kv_scale_pool) - - has_fp4_kv = QuantMode(params.kv_cache_quant_mode).has_fp4_kv_cache() - if has_fp4_kv: + has_fp4_kv = QuantMode(attn.quant_mode).has_fp4_kv_cache() + if has_fp4_kv and kv_scale_pool is None: + raise RuntimeError("trtllm-gen FP4 KV cache requires KV scale pool.") + if has_fp4_kv or params.fp8_context_fmha: q_processed = ( q_processed.view(torch.uint8) - .flatten()[: params.num_tokens * self._num_heads * self._head_dim] + .flatten()[: params.num_tokens * attn.num_heads * attn.head_dim] .view(torch.float8_e4m3fn) - .view(params.num_tokens, self._num_heads, self._head_dim) + .view(params.num_tokens, attn.num_heads, attn.head_dim) ) - ctx_bmm1_scale = bmm1_scale if has_fp4_kv and bmm1_scale is not None else self._bmm1_scale - ctx_bmm2_scale = bmm2_scale if has_fp4_kv and bmm2_scale is not None else 1.0 - - flashinfer.prefill.trtllm_batch_context_with_kv_cache( - query=q_processed, - kv_cache=(kv_pool, kv_pool), - workspace_buffer=fmha_workspace, - block_tables=block_tables, - seq_lens=params.sequence_lengths, - max_q_len=max_q_len, - max_kv_len=max_kv_len, - bmm1_scale=ctx_bmm1_scale, - bmm2_scale=ctx_bmm2_scale, - batch_size=params.batch_size, - cum_seq_lens_q=cu_q_seqlens, - cum_seq_lens_kv=cu_kv_seqlens, - window_left=window_left, - out=params.context_buf, - kv_layout=self._layout, - sinks=params.forward.attention_sinks, - uses_shared_paged_kv_idx=self.USE_SHARED_PAGED_KV_IDX, - kv_cache_sf=kv_cache_sf, - enable_pdl=self._enable_pdl, + ctx_bmm1_scale = ( + bmm1_scale if params.fp8_context_fmha and bmm1_scale is not None else bmm1_scale_static + ) + ctx_bmm2_scale = bmm2_scale if params.fp8_context_fmha and bmm2_scale is not None else 1.0 + + _trtllm_gen_batch_context_with_kv_cache( + q_processed, # query + kv_pool, # kv_pool + fmha_workspace, # workspace_buffer + block_tables, # block_tables + params.sequence_lengths, # seq_lens + max_q_len, # max_q_len + max_kv_len, # max_kv_len + ctx_bmm1_scale, # bmm1_scale + ctx_bmm2_scale, # bmm2_scale + params.batch_size, # batch_size + cu_q_seqlens, # cum_seq_lens_q + cu_kv_seqlens, # cum_seq_lens_kv + window_left, # window_left + params.context_buf, # out + fwd.attention_sinks, # sinks + self._enable_pdl, # enable_pdl + kv_scale_pool, # kv_scale_pool + self.USE_SHARED_PAGED_KV_IDX, # uses_shared_paged_kv_idx ) thop.trtllm_gen_context_postprocess( - qkv_input=params.qkv_input, - workspace=params.workspace, - sequence_lengths=params.sequence_lengths, - context_lengths=params.context_lengths, - kv_cache_block_offsets=params.kv_cache_block_offsets, - host_kv_cache_pool_pointers=params.host_kv_cache_pool_pointers, - host_kv_cache_pool_mapping=params.host_kv_cache_pool_mapping, - kv_scale_orig_quant=kv_scale_orig_quant, - kv_scale_quant_orig=kv_scale_quant_orig, - attention_output_orig_quant=attention_output_orig_quant, - rotary_cos_sin=self._rotary_cos_sin, - mrope_rotary_cos_sin=mrope_rotary_cos_sin, - layer_idx=params.layer_idx, - tokens_per_block=params.tokens_per_block, - mask_type=params.mask_type, - kv_cache_quant_mode=params.kv_cache_quant_mode, - max_attention_window_size=params.max_attention_window_size, - cyclic_attention_window_size=params.cyclic_attention_window_size, - num_tokens=params.num_tokens, - batch_size=params.batch_size, - input_seq_length=params.input_seq_length, - max_past_kv_length=params.max_past_kv_length, - fp8_context_fmha=params.fp8_context_fmha, - paged_context_fmha=params.paged_context_fmha, - is_mla_enable=self._is_mla_enable, - multi_processor_count=self._multi_processor_count, - **self._static_kw, + params.qkv_input, # qkv_input + params.workspace, # workspace + params.sequence_lengths, # sequence_lengths + params.context_lengths, # context_lengths + meta.kv_cache_block_offsets, # kv_cache_block_offsets + meta.host_kv_cache_pool_pointers, # host_kv_cache_pool_pointers + meta.host_kv_cache_pool_mapping, # host_kv_cache_pool_mapping + fwd.kv_scale_orig_quant, # kv_scale_orig_quant + fwd.kv_scale_quant_orig, # kv_scale_quant_orig + fwd.out_scale, # attention_output_orig_quant + attn.rotary_cos_sin, # rotary_cos_sin + fwd.mrope_rotary_cos_sin, # mrope_rotary_cos_sin + attn.local_layer_idx, # layer_idx + attn.num_heads, # num_heads + attn.num_kv_heads, # num_kv_heads + attn.head_dim, # head_size + params.tokens_per_block, # tokens_per_block + fwd.mask_type, # mask_type + attn.quant_mode, # kv_cache_quant_mode + params.max_attention_window_size, # max_attention_window_size + params.cyclic_attention_window_size, # cyclic_attention_window_size + params.num_tokens, # num_tokens + params.batch_size, # batch_size + params.input_seq_length, # input_seq_length + params.max_past_kv_length, # max_past_kv_length + rope_params.dim, # rotary_embedding_dim + rope_params.theta, # rotary_embedding_base + int(rope_params.scale_type), # rotary_embedding_scale_type + rope_params.scale, # rotary_embedding_scale + rope_params.max_positions, # rotary_embedding_max_positions + attn.position_embedding_type, # position_embedding_type + bmm1_scale_static, # bmm1_scale + params.fp8_context_fmha, # fp8_context_fmha + meta.use_paged_context_fmha, # paged_context_fmha + attn.is_mla_enable, # is_mla_enable + attention_chunk_size, # attention_chunk_size + self._multi_processor_count, # multi_processor_count ) def run_generation( self, - params: EnqueueParams, - ): - batch_beam = params.num_requests * params.beam_width - kv_scale_orig_quant, kv_scale_quant_orig = self._get_kv_scale_params( - params.forward, params.kv_cache_quant_mode - ) - attention_output_orig_quant = params.forward.out_scale + params: FmhaParams, + ) -> None: + attn = params.attn + meta = params.meta + fwd = params.fwd + rope_params = attn.rope_params + bmm1_scale_static = self._get_bmm1_scale(attn) + attention_chunk_size = self._get_attention_chunk_size(attn) + batch_beam = params.num_requests * meta.beam_width ( q_processed, kv_pool, @@ -1122,110 +1152,136 @@ def run_generation( window_left, is_multi_token_gen, ) = thop.trtllm_gen_generation_preprocess( - qkv_input=params.qkv_input, - workspace=params.workspace, - sequence_lengths=params.sequence_lengths, - spec_decoding_generation_lengths=params.spec_decoding_generation_lengths, - spec_decoding_position_offsets=params.spec_decoding_position_offsets, - kv_cache_block_offsets=params.kv_cache_block_offsets, - host_kv_cache_pool_pointers=params.host_kv_cache_pool_pointers, - host_kv_cache_pool_mapping=params.host_kv_cache_pool_mapping, - kv_scale_orig_quant=kv_scale_orig_quant, - kv_scale_quant_orig=kv_scale_quant_orig, - attention_output_orig_quant=attention_output_orig_quant, - rotary_inv_freq=self._rotary_inv_freq, - rotary_cos_sin=self._rotary_cos_sin, - layer_idx=params.layer_idx, - seq_offset=params.seq_offset, - tokens_per_block=params.tokens_per_block, - kv_cache_quant_mode=params.kv_cache_quant_mode, - max_attention_window_size=params.max_attention_window_size, - cyclic_attention_window_size=params.cyclic_attention_window_size, - num_tokens=params.num_tokens, - batch_beam=batch_beam, - input_seq_length=params.input_seq_length, - max_past_kv_length=params.max_past_kv_length, - bmm2_scale=1.0, - fp8_context_fmha=params.fp8_context_fmha, - predicted_tokens_per_seq=params.predicted_tokens_per_seq, - multi_processor_count=self._multi_processor_count, - total_num_blocks=params.total_num_blocks, - kv_factor=params.kv_factor, - need_build_kv_cache_metadata=True, - **self._static_kw, + params.qkv_input, # qkv_input + params.workspace, # workspace + params.sequence_lengths, # sequence_lengths + params.spec_decoding_generation_lengths, # spec_decoding_generation_lengths + params.spec_decoding_position_offsets, # spec_decoding_position_offsets + meta.kv_cache_block_offsets, # kv_cache_block_offsets + meta.host_kv_cache_pool_pointers, # host_kv_cache_pool_pointers + meta.host_kv_cache_pool_mapping, # host_kv_cache_pool_mapping + fwd.kv_scale_orig_quant, # kv_scale_orig_quant + fwd.kv_scale_quant_orig, # kv_scale_quant_orig + fwd.out_scale, # attention_output_orig_quant + attn.rotary_inv_freq, # rotary_inv_freq + attn.rotary_cos_sin, # rotary_cos_sin + attn.local_layer_idx, # layer_idx + params.seq_offset, # seq_offset + attn.num_heads, # num_heads + attn.num_kv_heads, # num_kv_heads + attn.head_dim, # head_size + params.tokens_per_block, # tokens_per_block + attn.quant_mode, # kv_cache_quant_mode + params.max_attention_window_size, # max_attention_window_size + params.cyclic_attention_window_size, # cyclic_attention_window_size + params.num_tokens, # num_tokens + batch_beam, # batch_beam + params.input_seq_length, # input_seq_length + params.max_past_kv_length, # max_past_kv_length + rope_params.dim, # rotary_embedding_dim + rope_params.theta, # rotary_embedding_base + int(rope_params.scale_type), # rotary_embedding_scale_type + rope_params.scale, # rotary_embedding_scale + rope_params.max_positions, # rotary_embedding_max_positions + attn.position_embedding_type, # position_embedding_type + bmm1_scale_static, # bmm1_scale + 1.0, # bmm2_scale + params.fp8_context_fmha, # fp8_context_fmha + attn.predicted_tokens_per_seq, # predicted_tokens_per_seq + attention_chunk_size, # attention_chunk_size + self._multi_processor_count, # multi_processor_count + params.total_num_blocks, # total_num_blocks + params.kv_factor, # kv_factor + True, # need_build_kv_cache_metadata + ) + + # FIXME: Flashinfer trtllm-gen API doesn't support a separate + # multi CTAs counter buffer. We have to clear a small buffer + # before trtllm_gen_batch_decode_with_kv_cache. + # + # We must also avoid clearing the workspace only when it is + # resized. The warmup phase may have already cached the workspace + # pointer; if the capture phase skips the zeroing step, the + # CUDA graph will not include the counter initialization. We + # have already verified—specifically in the context of the GPTOSS-20B + # test graph replay scenario—that this skipping logic is unsafe. + # + # https://github.com/flashinfer-ai/flashinfer/issues/3433 + _clear_multi_ctas_kv_counter_workspace( + fmha_workspace, attn.num_heads, meta.max_num_requests, self._multi_processor_count ) q_len_per_req = None if is_multi_token_gen else params.input_seq_length decode_max_q_len = max_q_len if is_multi_token_gen else None decode_cu_seqlens = cu_seqlens if is_multi_token_gen else None - # FlashInfer accepts a split K/V tuple; TensorRT-LLM stores both views - # in one flat paged KV pool, so both tuple entries intentionally alias. - kv_cache_sf = None - if kv_scale_pool is not None: - kv_cache_sf = (kv_scale_pool, kv_scale_pool) - - has_fp4_kv = QuantMode(params.kv_cache_quant_mode).has_fp4_kv_cache() - if has_fp4_kv: + + has_fp4_kv = QuantMode(attn.quant_mode).has_fp4_kv_cache() + if has_fp4_kv and kv_scale_pool is None: + raise RuntimeError("trtllm-gen FP4 KV cache requires KV scale pool.") + if has_fp4_kv or params.fp8_context_fmha: q_processed = ( q_processed.view(torch.uint8) - .flatten()[: params.num_tokens * self._num_heads * self._head_dim] + .flatten()[: params.num_tokens * attn.num_heads * attn.head_dim] .view(torch.float8_e4m3fn) - .view(params.num_tokens, self._num_heads, self._head_dim) + .view(params.num_tokens, attn.num_heads, attn.head_dim) ) - gen_bmm1_scale = bmm1_scale if has_fp4_kv else self._bmm1_scale - gen_bmm2_scale = bmm2_scale if has_fp4_kv else 1.0 - - flashinfer.decode.trtllm_batch_decode_with_kv_cache( - query=q_processed, - kv_cache=(kv_pool, kv_pool), - workspace_buffer=fmha_workspace, - block_tables=block_tables, - seq_lens=params.sequence_lengths, - max_seq_len=max_kv_len, - out=params.context_buf, - bmm1_scale=gen_bmm1_scale, - bmm2_scale=gen_bmm2_scale, - window_left=window_left, - kv_layout=self._layout, - sinks=params.forward.attention_sinks, - q_len_per_req=q_len_per_req, - max_q_len=decode_max_q_len, - cum_seq_lens_q=decode_cu_seqlens, - uses_shared_paged_kv_idx=self.USE_SHARED_PAGED_KV_IDX, - kv_cache_sf=kv_cache_sf, - enable_pdl=self._enable_pdl, - backend="trtllm-gen", + gen_bmm1_scale = ( + bmm1_scale if params.fp8_context_fmha and bmm1_scale is not None else bmm1_scale_static + ) + gen_bmm2_scale = bmm2_scale if params.fp8_context_fmha and bmm2_scale is not None else 1.0 + + _trtllm_gen_batch_decode_with_kv_cache( + q_processed, # query + kv_pool, # kv_pool + fmha_workspace, # workspace_buffer + block_tables, # block_tables + params.sequence_lengths, # seq_lens + max_kv_len, # max_seq_len + gen_bmm1_scale, # bmm1_scale + gen_bmm2_scale, # bmm2_scale + window_left, # window_left + params.context_buf, # out + fwd.attention_sinks, # sinks + self._enable_pdl, # enable_pdl + q_len_per_req, # q_len_per_req + decode_max_q_len, # max_q_len + decode_cu_seqlens, # cum_seq_lens_q + kv_scale_pool, # kv_scale_pool + self.USE_SHARED_PAGED_KV_IDX, # uses_shared_paged_kv_idx ) def run_mla_generation( self, - params: EnqueueParams, + params: FmhaParams, ) -> None: """MLA generation decode using flashinfer MLA kernel.""" + attn = params.attn + meta = params.meta + fwd = params.fwd if 0 < params.cyclic_attention_window_size < params.max_past_kv_length: raise NotImplementedError( "Sliding-window attention is not supported by MLA decode path." ) - if self._attention_chunk_size != 0: + if self._get_attention_chunk_size(attn) != 0: raise NotImplementedError("Chunked-attention is not supported by MLA decode path.") - batch_beam = params.num_requests * params.beam_width + batch_beam = params.num_requests * meta.beam_width if params.attention_input is None: raise RuntimeError("MLA generation requires attention_input.") - kv_cache, block_tables, _ = thop.build_trtllm_gen_kv_cache_metadata( - host_kv_cache_pool_pointers=params.host_kv_cache_pool_pointers, - host_kv_cache_pool_mapping=params.host_kv_cache_pool_mapping, - kv_cache_block_offsets=params.kv_cache_block_offsets, - layer_idx=params.layer_idx, - num_kv_heads=self._num_kv_heads, - tokens_per_block=params.tokens_per_block, - head_dim=self._head_dim, - kv_factor=params.kv_factor, - total_num_blocks=params.total_num_blocks, - kv_cache_quant_mode=params.kv_cache_quant_mode, - batch_start=params.seq_offset, - batch_size=batch_beam, - dtype=params.attention_input.dtype, + kv_cache, block_tables = thop.build_trtllm_gen_kv_cache_metadata( + meta.host_kv_cache_pool_pointers, # host_kv_cache_pool_pointers + meta.host_kv_cache_pool_mapping, # host_kv_cache_pool_mapping + meta.kv_cache_block_offsets, # kv_cache_block_offsets + attn.local_layer_idx, # layer_idx + attn.num_kv_heads, # num_kv_heads + params.tokens_per_block, # tokens_per_block + attn.head_dim, # head_dim + params.kv_factor, # kv_factor + params.total_num_blocks, # total_num_blocks + attn.quant_mode, # kv_cache_quant_mode + params.seq_offset, # batch_start + batch_beam, # batch_size + params.attention_input.dtype, # dtype ) pages_per_superblock = 128 // params.tokens_per_block @@ -1236,31 +1292,38 @@ def run_mla_generation( pad = pages_per_superblock - remainder block_tables = torch.nn.functional.pad(block_tables, (0, pad), value=0) - kv_lora_rank = self._kv_lora_rank - qk_nope_head_dim = self._qk_nope_head_dim - qk_rope_head_dim = self._qk_rope_head_dim + kv_lora_rank = attn.kv_lora_rank or 0 + qk_nope_head_dim = attn.qk_nope_head_dim or 0 + qk_rope_head_dim = attn.qk_rope_head_dim or 0 mla_head_dim_qk = kv_lora_rank + qk_rope_head_dim q_len_per_req = params.num_tokens // batch_beam if batch_beam > 0 else 1 - query = params.qkv_input.view(batch_beam, q_len_per_req, self._num_heads, mla_head_dim_qk) + query = params.qkv_input.view(batch_beam, q_len_per_req, attn.num_heads, mla_head_dim_qk) - bmm1_scale = 1.0 / (self._q_scaling * math.sqrt(qk_nope_head_dim + qk_rope_head_dim)) + bmm1_scale = 1.0 / (attn.q_scaling * math.sqrt(qk_nope_head_dim + qk_rope_head_dim)) + workspace_buffer = params.workspace.view(-1, 4) + _clear_multi_ctas_kv_counter_workspace( + workspace_buffer, attn.num_heads, meta.max_num_requests, self._multi_processor_count + ) flashinfer.mla.trtllm_batch_decode_with_kv_cache_mla( - query=query, - kv_cache=kv_cache, - workspace_buffer=params.workspace.view(-1, 4), - qk_nope_head_dim=qk_nope_head_dim, - kv_lora_rank=kv_lora_rank, - qk_rope_head_dim=qk_rope_head_dim, - block_tables=block_tables, - seq_lens=params.sequence_lengths, - max_seq_len=params.max_past_kv_length, - out=params.context_buf.view(batch_beam, q_len_per_req, self._num_heads, kv_lora_rank), - bmm1_scale=bmm1_scale, - bmm2_scale=1.0, - sinks=params.forward.attention_sinks, - uses_shared_paged_kv_idx=self.USE_SHARED_PAGED_KV_IDX, - enable_pdl=self._enable_pdl, - backend="trtllm-gen", + query, # query + kv_cache, # kv_cache + workspace_buffer, # workspace_buffer + qk_nope_head_dim, # qk_nope_head_dim + kv_lora_rank, # kv_lora_rank + qk_rope_head_dim, # qk_rope_head_dim + block_tables, # block_tables + params.sequence_lengths, # seq_lens + params.max_past_kv_length, # max_seq_len + 0, # sparse_mla_top_k + params.context_buf.view(batch_beam, q_len_per_req, attn.num_heads, kv_lora_rank), # out + bmm1_scale, # bmm1_scale + 1.0, # bmm2_scale + fwd.attention_sinks, # sinks + None, # skip_softmax_threshold_scale_factor + self._enable_pdl, # enable_pdl + "trtllm-gen", # backend + True, # is_var_seq + self.USE_SHARED_PAGED_KV_IDX, # uses_shared_paged_kv_idx ) diff --git a/tensorrt_llm/_torch/auto_deploy/compile/backends/torch_cudagraph.py b/tensorrt_llm/_torch/auto_deploy/compile/backends/torch_cudagraph.py index 80226aca6dff..7ca4402a04ba 100644 --- a/tensorrt_llm/_torch/auto_deploy/compile/backends/torch_cudagraph.py +++ b/tensorrt_llm/_torch/auto_deploy/compile/backends/torch_cudagraph.py @@ -45,7 +45,7 @@ def autotune(*args, **kwargs): yield # no-op in standalone mode -from ...utils.cuda_graph import CudaGraphWarmUpPhase +from ...utils.cuda_graph import CudaGraphWarmUpPhase, cuda_graph_state from ...utils.logger import ad_logger from ...utils.multi_stream_utils import disable_multi_stream from ..compiler import CompileBackendRegistry, CompilerBackend, GetArgsKwargsForBatchSize @@ -350,6 +350,11 @@ def refresh_args_static(_bs: int = bs) -> None: def forward(self, *args, **kwargs) -> Any: """Run the compiled graph.""" + # Bypass replay (attn-DP mixed-mode); see BypassCapturedGraphs() in + # tensorrt_llm/_torch/auto_deploy/utils/cuda_graph.py for rationale. + if cuda_graph_state.in_bypass(): + return self.model(*args, **kwargs) + args, kwargs = self._normalize_args_kwargs(args, kwargs) assert self.num_batched_inputs is not None, "Graphs must be captured before replay." @@ -814,6 +819,10 @@ def forward( **kwargs, ) -> Any: """Forward pass: static segments replay graphs, dynamic segments run eagerly.""" + # Bypass replay (attn-DP mixed-mode); see BypassCapturedGraphs() in + # tensorrt_llm/_torch/auto_deploy/utils/cuda_graph.py for rationale. + if cuda_graph_state.in_bypass(): + return self.original_model(*args, **kwargs) if self.split_gm is not None: self._copy_to_static_buffers(kwargs) ADPiecewiseRunner.set_current_num_tokens(num_tokens) @@ -962,6 +971,11 @@ def _narrow(v): def forward(self, *args, **kwargs) -> Any: # NOTE: AD calls model(**named_args) so everything is in kwargs, args is empty + # Bypass replay (attn-DP mixed-mode); see BypassCapturedGraphs() in + # tensorrt_llm/_torch/auto_deploy/utils/cuda_graph.py for rationale. + if cuda_graph_state.in_bypass(): + ADPiecewiseRunner.set_current_num_tokens(None) + return self.piecewise.original_model(*args, **kwargs) if self._is_decode_only(**kwargs): ADPiecewiseRunner.set_current_num_tokens(None) return self.monolithic(*args, **kwargs) diff --git a/tensorrt_llm/_torch/auto_deploy/config/default.yaml b/tensorrt_llm/_torch/auto_deploy/config/default.yaml index 831a9cc1e74e..a58284eaba82 100644 --- a/tensorrt_llm/_torch/auto_deploy/config/default.yaml +++ b/tensorrt_llm/_torch/auto_deploy/config/default.yaml @@ -142,6 +142,10 @@ transforms: stage: sharding run_shape_prop: true allreduce_strategy: NCCL + pipeline_cache: + stage: sharding + enabled: true + root: null ############################################################################################ # MOVE MODEL AND LOAD WEIGHTS ############################################################################################ @@ -191,6 +195,9 @@ transforms: fuse_finegrained_fp8_linear: stage: post_load_fusion backend: trtllm + fuse_mxfp4_moe: + stage: post_load_fusion + expect_mem_change: true # adds padding for trtllm-gen kernel alignment during weight repack fuse_moe: stage: post_load_fusion expect_mem_change: true diff --git a/tensorrt_llm/_torch/auto_deploy/custom_ops/attention/flashinfer_attention.py b/tensorrt_llm/_torch/auto_deploy/custom_ops/attention/flashinfer_attention.py index 39042578f7e2..bacdc3d5ffa7 100644 --- a/tensorrt_llm/_torch/auto_deploy/custom_ops/attention/flashinfer_attention.py +++ b/tensorrt_llm/_torch/auto_deploy/custom_ops/attention/flashinfer_attention.py @@ -40,6 +40,7 @@ def get_env_enable_pdl() -> bool: AttentionDescriptor, AttentionLayout, AttentionRegistry, + AttentionType, BatchInfo, Constant, KVPagedResourceHandler, @@ -605,6 +606,7 @@ def get_cache_initializers( kv_factor=2, kv_layout=_GlobalFlashInferPlanner.kv_layout, sliding_window=sliding_window, + attention_type=AttentionType.mha, ) } diff --git a/tensorrt_llm/_torch/auto_deploy/custom_ops/attention/triton_attention.py b/tensorrt_llm/_torch/auto_deploy/custom_ops/attention/triton_attention.py index 83e4911dea0e..87ab18b8d2c9 100644 --- a/tensorrt_llm/_torch/auto_deploy/custom_ops/attention/triton_attention.py +++ b/tensorrt_llm/_torch/auto_deploy/custom_ops/attention/triton_attention.py @@ -38,6 +38,7 @@ AttentionDescriptor, AttentionLayout, AttentionRegistry, + AttentionType, Constant, KVPagedResourceHandler, MHACallable, @@ -1559,6 +1560,7 @@ def get_cache_initializers( kv_factor=2, kv_layout=KV_LAYOUT, sliding_window=sliding_window, + attention_type=AttentionType.mha, ) } diff --git a/tensorrt_llm/_torch/auto_deploy/custom_ops/attention/trtllm_attention.py b/tensorrt_llm/_torch/auto_deploy/custom_ops/attention/trtllm_attention.py index 0d377657eec8..1d8cda373023 100644 --- a/tensorrt_llm/_torch/auto_deploy/custom_ops/attention/trtllm_attention.py +++ b/tensorrt_llm/_torch/auto_deploy/custom_ops/attention/trtllm_attention.py @@ -45,6 +45,7 @@ AttentionDescriptor, AttentionLayout, AttentionRegistry, + AttentionType, BatchInfo, Constant, KVPagedResourceHandler, @@ -94,7 +95,19 @@ def __init__(self): self.context_lengths_gpu: Optional[torch.Tensor] = None # [max_batch] int32 device # Persistent block_offsets buffer for CUDA graph compatibility. # Pre-allocated to max size so the tensor address is stable across replays. + # ``self.block_offsets`` is the group-0 buffer (kept for the spec-dec + # scratch path and backward compatibility); additional KV window groups + # (VSWA / non-uniform sliding window, e.g. gpt-oss) get their own + # persistent buffer keyed by the group's ``cache_loc`` input pointer in + # ``_block_offsets_by_cache_loc``. The transform invokes + # ``prepare_trtllm_metadata`` once per group with that group's + # ``cache_loc_g{i}`` / ``cu_num_pages_g{i}`` inputs, so without per-group + # buffers the groups would clobber a single shared buffer. self.block_offsets: Optional[torch.Tensor] = None + self._block_offsets_by_cache_loc: dict[int, torch.Tensor] = {} + # Shapes for lazy per-group buffer allocation (set in ``reset``). + self._max_batch: int = 0 + self._max_blocks_per_seq: int = 0 # Per-layer cache for tensors that must survive CUDA graph replay. # Keyed by kv_cache.data_ptr() (stable and unique per layer). self._layer_cache: dict[ @@ -148,9 +161,13 @@ def reset(self, device: torch.device, max_batch: int, max_blocks_per_seq: int) - self.host_request_types = torch.zeros( max_batch, dtype=torch.int32, device="cpu", pin_memory=prefer_pinned() ) + self._max_batch = max_batch + self._max_blocks_per_seq = max_blocks_per_seq self.block_offsets = torch.zeros( 1, max_batch, 2, max_blocks_per_seq, dtype=torch.int32, device=device ) + # Group 0 reuses ``self.block_offsets``; it is registered under its + # ``cache_loc`` pointer on first use in ``_get_block_offsets_buffer``. self.host_past_kv_lengths = torch.zeros( max_batch, dtype=torch.int32, device="cpu", pin_memory=prefer_pinned() ) @@ -290,23 +307,71 @@ def refresh_batch_state(self, batch_info: BatchInfo) -> None: self.num_contexts = num_prefill self.num_ctx_tokens = batch_info.get_num_tokens()[0] + def _get_block_offsets_buffer(self, cache_loc: torch.Tensor) -> torch.Tensor: + """Return the persistent block_offsets buffer for this KV window group. + + Each KV window group is driven by its own ``cache_loc`` input tensor + (group 0 uses ``cache_loc``; groups 1..N-1 use ``cache_loc_g{i}``), which + are persistent buffers with stable ``data_ptr()`` across CUDA-graph + replays. Keying by that pointer (same pattern as ``_layer_cache`` keyed + by ``kv_cache.data_ptr()``) gives each group an independent, address-stable + block_offsets buffer so per-group ``prepare_trtllm_metadata`` invocations + do not clobber each other. + + Lazily allocates a buffer on first sight of a group's ``cache_loc``. This + must happen during warm-up (never mid-capture) so the tensor address is + stable for graph replay; group 0's buffer reuses the one already + allocated in ``reset``. + """ + key = cache_loc.data_ptr() + buf = self._block_offsets_by_cache_loc.get(key) + if buf is None: + assert self.block_offsets is not None, ( + "planner.reset() must run before _get_block_offsets_buffer()" + ) + if not self._block_offsets_by_cache_loc: + # First group seen this run is group 0: reuse the reset() buffer. + buf = self.block_offsets + else: + assert ( + not torch.cuda.is_current_stream_capturing() + ) or cuda_graph_state.in_warm_up(), ( + "block_offsets buffer for a new KV window group must be " + "allocated during warm-up, not during CUDA graph capture. " + "Ensure warm-up exercises every KV pool." + ) + buf = torch.zeros( + 1, + self._max_batch, + 2, + self._max_blocks_per_seq, + dtype=torch.int32, + device=self.block_offsets.device, + ) + self._block_offsets_by_cache_loc[key] = buf + return buf + def plan_device( self, num_seq: int, block_offset_multiplier: int, cu_num_pages: torch.Tensor, cache_loc: torch.Tensor, - ) -> None: + ) -> torch.Tensor: """Per-forward DEVICE metadata: block_offsets via Triton kernel (pure GPU). Called from the ``prepare_trtllm_metadata`` custom op (in the graph). + Returns the per-group block_offsets buffer that was populated, so the op + can flow it through the graph to that group's attention layers. """ - k_slice = self.block_offsets[0, :, 0, :] # [max_batch, M], stride [2*M, 1] + block_offsets = self._get_block_offsets_buffer(cache_loc) + k_slice = block_offsets[0, :, 0, :] # [max_batch, M], stride [2*M, 1] torch.ops.auto_deploy.ragged_to_block_table_triton( cache_loc, cu_num_pages, k_slice, num_seq ) - self.block_offsets[0, :num_seq, 0, :].mul_(block_offset_multiplier) - self.block_offsets[0, :num_seq, 1, :] = self.block_offsets[0, :num_seq, 0, :] + 1 + block_offsets[0, :num_seq, 0, :].mul_(block_offset_multiplier) + block_offsets[0, :num_seq, 1, :] = block_offsets[0, :num_seq, 0, :] + 1 + return block_offsets _GlobalTrtllmPlanner = _TrtllmPlanner() @@ -479,14 +544,16 @@ def prepare_trtllm_metadata( _GlobalTrtllmPlanner.use_spec_decoding = batch_info.get_num_sequences()[2] == 0 block_offset_multiplier = batch_info.get_block_offset_multiplier() - _GlobalTrtllmPlanner.plan_device( + block_offsets = _GlobalTrtllmPlanner.plan_device( num_seq=batch_info.get_total_num_sequences(), block_offset_multiplier=block_offset_multiplier, cu_num_pages=cu_num_pages, cache_loc=cache_loc, ) - return [_GlobalTrtllmPlanner.block_offsets] + # Return this group's buffer (keyed by ``cache_loc``) so multi-pool + # (VSWA) deployments flow the correct block_offsets to each group's layers. + return [block_offsets] @prepare_trtllm_metadata.register_fake @@ -569,9 +636,13 @@ def trtllm_mha_with_cache( batch_info = BatchInfo(batch_info_host) num_seq = batch_info.get_total_num_sequences() num_tokens = batch_info.get_total_num_tokens() + max_seq_len = batch_info.get_max_seq_len() max_context_length = batch_info.get_max_context_length() max_num_requests = batch_info.get_max_batch_size() - # Use sliding_window for attention_window_size if provided, else full context length + # Use sliding_window for attention_window_size if provided, else full context length. + # The mask stays ``causal`` (matching the PyTorch backend, which never uses + # sliding_window_causal): the kernel honors the window via the cyclic + # attention-window handling driven by ``attention_window_size``. attention_window_size = ( sliding_window if isinstance(sliding_window, int) and sliding_window > 0 @@ -679,6 +750,7 @@ def trtllm_mha_with_cache( tokens_per_block, # tokens_per_block max_num_requests, # max_num_requests max_context_length, # max_context_length + max_seq_len, # max_seq_len attention_window_size, # attention_window_size 1, # beam_width int(AttentionMaskType.causal), # mask_type @@ -800,6 +872,13 @@ class TrtllmAttention(AttentionDescriptor): Follows the same stateless descriptor pattern as ``FlashInferAttention``. """ + @classmethod + def kernel_handles_cyclic_swa(cls) -> bool: + """thop.attention applies the sliding-window mask internally via cyclic + KV indexing, so the executor passes the full per-window block table and + global KV lengths (no host-side window slicing). See base class.""" + return True + @classmethod def get_attention_layout(cls) -> AttentionLayout: """Get the attention layout expected by the backend.""" @@ -870,6 +949,7 @@ def get_cache_initializers( kv_factor=2, kv_layout="HND", sliding_window=sliding_window, + attention_type=AttentionType.mha, ) } diff --git a/tensorrt_llm/_torch/auto_deploy/custom_ops/attention_interface.py b/tensorrt_llm/_torch/auto_deploy/custom_ops/attention_interface.py index cf907ee08e39..e789a23236ea 100644 --- a/tensorrt_llm/_torch/auto_deploy/custom_ops/attention_interface.py +++ b/tensorrt_llm/_torch/auto_deploy/custom_ops/attention_interface.py @@ -26,6 +26,7 @@ import math from abc import ABC, abstractmethod +from enum import Enum from typing import Dict, List, Literal, Optional, Protocol, Sequence, Set, Tuple, Type, Union import numpy as np @@ -40,6 +41,12 @@ Constant = Union[int, float, str, None] + +class AttentionType(Enum): + mha = "mha" + mla = "mla" + + # Torch dtype → numpy dtype for fast list-to-tensor conversion. # numpy's list→array conversion is ~2-3x faster than torch.tensor(list) for large lists. _TORCH_TO_NUMPY_DTYPE: Dict[torch.dtype, np.dtype] = { @@ -295,7 +302,7 @@ def copy_to_device(self) -> None: trunc_h_buf = self._trunc_host_bufs[name][:copy_bytes] trunc_d_buf.copy_(trunc_h_buf, non_blocking=True) - def copy_to_host(self) -> None: + def copy_to_host(self, non_blocking: bool = False) -> None: """Copy from device buffer to host buffer. Mirrors ``copy_to_device``: uses the current length of the truncatable tensor @@ -306,7 +313,7 @@ def copy_to_host(self) -> None: if self._total_bytes > 0: h_buffer = self._host_buffer[: self._total_bytes] d_buffer = self._device_buffer[: self._total_bytes] - h_buffer.copy_(d_buffer, non_blocking=True) + h_buffer.copy_(d_buffer, non_blocking=non_blocking) # Copy each truncatable tensor independently, truncated to current length for name in self._truncatable_names: @@ -316,7 +323,7 @@ def copy_to_host(self) -> None: copy_bytes = length * dtype.itemsize trunc_d_buf = self._trunc_device_bufs[name][:copy_bytes] trunc_h_buf = self._trunc_host_bufs[name][:copy_bytes] - trunc_h_buf.copy_(trunc_d_buf, non_blocking=True) + trunc_h_buf.copy_(trunc_d_buf, non_blocking=non_blocking) def resize(self, name: str, new_capacity: int) -> None: """Resize a truncatable tensor's capacity. @@ -402,7 +409,7 @@ class BatchInfo: Args: batch_info_host: The batch info tensor on the host. - The information is stored in a 14-element batch_info_host tensor as follows: + The information is stored in a 15-element batch_info_host tensor as follows: Slots 0-5 (batch composition): - [0] num_prefill: number of prefill requests @@ -428,10 +435,17 @@ class BatchInfo: Slot 13 (replay mode flag, set once at runtime init): - [13] use_replay: 1 if SSM replay state-update path is active, 0 otherwise + Slot 14 (DP-aware token info, updated per forward when attention-DP is on): + - [14] max_dp_num_tokens: max(total_num_tokens) across all DP ranks for this + forward step. Equals local total_num_tokens when attention-DP is off. + Used by MoE all-to-all to size dispatch padding without over-padding to the + static config max_num_tokens. Mirrors base TRT-LLM's + ``runtime_max_tokens_per_rank`` from ``model_engine._get_all_rank_num_tokens``. + All fields can be accessed and updated with the convenience functions below. """ - _NUM_ELEMENTS = 14 + _NUM_ELEMENTS = 15 def __init__(self, batch_info_host: Optional[torch.Tensor] = None): if batch_info_host is None: @@ -519,6 +533,9 @@ def get_max_seq_info(self) -> Tuple[int, int, int, int]: def get_max_context_length(self) -> int: return int(self._batch_info[6]) + def get_max_seq_len(self) -> int: + return self.get_max_context_length() + def get_max_blocks_per_seq(self) -> int: return int(self._batch_info[7]) @@ -564,6 +581,21 @@ def update_use_replay(self, use_replay: bool) -> None: def is_use_replay(self) -> bool: return bool(self._batch_info[13]) + # --- DP-aware token info (slot 14) writer --- + + def update_max_dp_num_tokens(self, max_dp_num_tokens: int) -> None: + """Set the max-across-DP-ranks total token count for this forward. + + When attention-DP is off, callers should write the local total_num_tokens + so consumers can read this slot uniformly without checking attn-DP state. + """ + self._batch_info[14] = max_dp_num_tokens + + # --- DP-aware token info (slot 14) reader --- + + def get_max_dp_num_tokens(self) -> int: + return int(self._batch_info[14]) + class SequenceInfo: """An interface to hold information about how the sequence is laid out and stored in cache. @@ -607,7 +639,8 @@ class SequenceInfo: ### BATCH INFO OBJECT ######################################################################## - batch_info_host: a single host tensor managed by the ``BatchInfo`` class. It consolidates - batch composition, max sequence info, and tokens gather info into one 12-element int tensor. + batch composition, max sequence info, tokens gather info, spec-dec info, and DP-aware + token info into one 14-element int tensor. See the ``BatchInfo`` docstring for the full layout. Custom ops receive this tensor as a graph input and should wrap it via ``BatchInfo(batch_info_host)`` to extract fields. @@ -680,6 +713,8 @@ def __init__( # will store num_blocks later... self._num_blocks = None + self.attention_type: Optional[AttentionType] = None + # TODO (lucaslie): can we remove this eventually from this i/f? self.vocab_size_padded = vocab_size_padded @@ -1175,6 +1210,27 @@ def _is_required(self, name: str, check_both: bool = True) -> bool: """ return self._is_active(name, check_both) or self._is_active_host_prep(name, check_both) + def _active_host_update_args( + self, arg_names: Set[str], active_args_override: Optional[Set[str]] = None + ) -> List[str]: + """Return host args that need mirroring after an in-graph metadata update. + + ``active_args_override`` lets a caller narrow host mirroring to the graph inputs the next + consumer actually reads. It is treated as a filter: only active host args whose names appear + in the override are mirrored. The override may contain names that are not active graph args + (e.g. a submodule's full placeholder set, which also includes inter-module tensors such as + ``inputs_embeds``/``hidden_states``); such entries are simply ignored. The caller is + responsible for including every host argument the next consumer may read. + """ + needs_d2h_sync = [ + k + self._host_suffix + for k in arg_names + if self._is_active(k + self._host_suffix, check_both=False) + ] + if active_args_override is None: + return needs_d2h_sync + return [arg_name for arg_name in needs_d2h_sync if arg_name in active_args_override] + def _stage_arg( self, name: str, @@ -1325,6 +1381,10 @@ def nest_sequences( num_prefill_tokens = int(sl_host.sum()) - num_decode batch_info = [num_prefill, num_prefill_tokens, 0, 0, num_decode, num_decode] self.batch_info.update(batch_info) + # Default slot 14 (max_dp_num_tokens) to local total tokens; the executor + # overrides this with the cross-rank max via update_max_dp_num_tokens() + # when attention-DP is enabled. + self.batch_info.update_max_dp_num_tokens(self.batch_info.get_total_num_tokens()) # check for updated input_pos (i.e. cache start position) if isinstance(input_pos, int): @@ -1583,11 +1643,16 @@ def run_host_prepare_for_attention_forward(self) -> None: host_function(**{arg: self.get_arg(arg) for arg in args}) @nvtx_range("ad_offset_pos_and_cache_") - def offset_pos_and_cache_(self, offset: torch.Tensor) -> None: + def offset_pos_and_cache_( + self, offset: torch.Tensor, active_args_override: Optional[Set[str]] = None + ) -> None: """Offset position and cache-related metadata for active arguments. Args: offset: 1D tensor [batch_size] with per-sequence position offsets. + active_args_override: Optional graph-input names for the next in-forward consumer. When + provided, host mirroring is limited to those active host args. The caller is + responsible for including every host argument the next consumer may read. """ # check if we need a d2h sync _REQUIRES_UPDATE = { @@ -1599,11 +1664,7 @@ def offset_pos_and_cache_(self, offset: torch.Tensor) -> None: "seq_len_with_cache", "use_initial_states", } - needs_d2h_sync = [ - k + self._host_suffix - for k in _REQUIRES_UPDATE - if self._is_active(k + self._host_suffix, check_both=False) - ] + needs_d2h_sync = self._active_host_update_args(_REQUIRES_UPDATE, active_args_override) sync_to_host = any(needs_d2h_sync) if sync_to_host: ad_logger.debug(f"d2h sync required in offset_pos_and_cache_ for {needs_d2h_sync}") @@ -1694,7 +1755,7 @@ def offset_pos_and_cache_(self, offset: torch.Tensor) -> None: # TODO: May need to dissect what fields are needed in the forward pass to reduce # data movement. if sync_to_host: - self._input_buffer.copy_to_host() + self._input_buffer.copy_to_host(non_blocking=False) @nvtx_range("ad_offset_with_new_lens_") def offset_with_new_lens_(self, new_lens_ungathered: torch.Tensor) -> None: @@ -1718,13 +1779,18 @@ def offset_with_new_lens_(self, new_lens_ungathered: torch.Tensor) -> None: self.offset_pos_and_cache_(increment) @nvtx_range("ad_switch_to_generate_") - def switch_to_generate_(self) -> None: + def switch_to_generate_(self, active_args_override: Optional[Set[str]] = None) -> None: """Switch all sequences metadata to generate (decode) mode. Transitions the batch from any layout (prefill/extend/decode or mixed) to an all-decode layout where each sequence has exactly 1 token. We assume that we just take the last position of each sequence for the metadata. + Args: + active_args_override: Optional graph-input names for the next in-forward consumer. When + provided, host mirroring is limited to those active host args. The caller is + responsible for including every host argument the next consumer may read. + NOTE: update device tensors first and mirror back to host only when an updated host-side argument is active. @@ -1747,6 +1813,9 @@ def switch_to_generate_(self) -> None: # update batch_info self.batch_info.update([0, 0, 0, 0, num_seq, num_seq]) self.batch_info.update_tokens_gather_info(num_seq, False) + # Default slot 14 (max_dp_num_tokens) to local total tokens; the executor + # overrides this when attention-DP is on. + self.batch_info.update_max_dp_num_tokens(num_seq) # check if we need a d2h sync _REQUIRES_UPDATE = { @@ -1757,11 +1826,7 @@ def switch_to_generate_(self) -> None: "position_ids", "use_initial_states", } - needs_d2h_sync = [ - k + self._host_suffix - for k in _REQUIRES_UPDATE - if self._is_active(k + self._host_suffix, check_both=False) - ] + needs_d2h_sync = self._active_host_update_args(_REQUIRES_UPDATE, active_args_override) sync_to_host = any(needs_d2h_sync) # --- input_ids (device) --- @@ -1790,7 +1855,7 @@ def switch_to_generate_(self) -> None: # TODO: May need to dissect what fields are needed in the forward pass to reduce # data movement. if sync_to_host: - self._input_buffer.copy_to_host() + self._input_buffer.copy_to_host(non_blocking=False) def copy_(self, name: str, src: torch.Tensor, strict: bool = True) -> None: """Copy a tensor into the buffer. USE WITH CAUTION! @@ -1851,6 +1916,20 @@ def allocate(self, sequence_info: SequenceInfo) -> torch.Tensor: """Initialize the resource for the given sequence info.""" +class EphemeralResourceHandler(ResourceHandler): + """Resources that are produced and consumed within one forward pass. + + Examples include MTP/Eagle hidden-state resources, which are regenerated every + step and not needed across steps. + + Used for judging whether resources can be safely dropped when transferring from one node + to another, e.g. for disagg. Ephemeral resources can be safely dropped if the transfer + happens between forward passes. + + TODO: May need to revisit this notion for intra-forward resource transfers. + """ + + class KVPagedResourceHandler(ResourceHandler): """Handler for paged KV cache resources. @@ -1870,6 +1949,7 @@ class KVPagedResourceHandler(ResourceHandler): kv_layout: Memory layout for the KV cache. Either "HND" (head-num-dim) or "NHD" (num-head-dim). Default is "HND" which is the standard layout for flashinfer. + attention_type: Attention layout semantics for this cache resource, e.g. ``AttentionType.mha``. sliding_window: Sliding window size for this layer. ``0`` means full attention; a positive value puts this layer in its own VSWA group. """ @@ -1884,6 +1964,7 @@ def __init__( num_kv_heads: int, head_dim: int, dtype: torch.dtype, + attention_type: AttentionType, kv_factor: int = 2, kv_layout: Literal["HND", "NHD"] = "HND", sliding_window: int = 0, @@ -1896,6 +1977,7 @@ def __init__( dtype: The dtype of the KV cache. kv_factor: The factor of the KV cache. Default is 2. kv_layout: Memory layout - "HND" or "NHD". Default is "HND". + attention_type: Attention layout semantics for this cache resource, e.g. ``AttentionType.mha``. sliding_window: Sliding window size for this layer. 0 means full attention. """ self.num_kv_heads = num_kv_heads @@ -1904,6 +1986,9 @@ def __init__( self.kv_factor = kv_factor assert kv_factor in [1, 2], f"Invalid kv_factor: {kv_factor}" self.kv_layout = kv_layout + if not isinstance(attention_type, AttentionType): + raise TypeError(f"attention_type must be AttentionType, got {attention_type!r}") + self.attention_type = attention_type self.sliding_window = ( sliding_window if isinstance(sliding_window, int) and sliding_window > 0 else 0 ) @@ -1923,6 +2008,7 @@ def __eq__(self, other: Optional[ResourceHandler]) -> bool: and self.dtype == other.dtype and self.kv_factor == other.kv_factor and self.kv_layout == other.kv_layout + and self.attention_type == other.attention_type and self.sliding_window == other.sliding_window ) @@ -2006,6 +2092,10 @@ def __eq__(self, other: Optional[ResourceHandler]) -> bool: return self.state_shape == other.state_shape and self.dtype == other.dtype +class SpeculativeOnly: + """Trait mixin marking a resource that is only needed when speculative decoding is enabled.""" + + class SSMResourceHandler(StateResourceHandler): """Handler for SSM state resources that maps directly to MambaCacheManager's ssm_states buffer. @@ -2073,7 +2163,7 @@ def state_shape(self) -> Tuple[int, int]: return (self.conv_dim, self.d_conv - 1) -class SpecSSMResourceHandler(StateResourceHandler): +class IntermediateSSMStateHandler(SpeculativeOnly, StateResourceHandler): """Intermediate SSM state cache descriptor for speculative decoding. Acts as a type marker conveying the per-layer SSM shape to the cache interface. @@ -2081,8 +2171,8 @@ class SpecSSMResourceHandler(StateResourceHandler): by the MambaHybridCacheManager using spec_config, not by this handler. Inherits from StateResourceHandler (not SSMResourceHandler) so that - isinstance(h, SSMResourceHandler) returns False for spec handlers, eliminating - the need for exclusion guards throughout the codebase. + isinstance(h, SSMResourceHandler) returns False for intermediate handlers, eliminating + the need for exclusion guards throughout the codebase. Mixes in SpeculativeOnly. """ def __init__( @@ -2102,8 +2192,10 @@ def state_shape(self) -> Tuple[int, int, int]: return (self.num_heads, self.head_dim, self.d_state) @classmethod - def from_base(cls, base: Optional["SSMResourceHandler"]) -> Optional["SpecSSMResourceHandler"]: - """Create a spec handler from a base SSM handler, or return None.""" + def from_base( + cls, base: Optional["SSMResourceHandler"] + ) -> Optional["IntermediateSSMStateHandler"]: + """Create an intermediate handler from a base SSM handler, or return None.""" if base is None: return None return cls( @@ -2111,7 +2203,7 @@ def from_base(cls, base: Optional["SSMResourceHandler"]) -> Optional["SpecSSMRes ) -class ReplayOldXHandler(StateResourceHandler): +class ReplayOldXHandler(SpeculativeOnly, StateResourceHandler): """Per-layer old_x cache for the replay SSM kernel (single-buffered, bf16). Shape: (max_batch, T, num_heads, head_dim) — T is determined by the manager's @@ -2140,7 +2232,7 @@ def __eq__(self, other) -> bool: ) -class ReplayOldBHandler(StateResourceHandler): +class ReplayOldBHandler(SpeculativeOnly, StateResourceHandler): """Per-layer old_B cache for the replay SSM kernel (double-buffered, bf16). Shape: (max_batch, 2, T, n_groups, d_state) — T from manager. @@ -2168,7 +2260,7 @@ def __eq__(self, other) -> bool: ) -class ReplayOldDtHandler(StateResourceHandler): +class ReplayOldDtHandler(SpeculativeOnly, StateResourceHandler): """Per-layer old_dt cache for the replay SSM kernel (double-buffered, fp32). Shape: (max_batch, 2, num_heads, T) — T from manager. @@ -2190,7 +2282,7 @@ def __eq__(self, other) -> bool: return isinstance(other, ReplayOldDtHandler) and self.num_heads == other.num_heads -class ReplayOldDAcumsumHandler(StateResourceHandler): +class ReplayOldDAcumsumHandler(SpeculativeOnly, StateResourceHandler): """Per-layer old_dA_cumsum cache for the replay SSM kernel (double-buffered, fp32). Shape: (max_batch, 2, num_heads, T) — T from manager. @@ -2212,7 +2304,7 @@ def __eq__(self, other) -> bool: return isinstance(other, ReplayOldDAcumsumHandler) and self.num_heads == other.num_heads -class ReplayCacheBufIdxHandler(StateResourceHandler): +class ReplayCacheBufIdxHandler(SpeculativeOnly, StateResourceHandler): """Global cache_buf_idx tensor for the replay SSM kernel (shared across all layers, int32). Shape: (max_batch,). Routes to MambaHybridCacheManager.get_replay_cache_buf_idx(). @@ -2234,7 +2326,7 @@ def __eq__(self, other) -> bool: return isinstance(other, ReplayCacheBufIdxHandler) -class ReplayPrevNumAcceptedHandler(StateResourceHandler): +class ReplayPrevNumAcceptedHandler(SpeculativeOnly, StateResourceHandler): """Global prev_num_accepted_tokens tensor for the replay SSM kernel (int32, shared). Shape: (max_batch,). Routes to MambaHybridCacheManager.get_replay_prev_num_accepted_tokens(). @@ -2254,7 +2346,7 @@ def __eq__(self, other) -> bool: return isinstance(other, ReplayPrevNumAcceptedHandler) -class SpecCausalConvResourceHandler(StateResourceHandler): +class IntermediateConvStateHandler(SpeculativeOnly, StateResourceHandler): """Intermediate conv state cache descriptor for speculative decoding. Acts as a type marker conveying the per-layer conv shape to the cache interface. @@ -2262,7 +2354,8 @@ class SpecCausalConvResourceHandler(StateResourceHandler): by the MambaHybridCacheManager using spec_config, not by this handler. Inherits from StateResourceHandler (not CausalConvResourceHandler) so that - isinstance(h, CausalConvResourceHandler) returns False for spec handlers. + isinstance(h, CausalConvResourceHandler) returns False for intermediate handlers. Mixes in + SpeculativeOnly. """ def __init__( @@ -2282,8 +2375,8 @@ def state_shape(self) -> Tuple[int, int]: @classmethod def from_base( cls, base: Optional["CausalConvResourceHandler"] - ) -> Optional["SpecCausalConvResourceHandler"]: - """Create a spec handler from a base conv handler, or return None.""" + ) -> Optional["IntermediateConvStateHandler"]: + """Create an intermediate handler from a base conv handler, or return None.""" if base is None: return None return cls(conv_dim=base.conv_dim, d_conv=base.d_conv, dtype=base.dtype) @@ -2389,6 +2482,22 @@ def supports_shared_kv(cls) -> bool: """Whether this backend supports shared-KV cache aliasing.""" return False + @classmethod + def kernel_handles_cyclic_swa(cls) -> bool: + """Whether the backend's kernel applies the sliding-window mask itself. + + When ``True`` (e.g. the trtllm ``thop.attention`` kernel), the kernel + cyclically indexes the KV cache internally using the per-layer attention + window, so the executor must hand it the *full* per-window block table + and a *global* (un-window-capped) KV length -- the same contract as the + PyTorch backend. + + When ``False`` (default; e.g. triton / flashinfer), the kernel does not + cyclic-index, so the executor must host-slice the block table down to the + live sliding-window view (see ``ad_executor._compute_window_local_view``). + """ + return False + @classmethod @abstractmethod def get_standard_metadata_args(cls) -> List[str]: diff --git a/tensorrt_llm/_torch/auto_deploy/custom_ops/fused_moe/prepare_trtllm_gen_moe_mxfp4_weights.py b/tensorrt_llm/_torch/auto_deploy/custom_ops/fused_moe/prepare_trtllm_gen_moe_mxfp4_weights.py new file mode 100644 index 000000000000..cc1f75e9d863 --- /dev/null +++ b/tensorrt_llm/_torch/auto_deploy/custom_ops/fused_moe/prepare_trtllm_gen_moe_mxfp4_weights.py @@ -0,0 +1,648 @@ +# SPDX-FileCopyrightText: Copyright (c) 2025-2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. +# SPDX-License-Identifier: Apache-2.0 +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +"""MXFP4 weight prep for TRT-LLM-Gen ``bf16_mxe2m1_block_scale_moe_runner``. + +Transforms HF on-disk MXFP4 expert tensors (``gate_up_proj_*``, ``down_proj_*`` registered by +``quantize_mxfp4_moe``) into the kernel-ready stacked layout that +``auto_deploy::trtllm_quant_mxfp4_trtllm_gen_moe_fused`` expects: ``[E_local, 2I_pad, H_pad/2]`` weights, +``[E_local, 2I_pad]`` fp32 biases, etc., all run through ``torch.ops.trtllm.shuffle_matrix`` for +the TMA layout. + +Mirrors PT's ``MXFP4WeightTRTLLMGenFusedMoEMethod`` +(``tensorrt_llm/_torch/modules/fused_moe/quantization.py:4135``) — PT helpers +(``maybe_pad_for_mxfp4``, ``trtllmgen_maybe_get_cached_*``, ``_get_weight_alignment``) are imported +directly so the algorithm is byte-identical. +""" + +from dataclasses import dataclass +from typing import Dict, Tuple + +import torch + +from tensorrt_llm._torch.modules.fused_moe.quantization import ( + _get_weight_alignment, + maybe_pad_for_mxfp4, + trtllmgen_maybe_get_cached_w2_permute_indices, + trtllmgen_maybe_get_cached_w3_w1_permute_indices, +) +from tensorrt_llm.math_utils import pad_up + +# Cache permute indices to avoid recomputation across calls. +# Keyed by (shape, role, num_elts_per_sf) inside the PT helpers. +_PERMUTE_CACHE: Dict = {} + +# MXFP4 block size (UE8M0 scale per 32 elements). Matches HF gpt-oss layout. +_MXFP4_SCALING_VECTOR_SIZE: int = 32 + +# Kernel layout constants (mirror PT's MXFP4WeightTRTLLMGenFusedMoEMethod). +_INPUT_HIDDEN_ALIGNMENT: int = 512 +_WEIGHT_ALIGNMENT: int = 128 +_EPILOGUE_TILE_M: int = 128 + + +def _compute_padded_dims(per_rank_i: int, hidden_size: int) -> Tuple[int, int, int]: + """Returns ``(i_pad, h_w1_pad, h_w2_pad)`` for the trtllm-gen layout. + + ``i_pad`` / ``h_w2_pad`` align to 128 (TMA weight alignment); + ``h_w1_pad`` aligns to 512 (TMA input-hidden constraint on w1's K-axis). + """ + return ( + pad_up(per_rank_i, _WEIGHT_ALIGNMENT), + pad_up(hidden_size, _INPUT_HIDDEN_ALIGNMENT), + pad_up(hidden_size, _WEIGHT_ALIGNMENT), + ) + + +@dataclass(frozen=True) +class TRTLLMGenMXFP4MoEWeights: + """Output of :func:`prepare_trtllm_gen_moe_mxfp4_weights`.""" + + fc1_weights_mxfp4: torch.Tensor # [E, 2I_pad, H_pad/2] uint8 (shuffled) + fc1_weights_scale_ue8m0: torch.Tensor # [E, 2I_pad, H_pad/32] uint8 (shuffled) + fc1_bias_f32: torch.Tensor # [E, 2I_pad] float32 + fc2_weights_mxfp4: torch.Tensor # [E, H_pad, I_pad/2] uint8 (shuffled) + fc2_weights_scale_ue8m0: torch.Tensor # [E, H_pad, I_pad/32] uint8 (shuffled) + fc2_bias_f32: torch.Tensor # [E, H_pad] float32 (already /tp_size) + valid_hidden_size: int # original H + valid_intermediate_size: int # per-rank intermediate size (lean shape) + intermediate_size_padded: int # I_pad (per-rank, after pad) + hidden_size_padded: int # H_pad + + +@dataclass +class MXFP4PrepScratch: + """Reusable GPU scratch buffers for ``prepare_trtllm_gen_moe_mxfp4_weights``. + + Allocated once per build pass via :meth:`allocate` (sized for ONE MoE layer's per-rank shape — + gpt-oss guarantees H/I/E are constant across layers) and reused on every layer to avoid + per-layer pad/shuffle transients. ``trtllm.shuffle_matrix`` is not in-place, so we keep + separate ``_pad_buf`` (post-pad, pre-shuffle) and no-suffix (post-shuffle, kernel-ready) + buffers per tensor kind. + + Caller MUST ``copy_`` the prep result into final storage before the next call — the dataclass + holds VIEWS of these buffers and the next call overwrites them. The intended use is + :class:`FuseMXFP4Moe`: pre-allocate all layers' destination ``nn.Parameter`` storage first, + then per-layer prep + ``copy_`` from scratch. + """ + + # Shuffle outputs (= kernel-ready layout; what the prepared nn.Parameter + # will hold). + fc1_w_buf: torch.Tensor # [E_local, 2I_pad, H_w1_pad/2] uint8 + fc1_s_buf: torch.Tensor # [E_local, 2I_pad, H_w1_pad/32] uint8 + fc1_b_buf: torch.Tensor # [E_local, 2I_pad] fp32 + fc2_w_buf: torch.Tensor # [E_local, H_w2_pad, I_pad/2] uint8 + fc2_s_buf: torch.Tensor # [E_local, H_w2_pad, I_pad/32] uint8 + fc2_b_buf: torch.Tensor # [E_local, H_w2_pad] fp32 + + # Pad outputs (post pad, pre shuffle). Same shape as the corresponding + # shuffle output above. + fc1_w_pad_buf: torch.Tensor + fc1_s_pad_buf: torch.Tensor + fc1_b_pad_buf: torch.Tensor + fc2_w_pad_buf: torch.Tensor + fc2_s_pad_buf: torch.Tensor + fc2_b_pad_buf: torch.Tensor + + # Cached layout dimensions (for shape validation on subsequent calls). + e_local: int + hidden_size: int + per_rank_i: int + i_pad: int + h_w1_pad: int + h_w2_pad: int + + @classmethod + def allocate( + cls, + *, + e_local: int, + per_rank_i: int, + hidden_size: int, + device: torch.device | str, + ) -> "MXFP4PrepScratch": + """Allocate scratch for one MoE layer at the given per-rank shape. + + ``per_rank_i`` is the already-TP-sliced intermediate dim (= full ``I`` + when ``tp_size == 1``). + """ + i_pad, h_w1_pad, h_w2_pad = _compute_padded_dims(per_rank_i, hidden_size) + u8 = dict(dtype=torch.uint8, device=device) + f32 = dict(dtype=torch.float32, device=device) + return cls( + fc1_w_buf=torch.empty(e_local, 2 * i_pad, h_w1_pad // 2, **u8), + fc1_s_buf=torch.empty(e_local, 2 * i_pad, h_w1_pad // _MXFP4_SCALING_VECTOR_SIZE, **u8), + fc1_b_buf=torch.empty(e_local, 2 * i_pad, **f32), + fc2_w_buf=torch.empty(e_local, h_w2_pad, i_pad // 2, **u8), + fc2_s_buf=torch.empty(e_local, h_w2_pad, i_pad // _MXFP4_SCALING_VECTOR_SIZE, **u8), + fc2_b_buf=torch.empty(e_local, h_w2_pad, **f32), + fc1_w_pad_buf=torch.empty(e_local, 2 * i_pad, h_w1_pad // 2, **u8), + fc1_s_pad_buf=torch.empty( + e_local, 2 * i_pad, h_w1_pad // _MXFP4_SCALING_VECTOR_SIZE, **u8 + ), + fc1_b_pad_buf=torch.empty(e_local, 2 * i_pad, **f32), + fc2_w_pad_buf=torch.empty(e_local, h_w2_pad, i_pad // 2, **u8), + fc2_s_pad_buf=torch.empty(e_local, h_w2_pad, i_pad // _MXFP4_SCALING_VECTOR_SIZE, **u8), + fc2_b_pad_buf=torch.empty(e_local, h_w2_pad, **f32), + e_local=e_local, + hidden_size=hidden_size, + per_rank_i=per_rank_i, + i_pad=i_pad, + h_w1_pad=h_w1_pad, + h_w2_pad=h_w2_pad, + ) + + +def _flatten_block_dim(blocks_4d: torch.Tensor) -> torch.Tensor: + """Collapse ``[..., n_blocks, 16]`` -> ``[..., n_blocks * 16]`` (= H/2 or I/2).""" + if blocks_4d.dim() == 3: + return blocks_4d + if blocks_4d.dim() == 4: + return blocks_4d.reshape(*blocks_4d.shape[:-2], -1) + raise ValueError(f"Unexpected MXFP4 weight rank {blocks_4d.dim()}; expected 3 or 4.") + + +def _pad_per_expert_2d( + weight_3d: torch.Tensor, # [E, R, C] + col_alignment: int, + row_alignment: int, + *, + out: torch.Tensor | None = None, +) -> torch.Tensor: + """Pad each expert's 2-D matrix to the given row/col alignment. + + ``out=None``: build a fresh stacked tensor (one alloc). + ``out=...``: write each expert's padded matrix into ``out[i]`` in-place + so caller-provided storage (e.g. a scratch slice) is filled directly. + """ + e = weight_3d.size(0) + padded_per_expert = ( + maybe_pad_for_mxfp4(weight_3d[i], col_alignment, row_alignment) for i in range(e) + ) + if out is None: + return torch.stack(list(padded_per_expert), dim=0).contiguous() + assert out.shape[0] == e, f"out leading dim {out.shape[0]} != e {e}" + for i, padded in enumerate(padded_per_expert): + out[i].copy_(padded) + return out + + +def _shuffle_per_expert( + stacked: torch.Tensor, + permute_fn, + *, + num_elts_per_sf: int | None = None, + is_scale: bool = False, + out: torch.Tensor | None = None, +) -> torch.Tensor: + """Batched TMA-layout shuffle on a stacked ``[E, M, ...]`` tensor (weights, scales, biases). + + Derives the row permute ONCE on expert 0 (gpt-oss guarantees same per-expert shape, and + ``_PERMUTE_CACHE`` is keyed by shape so the per-expert loop would return the same index + every iteration anyway), then applies it to the whole stack via ``torch.index_select`` on + the M axis (= dim=1). When ``is_scale``, chains ``block_scale_interleave`` for the kernel's + scale layout. + + Biases use the SAME row permute as their weights so ``bias[i]`` aligns with + ``weight_row[i]`` post-shuffle — mismatch → kernel epilogue adds the wrong bias and MoE + output is garbage. + + ``out=None`` returns a fresh tensor; otherwise the result is ``copy_``-ed into the + caller-provided storage (used by :class:`MXFP4PrepScratch` to avoid per-layer transients). + """ + # Derive permute once on expert 0 — equivalent to per-expert calls because + # _PERMUTE_CACHE keys on shape and all experts share shape. + perm = permute_fn( + stacked[0], _PERMUTE_CACHE, _EPILOGUE_TILE_M, num_elts_per_sf=num_elts_per_sf + ).to(stacked.device) + + shuffled = torch.index_select(stacked, 1, perm) + if is_scale: + shuffled = torch.ops.trtllm.block_scale_interleave(shuffled).reshape(stacked.shape) + shuffled = shuffled.view(stacked.dtype) + + if out is None: + return shuffled.contiguous() + assert out.shape[0] == stacked.size(0) + out.copy_(shuffled) + return out + + +def _deinterleave_gate_up( + gu_3d: torch.Tensor, # [E, 2I, H/2] + gate_up_scales: torch.Tensor, # [E, 2I, H/32] + gate_up_bias: torch.Tensor, # [E, 2I] +) -> Tuple[torch.Tensor, torch.Tensor, torch.Tensor, torch.Tensor, torch.Tensor, torch.Tensor]: + """Split the HF interleaved 2I axis (gate at even rows, up at odd rows) into separate halves. + + Kept separate so downstream row-padding puts the zero-pad rows INSIDE each half before re-concat + as ``[up | gate]`` — matches PT's ``dst_w3 = up`` / ``dst_w1 = gate`` chunk layout. + """ + return ( + gu_3d[:, 0::2, :].contiguous(), # gate_rows_w + gu_3d[:, 1::2, :].contiguous(), # up_rows_w + gate_up_scales[:, 0::2, :].contiguous(), # gate_rows_s + gate_up_scales[:, 1::2, :].contiguous(), # up_rows_s + gate_up_bias[:, 0::2].contiguous(), # gate_b + gate_up_bias[:, 1::2].contiguous(), # up_b + ) + + +def _pad_and_slice_axis(t: torch.Tensor, dim: int, target: int, lo: int, hi: int) -> torch.Tensor: + """Pad ``t`` on ``dim`` to ``target`` then slice ``[lo:hi]`` on that dim.""" + cur = t.shape[dim] + if cur < target: + pad_amount = target - cur + # F.pad spec is reversed-axis order; build dynamically. + pad_spec = [0, 0] * (t.dim() - dim - 1) + [0, pad_amount] + [0, 0] * dim + t = torch.nn.functional.pad(t, pad_spec) + idx = [slice(None)] * t.dim() + idx[dim] = slice(lo, hi) + return t[tuple(idx)].contiguous() + + +def _tp_slice_intermediate_axis( + gate_rows_w: torch.Tensor, + up_rows_w: torch.Tensor, + gate_rows_s: torch.Tensor, + up_rows_s: torch.Tensor, + gate_b: torch.Tensor, + up_b: torch.Tensor, + dn_3d: torch.Tensor, + down_scales: torch.Tensor, + intermediate_size: int, + tp_size: int, + tp_rank: int, +): + """Pre-pad ``I`` to ``i_padded_tp`` then slice this rank's range (mirrors PT + ``quantization.py:4211-4234``). + + The alignment guarantees ``i_padded_tp / tp_size`` stays 128-aligned and that scaling-factor + blocks (32 elements) don't straddle rank boundaries. Example: gpt-oss I=2880 @ tp=8 → + ``alignment_tp=3072`` → ``per_rank_i=384``. + + No-op when ``tp_size == 1``: returns inputs unchanged with + ``per_rank_i = valid_intermediate = intermediate_size``. + + Returns the (possibly sliced) tensors plus ``(per_rank_i, valid_intermediate)``. + """ + if tp_size == 1: + return ( + gate_rows_w, + up_rows_w, + gate_rows_s, + up_rows_s, + gate_b, + up_b, + dn_3d, + down_scales, + intermediate_size, + intermediate_size, + ) + + alignment_tp = _get_weight_alignment( + _WEIGHT_ALIGNMENT, _MXFP4_SCALING_VECTOR_SIZE, tp_size, intermediate_size + ) + i_padded_tp = ((intermediate_size + alignment_tp - 1) // alignment_tp) * alignment_tp + per_rank_i = i_padded_tp // tp_size + slice_start = tp_rank * per_rank_i + slice_stop = (tp_rank + 1) * per_rank_i + valid_intermediate = max(0, min(intermediate_size, slice_stop) - slice_start) + + # Pad I axis (rows) of gate / up to i_padded_tp, then slice this rank's chunk. + def shard(t: torch.Tensor, dim: int, target: int, lo: int, hi: int) -> torch.Tensor: + return _pad_and_slice_axis(t, dim, target, lo, hi) + + sf_padded = i_padded_tp // _MXFP4_SCALING_VECTOR_SIZE + sf_start = slice_start // _MXFP4_SCALING_VECTOR_SIZE + sf_stop = slice_stop // _MXFP4_SCALING_VECTOR_SIZE + return ( + shard(gate_rows_w, 1, i_padded_tp, slice_start, slice_stop), + shard(up_rows_w, 1, i_padded_tp, slice_start, slice_stop), + shard(gate_rows_s, 1, i_padded_tp, slice_start, slice_stop), + shard(up_rows_s, 1, i_padded_tp, slice_start, slice_stop), + shard(gate_b, 1, i_padded_tp, slice_start, slice_stop), + shard(up_b, 1, i_padded_tp, slice_start, slice_stop), + shard(dn_3d, 2, i_padded_tp // 2, slice_start // 2, slice_stop // 2), + shard(down_scales, 2, sf_padded, sf_start, sf_stop), + per_rank_i, + valid_intermediate, + ) + + +def _pad_concat_fc1( + up_rows: torch.Tensor, + gate_rows: torch.Tensor, + col_alignment: int, + intermediate_size_pad: int, + *, + scratch_buf: torch.Tensor | None = None, +) -> torch.Tensor: + """Pad each half [E, I, X] then concat as ``[up | gate]`` on the 2I axis. + + Used for both weights (col_alignment = ``hidden_w1_pad // 2``) and scales + (col_alignment = ``hidden_w1_pad // _MXFP4_SCALING_VECTOR_SIZE``). When + ``scratch_buf`` is provided, the two halves are written directly into + ``scratch_buf[:, :i_pad]`` and ``scratch_buf[:, i_pad:]`` — no per-half + tensors or final concat alloc. + """ + if scratch_buf is None: + up_p = _pad_per_expert_2d(up_rows, col_alignment, intermediate_size_pad) + gate_p = _pad_per_expert_2d(gate_rows, col_alignment, intermediate_size_pad) + return torch.cat([up_p, gate_p], dim=1).contiguous() + i_pad = intermediate_size_pad + _pad_per_expert_2d(up_rows, col_alignment, intermediate_size_pad, out=scratch_buf[:, :i_pad, :]) + _pad_per_expert_2d( + gate_rows, col_alignment, intermediate_size_pad, out=scratch_buf[:, i_pad:, :] + ) + return scratch_buf + + +def _pad_fc2( + t: torch.Tensor, + col_alignment: int, + row_alignment: int, + *, + scratch_buf: torch.Tensor | None = None, +) -> torch.Tensor: + """Per-expert pad on the [E, H, X] down tensor. No concat (single half).""" + if scratch_buf is None: + return _pad_per_expert_2d(t, col_alignment, row_alignment) + _pad_per_expert_2d(t, col_alignment, row_alignment, out=scratch_buf) + return scratch_buf + + +def _shuffle_weights_and_scales( + gu_padded: torch.Tensor, + dn_padded: torch.Tensor, + gu_scale_padded: torch.Tensor, + dn_scale_padded: torch.Tensor, + *, + scratch: "MXFP4PrepScratch | None" = None, +) -> Tuple[torch.Tensor, torch.Tensor, torch.Tensor, torch.Tensor]: + """Apply per-expert TMA-layout shuffle to weights + scales for both GEMMs.""" + w3w1 = trtllmgen_maybe_get_cached_w3_w1_permute_indices + w2 = trtllmgen_maybe_get_cached_w2_permute_indices + fc1_w_out = scratch.fc1_w_buf if scratch is not None else None + fc1_s_out = scratch.fc1_s_buf if scratch is not None else None + fc2_w_out = scratch.fc2_w_buf if scratch is not None else None + fc2_s_out = scratch.fc2_s_buf if scratch is not None else None + fc1_w = _shuffle_per_expert(gu_padded, w3w1, out=fc1_w_out) + fc1_s = _shuffle_per_expert( + gu_scale_padded, + w3w1, + num_elts_per_sf=_MXFP4_SCALING_VECTOR_SIZE, + is_scale=True, + out=fc1_s_out, + ) + fc2_w = _shuffle_per_expert(dn_padded, w2, out=fc2_w_out) + fc2_s = _shuffle_per_expert( + dn_scale_padded, + w2, + num_elts_per_sf=_MXFP4_SCALING_VECTOR_SIZE, + is_scale=True, + out=fc2_s_out, + ) + return fc1_w, fc1_s, fc2_w, fc2_s + + +def _prepare_fc1_bias( + up_b: torch.Tensor, + gate_b: torch.Tensor, + intermediate_size_pad: int, + *, + scratch_pad_buf: torch.Tensor | None = None, + scratch_out_buf: torch.Tensor | None = None, +) -> torch.Tensor: + """Pad each half [E, I] → [E, I_pad] (fp32), concat ``[up | gate]``, shuffle. + + The TMA-layout row shuffle on the bias is critical: PT applies the SAME + permute to bias rows as to weight rows so ``bias[i]`` aligns with + ``weight_row[i]`` after the shuffle. Skipping it → kernel's epilogue adds + the wrong bias to each output row → MoE output garbage (~2% GSM8K). + """ + if scratch_pad_buf is None: + up_p = ( + _pad_per_expert_2d(up_b.unsqueeze(-1), 1, intermediate_size_pad) + .squeeze(-1) + .float() + .contiguous() + ) + gate_p = ( + _pad_per_expert_2d(gate_b.unsqueeze(-1), 1, intermediate_size_pad) + .squeeze(-1) + .float() + .contiguous() + ) + fc1_bias_padded = torch.cat([up_p, gate_p], dim=1).contiguous() + else: + # ``_pad_per_expert_2d`` writes through ``copy_``; the scratch fp32 + # buffer absorbs bf16-padded values via copy_'s implicit cast. + i_pad = intermediate_size_pad + _pad_per_expert_2d( + up_b.unsqueeze(-1), + 1, + intermediate_size_pad, + out=scratch_pad_buf[:, :i_pad].unsqueeze(-1), + ) + _pad_per_expert_2d( + gate_b.unsqueeze(-1), + 1, + intermediate_size_pad, + out=scratch_pad_buf[:, i_pad:].unsqueeze(-1), + ) + fc1_bias_padded = scratch_pad_buf + return _shuffle_per_expert( + fc1_bias_padded, trtllmgen_maybe_get_cached_w3_w1_permute_indices, out=scratch_out_buf + ) + + +def _prepare_fc2_bias( + down_bias: torch.Tensor, + hidden_w2_pad: int, + tp_size: int, + *, + scratch_pad_buf: torch.Tensor | None = None, + scratch_out_buf: torch.Tensor | None = None, +) -> torch.Tensor: + """Pad ``[E, H] → [E, H_pad]`` (fp32), divide by ``tp_size``, shuffle. + + Scratch path enforces ``tp_size == 1`` upstream (TP slicing happens in + the load hook before this helper is reached), so no division is applied + when using scratch. + """ + if scratch_pad_buf is None: + fc2_b = ( + _pad_per_expert_2d(down_bias.unsqueeze(-1), 1, hidden_w2_pad) + .squeeze(-1) + .float() + .contiguous() + ) + if tp_size > 1: + fc2_b = fc2_b / tp_size + else: + _pad_per_expert_2d( + down_bias.unsqueeze(-1), + 1, + hidden_w2_pad, + out=scratch_pad_buf.unsqueeze(-1), + ) + fc2_b = scratch_pad_buf + return _shuffle_per_expert( + fc2_b, trtllmgen_maybe_get_cached_w2_permute_indices, out=scratch_out_buf + ) + + +def prepare_trtllm_gen_moe_mxfp4_weights( + gate_up_blocks: torch.Tensor, # [E, 2I, H/32, 16] or [E, 2I, H/2] uint8 + gate_up_scales: torch.Tensor, # [E, 2I, H/32] uint8 + gate_up_bias: torch.Tensor, # [E, 2I] bf16 + down_blocks: torch.Tensor, # [E, H, I/32, 16] or [E, H, I/2] uint8 + down_scales: torch.Tensor, # [E, H, I/32] uint8 + down_bias: torch.Tensor, # [E, H] bf16 + *, + hidden_size: int, + intermediate_size: int, + tp_size: int = 1, + tp_rank: int = 0, + scratch: MXFP4PrepScratch | None = None, +) -> TRTLLMGenMXFP4MoEWeights: + """Convert HF on-disk MXFP4 expert weights to the trtllm-gen kernel layout. + + Mirrors PT's ``MXFP4WeightTRTLLMGenFusedMoEMethod`` (``post_load_weights`` + + ``load_expert_w{3_w1,2}_weight{,_scale_mxfp4}``). + + Notes on optional args: + * ``tp_size > 1``: shard the intermediate dim before the kernel-layout pad+shuffle — see + :func:`_tp_slice_intermediate_axis` for the TP-aware pre-pad + slice math (mirrors PT + ``load_weight_shard``). + * ``scratch != None``: pad/shuffle outputs are written into the pre-allocated GPU buffers and + the returned dataclass holds VIEWS into that scratch, so caller must ``copy_`` results out + before the next call. Only supported at ``tp_size == 1`` (load hook does TP slicing first + — see :class:`MXFP4PrepScratch`). + + EP (expert-axis slicing) is NOT done here — the caller selects the expert subset before + invoking. + """ + if scratch is not None and tp_size != 1: + # Scratch path assumes inputs are already TP-sliced (load hook does + # that). Combining scratch with tp_size > 1 would double-slice. + raise ValueError( + "prepare_trtllm_gen_moe_mxfp4_weights: scratch is only supported with " + f"tp_size=1 (got tp_size={tp_size}). The caller is expected to do " + "TP slicing before this helper when using scratch." + ) + if tp_rank < 0 or tp_rank >= tp_size: + raise ValueError(f"tp_rank {tp_rank} out of range for tp_size {tp_size}") + + assert down_blocks.size(0) == gate_up_blocks.size(0) + + # 1. Flatten blocks ([..., 16] → flattened) and de-interleave gate/up halves. + gu_3d = _flatten_block_dim(gate_up_blocks) # [E, 2I, H/2] + dn_3d = _flatten_block_dim(down_blocks) # [E, H, I/2] + gate_rows_w, up_rows_w, gate_rows_s, up_rows_s, gate_b, up_b = _deinterleave_gate_up( + gu_3d, gate_up_scales, gate_up_bias + ) + + # 2. TP slicing on the intermediate axis (no-op for tp_size == 1). + ( + gate_rows_w, + up_rows_w, + gate_rows_s, + up_rows_s, + gate_b, + up_b, + dn_3d, + down_scales, + intermediate_size_for_local, + valid_intermediate, + ) = _tp_slice_intermediate_axis( + gate_rows_w, + up_rows_w, + gate_rows_s, + up_rows_s, + gate_b, + up_b, + dn_3d, + down_scales, + intermediate_size, + tp_size, + tp_rank, + ) + + # 3. Per-rank padded layout dims (mirrors PT + # ``MXFP4WeightTRTLLMGenFusedMoEMethod``: per-expert I + H padded + # BEFORE 2I row dim, so w1.2I = 2*I_pad — see ``_compute_padded_dims``). + intermediate_size_pad, hidden_w1_pad, hidden_w2_pad = _compute_padded_dims( + intermediate_size_for_local, hidden_size + ) + + # 4. Pad weights + scales (concat [up | gate] for fc1; single half for fc2). + sv = _MXFP4_SCALING_VECTOR_SIZE + gu_padded = _pad_concat_fc1( + up_rows_w, + gate_rows_w, + hidden_w1_pad // 2, + intermediate_size_pad, + scratch_buf=scratch.fc1_w_pad_buf if scratch is not None else None, + ) + dn_padded = _pad_fc2( + dn_3d, + intermediate_size_pad // 2, + hidden_w2_pad, + scratch_buf=scratch.fc2_w_pad_buf if scratch is not None else None, + ) + gu_scale_padded = _pad_concat_fc1( + up_rows_s, + gate_rows_s, + hidden_w1_pad // sv, + intermediate_size_pad, + scratch_buf=scratch.fc1_s_pad_buf if scratch is not None else None, + ) + dn_scale_padded = _pad_fc2( + down_scales, + intermediate_size_pad // sv, + hidden_w2_pad, + scratch_buf=scratch.fc2_s_pad_buf if scratch is not None else None, + ) + + # 5. Per-expert TMA-layout shuffle (weights + scales). + fc1_weights, fc1_weights_scale, fc2_weights, fc2_weights_scale = _shuffle_weights_and_scales( + gu_padded, dn_padded, gu_scale_padded, dn_scale_padded, scratch=scratch + ) + + # 6. Pad + shuffle biases (fp32, w2 bias divided by tp_size at tp>1). + fc1_bias_padded = _prepare_fc1_bias( + up_b, + gate_b, + intermediate_size_pad, + scratch_pad_buf=scratch.fc1_b_pad_buf if scratch is not None else None, + scratch_out_buf=scratch.fc1_b_buf if scratch is not None else None, + ) + fc2_bias_padded = _prepare_fc2_bias( + down_bias, + hidden_w2_pad, + tp_size, + scratch_pad_buf=scratch.fc2_b_pad_buf if scratch is not None else None, + scratch_out_buf=scratch.fc2_b_buf if scratch is not None else None, + ) + + intermediate_size_padded = fc1_weights.shape[1] // 2 # 2I_pad / 2 = I_pad + hidden_size_padded = fc1_weights.shape[-1] * 2 # (H_pad/2) * 2 = H_pad + return TRTLLMGenMXFP4MoEWeights( + fc1_weights_mxfp4=fc1_weights, + fc1_weights_scale_ue8m0=fc1_weights_scale, + fc1_bias_f32=fc1_bias_padded, + fc2_weights_mxfp4=fc2_weights, + fc2_weights_scale_ue8m0=fc2_weights_scale, + fc2_bias_f32=fc2_bias_padded, + valid_hidden_size=hidden_size, + valid_intermediate_size=valid_intermediate, + intermediate_size_padded=intermediate_size_padded, + hidden_size_padded=hidden_size_padded, + ) diff --git a/tensorrt_llm/_torch/auto_deploy/custom_ops/fused_moe/torch_moe.py b/tensorrt_llm/_torch/auto_deploy/custom_ops/fused_moe/torch_moe.py index a94863fab303..bf648f0a0526 100644 --- a/tensorrt_llm/_torch/auto_deploy/custom_ops/fused_moe/torch_moe.py +++ b/tensorrt_llm/_torch/auto_deploy/custom_ops/fused_moe/torch_moe.py @@ -14,7 +14,7 @@ # limitations under the License. from functools import partial -from typing import Callable, List +from typing import Callable, List, Optional import torch import torch.nn.functional as F @@ -287,6 +287,7 @@ def torch_moe( max_num_tokens: int = 0, apply_routing_on_input: bool = False, layer_type: str = "moe", + batch_info_host: Optional[torch.Tensor] = None, ) -> torch.Tensor: """ Unified Mixture-of-Experts (MoE) operator that uses a Mixtral-style dispatch @@ -364,6 +365,7 @@ def torch_moe_fake( max_num_tokens: int = 0, apply_routing_on_input: bool = False, layer_type: str = "moe", + batch_info_host: Optional[torch.Tensor] = None, ) -> torch.Tensor: return torch.empty_like(x) @@ -454,6 +456,7 @@ def torch_quant_fp8_moe( max_num_tokens: int = 0, apply_routing_on_input: bool = False, layer_type: str = "moe", + batch_info_host: Optional[torch.Tensor] = None, ) -> torch.Tensor: """ FP8 MoE op using quantized linear operations. Computes a Mixture-of-Experts layer similar to the reference @@ -574,6 +577,7 @@ def torch_quant_fp8_moe_fake( max_num_tokens: int = 0, apply_routing_on_input: bool = False, layer_type: str = "moe", + batch_info_host: Optional[torch.Tensor] = None, ) -> torch.Tensor: return torch.empty_like(x) @@ -601,6 +605,7 @@ def torch_quant_nvfp4_moe( max_num_tokens: int = 0, apply_routing_on_input: bool = False, layer_type: str = "moe", + batch_info_host: Optional[torch.Tensor] = None, ) -> torch.Tensor: """ FP4 MoE op using quantized linear operations. @@ -737,6 +742,7 @@ def torch_quant_nvfp4_moe_fake( max_num_tokens: int = 0, apply_routing_on_input: bool = False, layer_type: str = "moe", + batch_info_host: Optional[torch.Tensor] = None, ) -> torch.Tensor: return torch.empty_like(x) @@ -808,6 +814,7 @@ def torch_quant_finegrained_fp8_moe( max_num_tokens: int = 0, apply_routing_on_input: bool = False, layer_type: str = "moe", + batch_info_host: Optional[torch.Tensor] = None, ) -> torch.Tensor: """ FineGrainedFP8 MoE op using block-wise FP8 quantized linear operations. @@ -922,5 +929,6 @@ def torch_quant_finegrained_fp8_moe_fake( max_num_tokens: int = 0, apply_routing_on_input: bool = False, layer_type: str = "moe", + batch_info_host: Optional[torch.Tensor] = None, ) -> torch.Tensor: return torch.empty_like(x) diff --git a/tensorrt_llm/_torch/auto_deploy/custom_ops/fused_moe/trtllm_moe.py b/tensorrt_llm/_torch/auto_deploy/custom_ops/fused_moe/trtllm_moe.py index 41c4d0abbd03..6e10bf5d1230 100644 --- a/tensorrt_llm/_torch/auto_deploy/custom_ops/fused_moe/trtllm_moe.py +++ b/tensorrt_llm/_torch/auto_deploy/custom_ops/fused_moe/trtllm_moe.py @@ -13,7 +13,7 @@ # See the License for the specific language governing permissions and # limitations under the License. -from typing import List, Tuple +from typing import List, Optional, Tuple import torch @@ -39,6 +39,116 @@ def _get_cached_f32_scale(scale: torch.Tensor) -> torch.Tensor: return f32 +# ============================================================================= +# Module-level cache for MoeAlltoAll state +# ============================================================================= +# +# Custom ops are stateless functions, but `MoeAlltoAll` is fundamentally +# stateful: base TensorRT-LLM constructs it once per fused-MoE module and +# reuses `self.moe_a2a` across forward steps. Auto-deploy previously +# re-instantiated it on every layer call and re-parsed the serialized +# `DistConfig` JSON, paying that overhead per-layer per-step. +# +# This module-level cache mirrors the `_GlobalTrtllmPlanner` pattern in +# `trtllm_attention.py` (and `_GlobalFlashInferPlanner` in +# `flashinfer_attention.py`): a Python-level singleton that lives across +# custom-op invocations, lazily constructed on first use, keyed by +# parameters that determine workspace identity. The class-level +# `MoeAlltoAll._WORKSPACE` already deduplicates the GPU workspace and the +# C++ `moe_a2a_initialize` call across instances; this cache additionally +# eliminates the redundant Python ctor and JSON deserialization. + + +class _MoeAll2AllCache: + """Per-process singleton cache for `MoeAlltoAll` instances and parsed `DistConfig` mappings. + + A separate cache instance lives in each MPI worker process — there is no + cross-rank shared state here (that lives in `MoeAlltoAll._WORKSPACE`, which is + initialized via the C++ `moe_a2a_initialize` collective). Within a rank, all + fused-MoE layers share this cache so the Python `MoeAlltoAll` ctor and + `DistConfig` JSON deserialization run at most once per (workspace) configuration + per process, regardless of how many MoE-DP layers the model has. + + Note: EPLB (Expert Parallelism Load Balancing — `MoeAlltoAll(num_experts=…)` + selects an EPLB-aware codepath) is not used by auto-deploy today; + `eplb_num_experts` is always `None` from the call sites. The cache still keys + on it explicitly so the helper composes correctly if EPLB is wired later. + """ + + def __init__(self) -> None: + self._all2all: dict[tuple, MoeAlltoAll] = {} + self._mapping: dict[str, Tuple[Optional[Mapping], bool]] = {} + + def get_mapping(self, mapping_config: str) -> Tuple[Optional[Mapping], bool]: + """Return cached `(Mapping, enable_alltoall)` parsed from `mapping_config`. + + All-to-all is used when attention-DP is enabled and experts are sharded + (EP > 1). The returned `mapping` is `None` when `mapping_config` is empty. + + Note: `max_num_tokens` is a per-call argument and is therefore not part + of the cache key. Callers must validate it themselves (see `_check_moe_alltoall`). + """ + cached = self._mapping.get(mapping_config) + if cached is not None: + return cached + if not mapping_config: + cached = (None, False) + else: + dc = DistConfig.deserialize(mapping_config) + mapping = dc.to_mapping() + enable = dc.enable_attention_dp and dc.moe_ep_size > 1 + cached = (mapping, enable) + self._mapping[mapping_config] = cached + return cached + + def get_alltoall( + self, + mapping: Mapping, + max_num_tokens: int, + top_k: int, + num_slots: int, + hidden_size: int, + dtype: torch.dtype, + eplb_num_experts: Optional[int] = None, + ) -> MoeAlltoAll: + """Return a `MoeAlltoAll` instance, constructing on first use. + + Keyed on the tuple of ctor parameters that determine workspace identity. + In practice `MoeAlltoAll._WORKSPACE` is process-wide and only one + configuration is valid per process, but a tuple key keeps semantics + correct if the runner ever changes shapes between calls. + """ + workspace_size = MoeAlltoAll.calculate_required_workspace_size( + mapping.moe_ep_size, top_k, max_num_tokens, hidden_size, dtype, eplb_num_experts + ) + key = ( + mapping.moe_ep_size, + mapping.moe_ep_rank, + top_k, + num_slots, + max_num_tokens, + workspace_size, + eplb_num_experts, + ) + inst = self._all2all.get(key) + if inst is None: + inst = MoeAlltoAll( + mapping=mapping, + max_num_tokens=max_num_tokens, + top_k=top_k, + num_slots=num_slots, + workspace_size_per_rank=workspace_size, + num_experts=eplb_num_experts, + ) + self._all2all[key] = inst + return inst + + +# Per-process singleton: instantiated once at module import; each MPI rank +# has its own instance because each rank is a separate Python process. +_GlobalMoeAll2AllCache = _MoeAll2AllCache() + + def _check_moe_alltoall(mapping_config: str, max_num_tokens: int) -> Tuple[Mapping | None, bool]: """Check if MoE all-to-all mode should be used and validate parameters. @@ -47,11 +157,7 @@ def _check_moe_alltoall(mapping_config: str, max_num_tokens: int) -> Tuple[Mappi Returns: (mapping, enable_alltoall) — mapping is None when mapping_config is empty. """ - if not mapping_config: - return None, False - dc = DistConfig.deserialize(mapping_config) - mapping = dc.to_mapping() - enable_alltoall = dc.enable_attention_dp and dc.moe_ep_size > 1 + mapping, enable_alltoall = _GlobalMoeAll2AllCache.get_mapping(mapping_config) if enable_alltoall and max_num_tokens <= 0: raise ValueError("max_num_tokens must be > 0 when enable_alltoall is True") return mapping, enable_alltoall @@ -74,6 +180,7 @@ def _run_moe_with_alltoall( use_deepseek_fp8_block_scale: bool = False, finegrained_fp8_block_scales: Tuple[torch.Tensor, torch.Tensor] | None = None, is_gated_mlp: bool = True, + batch_info_host: torch.Tensor | None = None, ) -> torch.Tensor: """ Execute MoE with all-to-all dispatch/combine pattern. @@ -117,6 +224,11 @@ def _run_moe_with_alltoall( ``use_deepseek_fp8_block_scale`` internally. is_gated_mlp: Whether gated MLP is used. Needed by the Blackwell finegrained FP8 path to compute ``intermediate_size``. + batch_info_host: Pinned-host int tensor managed by ``BatchInfo``. When + provided, slot 14 (``max_dp_num_tokens``) is read at capture time as + ``runtime_max_tokens_per_rank`` (the cross-rank max of + ``total_num_tokens``, computed pre-forward by the AD shim via + ``tp_allgather``). When ``None``, falls back to ``max_num_tokens``. Returns: 2-D output tensor ``(num_tokens, hidden_size)`` — the caller reshapes to the @@ -129,28 +241,32 @@ def _run_moe_with_alltoall( local_num_experts = fc1_expert_weights.shape[0] global_num_experts = local_num_experts * mapping.moe_ep_size + # runtime_max_tokens_per_rank: max(total_num_tokens) across DP ranks. + # Mirrors base TRT-LLM's `runtime_max_tokens_per_rank = max(all_rank_num_tokens)` + # in fused_moe_cutlass.py / fused_moe_trtllm_gen.py. AD's shim writes slot 14 + # pre-forward via `tp_allgather` of `total_num_tokens` (when attention-DP is on); + # nest_sequences seeds slot 14 with the local total as a safe default. See + # ``BatchInfo`` in attention_interface.py for the full slot layout. + if batch_info_host is not None: + runtime_max_tokens_per_rank = int(batch_info_host[14].item()) + if runtime_max_tokens_per_rank <= 0: + runtime_max_tokens_per_rank = max_num_tokens + else: + runtime_max_tokens_per_rank = max_num_tokens + # Workspace must be sized for the LARGEST element type used by dispatch or combine. # The input x may be quantized (fp8/fp4), but combine outputs in the model dtype # (bf16/fp16). We always pass the model dtype so the combine buffer is large enough. - workspace_size = MoeAlltoAll.calculate_required_workspace_size( - mapping.moe_ep_size, top_k, max_num_tokens, hidden_size, output_dtype - ) - - # We need runtime_max_tokens_per_rank = max(tokens across all EP ranks). - # An NCCL all_reduce cannot run inside CUDA-graph capture, so we conservatively - # use max_num_tokens (the config-level upper bound) as an over-approximation. - # This causes the dispatch to allocate larger recv buffers (padded with invalid - # tokens that are skipped by the kernel), trading memory for correctness. - runtime_max_tokens_per_rank = max_num_tokens - - # Build MoeAlltoAll (num_slots = num_experts without EPLB load balancing) - moe_a2a = MoeAlltoAll( + # The instance is cached across calls (see `_MoeAll2AllCache`), so the Python ctor and + # workspace-size computation happen once per (workspace) configuration per process. + moe_a2a = _GlobalMoeAll2AllCache.get_alltoall( mapping=mapping, max_num_tokens=max_num_tokens, top_k=top_k, - num_slots=global_num_experts, # No EPLB: num_slots == num_experts - workspace_size_per_rank=workspace_size, - num_experts=None, # None = EPLB disabled + num_slots=global_num_experts, + hidden_size=hidden_size, + dtype=output_dtype, + eplb_num_experts=None, ) invalid_expert_id = global_num_experts @@ -299,6 +415,7 @@ def _run_trtllm_gen_nvfp4_moe_with_alltoall( mapping: Mapping, max_num_tokens: int, act_type: int, + batch_info_host: torch.Tensor | None = None, ) -> torch.Tensor: """Run TRTLLM-Gen NVFP4 MoE through the all-to-all dispatch/combine path.""" @@ -306,18 +423,22 @@ def _run_trtllm_gen_nvfp4_moe_with_alltoall( hidden_size = x.shape[-1] local_num_experts = int(fc1_expert_weights_fp4.shape[0]) global_num_experts = local_num_experts * mapping.moe_ep_size - workspace_size = MoeAlltoAll.calculate_required_workspace_size( - mapping.moe_ep_size, top_k, max_num_tokens, hidden_size, x.dtype - ) - runtime_max_tokens_per_rank = max_num_tokens + # See _run_moe_with_alltoall above for the slot-14 contract. + if batch_info_host is not None: + runtime_max_tokens_per_rank = int(batch_info_host[14].item()) + if runtime_max_tokens_per_rank <= 0: + runtime_max_tokens_per_rank = max_num_tokens + else: + runtime_max_tokens_per_rank = max_num_tokens - moe_a2a = MoeAlltoAll( + moe_a2a = _GlobalMoeAll2AllCache.get_alltoall( mapping=mapping, max_num_tokens=max_num_tokens, top_k=top_k, num_slots=global_num_experts, - workspace_size_per_rank=workspace_size, - num_experts=None, + hidden_size=hidden_size, + dtype=x.dtype, + eplb_num_experts=None, ) invalid_expert_id = global_num_experts @@ -400,6 +521,7 @@ def trtllm_moe_fused( mapping_config: str = "", max_num_tokens: int = 0, apply_routing_on_input: bool = False, + batch_info_host: torch.Tensor | None = None, ) -> torch.Tensor: x_shape = x.shape x = x.view(-1, x_shape[-1]) @@ -445,6 +567,7 @@ def trtllm_moe_fused( activation_type=activation_type, mapping=mapping, max_num_tokens=max_num_tokens, + batch_info_host=batch_info_host, ).view(x_shape) # EP WITH ALL-REDUCE PATH: Expert IDs are in LOCAL coordinates (from sharding.py), @@ -475,6 +598,7 @@ def trtllm_moe_fused_fake( mapping_config: str = "", max_num_tokens: int = 0, apply_routing_on_input: bool = False, + batch_info_host: torch.Tensor | None = None, ) -> torch.Tensor: return torch.empty_like(x) @@ -514,6 +638,7 @@ def trtllm_quant_fp8_moe_fused( mapping_config: str = "", max_num_tokens: int = 0, apply_routing_on_input: bool = False, + batch_info_host: torch.Tensor | None = None, ) -> torch.Tensor: """TensorRT-LLM Cutlass FP8 (W8A8) MoE for gated and non-gated MLP. @@ -591,6 +716,7 @@ def trtllm_quant_fp8_moe_fused( activation_type=act_fn, mapping=mapping, max_num_tokens=max_num_tokens, + batch_info_host=batch_info_host, ).view(x_shape) # EP WITH ALL-REDUCE PATH: Expert IDs are in LOCAL coordinates. @@ -628,6 +754,7 @@ def trtllm_quant_fp8_moe_fused_fake( mapping_config: str = "", max_num_tokens: int = 0, apply_routing_on_input: bool = False, + batch_info_host: torch.Tensor | None = None, ) -> torch.Tensor: _validate_mlp_style_and_act_fn(is_gated_mlp, act_fn) return torch.empty_like(x) @@ -651,6 +778,7 @@ def trtllm_quant_nvfp4_moe_fused( mapping_config: str = "", max_num_tokens: int = 0, apply_routing_on_input: bool = False, + batch_info_host: torch.Tensor | None = None, ) -> torch.Tensor: """TensorRT-LLM Cutlass NVFP4 W8A8 MoE for gated and non-gated MLP. @@ -720,6 +848,7 @@ def trtllm_quant_nvfp4_moe_fused( mapping=mapping, max_num_tokens=max_num_tokens, nvfp4_act_global_scale=fc1_act_global_scale, + batch_info_host=batch_info_host, ).view(x.shape) # EP WITH ALL-REDUCE PATH: Expert IDs are in LOCAL coordinates. @@ -766,6 +895,7 @@ def trtllm_quant_nvfp4_moe_fused_fake( mapping_config: str = "", max_num_tokens: int = 0, apply_routing_on_input: bool = False, + batch_info_host: torch.Tensor | None = None, ) -> torch.Tensor: return torch.empty_like(x) @@ -784,6 +914,7 @@ def trtllm_quant_finegrained_fp8_moe_fused( mapping_config: str = "", max_num_tokens: int = 0, apply_routing_on_input: bool = False, + batch_info_host: torch.Tensor | None = None, ) -> torch.Tensor: """TensorRT-LLM Cutlass FP8 Block Scale MoE for FineGrainedFP8 format. @@ -846,6 +977,7 @@ def trtllm_quant_finegrained_fp8_moe_fused( max_num_tokens=max_num_tokens, finegrained_fp8_block_scales=(fc1_weight_scale, fc2_weight_scale), is_gated_mlp=is_gated_mlp, + batch_info_host=batch_info_host, ).view(x_shape) # EP WITH ALL-REDUCE PATH: Expert IDs are in LOCAL coordinates (from sharding.py), @@ -932,6 +1064,7 @@ def trtllm_quant_finegrained_fp8_moe_fused_fake( mapping_config: str = "", max_num_tokens: int = 0, apply_routing_on_input: bool = False, + batch_info_host: torch.Tensor | None = None, ) -> torch.Tensor: _validate_mlp_style_and_act_fn(is_gated_mlp, act_fn) return torch.empty_like(x) @@ -960,6 +1093,7 @@ def _trtllm_nvfp4_trtllm_gen_moe_impl( mapping_config: str = "", max_num_tokens: int = 0, apply_routing_on_input: bool = False, + batch_info_host: torch.Tensor | None = None, ) -> torch.Tensor: _validate_mlp_style_and_act_fn(is_gated_mlp, act_fn) if act_fn in (ActivationType.Gelu, ActivationType.Geglu): @@ -1036,6 +1170,7 @@ def _trtllm_nvfp4_trtllm_gen_moe_impl( mapping=mapping, max_num_tokens=max_num_tokens, act_type=act_type, + batch_info_host=batch_info_host, ) if final_hidden_states.shape[1] > x_shape[-1]: final_hidden_states = final_hidden_states[:, : x_shape[-1]].contiguous() @@ -1108,6 +1243,7 @@ def trtllm_nvfp4_trtllm_gen_moe_fused( mapping_config: str = "", max_num_tokens: int = 0, apply_routing_on_input: bool = False, + batch_info_host: torch.Tensor | None = None, ) -> torch.Tensor: return _trtllm_nvfp4_trtllm_gen_moe_impl( x, @@ -1132,6 +1268,7 @@ def trtllm_nvfp4_trtllm_gen_moe_fused( mapping_config=mapping_config, max_num_tokens=max_num_tokens, apply_routing_on_input=apply_routing_on_input, + batch_info_host=batch_info_host, ) @@ -1159,5 +1296,217 @@ def trtllm_nvfp4_trtllm_gen_moe_fused_fake( mapping_config: str = "", max_num_tokens: int = 0, apply_routing_on_input: bool = False, + batch_info_host: torch.Tensor | None = None, ) -> torch.Tensor: return torch.empty_like(x) + + +# ============================================================================= +# MXFP4 weights on TRT-LLM-Gen (W4A16 bf16-act or W4A8 mxfp8-act) +# ============================================================================= +# +# Same kernel path PT exercises for `gpt-oss-120b` on B200: +# * W4A16 (`act_dtype="bf16"`): `bf16_mxe2m1_block_scale_moe_runner` — +# PT mirror in fused_moe_trtllm_gen.py:652-712 (W4A16MXFP4TRTLLMGenFusedMoEMethod). +# * W4A8 (`act_dtype="mxfp8"`): `mxfp8_quantize` + `mxe4m3_mxe2m1_block_scale_moe_runner` — +# PT mirror in fused_moe_trtllm_gen.py:511 (W4A8MXFP4MXFP8TRTLLMGenFusedMoEMethod). +# The MXFP8 cubin family (median 9.1 µs/call vs 27 µs for bf16) unlocks bigger +# TileN candidates (up to 256 vs 64). +# +# Both paths use the SAME prepared weight layout (pad/shard/shuffle done by +# `prepare_trtllm_gen_moe_mxfp4_weights` in `prepare_trtllm_gen_moe_mxfp4_weights.py`); +# only the activation handling differs. At forward time we only pad activations +# to the kernel's expected hidden dim (and, for W4A8, also call `mxfp8_quantize`). +# +# Kernel-enforced weight layout: +# * Weights: uint8 packed (2 elements / byte), pre-padded + pre-shuffled +# * Scales: uint8 UE8M0 (block size 32) +# * Bias: float32 (kernel API) +# * input_hidden_alignment = 512 (TMA constraint, runner.cu:472) +# * weight_alignment = 128 (TMA 16U4 alignment) + + +@torch.library.custom_op("auto_deploy::trtllm_quant_mxfp4_trtllm_gen_moe_fused", mutates_args=()) +def trtllm_quant_mxfp4_trtllm_gen_moe_fused( + x: torch.Tensor, + router_weight: torch.Tensor, + router_bias: torch.Tensor, + top_k: int, + fc1_weights_mxfp4: torch.Tensor, + fc2_weights_mxfp4: torch.Tensor, + fc1_weights_scale_ue8m0: torch.Tensor, + fc2_weights_scale_ue8m0: torch.Tensor, + fc1_bias_f32: torch.Tensor, + fc2_bias_f32: torch.Tensor, + swiglu_alpha: torch.Tensor, + swiglu_beta: torch.Tensor, + swiglu_limit: torch.Tensor, + valid_hidden_size: int, + valid_intermediate_size: int, + act_dtype: str, + local_expert_offset: int = 0, + local_num_experts: int = -1, + routing_method_type: int = int(RoutingMethodType.Renormalize), +) -> torch.Tensor: + """TensorRT-LLM Gen MoE for MXFP4 weights with BF16 or MXFP8 activations. + + ``act_dtype`` selects the activation precision (see module header above for the runner + selection + cubin family details): + * ``"bf16"`` (W4A16) — bf16 hidden states fed directly to the bf16 MoE runner. + * ``"mxfp8"`` (W4A8) — bf16 hidden states pre-quantized to MXFP8 (E4M3 + UE8M0 + block scales via ``trtllm.mxfp8_quantize`` with alignment=512), then fed to + the MXFP8 MoE runner. + + The op takes the **raw router weight + bias** and computes top-k routing inside the + C++ runner via ``softmax(topk(F.linear(x, w, b)))`` (fused topk+softmax+cast). + + Args: + x: BF16 hidden states, shape ``(B, S, H)`` or ``(B*S, H)``. ``H`` may be smaller + than the kernel's expected (padded) hidden — the op zero-pads on entry and + slices the output back to ``valid_hidden_size``. + router_weight: ``[E_total, H]`` BF16 router projection. + router_bias: ``[E_total]`` BF16 router bias. + top_k: number of experts activated per token (4 for gpt-oss-120b). + fc1_weights_mxfp4: ``[E_local, 2*I_pad, H_pad/2]`` ``uint8`` (MXFP4 packed, + already pad+shard+shuffled; col-parallel along ``2*I``). + fc2_weights_mxfp4: ``[E_local, H_pad, I_pad/2]`` ``uint8`` (row-parallel along ``I``). + fc1_weights_scale_ue8m0: ``[E_local, 2*I_pad, H_pad/32]`` ``uint8`` UE8M0. + fc2_weights_scale_ue8m0: ``[E_local, H_pad, I_pad/32]`` ``uint8`` UE8M0. + fc1_bias_f32: ``[E_local, 2*I_pad]`` ``float32``. + fc2_bias_f32: ``[E_local, H_pad]`` ``float32`` (already divided by ``tp_size``). + swiglu_alpha / swiglu_beta / swiglu_limit: per-expert SwiGLU parameters, + ``[E_local]`` ``float32``. For gpt-oss: alpha=1.702, beta=1.0, limit=7.0. + valid_hidden_size: original (pre-pad) hidden size; output is sliced to this. + valid_intermediate_size: original per-rank intermediate size (kernel hint to skip + OOB MMA in padded regions). + act_dtype: ``"bf16"`` or ``"mxfp8"`` — selects W4A16 vs W4A8 cubin family. + local_expert_offset: ``slot_start`` for EP>1; ``0`` for EP=1. + local_num_experts: ``num_experts`` for EP=1, ``num_experts/ep_size`` for EP>1. + Pass ``-1`` to default to ``E_local`` inferred from ``fc1_weights_mxfp4``. + routing_method_type: integer from ``RoutingMethodType`` enum. Default + ``Renormalize`` (1) matches gpt-oss's ``RenormalizeMoeRoutingMethod``. + + Returns: + BF16 hidden states of shape ``(*x.shape[:-1], valid_hidden_size)``. + """ + x_shape = x.shape + x2d = x.view(-1, x_shape[-1]) + + # Routing: compute router logits and hand them to the C++ runner which performs + # fused topk + softmax + cast internally. routing_bias is None — the linear-layer + # bias was already folded into router_logits via F.linear. + router_logits = torch.nn.functional.linear(x2d, router_weight, router_bias) + + # Pad activations to the kernel's expected hidden (H_pad, multiple of 512). + expected_hidden = int(fc1_weights_mxfp4.shape[-1] * 2) + pad_size = expected_hidden - int(x2d.shape[-1]) + if pad_size > 0: + x2d = torch.nn.functional.pad(x2d, (0, pad_size)) + + num_experts_total = int(router_weight.shape[0]) + if local_num_experts < 0: + local_num_experts = int(fc1_weights_mxfp4.shape[0]) + intermediate_size_padded = int(fc1_weights_mxfp4.shape[1] // 2) + + if act_dtype == "mxfp8": + # Pre-quantize bf16 activation to MXFP8 (E4M3 elem + UE8M0 per-32-elem scale). + # Match PT's ``W4A8MXFP4MXFP8TRTLLMGenFusedMoEMethod.input_hidden_alignment = 512``. + # Keep ``x_scale`` 1D — the C++ runner asserts ``hidden_states_scale must be 1D``. + x_mxfp8, x_scale = torch.ops.trtllm.mxfp8_quantize( + x2d, + False, # is_sf_swizzled_layout + alignment=512, + ) + result = torch.ops.trtllm.mxe4m3_mxe2m1_block_scale_moe_runner( + router_logits, + None, # routing_bias + x_mxfp8, # hidden_states (E4M3-packed uint8) + x_scale, # hidden_states_scale (UE8M0 per-32-elem block scale) + fc1_weights_mxfp4, + fc1_weights_scale_ue8m0, + fc1_bias_f32, + swiglu_alpha, + swiglu_beta, + swiglu_limit, + fc2_weights_mxfp4, + fc2_weights_scale_ue8m0, + fc2_bias_f32, + num_experts_total, + int(top_k), + None, # n_group + None, # topk_group + intermediate_size_padded, + valid_hidden_size, + valid_intermediate_size, + local_expert_offset, + local_num_experts, + None, # routed_scaling_factor + routing_method_type, + 0, # act_type = SwiGlu + topk_weights=None, + topk_ids=None, + ) + elif act_dtype == "bf16": + result = torch.ops.trtllm.bf16_mxe2m1_block_scale_moe_runner( + router_logits, + None, # routing_bias + x2d, # hidden_states (bf16) + fc1_weights_mxfp4, + fc1_weights_scale_ue8m0, + fc1_bias_f32, + swiglu_alpha, + swiglu_beta, + swiglu_limit, + fc2_weights_mxfp4, + fc2_weights_scale_ue8m0, + fc2_bias_f32, + num_experts_total, + int(top_k), + None, # n_group + None, # topk_group + intermediate_size_padded, + valid_hidden_size, + valid_intermediate_size, + local_expert_offset, + local_num_experts, + None, # routed_scaling_factor + routing_method_type, + 0, # act_type = SwiGlu + # topk_weights/topk_ids omitted — kernel routes from router_logits. + ) + else: + raise ValueError( + f"trtllm_quant_mxfp4_trtllm_gen_moe_fused: act_dtype must be 'bf16' or 'mxfp8', " + f"got {act_dtype!r}." + ) + + if result.shape[-1] > valid_hidden_size: + result = result[..., :valid_hidden_size].contiguous() + return result.view(*x_shape[:-1], valid_hidden_size) + + +@trtllm_quant_mxfp4_trtllm_gen_moe_fused.register_fake +def trtllm_quant_mxfp4_trtllm_gen_moe_fused_fake( + x: torch.Tensor, + router_weight: torch.Tensor, + router_bias: torch.Tensor, + top_k: int, + fc1_weights_mxfp4: torch.Tensor, + fc2_weights_mxfp4: torch.Tensor, + fc1_weights_scale_ue8m0: torch.Tensor, + fc2_weights_scale_ue8m0: torch.Tensor, + fc1_bias_f32: torch.Tensor, + fc2_bias_f32: torch.Tensor, + swiglu_alpha: torch.Tensor, + swiglu_beta: torch.Tensor, + swiglu_limit: torch.Tensor, + valid_hidden_size: int, + valid_intermediate_size: int, + act_dtype: str, + local_expert_offset: int = 0, + local_num_experts: int = -1, + routing_method_type: int = int(RoutingMethodType.Renormalize), +) -> torch.Tensor: + out_shape = list(x.shape) + out_shape[-1] = valid_hidden_size + return x.new_empty(out_shape, dtype=x.dtype) diff --git a/tensorrt_llm/_torch/auto_deploy/custom_ops/linear/linear.py b/tensorrt_llm/_torch/auto_deploy/custom_ops/linear/linear.py index 254410e6ba47..61bea3a3d6ae 100644 --- a/tensorrt_llm/_torch/auto_deploy/custom_ops/linear/linear.py +++ b/tensorrt_llm/_torch/auto_deploy/custom_ops/linear/linear.py @@ -19,6 +19,8 @@ import torch +from ..._compat import get_sm_version + @torch.library.custom_op("auto_deploy::torch_linear_simple", mutates_args=()) def simple( @@ -65,6 +67,24 @@ def simple( Returns: Output tensor of shape ``(..., out_features)``. """ + # Blackwell (sm>=100) + bf16: route any bf16 linear to trtllm::cublas_mm. + # Selects single-pass cluster-mode cubins instead of cuBLAS-default + # split-K + reduce + zero-fill for small-M (decode) projection GEMMs. + # (Same trick PT introduced for GPT-OSS via use_custom_cublas_mm in + # modeling_gpt_oss.py; we apply it model-agnostically based on dtype + SM.) + if get_sm_version() >= 100 and input.dtype == torch.bfloat16 and weight.dtype == torch.bfloat16: + # cublas_mm requires 2D mat_a/mat_b. Flatten leading dims and unflatten on exit. + in_shape = input.shape + input_2d = input.reshape(-1, in_shape[-1]) + out_2d = torch.ops.trtllm.cublas_mm( + input_2d, + weight.t(), + bias, + None, # out_dtype + 0, # output_buffer_kind = DEFAULT + None, # group (no TP) + ) + return out_2d.view(*in_shape[:-1], out_2d.shape[-1]) return torch.ops.aten.linear(input, weight, bias) diff --git a/tensorrt_llm/_torch/auto_deploy/custom_ops/linear/swiglu.py b/tensorrt_llm/_torch/auto_deploy/custom_ops/linear/swiglu.py index 92bdd51e6aba..a13ddd1de8c4 100644 --- a/tensorrt_llm/_torch/auto_deploy/custom_ops/linear/swiglu.py +++ b/tensorrt_llm/_torch/auto_deploy/custom_ops/linear/swiglu.py @@ -68,6 +68,9 @@ def torch_swiglu_mlp( gate_bias: Optional gate projection bias of shape [intermediate_size]. up_bias: Optional up projection bias of shape [intermediate_size]. down_bias: Optional down projection bias of shape [hidden_size]. + layer_type: Layer-classification sharding hint (e.g. "mlp"/"moe"/"shared_expert"), + propagated from the matched linears by the pattern matcher and consumed by + ``apply_sharding_hints`` (``shard_layers``). Does not affect the numeric result. Returns: Output tensor of shape [..., hidden_size]. @@ -184,6 +187,9 @@ def torch_nvfp4_swiglu_mlp( down_input_scale: Input scale for down projection. down_weight_scale: Per-block weight scale for down projection. down_alpha: Alpha (combined scale) for down projection. + layer_type: Layer-classification sharding hint (e.g. "mlp"/"moe"/"shared_expert"), + propagated from the matched linears by the pattern matcher and consumed by + ``apply_sharding_hints`` (``shard_layers``). Does not affect the numeric result. Returns: Output tensor of shape [..., hidden_size]. @@ -344,6 +350,9 @@ def torch_finegrained_fp8_swiglu_mlp( gate_weight_scale: Per-block weight scale for gate [N/128, K/128] float32. up_weight_scale: Per-block weight scale for up [N/128, K/128] float32. down_weight_scale: Per-block weight scale for down [N/128, K/128] float32. + layer_type: Layer-classification sharding hint (e.g. "mlp"/"moe"/"shared_expert"), + propagated from the matched linears by the pattern matcher and consumed by + ``apply_sharding_hints`` (``shard_layers``). Does not affect the numeric result. Returns: Output tensor of shape [..., hidden_size]. diff --git a/tensorrt_llm/_torch/auto_deploy/custom_ops/mamba/flashinfer_backend_mamba.py b/tensorrt_llm/_torch/auto_deploy/custom_ops/mamba/flashinfer_backend_mamba.py index 076d1fb4ba4a..21e57e545ad5 100644 --- a/tensorrt_llm/_torch/auto_deploy/custom_ops/mamba/flashinfer_backend_mamba.py +++ b/tensorrt_llm/_torch/auto_deploy/custom_ops/mamba/flashinfer_backend_mamba.py @@ -28,6 +28,7 @@ from ..attention_interface import ( AttentionRegistry, BatchInfo, + IntermediateSSMStateHandler, MHACallable, ReplayCacheBufIdxHandler, ReplayOldBHandler, @@ -36,7 +37,6 @@ ReplayOldXHandler, ReplayPrevNumAcceptedHandler, ResourceHandlerDict, - SpecSSMResourceHandler, ) from .mamba_backend_common import ( BaseBackendSSM, @@ -419,7 +419,7 @@ def get_cache_initializers( ret["replay_cache_buf_idx"] = ReplayCacheBufIdxHandler() ret["replay_prev_num_accepted"] = ReplayPrevNumAcceptedHandler() else: - ret["intermediate_ssm_state_cache"] = SpecSSMResourceHandler.from_base(ssm_h) + ret["intermediate_ssm_state_cache"] = IntermediateSSMStateHandler.from_base(ssm_h) ret["replay_old_x"] = None ret["replay_old_b"] = None ret["replay_old_dt"] = None diff --git a/tensorrt_llm/_torch/auto_deploy/custom_ops/mamba/triton_backend_causal_conv.py b/tensorrt_llm/_torch/auto_deploy/custom_ops/mamba/triton_backend_causal_conv.py index a3f4581d7e89..caae1a6ff98d 100644 --- a/tensorrt_llm/_torch/auto_deploy/custom_ops/mamba/triton_backend_causal_conv.py +++ b/tensorrt_llm/_torch/auto_deploy/custom_ops/mamba/triton_backend_causal_conv.py @@ -36,8 +36,8 @@ from ..attention_interface import ( AttentionRegistry, BatchInfo, + IntermediateConvStateHandler, MHACallable, - SpecCausalConvResourceHandler, ) from .causal_conv_common import BaseCausalConvDescriptor @@ -255,7 +255,7 @@ class TritonBackendCausalConv(BaseCausalConvDescriptor): @classmethod def get_cache_initializers(cls, source_attn_node, cache_config): ret = super().get_cache_initializers(source_attn_node, cache_config) - ret["intermediate_conv_state_cache"] = SpecCausalConvResourceHandler.from_base( + ret["intermediate_conv_state_cache"] = IntermediateConvStateHandler.from_base( ret["conv_state_cache"] ) return ret diff --git a/tensorrt_llm/_torch/auto_deploy/custom_ops/mamba/triton_backend_mamba.py b/tensorrt_llm/_torch/auto_deploy/custom_ops/mamba/triton_backend_mamba.py index 75a9c7010263..d4f7aa0d2bd9 100644 --- a/tensorrt_llm/_torch/auto_deploy/custom_ops/mamba/triton_backend_mamba.py +++ b/tensorrt_llm/_torch/auto_deploy/custom_ops/mamba/triton_backend_mamba.py @@ -19,7 +19,12 @@ from tensorrt_llm._torch.modules.mamba.selective_state_update import selective_state_update -from ..attention_interface import AttentionRegistry, BatchInfo, MHACallable, SpecSSMResourceHandler +from ..attention_interface import ( + AttentionRegistry, + BatchInfo, + IntermediateSSMStateHandler, + MHACallable, +) from .mamba_backend_common import ( BaseBackendSSM, _flatten_ssm_inputs, @@ -274,7 +279,7 @@ def get_cached_attention_op(cls) -> MHACallable: @classmethod def get_cache_initializers(cls, source_attn_node, cache_config): ret = super().get_cache_initializers(source_attn_node, cache_config) - ret["intermediate_ssm_state_cache"] = SpecSSMResourceHandler.from_base( + ret["intermediate_ssm_state_cache"] = IntermediateSSMStateHandler.from_base( ret["ssm_state_cache"] ) return ret diff --git a/tensorrt_llm/_torch/auto_deploy/custom_ops/mla/flashinfer_mla.py b/tensorrt_llm/_torch/auto_deploy/custom_ops/mla/flashinfer_mla.py index 5e51d206174a..cc69d0ec722c 100644 --- a/tensorrt_llm/_torch/auto_deploy/custom_ops/mla/flashinfer_mla.py +++ b/tensorrt_llm/_torch/auto_deploy/custom_ops/mla/flashinfer_mla.py @@ -50,6 +50,7 @@ AttentionDescriptor, AttentionLayout, AttentionRegistry, + AttentionType, BatchInfo, Constant, MHACallable, @@ -847,6 +848,7 @@ def __init__(self, *token_shape: int, dtype: torch.dtype) -> None: """ self.token_shape = token_shape self.dtype = dtype + self.attention_type = AttentionType.mla def _get_bytes_per_token(self) -> int: """The size of the resource per token in bytes.""" diff --git a/tensorrt_llm/_torch/auto_deploy/custom_ops/mla/flashinfer_trtllm_mla.py b/tensorrt_llm/_torch/auto_deploy/custom_ops/mla/flashinfer_trtllm_mla.py index 4ac85d17f57a..d99dfef385b5 100644 --- a/tensorrt_llm/_torch/auto_deploy/custom_ops/mla/flashinfer_trtllm_mla.py +++ b/tensorrt_llm/_torch/auto_deploy/custom_ops/mla/flashinfer_trtllm_mla.py @@ -39,6 +39,7 @@ AttentionDescriptor, AttentionLayout, AttentionRegistry, + AttentionType, BatchInfo, Constant, MHACallable, @@ -67,6 +68,7 @@ def is_paged(self) -> bool: def __init__(self, *token_shape: int, dtype: torch.dtype) -> None: self.token_shape = token_shape self.dtype = dtype + self.attention_type = AttentionType.mla def allocate(self, sequence_info: SequenceInfo) -> torch.Tensor: return torch.empty( diff --git a/tensorrt_llm/_torch/auto_deploy/custom_ops/mla/trtllm_mla.py b/tensorrt_llm/_torch/auto_deploy/custom_ops/mla/trtllm_mla.py index 748f55e21661..45b72e7873e2 100644 --- a/tensorrt_llm/_torch/auto_deploy/custom_ops/mla/trtllm_mla.py +++ b/tensorrt_llm/_torch/auto_deploy/custom_ops/mla/trtllm_mla.py @@ -76,6 +76,7 @@ AttentionDescriptor, AttentionLayout, AttentionRegistry, + AttentionType, BatchInfo, Constant, KVPagedResourceHandler, @@ -853,6 +854,7 @@ def _handle_prefill_thop( tokens_per_block: int, max_num_requests: int, max_context_length: int, + max_seq_len: int, quant_mode: int, sequence_length: torch.Tensor, context_lengths: torch.Tensor, @@ -910,6 +912,7 @@ def _handle_prefill_thop( tokens_per_block, max_num_requests, max_context_length, + max_seq_len, quant_mode, sequence_length, context_lengths, @@ -1039,6 +1042,7 @@ def _handle_prefill_thop( tokens_per_block, # tokens_per_block max_num_requests, # max_num_requests max_context_length, # max_context_length + max_seq_len, # max_seq_len max_context_length, # attention_window_size 1, # beam_width int(AttentionMaskType.causal), # mask_type @@ -1122,6 +1126,7 @@ def _handle_prefill_thop_cached_kv( tokens_per_block: int, max_num_requests: int, max_context_length: int, + max_seq_len: int, quant_mode: int, sequence_length: torch.Tensor, context_lengths: torch.Tensor, @@ -1330,6 +1335,7 @@ def _handle_prefill_thop_cached_kv( tokens_per_block, max_num_requests, max_context_length, + max_seq_len, # max_seq_len max_context_length, 1, # beam_width int(AttentionMaskType.padding), # FULL mask: every Q attends to every K in this chunk @@ -1459,6 +1465,7 @@ def _handle_prefill_thop_cached_kv( tokens_per_block, max_num_requests, max_context_length, + max_seq_len, # max_seq_len max_context_length, # attention_window_size 1, # beam_width int(AttentionMaskType.causal), # CAUSAL: new Q tokens with causal mask over new K/V @@ -1552,6 +1559,7 @@ def _handle_decode_impl( tokens_per_block: int, max_num_requests: int, max_context_length: int, + max_seq_len: int, q_scaling: float, quant_mode: int, sequence_length: torch.Tensor, @@ -1718,6 +1726,7 @@ def _handle_decode_impl( tokens_per_block, # tokens_per_block max_num_requests, # max_num_requests max_context_length, # max_context_length + max_seq_len, # max_seq_len max_context_length, # attention_window_size 1, # beam_width int(AttentionMaskType.causal), # mask_type @@ -1833,6 +1842,7 @@ def _mla_with_cache_impl( num_prefill, num_prefill_tokens, num_decode = batch_info.get_absorbed_info() num_seq = num_prefill + num_decode num_tokens = num_prefill_tokens + num_decode + max_seq_len = batch_info.get_max_seq_len() max_context_length = batch_info.get_max_context_length() max_num_requests = batch_info.get_max_batch_size() @@ -1966,6 +1976,7 @@ def _mla_with_cache_impl( tokens_per_block, max_num_requests, max_context_length, + max_seq_len, quant_mode, sequence_length, context_lengths, @@ -2001,6 +2012,7 @@ def _mla_with_cache_impl( tokens_per_block, max_num_requests, max_context_length, + max_seq_len, q_scaling, quant_mode, sequence_length, @@ -2195,15 +2207,15 @@ def get_cache_initializers( cache_dtype = cls.resolve_cache_dtype(cache_config.dtype, compressed_kv_fake.dtype) - return { - "kv_cache": KVPagedResourceHandler( - num_kv_heads=1, - head_dim=kv_lora_rank + qk_rope_head_dim, - dtype=cache_dtype, - kv_factor=1, - kv_layout="HND", - ) - } + kv_handler = KVPagedResourceHandler( + num_kv_heads=1, + head_dim=kv_lora_rank + qk_rope_head_dim, + dtype=cache_dtype, + kv_factor=1, + kv_layout="HND", + attention_type=AttentionType.mla, + ) + return {"kv_cache": kv_handler} @classmethod def get_host_prepare_metadata_function( diff --git a/tensorrt_llm/_torch/auto_deploy/export/export.py b/tensorrt_llm/_torch/auto_deploy/export/export.py index b3c6d260158a..09a54b3c46e8 100644 --- a/tensorrt_llm/_torch/auto_deploy/export/export.py +++ b/tensorrt_llm/_torch/auto_deploy/export/export.py @@ -29,6 +29,7 @@ from ..utils._graph import canonicalize_graph, lift_to_meta, load_buffers_and_params, tree_to from ..utils.logger import ad_logger from ..utils.node_utils import get_op_schema, is_op +from ..utils.pipeline_cache_hooks import mark_pipeline_cache_hook from .interface import apply_export_patches try: @@ -411,11 +412,21 @@ def _deduplicate_params_and_buffers(gm: fx.GraphModule) -> None: delattr(gm.get_submodule(submod), name) # add load hooks to also load the weights correctly + param_key_remaining = str(node_kept.target) + param_key_removed = str(n.target) + hook = partial( + _load_hook_for_deduplication, + param_key_remaining=param_key_remaining, + param_key_removed=param_key_removed, + ) gm._register_load_state_dict_pre_hook( - partial( - _load_hook_for_deduplication, - param_key_remaining=str(node_kept.target), - param_key_removed=str(n.target), + mark_pipeline_cache_hook( + hook, + { + "type": "dedup", + "param_key_remaining": param_key_remaining, + "param_key_removed": param_key_removed, + }, ) ) @@ -424,6 +435,40 @@ def _deduplicate_params_and_buffers(gm: fx.GraphModule) -> None: canonicalize_graph(gm) +def _build_aliasing_load_pre_hook(aliased_groups: List[List[str]]) -> Callable: + """Build a load hook that applies one state-dict value to every name in an alias group.""" + + def _find_valid_param_value( + state_dict: Dict[str, torch.Tensor], param_names: List[str] + ) -> Optional[torch.Tensor]: + value = None + for name in param_names: + if name in state_dict: + value = state_dict[name] + if value.device.type != "meta": + return value + return value + + def aliasing_load_pre_hook(state_dict: Dict[str, torch.Tensor], prefix: str, *args, **kwargs): + """Load hook that ensures aliased parameters get the same value.""" + del prefix, args, kwargs + for group in aliased_groups: + value = _find_valid_param_value(state_dict, group) + if value is None: + continue + for name in group: + state_dict[name] = value + ad_logger.debug(f"Applied value from {group[0]} to aliased parameters: {group}") + + return mark_pipeline_cache_hook( + aliasing_load_pre_hook, + { + "type": "alias", + "aliased_groups": aliased_groups, + }, + ) + + def _add_missing_load_hooks(gm: fx.GraphModule, model: nn.Module) -> None: """Adds back the state dict load hooks stripped away during export.""" pre_hooks = { @@ -468,41 +513,6 @@ def _add_load_hook_for_aliased_params(gm: fx.GraphModule, model: nn.Module) -> N model: The source model containing the original parameter aliases """ - def find_valid_param_value( - state_dict: Dict[str, torch.Tensor], param_names: List[str] - ) -> Optional[torch.Tensor]: - """Find a valid parameter value from state dict for a group of aliased parameters. - - Args: - state_dict: The state dict being loaded - param_names: List of parameter names that are aliases of each other - - Returns: - A valid tensor value if found, None otherwise - """ - # First try to find a non-meta tensor value - value = None - for name in param_names: - if name in state_dict: - value = state_dict[name] - if value.device.type != "meta": - return value - - return value - - def aliasing_load_pre_hook(state_dict: Dict[str, torch.Tensor], prefix: str, *args, **kwargs): - """Load hook that ensures aliased parameters get the same value.""" - for group in aliased_groups: - # Find a valid value for this group of aliases - value = find_valid_param_value(state_dict, group) - - if value is not None: - # Apply the value to all aliases - for name in group: - state_dict[name] = value - - ad_logger.debug(f"Applied value from {group[0]} to aliased parameters: {group}") - # Find all parameter aliases in the source model param_to_names = defaultdict(list) for name, param in model.named_parameters(remove_duplicate=False): @@ -515,7 +525,7 @@ def aliasing_load_pre_hook(state_dict: Dict[str, torch.Tensor], prefix: str, *ar return # Register the hook - gm._register_load_state_dict_pre_hook(aliasing_load_pre_hook) + gm._register_load_state_dict_pre_hook(_build_aliasing_load_pre_hook(aliased_groups)) def _rename_nodes_with_module_hierarchy(gm: fx.GraphModule) -> None: @@ -594,6 +604,59 @@ def _clean_up_assertions_and_guards(gm: fx.GraphModule): canonicalize_graph(gm) +def _is_export_input_constraint_hook(hook: Any) -> bool: + hook_fn = hook.hook if hasattr(hook, "hook") else hook + return ( + getattr(hook_fn, "__module__", None) == "torch.export._unlift" + and getattr(hook_fn, "__name__", None) == "_check_input_constraints_pre_hook" + ) + + +def _is_export_stateful_graph_module_hook(hook: Any) -> bool: + hook_fn = hook.hook if hasattr(hook, "hook") else hook + return ( + getattr(hook_fn, "__module__", None) == "torch.export._unlift" + and getattr(hook_fn, "__qualname__", None) + == "_create_stateful_graph_module.." + ) + + +def _clean_up_export_forward_hooks(gm: fx.GraphModule): + """Remove torch.export forward hooks that are not part of the AD graph.""" + removed = 0 + for mod in gm.modules(): + forward_pre_hooks = getattr(mod, "_forward_pre_hooks", None) + if forward_pre_hooks: + for hook_id, hook in list(forward_pre_hooks.items()): + if not ( + _is_export_input_constraint_hook(hook) + or _is_export_stateful_graph_module_hook(hook) + ): + continue + del forward_pre_hooks[hook_id] + with_kwargs = getattr(mod, "_forward_pre_hooks_with_kwargs", None) + if with_kwargs is not None: + with_kwargs.pop(hook_id, None) + removed += 1 + + forward_hooks = getattr(mod, "_forward_hooks", None) + if forward_hooks: + for hook_id, hook in list(forward_hooks.items()): + if not _is_export_stateful_graph_module_hook(hook): + continue + del forward_hooks[hook_id] + with_kwargs = getattr(mod, "_forward_hooks_with_kwargs", None) + if with_kwargs is not None: + with_kwargs.pop(hook_id, None) + always_called = getattr(mod, "_forward_hooks_always_called", None) + if always_called is not None: + always_called.pop(hook_id, None) + removed += 1 + + if removed: + ad_logger.debug(f"Removed {removed} torch.export forward hook(s)") + + def run_forward_for_capture( model: nn.Module, capture_fn: Optional[Callable[..., nn.Module]] = None, @@ -733,6 +796,7 @@ def _capture_fn(model, args, kwargs): # clean up checks --> generally the sanity checks are overly conservative and we can remove them _clean_up_assertions_and_guards(egm) + _clean_up_export_forward_hooks(egm) # Rename nodes to reflect module hierarchy for better debuggability _rename_nodes_with_module_hierarchy(egm) diff --git a/tensorrt_llm/_torch/auto_deploy/llm_args.py b/tensorrt_llm/_torch/auto_deploy/llm_args.py index b8b8d5892310..75dc34bb7527 100644 --- a/tensorrt_llm/_torch/auto_deploy/llm_args.py +++ b/tensorrt_llm/_torch/auto_deploy/llm_args.py @@ -182,6 +182,25 @@ def setup_hidden_state_capture(self): return self + @model_validator(mode="after") + def validate_ssm_replay_requires_spec(self): + """Reject the replay SSM kernel when speculative decoding is off. + + ``ssm_replay`` makes the SSM backend emit per-layer replay state buffers (``Replay*`` + handlers), which are read only on the speculative extend (draft-verification) path. + Those handlers carry the ``SpeculativeOnly`` trait, so without ``speculative_config`` + the kvcache insert transform drops them entirely and the ``ssm_replay`` flag becomes a + no-op. Reject the contradictory config here rather than silently ignoring the flag. + """ + ssm_cfg = self.transforms.get("insert_cached_ssm_attention", {}) + if ssm_cfg.get("ssm_replay", False) and self.speculative_config is None: + raise ValueError( + "transforms.insert_cached_ssm_attention.ssm_replay=True requires speculative " + "decoding (speculative_config must be set). Replay buffers are only used on the " + "speculative extend path." + ) + return self + @model_validator(mode="after") def validate_parallel_config(self): """Setup parallel config according to world_size. @@ -412,25 +431,41 @@ def cap_max_batch_size_to_max_num_tokens(self): return self @model_validator(mode="after") - def disable_cudagraph_for_speculative_flashinfer(self): + def reject_cudagraph_for_speculative_flashinfer(self): if ( self.speculative_config is not None and self.attn_backend == "flashinfer" and self.is_cuda_graph_enabled() ): - ad_logger.warning( + raise ValueError( "Speculative decoding with FlashInfer attention does not currently support CUDA " - "graph replay in AutoDeploy; falling back to compile_backend='torch-simple'." + "graph replay in AutoDeploy. Use compile_backend='torch-simple' instead." ) - self.compile_backend = "torch-simple" - self.update_transforms_with_shortcuts() return self ### UTILITY METHODS ############################################################################ @property def requires_uniform_kv_caches(self) -> bool: - """Whether CachedSequenceInterface must enforce a uniform KV cache mapping.""" - return self.attn_backend.lower() == "trtllm" + """Whether CachedSequenceInterface must enforce a uniform KV cache mapping. + + No attention backend currently requires this. The trtllm backend used to + return ``True`` here to force a single KV pool, but it now supports + multiple KV cache memory pools for non-uniform sliding-window models + (e.g. gpt-oss) -- the kernel applies the sliding-window mask internally + via cyclic indexing, so per-window pools route correctly. The flag is + kept (defaulting to ``False``) so the uniformity enforcement in + ``CachedSequenceInterface`` remains available should a future backend + need it. + """ + return False + + @property + def reject_unmanaged_persistent_caches(self) -> bool: + """Whether unmanaged persistent cache resources should be rejected.""" + return ( + self.cache_transceiver_config is not None + and self.cache_transceiver_config.backend is not None + ) def create_factory(self) -> ModelFactory: """Create a model factory from the arguments. diff --git a/tensorrt_llm/_torch/auto_deploy/models/custom/modeling_cohere.py b/tensorrt_llm/_torch/auto_deploy/models/custom/modeling_cohere.py index 9df3c3dd8fff..b4324fc5c938 100644 --- a/tensorrt_llm/_torch/auto_deploy/models/custom/modeling_cohere.py +++ b/tensorrt_llm/_torch/auto_deploy/models/custom/modeling_cohere.py @@ -17,7 +17,7 @@ # See the License for the specific language governing permissions and # limitations under the License. -"""Slimmed down PyTorch Cohere/Cohere2 model implementation for auto_deploy export. +"""Cohere model (sharding IR). Source: https://huggingface.co/CohereForAI/aya-expanse-8b (Cohere v1) @@ -133,7 +133,13 @@ def forward( class CohereMLP(nn.Module): - """MLP layer for Cohere models (SwiGLU activation).""" + """MLP layer for Cohere models (SwiGLU activation). + + Sharding strategy: + gate_proj -> colwise + up_proj -> colwise + down_proj -> rowwise + all_reduce + """ def __init__(self, config): super().__init__() @@ -145,7 +151,29 @@ def __init__(self, config): self.act_fn = ACT2FN[config.hidden_act] def forward(self, x: torch.Tensor) -> torch.Tensor: - return self.down_proj(self.act_fn(self.gate_proj(x)) * self.up_proj(x)) + gate = torch.ops.auto_deploy.torch_linear_simple( + x, + self.gate_proj.weight, + self.gate_proj.bias, + tp_mode="colwise", + layer_type="mlp", + ) + up = torch.ops.auto_deploy.torch_linear_simple( + x, + self.up_proj.weight, + self.up_proj.bias, + tp_mode="colwise", + layer_type="mlp", + ) + down = torch.ops.auto_deploy.torch_linear_simple( + self.act_fn(gate) * up, + self.down_proj.weight, + self.down_proj.bias, + tp_mode="rowwise", + layer_type="mlp", + ) + down = torch.ops.auto_deploy.all_reduce(down, layer_type="mlp") + return down class CohereAttention(nn.Module): @@ -157,6 +185,17 @@ class CohereAttention(nn.Module): Uses torch_rope_with_qk_interleaving for interleaved RoPE and torch_attention for GQA-native attention. + + Sharding strategy: + q_proj -> colwise (+ tp_min_local_shape for GQA) + k_proj -> colwise (+ tp_min_local_shape for GQA) + v_proj -> colwise (+ tp_min_local_shape for GQA) + view -> tp_scaled_dim=2 (head count dimension) + o_proj -> rowwise + all_reduce + + The optional q_norm / k_norm operate on the per-head ``head_dim`` axis, + which is not sharded under TP, so they remain replicated and require no + sharding hints. """ def __init__(self, config, layer_idx: Optional[int] = None): @@ -210,9 +249,48 @@ def forward( bsz, q_len, _ = hidden_states.size() # Project Q/K/V and reshape to [B, S, N, head_dim] (BSND layout) - q = self.q_proj(hidden_states).view(bsz, q_len, self.num_heads, self.head_dim) - k = self.k_proj(hidden_states).view(bsz, q_len, self.num_kv_heads, self.head_dim) - v = self.v_proj(hidden_states).view(bsz, q_len, self.num_kv_heads, self.head_dim) + q = torch.ops.auto_deploy.torch_linear_simple( + hidden_states, + self.q_proj.weight, + self.q_proj.bias, + tp_mode="colwise", + tp_min_local_shape=self.head_dim, + layer_type="mha", + ) + k = torch.ops.auto_deploy.torch_linear_simple( + hidden_states, + self.k_proj.weight, + self.k_proj.bias, + tp_mode="colwise", + tp_min_local_shape=self.head_dim, + layer_type="mha", + ) + v = torch.ops.auto_deploy.torch_linear_simple( + hidden_states, + self.v_proj.weight, + self.v_proj.bias, + tp_mode="colwise", + tp_min_local_shape=self.head_dim, + layer_type="mha", + ) + q = torch.ops.auto_deploy.view( + q, + [bsz, q_len, self.num_heads, self.head_dim], + tp_scaled_dim=2, + layer_type="mha", + ) + k = torch.ops.auto_deploy.view( + k, + [bsz, q_len, self.num_kv_heads, self.head_dim], + tp_scaled_dim=2, + layer_type="mha", + ) + v = torch.ops.auto_deploy.view( + v, + [bsz, q_len, self.num_kv_heads, self.head_dim], + tp_scaled_dim=2, + layer_type="mha", + ) # Optional QK normalization (Cohere v1 feature) if self.use_qk_norm: @@ -248,8 +326,20 @@ def forward( ) # Reshape and project output - attn_output = attn_output.reshape(bsz, q_len, self.num_heads * self.head_dim) - attn_output = self.o_proj(attn_output) + attn_output = torch.ops.auto_deploy.view( + attn_output, + [bsz, q_len, self.num_heads * self.head_dim], + tp_scaled_dim=2, + layer_type="mha", + ) + attn_output = torch.ops.auto_deploy.torch_linear_simple( + attn_output, + self.o_proj.weight, + self.o_proj.bias, + tp_mode="rowwise", + layer_type="mha", + ) + attn_output = torch.ops.auto_deploy.all_reduce(attn_output, layer_type="mha") return attn_output diff --git a/tensorrt_llm/_torch/auto_deploy/models/custom/modeling_deepseek.py b/tensorrt_llm/_torch/auto_deploy/models/custom/modeling_deepseek.py index 39614903f11e..5325cdcdea58 100644 --- a/tensorrt_llm/_torch/auto_deploy/models/custom/modeling_deepseek.py +++ b/tensorrt_llm/_torch/auto_deploy/models/custom/modeling_deepseek.py @@ -461,8 +461,11 @@ def __init__(self, config, layer_idx: Optional[int] = None): self.softmax_scale = self.q_head_dim ** (-0.5) if config.rope_scaling is not None: mscale_all_dim = config.rope_scaling.get("mscale_all_dim", 0) - scaling_factor = config.rope_scaling["factor"] - if mscale_all_dim: + # transformers 5.x populates rope_scaling to {"rope_type": "default"} when the + # checkpoint has no scaling (e.g. DeepSeek-V3-Lite), so "factor" may be absent. + # Only apply the YaRN mscale correction when an explicit factor is present. + scaling_factor = config.rope_scaling.get("factor") + if scaling_factor is not None and mscale_all_dim: mscale = DeepSeekV3YarnRotaryEmbedding._yarn_get_mscale( scaling_factor, mscale_all_dim ) diff --git a/tensorrt_llm/_torch/auto_deploy/models/custom/modeling_deepseek_v2.py b/tensorrt_llm/_torch/auto_deploy/models/custom/modeling_deepseek_v2.py index 6dc0cb37d232..60e0747af24e 100644 --- a/tensorrt_llm/_torch/auto_deploy/models/custom/modeling_deepseek_v2.py +++ b/tensorrt_llm/_torch/auto_deploy/models/custom/modeling_deepseek_v2.py @@ -17,7 +17,7 @@ # See the License for the specific language governing permissions and # limitations under the License. -"""Slimmed down PyTorch DeepSeekV2 model implementation for auto_deploy export. +"""DeepSeekV2 model (sharding IR). Source: https://huggingface.co/deepseek-ai/DeepSeek-Coder-V2-Instruct @@ -191,10 +191,25 @@ def _yarn_linear_ramp_mask(min_val: float, max_val: float, dim: int) -> torch.Te class DeepSeekV2MLP(nn.Module): - """MLP layer for DeepSeekV2 (SwiGLU activation).""" + """MLP layer for DeepSeekV2 (SwiGLU activation). + + When used as a shared expert inside MoE, ``add_all_reduce=False`` and + ``layer_type="moe"`` so the closing all_reduce is deferred to the merge + point and combined with the routed expert output. + + Sharding strategy: + ``gate_proj`` / ``up_proj`` -> ``tp_mode="colwise"``. + ``down_proj`` -> ``tp_mode="rowwise"`` + ``all_reduce`` (deferred when + used as a shared expert). + """ def __init__( - self, config, hidden_size: Optional[int] = None, intermediate_size: Optional[int] = None + self, + config, + hidden_size: Optional[int] = None, + intermediate_size: Optional[int] = None, + add_all_reduce: bool = True, + layer_type: str = "mlp", ): super().__init__() self.config = config @@ -205,9 +220,34 @@ def __init__( self.up_proj = nn.Linear(self.hidden_size, self.intermediate_size, bias=False) self.down_proj = nn.Linear(self.intermediate_size, self.hidden_size, bias=False) self.act_fn = ACT2FN[config.hidden_act] + self.add_all_reduce = add_all_reduce + self.layer_type = layer_type def forward(self, x: torch.Tensor) -> torch.Tensor: - return self.down_proj(self.act_fn(self.gate_proj(x)) * self.up_proj(x)) + gate = torch.ops.auto_deploy.torch_linear_simple( + x, + self.gate_proj.weight, + self.gate_proj.bias, + tp_mode="colwise", + layer_type=self.layer_type, + ) + up = torch.ops.auto_deploy.torch_linear_simple( + x, + self.up_proj.weight, + self.up_proj.bias, + tp_mode="colwise", + layer_type=self.layer_type, + ) + down = torch.ops.auto_deploy.torch_linear_simple( + self.act_fn(gate) * up, + self.down_proj.weight, + self.down_proj.bias, + tp_mode="rowwise", + layer_type=self.layer_type, + ) + if self.add_all_reduce: + down = torch.ops.auto_deploy.all_reduce(down, layer_type=self.layer_type) + return down class DeepSeekV2MoEGate(nn.Module): @@ -280,7 +320,14 @@ def forward(self, hidden_states: torch.Tensor) -> Tuple[torch.Tensor, torch.Tens class DeepSeekV2MoE(nn.Module): - """Mixture of Experts layer for DeepSeekV2.""" + """Mixture of Experts layer for DeepSeekV2. + + Routed experts are dispatched via ``torch_moe`` (sharded by + ``apply_sharding_hints`` using ``layer_type="moe"``). The shared expert is a + TP-sharded MLP whose closing all_reduce is deferred so the routed and + shared partial sums can be combined with a single + ``all_reduce(layer_type="moe")`` at the merge point. + """ def __init__(self, config): super().__init__() @@ -302,7 +349,12 @@ def __init__(self, config): # Shared experts (if configured) if config.n_shared_experts is not None: intermediate_size = config.moe_intermediate_size * config.n_shared_experts - self.shared_experts = DeepSeekV2MLP(config, intermediate_size=intermediate_size) + self.shared_experts = DeepSeekV2MLP( + config, + intermediate_size=intermediate_size, + add_all_reduce=False, + layer_type="moe", + ) else: self.shared_experts = None @@ -325,6 +377,7 @@ def forward(self, hidden_states: torch.Tensor) -> torch.Tensor: w3_weight=[expert.up_proj.weight for expert in self.experts], is_gated_mlp=True, act_fn=int(ActivationType.Silu), + layer_type="moe", ) final_hidden_states = final_hidden_states.view(*orig_shape) @@ -333,6 +386,11 @@ def forward(self, hidden_states: torch.Tensor) -> torch.Tensor: if self.shared_experts is not None: final_hidden_states = final_hidden_states + self.shared_experts(identity) + # Single merge-point all_reduce for routed + shared partial sums. + final_hidden_states = torch.ops.auto_deploy.all_reduce( + final_hidden_states, layer_type="moe" + ) + return final_hidden_states.to(hidden_states.dtype) @@ -340,6 +398,18 @@ class DeepSeekV2Attention(nn.Module): """Multi-head Latent Attention (MLA) for DeepSeekV2. Uses compressed KV representation with latent projections. + + Sharding strategy: + ``q_a_proj`` / ``kv_a_proj_with_mqa`` -> ``tp_mode="none"`` (replicated + latent projections). + ``q_b_proj`` / ``q_proj`` (when ``q_lora_rank`` is None) -> + ``tp_mode="colwise"`` (sharded by ``num_heads``). + Q reshape -> ``auto_deploy.view`` with ``tp_scaled_dim=2``. + ``torch_mla`` -> ``enable_sharding=True, layer_type="mla"``. Do NOT + decompose ``torch_mla`` into separate linears + ``torch_attention`` -- + ``_apply_hint_mla`` shards ``kv_b_proj.weight`` column-wise per head. + Post-attention reshape -> ``auto_deploy.view`` with ``tp_scaled_dim=2``. + ``o_proj`` -> ``tp_mode="rowwise"`` + ``all_reduce(layer_type="mla")``. """ def __init__(self, config, layer_idx: Optional[int] = None): @@ -449,18 +519,49 @@ def forward( ) -> torch.Tensor: bsz, q_len, _ = hidden_states.size() - # Q projection + # Q projection: latent projections replicated, q_b_proj colwise. if self.q_lora_rank is None: - q = self.q_proj(hidden_states) + q = torch.ops.auto_deploy.torch_linear_simple( + hidden_states, + self.q_proj.weight, + self.q_proj.bias, + tp_mode="colwise", + layer_type="mla", + ) else: - q = self.q_b_proj(self.q_a_layernorm(self.q_a_proj(hidden_states))) + q = torch.ops.auto_deploy.torch_linear_simple( + hidden_states, + self.q_a_proj.weight, + self.q_a_proj.bias, + tp_mode="none", + layer_type="mla", + ) + q = self.q_a_layernorm(q) + q = torch.ops.auto_deploy.torch_linear_simple( + q, + self.q_b_proj.weight, + self.q_b_proj.bias, + tp_mode="colwise", + layer_type="mla", + ) - # Shape: [B, S, N, q_head_dim] (BSND layout) - q = q.view(bsz, q_len, self.num_heads, self.q_head_dim) + # Shape: [B, S, N, q_head_dim] (BSND layout); num_heads (dim 2) scales with TP. + q = torch.ops.auto_deploy.view( + q, + [bsz, q_len, self.num_heads, self.q_head_dim], + tp_scaled_dim=2, + layer_type="mla", + ) q_nope, q_pe = torch.split(q, [self.qk_nope_head_dim, self.qk_rope_head_dim], dim=-1) - # KV projection - keep compressed form - kv_a_output = self.kv_a_proj_with_mqa(hidden_states) + # KV projection - keep compressed form. Latent compression is replicated. + kv_a_output = torch.ops.auto_deploy.torch_linear_simple( + hidden_states, + self.kv_a_proj_with_mqa.weight, + self.kv_a_proj_with_mqa.bias, + tp_mode="none", + layer_type="mla", + ) compressed_kv, k_pe = torch.split( kv_a_output, [self.kv_lora_rank, self.qk_rope_head_dim], dim=-1 ) @@ -469,6 +570,7 @@ def forward( compressed_kv = self.kv_a_layernorm(compressed_kv) # k_pe: [B, S, 1, qk_rope_head_dim] (BSND layout, shared across heads) + # dim 2 is fixed at 1 and never scales with TP, so plain `.view` is correct. k_pe = k_pe.view(bsz, q_len, 1, self.qk_rope_head_dim) cos, sin = self.rotary_emb(hidden_states, position_ids) @@ -482,7 +584,10 @@ def forward( 2, # unsqueeze_dim=2 for BSND layout ) - # Call MLA with compressed KV + # Call MLA with compressed KV. enable_sharding=True lets _apply_hint_mla + # shard kv_b_proj_weight column-wise along the head dimension. Do NOT + # decompose torch_mla into separate linears + torch_attention -- that + # introduces concrete-shape view/expand that break under TP. attn_output = torch.ops.auto_deploy.torch_mla( q_nope, # [B, S, N, qk_nope_head_dim] q_pe_rotated, # [B, S, N, qk_rope_head_dim] @@ -492,11 +597,26 @@ def forward( True, # is_causal self.softmax_scale, "bsnd", # layout + enable_sharding=True, + layer_type="mla", ) - # Output: [B, S, N, v_head_dim] -> [B, S, N * v_head_dim] - attn_output = attn_output.reshape(bsz, q_len, self.num_heads * self.v_head_dim) - attn_output = self.o_proj(attn_output) + # Output: [B, S, N, v_head_dim] -> [B, S, N * v_head_dim]. + # Collapsed dim scales with TP via num_heads. + attn_output = torch.ops.auto_deploy.view( + attn_output, + [bsz, q_len, self.num_heads * self.v_head_dim], + tp_scaled_dim=2, + layer_type="mla", + ) + attn_output = torch.ops.auto_deploy.torch_linear_simple( + attn_output, + self.o_proj.weight, + self.o_proj.bias, + tp_mode="rowwise", + layer_type="mla", + ) + attn_output = torch.ops.auto_deploy.all_reduce(attn_output, layer_type="mla") return attn_output diff --git a/tensorrt_llm/_torch/auto_deploy/models/custom/modeling_eagle.py b/tensorrt_llm/_torch/auto_deploy/models/custom/modeling_eagle.py index 9d82fa5a9f3d..485ec4a9bd4d 100644 --- a/tensorrt_llm/_torch/auto_deploy/models/custom/modeling_eagle.py +++ b/tensorrt_llm/_torch/auto_deploy/models/custom/modeling_eagle.py @@ -33,7 +33,7 @@ from dataclasses import dataclass from types import SimpleNamespace -from typing import Any, ClassVar, Dict, Optional, Union +from typing import Any, ClassVar, Dict, Optional, Set, Union import torch import torch.nn as nn @@ -912,10 +912,14 @@ def _forward_prefill_only(self, input_ids: torch.Tensor, position_ids: torch.Ten # KV-cache forward (inference after graph transforms) # # ================================================================== # + @staticmethod + def _submodule_placeholder_names(submodule: nn.Module) -> Set[str]: + return {node.name for node in submodule.graph.nodes if node.op == "placeholder"} + @staticmethod def _filter_kwargs_for_submodule(kwargs: dict, submodule: nn.Module) -> dict: """Filter kwargs to only include those accepted by submodule's forward (GraphModule).""" - expected_names = {node.name for node in submodule.graph.nodes if node.op == "placeholder"} + expected_names = EagleWrapper._submodule_placeholder_names(submodule) return {k: v for k, v in kwargs.items() if k in expected_names} @staticmethod @@ -1096,6 +1100,7 @@ def _forward_with_kv_cache(self, csi: CachedSequenceInterface): next_new_tokens[:, 0] = csi.info.maybe_gather_and_squeeze(csi.get_arg("input_ids")) # ---- Phase 5: Draft loop ---- + draft_arg_names = self._submodule_placeholder_names(self.draft_model) for draft_idx in range(self.max_draft_len): # run forward pass on the draft model in shape [num_sequences, 1] draft_output = self.draft_model( @@ -1123,9 +1128,9 @@ def _forward_with_kv_cache(self, csi: CachedSequenceInterface): # switch to generate (if not done already), store new tokens, and offset cache # can be skipped for last iteration since after we return metadata will be reset if draft_idx < self.max_draft_len - 1: - csi.info.switch_to_generate_() + csi.info.switch_to_generate_(active_args_override=draft_arg_names) csi.info.copy_("input_ids", draft_tokens) - csi.info.offset_pos_and_cache_(c_offset) + csi.info.offset_pos_and_cache_(c_offset, active_args_override=draft_arg_names) # ---- Phase 6: Package output ---- return EagleWrapperOutput( diff --git a/tensorrt_llm/_torch/auto_deploy/models/custom/modeling_exaone.py b/tensorrt_llm/_torch/auto_deploy/models/custom/modeling_exaone.py index 93ad2626e606..88e2970f5992 100644 --- a/tensorrt_llm/_torch/auto_deploy/models/custom/modeling_exaone.py +++ b/tensorrt_llm/_torch/auto_deploy/models/custom/modeling_exaone.py @@ -17,7 +17,7 @@ # See the License for the specific language governing permissions and # limitations under the License. -"""Slimmed down PyTorch EXAONE model implementation for auto_deploy export. +"""EXAONE model (sharding IR). Source: https://huggingface.co/LGAI-EXAONE/EXAONE-3.5-2.4B-Instruct @@ -175,6 +175,11 @@ class ExaoneMLP(nn.Module): """MLP layer for EXAONE (SwiGLU activation). Uses EXAONE naming: c_fc_0 (gate), c_fc_1 (up), c_proj (down). + + Sharding strategy: + c_fc_0 -> colwise + c_fc_1 -> colwise + c_proj -> rowwise + all_reduce """ def __init__(self, config): @@ -187,7 +192,29 @@ def __init__(self, config): self.act = ACT2FN[config.hidden_act] def forward(self, x: torch.Tensor) -> torch.Tensor: - return self.c_proj(self.act(self.c_fc_0(x)) * self.c_fc_1(x)) + gate = torch.ops.auto_deploy.torch_linear_simple( + x, + self.c_fc_0.weight, + self.c_fc_0.bias, + tp_mode="colwise", + layer_type="mlp", + ) + up = torch.ops.auto_deploy.torch_linear_simple( + x, + self.c_fc_1.weight, + self.c_fc_1.bias, + tp_mode="colwise", + layer_type="mlp", + ) + down = torch.ops.auto_deploy.torch_linear_simple( + self.act(gate) * up, + self.c_proj.weight, + self.c_proj.bias, + tp_mode="rowwise", + layer_type="mlp", + ) + down = torch.ops.auto_deploy.all_reduce(down, layer_type="mlp") + return down class ExaoneAttention(nn.Module): @@ -195,6 +222,13 @@ class ExaoneAttention(nn.Module): Uses AD canonical ops for attention and RoPE. GQA is handled natively by torch_attention — no repeat_kv needed. + + Sharding strategy: + q_proj -> colwise (+ tp_min_local_shape for GQA) + k_proj -> colwise (+ tp_min_local_shape for GQA) + v_proj -> colwise (+ tp_min_local_shape for GQA) + view -> tp_scaled_dim=2 (head count dimension) + out_proj -> rowwise + all_reduce """ def __init__(self, config, layer_idx: Optional[int] = None): @@ -223,9 +257,48 @@ def forward( bsz, q_len, _ = hidden_states.size() # Project Q/K/V and reshape to [B, S, N, head_dim] (BSND layout) - q = self.q_proj(hidden_states).view(bsz, q_len, self.num_heads, self.head_dim) - k = self.k_proj(hidden_states).view(bsz, q_len, self.num_kv_heads, self.head_dim) - v = self.v_proj(hidden_states).view(bsz, q_len, self.num_kv_heads, self.head_dim) + q = torch.ops.auto_deploy.torch_linear_simple( + hidden_states, + self.q_proj.weight, + self.q_proj.bias, + tp_mode="colwise", + tp_min_local_shape=self.head_dim, + layer_type="mha", + ) + k = torch.ops.auto_deploy.torch_linear_simple( + hidden_states, + self.k_proj.weight, + self.k_proj.bias, + tp_mode="colwise", + tp_min_local_shape=self.head_dim, + layer_type="mha", + ) + v = torch.ops.auto_deploy.torch_linear_simple( + hidden_states, + self.v_proj.weight, + self.v_proj.bias, + tp_mode="colwise", + tp_min_local_shape=self.head_dim, + layer_type="mha", + ) + q = torch.ops.auto_deploy.view( + q, + [bsz, q_len, self.num_heads, self.head_dim], + tp_scaled_dim=2, + layer_type="mha", + ) + k = torch.ops.auto_deploy.view( + k, + [bsz, q_len, self.num_kv_heads, self.head_dim], + tp_scaled_dim=2, + layer_type="mha", + ) + v = torch.ops.auto_deploy.view( + v, + [bsz, q_len, self.num_kv_heads, self.head_dim], + tp_scaled_dim=2, + layer_type="mha", + ) # Get pre-sliced cos/sin from position_embeddings (already indexed by position_ids) cos, sin = position_embeddings # [B, S, head_dim] @@ -249,8 +322,20 @@ def forward( ) # Reshape [B, S, N, head_dim] -> [B, S, N * head_dim] and project - attn_output = attn_output.reshape(bsz, q_len, self.num_heads * self.head_dim) - attn_output = self.out_proj(attn_output) + attn_output = torch.ops.auto_deploy.view( + attn_output, + [bsz, q_len, self.num_heads * self.head_dim], + tp_scaled_dim=2, + layer_type="mha", + ) + attn_output = torch.ops.auto_deploy.torch_linear_simple( + attn_output, + self.out_proj.weight, + self.out_proj.bias, + tp_mode="rowwise", + layer_type="mha", + ) + attn_output = torch.ops.auto_deploy.all_reduce(attn_output, layer_type="mha") return attn_output diff --git a/tensorrt_llm/_torch/auto_deploy/models/custom/modeling_gemma.py b/tensorrt_llm/_torch/auto_deploy/models/custom/modeling_gemma.py index 52dbdc863040..8d78b224d8ef 100644 --- a/tensorrt_llm/_torch/auto_deploy/models/custom/modeling_gemma.py +++ b/tensorrt_llm/_torch/auto_deploy/models/custom/modeling_gemma.py @@ -17,7 +17,7 @@ # See the License for the specific language governing permissions and # limitations under the License. -"""Slimmed down PyTorch Gemma model implementation for auto_deploy export. +"""Gemma model (sharding IR). Source: https://huggingface.co/google/gemma-1.1-7b-it @@ -113,7 +113,13 @@ def forward( class GemmaADMLP(nn.Module): - """MLP layer for Gemma (gelu_pytorch_tanh activation).""" + """MLP layer for Gemma (gelu_pytorch_tanh activation). + + Sharding strategy: + gate_proj -> colwise + up_proj -> colwise + down_proj -> rowwise + all_reduce + """ def __init__(self, config: GemmaConfig): super().__init__() @@ -125,7 +131,29 @@ def __init__(self, config: GemmaConfig): self.act_fn = ACT2FN[config.hidden_act] def forward(self, x: torch.Tensor) -> torch.Tensor: - return self.down_proj(self.act_fn(self.gate_proj(x)) * self.up_proj(x)) + gate = torch.ops.auto_deploy.torch_linear_simple( + x, + self.gate_proj.weight, + self.gate_proj.bias, + tp_mode="colwise", + layer_type="mlp", + ) + up = torch.ops.auto_deploy.torch_linear_simple( + x, + self.up_proj.weight, + self.up_proj.bias, + tp_mode="colwise", + layer_type="mlp", + ) + down = torch.ops.auto_deploy.torch_linear_simple( + self.act_fn(gate) * up, + self.down_proj.weight, + self.down_proj.bias, + tp_mode="rowwise", + layer_type="mlp", + ) + down = torch.ops.auto_deploy.all_reduce(down, layer_type="mlp") + return down class GemmaADAttention(nn.Module): @@ -134,6 +162,13 @@ class GemmaADAttention(nn.Module): Uses AD canonical ops for attention and RoPE. Gemma typically uses MHA (num_kv_heads == num_heads), but the implementation handles GQA natively via torch_attention. + + Sharding strategy: + q_proj -> colwise (+ tp_min_local_shape for GQA) + k_proj -> colwise (+ tp_min_local_shape for GQA) + v_proj -> colwise (+ tp_min_local_shape for GQA) + view -> tp_scaled_dim=2 (head count dimension) + o_proj -> rowwise + all_reduce """ def __init__(self, config: GemmaConfig, layer_idx: Optional[int] = None): @@ -175,9 +210,48 @@ def forward( bsz, q_len, _ = hidden_states.size() # Project Q/K/V and reshape to [B, S, N, head_dim] (BSND layout) - q = self.q_proj(hidden_states).view(bsz, q_len, self.num_heads, self.head_dim) - k = self.k_proj(hidden_states).view(bsz, q_len, self.num_kv_heads, self.head_dim) - v = self.v_proj(hidden_states).view(bsz, q_len, self.num_kv_heads, self.head_dim) + q = torch.ops.auto_deploy.torch_linear_simple( + hidden_states, + self.q_proj.weight, + self.q_proj.bias, + tp_mode="colwise", + tp_min_local_shape=self.head_dim, + layer_type="mha", + ) + k = torch.ops.auto_deploy.torch_linear_simple( + hidden_states, + self.k_proj.weight, + self.k_proj.bias, + tp_mode="colwise", + tp_min_local_shape=self.head_dim, + layer_type="mha", + ) + v = torch.ops.auto_deploy.torch_linear_simple( + hidden_states, + self.v_proj.weight, + self.v_proj.bias, + tp_mode="colwise", + tp_min_local_shape=self.head_dim, + layer_type="mha", + ) + q = torch.ops.auto_deploy.view( + q, + [bsz, q_len, self.num_heads, self.head_dim], + tp_scaled_dim=2, + layer_type="mha", + ) + k = torch.ops.auto_deploy.view( + k, + [bsz, q_len, self.num_kv_heads, self.head_dim], + tp_scaled_dim=2, + layer_type="mha", + ) + v = torch.ops.auto_deploy.view( + v, + [bsz, q_len, self.num_kv_heads, self.head_dim], + tp_scaled_dim=2, + layer_type="mha", + ) # Get pre-sliced cos/sin from position_embeddings (already indexed by position_ids) cos, sin = position_embeddings # [B, S, head_dim] @@ -207,8 +281,20 @@ def forward( ) # Reshape [B, S, N, head_dim] -> [B, S, N * head_dim] and project - attn_output = attn_output.reshape(bsz, q_len, self.num_heads * self.head_dim) - attn_output = self.o_proj(attn_output) + attn_output = torch.ops.auto_deploy.view( + attn_output, + [bsz, q_len, self.num_heads * self.head_dim], + tp_scaled_dim=2, + layer_type="mha", + ) + attn_output = torch.ops.auto_deploy.torch_linear_simple( + attn_output, + self.o_proj.weight, + self.o_proj.bias, + tp_mode="rowwise", + layer_type="mha", + ) + attn_output = torch.ops.auto_deploy.all_reduce(attn_output, layer_type="mha") return attn_output diff --git a/tensorrt_llm/_torch/auto_deploy/models/custom/modeling_gemma2.py b/tensorrt_llm/_torch/auto_deploy/models/custom/modeling_gemma2.py index c4cb3b48ba6a..01b8dcccb84a 100644 --- a/tensorrt_llm/_torch/auto_deploy/models/custom/modeling_gemma2.py +++ b/tensorrt_llm/_torch/auto_deploy/models/custom/modeling_gemma2.py @@ -17,7 +17,7 @@ # See the License for the specific language governing permissions and # limitations under the License. -"""Slimmed down PyTorch Gemma 2 model implementation for auto_deploy export. +"""Gemma 2 model (sharding IR). Source: https://huggingface.co/google/gemma-2-2b-it @@ -115,7 +115,13 @@ def forward( class Gemma2MLP(nn.Module): - """MLP layer for Gemma 2 (gelu_pytorch_tanh gated).""" + """MLP layer for Gemma 2 (gelu_pytorch_tanh gated). + + Sharding strategy: + gate_proj -> colwise + up_proj -> colwise + down_proj -> rowwise + all_reduce + """ def __init__(self, config: Gemma2Config): super().__init__() @@ -128,7 +134,29 @@ def __init__(self, config: Gemma2Config): self.act_fn = ACT2FN[config.hidden_activation] def forward(self, x: torch.Tensor) -> torch.Tensor: - return self.down_proj(self.act_fn(self.gate_proj(x)) * self.up_proj(x)) + gate = torch.ops.auto_deploy.torch_linear_simple( + x, + self.gate_proj.weight, + self.gate_proj.bias, + tp_mode="colwise", + layer_type="mlp", + ) + up = torch.ops.auto_deploy.torch_linear_simple( + x, + self.up_proj.weight, + self.up_proj.bias, + tp_mode="colwise", + layer_type="mlp", + ) + down = torch.ops.auto_deploy.torch_linear_simple( + self.act_fn(gate) * up, + self.down_proj.weight, + self.down_proj.bias, + tp_mode="rowwise", + layer_type="mlp", + ) + down = torch.ops.auto_deploy.all_reduce(down, layer_type="mlp") + return down class Gemma2Attention(nn.Module): @@ -138,6 +166,13 @@ class Gemma2Attention(nn.Module): * Custom scaling via query_pre_attn_scalar (not head_dim) * Attention logit softcapping (tanh-based capping) * Per-layer sliding window or full attention based on layer_types config + + Sharding strategy: + q_proj -> colwise (+ tp_min_local_shape for GQA) + k_proj -> colwise (+ tp_min_local_shape for GQA) + v_proj -> colwise (+ tp_min_local_shape for GQA) + view -> tp_scaled_dim=2 (head count dimension) + o_proj -> rowwise + all_reduce """ def __init__(self, config: Gemma2Config, layer_idx: int): @@ -178,9 +213,48 @@ def forward( ) -> torch.Tensor: bsz, q_len, _ = hidden_states.size() - q = self.q_proj(hidden_states).view(bsz, q_len, self.num_heads, self.head_dim) - k = self.k_proj(hidden_states).view(bsz, q_len, self.num_kv_heads, self.head_dim) - v = self.v_proj(hidden_states).view(bsz, q_len, self.num_kv_heads, self.head_dim) + q = torch.ops.auto_deploy.torch_linear_simple( + hidden_states, + self.q_proj.weight, + self.q_proj.bias, + tp_mode="colwise", + tp_min_local_shape=self.head_dim, + layer_type="mha", + ) + k = torch.ops.auto_deploy.torch_linear_simple( + hidden_states, + self.k_proj.weight, + self.k_proj.bias, + tp_mode="colwise", + tp_min_local_shape=self.head_dim, + layer_type="mha", + ) + v = torch.ops.auto_deploy.torch_linear_simple( + hidden_states, + self.v_proj.weight, + self.v_proj.bias, + tp_mode="colwise", + tp_min_local_shape=self.head_dim, + layer_type="mha", + ) + q = torch.ops.auto_deploy.view( + q, + [bsz, q_len, self.num_heads, self.head_dim], + tp_scaled_dim=2, + layer_type="mha", + ) + k = torch.ops.auto_deploy.view( + k, + [bsz, q_len, self.num_kv_heads, self.head_dim], + tp_scaled_dim=2, + layer_type="mha", + ) + v = torch.ops.auto_deploy.view( + v, + [bsz, q_len, self.num_kv_heads, self.head_dim], + tp_scaled_dim=2, + layer_type="mha", + ) cos, sin = position_embeddings @@ -206,8 +280,20 @@ def forward( "bsnd", ) - attn_output = attn_output.reshape(bsz, q_len, self.num_heads * self.head_dim) - attn_output = self.o_proj(attn_output) + attn_output = torch.ops.auto_deploy.view( + attn_output, + [bsz, q_len, self.num_heads * self.head_dim], + tp_scaled_dim=2, + layer_type="mha", + ) + attn_output = torch.ops.auto_deploy.torch_linear_simple( + attn_output, + self.o_proj.weight, + self.o_proj.bias, + tp_mode="rowwise", + layer_type="mha", + ) + attn_output = torch.ops.auto_deploy.all_reduce(attn_output, layer_type="mha") return attn_output diff --git a/tensorrt_llm/_torch/auto_deploy/models/custom/modeling_glm4_moe.py b/tensorrt_llm/_torch/auto_deploy/models/custom/modeling_glm4_moe.py index ad0c176b12f3..15fe396f45ef 100644 --- a/tensorrt_llm/_torch/auto_deploy/models/custom/modeling_glm4_moe.py +++ b/tensorrt_llm/_torch/auto_deploy/models/custom/modeling_glm4_moe.py @@ -17,7 +17,7 @@ # See the License for the specific language governing permissions and # limitations under the License. -"""Slimmed down PyTorch GLM4 MoE model implementation for auto_deploy export. +"""GLM4 MoE model (sharding IR). Source: https://huggingface.co/zai-org/GLM-4.7 @@ -109,9 +109,25 @@ def forward( class Glm4MoeMLP(nn.Module): - """MLP layer for GLM4 MoE (SwiGLU activation).""" + """MLP layer for GLM4 MoE (SwiGLU activation). - def __init__(self, config: Glm4MoeConfig, intermediate_size: Optional[int] = None): + When used as a shared expert inside MoE, ``add_all_reduce=False`` and + ``layer_type="moe"`` so the closing all_reduce is deferred to the merge + point and combined with the routed expert output. + + Sharding strategy: + ``gate_proj`` / ``up_proj`` -> ``tp_mode="colwise"``. + ``down_proj`` -> ``tp_mode="rowwise"`` + ``all_reduce`` (deferred when + used as a shared expert). + """ + + def __init__( + self, + config: Glm4MoeConfig, + intermediate_size: Optional[int] = None, + add_all_reduce: bool = True, + layer_type: str = "mlp", + ): super().__init__() self.hidden_size = config.hidden_size self.intermediate_size = intermediate_size or config.intermediate_size @@ -120,9 +136,34 @@ def __init__(self, config: Glm4MoeConfig, intermediate_size: Optional[int] = Non self.up_proj = nn.Linear(self.hidden_size, self.intermediate_size, bias=False) self.down_proj = nn.Linear(self.intermediate_size, self.hidden_size, bias=False) self.act_fn = ACT2FN[config.hidden_act] + self.add_all_reduce = add_all_reduce + self.layer_type = layer_type def forward(self, x: torch.Tensor) -> torch.Tensor: - return self.down_proj(self.act_fn(self.gate_proj(x)) * self.up_proj(x)) + gate = torch.ops.auto_deploy.torch_linear_simple( + x, + self.gate_proj.weight, + self.gate_proj.bias, + tp_mode="colwise", + layer_type=self.layer_type, + ) + up = torch.ops.auto_deploy.torch_linear_simple( + x, + self.up_proj.weight, + self.up_proj.bias, + tp_mode="colwise", + layer_type=self.layer_type, + ) + down = torch.ops.auto_deploy.torch_linear_simple( + self.act_fn(gate) * up, + self.down_proj.weight, + self.down_proj.bias, + tp_mode="rowwise", + layer_type=self.layer_type, + ) + if self.add_all_reduce: + down = torch.ops.auto_deploy.all_reduce(down, layer_type=self.layer_type) + return down class Glm4MoeMoEGate(nn.Module): @@ -171,7 +212,14 @@ def forward(self, hidden_states: torch.Tensor) -> Tuple[torch.Tensor, torch.Tens class Glm4MoeMoE(nn.Module): - """Mixture of Experts layer for GLM4 MoE.""" + """Mixture of Experts layer for GLM4 MoE. + + Routed experts are dispatched via ``torch_moe`` (sharded by + ``apply_sharding_hints`` using ``layer_type="moe"``). The shared expert is a + TP-sharded MLP whose closing all_reduce is deferred so the routed and + shared partial sums can be combined with a single + ``all_reduce(layer_type="moe")`` at the merge point. + """ def __init__(self, config: Glm4MoeConfig): super().__init__() @@ -186,7 +234,10 @@ def __init__(self, config: Glm4MoeConfig): self._register_load_state_dict_pre_hook(self._unpack_packed_expert_weights) self.gate = Glm4MoeMoEGate(config) self.shared_experts = Glm4MoeMLP( - config, intermediate_size=config.moe_intermediate_size * config.n_shared_experts + config, + intermediate_size=config.moe_intermediate_size * config.n_shared_experts, + add_all_reduce=False, + layer_type="moe", ) def _unpack_packed_expert_weights(self, state_dict, prefix, *args): @@ -207,11 +258,17 @@ def forward(self, hidden_states: torch.Tensor) -> torch.Tensor: w3_weight=[expert.up_proj.weight for expert in self.experts], is_gated_mlp=True, act_fn=int(ActivationType.Silu), + layer_type="moe", ) final_hidden_states = final_hidden_states.view(*orig_shape) final_hidden_states = final_hidden_states + self.shared_experts(identity) + # Single merge-point all_reduce for routed + shared partial sums. + final_hidden_states = torch.ops.auto_deploy.all_reduce( + final_hidden_states, layer_type="moe" + ) + return final_hidden_states @@ -220,6 +277,15 @@ class Glm4MoeAttention(nn.Module): GLM4 MoE uses partial_rotary_factor=0.5, applying RoPE only to the first half of the head dimensions. It also supports optional per-head QK normalization. + + Sharding strategy: + ``q_proj`` -> ``tp_mode="colwise"`` (sharded by ``num_heads``). + ``k_proj`` / ``v_proj`` -> ``tp_mode="colwise"`` with + ``tp_min_local_shape=head_dim`` (GQA-safe). + Q/K/V reshape -> ``auto_deploy.view`` with ``tp_scaled_dim=2`` (head + count dim scales with TP). + Post-attention reshape -> ``auto_deploy.view`` with ``tp_scaled_dim=2``. + ``o_proj`` -> ``tp_mode="rowwise"`` + ``all_reduce(layer_type="mha")``. """ def __init__(self, config: Glm4MoeConfig, layer_idx: Optional[int] = None): @@ -262,10 +328,49 @@ def forward( ) -> torch.Tensor: bsz, q_len, _ = hidden_states.size() - # Project Q/K/V and reshape to [B, S, N, head_dim] (BSND layout) - q = self.q_proj(hidden_states).view(bsz, q_len, self.num_heads, self.head_dim) - k = self.k_proj(hidden_states).view(bsz, q_len, self.num_kv_heads, self.head_dim) - v = self.v_proj(hidden_states).view(bsz, q_len, self.num_kv_heads, self.head_dim) + # Project Q/K/V and reshape to [B, S, N, head_dim] (BSND layout). + # Head-count dim (2) scales with TP, so use auto_deploy.view. + q = torch.ops.auto_deploy.torch_linear_simple( + hidden_states, + self.q_proj.weight, + self.q_proj.bias, + tp_mode="colwise", + layer_type="mha", + ) + q = torch.ops.auto_deploy.view( + q, + [bsz, q_len, self.num_heads, self.head_dim], + tp_scaled_dim=2, + layer_type="mha", + ) + k = torch.ops.auto_deploy.torch_linear_simple( + hidden_states, + self.k_proj.weight, + self.k_proj.bias, + tp_mode="colwise", + tp_min_local_shape=self.head_dim, + layer_type="mha", + ) + k = torch.ops.auto_deploy.view( + k, + [bsz, q_len, self.num_kv_heads, self.head_dim], + tp_scaled_dim=2, + layer_type="mha", + ) + v = torch.ops.auto_deploy.torch_linear_simple( + hidden_states, + self.v_proj.weight, + self.v_proj.bias, + tp_mode="colwise", + tp_min_local_shape=self.head_dim, + layer_type="mha", + ) + v = torch.ops.auto_deploy.view( + v, + [bsz, q_len, self.num_kv_heads, self.head_dim], + tp_scaled_dim=2, + layer_type="mha", + ) # Apply per-head Q/K normalization if enabled if self.use_qk_norm: @@ -307,9 +412,22 @@ def forward( "bsnd", # layout ) - # Reshape [B, S, N, head_dim] -> [B, S, N * head_dim] and project - attn_output = attn_output.reshape(bsz, q_len, self.num_heads * self.head_dim) - attn_output = self.o_proj(attn_output) + # Reshape [B, S, N, head_dim] -> [B, S, N * head_dim] and project. + # Collapsed dim scales with TP via num_heads. + attn_output = torch.ops.auto_deploy.view( + attn_output, + [bsz, q_len, self.num_heads * self.head_dim], + tp_scaled_dim=2, + layer_type="mha", + ) + attn_output = torch.ops.auto_deploy.torch_linear_simple( + attn_output, + self.o_proj.weight, + self.o_proj.bias, + tp_mode="rowwise", + layer_type="mha", + ) + attn_output = torch.ops.auto_deploy.all_reduce(attn_output, layer_type="mha") return attn_output diff --git a/tensorrt_llm/_torch/auto_deploy/models/custom/modeling_gpt_oss.py b/tensorrt_llm/_torch/auto_deploy/models/custom/modeling_gpt_oss.py index 1c98b9378cec..b8589c1227cc 100644 --- a/tensorrt_llm/_torch/auto_deploy/models/custom/modeling_gpt_oss.py +++ b/tensorrt_llm/_torch/auto_deploy/models/custom/modeling_gpt_oss.py @@ -36,6 +36,23 @@ * No ``repeat_kv`` (``torch_attention`` handles GQA natively) * RoPE cos/sin is computed once per forward and pre-sliced by ``position_ids`` * The HF config class ``GptOssConfig`` is reused directly from ``transformers`` + +Sharding-IR convention: every attention Linear is expressed via ``torch.ops.auto_deploy.torch_linear_simple`` +with sharding hint kwargs (``tp_mode``, ``tp_min_local_shape``, ``layer_type``), +and the post-attention all-reduce uses the ``auto_deploy.all_reduce`` placeholder. +The exported graph is a self-contained spec of how attention should be TP-sharded; +``apply_sharding_hints`` reads those hints + a runtime ``DistConfig`` to produce +deterministic, node-local sharding. + + * Attention q/k/v/o: ``torch_linear_simple`` (q/k/v colwise + + ``tp_min_local_shape=head_dim`` for GQA, o rowwise) + trailing ``all_reduce``. + * q/k/v/attn_out views use ``auto_deploy.view`` with ``tp_scaled_dim=2`` so the + head-count dimension scales with TP. + * MoE router + experts stay replicated under sharding-IR; EP/TP-MoE for the + trtllm-gen path is applied later by a separate ``ShardableNode``. + * ``lm_head`` stays as a plain ``nn.Linear`` — no canonical sharding-IR pattern + for col-parallel-linear-then-all-gather, and the gain is marginal + (~80 us/token at TP=4 for gpt-oss-120b). """ import math @@ -48,6 +65,8 @@ from transformers.modeling_utils import PreTrainedModel from transformers.utils import ModelOutput +from tensorrt_llm._utils import get_hf_rope_theta + from ..hf import AutoModelForCausalLMFactory # GPT-OSS hard-codes these in the HF reference (see modeling_gpt_oss.GptOssExperts). @@ -243,10 +262,9 @@ class GptOssExperts(nn.Module): custom GLU: ``(up + 1) * gate * sigmoid(alpha * gate)`` with clamps on gate (max=limit) and up (-limit, limit). - The MXFP4 quantization path replaces this op (and the upstream router op) - with ``triton_mxfp4_moe`` in the AD ``quantize_mxfp4_moe`` graph transform; - the ``_blocks`` / ``_scales`` parameters are registered there at transform - time so we do not declare them here. + Quantization (MXFP4 → Triton / TRT-LLM-Gen) is handled by the + ``quantize_mxfp4_moe`` transform, which rewrites the FX graph and swaps + parameters at PATTERN_MATCHER time (see :mod:`...transform.library.fused_moe_mxfp4`). """ def __init__(self, config): @@ -297,12 +315,21 @@ def forward(self, hidden_states: torch.Tensor) -> torch.Tensor: # --------------------------------------------------------------------------- -# Attention (GQA + sinks + per-layer sliding window) +# Attention (GQA + sinks + per-layer sliding window) -- sharding-IR variant # --------------------------------------------------------------------------- class GptOssAttention(nn.Module): - """GPT-OSS attention with learnable per-head sinks and optional sliding window.""" + """GPT-OSS attention with sharding hints (see module docstring for the + sharding-IR convention). + + Sharding strategy: + q_proj -> colwise (+ tp_min_local_shape=head_dim for GQA) + k_proj -> colwise (+ tp_min_local_shape=head_dim for GQA) + v_proj -> colwise (+ tp_min_local_shape=head_dim for GQA) + view -> tp_scaled_dim=2 (head-count dim shrinks with TP) + o_proj -> rowwise + auto_deploy.all_reduce + """ def __init__(self, config, layer_idx: int): super().__init__() @@ -343,16 +370,59 @@ def forward( ) -> torch.Tensor: bsz, q_len, _ = hidden_states.size() - # Project Q/K/V and reshape to [B, S, N, head_dim] (BSND layout). - q = self.q_proj(hidden_states).view(bsz, q_len, self.num_heads, self.head_dim) - k = self.k_proj(hidden_states).view(bsz, q_len, self.num_kv_heads, self.head_dim) - v = self.v_proj(hidden_states).view(bsz, q_len, self.num_kv_heads, self.head_dim) + # Project Q/K/V via torch_linear_simple with colwise sharding hints + # (tp_min_local_shape=head_dim guards GQA where num_kv_heads < tp_size). + q = torch.ops.auto_deploy.torch_linear_simple( + hidden_states, + self.q_proj.weight, + self.q_proj.bias, + tp_mode="colwise", + tp_min_local_shape=self.head_dim, + layer_type="mha", + ) + k = torch.ops.auto_deploy.torch_linear_simple( + hidden_states, + self.k_proj.weight, + self.k_proj.bias, + tp_mode="colwise", + tp_min_local_shape=self.head_dim, + layer_type="mha", + ) + v = torch.ops.auto_deploy.torch_linear_simple( + hidden_states, + self.v_proj.weight, + self.v_proj.bias, + tp_mode="colwise", + tp_min_local_shape=self.head_dim, + layer_type="mha", + ) + + # Reshape to [B, S, N, head_dim] (BSND layout). ``tp_scaled_dim=2`` lets the + # head-count axis shrink with TP after apply_sharding_hints rewrites the view. + q = torch.ops.auto_deploy.view( + q, + [bsz, q_len, self.num_heads, self.head_dim], + tp_scaled_dim=2, + layer_type="mha", + ) + k = torch.ops.auto_deploy.view( + k, + [bsz, q_len, self.num_kv_heads, self.head_dim], + tp_scaled_dim=2, + layer_type="mha", + ) + v = torch.ops.auto_deploy.view( + v, + [bsz, q_len, self.num_kv_heads, self.head_dim], + tp_scaled_dim=2, + layer_type="mha", + ) - cos, sin = position_embeddings # [B, S, head_dim] # Apply RoPE with unsqueeze_dim=2 for BSND layout. + cos, sin = position_embeddings q, k = torch.ops.auto_deploy.torch_rope_with_explicit_cos_sin(q, k, cos, sin, 2) - # ``torch_attention`` handles GQA natively; sinks/sliding_window are + # ``torch_attention`` handles GQA natively; sinks / sliding_window are # per-call kwargs. Causal mask is applied internally for prefill. attn_output = torch.ops.auto_deploy.torch_attention( q, @@ -366,9 +436,25 @@ def forward( sliding_window=self.sliding_window, layout="bsnd", ) + # [B, S, N, D] -> [B, S, N*D] - attn_output = attn_output.reshape(bsz, q_len, -1) - return self.o_proj(attn_output) + attn_output = torch.ops.auto_deploy.view( + attn_output, + [bsz, q_len, self.num_heads * self.head_dim], + tp_scaled_dim=2, + layer_type="mha", + ) + + # o_proj is rowwise; ``apply_sharding_hints`` adds the trailing all_reduce. + attn_output = torch.ops.auto_deploy.torch_linear_simple( + attn_output, + self.o_proj.weight, + self.o_proj.bias, + tp_mode="rowwise", + layer_type="mha", + ) + attn_output = torch.ops.auto_deploy.all_reduce(attn_output, layer_type="mha") + return attn_output # --------------------------------------------------------------------------- @@ -429,7 +515,7 @@ def __init__(self, config): self.rotary_emb = GptOssRotaryEmbedding( head_dim=head_dim, max_position_embeddings=config.max_position_embeddings, - rope_theta=float(getattr(config, "rope_theta", 10000.0)), + rope_theta=get_hf_rope_theta(config, 10000.0), rope_scaling=getattr(config, "rope_scaling", None), ) @@ -462,6 +548,7 @@ class GptOssForCausalLM(GptOssPreTrainedModel, GenerationMixin): def __init__(self, config): super().__init__(config) self.model = GptOssModel(config) + # lm_head stays as plain nn.Linear; see module docstring for rationale. self.lm_head = nn.Linear(config.hidden_size, config.vocab_size, bias=False) self.post_init() diff --git a/tensorrt_llm/_torch/auto_deploy/models/custom/modeling_granite.py b/tensorrt_llm/_torch/auto_deploy/models/custom/modeling_granite.py index f8de560c27e0..c88aee44f808 100644 --- a/tensorrt_llm/_torch/auto_deploy/models/custom/modeling_granite.py +++ b/tensorrt_llm/_torch/auto_deploy/models/custom/modeling_granite.py @@ -17,7 +17,7 @@ # See the License for the specific language governing permissions and # limitations under the License. -"""Slimmed down PyTorch Granite model implementation for auto_deploy export. +"""Granite model (sharding IR). Source: https://huggingface.co/ibm-granite/granite-3.1-2b-instruct @@ -96,7 +96,13 @@ def forward( class GraniteMLP(nn.Module): - """MLP layer for Granite (SwiGLU activation).""" + """MLP layer for Granite (SwiGLU activation). + + Sharding strategy: + gate_proj -> colwise + up_proj -> colwise + down_proj -> rowwise + all_reduce + """ def __init__(self, config: GraniteConfig): super().__init__() @@ -108,7 +114,29 @@ def __init__(self, config: GraniteConfig): self.act_fn = ACT2FN[config.hidden_act] def forward(self, x: torch.Tensor) -> torch.Tensor: - return self.down_proj(self.act_fn(self.gate_proj(x)) * self.up_proj(x)) + gate = torch.ops.auto_deploy.torch_linear_simple( + x, + self.gate_proj.weight, + self.gate_proj.bias, + tp_mode="colwise", + layer_type="mlp", + ) + up = torch.ops.auto_deploy.torch_linear_simple( + x, + self.up_proj.weight, + self.up_proj.bias, + tp_mode="colwise", + layer_type="mlp", + ) + down = torch.ops.auto_deploy.torch_linear_simple( + self.act_fn(gate) * up, + self.down_proj.weight, + self.down_proj.bias, + tp_mode="rowwise", + layer_type="mlp", + ) + down = torch.ops.auto_deploy.all_reduce(down, layer_type="mlp") + return down class GraniteAttention(nn.Module): @@ -119,6 +147,13 @@ class GraniteAttention(nn.Module): Key difference from Llama: uses config.attention_multiplier as the attention scaling factor instead of head_dim^(-0.5). + + Sharding strategy: + q_proj -> colwise (+ tp_min_local_shape for GQA) + k_proj -> colwise (+ tp_min_local_shape for GQA) + v_proj -> colwise (+ tp_min_local_shape for GQA) + view -> tp_scaled_dim=2 (head count dimension) + o_proj -> rowwise + all_reduce """ def __init__(self, config: GraniteConfig, layer_idx: Optional[int] = None): @@ -158,9 +193,48 @@ def forward( ) -> torch.Tensor: bsz, q_len, _ = hidden_states.size() - q = self.q_proj(hidden_states).view(bsz, q_len, self.num_heads, self.head_dim) - k = self.k_proj(hidden_states).view(bsz, q_len, self.num_kv_heads, self.head_dim) - v = self.v_proj(hidden_states).view(bsz, q_len, self.num_kv_heads, self.head_dim) + q = torch.ops.auto_deploy.torch_linear_simple( + hidden_states, + self.q_proj.weight, + self.q_proj.bias, + tp_mode="colwise", + tp_min_local_shape=self.head_dim, + layer_type="mha", + ) + k = torch.ops.auto_deploy.torch_linear_simple( + hidden_states, + self.k_proj.weight, + self.k_proj.bias, + tp_mode="colwise", + tp_min_local_shape=self.head_dim, + layer_type="mha", + ) + v = torch.ops.auto_deploy.torch_linear_simple( + hidden_states, + self.v_proj.weight, + self.v_proj.bias, + tp_mode="colwise", + tp_min_local_shape=self.head_dim, + layer_type="mha", + ) + q = torch.ops.auto_deploy.view( + q, + [bsz, q_len, self.num_heads, self.head_dim], + tp_scaled_dim=2, + layer_type="mha", + ) + k = torch.ops.auto_deploy.view( + k, + [bsz, q_len, self.num_kv_heads, self.head_dim], + tp_scaled_dim=2, + layer_type="mha", + ) + v = torch.ops.auto_deploy.view( + v, + [bsz, q_len, self.num_kv_heads, self.head_dim], + tp_scaled_dim=2, + layer_type="mha", + ) cos, sin = position_embeddings @@ -186,8 +260,20 @@ def forward( "bsnd", # layout ) - attn_output = attn_output.reshape(bsz, q_len, self.num_heads * self.head_dim) - attn_output = self.o_proj(attn_output) + attn_output = torch.ops.auto_deploy.view( + attn_output, + [bsz, q_len, self.num_heads * self.head_dim], + tp_scaled_dim=2, + layer_type="mha", + ) + attn_output = torch.ops.auto_deploy.torch_linear_simple( + attn_output, + self.o_proj.weight, + self.o_proj.bias, + tp_mode="rowwise", + layer_type="mha", + ) + attn_output = torch.ops.auto_deploy.all_reduce(attn_output, layer_type="mha") return attn_output diff --git a/tensorrt_llm/_torch/auto_deploy/models/custom/modeling_hunyuan_dense.py b/tensorrt_llm/_torch/auto_deploy/models/custom/modeling_hunyuan_dense.py index 3bc0d03d3a0b..55eb09d915ac 100644 --- a/tensorrt_llm/_torch/auto_deploy/models/custom/modeling_hunyuan_dense.py +++ b/tensorrt_llm/_torch/auto_deploy/models/custom/modeling_hunyuan_dense.py @@ -17,7 +17,7 @@ # See the License for the specific language governing permissions and # limitations under the License. -"""Prefill-only HunYuan Dense V1 model implementation for auto_deploy export. +"""HunYuan Dense V1 model (sharding IR). Source: https://huggingface.co/tencent/Hunyuan-MT-7B @@ -30,7 +30,7 @@ * Removed attention dropout (inference only) The HunYuan Dense V1 model is a Llama-like dense transformer with: -* Grouped-Query Attention (GQA) with QK normalization (RMSNorm on Q/K) +* Grouped-Query Attention (GQA) with QK normalization (RMSNorm on Q/K after RoPE) * Dynamic NTK-Alpha RoPE scaling * SiLU-gated MLP * Tied word embeddings @@ -125,7 +125,13 @@ def forward( class HunYuanDenseMLP(nn.Module): - """SiLU-gated MLP for HunYuan Dense V1.""" + """SiLU-gated MLP for HunYuan Dense V1. + + Sharding strategy: + gate_proj -> colwise + up_proj -> colwise + down_proj -> rowwise + all_reduce + """ def __init__(self, hidden_size: int, intermediate_size: int, hidden_act: str = "silu"): super().__init__() @@ -135,7 +141,29 @@ def __init__(self, hidden_size: int, intermediate_size: int, hidden_act: str = " self.act_fn = ACT2FN[hidden_act] def forward(self, x: torch.Tensor) -> torch.Tensor: - return self.down_proj(self.act_fn(self.gate_proj(x)) * self.up_proj(x)) + gate = torch.ops.auto_deploy.torch_linear_simple( + x, + self.gate_proj.weight, + self.gate_proj.bias, + tp_mode="colwise", + layer_type="mlp", + ) + up = torch.ops.auto_deploy.torch_linear_simple( + x, + self.up_proj.weight, + self.up_proj.bias, + tp_mode="colwise", + layer_type="mlp", + ) + down = torch.ops.auto_deploy.torch_linear_simple( + self.act_fn(gate) * up, + self.down_proj.weight, + self.down_proj.bias, + tp_mode="rowwise", + layer_type="mlp", + ) + down = torch.ops.auto_deploy.all_reduce(down, layer_type="mlp") + return down class HunYuanDenseAttention(nn.Module): @@ -143,6 +171,13 @@ class HunYuanDenseAttention(nn.Module): Applies RMSNorm to Q and K after RoPE (matching HF implementation order). Uses auto_deploy torch_attention and torch_rope_with_explicit_cos_sin ops. + + Sharding strategy: + q_proj -> colwise (+ tp_min_local_shape for GQA) + k_proj -> colwise (+ tp_min_local_shape for GQA) + v_proj -> colwise (+ tp_min_local_shape for GQA) + view -> tp_scaled_dim=2 (head count dimension) + o_proj -> rowwise + all_reduce """ def __init__( @@ -181,9 +216,48 @@ def forward( bsz, q_len, _ = hidden_states.size() # Project Q, K, V -> [B, S, N, D] (BSND layout) - q = self.q_proj(hidden_states).view(bsz, q_len, self.num_heads, self.head_dim) - k = self.k_proj(hidden_states).view(bsz, q_len, self.num_kv_heads, self.head_dim) - v = self.v_proj(hidden_states).view(bsz, q_len, self.num_kv_heads, self.head_dim) + q = torch.ops.auto_deploy.torch_linear_simple( + hidden_states, + self.q_proj.weight, + self.q_proj.bias, + tp_mode="colwise", + tp_min_local_shape=self.head_dim, + layer_type="mha", + ) + k = torch.ops.auto_deploy.torch_linear_simple( + hidden_states, + self.k_proj.weight, + self.k_proj.bias, + tp_mode="colwise", + tp_min_local_shape=self.head_dim, + layer_type="mha", + ) + v = torch.ops.auto_deploy.torch_linear_simple( + hidden_states, + self.v_proj.weight, + self.v_proj.bias, + tp_mode="colwise", + tp_min_local_shape=self.head_dim, + layer_type="mha", + ) + q = torch.ops.auto_deploy.view( + q, + [bsz, q_len, self.num_heads, self.head_dim], + tp_scaled_dim=2, + layer_type="mha", + ) + k = torch.ops.auto_deploy.view( + k, + [bsz, q_len, self.num_kv_heads, self.head_dim], + tp_scaled_dim=2, + layer_type="mha", + ) + v = torch.ops.auto_deploy.view( + v, + [bsz, q_len, self.num_kv_heads, self.head_dim], + tp_scaled_dim=2, + layer_type="mha", + ) # Get cos/sin from position_embeddings (full cached from shared rotary embedding) cos = position_embeddings[0] # [max_seq_len, head_dim] @@ -222,8 +296,20 @@ def forward( ) # Reshape and project output - attn_output = attn_output.reshape(bsz, q_len, self.num_heads * self.head_dim) - attn_output = self.o_proj(attn_output) + attn_output = torch.ops.auto_deploy.view( + attn_output, + [bsz, q_len, self.num_heads * self.head_dim], + tp_scaled_dim=2, + layer_type="mha", + ) + attn_output = torch.ops.auto_deploy.torch_linear_simple( + attn_output, + self.o_proj.weight, + self.o_proj.bias, + tp_mode="rowwise", + layer_type="mha", + ) + attn_output = torch.ops.auto_deploy.all_reduce(attn_output, layer_type="mha") return attn_output diff --git a/tensorrt_llm/_torch/auto_deploy/models/custom/modeling_llama3.py b/tensorrt_llm/_torch/auto_deploy/models/custom/modeling_llama3.py index 6d4b5041f38c..561c09a71ac1 100644 --- a/tensorrt_llm/_torch/auto_deploy/models/custom/modeling_llama3.py +++ b/tensorrt_llm/_torch/auto_deploy/models/custom/modeling_llama3.py @@ -17,7 +17,7 @@ # See the License for the specific language governing permissions and # limitations under the License. -"""Slimmed down PyTorch Llama 3 model implementation for auto_deploy export. +"""Llama 3 model (sharding IR). Source: https://huggingface.co/meta-llama/Llama-3.1-8B-Instruct @@ -94,7 +94,13 @@ def forward( class Llama3MLP(nn.Module): - """MLP layer for Llama 3 (SwiGLU activation).""" + """MLP layer for Llama 3 (SwiGLU activation). + + Sharding strategy: + gate_proj -> colwise + up_proj -> colwise + down_proj -> rowwise + all_reduce + """ def __init__(self, config: LlamaConfig): super().__init__() @@ -106,7 +112,29 @@ def __init__(self, config: LlamaConfig): self.act_fn = ACT2FN[config.hidden_act] def forward(self, x: torch.Tensor) -> torch.Tensor: - return self.down_proj(self.act_fn(self.gate_proj(x)) * self.up_proj(x)) + gate = torch.ops.auto_deploy.torch_linear_simple( + x, + self.gate_proj.weight, + self.gate_proj.bias, + tp_mode="colwise", + layer_type="mlp", + ) + up = torch.ops.auto_deploy.torch_linear_simple( + x, + self.up_proj.weight, + self.up_proj.bias, + tp_mode="colwise", + layer_type="mlp", + ) + down = torch.ops.auto_deploy.torch_linear_simple( + self.act_fn(gate) * up, + self.down_proj.weight, + self.down_proj.bias, + tp_mode="rowwise", + layer_type="mlp", + ) + down = torch.ops.auto_deploy.all_reduce(down, layer_type="mlp") + return down class Llama3Attention(nn.Module): @@ -114,6 +142,13 @@ class Llama3Attention(nn.Module): Uses AD canonical ops for attention and RoPE. GQA is handled natively by torch_attention — no repeat_kv needed. + + Sharding strategy: + q_proj -> colwise (+ tp_min_local_shape for GQA) + k_proj -> colwise (+ tp_min_local_shape for GQA) + v_proj -> colwise (+ tp_min_local_shape for GQA) + view -> tp_scaled_dim=2 (head count dimension) + o_proj -> rowwise + all_reduce """ def __init__(self, config: LlamaConfig, layer_idx: Optional[int] = None): @@ -154,9 +189,48 @@ def forward( bsz, q_len, _ = hidden_states.size() # Project Q/K/V and reshape to [B, S, N, head_dim] (BSND layout) - q = self.q_proj(hidden_states).view(bsz, q_len, self.num_heads, self.head_dim) - k = self.k_proj(hidden_states).view(bsz, q_len, self.num_kv_heads, self.head_dim) - v = self.v_proj(hidden_states).view(bsz, q_len, self.num_kv_heads, self.head_dim) + q = torch.ops.auto_deploy.torch_linear_simple( + hidden_states, + self.q_proj.weight, + self.q_proj.bias, + tp_mode="colwise", + tp_min_local_shape=self.head_dim, + layer_type="mha", + ) + k = torch.ops.auto_deploy.torch_linear_simple( + hidden_states, + self.k_proj.weight, + self.k_proj.bias, + tp_mode="colwise", + tp_min_local_shape=self.head_dim, + layer_type="mha", + ) + v = torch.ops.auto_deploy.torch_linear_simple( + hidden_states, + self.v_proj.weight, + self.v_proj.bias, + tp_mode="colwise", + tp_min_local_shape=self.head_dim, + layer_type="mha", + ) + q = torch.ops.auto_deploy.view( + q, + [bsz, q_len, self.num_heads, self.head_dim], + tp_scaled_dim=2, + layer_type="mha", + ) + k = torch.ops.auto_deploy.view( + k, + [bsz, q_len, self.num_kv_heads, self.head_dim], + tp_scaled_dim=2, + layer_type="mha", + ) + v = torch.ops.auto_deploy.view( + v, + [bsz, q_len, self.num_kv_heads, self.head_dim], + tp_scaled_dim=2, + layer_type="mha", + ) # Get pre-sliced cos/sin from position_embeddings (already indexed by position_ids) cos, sin = position_embeddings # [B, S, head_dim] @@ -186,8 +260,20 @@ def forward( ) # Reshape [B, S, N, head_dim] -> [B, S, N * head_dim] and project - attn_output = attn_output.reshape(bsz, q_len, self.num_heads * self.head_dim) - attn_output = self.o_proj(attn_output) + attn_output = torch.ops.auto_deploy.view( + attn_output, + [bsz, q_len, self.num_heads * self.head_dim], + tp_scaled_dim=2, + layer_type="mha", + ) + attn_output = torch.ops.auto_deploy.torch_linear_simple( + attn_output, + self.o_proj.weight, + self.o_proj.bias, + tp_mode="rowwise", + layer_type="mha", + ) + attn_output = torch.ops.auto_deploy.all_reduce(attn_output, layer_type="mha") return attn_output diff --git a/tensorrt_llm/_torch/auto_deploy/models/custom/modeling_llama3_ir.py b/tensorrt_llm/_torch/auto_deploy/models/custom/modeling_llama3_ir.py deleted file mode 100644 index 5ae0af50c6fc..000000000000 --- a/tensorrt_llm/_torch/auto_deploy/models/custom/modeling_llama3_ir.py +++ /dev/null @@ -1,445 +0,0 @@ -# Copyright 2018 The HuggingFace Team -# Licensed under the Apache License, Version 2.0. -# Original source: https://github.com/huggingface/transformers -# -# SPDX-FileCopyrightText: Copyright (c) 2022-2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. -# SPDX-License-Identifier: Apache-2.0 -# -# Licensed under the Apache License, Version 2.0 (the "License"); -# you may not use this file except in compliance with the License. -# You may obtain a copy of the License at -# -# http://www.apache.org/licenses/LICENSE-2.0 -# -# Unless required by applicable law or agreed to in writing, software -# distributed under the License is distributed on an "AS IS" BASIS, -# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -# See the License for the specific language governing permissions and -# limitations under the License. - -"""Llama 3 model with explicit sharding hint ops. - -This is a rewrite of modeling_llama3.py where all sharding-enabled operations use -AutoDeploy custom ops with sharding hint kwargs. The graph produced by this -model is a complete, self-contained specification of how this model should be -sharded. The ``apply_sharding_hints`` transform reads the hints together with a -runtime ``DistConfig`` to apply deterministic, node-local sharding. - -Shardable custom ops used: - - torch.ops.auto_deploy.torch_linear_simple (tp_mode, tp_min_local_shape, layer_type) - - torch.ops.auto_deploy.view (tp_scaled_dim, layer_type) - - torch.ops.auto_deploy.all_reduce (identity / dist.all_reduce, layer_type) -""" - -from dataclasses import dataclass -from typing import Optional, Tuple - -import torch -from torch import nn -from transformers.activations import ACT2FN -from transformers.generation import GenerationMixin -from transformers.modeling_rope_utils import ROPE_INIT_FUNCTIONS -from transformers.modeling_utils import PreTrainedModel -from transformers.models.llama.configuration_llama import LlamaConfig -from transformers.utils import ModelOutput - -from ... import custom_ops # noqa: F401 -- register all ops -from ..hf import AutoModelForCausalLMFactory -from .rotary_utils import RotaryEmbeddingBase, build_rope_cos_sin_cache - - -class Llama3RMSNorm(nn.Module): - """RMS Normalization for Llama using AutoDeploy torch_rmsnorm reference op.""" - - def __init__(self, hidden_size: int, eps: float = 1e-6): - super().__init__() - self.weight = nn.Parameter(torch.ones(hidden_size)) - self.variance_epsilon = eps - - def forward(self, hidden_states: torch.Tensor) -> torch.Tensor: - return torch.ops.auto_deploy.torch_rmsnorm( - hidden_states, self.weight, self.variance_epsilon - ) - - -class Llama3RotaryEmbedding(RotaryEmbeddingBase): - """Rotary Position Embedding for Llama 3 family. - - Supports all rope types (default, llama3, linear, dynamic, etc.) via - transformers ROPE_INIT_FUNCTIONS. Keeps only the small inv_freq buffer - before graph-cache transforms. - """ - - def __init__(self, config: LlamaConfig): - super().__init__() - if hasattr(config, "rope_scaling") and isinstance(config.rope_scaling, dict): - rope_type = config.rope_scaling.get( - "rope_type", config.rope_scaling.get("type", "default") - ) - else: - rope_type = "default" - - inv_freq, self.attention_scaling = ROPE_INIT_FUNCTIONS[rope_type](config, device=None) - self.max_position_embeddings = config.max_position_embeddings - self.register_buffer("inv_freq", inv_freq, persistent=False) - - def forward( - self, x: torch.Tensor, position_ids: torch.Tensor - ) -> Tuple[torch.Tensor, torch.Tensor]: - cos, sin = build_rope_cos_sin_cache( - self.inv_freq, self.max_position_embeddings, x, self.attention_scaling - ) - return cos[position_ids], sin[position_ids] - - -class Llama3MLP(nn.Module): - """MLP layer for Llama 3 (SwiGLU) with sharding hints. - - Sharding strategy: - gate_proj -> colwise - up_proj -> colwise - down_proj -> rowwise + all_reduce - """ - - def __init__(self, config: LlamaConfig): - super().__init__() - self.hidden_size = config.hidden_size - self.intermediate_size = config.intermediate_size - self.gate_proj = nn.Linear(self.hidden_size, self.intermediate_size, bias=config.mlp_bias) - self.up_proj = nn.Linear(self.hidden_size, self.intermediate_size, bias=config.mlp_bias) - self.down_proj = nn.Linear(self.intermediate_size, self.hidden_size, bias=config.mlp_bias) - self.act_fn = ACT2FN[config.hidden_act] - - def forward(self, x: torch.Tensor) -> torch.Tensor: - gate = torch.ops.auto_deploy.torch_linear_simple( - x, - self.gate_proj.weight, - self.gate_proj.bias, - tp_mode="colwise", - layer_type="mlp", - ) - up = torch.ops.auto_deploy.torch_linear_simple( - x, - self.up_proj.weight, - self.up_proj.bias, - tp_mode="colwise", - layer_type="mlp", - ) - down = torch.ops.auto_deploy.torch_linear_simple( - self.act_fn(gate) * up, - self.down_proj.weight, - self.down_proj.bias, - tp_mode="rowwise", - layer_type="mlp", - ) - down = torch.ops.auto_deploy.all_reduce(down, layer_type="mlp") - return down - - -class Llama3Attention(nn.Module): - """Grouped Query Attention for Llama 3 with sharding hints. - - Uses AD canonical ops for attention and RoPE. GQA is handled natively - by torch_attention — no repeat_kv needed. - - Sharding strategy: - q_proj -> colwise (+ tp_min_local_shape for GQA) - k_proj -> colwise (+ tp_min_local_shape for GQA) - v_proj -> colwise (+ tp_min_local_shape for GQA) - view -> tp_scaled_dim=2 (head count dimension) - o_proj -> rowwise + all_reduce - """ - - def __init__(self, config: LlamaConfig, layer_idx: Optional[int] = None): - super().__init__() - self.config = config - self.layer_idx = layer_idx - - self.hidden_size = config.hidden_size - self.num_heads = config.num_attention_heads - self.num_kv_heads = config.num_key_value_heads - self.head_dim = ( - getattr(config, "head_dim", None) or config.hidden_size // config.num_attention_heads - ) - self.scaling = self.head_dim ** (-0.5) - - self.q_proj = nn.Linear( - self.hidden_size, self.num_heads * self.head_dim, bias=config.attention_bias - ) - self.k_proj = nn.Linear( - self.hidden_size, - self.num_kv_heads * self.head_dim, - bias=config.attention_bias, - ) - self.v_proj = nn.Linear( - self.hidden_size, - self.num_kv_heads * self.head_dim, - bias=config.attention_bias, - ) - self.o_proj = nn.Linear( - self.num_heads * self.head_dim, self.hidden_size, bias=config.attention_bias - ) - - def forward( - self, - hidden_states: torch.Tensor, - position_embeddings: Tuple[torch.Tensor, torch.Tensor], - ) -> torch.Tensor: - bsz, q_len, _ = hidden_states.size() - - q = torch.ops.auto_deploy.torch_linear_simple( - hidden_states, - self.q_proj.weight, - self.q_proj.bias, - tp_mode="colwise", - tp_min_local_shape=self.head_dim, - layer_type="mha", - ) - k = torch.ops.auto_deploy.torch_linear_simple( - hidden_states, - self.k_proj.weight, - self.k_proj.bias, - tp_mode="colwise", - tp_min_local_shape=self.head_dim, - layer_type="mha", - ) - v = torch.ops.auto_deploy.torch_linear_simple( - hidden_states, - self.v_proj.weight, - self.v_proj.bias, - tp_mode="colwise", - tp_min_local_shape=self.head_dim, - layer_type="mha", - ) - - q = torch.ops.auto_deploy.view( - q, - [bsz, q_len, self.num_heads, self.head_dim], - tp_scaled_dim=2, - layer_type="mha", - ) - k = torch.ops.auto_deploy.view( - k, - [bsz, q_len, self.num_kv_heads, self.head_dim], - tp_scaled_dim=2, - layer_type="mha", - ) - v = torch.ops.auto_deploy.view( - v, - [bsz, q_len, self.num_kv_heads, self.head_dim], - tp_scaled_dim=2, - layer_type="mha", - ) - - cos, sin = position_embeddings - q, k = torch.ops.auto_deploy.torch_rope_with_explicit_cos_sin( - q, - k, - cos, - sin, - 2, - ) - - attn_output = torch.ops.auto_deploy.torch_attention( - q, - k, - v, - None, - 0.0, - True, - self.scaling, - None, - None, - None, - "bsnd", - ) - - attn_output = torch.ops.auto_deploy.view( - attn_output, - [bsz, q_len, self.num_heads * self.head_dim], - tp_scaled_dim=2, - layer_type="mha", - ) - - attn_output = torch.ops.auto_deploy.torch_linear_simple( - attn_output, - self.o_proj.weight, - self.o_proj.bias, - tp_mode="rowwise", - layer_type="mha", - ) - attn_output = torch.ops.auto_deploy.all_reduce(attn_output, layer_type="mha") - - return attn_output - - -class Llama3DecoderLayer(nn.Module): - """Transformer decoder layer for Llama 3.""" - - def __init__(self, config: LlamaConfig, layer_idx: int): - super().__init__() - self.hidden_size = config.hidden_size - - self.self_attn = Llama3Attention(config, layer_idx=layer_idx) - self.mlp = Llama3MLP(config) - self.input_layernorm = Llama3RMSNorm(config.hidden_size, eps=config.rms_norm_eps) - self.post_attention_layernorm = Llama3RMSNorm(config.hidden_size, eps=config.rms_norm_eps) - - def forward( - self, - hidden_states: torch.Tensor, - position_embeddings: Tuple[torch.Tensor, torch.Tensor], - ) -> torch.Tensor: - residual = hidden_states - hidden_states = self.input_layernorm(hidden_states) - hidden_states = self.self_attn(hidden_states, position_embeddings) - hidden_states = residual + hidden_states - - residual = hidden_states - hidden_states = self.post_attention_layernorm(hidden_states) - hidden_states = self.mlp(hidden_states) - hidden_states = residual + hidden_states - - return hidden_states - - -@dataclass -class Llama3Output(ModelOutput): - """Output for Llama3Model.""" - - last_hidden_state: Optional[torch.FloatTensor] = None - - -@dataclass -class Llama3CausalLMOutput(ModelOutput): - """Output for Llama3ForCausalLM.""" - - logits: Optional[torch.FloatTensor] = None - - -class Llama3PreTrainedModel(PreTrainedModel): - """Base class for Llama 3 models.""" - - config_class = LlamaConfig - base_model_prefix = "model" - _no_split_modules = ["Llama3DecoderLayer"] - supports_gradient_checkpointing = False - - def _init_weights(self, module): - std = self.config.initializer_range - if isinstance(module, nn.Linear): - module.weight.data.normal_(mean=0.0, std=std) - if module.bias is not None: - module.bias.data.zero_() - elif isinstance(module, nn.Embedding): - module.weight.data.normal_(mean=0.0, std=std) - if module.padding_idx is not None: - module.weight.data[module.padding_idx].zero_() - - -class Llama3Model(Llama3PreTrainedModel): - """Llama 3 transformer decoder model.""" - - def __init__(self, config: LlamaConfig): - super().__init__(config) - self.config = config - self.padding_idx = config.pad_token_id - self.vocab_size = config.vocab_size - - self.embed_tokens = nn.Embedding(config.vocab_size, config.hidden_size, self.padding_idx) - self.layers = nn.ModuleList( - [Llama3DecoderLayer(config, layer_idx=idx) for idx in range(config.num_hidden_layers)] - ) - self.norm = Llama3RMSNorm(config.hidden_size, eps=config.rms_norm_eps) - - self.rotary_emb = Llama3RotaryEmbedding(config) - - self.post_init() - - def get_input_embeddings(self): - return self.embed_tokens - - def set_input_embeddings(self, value): - self.embed_tokens = value - - def forward( - self, - input_ids: Optional[torch.LongTensor] = None, - position_ids: Optional[torch.LongTensor] = None, - inputs_embeds: Optional[torch.FloatTensor] = None, - **kwargs, - ) -> Llama3Output: - if input_ids is not None and inputs_embeds is not None: - raise ValueError("Cannot specify both input_ids and inputs_embeds") - elif input_ids is None and inputs_embeds is None: - raise ValueError("Must specify either input_ids or inputs_embeds") - - assert position_ids is not None, "position_ids must be provided for AD export" - - if inputs_embeds is None: - inputs_embeds = self.embed_tokens(input_ids) - - inputs_embeds = inputs_embeds.to(self.norm.weight.dtype) - - position_embeddings = self.rotary_emb(inputs_embeds, position_ids) - - hidden_states = inputs_embeds - - for decoder_layer in self.layers: - hidden_states = decoder_layer(hidden_states, position_embeddings) - - hidden_states = self.norm(hidden_states) - - return Llama3Output(last_hidden_state=hidden_states) - - -class Llama3ForCausalLM(Llama3PreTrainedModel, GenerationMixin): - """Llama 3 model with language modeling head.""" - - _tied_weights_keys = ["lm_head.weight"] - - def __init__(self, config, **kwargs): - super().__init__(config) - self.model = Llama3Model(config) - self.vocab_size = config.vocab_size - self.lm_head = nn.Linear(config.hidden_size, config.vocab_size, bias=False) - - self.post_init() - - def get_input_embeddings(self): - return self.model.embed_tokens - - def set_input_embeddings(self, value): - self.model.embed_tokens = value - - def get_output_embeddings(self): - return self.lm_head - - def set_output_embeddings(self, new_embeddings): - self.lm_head = new_embeddings - - def get_decoder(self): - return self.model - - def forward( - self, - input_ids: Optional[torch.LongTensor] = None, - position_ids: Optional[torch.LongTensor] = None, - inputs_embeds: Optional[torch.FloatTensor] = None, - **kwargs, - ) -> Llama3CausalLMOutput: - assert position_ids is not None, "position_ids must be provided for AD export" - outputs = self.model( - input_ids=input_ids, - position_ids=position_ids, - inputs_embeds=inputs_embeds, - **kwargs, - ) - - hidden_states = outputs.last_hidden_state - logits = self.lm_head(hidden_states).float() - - return Llama3CausalLMOutput(logits=logits) - - -AutoModelForCausalLMFactory.register_custom_model_cls("LlamaConfig", Llama3ForCausalLM) diff --git a/tensorrt_llm/_torch/auto_deploy/models/custom/modeling_llama4.py b/tensorrt_llm/_torch/auto_deploy/models/custom/modeling_llama4.py index 62b76dd64f12..6ed135413c5f 100644 --- a/tensorrt_llm/_torch/auto_deploy/models/custom/modeling_llama4.py +++ b/tensorrt_llm/_torch/auto_deploy/models/custom/modeling_llama4.py @@ -17,7 +17,7 @@ # See the License for the specific language governing permissions and # limitations under the License. -"""Slimmed down PyTorch Llama 4 model implementation for auto_deploy export. +"""Llama 4 model (sharding IR). Source: https://huggingface.co/meta-llama/Llama-4-Scout-17B-16E-Instruct @@ -36,6 +36,14 @@ * L2 QK normalization on RoPE layers * Attention temperature tuning on NoPE layers * MoE layers with sigmoid router + shared expert (interleaved with dense MLP) + +Sharding note: the routed MoE is expressed as stacked-weight ``torch.bmm`` ops +(matching the HF checkpoint format). The ``match_bmm_moe_pattern`` transform +rewrites those into list-based ``torch_moe`` (with ``layer_type="moe"`` by +default) before the sharding stage runs, so sharding hints inside this file +target only the surrounding modules (router stays TP-replicated, the shared +expert MLP is wired with ``add_all_reduce=False, layer_type="moe"`` to defer +its closing all_reduce to the merge point with the routed sum). """ from dataclasses import dataclass @@ -146,9 +154,26 @@ def forward(self, x: torch.Tensor) -> torch.Tensor: class Llama4MLP(nn.Module): - """MLP layer for Llama 4 (SwiGLU activation).""" + """MLP layer for Llama 4 (SwiGLU activation). + + Used both as the dense MLP in non-MoE layers and as the shared expert + inside ``Llama4MoE``. When used as a shared expert, ``add_all_reduce=False`` + and ``layer_type="moe"`` so the closing all_reduce is deferred to the merge + point with the routed expert output. - def __init__(self, config: Llama4TextConfig, intermediate_size: Optional[int] = None): + Sharding strategy: + ``gate_proj`` / ``up_proj`` -> ``tp_mode="colwise"``. + ``down_proj`` -> ``tp_mode="rowwise"`` + ``all_reduce`` (deferred when + used as a shared expert). + """ + + def __init__( + self, + config: Llama4TextConfig, + intermediate_size: Optional[int] = None, + add_all_reduce: bool = True, + layer_type: str = "mlp", + ): super().__init__() if intermediate_size is None: intermediate_size = config.intermediate_size @@ -156,9 +181,34 @@ def __init__(self, config: Llama4TextConfig, intermediate_size: Optional[int] = self.up_proj = nn.Linear(config.hidden_size, intermediate_size, bias=False) self.down_proj = nn.Linear(intermediate_size, config.hidden_size, bias=False) self.act_fn = ACT2FN[config.hidden_act] + self.add_all_reduce = add_all_reduce + self.layer_type = layer_type def forward(self, x: torch.Tensor) -> torch.Tensor: - return self.down_proj(self.act_fn(self.gate_proj(x)) * self.up_proj(x)) + gate = torch.ops.auto_deploy.torch_linear_simple( + x, + self.gate_proj.weight, + self.gate_proj.bias, + tp_mode="colwise", + layer_type=self.layer_type, + ) + up = torch.ops.auto_deploy.torch_linear_simple( + x, + self.up_proj.weight, + self.up_proj.bias, + tp_mode="colwise", + layer_type=self.layer_type, + ) + down = torch.ops.auto_deploy.torch_linear_simple( + self.act_fn(gate) * up, + self.down_proj.weight, + self.down_proj.bias, + tp_mode="rowwise", + layer_type=self.layer_type, + ) + if self.add_all_reduce: + down = torch.ops.auto_deploy.all_reduce(down, layer_type=self.layer_type) + return down # ========================================================================= @@ -230,6 +280,16 @@ class Llama4MoE(nn.Module): - Sigmoid-based top-k routing (not softmax) - Shared expert (dense MLP added to routed output) - Routing weight scales input before expert MLP + + Sharding strategy: + Router (TP-replicated ``nn.Linear``) stays unsharded. + Routed experts are sharded by ``apply_sharding_hints`` after + ``match_bmm_moe_pattern`` rewrites the BMM pattern into ``torch_moe`` + (which carries ``layer_type="moe"`` by default). + Shared expert MLP is constructed with ``add_all_reduce=False, + layer_type="moe"`` so its closing all_reduce is deferred and combined + with the routed partial sum via a single + ``all_reduce(layer_type="moe")`` at the merge point. """ def __init__(self, config: Llama4TextConfig): @@ -239,7 +299,7 @@ def __init__(self, config: Llama4TextConfig): self.num_experts = config.num_local_experts self.experts = Llama4Experts(config) self.router = Llama4Router(config) - self.shared_expert = Llama4MLP(config) + self.shared_expert = Llama4MLP(config, add_all_reduce=False, layer_type="moe") def forward(self, hidden_states: torch.Tensor) -> torch.Tensor: orig_shape = hidden_states.shape @@ -250,6 +310,8 @@ def forward(self, hidden_states: torch.Tensor) -> torch.Tensor: routed_out = self.experts(routed_in) out = self.shared_expert(hidden_states) out = out + routed_out.reshape(router_scores.shape[1], -1, routed_out.shape[-1]).sum(dim=0) + # Single merge-point all_reduce for routed + shared partial sums. + out = torch.ops.auto_deploy.all_reduce(out, layer_type="moe") return out.view(*orig_shape) @@ -268,6 +330,15 @@ class Llama4Attention(nn.Module): - NoPE layers: skip RoPE application based on config - L2 QK norm on RoPE layers (when use_qk_norm=True) - Attention temperature tuning on NoPE layers + + Sharding strategy: + ``q_proj`` -> ``tp_mode="colwise"`` (sharded by ``num_heads``). + ``k_proj`` / ``v_proj`` -> ``tp_mode="colwise"`` with + ``tp_min_local_shape=head_dim`` (GQA-safe). + Q/K/V reshape -> ``auto_deploy.view`` with ``tp_scaled_dim=2`` (head + count dim scales with TP). + Post-attention reshape -> ``auto_deploy.view`` with ``tp_scaled_dim=2``. + ``o_proj`` -> ``tp_mode="rowwise"`` + ``all_reduce(layer_type="mha")``. """ def __init__(self, config: Llama4TextConfig, layer_idx: int): @@ -307,10 +378,49 @@ def forward( ) -> torch.Tensor: bsz, q_len, _ = hidden_states.size() - # Project Q/K/V — use BSND layout throughout - q = self.q_proj(hidden_states).view(bsz, q_len, self.num_heads, self.head_dim) - k = self.k_proj(hidden_states).view(bsz, q_len, self.num_kv_heads, self.head_dim) - v = self.v_proj(hidden_states).view(bsz, q_len, self.num_kv_heads, self.head_dim) + # Project Q/K/V — use BSND layout throughout. + # Head-count dim (2) scales with TP, so use auto_deploy.view. + q = torch.ops.auto_deploy.torch_linear_simple( + hidden_states, + self.q_proj.weight, + self.q_proj.bias, + tp_mode="colwise", + layer_type="mha", + ) + q = torch.ops.auto_deploy.view( + q, + [bsz, q_len, self.num_heads, self.head_dim], + tp_scaled_dim=2, + layer_type="mha", + ) + k = torch.ops.auto_deploy.torch_linear_simple( + hidden_states, + self.k_proj.weight, + self.k_proj.bias, + tp_mode="colwise", + tp_min_local_shape=self.head_dim, + layer_type="mha", + ) + k = torch.ops.auto_deploy.view( + k, + [bsz, q_len, self.num_kv_heads, self.head_dim], + tp_scaled_dim=2, + layer_type="mha", + ) + v = torch.ops.auto_deploy.torch_linear_simple( + hidden_states, + self.v_proj.weight, + self.v_proj.bias, + tp_mode="colwise", + tp_min_local_shape=self.head_dim, + layer_type="mha", + ) + v = torch.ops.auto_deploy.view( + v, + [bsz, q_len, self.num_kv_heads, self.head_dim], + tp_scaled_dim=2, + layer_type="mha", + ) # Apply RoPE (only on RoPE layers) if self.use_rope: @@ -355,9 +465,22 @@ def forward( "bsnd", # layout ) - # Reshape [B, S, N, head_dim] -> [B, S, N * head_dim] and project - attn_output = attn_output.reshape(bsz, q_len, self.num_heads * self.head_dim) - attn_output = self.o_proj(attn_output) + # Reshape [B, S, N, head_dim] -> [B, S, N * head_dim] and project. + # Collapsed dim scales with TP via num_heads. + attn_output = torch.ops.auto_deploy.view( + attn_output, + [bsz, q_len, self.num_heads * self.head_dim], + tp_scaled_dim=2, + layer_type="mha", + ) + attn_output = torch.ops.auto_deploy.torch_linear_simple( + attn_output, + self.o_proj.weight, + self.o_proj.bias, + tp_mode="rowwise", + layer_type="mha", + ) + attn_output = torch.ops.auto_deploy.all_reduce(attn_output, layer_type="mha") return attn_output diff --git a/tensorrt_llm/_torch/auto_deploy/models/custom/modeling_mistral.py b/tensorrt_llm/_torch/auto_deploy/models/custom/modeling_mistral.py index 321923e06cfb..a4e04c8d897a 100644 --- a/tensorrt_llm/_torch/auto_deploy/models/custom/modeling_mistral.py +++ b/tensorrt_llm/_torch/auto_deploy/models/custom/modeling_mistral.py @@ -17,7 +17,7 @@ # See the License for the specific language governing permissions and # limitations under the License. -"""Slimmed down PyTorch Mistral model implementation for auto_deploy export. +"""Mistral model (sharding IR). Source: https://huggingface.co/mistralai/Mistral-7B-Instruct-v0.3 @@ -95,7 +95,13 @@ def forward( class MistralMLP(nn.Module): - """MLP layer for Mistral (SwiGLU activation).""" + """MLP layer for Mistral (SwiGLU activation). + + Sharding strategy: + gate_proj -> colwise + up_proj -> colwise + down_proj -> rowwise + all_reduce + """ def __init__(self, config: MistralConfig): super().__init__() @@ -107,7 +113,29 @@ def __init__(self, config: MistralConfig): self.act_fn = ACT2FN[config.hidden_act] def forward(self, x: torch.Tensor) -> torch.Tensor: - return self.down_proj(self.act_fn(self.gate_proj(x)) * self.up_proj(x)) + gate = torch.ops.auto_deploy.torch_linear_simple( + x, + self.gate_proj.weight, + self.gate_proj.bias, + tp_mode="colwise", + layer_type="mlp", + ) + up = torch.ops.auto_deploy.torch_linear_simple( + x, + self.up_proj.weight, + self.up_proj.bias, + tp_mode="colwise", + layer_type="mlp", + ) + down = torch.ops.auto_deploy.torch_linear_simple( + self.act_fn(gate) * up, + self.down_proj.weight, + self.down_proj.bias, + tp_mode="rowwise", + layer_type="mlp", + ) + down = torch.ops.auto_deploy.all_reduce(down, layer_type="mlp") + return down class MistralAttention(nn.Module): @@ -116,6 +144,13 @@ class MistralAttention(nn.Module): Uses AD canonical ops for attention and RoPE. GQA is handled natively by torch_attention — no repeat_kv needed. Supports sliding window attention via the AD attention op's sliding_window parameter. + + Sharding strategy: + q_proj -> colwise (+ tp_min_local_shape for GQA) + k_proj -> colwise (+ tp_min_local_shape for GQA) + v_proj -> colwise (+ tp_min_local_shape for GQA) + view -> tp_scaled_dim=2 (head count dimension) + o_proj -> rowwise + all_reduce """ def __init__(self, config: MistralConfig, layer_idx: Optional[int] = None): @@ -145,9 +180,48 @@ def forward( bsz, q_len, _ = hidden_states.size() # Project Q/K/V and reshape to [B, S, N, head_dim] (BSND layout) - q = self.q_proj(hidden_states).view(bsz, q_len, self.num_heads, self.head_dim) - k = self.k_proj(hidden_states).view(bsz, q_len, self.num_kv_heads, self.head_dim) - v = self.v_proj(hidden_states).view(bsz, q_len, self.num_kv_heads, self.head_dim) + q = torch.ops.auto_deploy.torch_linear_simple( + hidden_states, + self.q_proj.weight, + self.q_proj.bias, + tp_mode="colwise", + tp_min_local_shape=self.head_dim, + layer_type="mha", + ) + k = torch.ops.auto_deploy.torch_linear_simple( + hidden_states, + self.k_proj.weight, + self.k_proj.bias, + tp_mode="colwise", + tp_min_local_shape=self.head_dim, + layer_type="mha", + ) + v = torch.ops.auto_deploy.torch_linear_simple( + hidden_states, + self.v_proj.weight, + self.v_proj.bias, + tp_mode="colwise", + tp_min_local_shape=self.head_dim, + layer_type="mha", + ) + q = torch.ops.auto_deploy.view( + q, + [bsz, q_len, self.num_heads, self.head_dim], + tp_scaled_dim=2, + layer_type="mha", + ) + k = torch.ops.auto_deploy.view( + k, + [bsz, q_len, self.num_kv_heads, self.head_dim], + tp_scaled_dim=2, + layer_type="mha", + ) + v = torch.ops.auto_deploy.view( + v, + [bsz, q_len, self.num_kv_heads, self.head_dim], + tp_scaled_dim=2, + layer_type="mha", + ) # Get pre-sliced cos/sin from position_embeddings (already indexed by position_ids) cos, sin = position_embeddings # [B, S, head_dim] @@ -177,8 +251,20 @@ def forward( ) # Reshape [B, S, N, head_dim] -> [B, S, N * head_dim] and project - attn_output = attn_output.reshape(bsz, q_len, self.num_heads * self.head_dim) - attn_output = self.o_proj(attn_output) + attn_output = torch.ops.auto_deploy.view( + attn_output, + [bsz, q_len, self.num_heads * self.head_dim], + tp_scaled_dim=2, + layer_type="mha", + ) + attn_output = torch.ops.auto_deploy.torch_linear_simple( + attn_output, + self.o_proj.weight, + self.o_proj.bias, + tp_mode="rowwise", + layer_type="mha", + ) + attn_output = torch.ops.auto_deploy.all_reduce(attn_output, layer_type="mha") return attn_output diff --git a/tensorrt_llm/_torch/auto_deploy/models/custom/modeling_qwen3_5_moe.py b/tensorrt_llm/_torch/auto_deploy/models/custom/modeling_qwen3_5_moe.py index 8d37ede0ea39..7c6071081fa1 100644 --- a/tensorrt_llm/_torch/auto_deploy/models/custom/modeling_qwen3_5_moe.py +++ b/tensorrt_llm/_torch/auto_deploy/models/custom/modeling_qwen3_5_moe.py @@ -55,12 +55,22 @@ ) try: + from tensorrt_llm.inputs.content_format import ContentFormat from tensorrt_llm.inputs.multimodal import MultimodalInput, apply_mm_hashes, hexdigest_to_int32 + from tensorrt_llm.inputs.registry import ( + MULTIMODAL_PLACEHOLDER_REGISTRY, + MultimodalPlaceholderMetadata, + MultimodalPlaceholderPlacement, + ) from tensorrt_llm.inputs.utils import VideoData except ModuleNotFoundError: + ContentFormat = None MultimodalInput = None apply_mm_hashes = None hexdigest_to_int32 = None + MULTIMODAL_PLACEHOLDER_REGISTRY = None + MultimodalPlaceholderMetadata = None + MultimodalPlaceholderPlacement = None VideoData = None @@ -3075,3 +3085,17 @@ def init_input_processor(self, base): "Qwen3_5MoeConfig", Qwen3_5MoeForConditionalGeneration ) Qwen3_5MoeFactory.register_custom_model_cls("Qwen3_5MoeConfig", Qwen3_5MoeForConditionalGeneration) + +if MULTIMODAL_PLACEHOLDER_REGISTRY is not None: + MULTIMODAL_PLACEHOLDER_REGISTRY.set_placeholder_metadata( + "qwen3_5_moe", + MultimodalPlaceholderMetadata( + placeholder_map={ + "image": "<|vision_start|><|image_pad|><|vision_end|>", + "video": "<|vision_start|><|video_pad|><|vision_end|>", + }, + placeholder_placement=MultimodalPlaceholderPlacement.BEFORE_TEXT, + placeholders_separator="", + content_format=ContentFormat.STRING, + ), + ) diff --git a/tensorrt_llm/_torch/auto_deploy/models/custom/modeling_qwen3_moe.py b/tensorrt_llm/_torch/auto_deploy/models/custom/modeling_qwen3_moe.py index c36daefc4387..c6da95bc1c86 100644 --- a/tensorrt_llm/_torch/auto_deploy/models/custom/modeling_qwen3_moe.py +++ b/tensorrt_llm/_torch/auto_deploy/models/custom/modeling_qwen3_moe.py @@ -17,7 +17,7 @@ # See the License for the specific language governing permissions and # limitations under the License. -"""Slimmed down PyTorch Qwen3 MoE model implementation for auto_deploy export. +"""Qwen3 MoE model (sharding IR). Source: https://huggingface.co/Qwen/Qwen3-30B-A3B @@ -95,7 +95,16 @@ def forward( class Qwen3MoeMLP(nn.Module): - """MLP layer for Qwen3 MoE (SwiGLU activation).""" + """MLP layer for Qwen3 MoE (SwiGLU activation). + + Used as the dense MLP in non-MoE layers; for MoE layers each expert is a + separate instance whose weights are consumed directly by ``torch_moe`` + (this ``forward`` is not invoked then). + + Sharding strategy (when used as a dense MLP): + ``gate_proj`` / ``up_proj`` -> ``tp_mode="colwise"``. + ``down_proj`` -> ``tp_mode="rowwise"`` + ``all_reduce(layer_type="mlp")``. + """ def __init__(self, config: Qwen3MoeConfig, intermediate_size: Optional[int] = None): super().__init__() @@ -110,7 +119,29 @@ def __init__(self, config: Qwen3MoeConfig, intermediate_size: Optional[int] = No self.act_fn = ACT2FN[config.hidden_act] def forward(self, x: torch.Tensor) -> torch.Tensor: - return self.down_proj(self.act_fn(self.gate_proj(x)) * self.up_proj(x)) + gate = torch.ops.auto_deploy.torch_linear_simple( + x, + self.gate_proj.weight, + self.gate_proj.bias, + tp_mode="colwise", + layer_type="mlp", + ) + up = torch.ops.auto_deploy.torch_linear_simple( + x, + self.up_proj.weight, + self.up_proj.bias, + tp_mode="colwise", + layer_type="mlp", + ) + down = torch.ops.auto_deploy.torch_linear_simple( + self.act_fn(gate) * up, + self.down_proj.weight, + self.down_proj.bias, + tp_mode="rowwise", + layer_type="mlp", + ) + down = torch.ops.auto_deploy.all_reduce(down, layer_type="mlp") + return down class Qwen3MoeSparseMoeBlock(nn.Module): @@ -118,6 +149,13 @@ class Qwen3MoeSparseMoeBlock(nn.Module): Uses softmax top-k routing with optional probability normalization. Expert computation is handled by the torch_moe canonical op. + + Sharding strategy: + Router ``gate`` is TP-replicated (unsharded ``nn.Linear``); routing + decisions are identical on every rank. + Expert weights are sharded by ``apply_sharding_hints`` via the + ``torch_moe`` op carrying ``layer_type="moe"`` (EP/TP). + A single ``all_reduce(layer_type="moe")`` follows ``torch_moe``. """ def __init__(self, config: Qwen3MoeConfig): @@ -206,6 +244,10 @@ def forward(self, hidden_states: torch.Tensor) -> Tuple[torch.Tensor, torch.Tens w1_weight=[expert.gate_proj.weight for expert in self.experts], w2_weight=[expert.down_proj.weight for expert in self.experts], w3_weight=[expert.up_proj.weight for expert in self.experts], + layer_type="moe", + ) + final_hidden_states = torch.ops.auto_deploy.all_reduce( + final_hidden_states, layer_type="moe" ) final_hidden_states = final_hidden_states.reshape(batch_size, sequence_length, hidden_dim) @@ -218,6 +260,15 @@ class Qwen3MoeAttention(nn.Module): Qwen3 MoE applies RMSNorm to query and key states after projection and reshaping, but before RoPE application. This per-head normalization on head_dim is a key architectural feature shared with the dense Qwen3 model. + + Sharding strategy: + ``q_proj`` -> ``tp_mode="colwise"`` (sharded by ``num_heads``). + ``k_proj`` / ``v_proj`` -> ``tp_mode="colwise"`` with + ``tp_min_local_shape=head_dim`` (GQA-safe). + Q/K/V reshape -> ``auto_deploy.view`` with ``tp_scaled_dim=2`` (head + count dim scales with TP). + Post-attention reshape -> ``auto_deploy.view`` with ``tp_scaled_dim=2``. + ``o_proj`` -> ``tp_mode="rowwise"`` + ``all_reduce(layer_type="mha")``. """ def __init__(self, config: Qwen3MoeConfig, layer_idx: Optional[int] = None): @@ -258,10 +309,49 @@ def forward( ) -> torch.Tensor: bsz, q_len, _ = hidden_states.size() - # Project Q/K/V and reshape to [B, S, N, head_dim] (BSND layout) - q = self.q_proj(hidden_states).view(bsz, q_len, self.num_heads, self.head_dim) - k = self.k_proj(hidden_states).view(bsz, q_len, self.num_kv_heads, self.head_dim) - v = self.v_proj(hidden_states).view(bsz, q_len, self.num_kv_heads, self.head_dim) + # Project Q/K/V and reshape to [B, S, N, head_dim] (BSND layout). + # Head-count dim (2) scales with TP, so use auto_deploy.view. + q = torch.ops.auto_deploy.torch_linear_simple( + hidden_states, + self.q_proj.weight, + self.q_proj.bias, + tp_mode="colwise", + layer_type="mha", + ) + q = torch.ops.auto_deploy.view( + q, + [bsz, q_len, self.num_heads, self.head_dim], + tp_scaled_dim=2, + layer_type="mha", + ) + k = torch.ops.auto_deploy.torch_linear_simple( + hidden_states, + self.k_proj.weight, + self.k_proj.bias, + tp_mode="colwise", + tp_min_local_shape=self.head_dim, + layer_type="mha", + ) + k = torch.ops.auto_deploy.view( + k, + [bsz, q_len, self.num_kv_heads, self.head_dim], + tp_scaled_dim=2, + layer_type="mha", + ) + v = torch.ops.auto_deploy.torch_linear_simple( + hidden_states, + self.v_proj.weight, + self.v_proj.bias, + tp_mode="colwise", + tp_min_local_shape=self.head_dim, + layer_type="mha", + ) + v = torch.ops.auto_deploy.view( + v, + [bsz, q_len, self.num_kv_heads, self.head_dim], + tp_scaled_dim=2, + layer_type="mha", + ) # Apply per-head Q/K normalization (Qwen3-specific, on head_dim dimension) q = self.q_norm(q) @@ -294,9 +384,22 @@ def forward( "bsnd", # layout ) - # Reshape [B, S, N, head_dim] -> [B, S, N * head_dim] and project - attn_output = attn_output.reshape(bsz, q_len, self.num_heads * self.head_dim) - attn_output = self.o_proj(attn_output) + # Reshape [B, S, N, head_dim] -> [B, S, N * head_dim] and project. + # Collapsed dim scales with TP via num_heads. + attn_output = torch.ops.auto_deploy.view( + attn_output, + [bsz, q_len, self.num_heads * self.head_dim], + tp_scaled_dim=2, + layer_type="mha", + ) + attn_output = torch.ops.auto_deploy.torch_linear_simple( + attn_output, + self.o_proj.weight, + self.o_proj.bias, + tp_mode="rowwise", + layer_type="mha", + ) + attn_output = torch.ops.auto_deploy.all_reduce(attn_output, layer_type="mha") return attn_output diff --git a/tensorrt_llm/_torch/auto_deploy/models/custom/modeling_seed_oss.py b/tensorrt_llm/_torch/auto_deploy/models/custom/modeling_seed_oss.py index f225a4087442..4ee11a69b52f 100644 --- a/tensorrt_llm/_torch/auto_deploy/models/custom/modeling_seed_oss.py +++ b/tensorrt_llm/_torch/auto_deploy/models/custom/modeling_seed_oss.py @@ -17,7 +17,7 @@ # See the License for the specific language governing permissions and # limitations under the License. -"""Slimmed down PyTorch Seed-OSS model implementation for auto_deploy export. +"""Seed-OSS model (sharding IR). Source: https://huggingface.co/ByteDance-Seed/Seed-OSS-36B-Instruct @@ -107,7 +107,13 @@ def forward( class SeedOssMLP(nn.Module): - """MLP layer for Seed-OSS (SwiGLU activation).""" + """MLP layer for Seed-OSS (SwiGLU activation). + + Sharding strategy: + gate_proj -> colwise + up_proj -> colwise + down_proj -> rowwise + all_reduce + """ def __init__(self, config: SeedOssConfig): super().__init__() @@ -120,7 +126,29 @@ def __init__(self, config: SeedOssConfig): self.act_fn = ACT2FN[config.hidden_act] def forward(self, x: torch.Tensor) -> torch.Tensor: - return self.down_proj(self.act_fn(self.gate_proj(x)) * self.up_proj(x)) + gate = torch.ops.auto_deploy.torch_linear_simple( + x, + self.gate_proj.weight, + self.gate_proj.bias, + tp_mode="colwise", + layer_type="mlp", + ) + up = torch.ops.auto_deploy.torch_linear_simple( + x, + self.up_proj.weight, + self.up_proj.bias, + tp_mode="colwise", + layer_type="mlp", + ) + down = torch.ops.auto_deploy.torch_linear_simple( + self.act_fn(gate) * up, + self.down_proj.weight, + self.down_proj.bias, + tp_mode="rowwise", + layer_type="mlp", + ) + down = torch.ops.auto_deploy.all_reduce(down, layer_type="mlp") + return down class SeedOssAttention(nn.Module): @@ -128,6 +156,13 @@ class SeedOssAttention(nn.Module): Uses attention_bias on Q/K/V projections and attention_out_bias on O projection. AD canonical attention ops handle GQA natively (no repeat_kv needed). + + Sharding strategy: + q_proj -> colwise (+ tp_min_local_shape for GQA) + k_proj -> colwise (+ tp_min_local_shape for GQA) + v_proj -> colwise (+ tp_min_local_shape for GQA) + view -> tp_scaled_dim=2 (head count dimension) + o_proj -> rowwise + all_reduce """ def __init__(self, config: SeedOssConfig, layer_idx: Optional[int] = None): @@ -163,9 +198,48 @@ def forward( bsz, q_len, _ = hidden_states.size() # Project Q/K/V and reshape to [B, S, N, head_dim] (BSND layout) - q = self.q_proj(hidden_states).view(bsz, q_len, self.num_heads, self.head_dim) - k = self.k_proj(hidden_states).view(bsz, q_len, self.num_kv_heads, self.head_dim) - v = self.v_proj(hidden_states).view(bsz, q_len, self.num_kv_heads, self.head_dim) + q = torch.ops.auto_deploy.torch_linear_simple( + hidden_states, + self.q_proj.weight, + self.q_proj.bias, + tp_mode="colwise", + tp_min_local_shape=self.head_dim, + layer_type="mha", + ) + k = torch.ops.auto_deploy.torch_linear_simple( + hidden_states, + self.k_proj.weight, + self.k_proj.bias, + tp_mode="colwise", + tp_min_local_shape=self.head_dim, + layer_type="mha", + ) + v = torch.ops.auto_deploy.torch_linear_simple( + hidden_states, + self.v_proj.weight, + self.v_proj.bias, + tp_mode="colwise", + tp_min_local_shape=self.head_dim, + layer_type="mha", + ) + q = torch.ops.auto_deploy.view( + q, + [bsz, q_len, self.num_heads, self.head_dim], + tp_scaled_dim=2, + layer_type="mha", + ) + k = torch.ops.auto_deploy.view( + k, + [bsz, q_len, self.num_kv_heads, self.head_dim], + tp_scaled_dim=2, + layer_type="mha", + ) + v = torch.ops.auto_deploy.view( + v, + [bsz, q_len, self.num_kv_heads, self.head_dim], + tp_scaled_dim=2, + layer_type="mha", + ) # Get pre-sliced cos/sin from position_embeddings (already indexed by position_ids) cos, sin = position_embeddings # [B, S, head_dim] @@ -195,8 +269,20 @@ def forward( ) # Reshape [B, S, N, head_dim] -> [B, S, N * head_dim] and project - attn_output = attn_output.reshape(bsz, q_len, self.num_heads * self.head_dim) - attn_output = self.o_proj(attn_output) + attn_output = torch.ops.auto_deploy.view( + attn_output, + [bsz, q_len, self.num_heads * self.head_dim], + tp_scaled_dim=2, + layer_type="mha", + ) + attn_output = torch.ops.auto_deploy.torch_linear_simple( + attn_output, + self.o_proj.weight, + self.o_proj.bias, + tp_mode="rowwise", + layer_type="mha", + ) + attn_output = torch.ops.auto_deploy.all_reduce(attn_output, layer_type="mha") return attn_output diff --git a/tensorrt_llm/_torch/auto_deploy/models/factory.py b/tensorrt_llm/_torch/auto_deploy/models/factory.py index 1cb8a38ff048..a0b04a6a5bdb 100644 --- a/tensorrt_llm/_torch/auto_deploy/models/factory.py +++ b/tensorrt_llm/_torch/auto_deploy/models/factory.py @@ -17,8 +17,11 @@ """The model factory interface used by auto-deploy to build custom models.""" import copy +import hashlib +import os from abc import ABC, abstractmethod from enum import Enum +from pathlib import Path from typing import Any, Callable, Dict, List, Optional, Type, final import torch @@ -144,6 +147,72 @@ def tokenizer(self) -> Optional[str]: """The tokenizer path.""" return self._prefetched_tokenizer_path or self._tokenizer or self.model + def get_pipeline_cache_model_identifier(self) -> Dict[str, Any]: + """Return graph-producing model identity fields for the pipeline cache key. + + The pipeline cache snapshots the pre-weight graph at the configured boundary. + """ + return { + "factory_type": f"{type(self).__module__}.{type(self).__qualname__}", + "model": self._model, + "model_kwargs": copy.deepcopy(self.model_kwargs), + "tokenizer": self._tokenizer or self._model, + "tokenizer_kwargs": copy.deepcopy(self.tokenizer_kwargs), + } + + def get_pipeline_cache_checkpoint_fingerprint(self) -> Dict[str, Any]: + """Return a checkpoint fingerprint used by the AutoDeploy pipeline cache key.""" + self.prefetch_checkpoint(skip_loading_weights=True) + model = self.model + if not model: + return {"model": None} + path = Path(model) + if not path.exists(): + return {"model": model} + return { + "model": model, + "metadata_hash": self._pipeline_cache_path_metadata_hash(path), + } + + @staticmethod + def _pipeline_cache_path_metadata_hash(path: Path) -> str: + snapshot_sha = ModelFactory._extract_hf_snapshot_sha(path) + if snapshot_sha is not None: + return f"hf_snapshot:{snapshot_sha}" + + weight_suffixes = (".safetensors", ".bin", ".pt", ".pth", ".gguf") + digest = hashlib.sha256() + if path.is_file(): + paths = [path] + root = path.parent + else: + paths = sorted(item for item in path.rglob("*") if item.is_file()) + root = path + for item in paths: + rel_path = os.fspath(item.relative_to(root)).replace(os.sep, "/") + if item.name.endswith(weight_suffixes): + digest.update(f"shard:{rel_path}:{item.stat().st_size}\n".encode("utf-8")) + continue + digest.update(f"file:{rel_path}\n".encode("utf-8")) + with open(item, "rb") as f: + for chunk in iter(lambda: f.read(1024 * 1024), b""): + digest.update(chunk) + return digest.hexdigest() + + @staticmethod + def _extract_hf_snapshot_sha(path: Path) -> Optional[str]: + parts = path.resolve().parts + try: + snapshots_idx = parts.index("snapshots") + except ValueError: + return None + if snapshots_idx + 1 >= len(parts): + return None + sha = parts[snapshots_idx + 1] + if len(sha) >= 7 and all(char in "0123456789abcdef" for char in sha.lower()): + return sha + return None + @property @abstractmethod def max_seq_len(self) -> int: diff --git a/tensorrt_llm/_torch/auto_deploy/shim/ad_executor.py b/tensorrt_llm/_torch/auto_deploy/shim/ad_executor.py index 053d28a014e9..6cee4311beec 100644 --- a/tensorrt_llm/_torch/auto_deploy/shim/ad_executor.py +++ b/tensorrt_llm/_torch/auto_deploy/shim/ad_executor.py @@ -25,6 +25,10 @@ from tensorrt_llm._torch.pyexecutor._util import get_decoding_mode from tensorrt_llm._torch.pyexecutor.cuda_graph_runner import CUDA_GRAPH_DUMMY_REQUEST_ID from tensorrt_llm._torch.pyexecutor.guided_decoder import GuidedDecoder +from tensorrt_llm._torch.pyexecutor.kv_cache_transceiver import ( + AttentionTypeCpp, + create_kv_cache_transceiver, +) from tensorrt_llm._torch.pyexecutor.llm_request import LlmRequest, get_draft_token_length from tensorrt_llm._torch.pyexecutor.mamba_cache_manager import BaseMambaCacheManager from tensorrt_llm._torch.pyexecutor.model_engine import ModelEngine, PyTorchModelEngine @@ -51,13 +55,20 @@ from tensorrt_llm.llmapi.tokenizer import TokenizerBase from tensorrt_llm.mapping import Mapping +from ..custom_ops.attention_interface import AttentionType from ..distributed.common import initialize_or_skip from ..llm_args import LlmArgs from ..transform.optimizer import InferenceOptimizer +from ..utils.cuda_graph import BypassCapturedGraphs from ..utils.dist_config import DistConfig from ..utils.logger import ad_logger from .interface import CachedSequenceInterface, GetInferenceModel +_ATTENTION_TYPE_TO_CPP = { + AttentionType.mha: AttentionTypeCpp.DEFAULT, + AttentionType.mla: AttentionTypeCpp.MLA, +} + # Non-model multimodal metadata consumed before the exported graph or ignored by AD. # These keys must NOT leak into the generic extra_args dict — entries there # are expected to be tensors, and these may be scalars, lists, or nested dicts. @@ -65,6 +76,8 @@ { "layout_metadata", "mm_bidirectional_blocks", + "multimodal_embedding", + "multimodal_embedding_lengths", "special_token_offsets", "multimodal_embed_mask_cumsum", } @@ -127,6 +140,15 @@ def wrapper( def _call_func(): return func(self, scheduled_requests, resource_manager, *args, **kwargs) + def _call_func_eager(): + # When this wrapper has decided that all ranks must run eager, also force + # the inner cudagraph backend to bypass captured graphs. Otherwise, ranks + # whose shapes happen to match a captured graph would still replay and + # use stale capture-time scalar kernel args (e.g. runtime_max_tokens_per_rank + # baked from local total at capture, vs cross-rank max read fresh in eager). + with BypassCapturedGraphs(): + return _call_func() + # check conditions for current rank can_run_cuda_graph = self.cuda_graph_used and scheduled_requests.can_run_cuda_graph batch_size = scheduled_requests.batch_size @@ -158,7 +180,7 @@ def _call_func(): can_run_cuda_graph_all = all(r_info[0] for r_info in all_rank_info) if not can_run_cuda_graph_all: - return _call_func() + return _call_func_eager() # get closest cudagraph batch size based on max_batch_size across ALL ranks # NOTE: we assume uniform cudagraph batch sizes across all ranks ensuring all ranks get the @@ -167,14 +189,14 @@ def _call_func(): cg_batch_size = _round_up_to_closest(self.cuda_graph_batch_sizes, max_batch_size) if cg_batch_size is None: - return _call_func() + return _call_func_eager() # let's check if all ranks can pad the batch if they need to can_pad_all = all(r_info[1] or (r_info[2] == cg_batch_size) for r_info in all_rank_info) # fall back if we cannot run cudagraph due to padding issues if not can_pad_all: - return _call_func() + return _call_func_eager() # check actual amount of padding needed num_padding = cg_batch_size - batch_size @@ -302,6 +324,40 @@ def _compute_window_local_view( return active_indices, extra_page, active_token_count, last_page_len +def _compute_cyclic_full_view( + all_indices: Sequence[int], + end_compute_i: int, + tokens_per_block: int, +) -> Tuple[List[int], int, int, int]: + """Compute the metadata view for a cyclic-SWA kernel (trtllm). + + Unlike ``_compute_window_local_view`` (which slices the block table down to + the live sliding window for kernels that cannot cyclic-index), the trtllm + ``thop.attention`` kernel applies the sliding-window mask itself by wrapping + KV reads modulo the attention window. It therefore needs: + + * the FULL per-window block table (``all_indices`` verbatim, including any + stale front-evicted entries -- the kernel's modulo indexing skips them), + and + * the GLOBAL (un-window-capped) KV length ``end_compute_i``. + + This mirrors the PyTorch backend, which copies the manager's full block list + from index 0 and passes ``host_past_key_value_lengths == total KV length``. + + Returns the same 4-tuple shape as ``_compute_window_local_view``: + ``(active_indices, extra_page, seq_len_with_cache, last_page_len)``. + ``extra_page`` is always -1: the full table already contains the next page, + so the overlap scheduler needs no deferred-page insertion. + """ + active_indices = list(all_indices) + seq_len_with_cache = end_compute_i + if seq_len_with_cache > 0: + last_page_len = (seq_len_with_cache - 1) % tokens_per_block + 1 + else: + last_page_len = 0 + return active_indices, -1, seq_len_with_cache, last_page_len + + class ADEngine(ModelEngine): """The AutoDeploy Engine (ADEngine) is the main engine interface to execute AutoDeploy models. @@ -344,6 +400,7 @@ def build_from_config( vocab_size_padded=factory.vocab_size_padded, spec_config=ad_config.speculative_config, requires_uniform_kv_caches=ad_config.requires_uniform_kv_caches, + reject_unmanaged_persistent_caches=ad_config.reject_unmanaged_persistent_caches, ) reporting_info = ReportingInfo( @@ -394,11 +451,6 @@ def __init__( self.llm_args.print_iter_log = reporting_info.print_log self.llm_args.enable_iter_perf_stats = reporting_info.enable_iter_perf_stats self.llm_args.enable_iter_req_stats = reporting_info.enable_iter_req_stats - self.llm_args.stream_interval = 1 - self.llm_args.attention_dp_config = None - self.llm_args.batch_wait_timeout_ms = 0 - self.llm_args.batch_wait_timeout_iters = 0 - self.llm_args.batch_wait_max_tokens_ratio = 0.0 self.llm_args.max_num_tokens = cache_seq_interface.info.max_num_tokens self.llm_args.max_seq_len = cache_seq_interface.info.max_seq_len self.iter_counter = 0 @@ -408,15 +460,31 @@ def __init__( self.enable_attention_dp = dist_config.enable_attention_dp if dist_config else False if ad_config is not None: + self.llm_args.stream_interval = ad_config.stream_interval + self.llm_args.attention_dp_config = ad_config.attention_dp_config + self.llm_args.batch_wait_timeout_ms = ad_config.batch_wait_timeout_ms + self.llm_args.batch_wait_timeout_iters = ad_config.batch_wait_timeout_iters + self.llm_args.batch_wait_max_tokens_ratio = ad_config.batch_wait_max_tokens_ratio self.max_beam_width = ad_config.max_beam_width self.spec_config = ad_config.speculative_config self._disable_overlap_scheduler = ad_config.disable_overlap_scheduler + cache_transceiver_config = ad_config.cache_transceiver_config + self._cache_transceiver_enabled = ( + cache_transceiver_config is not None + and cache_transceiver_config.backend is not None + ) self.llm_args.max_stats_len = ad_config.max_stats_len self._enable_chunked_prefill = getattr(ad_config, "enable_chunked_prefill", False) else: + self.llm_args.stream_interval = 1 + self.llm_args.attention_dp_config = None + self.llm_args.batch_wait_timeout_ms = 0 + self.llm_args.batch_wait_timeout_iters = 0 + self.llm_args.batch_wait_max_tokens_ratio = 0.0 self.max_beam_width = 1 self.spec_config = None self._disable_overlap_scheduler = False + self._cache_transceiver_enabled = False self.llm_args.max_stats_len = 1000 self._enable_chunked_prefill = False @@ -649,12 +717,23 @@ def _prepare_inputs( gather_context_logits: bool = False, ) -> None: """Prepare inputs for AD Model from scheduled requests.""" + context_requests = scheduled_requests.context_requests + if ( + context_requests + and self._cache_transceiver_enabled + and not self._disable_overlap_scheduler + ): + raise RuntimeError( + "AutoDeploy disaggregated context workers do not support overlap scheduling. " + "Set disable_overlap_scheduler=True, or use " + "examples/auto_deploy/model_registry/configs/disagg_ctx.yaml when starting " + "a context worker with cache_transceiver_config." + ) + # cache manager kv_cache_manager = resource_manager.get_resource_manager( ResourceManagerType.KV_CACHE_MANAGER ) - # requests in order of context, generate - context_requests = scheduled_requests.context_requests extend_requests = [ r for r in scheduled_requests.generation_requests if get_draft_token_length(r) > 0 ] @@ -669,6 +748,7 @@ def _prepare_inputs( assert len(extend_requests) == 0 or len(generation_requests) == 0 gen_requests = extend_requests + generation_requests + # Requests in order of context, extend, generation. ordered_requests = context_requests + gen_requests # sequence information @@ -725,8 +805,15 @@ def _prepare_inputs( num_prefill_tokens = len(input_ids) for request in gen_requests: - # check if need overlap and draft length - is_overlap = not self._disable_overlap_scheduler and not request.is_dummy + # Use overlap only for non-dummy requests with a previous batch slot. + # Dummy requests do not need sampled tokens from the previous iteration. + # First-step disagg decode requests have not appeared in a previous batch yet, + # so their py_batch_idx is None. + is_overlap = ( + not self._disable_overlap_scheduler + and not request.is_dummy + and request.py_batch_idx is not None + ) # check draft length draft_len = get_draft_token_length(request) @@ -765,6 +852,12 @@ def _prepare_inputs( # on SequenceInfo). Per-window queries on the manager route to the # correct C++ pool via mLayerToWindowSize. kv_group_windows = self.cache_seq_interface.kv_group_windows + # When the attention kernel applies the sliding-window mask itself via + # cyclic KV indexing (trtllm), the executor must hand it the full + # per-window block table and a global (un-window-capped) KV length -- + # the same contract as the PyTorch backend. Otherwise (triton / + # flashinfer) host-slice the block table to the live window below. + cyclic_swa = self.cache_seq_interface.kernel_handles_cyclic_swa # Cache hot lookups so the per-request loop avoids repeated C++ # dispatch / hasattr calls. _tokens_per_block = kv_cache_manager.tokens_per_block @@ -804,40 +897,56 @@ def _prepare_inputs( for pool_idx, group_window in enumerate(kv_group_windows): all_indices = batch_cache_indices_per_pool[pool_idx][i] - # SWA front-eviction: get_batch_cache_indices returns the FULL - # historical page list including front-evicted entries (the - # C++ side bumps a counter rather than popping mCacheBlockIds). - # _compute_window_local_view slices it down to the live window - # in window-local coords. - front_removed = kv_cache_manager.get_num_front_blocks_removed( - request.py_request_id, window_size=group_window - ) - ( - active_indices, - extra_page, - active_token_count, - lpl_i, - ) = _compute_window_local_view( - all_indices, - front_removed=front_removed, - end_compute_i=end_compute_i, - group_window=group_window, - tokens_per_block=_tokens_per_block, - ) - num_active = len(active_indices) + if cyclic_swa: + # Cyclic-SWA kernels (trtllm) want the FULL per-window block + # table and the GLOBAL KV length; the kernel masks the window + # internally. No front-eviction slicing, so the + # get_num_front_blocks_removed C++ dispatch is skipped here. + ( + active_indices, + extra_page, + active_token_count, + lpl_i, + ) = _compute_cyclic_full_view( + all_indices, + end_compute_i=end_compute_i, + tokens_per_block=_tokens_per_block, + ) + num_active = len(active_indices) + else: + # SWA front-eviction: get_batch_cache_indices returns the FULL + # historical page list including front-evicted entries (the + # C++ side bumps a counter rather than popping mCacheBlockIds). + # _compute_window_local_view slices it down to the live window + # in window-local coords. + front_removed = kv_cache_manager.get_num_front_blocks_removed( + request.py_request_id, window_size=group_window + ) + ( + active_indices, + extra_page, + active_token_count, + lpl_i, + ) = _compute_window_local_view( + all_indices, + front_removed=front_removed, + end_compute_i=end_compute_i, + group_window=group_window, + tokens_per_block=_tokens_per_block, + ) + num_active = len(active_indices) cache_loc_per_pool[pool_idx].extend(active_indices) cu_num_pages_per_pool[pool_idx].append( cu_num_pages_per_pool[pool_idx][i] + num_active ) extra_page_per_seq_per_pool[pool_idx].append(extra_page) - # Window-local seq_len_with_cache / last_page_len for every - # pool (including 0). For full-attention pools the helper - # returns the unclamped global value (group_window equals - # max_seq_len, no clamping kicks in), so this is identical to - # the legacy single-pool path for non-SWA models. For SWA - # pools (whether pool 0 or pool 1+), it carries the - # window-local coords the kernel needs under front-eviction. + # seq_len_with_cache / last_page_len per pool (including 0). + # Cyclic-SWA (trtllm): the global KV length for every pool. + # Host-sliced (triton/flashinfer): the unclamped global value for + # full-attention pools (window == max_seq_len, no clamping), and + # the window-local coords for SWA pools under front-eviction -- + # identical to the legacy single-pool path for non-SWA models. seq_len_with_cache_per_pool[pool_idx].append(active_token_count) last_page_len_per_pool[pool_idx].append(lpl_i) @@ -943,6 +1052,20 @@ def forward( ) self.iter_counter += 1 + # Compute DP-aware max(total_num_tokens) and write to BatchInfo slot 14 + # (``max_dp_num_tokens``). Mirrors base TRT-LLM's pattern in + # ``model_engine._get_all_rank_num_tokens``: MoE all-to-all needs the + # cross-rank max to size dispatch padding without over-padding to the + # static config ``max_num_tokens``. ``nest_sequences`` already + # initialized slot 14 to the local ``total_num_tokens``; this overrides + # with the cross-rank max only when attention-DP requires it. + if self.enable_attention_dp and self.dist_config.tp_size > 1: + assert self.dist is not None, "Distributed object is required for attention DP mode" + info = self.cache_seq_interface.info + local_total_num_tokens = info.batch_info.get_total_num_tokens() + all_rank_num_tokens = list(self.dist.tp_allgather(local_total_num_tokens)) + info.batch_info.update_max_dp_num_tokens(max(all_rank_num_tokens)) + # compute outputs outputs = self._run_forward() @@ -1120,6 +1243,42 @@ def create_autodeploy_executor( engine=engine, ) + cache_transceiver_config = ad_config.cache_transceiver_config + kv_cache_transceiver = None + if cache_transceiver_config is not None and cache_transceiver_config.backend is not None: + if isinstance(kv_cache_manager, BaseMambaCacheManager): + # See https://github.com/NVIDIA/TensorRT-LLM/issues/14320. + raise RuntimeError( + "AutoDeploy disaggregated serving does not currently support Mamba/hybrid cache " + "managers. A prerequisite for disaggregated serving of hybrid models is to use " + "the C++ MambaCacheManager, which is currently not supported in AutoDeploy." + ) + if cache_transceiver_config.max_tokens_in_buffer is None: + # The buffer must hold the prompt's KV state (full prefill length). + # We use max_seq_len as a safe upper bound on max ISL. + cache_transceiver_config.max_tokens_in_buffer = ( + engine.cache_seq_interface.info.max_seq_len + ) + + cache_attention_type = engine.cache_seq_interface.attention_type + if cache_attention_type is None: + raise RuntimeError( + "Cache transceiver is enabled, but AutoDeploy did not find a managed paged KV " + "resource to provide attention_type." + ) + if not isinstance(cache_attention_type, AttentionType): + raise TypeError(f"attention_type must be AttentionType, got {cache_attention_type!r}") + attention_type_cpp = _ATTENTION_TYPE_TO_CPP[cache_attention_type] + + kv_cache_transceiver = create_kv_cache_transceiver( + dist_mapping, + dist, + kv_cache_manager, + attention_type_cpp, + cache_transceiver_config, + mamba_cache_manager=None, + ) + # Guided (structured) decoding. guided_decoder = None if ( @@ -1164,6 +1323,7 @@ def create_autodeploy_executor( max_batch_size=ad_config.max_batch_size, max_beam_width=ad_config.max_beam_width, guided_decoder=guided_decoder, + kv_cache_transceiver=kv_cache_transceiver, resource_governor_queue=resource_governor_queue, garbage_collection_gen0_threshold=ad_config.garbage_collection_gen0_threshold, ) diff --git a/tensorrt_llm/_torch/auto_deploy/shim/interface.py b/tensorrt_llm/_torch/auto_deploy/shim/interface.py index 5aff117f139c..76451e46d70c 100644 --- a/tensorrt_llm/_torch/auto_deploy/shim/interface.py +++ b/tensorrt_llm/_torch/auto_deploy/shim/interface.py @@ -49,7 +49,11 @@ torch_dtype_to_binding = None from ..custom_ops.attention_interface import ( + AttentionType, CausalConvResourceHandler, + EphemeralResourceHandler, + IntermediateConvStateHandler, + IntermediateSSMStateHandler, KVPagedResourceHandler, ReplayCacheBufIdxHandler, ReplayOldBHandler, @@ -60,8 +64,6 @@ ResourceHandler, ResourceHandlerDict, SequenceInfo, - SpecCausalConvResourceHandler, - SpecSSMResourceHandler, SSMResourceHandler, StateResourceHandler, ) @@ -101,6 +103,7 @@ def __init__( vocab_size_padded: Optional[int] = None, spec_config=None, requires_uniform_kv_caches: bool = False, + reject_unmanaged_persistent_caches: bool = False, ) -> None: """Initialize the CachedSequenceInterface. @@ -117,6 +120,8 @@ def __init__( cache mapping. When True, KV layers incompatible with the managed KV cache reference raise during initialization, and managed KV layers must share a single page-stride multiplier. + reject_unmanaged_persistent_caches: Whether to reject non-ephemeral cache resources + that are not managed by cache managers. """ # TODO (lucaslie): this is somewhat circular/confusing. Here `device` denotes the desired # device and not the actual device unlike, e.g., in SequenceInfo. We rely on the attribute @@ -147,10 +152,17 @@ def __init__( # same order as the C++ manager's internal pool ordering (i.e. the # insertion order of the per-window shape map keys). self._kv_group_windows: List[int] = [] + # Whether the attention backend's kernel applies the sliding-window mask + # itself via cyclic KV indexing (trtllm). When True the executor passes + # the full per-window block table and global KV lengths instead of + # host-slicing to the live window. Set by the kvcache transform from the + # attention descriptor's ``kernel_handles_cyclic_swa()``. + self._kernel_handles_cyclic_swa: bool = False # lookup of unmanaged resources self._unmanaged_resources: List[str] = [] self._spec_config = spec_config self._requires_uniform_kv_caches = requires_uniform_kv_caches + self._reject_unmanaged_persistent_caches = reject_unmanaged_persistent_caches # Propagate spec-dec config into BatchInfo so attention backends can read it # via the per-forward batch_info_host tensor without needing the Python config. @@ -344,6 +356,7 @@ def _identify_managed_kv_resources( pool_by_window: Dict[int, PoolConfiguration] = {} max_seq_len = self.info.max_seq_len + attention_type: Optional[AttentionType] = None for name, handler in self._resource_lookup.items(): if not isinstance(handler, KVPagedResourceHandler): @@ -352,6 +365,15 @@ def _identify_managed_kv_resources( # max_seq_len so the C++ side gets a single concrete window key. effective_window = handler.sliding_window if handler.sliding_window > 0 else max_seq_len + if attention_type is None: + attention_type = handler.attention_type + elif handler.attention_type != attention_type: + raise RuntimeError( + f"KV layer {name} has attention_type={handler.attention_type!r} but " + f"managed KV resources already use attention_type={attention_type!r}. " + "Disaggregated KV transfer requires a single attention type." + ) + kv_managed[name] = handler handler_dtype = torch_dtype_to_binding(handler.dtype) @@ -380,6 +402,7 @@ def _identify_managed_kv_resources( dtype=handler_dtype, ) + self.info.attention_type = attention_type pool_configurations: List[PoolConfiguration] = list(pool_by_window.values()) # If the runtime requires uniform KV caches (e.g. legacy single-pool @@ -454,8 +477,8 @@ def _identify_managed_state_resources( ssm_spec = [ (name, handler) for name, handler in self._resource_lookup.items() - if isinstance(handler, SpecSSMResourceHandler) - and handler == SpecSSMResourceHandler.from_base(ssm_ref) + if isinstance(handler, IntermediateSSMStateHandler) + and handler == IntermediateSSMStateHandler.from_base(ssm_ref) ] conv_managed = [ (name, handler) @@ -465,8 +488,8 @@ def _identify_managed_state_resources( conv_spec = [ (name, handler) for name, handler in self._resource_lookup.items() - if isinstance(handler, SpecCausalConvResourceHandler) - and handler == SpecCausalConvResourceHandler.from_base(conv_ref) + if isinstance(handler, IntermediateConvStateHandler) + and handler == IntermediateConvStateHandler.from_base(conv_ref) ] # Replay SSM buffers — per-layer (old_x, old_B, old_dt, old_dA_cumsum) @@ -887,6 +910,64 @@ def _assign_kv_cache_views(self, kv_managed: Dict[str, KVPagedResourceHandler]) return block_offset_multiplier + def _validate_no_unmanaged_persistent_caches( + self, + kv_managed: ResourceHandlerDict, + ssm_managed: list, + ssm_spec: list, + conv_managed: list, + conv_spec: list, + replay_old_x: list, + replay_old_B: list, + replay_old_dt: list, + replay_old_dA_cumsum: list, + replay_cache_buf_idx: list, + replay_prev_num_accepted: list, + ) -> None: + """Validate persistent cache resources are cache-manager backed. + + Speculative resources (intermediate SSM/conv states and replay buffers) are bound by the + cache manager only when speculative decoding is enabled (see _create_and_assign_state_views), + so they count as managed only under that condition. When spec decoding is off they are not + registered at all (see kvcache._suppress_spec_handlers_maybe), so the loop never encounters + them. + """ + if not self._reject_unmanaged_persistent_caches: + return + + managed_names = set(kv_managed) + managed_names.update(name for name, _ in ssm_managed) + managed_names.update(name for name, _ in conv_managed) + if self._spec_config is not None: + managed_names.update(name for name, _ in ssm_spec) + managed_names.update(name for name, _ in conv_spec) + for replay_resources in ( + replay_old_x, + replay_old_B, + replay_old_dt, + replay_old_dA_cumsum, + replay_cache_buf_idx, + replay_prev_num_accepted, + ): + managed_names.update(name for name, _ in replay_resources) + + unmanaged_transfer_resources = [] + for name, handler in self._resource_lookup.items(): + if isinstance(handler, EphemeralResourceHandler): + continue + if name in managed_names: + continue + unmanaged_transfer_resources.append(f"{name} ({type(handler).__name__})") + + if unmanaged_transfer_resources: + raise RuntimeError( + "Found unmanaged persistent cache resources while " + "reject_unmanaged_persistent_caches is enabled: " + f"{unmanaged_transfer_resources}. Persistent cache resources must be managed by " + "a cache manager for configurations that need cache transfer, such as " + "disaggregated serving." + ) + def _allocate_unmanaged_resources(self) -> None: """Allocate resources not managed by cache managers. @@ -992,6 +1073,7 @@ def _create_kv_cache_manager(self, max_tokens: Optional[int] = None) -> Dict: - SSMResourceHandler maps to MambaHybridCacheManager's ssm_states buffer - CausalConvResourceHandler maps to MambaHybridCacheManager's conv_states buffer - Generic StateResourceHandler and incompatible typed handlers are allocated locally + unless transfer policy requires persistent cache resources to be managed - When both SSM and Conv handlers exist, uses min(ssm_count, conv_count) layers Args: @@ -1104,20 +1186,35 @@ def _create_kv_cache_manager(self, max_tokens: Optional[int] = None) -> Dict: block_offset_multiplier=block_offset_multiplier, ) - # 7. Allocate remaining unmanaged resources + # 7. Validate persistent cache resources before allocating local fallbacks + self._validate_no_unmanaged_persistent_caches( + kv_managed, + ssm_managed, + ssm_spec, + conv_managed, + conv_spec, + replay_old_x, + replay_old_B, + replay_old_dt, + replay_old_dA_cumsum, + replay_cache_buf_idx, + replay_prev_num_accepted, + ) + + # 8. Allocate remaining unmanaged resources self._allocate_unmanaged_resources() - # 8. Patch shutdown + # 9. Patch shutdown self._kv_cache_manager.shutdown = with_pre_callback( self._kv_cache_manager.shutdown, self._clear_caches, ) - # 8. Compute final token count and cache statistics + # 10. Compute final token count and cache statistics max_resource_count = self._kv_cache_manager.get_max_resource_count() max_tokens_final = max_resource_count * self._kv_cache_manager.tokens_per_block - # 9. Collect statistics of different types of resources + # 11. Collect statistics of different types of resources num_state_total = sum( 1 for h in self._resource_lookup.values() if isinstance(h, StateResourceHandler) ) @@ -1125,16 +1222,14 @@ def _create_kv_cache_manager(self, max_tokens: Optional[int] = None) -> Dict: 1 for h in self._resource_lookup.values() if isinstance(h, SSMResourceHandler) ) num_ssm_spec_total = sum( - 1 for h in self._resource_lookup.values() if isinstance(h, SpecSSMResourceHandler) + 1 for h in self._resource_lookup.values() if isinstance(h, IntermediateSSMStateHandler) ) num_ssm_total = num_ssm_base_total + num_ssm_spec_total num_conv_base_total = sum( 1 for h in self._resource_lookup.values() if isinstance(h, CausalConvResourceHandler) ) num_conv_spec_total = sum( - 1 - for h in self._resource_lookup.values() - if isinstance(h, SpecCausalConvResourceHandler) + 1 for h in self._resource_lookup.values() if isinstance(h, IntermediateConvStateHandler) ) num_conv_total = num_conv_base_total + num_conv_spec_total num_state_other = num_state_total - num_ssm_total - num_conv_total @@ -1307,6 +1402,21 @@ def set_kv_groups(self, group_windows: List[int]) -> None: """ self._kv_group_windows = list(group_windows) + @property + def kernel_handles_cyclic_swa(self) -> bool: + """Whether the attention kernel applies the sliding-window mask itself. + + When True (trtllm), the executor passes the full per-window block table + and global KV lengths; when False (triton/flashinfer), it host-slices to + the live sliding window. + """ + return self._kernel_handles_cyclic_swa + + def set_kernel_handles_cyclic_swa(self, value: bool) -> None: + """Record the attention backend's cyclic-SWA capability (called by the + kvcache transform from ``AttentionDescriptor.kernel_handles_cyclic_swa``).""" + self._kernel_handles_cyclic_swa = bool(value) + @property def kv_cache_manager(self) -> Optional[KVCacheManager]: """Return the unified KVCacheManager, or None if not initialized.""" @@ -1326,6 +1436,10 @@ def kv_cache_config(self) -> KvCacheConfig: """Return the original KVCacheConfig as passed in.""" return self._kv_cache_config_original + @property + def attention_type(self) -> Optional[AttentionType]: + return self.info.attention_type + def _clear_caches(self) -> None: """Clear all caches and views before pool release.""" for k in self._caches: diff --git a/tensorrt_llm/_torch/auto_deploy/transform/__init__.py b/tensorrt_llm/_torch/auto_deploy/transform/__init__.py index 87a6006f53be..212ef8c75a8c 100644 --- a/tensorrt_llm/_torch/auto_deploy/transform/__init__.py +++ b/tensorrt_llm/_torch/auto_deploy/transform/__init__.py @@ -14,5 +14,8 @@ # limitations under the License. """AutoDeploy's modular graph transform + inference optimizer pipeline.""" -from . import library # noqa: F401 - ensure all transforms are registered +from . import ( + library, # noqa: F401 - ensure all transforms are registered + pipeline_cache, # noqa: F401 - ensure the cache transform is registered +) from .interface import * diff --git a/tensorrt_llm/_torch/auto_deploy/transform/interface.py b/tensorrt_llm/_torch/auto_deploy/transform/interface.py index b7fb5f80367e..8f3c135710e0 100644 --- a/tensorrt_llm/_torch/auto_deploy/transform/interface.py +++ b/tensorrt_llm/_torch/auto_deploy/transform/interface.py @@ -795,13 +795,24 @@ def _apply_to_full_model( ) def _add_or_retrieve_input( - self, gm: GraphModule, cm: CachedSequenceInterface, name: str + self, gm: GraphModule, cm: CachedSequenceInterface, name: str, init_val: bool = False ) -> Node: """Add or retrieve an input node from the graph.""" input_nodes = gm.graph.find_nodes(op="placeholder", target=name) if len(input_nodes) == 0: cm.info.activate_arg(name) - return add_graph_input(gm, name) + if init_val: + # Pass the runtime tensor so add_graph_input populates the + # placeholder's meta["val"] with a proper FakeTensor (shape + + # dtype propagated via fake_mode.from_tensor). Leaving meta empty + # (the default _NO_VAL path) causes downstream transforms that + # look up node.meta["val"] (FX export, fuse_fp8_linear's pattern + # matcher) to silently misbehave -- e.g. an adjacent + # fc2_latent_proj ends up with None in its input slot and the FP8 + # fake impl crashes on `input.dtype`. + return add_graph_input(gm, name, val=cm.info.get_arg(name)) + else: + return add_graph_input(gm, name) elif len(input_nodes) == 1: return input_nodes[0] else: diff --git a/tensorrt_llm/_torch/auto_deploy/transform/library/fuse_quant.py b/tensorrt_llm/_torch/auto_deploy/transform/library/fuse_quant.py index 39816f0cc279..393f45933eee 100644 --- a/tensorrt_llm/_torch/auto_deploy/transform/library/fuse_quant.py +++ b/tensorrt_llm/_torch/auto_deploy/transform/library/fuse_quant.py @@ -102,8 +102,8 @@ def _fp4_ref_repl_1( alpha: torch.Tensor, ): return torch.ops.auto_deploy.torch_quant_nvfp4_linear( - x, - w_fp4, + input=x, + weight_fp4=w_fp4, bias=None, input_scale=input_scale, weight_scale=weight_scale, @@ -140,8 +140,8 @@ def _fp4_ref_repl_2( alpha: torch.Tensor, ): return torch.ops.auto_deploy.torch_quant_nvfp4_linear( - x, - w_fp4, + input=x, + weight_fp4=w_fp4, bias=bias, input_scale=input_scale, weight_scale=weight_scale, @@ -154,7 +154,10 @@ def _register_quant_fp8_linear_patterns(patterns: ADPatternMatcherPass, op) -> N Register FP8 linear patterns with robust dummy args and minimal ignores. """ - # Define replacement functions that use the provided op + # Define replacement functions that use the provided op. + # Use keyword-only binding for input/weight/bias so the call stays robust + # against any FX-state perturbation that affects positional arg layout + # (e.g., sharding placeholder insertion in this PR). def _fp8_ref_repl_1( x: torch.Tensor, w_fp8: torch.Tensor, @@ -162,9 +165,9 @@ def _fp8_ref_repl_1( weight_scale: torch.Tensor, ): return op( - x, - w_fp8, - None, + input=x, + weight_fp8=w_fp8, + bias=None, input_scale=input_scale, weight_scale=weight_scale, ) @@ -177,9 +180,9 @@ def _fp8_ref_repl_2( weight_scale: torch.Tensor, ): return op( - x, - w_fp8, - bias, + input=x, + weight_fp8=w_fp8, + bias=bias, input_scale=input_scale, weight_scale=weight_scale, ) diff --git a/tensorrt_llm/_torch/auto_deploy/transform/library/fused_moe_mxfp4.py b/tensorrt_llm/_torch/auto_deploy/transform/library/fused_moe_mxfp4.py new file mode 100644 index 000000000000..e5782caaf53c --- /dev/null +++ b/tensorrt_llm/_torch/auto_deploy/transform/library/fused_moe_mxfp4.py @@ -0,0 +1,1303 @@ +# SPDX-FileCopyrightText: Copyright (c) 2024-2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. +# SPDX-License-Identifier: Apache-2.0 +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. +from typing import Literal, Optional, Tuple, Type + +import torch +import torch.nn as nn +from pydantic import Field +from torch.fx import GraphModule, Node + +from ..._compat import get_sm_version +from ...utils.logger import ad_logger +from ...utils.module import get_submodule_of_param +from ...utils.node_utils import is_op +from ...utils.pattern_matcher import ADPatternMatcherPass, register_ad_pattern +from ..interface import BaseTransform, TransformConfig, TransformInfo, TransformRegistry + +# MXFP4 layout constants (mirror the on-disk HF format the trtllm-gen kernel +# consumes). Used by both the load hook below and the TP-aware pre-pad math +# in ``QuantizeMXFP4MOE._apply_trtllm``. +_MXFP4_SCALING_VECTOR_SIZE = 32 +_WEIGHT_ALIGNMENT = 128 + +# Backend selection for MXFP4 MoE quantization. +# - "triton": use the triton_mxfp4_moe kernel (Ampere/Hopper compatible). +# - "trtllm": use the trtllm-gen MXFP4 MoE kernel (Blackwell SM>=100 only). +# When ``backend`` is left unset (``None``) on the transform config, the +# default is auto-resolved from the current SM: ``trtllm`` on SM>=100, +# ``triton`` otherwise. ``backend="trtllm"`` on SM<100 falls back to +# ``triton`` with a warning (silent fallback, not an error). +MxFP4Backend = Literal["triton", "trtllm"] + + +def _moe_dense_mlp_pattern( + hidden_states: torch.Tensor, + routing_weights: torch.Tensor, + gate_up_w: torch.Tensor, + gate_up_b: torch.Tensor, + down_w: torch.Tensor, + down_b: torch.Tensor, + alpha: float = 1.0, + limit: float = 10.0, + minus_limit: float = -10.0, +) -> torch.Tensor: + batch_size = hidden_states.shape[0] + hidden_size = hidden_states.shape[2] + hidden_states = hidden_states.reshape(-1, hidden_size) # (num_tokens, hidden_size) + num_experts = routing_weights.shape[1] + + hidden_states = hidden_states.repeat(num_experts, 1) + hidden_states = hidden_states.view(num_experts, -1, hidden_size) + gate_up = torch.bmm(hidden_states, gate_up_w) + gate_up_b.unsqueeze(-2) + gate, up = gate_up[..., ::2], gate_up[..., 1::2] + gate = gate.clamp(min=None, max=limit) + up = up.clamp(min=minus_limit, max=limit) + glu = gate * torch.sigmoid(gate * alpha) + next_states = torch.bmm(((up + 1) * glu), down_w) + next_states = next_states + down_b.unsqueeze(-2) + next_states = next_states.view(num_experts, batch_size, -1, hidden_size) + next_states = ( + next_states * routing_weights.transpose(0, 1).view(num_experts, batch_size, -1)[..., None] + ) + next_states = next_states.sum(dim=0) # [B, S, H] + return next_states + + +def _moe_dense_mlp_repl( + hidden_states: torch.Tensor, + routing_weights: torch.Tensor, + gate_up_w: torch.Tensor, + gate_up_b: torch.Tensor, + down_w: torch.Tensor, + down_b: torch.Tensor, + alpha: float, + limit: float, + minus_limit: float, +) -> torch.Tensor: + return torch.ops.auto_deploy.torch_moe_dense_mlp( + hidden_states, routing_weights, gate_up_w, gate_up_b, down_w, down_b, alpha, limit + ) + + +@TransformRegistry.register("match_dense_moe_pattern") +class MatchMXFP4MoePattern(BaseTransform): + def _apply( + self, + gm: GraphModule, + cm, + factory, + shared_config, + ) -> Tuple[GraphModule, TransformInfo]: + graph = gm.graph + patterns = ADPatternMatcherPass() + + B, S, H = 2, 4, 8 # batch, seq, hidden + E, In = 3, 16 # experts, intermediate (I); gate_up has 2I + T = B * S + + dummy_args = [ + torch.randn(B, S, H, device="meta", dtype=torch.float16), # hidden_states + torch.randn(T, E, device="meta", dtype=torch.float16), # routing_weights + torch.randn(E, H, 2 * In, device="meta", dtype=torch.float16), # gate_up_w [E,H,2I] + torch.randn(E, 2 * In, device="meta", dtype=torch.float16), # gate_up_b [E,2I] + torch.randn(E, In, H, device="meta", dtype=torch.float16), # down_w [E,I,H] + torch.randn(E, H, device="meta", dtype=torch.float16), # down_b [E,H] + 1.07, + 10.1, + -10.1, + ] + + op_ignore_types = { + torch.ops.aten.view.default: (int,), + torch.ops.aten.reshape.default: (int,), + torch.ops.auto_deploy.view.default: (int,), + torch.ops.aten.repeat.default: (int,), + torch.ops.aten.slice.Tensor: (int,), + torch.ops.aten.unsqueeze.default: (int,), + torch.ops.aten.transpose.int: (int,), + } + + scalar_workaround = {"alpha": 1.07, "limit": 10.1, "minus_limit": -10.1} + + register_ad_pattern( + search_fn=_moe_dense_mlp_pattern, + replace_fn=_moe_dense_mlp_repl, + patterns=patterns, + dummy_args=dummy_args, + op_ignore_types=op_ignore_types, + scalar_workaround=scalar_workaround, + ) + + num_matches = patterns.apply(graph) + info = TransformInfo( + skipped=False, + num_matches=num_matches, + is_clean=num_matches == 0, + has_valid_shapes=num_matches == 0, + ) + return gm, info + + +def _get_alpha_limit_from_dense(node: Node) -> Tuple[float, float]: + # torch_moe_dense_mlp(hidden, routing, gu_w, gu_b, dn_w, dn_b, alpha, limit) + # alpha/limit may be in args or kwargs + alpha = node.kwargs.get("alpha", None) + limit = node.kwargs.get("limit", None) + if alpha is None: + alpha = float(node.args[6]) if len(node.args) >= 7 else 1.0 + if limit is None: + limit = float(node.args[7]) if len(node.args) >= 8 else 10.0 + return float(alpha), float(limit) + + +def _get_topk_from_router(node: Node) -> int: + # torch_moe_router(hidden, weight, bias, top_k=2) + if "top_k" in node.kwargs: + return int(node.kwargs["top_k"]) + return int(node.args[3]) if len(node.args) >= 4 else 2 + + +def _register_mxfp4_expert_params( + gm: GraphModule, + gate_up_w_name: str, + gate_up_b_name: str, + down_w_name: str, + down_b_name: str, +) -> Tuple[str, str, str, str]: + """Create (if missing) the four MXFP4 params under the experts module and return their full names. + + Returns: + (gu_blocks_name, gu_scales_name, dn_blocks_name, dn_scales_name) + """ + # Shapes from existing params + gu_b = gm.get_parameter(gate_up_b_name) # [E, 2I] + gu_w = gm.get_parameter(gate_up_w_name) # [E, 2I, H] + dn_b = gm.get_parameter(down_b_name) # [E, H] + + E = int(gu_b.shape[0]) + I2 = int(gu_b.shape[1]) # 2I + In = I2 // 2 + + # infer H from gu_w shape + assert gu_w.dim() == 3, "gate_up_w must be rank-3" + if gu_w.shape[1] == I2: + H = int(gu_w.shape[2]) + else: + # Fallback: use down bias last dim + H = int(dn_b.shape[1]) + + # Compute block dims (assume divisible; zero-init anyway) + H_blk = max(1, H // 32) + I_blk = max(1, In // 32) + + experts_mod, experts_path, _ = get_submodule_of_param(gm, gate_up_w_name) + + # New param names under experts module + gu_blocks_name = "gate_up_proj_blocks" + gu_scales_name = "gate_up_proj_scales" + dn_blocks_name = "down_proj_blocks" + dn_scales_name = "down_proj_scales" + + # Uninitialized placeholders — names match HF safetensors so the standard + # state_dict load path overwrites them. Reuse the existing param's device + # (meta in the normal meta-device build) so we don't materialize giant CPU + # buffers before load. + param_device = gu_w.device + gu_blocks = torch.empty((E, 2 * In, H_blk, 16), dtype=torch.uint8, device=param_device) + gu_scales = torch.empty((E, 2 * In, H_blk), dtype=torch.uint8, device=param_device) + dn_blocks = torch.empty((E, H, I_blk, 16), dtype=torch.uint8, device=param_device) + dn_scales = torch.empty((E, H, I_blk), dtype=torch.uint8, device=param_device) + + experts_mod.register_parameter(gu_blocks_name, nn.Parameter(gu_blocks, requires_grad=False)) + experts_mod.register_parameter(gu_scales_name, nn.Parameter(gu_scales, requires_grad=False)) + experts_mod.register_parameter(dn_blocks_name, nn.Parameter(dn_blocks, requires_grad=False)) + experts_mod.register_parameter(dn_scales_name, nn.Parameter(dn_scales, requires_grad=False)) + + # Free the now-unused bf16 stacked weight params; the biases are still + # consumed by ``triton_mxfp4_moe`` and must remain. + gu_w_local = gate_up_w_name.split(".")[-1] + dn_w_local = down_w_name.split(".")[-1] + for local_name in (gu_w_local, dn_w_local): + if local_name in experts_mod._parameters: + del experts_mod._parameters[local_name] + + # Full GM attribute paths for new params + prefix = (experts_path + ".") if experts_path else "" + return ( + prefix + gu_blocks_name, + prefix + gu_scales_name, + prefix + dn_blocks_name, + prefix + dn_scales_name, + ) + + +# EP+TP load hook — slices raw HF MXFP4 state_dict tensors on CPU before copy +# so per-rank module params (registered at the EP-sliced shape) accept them. +# Kernel-layout prep is deferred to FuseMXFP4Moe on GPU. + + +def make_mxfp4_sharding_load_hook( + *, + num_layers: int, + num_experts: int, + intermediate_size: int, + moe_ep_size: int, + moe_ep_rank: int, + moe_tp_size: int, + moe_tp_rank: int, + layer_prefix: str = "model.layers", + experts_subpath: str = "mlp.experts", +): + """Build a ``load_state_dict`` pre-hook that EP+TP-shards raw HF MXFP4 keys. + + For each layer's six raw HF MXFP4 keys + (``gate_up_proj_{blocks,scales,bias}``, ``down_proj_{blocks,scales,bias}``) + the hook slices on CPU before copy so per-rank GPU memory only holds this + rank's shard. Kernel-layout prep (H-pad, TMA shuffle, bias dtype/scale) is + deferred to ``FuseMXFP4Moe`` on GPU. + + Slicing axes: + + 1. **EP (leading expert axis)** — ``t[ep_start:ep_stop]`` where + ``experts_per_rank = num_experts / moe_ep_size``. No-op when + ``moe_ep_size == 1``. + + 2. **TP (intermediate axis)** — only when ``moe_tp_size > 1``. ``I`` is + padded to ``i_padded_tp`` so that ``per_rank_i = i_padded_tp / + moe_tp_size`` is a multiple of 128 (TMA weight alignment), then: + + * ``gate_up_proj_*`` — axis 1 of the interleaved 2I layout, + ``[2*tp_start : 2*tp_stop]``. Alternating gate(k)/up(k) means a + contiguous slice covers ``gate(k:k+m) ∪ up(k:k+m)``. + * ``down_proj_{blocks,scales}`` — axis 2 (``I_blk = I/32``), + ``[tp_start/32 : tp_stop/32]``. ``per_rank_i`` is a multiple of 32. + * ``down_proj_bias`` ``[E, H]`` is left intact (H not TP-split); + ``FuseMXFP4Moe`` divides it by ``moe_tp_size`` after dtype convert. + + Args: + num_layers: number of decoder layers to scan. + num_experts: total expert count on disk. + intermediate_size: per-expert intermediate dim ``I`` on disk + (before any padding/slicing). + moe_ep_size / moe_ep_rank: expert-parallel group size + this rank. + moe_tp_size / moe_tp_rank: MoE tensor-parallel group size + this rank + (intermediate-axis split). + layer_prefix: where layers live, default ``"model.layers"``. + experts_subpath: where the experts module sits within each layer, + default ``"mlp.experts"``. + + Returns: + A hook with the standard ``(state_dict, prefix, ...)`` signature. + """ + if num_experts % moe_ep_size != 0: + raise ValueError( + f"num_experts ({num_experts}) must be divisible by moe_ep_size ({moe_ep_size})" + ) + experts_per_rank = num_experts // moe_ep_size + ep_start = moe_ep_rank * experts_per_rank + ep_stop = ep_start + experts_per_rank + + # TP-aware pre-pad/slice math (only used when moe_tp_size > 1). + if moe_tp_size > 1: + # Lazy import: TRT-LLM-only helper. Keeps this module importable in + # standalone (no tensorrt_llm) so its transforms still register. + from tensorrt_llm._torch.modules.fused_moe.quantization import _get_weight_alignment + + alignment_tp = _get_weight_alignment( + _WEIGHT_ALIGNMENT, _MXFP4_SCALING_VECTOR_SIZE, moe_tp_size, intermediate_size + ) + i_padded_tp = ((intermediate_size + alignment_tp - 1) // alignment_tp) * alignment_tp + per_rank_i = i_padded_tp // moe_tp_size + tp_start = moe_tp_rank * per_rank_i + tp_stop = (moe_tp_rank + 1) * per_rank_i + if per_rank_i % _MXFP4_SCALING_VECTOR_SIZE != 0: + raise ValueError( + f"per_rank_i ({per_rank_i}) must be divisible by " + f"_MXFP4_SCALING_VECTOR_SIZE ({_MXFP4_SCALING_VECTOR_SIZE}); " + f"check _get_weight_alignment output." + ) + # Block-axis bounds for down_proj's I_blk = I / 32 axis. + blk_pad = i_padded_tp // _MXFP4_SCALING_VECTOR_SIZE + blk_start = tp_start // _MXFP4_SCALING_VECTOR_SIZE + blk_stop = tp_stop // _MXFP4_SCALING_VECTOR_SIZE + else: + i_padded_tp = intermediate_size + per_rank_i = intermediate_size + tp_start = 0 + tp_stop = intermediate_size + blk_pad = intermediate_size // _MXFP4_SCALING_VECTOR_SIZE + blk_start = 0 + blk_stop = blk_pad + + def _pad_axis(t: torch.Tensor, dim: int, target: int) -> torch.Tensor: + cur = t.shape[dim] + if cur >= target: + return t + pad_amount = target - cur + # F.pad spec is (pad_lastdim_left, pad_lastdim_right, ..., pad_dim_left, pad_dim_right) + pad = [0, 0] * (t.dim() - dim - 1) + [0, pad_amount] + [0, 0] * dim + return torch.nn.functional.pad(t, pad) + + def hook(state_dict, prefix, *args, local_metadata=None, **kwargs): + do_ep = moe_ep_size > 1 + do_tp = moe_tp_size > 1 + if not (do_ep or do_tp): + # Nothing to slice — leave state_dict alone. + return + for layer_idx in range(num_layers): + base = f"{prefix}{layer_prefix}.{layer_idx}.{experts_subpath}." + + # ---- EP slice (leading expert axis) ---- + if do_ep: + for s in ( + "gate_up_proj_blocks", + "gate_up_proj_scales", + "gate_up_proj_bias", + "down_proj_blocks", + "down_proj_scales", + "down_proj_bias", + ): + k = base + s + t = state_dict.get(k) + if t is None: + continue + state_dict[k] = t[ep_start:ep_stop].contiguous() + + # ---- TP-aware pre-pad + slice (intermediate axis) ---- + if do_tp: + # gate_up_*: axis 1 (the 2I interleaved axis); pad to + # 2*i_padded_tp, then slice [2*tp_start : 2*tp_stop]. + for s in ("gate_up_proj_blocks", "gate_up_proj_scales", "gate_up_proj_bias"): + k = base + s + t = state_dict.get(k) + if t is None: + continue + t = _pad_axis(t, 1, 2 * i_padded_tp) + state_dict[k] = t[:, 2 * tp_start : 2 * tp_stop].contiguous() + + # down_proj_blocks / scales: axis 2 (I_blk = I / 32); pad to + # blk_pad, then slice [blk_start : blk_stop]. Inner 16 axis + # (blocks only) is untouched. + for s in ("down_proj_blocks", "down_proj_scales"): + k = base + s + t = state_dict.get(k) + if t is None: + continue + t = _pad_axis(t, 2, blk_pad) + state_dict[k] = t[:, :, blk_start:blk_stop].contiguous() + # down_proj_bias [E, H]: H axis is not TP-split. Leave as-is + # and let FuseMXFP4Moe divide by moe_tp_size after dtype + # conversion (matches the prep helper's tp-aware bias path). + + return hook + + +def make_swiglu_param_tensors( + num_local_experts: int, + *, + alpha: float = 1.702, + beta: float = 1.0, + limit: float = 7.0, + device: torch.device | str | None = None, +) -> Tuple[torch.Tensor, torch.Tensor, torch.Tensor]: + """Build the per-expert SwiGLU-bias parameter triple expected by the kernel. + + These constants are NOT in HF safetensors (only in the model config), so + the transform constructs them here and registers them as ``nn.Parameter`` + on the experts module. For gpt-oss-120b: alpha=1.702, beta=1.0, limit=7.0. + """ + dev = torch.device(device) if device is not None else None + a = torch.full((num_local_experts,), alpha, dtype=torch.float32, device=dev) + b = torch.full((num_local_experts,), beta, dtype=torch.float32, device=dev) + c = torch.full((num_local_experts,), limit, dtype=torch.float32, device=dev) + return a, b, c + + +class QuantizeMXFP4MOEConfig(TransformConfig): + """Configuration for ``quantize_mxfp4_moe``.""" + + backend: Optional[MxFP4Backend] = Field( + default=None, + description=( + "MXFP4 MoE kernel backend selection. When unset (``None``), the " + "default is SM-based: ``trtllm`` on SM>=100 (Blackwell), ``triton`` " + "otherwise. Explicit ``triton`` or ``trtllm`` overrides the default. " + "``trtllm`` on SM<100 silently falls back to ``triton`` with a warning." + ), + ) + trtllm_quant_act: Literal["bf16", "mxfp8"] = Field( + default="mxfp8", + description=( + "Only used when ``backend='trtllm'``. Activation precision for the trtllm-gen " + "MoE GEMM, passed as ``act_dtype`` to " + "``trtllm_quant_mxfp4_trtllm_gen_moe_fused``: ``bf16`` dispatches to the bf16 " + "MoE runner (W4A16), ``mxfp8`` pre-quantizes the activation to MXFP8 and " + "dispatches to the MXFP8 MoE runner (W4A8, faster cubin family). " + "Default ``mxfp8`` matches the modeling-side default." + ), + ) + + +@TransformRegistry.register("quantize_mxfp4_moe") +class QuantizeMXFP4MOE(BaseTransform): + """Quantize MXFP4 MoE: dispatch to triton or trtllm-gen backend. + + Replaces ``(torch_moe_router -> torch_moe_dense_mlp)`` with a single fused + MoE op. The chosen backend determines the destination op and the parameter + layout registered on the experts module: + + * ``backend="triton"`` → ``auto_deploy::triton_mxfp4_moe`` with raw HF + MXFP4 layout (``_blocks`` / ``_scales`` / ``_bias``). Lazy weight + swizzling happens inside the Triton kernel on first forward. + * ``backend="trtllm"`` → ``auto_deploy::trtllm_quant_mxfp4_*_moe_fused`` with + trtllm-gen prepared layout (``fc1_w_trtllm`` / ``fc1_w_scale_trtllm`` / + ...). Weight preparation (shuffle + interleave) is done on CPU inside + a state-dict pre-hook registered by this transform, so the raw HF + tensors are converted before being moved to GPU. + """ + + algo_name: str = "mxfp4" + config: QuantizeMXFP4MOEConfig + + @classmethod + def get_config_class(cls) -> Type[TransformConfig]: + return QuantizeMXFP4MOEConfig + + def _resolve_backend(self) -> MxFP4Backend: + """Resolve the effective backend from config + runtime SM. + + - ``config.backend is None`` → SM-based default + * SM>=100 → ``trtllm`` + * SM<100 → ``triton`` + - ``config.backend="trtllm"`` + SM<100 → warn + fallback to ``triton`` + - Otherwise honour the explicit config value. + """ + requested = self.config.backend + sm = get_sm_version() + if requested is None: + return "trtllm" if sm >= 100 else "triton" + if requested == "trtllm" and sm < 100: + ad_logger.warning( + f"quantize_mxfp4_moe: backend='trtllm' requires SM>=100 (Blackwell), " + f"but current SM={sm}. Falling back to backend='triton'." + ) + return "triton" + return requested + + def _apply( + self, + gm: GraphModule, + cm, + factory, + shared_config, + ) -> Tuple[GraphModule, TransformInfo]: + """Dispatcher: pick a backend and delegate to the corresponding method. + + The actual graph rewrite + parameter swap lives in + :meth:`_apply_triton` / :meth:`_apply_trtllm`. This method only: + 1. Skips if quant_method != "mxfp4". + 2. Resolves the backend (``triton`` | ``trtllm``) and dispatches. + """ + qcfg = factory.get_quant_config() + if not qcfg or qcfg.get("quant_method", "") != self.algo_name: + return gm, TransformInfo( + skipped=True, num_matches=0, is_clean=True, has_valid_shapes=True + ) + + backend = self._resolve_backend() + ad_logger.info(f"quantize_mxfp4_moe: dispatching to backend={backend!r}") + + if backend == "triton": + return self._apply_triton(gm, cm, factory, shared_config) + elif backend == "trtllm": + return self._apply_trtllm(gm, cm, factory, shared_config) + else: + # _resolve_backend should only return "triton" or "trtllm". + raise ValueError(f"Unexpected backend resolved: {backend!r}") + + def _apply_triton( + self, + gm: GraphModule, + cm, + factory, + shared_config, + ) -> Tuple[GraphModule, TransformInfo]: + """Triton backend: graph rewrite to ``triton_mxfp4_moe``. + + Replaces ``(torch_moe_router -> torch_moe_dense_mlp)`` with a single + ``auto_deploy::triton_mxfp4_moe`` op and registers raw HF-layout MXFP4 params + (``_blocks`` / ``_scales``) on the experts module via :func:`_register_mxfp4_expert_params`. + The bf16 placeholders (``gate_up_proj`` / ``down_proj``) are deleted; biases are kept. + + Weight swizzling for the Triton kernel happens lazily inside the kernel on first forward + (see ``_prepare_weights_scales_cached`` in ``custom_ops/fused_moe/mxfp4_moe.py``) -- no + load hook needed because the HF state-dict keys already match the registered param names + (``gate_up_proj_blocks``, ``gate_up_proj_scales``, etc.). + """ + num_matches = 0 + + for n in list(gm.graph.nodes): + if not is_op(n, torch.ops.auto_deploy.torch_moe_dense_mlp): + continue + + # Expect: torch_moe_dense_mlp(hidden, routing, gu_w, gu_b, dn_w, dn_b, alpha, limit) + if len(n.args) < 6: + continue + + hidden_node = n.args[0] + routing_node = n.args[1] + gate_up_w_node = n.args[2] + gate_up_b_node = n.args[3] + down_w_node = n.args[4] + down_b_node = n.args[5] + + if not isinstance(routing_node, Node) or not is_op( + routing_node, torch.ops.auto_deploy.torch_moe_router + ): + continue + + # Router params: weight, bias, top_k + router_weight_node = routing_node.args[1] + router_bias_node = routing_node.args[2] + top_k = _get_topk_from_router(routing_node) + + # Resolve parameter names so we can find the experts module + if gate_up_w_node.op != "get_attr" or gate_up_b_node.op != "get_attr": + continue + if down_w_node.op != "get_attr" or down_b_node.op != "get_attr": + continue + + gu_w_name = gate_up_w_node.target + gu_b_name = gate_up_b_node.target + dn_w_name = down_w_node.target + dn_b_name = down_b_node.target + + # Register MXFP4 params on experts + gu_blocks_name, gu_scales_name, dn_blocks_name, dn_scales_name = ( + _register_mxfp4_expert_params(gm, gu_w_name, gu_b_name, dn_w_name, dn_b_name) + ) + + # Alpha/limit (from dense call) + alpha, limit = _get_alpha_limit_from_dense(n) + + # Insert the new get_attr nodes for MXFP4 params + with gm.graph.inserting_before(n): + gu_blocks_attr = gm.graph.create_node("get_attr", gu_blocks_name) + gu_scales_attr = gm.graph.create_node("get_attr", gu_scales_name) + dn_blocks_attr = gm.graph.create_node("get_attr", dn_blocks_name) + dn_scales_attr = gm.graph.create_node("get_attr", dn_scales_name) + + n.target = torch.ops.auto_deploy.triton_mxfp4_moe.default + n.kwargs = {} + + # triton_mxfp4_moe( + # hidden_states, + # router_weight, router_bias, top_k, + # gate_up_blocks, gate_up_bias, gate_up_scales, alpha, limit, + # down_blocks, down_bias, down_scales) + new_args = ( + hidden_node, + router_weight_node, + router_bias_node, + top_k, + gu_blocks_attr, + gate_up_b_node, + gu_scales_attr, + float(alpha), + float(limit), + dn_blocks_attr, + down_b_node, + dn_scales_attr, + ) + n.args = new_args + + # Remove the now-unneeded router node if nobody else uses it + if len(routing_node.users) == 0: + gm.graph.erase_node(routing_node) + + # Erase the old get_attr nodes for gate_up_proj and down_proj. + # _register_mxfp4_expert_params deleted those attributes from the + # experts module, so these nodes now reference non-existent attrs. + # They have no users after the args replacement above, so it is + # safe to erase them directly. + for stale_node in (gate_up_w_node, down_w_node): + if len(stale_node.users) == 0: + gm.graph.erase_node(stale_node) + + num_matches += 1 + + info = TransformInfo( + skipped=(num_matches == 0), + num_matches=num_matches, + is_clean=num_matches == 0, + has_valid_shapes=num_matches == 0, + ) + return gm, info + + def _apply_trtllm( + self, + gm: GraphModule, + cm, + factory, + shared_config, + ) -> Tuple[GraphModule, TransformInfo]: + """TRT-LLM-Gen backend: graph rewrite + raw HF param registration. + + Per MoE node: + + 1. Find ``torch_moe_dense_mlp`` + its upstream ``torch_moe_router``. + 2. Look up the experts module that owns the bf16 placeholder params. + 3. Delete the bf16 placeholders (``gate_up_proj`` / ``down_proj`` / biases). + 4. Register **raw HF MXFP4 params** at the EP-sliced shape + (``E_local = E_full / moe_ep_size``) on the experts module: + ``gate_up_proj_{blocks,scales,bias}`` and ``down_proj_{blocks,scales,bias}``. Names match + HF safetensors so the standard ``load_state_dict`` path can populate them (after the + slim EP-slice hook below trims the leading expert axis when ``moe_ep_size > 1``). + 5. Also register the per-expert SwiGLU constants (``swiglu_alpha_trtllm`` / beta / limit) — + these are not in HF safetensors so they are populated with their numeric defaults at + registration time. + 6. Rewrite the ``torch_moe_dense_mlp`` node to + ``trtllm_quant_mxfp4_trtllm_gen_moe_fused`` (with ``act_dtype`` set from + ``config.trtllm_quant_act``) with args pointing at the **raw** params for + now. The downstream :class:`FuseMXFP4Moe` POST_LOAD_FUSION transform will run + :func:`prepare_trtllm_gen_moe_mxfp4_weights` on the actually-loaded GPU tensors, + register prepared-shape params, and re-point the op args. The op call is therefore not + runnable between PATTERN_MATCHER and POST_LOAD_FUSION, but no forward pass happens in + that window. + 7. If ``tp_size > 1`` insert an ``auto_deploy.all_reduce`` node after the downstream view + (covers both MoE-TP and MoE-EP). + + Then once for the whole module: + + 8. Register a top-level ``load_state_dict`` pre-hook + (:func:`make_mxfp4_sharding_load_hook`) that slices raw HF MXFP4 tensors on the expert + axis when ``moe_ep_size > 1``. The hook does **not** run any kernel-layout prep — + that runs on GPU in :class:`FuseMXFP4Moe` after the weights are loaded. + """ + import re + + # MoE topology comes from the build-time ``DistConfig`` on + # ``shared_config``; passed directly into the sharding load hook + # below. + dc = getattr(shared_config, "dist_config", None) + moe_tp_size = int(getattr(dc, "moe_tp_size", 1)) if dc is not None else 1 + moe_tp_rank = int(getattr(dc, "moe_tp_rank", 0)) if dc is not None else 0 + moe_ep_size = int(getattr(dc, "moe_ep_size", 1)) if dc is not None else 1 + moe_ep_rank = int(getattr(dc, "moe_ep_rank", 0)) if dc is not None else 0 + # Cover MoE-EP as well: any distributed case (tp_size>1) needs the + # configured strategy. ``moe_tp_size > 1`` alone would miss EP-only. + _tp_size = int(getattr(dc, "tp_size", 1)) if dc is not None else 1 + allreduce_strategy = ( + str(dc.allreduce_strategy) if dc is not None and _tp_size > 1 else "NCCL" + ) + + # Single op handles both activation precisions via the ``act_dtype`` arg: + # ``"bf16"`` → W4A16 (bf16 MoE runner), ``"mxfp8"`` → W4A8 (mxfp8_quantize + + # MXFP8 MoE runner). + target_op = torch.ops.auto_deploy.trtllm_quant_mxfp4_trtllm_gen_moe_fused.default + quant_act = self.config.trtllm_quant_act + + # Module-level info needed once for the load hook factory. + hidden_size_global: Optional[int] = None + intermediate_size_global: Optional[int] = None + num_experts_global: Optional[int] = None + layer_indices: list = [] + + layer_re = re.compile(r"\.layers\.(\d+)\.") + num_matches = 0 + + for n in list(gm.graph.nodes): + if not is_op(n, torch.ops.auto_deploy.torch_moe_dense_mlp): + continue + # Expect: torch_moe_dense_mlp(hidden, routing, gu_w, gu_b, dn_w, dn_b, alpha, limit) + if len(n.args) < 6: + continue + + hidden_node = n.args[0] + routing_node = n.args[1] + gate_up_w_node = n.args[2] + gate_up_b_node = n.args[3] + down_w_node = n.args[4] + down_b_node = n.args[5] + + if not isinstance(routing_node, Node) or not is_op( + routing_node, torch.ops.auto_deploy.torch_moe_router + ): + continue + if ( + gate_up_w_node.op != "get_attr" + or gate_up_b_node.op != "get_attr" + or down_w_node.op != "get_attr" + or down_b_node.op != "get_attr" + ): + continue + + router_weight_node = routing_node.args[1] + router_bias_node = routing_node.args[2] + top_k = _get_topk_from_router(routing_node) + + gu_w_name = gate_up_w_node.target + dn_w_name = down_w_node.target + + # Shapes from the bf16 placeholders (meta is fine — only .shape is read). + # gu_w shape: [E, H, 2I]; dn_w shape: [E, I, H] (we infer I from gu_w). + gu_w_t = gm.get_parameter(gu_w_name) + E_full = int(gu_w_t.shape[0]) + H = int(gu_w_t.shape[1]) + two_I = int(gu_w_t.shape[2]) + i_size = two_I // 2 + + # Cross-layer consistency check (the load hook is registered once + # for the whole module, so all layers must share these). + if hidden_size_global is None: + hidden_size_global = H + intermediate_size_global = i_size + num_experts_global = E_full + else: + if (H, i_size, E_full) != ( + hidden_size_global, + intermediate_size_global, + num_experts_global, + ): + raise ValueError( + f"quantize_mxfp4_moe(backend=trtllm): inconsistent MoE shapes " + f"across layers (got H={H}, I={i_size}, E={E_full}; previously " + f"H={hidden_size_global}, I={intermediate_size_global}, " + f"E={num_experts_global}). All MoE layers must share shape." + ) + + if E_full % moe_ep_size != 0: + raise ValueError( + f"num_experts ({E_full}) must be divisible by moe_ep_size ({moe_ep_size})" + ) + e_local = E_full // moe_ep_size + + # Locate the experts module via the gate_up param path. + experts_mod, experts_path, _ = get_submodule_of_param(gm, gu_w_name) + + # Per-rank dims after EP+TP slicing. The kernel-layout work + # (H-axis pad, TMA shuffle, dtype convert) is deferred to + # ``FuseMXFP4Moe`` at POST_LOAD_FUSION on GPU. EP+TP sharding is + # done on CPU inside the load hook (see + # :func:`make_mxfp4_sharding_load_hook`). + h_blk = max(1, H // 32) + + # TP-aware pre-pad math (mirrors the hook). The hook pads the raw + # intermediate axis to ``i_padded_tp`` then slices ``per_rank_i`` + # rows; ``per_rank_i`` is guaranteed to be a multiple of 128 by + # ``_get_weight_alignment``, so it's also the per-rank kernel + # weight-alignment size that the trtllm-gen runner expects. + if moe_tp_size > 1: + # Lazy import: TRT-LLM-only helper (see module-level note above). + from tensorrt_llm._torch.modules.fused_moe.quantization import _get_weight_alignment + + alignment_tp = _get_weight_alignment( + _WEIGHT_ALIGNMENT, _MXFP4_SCALING_VECTOR_SIZE, moe_tp_size, i_size + ) + i_padded_tp = ((i_size + alignment_tp - 1) // alignment_tp) * alignment_tp + per_rank_i = i_padded_tp // moe_tp_size + slice_start = moe_tp_rank * per_rank_i + slice_stop = (moe_tp_rank + 1) * per_rank_i + # ``valid_intermediate_size`` reports the unpadded portion of + # this rank's slice — used by the kernel to mask OOB MMA in + # padded regions. + valid_intermediate_size = max(0, min(i_size, slice_stop) - slice_start) + else: + per_rank_i = i_size + valid_intermediate_size = i_size + + # Local I block-count for down_proj after TP slicing. + i_blk_local = max(1, per_rank_i // 32) + two_i_local = 2 * per_rank_i # gate_up's 2I axis is per-rank too + + num_local_experts = e_local + local_expert_offset = moe_ep_rank * e_local + valid_hidden_size = H + + # Register RAW HF MXFP4 params at the EP+TP-sliced shape — names + # match HF safetensors so the standard load path populates them + # after the sharding hook does the leading-axis (EP) + intermediate + # (TP) slice on the state-dict tensors. + raw_specs = [ + ("gate_up_proj_blocks", (e_local, two_i_local, h_blk, 16), torch.uint8), + ("gate_up_proj_scales", (e_local, two_i_local, h_blk), torch.uint8), + ("gate_up_proj_bias", (e_local, two_i_local), torch.bfloat16), + ("down_proj_blocks", (e_local, H, i_blk_local, 16), torch.uint8), + ("down_proj_scales", (e_local, H, i_blk_local), torch.uint8), + ("down_proj_bias", (e_local, H), torch.bfloat16), + ] + # Reuse the existing placeholder's device (meta in the normal + # meta-device build) so we don't materialize giant CPU buffers + # before load_weights runs. Safe because names match HF + # safetensors and the load path overwrites the bytes. + param_device = gu_w_t.device + for name, shape, dtype in raw_specs: + experts_mod.register_parameter( + name, + nn.Parameter( + torch.empty(shape, dtype=dtype, device=param_device), + requires_grad=False, + ), + ) + + # SwiGLU constants. These are NOT in HF safetensors, so we set + # them with their numeric defaults here (matches gpt-oss config: + # alpha=1.702, beta=1.0, limit=7.0). The kernel expects fp32 + # tensors of length ``num_local_experts``. + # IMPORTANT: do NOT pass ``device=param_device`` here — on a + # meta-device build that would create meta tensors and the + # constants (1.702 / 1.0 / 7.0) would be lost; nothing later + # re-injects them, which silently breaks SwiGLU and tanks + # accuracy. + a, b, c = make_swiglu_param_tensors(num_local_experts) + experts_mod.register_parameter( + "swiglu_alpha_trtllm", nn.Parameter(a, requires_grad=False) + ) + experts_mod.register_parameter( + "swiglu_beta_trtllm", nn.Parameter(b, requires_grad=False) + ) + experts_mod.register_parameter( + "swiglu_limit_trtllm", nn.Parameter(c, requires_grad=False) + ) + + # Track layer index so the load hook iterates the right range. + m = layer_re.search(experts_path or "") + if m: + layer_indices.append(int(m.group(1))) + + # Build get_attr nodes for the RAW params (will be replaced by + # ``FuseMXFP4Moe`` once GPU-side prep produces the kernel layout). + prefix_path = (experts_path + ".") if experts_path else "" + with gm.graph.inserting_before(n): + gu_blocks_attr = gm.graph.create_node( + "get_attr", prefix_path + "gate_up_proj_blocks" + ) + gu_scales_attr = gm.graph.create_node( + "get_attr", prefix_path + "gate_up_proj_scales" + ) + gu_bias_attr = gm.graph.create_node("get_attr", prefix_path + "gate_up_proj_bias") + dn_blocks_attr = gm.graph.create_node("get_attr", prefix_path + "down_proj_blocks") + dn_scales_attr = gm.graph.create_node("get_attr", prefix_path + "down_proj_scales") + dn_bias_attr = gm.graph.create_node("get_attr", prefix_path + "down_proj_bias") + sa_attr = gm.graph.create_node("get_attr", prefix_path + "swiglu_alpha_trtllm") + sb_attr = gm.graph.create_node("get_attr", prefix_path + "swiglu_beta_trtllm") + sl_attr = gm.graph.create_node("get_attr", prefix_path + "swiglu_limit_trtllm") + + # Rewrite the op call. Op target is chosen by ``trtllm_quant_act``. + # The op args point at RAW HF MXFP4 buffers for now — the op is + # NOT runnable until ``FuseMXFP4Moe`` (POST_LOAD_FUSION) swaps in + # the prepared layout. That is safe because no forward pass runs + # between PATTERN_MATCHER and POST_LOAD_FUSION. + # Single op trtllm_quant_mxfp4_trtllm_gen_moe_fused; ``act_dtype`` arg + # selects W4A16 (bf16) vs W4A8 (mxfp8) cubin family at runtime. + n.target = target_op + n.kwargs = {} + n.args = ( + hidden_node, + router_weight_node, + router_bias_node, + int(top_k), + gu_blocks_attr, # fc1_weights_mxfp4 (raw uint8; FuseMXFP4Moe replaces) + dn_blocks_attr, # fc2_weights_mxfp4 (raw uint8) + gu_scales_attr, # fc1_weights_scale_ue8m0 (raw uint8) + dn_scales_attr, # fc2_weights_scale_ue8m0 (raw uint8) + gu_bias_attr, # fc1_bias_f32 (raw bf16; FuseMXFP4Moe converts/pads/shuffles) + dn_bias_attr, # fc2_bias_f32 (raw bf16) + sa_attr, + sb_attr, + sl_attr, + valid_hidden_size, + valid_intermediate_size, + quant_act, # act_dtype: "bf16" (W4A16) or "mxfp8" (W4A8) + local_expert_offset, + num_local_experts, + 1, # routing_method_type = RoutingMethodType.Renormalize + ) + + # Distributed MoE: insert an all_reduce after the downstream view so + # the ``MoE -> view -> AR -> add -> norm`` ordering matches + # ``fuse_allreduce_residual_rmsnorm`` (see legacy transform's + # rationale for the same placement). + # + # Both MoE-TP and MoE-EP need an AR after the local MoE op: + # - MoE-TP: each rank computes partial inner-product (summed + # by AR to reconstruct the full intermediate-dim contraction). + # - MoE-EP: each rank computes outputs only for its local + # expert range (zero contribution from other experts); + # AR sums per-token outputs across ranks. + # Use ``tp_size > 1`` (= ``moe_tp_size * moe_ep_size * + # moe_cluster_size > 1``) so the AR fires for any distributed + # configuration. Matches taylor's pre-refactor modeling code + # which emitted an unconditional AR placeholder at this exact + # spot (commit bad1871004 + 93f78e962c, validated EP=2 GSM8K + # 88.02%). + tp_size = int(getattr(dc, "tp_size", 1)) if dc is not None else 1 + if tp_size > 1: + from .sharding import _get_dist_ops + + _, all_reduce_op = _get_dist_ops("auto") + view_node = next( + ( + u + for u in n.users.keys() + if u.op == "call_function" and u.target == torch.ops.aten.view.default + ), + None, + ) + anchor = view_node if view_node is not None else n + with gm.graph.inserting_after(anchor): + red = gm.graph.call_function( + all_reduce_op, + args=(anchor, allreduce_strategy), + ) + anchor.replace_all_uses_with(red) + red.replace_input_with(red, anchor) + + # Erase old router node + stale bf16 get_attr nodes if unused. + if len(routing_node.users) == 0: + gm.graph.erase_node(routing_node) + for stale_node in ( + gate_up_w_node, + gate_up_b_node, + down_w_node, + down_b_node, + ): + if len(stale_node.users) == 0: + gm.graph.erase_node(stale_node) + + # Free bf16 placeholders from the experts module so they don't + # linger as orphaned attributes (and don't get loaded from HF + # via the standard load_state_dict path). Skip the *bias* names + # because we re-registered them with the SAME names as new raw + # HF MXFP4 params (``gate_up_proj_bias`` / ``down_proj_bias``); + # those are the ones we want to keep, not delete. Only the + # ``gate_up_proj`` / ``down_proj`` weight tensors (which don't + # collide with any raw param name) need to be cleaned up here. + for stale_name in (gu_w_name, dn_w_name): + owner_mod, _path, attr_short = get_submodule_of_param(gm, stale_name) + _delete_module_attr(owner_mod, attr_short) + + num_matches += 1 + + # Register top-level EP+TP sharding load hook whenever there is any + # actual sharding on the MoE axes. The hook only does *sharding* + # (EP leading-axis slice + TP-aware pre-pad / intermediate-axis + # slice) on the raw HF MXFP4 state-dict entries; the kernel-layout + # work (H-axis pad, TMA shuffle, dtype convert, bias / tp_size) is + # deferred to :class:`FuseMXFP4Moe` on GPU at POST_LOAD_FUSION. + if num_matches > 0 and (moe_ep_size > 1 or moe_tp_size > 1): + assert num_experts_global is not None # for type checker + assert intermediate_size_global is not None + num_layers = (max(layer_indices) + 1) if layer_indices else num_matches + gm._register_load_state_dict_pre_hook( + make_mxfp4_sharding_load_hook( + num_layers=num_layers, + num_experts=num_experts_global, + intermediate_size=intermediate_size_global, + moe_ep_size=moe_ep_size, + moe_ep_rank=moe_ep_rank, + moe_tp_size=moe_tp_size, + moe_tp_rank=moe_tp_rank, + ) + ) + ad_logger.info( + f"quantize_mxfp4_moe (backend=trtllm, quant_act={quant_act}): " + f"rewrote {num_matches} MoE node(s); registered load hook for " + f"{num_layers} layer slots." + ) + + info = TransformInfo( + skipped=(num_matches == 0), + num_matches=num_matches, + is_clean=(num_matches == 0), + has_valid_shapes=(num_matches == 0), + ) + return gm, info + + +def _delete_module_attr(module: nn.Module, name: str) -> None: + """Remove a parameter/buffer/attr from a Module if present.""" + if name in module._parameters: + del module._parameters[name] + elif name in module._buffers: + del module._buffers[name] + elif hasattr(module, name): + delattr(module, name) + + +class FuseMXFP4MoeConfig(TransformConfig): + """Configuration for ``fuse_mxfp4_moe`` (POST_LOAD_FUSION).""" + + +@TransformRegistry.register("fuse_mxfp4_moe") +class FuseMXFP4Moe(BaseTransform): + """POST_LOAD_FUSION transform: GPU-side MXFP4 MoE weight prep for the trtllm-gen backend. + + Runs after ``QuantizeMXFP4MOE`` registered raw HF MXFP4 buffers and the EP-slice load hook + populated them. For each ``trtllm_quant_mxfp4_trtllm_gen_moe_fused`` node, calls + :func:`prepare_trtllm_gen_moe_mxfp4_weights` on the loaded GPU tensors to produce the kernel + layout, swaps the op args to the prepared params, and deletes the raw buffers. + + Skipped when the op already references prepared params (idempotent). + """ + + config: FuseMXFP4MoeConfig + + @classmethod + def get_config_class(cls) -> Type[TransformConfig]: + return FuseMXFP4MoeConfig + + def _apply( + self, + gm: GraphModule, + cm, + factory, + shared_config, + ) -> Tuple[GraphModule, TransformInfo]: + """Two-pass GPU prep with shared scratch + contiguous prepared blocks. + + Pass 1 (``_collect_moe_nodes``): walk the graph, find every + ``trtllm_quant_mxfp4_trtllm_gen_moe_fused`` op whose weight args still reference + raw HF buffers, record the per-layer info (experts module path, raw + ``get_attr`` nodes, shapes). Cross-layer consistency is asserted + (gpt-oss guarantees same H/I/E across all MoE layers). + + Pass 2: allocate ``MXFP4PrepScratch`` once for the per-rank shape. + Reused for every layer's pad + shuffle work. + + Pass 3: pre-allocate the SIX prepared ``nn.Parameter`` storages on + every experts module *before* any layer's prep runs. This is the + fragmentation-prevention step — all prepared blocks for all layers + come from the allocator's frontier in one back-to-back run, so no + transient alloc/free cycle from the prep work can interleave them. + + Pass 4: per layer, run ``prepare_trtllm_gen_moe_mxfp4_weights`` with + ``scratch=`` (pad + shuffle outputs land in scratch buffers, no + per-layer transient allocations of the big intermediates). Then + ``data.copy_`` scratch outputs into the pre-allocated prepared + params, re-point the op args, delete raw params + raw get_attrs. + """ + from ...custom_ops.fused_moe.prepare_trtllm_gen_moe_mxfp4_weights import ( + MXFP4PrepScratch, + prepare_trtllm_gen_moe_mxfp4_weights, + ) + + # Resolve runtime topology — used to divide ``fc2_bias`` by + # ``moe_tp_size`` (the prep helper's tp_size > 1 branch is skipped in + # the scratch path, so we do the division ourselves after). + dc = getattr(shared_config, "dist_config", None) + moe_tp_size = int(getattr(dc, "moe_tp_size", 1)) if dc is not None else 1 + + # Single MXFP4 trtllm-gen MoE op (act_dtype="bf16" or "mxfp8"). + target_op = torch.ops.auto_deploy.trtllm_quant_mxfp4_trtllm_gen_moe_fused.default + + # ---- Pass 1: collect MoE node info, validate consistent shape ---- + # Arg index layout from ``_apply_trtllm`` (kept in sync; comment + # block there documents the full slot list). + ARG_FC1_W, ARG_FC2_W, ARG_FC1_S, ARG_FC2_S, ARG_FC1_B, ARG_FC2_B = 4, 5, 6, 7, 8, 9 + + layer_infos: list = [] + e_local_g: Optional[int] = None + per_rank_i_g: Optional[int] = None + H_g: Optional[int] = None + device_g: Optional[torch.device] = None + for n in list(gm.graph.nodes): + if n.op != "call_function" or n.target is not target_op: + continue + if len(n.args) < 13: + continue + + raw_get_attrs = ( + n.args[ARG_FC1_W], # gate_up_proj_blocks + n.args[ARG_FC2_W], # down_proj_blocks + n.args[ARG_FC1_S], # gate_up_proj_scales + n.args[ARG_FC2_S], # down_proj_scales + n.args[ARG_FC1_B], # gate_up_proj_bias + n.args[ARG_FC2_B], # down_proj_bias + ) + if not all(isinstance(a, Node) and a.op == "get_attr" for a in raw_get_attrs): + continue + if not str(raw_get_attrs[0].target).endswith("gate_up_proj_blocks"): + # Already prepped or unexpected layout — skip. + continue + + gu_blocks_name = raw_get_attrs[0].target + experts_mod, experts_path, _ = get_submodule_of_param(gm, gu_blocks_name) + gu_blocks = gm.get_parameter(gu_blocks_name).data + dn_blocks = gm.get_parameter(raw_get_attrs[1].target).data + + e_local = int(gu_blocks.shape[0]) + two_i_local = int(gu_blocks.shape[1]) + per_rank_i = two_i_local // 2 + H = int(dn_blocks.shape[1]) + device = gu_blocks.device + + if e_local_g is None: + e_local_g, per_rank_i_g, H_g, device_g = e_local, per_rank_i, H, device + else: + if (e_local, per_rank_i, H) != (e_local_g, per_rank_i_g, H_g): + raise ValueError( + f"fuse_mxfp4_moe: cross-layer shape mismatch — layer " + f"got (E={e_local}, I={per_rank_i}, H={H}) but previous " + f"layers had (E={e_local_g}, I={per_rank_i_g}, H={H_g})." + ) + + layer_infos.append( + { + "node": n, + "experts_mod": experts_mod, + "experts_path": experts_path, + "raw_get_attrs": raw_get_attrs, + "raw_names": tuple(a.target for a in raw_get_attrs), + } + ) + + num_matches = len(layer_infos) + if num_matches == 0: + info = TransformInfo(skipped=True, num_matches=0, is_clean=True, has_valid_shapes=True) + return gm, info + + # ---- Pass 2: allocate scratch ONCE ---- + scratch = MXFP4PrepScratch.allocate( + e_local=e_local_g, + per_rank_i=per_rank_i_g, + hidden_size=H_g, + device=device_g, + ) + + # ---- Pass 3: pre-allocate ALL prepared params (no data yet) ---- + # The six prepared kinds (fc1/fc2 × {w, s, b}). Shape + dtype mirror + # scratch fields; allocating them now (before any per-layer prep + # work) places them at the allocator frontier in one contiguous run, + # with no per-layer transient alloc/free in between. + prepared_kinds = ( + ("fc1_w_trtllm", scratch.fc1_w_buf.shape, scratch.fc1_w_buf.dtype), + ("fc1_w_scale_trtllm", scratch.fc1_s_buf.shape, scratch.fc1_s_buf.dtype), + ("fc1_bias_trtllm", scratch.fc1_b_buf.shape, scratch.fc1_b_buf.dtype), + ("fc2_w_trtllm", scratch.fc2_w_buf.shape, scratch.fc2_w_buf.dtype), + ("fc2_w_scale_trtllm", scratch.fc2_s_buf.shape, scratch.fc2_s_buf.dtype), + ("fc2_bias_trtllm", scratch.fc2_b_buf.shape, scratch.fc2_b_buf.dtype), + ) + for info_dict in layer_infos: + experts_mod = info_dict["experts_mod"] + for name, shape, dtype in prepared_kinds: + experts_mod.register_parameter( + name, + nn.Parameter( + torch.empty(shape, dtype=dtype, device=device_g), + requires_grad=False, + ), + ) + + # ---- Pass 4: per-layer prep into scratch + copy into prepared ---- + for info_dict in layer_infos: + n = info_dict["node"] + experts_mod = info_dict["experts_mod"] + experts_path = info_dict["experts_path"] + raw_get_attrs = info_dict["raw_get_attrs"] + raw_names = info_dict["raw_names"] + + gu_blocks = gm.get_parameter(raw_names[0]).data + dn_blocks_t = gm.get_parameter(raw_names[1]).data + gu_scales = gm.get_parameter(raw_names[2]).data + dn_scales = gm.get_parameter(raw_names[3]).data + gu_bias = gm.get_parameter(raw_names[4]).data + dn_bias = gm.get_parameter(raw_names[5]).data + + # Run prep with shared scratch — outputs are views into scratch, + # we copy_ them into the pre-allocated prepared params below. + prep = prepare_trtllm_gen_moe_mxfp4_weights( + gu_blocks, + gu_scales, + gu_bias, + dn_blocks_t, + dn_scales, + dn_bias, + hidden_size=H_g, + intermediate_size=per_rank_i_g, + tp_size=1, + tp_rank=0, + scratch=scratch, + ) + + # Copy scratch outputs into the pre-allocated prepared params. + # ``fc2_bias`` gets divided by ``moe_tp_size`` so the post-AR sum + # reproduces the unsharded bias (mirrors the prep helper's + # ``tp_size > 1`` branch which we skip in the scratch path). + getp = experts_mod.get_parameter + getp("fc1_w_trtllm").data.copy_(prep.fc1_weights_mxfp4) + getp("fc1_w_scale_trtllm").data.copy_(prep.fc1_weights_scale_ue8m0) + getp("fc1_bias_trtllm").data.copy_(prep.fc1_bias_f32) + getp("fc2_w_trtllm").data.copy_(prep.fc2_weights_mxfp4) + getp("fc2_w_scale_trtllm").data.copy_(prep.fc2_weights_scale_ue8m0) + if moe_tp_size > 1: + getp("fc2_bias_trtllm").data.copy_(prep.fc2_bias_f32 / moe_tp_size) + else: + getp("fc2_bias_trtllm").data.copy_(prep.fc2_bias_f32) + + # Build prepared get_attr nodes inserted right before the op call, + # then re-point the op's weight args to the prepared get_attrs. + prefix_path = (experts_path + ".") if experts_path else "" + with gm.graph.inserting_before(n): + fc1_w_attr = gm.graph.create_node("get_attr", prefix_path + "fc1_w_trtllm") + fc2_w_attr = gm.graph.create_node("get_attr", prefix_path + "fc2_w_trtllm") + fc1_s_attr = gm.graph.create_node("get_attr", prefix_path + "fc1_w_scale_trtllm") + fc2_s_attr = gm.graph.create_node("get_attr", prefix_path + "fc2_w_scale_trtllm") + fc1_b_attr = gm.graph.create_node("get_attr", prefix_path + "fc1_bias_trtllm") + fc2_b_attr = gm.graph.create_node("get_attr", prefix_path + "fc2_bias_trtllm") + + new_args = list(n.args) + new_args[ARG_FC1_W] = fc1_w_attr + new_args[ARG_FC2_W] = fc2_w_attr + new_args[ARG_FC1_S] = fc1_s_attr + new_args[ARG_FC2_S] = fc2_s_attr + new_args[ARG_FC1_B] = fc1_b_attr + new_args[ARG_FC2_B] = fc2_b_attr + n.args = tuple(new_args) + + # Erase raw get_attr nodes if no other consumer. + for stale_node in raw_get_attrs: + if len(stale_node.users) == 0: + gm.graph.erase_node(stale_node) + + # Delete raw module params now that prepared replaces them. + for raw_name in ( + "gate_up_proj_blocks", + "gate_up_proj_scales", + "gate_up_proj_bias", + "down_proj_blocks", + "down_proj_scales", + "down_proj_bias", + ): + _delete_module_attr(experts_mod, raw_name) + + # Scratch goes out of scope here → CUDA caching allocator reclaims + # the scratch region. The persistent prepared blocks remain + # contiguous (allocated before scratch was freed and after raw was + # being deleted layer by layer). + del scratch + + ad_logger.info( + f"fuse_mxfp4_moe: GPU-prepped {num_matches} MoE node(s) " + f"with shared scratch (E={e_local_g}, I={per_rank_i_g}, H={H_g})" + ) + + info = TransformInfo( + skipped=False, + num_matches=num_matches, + is_clean=False, + has_valid_shapes=True, + ) + return gm, info diff --git a/tensorrt_llm/_torch/auto_deploy/transform/library/fusion.py b/tensorrt_llm/_torch/auto_deploy/transform/library/fusion.py index de83dab56df9..8ee2910d7725 100644 --- a/tensorrt_llm/_torch/auto_deploy/transform/library/fusion.py +++ b/tensorrt_llm/_torch/auto_deploy/transform/library/fusion.py @@ -38,6 +38,11 @@ from ..interface import BaseTransform, SharedConfig, TransformInfo, TransformRegistry +def _extract_fusable_weight_names(linear_nodes: List[Node]) -> List[str]: + keys = [extract_weight_name(n) for n in linear_nodes] + return [key for key in keys if isinstance(key, str)] + + def _insert_fused_gemm( gm: GraphModule, idx: int, @@ -66,8 +71,16 @@ def _insert_fused_gemm( y = x @ w.T y1 = y.narrow(-1, 0, out1).contiguous() # contiguous copy y2 = y.narrow(-1, out1, out2).contiguous() # contiguous copy + + Bias handling: + All children must have uniform bias state (all with bias or none). + Each bias must be 1D per-channel matching its weight's out_features. + Stacked bias is the dim=0 concatenation, mirroring weight stacking. """ - keys_unfused = [extract_weight_name(n) for n in linear_nodes] + keys_unfused = _extract_fusable_weight_names(linear_nodes) + if len(keys_unfused) != len(linear_nodes): + ad_logger.warning("Skipping GEMM fusion because at least one weight is not a parameter.") + return False params_unfused = [gm.get_parameter(k) for k in keys_unfused] sizes_unfused = [p.size(0) for p in params_unfused] @@ -77,13 +90,55 @@ def _insert_fused_gemm( return False weight_dtype = dtypes.pop() + # --- Bias fusibility check (all-or-none + 1D per-channel + size match) --- + bias_args = [n.args[2] for n in linear_nodes] + bias_present = [b is not None for b in bias_args] + if any(bias_present) and not all(bias_present): + # Mixed bias state — would require padding with zeros; bail out. + return False + has_bias = bias_present[0] + bias_params: List[torch.Tensor] = [] + if has_bias: + for n, w_param in zip(linear_nodes, params_unfused): + bnode = n.args[2] + # Only fuse statically known biases (get_attr nodes). + if bnode.op != "get_attr": + ad_logger.warning( + f"Skipping GEMM fusion for {keys_unfused}: bias is not a get_attr node" + ) + return False + bp = gm.get_parameter(bnode.target) + # Reject anything other than per-channel 1D bias matching out_features. + if bp.dim() != 1 or bp.size(0) != w_param.size(0): + ad_logger.warning( + f"Skipping GEMM fusion for {keys_unfused}: non per-channel bias " + f"(weight out={w_param.size(0)}, bias shape={tuple(bp.shape)})" + ) + return False + bias_params.append(bp) + bias_dtypes = {p.dtype for p in bias_params} + if len(bias_dtypes) != 1: + ad_logger.warning( + f"Skipping GEMM fusion for {keys_unfused}: mixed bias dtypes {bias_dtypes}" + ) + return False + key_fused = f"fused_weight_{idx}" fused_weight = torch.cat(params_unfused, dim=0).to(weight_dtype) param_fused = nn.Parameter(fused_weight, requires_grad=False) setattr(gm, key_fused, param_fused) + bias_key_fused = None + if has_bias: + bias_key_fused = f"fused_bias_{idx}" + bias_dtype = bias_params[0].dtype + fused_bias = torch.cat(bias_params, dim=0).to(bias_dtype) + bias_param_fused = nn.Parameter(fused_bias, requires_grad=False) + setattr(gm, bias_key_fused, bias_param_fused) + ad_logger.warning( - f"Fusing {len(linear_nodes)} GEMMs ({keys_unfused}) into {key_fused} (dtype={weight_dtype})" + f"Fusing {len(linear_nodes)} GEMMs ({keys_unfused}) into {key_fused} " + f"(dtype={weight_dtype}, bias={'yes' if has_bias else 'no'})" ) fused_kwargs = dict(linear_nodes[0].kwargs) @@ -91,11 +146,12 @@ def _insert_fused_gemm( with gm.graph.inserting_before(linear_nodes[0]): get_param_node = gm.graph.get_attr(key_fused, torch.Tensor) + get_bias_node = gm.graph.get_attr(bias_key_fused, torch.Tensor) if has_bias else None with gm.graph.inserting_before(linear_nodes[0]): fused_linear_node = gm.graph.call_function( linear_nodes[0].target, - args=(parent_node, get_param_node, None), + args=(parent_node, get_param_node, get_bias_node), kwargs=fused_kwargs, ) if ref_val is not None: @@ -192,7 +248,12 @@ def _insert_fused_quant_gemm( allow_not_contigous: If True, split output via torch.narrow (zero-copy view). If False, split via torch.narrow + .contiguous() (independent contiguous copies). """ - keys_unfused = [extract_weight_name(n) for n in linear_nodes] + keys_unfused = _extract_fusable_weight_names(linear_nodes) + if len(keys_unfused) != len(linear_nodes): + ad_logger.warning( + "Skipping quantized GEMM fusion because at least one weight is not a parameter." + ) + return False params_unfused = [gm.get_parameter(k) for k in keys_unfused] sizes_unfused = [p.size(0) for p in params_unfused] key_fused = f"fused_weight_{idx}" @@ -325,18 +386,20 @@ def _apply( factory: ModelFactory, shared_config: SharedConfig, ) -> Tuple[GraphModule, TransformInfo]: - # sort linear nodes by parent node + # sort linear nodes by (parent, has_bias). Bias and no-bias siblings + # can't co-fuse (would need zero-padding), so bucket them separately + # to preserve partial fusion when a subset is bias-uniform. linear_nodes = defaultdict(list) for node in gm.graph.nodes: - # TODO: we don't handle bias for now... - if is_linear_op(node) and node.args[2] is None: - linear_nodes[node.args[0]].append(node) + if is_linear_op(node): + has_bias = node.args[2] is not None + linear_nodes[(node.args[0], has_bias)].append(node) # fuse linear nodes idx = -1 num_matches = 0 with cuda_memory_tracker(): - for parent_node, lin_children in linear_nodes.items(): + for (parent_node, _has_bias), lin_children in linear_nodes.items(): if len(lin_children) < 2: continue if not check_same_children(parent_node, is_linear_op): @@ -427,11 +490,14 @@ def _apply( grouped_nodes: Dict[tuple, List[Node]] = defaultdict(list) for node in gm.graph.nodes: if (is_linear_op(node) or is_fake_quantized_linear_op(node)) and node.args[2] is None: + weight_name = extract_weight_name(node) + if not isinstance(weight_name, str): + continue # Skip linears with a unit dimension (e.g., [1, H] scalar gates). # A weight with dim=1 is effectively a lower-order tensor and # should not be fused with proper matrix projections. try: - w = gm.get_parameter(extract_weight_name(node)) + w = gm.get_parameter(weight_name) if any(d == 1 for d in w.shape): continue except (AttributeError, KeyError): diff --git a/tensorrt_llm/_torch/auto_deploy/transform/library/hidden_states.py b/tensorrt_llm/_torch/auto_deploy/transform/library/hidden_states.py index f86b7da8abbc..58cb9eddaac9 100644 --- a/tensorrt_llm/_torch/auto_deploy/transform/library/hidden_states.py +++ b/tensorrt_llm/_torch/auto_deploy/transform/library/hidden_states.py @@ -26,8 +26,8 @@ AttentionDescriptor, AttentionLayout, AttentionRegistry, + EphemeralResourceHandler, MHACallable, - ResourceHandler, ResourceHandlerDict, SequenceInfo, ) @@ -215,12 +215,17 @@ def _apply( ) -class HiddenStatesResourceHandler(ResourceHandler): +class HiddenStatesResourceHandler(EphemeralResourceHandler): """A resource handler for hidden states.""" def __init__(self, hidden_size: int, dtype: torch.dtype) -> None: """Initialize the HiddenStatesResourceHandler. + MTP/Eagle collects hidden states from the target model and reads them in the draft model + in the same forward pass. We store these resources in an EphemeralResourceHandler because + they do not need to persist between iterations, and can be dropped when transferring + resources between forward passes. + Args: hidden_size: The size of the hidden states resource. dtype: The dtype of the hidden states resource. diff --git a/tensorrt_llm/_torch/auto_deploy/transform/library/kvcache.py b/tensorrt_llm/_torch/auto_deploy/transform/library/kvcache.py index e4aadeab3d6e..e0eae9ae01cd 100644 --- a/tensorrt_llm/_torch/auto_deploy/transform/library/kvcache.py +++ b/tensorrt_llm/_torch/auto_deploy/transform/library/kvcache.py @@ -54,6 +54,8 @@ Constant, KVPagedResourceHandler, PrepareMetadataCallable, + ResourceHandler, + SpeculativeOnly, ) from ...custom_ops.semantic_mask_registry import SemanticMaskRegistry from ...models.factory import ModelFactory @@ -329,6 +331,22 @@ def _insert_cached_attn_node( attn_node.replace_all_uses_with(cached_attn_node) gm.graph.erase_node(attn_node) + @staticmethod + def _suppress_spec_handlers_maybe( + resource_handler: Optional[ResourceHandler], spec_config: Optional[object] + ) -> Optional[ResourceHandler]: + """Drop a speculative-only resource to the None sentinel when spec decoding is off. + + Handlers carrying the ``SpeculativeOnly`` trait are read only on the speculative extend + path and are never bound by the cache manager without ``spec_config``; registering them + would leak an unmanaged per-layer allocation. Returns ``None`` for such handlers when + ``spec_config`` is None, otherwise returns ``resource_handler`` unchanged (``isinstance`` + is None-safe, so the existing None sentinel passes through untouched). + """ + if spec_config is None and isinstance(resource_handler, SpeculativeOnly): + return None + return resource_handler + def _apply( self, gm: GraphModule, @@ -349,6 +367,12 @@ def _apply( skipped=True, num_matches=0, is_clean=True, has_valid_shapes=True ) + # Record whether this backend's kernel applies the sliding-window mask + # itself (cyclic KV indexing, e.g. trtllm). The executor uses this to + # decide between passing the full per-window block table + global KV + # lengths (cyclic) and host-slicing to the live window (triton/flashinfer). + cm.set_kernel_handles_cyclic_swa(attn_descriptor.kernel_handles_cyclic_swa()) + # get standard metadata nodes for all source attention nodes meta_nodes_std = self._process_metadata_std(gm, cm) @@ -379,8 +403,6 @@ def _apply( # --- Pass 1: register resources and assign per-layer group_idx --- # Group identity comes from KVPagedResourceHandler.__eq__ (which # includes sliding_window). A group IS a pool IS a metadata set. - from ...custom_ops.attention_interface import KVPagedResourceHandler - handler_groups: list[KVPagedResourceHandler] = [] per_layer_group_idx: list[int] = [] group_idx_by_layer_idx: dict[int, int] = {} @@ -428,6 +450,14 @@ def _apply( for k, resource_handler in attn_descriptor.get_cache_initializers( attn_node, cm.kv_cache_config ).items(): + # Speculative-only resources (intermediate SSM/conv state and replay + # buffers) are never bound by the cache manager when spec decoding is off + # (see CachedSequenceInterface._create_and_assign_state_views), so + # allocating them would waste a full per-layer state buffer and OOM. Drop + # them to the None sentinel instead of registering an unmanaged resource. + resource_handler = self._suppress_spec_handlers_maybe( + resource_handler, cm._spec_config + ) if resource_handler is None: # None sentinel: pass literal None positionally, no resource allocated. cache_in_nodes.append(None) diff --git a/tensorrt_llm/_torch/auto_deploy/transform/library/multi_stream_moe.py b/tensorrt_llm/_torch/auto_deploy/transform/library/multi_stream_moe.py index dc71bf1ff7a6..33ba897f916e 100644 --- a/tensorrt_llm/_torch/auto_deploy/transform/library/multi_stream_moe.py +++ b/tensorrt_llm/_torch/auto_deploy/transform/library/multi_stream_moe.py @@ -29,7 +29,7 @@ end_aux_stream_passthrough, wait_aux_stream_passthrough, ) -from ...utils.node_utils import has_shape, is_op +from ...utils.node_utils import all_reduce_ops, has_shape, is_op from ..interface import BaseTransform, SharedConfig, TransformInfo, TransformRegistry @@ -194,7 +194,32 @@ def _execute_shared_expert_in_aux_stream( # Order shared nodes by their position in the graph. shared_nodes.sort(key=lambda n: node_order.get(n, 0)) - first_shared = shared_nodes[0] + + # Collectives (all-reduce) in the shared-expert branch must stay on the + # MAIN stream. A collective synchronizes across ranks, and that + # rendezvous does not compose with per-rank aux-stream overlap: when the + # shared-expert all-reduce is captured on the aux stream while the + # routed-expert all-reduce runs on the main stream, the two symm-mem + # MULTIMEM collectives (world_size >= 6 on SM100) interleave across ranks + # under monolithic CUDA-graph replay and silently corrupt the output. + # We therefore overlap only the shared-expert GEMMs on the aux stream and + # run the trailing all-reduce on the main stream. + ar_ops = all_reduce_ops() + collective_node = shared_output if is_op(shared_output, ar_ops) else None + aux_region = [n for n in shared_nodes if n is not collective_node] + + # The aux-stream region must contain compute and must not itself contain + # a collective (only a trailing shared-output collective can be split + # off safely). + if not aux_region or any(is_op(n, ar_ops) for n in aux_region): + ad_logger.warning( + f"Shared-expert branch of MoE node {moe_node.name} has no aux-stream " + "compute outside of a collective; skipping multi-stream transform for " + "this node." + ) + continue + + first_shared = aux_region[0] # Sanity check: the first shared op must directly consume the fork # point so we can wire begin_aux_stream_passthrough into it. @@ -222,28 +247,67 @@ def _execute_shared_expert_in_aux_stream( begin_aux_node if arg is fork_point else arg for arg in first_shared.args ) - # ---- Step 5: Insert end_aux after the last shared-expert op. ---- - with graph.inserting_after(shared_output): - end_aux_node = graph.call_function( - end_aux_stream_passthrough, - args=(shared_output,), + if collective_node is None: + # ---- Step 5: Insert end_aux after the last shared-expert op. ---- + with graph.inserting_after(shared_output): + end_aux_node = graph.call_function( + end_aux_stream_passthrough, + args=(shared_output,), + ) + + # Replace shared-expert input to the merge node with end_aux output. + merge_node.args = tuple( + end_aux_node if arg is shared_output else arg for arg in merge_node.args ) - # Replace shared-expert input to the merge node with end_aux output. - merge_node.args = tuple( - end_aux_node if arg is shared_output else arg for arg in merge_node.args - ) + # ---- Step 6: Insert wait_aux before the merge node. ---- + with graph.inserting_before(merge_node): + wait_aux_node = graph.call_function( + wait_aux_stream_passthrough, + args=(routed_output,), + ) - # ---- Step 6: Insert wait_aux before the merge node. ---- - with graph.inserting_before(merge_node): - wait_aux_node = graph.call_function( - wait_aux_stream_passthrough, - args=(routed_output,), + merge_node.args = tuple( + wait_aux_node if arg is routed_output else arg for arg in merge_node.args + ) + else: + # The trailing all-reduce stays on the main stream. End the aux + # region after the last aux-stream compute op (e.g. the rowwise + # down-projection) and make the main stream wait for it before the + # collective consumes the result. + aux_boundary = max( + (a for a in collective_node.all_input_nodes if a in aux_region), + key=lambda n: node_order.get(n, 0), + default=None, ) + if aux_boundary is None: + ad_logger.warning( + f"Could not find aux-stream input to the shared-expert collective " + f"for MoE node {moe_node.name}; skipping multi-stream transform." + ) + continue - merge_node.args = tuple( - wait_aux_node if arg is routed_output else arg for arg in merge_node.args - ) + # ---- Step 5: end_aux after the last aux-stream op, switching the + # current stream back to main before the collective. ---- + with graph.inserting_after(aux_boundary): + end_aux_node = graph.call_function( + end_aux_stream_passthrough, + args=(aux_boundary,), + ) + + # ---- Step 6: wait_aux so the main stream waits for the aux compute + # before running the collective on the main stream. ---- + with graph.inserting_after(end_aux_node): + wait_aux_node = graph.call_function( + wait_aux_stream_passthrough, + args=(end_aux_node,), + ) + + # The collective now consumes the synced aux output and runs on the + # main stream; the merge node continues to consume the collective. + collective_node.args = tuple( + wait_aux_node if arg is aux_boundary else arg for arg in collective_node.args + ) num_replaced += 1 diff --git a/tensorrt_llm/_torch/auto_deploy/transform/library/mxfp4_moe.py b/tensorrt_llm/_torch/auto_deploy/transform/library/mxfp4_moe.py deleted file mode 100644 index ae6343b7aa5b..000000000000 --- a/tensorrt_llm/_torch/auto_deploy/transform/library/mxfp4_moe.py +++ /dev/null @@ -1,346 +0,0 @@ -# SPDX-FileCopyrightText: Copyright (c) 2024-2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. -# SPDX-License-Identifier: Apache-2.0 -# -# Licensed under the Apache License, Version 2.0 (the "License"); -# you may not use this file except in compliance with the License. -# You may obtain a copy of the License at -# -# http://www.apache.org/licenses/LICENSE-2.0 -# -# Unless required by applicable law or agreed to in writing, software -# distributed under the License is distributed on an "AS IS" BASIS, -# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -# See the License for the specific language governing permissions and -# limitations under the License. -from typing import Tuple - -import torch -import torch.nn as nn -from torch.fx import GraphModule, Node - -from ...utils.module import get_submodule_of_param -from ...utils.node_utils import is_op -from ...utils.pattern_matcher import ADPatternMatcherPass, register_ad_pattern -from ..interface import BaseTransform, TransformInfo, TransformRegistry - - -def _moe_dense_mlp_pattern( - hidden_states: torch.Tensor, - routing_weights: torch.Tensor, - gate_up_w: torch.Tensor, - gate_up_b: torch.Tensor, - down_w: torch.Tensor, - down_b: torch.Tensor, - alpha: float = 1.0, - limit: float = 10.0, - minus_limit: float = -10.0, -) -> torch.Tensor: - batch_size = hidden_states.shape[0] - hidden_size = hidden_states.shape[2] - hidden_states = hidden_states.reshape(-1, hidden_size) # (num_tokens, hidden_size) - num_experts = routing_weights.shape[1] - - hidden_states = hidden_states.repeat(num_experts, 1) - hidden_states = hidden_states.view(num_experts, -1, hidden_size) - gate_up = torch.bmm(hidden_states, gate_up_w) + gate_up_b.unsqueeze(-2) - gate, up = gate_up[..., ::2], gate_up[..., 1::2] - gate = gate.clamp(min=None, max=limit) - up = up.clamp(min=minus_limit, max=limit) - glu = gate * torch.sigmoid(gate * alpha) - next_states = torch.bmm(((up + 1) * glu), down_w) - next_states = next_states + down_b.unsqueeze(-2) - next_states = next_states.view(num_experts, batch_size, -1, hidden_size) - next_states = ( - next_states * routing_weights.transpose(0, 1).view(num_experts, batch_size, -1)[..., None] - ) - next_states = next_states.sum(dim=0) # [B, S, H] - return next_states - - -def _moe_dense_mlp_repl( - hidden_states: torch.Tensor, - routing_weights: torch.Tensor, - gate_up_w: torch.Tensor, - gate_up_b: torch.Tensor, - down_w: torch.Tensor, - down_b: torch.Tensor, - alpha: float, - limit: float, - minus_limit: float, -) -> torch.Tensor: - return torch.ops.auto_deploy.torch_moe_dense_mlp( - hidden_states, routing_weights, gate_up_w, gate_up_b, down_w, down_b, alpha, limit - ) - - -@TransformRegistry.register("match_dense_moe_pattern") -class MatchMOEDenseMLP(BaseTransform): - def _apply( - self, - gm: GraphModule, - cm, - factory, - shared_config, - ) -> Tuple[GraphModule, TransformInfo]: - graph = gm.graph - patterns = ADPatternMatcherPass() - - B, S, H = 2, 4, 8 # batch, seq, hidden - E, In = 3, 16 # experts, intermediate (I); gate_up has 2I - T = B * S - - dummy_args = [ - torch.randn(B, S, H, device="meta", dtype=torch.float16), # hidden_states - torch.randn(T, E, device="meta", dtype=torch.float16), # routing_weights - torch.randn(E, H, 2 * In, device="meta", dtype=torch.float16), # gate_up_w [E,H,2I] - torch.randn(E, 2 * In, device="meta", dtype=torch.float16), # gate_up_b [E,2I] - torch.randn(E, In, H, device="meta", dtype=torch.float16), # down_w [E,I,H] - torch.randn(E, H, device="meta", dtype=torch.float16), # down_b [E,H] - 1.07, - 10.1, - -10.1, - ] - - op_ignore_types = { - torch.ops.aten.view.default: (int,), - torch.ops.aten.reshape.default: (int,), - torch.ops.auto_deploy.view.default: (int,), - torch.ops.aten.repeat.default: (int,), - torch.ops.aten.slice.Tensor: (int,), - torch.ops.aten.unsqueeze.default: (int,), - torch.ops.aten.transpose.int: (int,), - } - - scalar_workaround = {"alpha": 1.07, "limit": 10.1, "minus_limit": -10.1} - - register_ad_pattern( - search_fn=_moe_dense_mlp_pattern, - replace_fn=_moe_dense_mlp_repl, - patterns=patterns, - dummy_args=dummy_args, - op_ignore_types=op_ignore_types, - scalar_workaround=scalar_workaround, - ) - - num_matches = patterns.apply(graph) - info = TransformInfo( - skipped=False, - num_matches=num_matches, - is_clean=num_matches == 0, - has_valid_shapes=num_matches == 0, - ) - return gm, info - - -def _get_alpha_limit_from_dense(node: Node) -> Tuple[float, float]: - # torch_moe_dense_mlp(hidden, routing, gu_w, gu_b, dn_w, dn_b, alpha, limit) - # alpha/limit may be in args or kwargs - alpha = node.kwargs.get("alpha", None) - limit = node.kwargs.get("limit", None) - if alpha is None: - alpha = float(node.args[6]) if len(node.args) >= 7 else 1.0 - if limit is None: - limit = float(node.args[7]) if len(node.args) >= 8 else 10.0 - return float(alpha), float(limit) - - -def _get_topk_from_router(node: Node) -> int: - # torch_moe_router(hidden, weight, bias, top_k=2) - if "top_k" in node.kwargs: - return int(node.kwargs["top_k"]) - return int(node.args[3]) if len(node.args) >= 4 else 2 - - -def _register_mxfp4_expert_params( - gm: GraphModule, - gate_up_w_name: str, - gate_up_b_name: str, - down_w_name: str, - down_b_name: str, -) -> Tuple[str, str, str, str]: - """Create (if missing) the four MXFP4 params under the experts module and return their full names. - - Returns: - (gu_blocks_name, gu_scales_name, dn_blocks_name, dn_scales_name) - """ - # Shapes from existing params - gu_b = gm.get_parameter(gate_up_b_name) # [E, 2I] - gu_w = gm.get_parameter(gate_up_w_name) # [E, 2I, H] - dn_b = gm.get_parameter(down_b_name) # [E, H] - - E = int(gu_b.shape[0]) - I2 = int(gu_b.shape[1]) # 2I - In = I2 // 2 - - # infer H from gu_w shape - assert gu_w.dim() == 3, "gate_up_w must be rank-3" - if gu_w.shape[1] == I2: - H = int(gu_w.shape[2]) - else: - # Fallback: use down bias last dim - H = int(dn_b.shape[1]) - - # Compute block dims (assume divisible; zero-init anyway) - H_blk = max(1, H // 32) - I_blk = max(1, In // 32) - - experts_mod, experts_path, _ = get_submodule_of_param(gm, gate_up_w_name) - - # New param names under experts module - gu_blocks_name = "gate_up_proj_blocks" - gu_scales_name = "gate_up_proj_scales" - dn_blocks_name = "down_proj_blocks" - dn_scales_name = "down_proj_scales" - - # Zero-init tensors (uint8 for blocks/scales) - gu_blocks = torch.zeros((E, 2 * In, H_blk, 16), dtype=torch.uint8) - gu_scales = torch.zeros((E, 2 * In, H_blk), dtype=torch.uint8) - dn_blocks = torch.zeros((E, H, I_blk, 16), dtype=torch.uint8) - dn_scales = torch.zeros((E, H, I_blk), dtype=torch.uint8) - - experts_mod.register_parameter(gu_blocks_name, nn.Parameter(gu_blocks, requires_grad=False)) - experts_mod.register_parameter(gu_scales_name, nn.Parameter(gu_scales, requires_grad=False)) - experts_mod.register_parameter(dn_blocks_name, nn.Parameter(dn_blocks, requires_grad=False)) - experts_mod.register_parameter(dn_scales_name, nn.Parameter(dn_scales, requires_grad=False)) - - # Free the now-unused bf16 stacked weight params (`gate_up_proj`, `down_proj`). - # The biases (`gate_up_proj_bias`, `down_proj_bias`) are still consumed by - # ``triton_mxfp4_moe`` and must remain. For models like GPT-OSS-120B - # (128 experts × 36 layers × ~33 MB per layer of bf16 placeholder) freeing - # these saves ~150 GB per rank. - gu_w_local = gate_up_w_name.split(".")[-1] - dn_w_local = down_w_name.split(".")[-1] - for local_name in (gu_w_local, dn_w_local): - if local_name in experts_mod._parameters: - del experts_mod._parameters[local_name] - - # Full GM attribute paths for new params - prefix = (experts_path + ".") if experts_path else "" - return ( - prefix + gu_blocks_name, - prefix + gu_scales_name, - prefix + dn_blocks_name, - prefix + dn_scales_name, - ) - - -@TransformRegistry.register("quantize_mxfp4_moe") -class InsertMXFP4MLP(BaseTransform): - """ - Replace (torch_moe_router -> torch_moe_dense_mlp) with a single auto_deploy::triton_mxfp4_moe op, - and register MXFP4 expert params (blocks + scales) on the experts module. - """ - - algo_name: str = "mxfp4" - - def _apply( - self, - gm: GraphModule, - cm, - factory, - shared_config, - ) -> Tuple[GraphModule, TransformInfo]: - qcfg = factory.get_quant_config() - if not qcfg or qcfg.get("quant_method", "") != self.algo_name: - return gm, TransformInfo( - skipped=True, num_matches=0, is_clean=True, has_valid_shapes=True - ) - num_matches = 0 - - for n in list(gm.graph.nodes): - if not is_op(n, torch.ops.auto_deploy.torch_moe_dense_mlp): - continue - - # Expect: torch_moe_dense_mlp(hidden, routing, gu_w, gu_b, dn_w, dn_b, alpha, limit) - if len(n.args) < 6: - continue - - hidden_node = n.args[0] - routing_node = n.args[1] - gate_up_w_node = n.args[2] - gate_up_b_node = n.args[3] - down_w_node = n.args[4] - down_b_node = n.args[5] - - if not isinstance(routing_node, Node) or not is_op( - routing_node, torch.ops.auto_deploy.torch_moe_router - ): - continue - - # Router params: weight, bias, top_k - router_weight_node = routing_node.args[1] - router_bias_node = routing_node.args[2] - top_k = _get_topk_from_router(routing_node) - - # Resolve parameter names so we can find the experts module - if gate_up_w_node.op != "get_attr" or gate_up_b_node.op != "get_attr": - continue - if down_w_node.op != "get_attr" or down_b_node.op != "get_attr": - continue - - gu_w_name = gate_up_w_node.target - gu_b_name = gate_up_b_node.target - dn_w_name = down_w_node.target - dn_b_name = down_b_node.target - - # Register MXFP4 params on experts - gu_blocks_name, gu_scales_name, dn_blocks_name, dn_scales_name = ( - _register_mxfp4_expert_params(gm, gu_w_name, gu_b_name, dn_w_name, dn_b_name) - ) - - # Alpha/limit (from dense call) - alpha, limit = _get_alpha_limit_from_dense(n) - - # Insert the new get_attr nodes for MXFP4 params - with gm.graph.inserting_before(n): - gu_blocks_attr = gm.graph.create_node("get_attr", gu_blocks_name) - gu_scales_attr = gm.graph.create_node("get_attr", gu_scales_name) - dn_blocks_attr = gm.graph.create_node("get_attr", dn_blocks_name) - dn_scales_attr = gm.graph.create_node("get_attr", dn_scales_name) - - n.target = torch.ops.auto_deploy.triton_mxfp4_moe.default - n.kwargs = {} - - # triton_mxfp4_moe( - # hidden_states, - # router_weight, router_bias, top_k, - # gate_up_blocks, gate_up_bias, gate_up_scales, alpha, limit, - # down_blocks, down_bias, down_scales) - new_args = ( - hidden_node, - router_weight_node, - router_bias_node, - top_k, - gu_blocks_attr, - gate_up_b_node, - gu_scales_attr, - float(alpha), - float(limit), - dn_blocks_attr, - down_b_node, - dn_scales_attr, - ) - n.args = new_args - - # Remove the now-unneeded router node if nobody else uses it - if len(routing_node.users) == 0: - gm.graph.erase_node(routing_node) - - # Erase the old get_attr nodes for gate_up_proj and down_proj. - # _register_mxfp4_expert_params deleted those attributes from the - # experts module, so these nodes now reference non-existent attrs. - # They have no users after the args replacement above, so it is - # safe to erase them directly. - for stale_node in (gate_up_w_node, down_w_node): - if len(stale_node.users) == 0: - gm.graph.erase_node(stale_node) - - num_matches += 1 - - info = TransformInfo( - skipped=(num_matches == 0), - num_matches=num_matches, - is_clean=num_matches == 0, - has_valid_shapes=num_matches == 0, - ) - return gm, info diff --git a/tensorrt_llm/_torch/auto_deploy/transform/library/quantization.py b/tensorrt_llm/_torch/auto_deploy/transform/library/quantization.py index 69cffa7854b2..98bd87fbe358 100644 --- a/tensorrt_llm/_torch/auto_deploy/transform/library/quantization.py +++ b/tensorrt_llm/_torch/auto_deploy/transform/library/quantization.py @@ -204,13 +204,14 @@ def _insert_quantized_linear( # when loading the state_dict, we need to convert input amax to input scale input_scale_name = self.scale_names()[0] - gm._register_load_state_dict_pre_hook( - partial( - self.convert_amax_hook, - scale_name=modname + "." + input_scale_name, - amax_name=input_params.amax.target, - ) + scale_name = modname + "." + input_scale_name + amax_name = input_params.amax.target + hook = partial( + self.convert_amax_hook, + scale_name=scale_name, + amax_name=amax_name, ) + gm._register_load_state_dict_pre_hook(hook) # Note: canonicalize_graph() will remove input/weight/output quantizer for scale_name, scale in self.default_scales(lin_weight.tensor.shape).items(): @@ -219,7 +220,8 @@ def _insert_quantized_linear( gm._register_load_state_dict_pre_hook( partial(self.load_hook, weight_name=lin_weight.node_key) ) - if self.post_load_hook: + post_load_hook = getattr(type(self), "post_load_hook", None) + if post_load_hook is not None and post_load_hook is not Quantization.post_load_hook: gm.register_load_state_dict_post_hook( partial(self.post_load_hook, weight_name=lin_weight.node_key) ) @@ -275,11 +277,12 @@ def _insert_quantized_bmm( setattr(submod, attrname, new_param) # Register load state dict hook - gm._register_load_state_dict_pre_hook(partial(self.load_hook, weight_name=param_name)) - if self.post_load_hook: - gm.register_load_state_dict_post_hook( - partial(self.post_load_hook, weight_name=param_name) - ) + hook = partial(self.load_hook, weight_name=param_name) + gm._register_load_state_dict_pre_hook(hook) + post_load_hook = getattr(type(self), "post_load_hook", None) + if post_load_hook is not None and post_load_hook is not Quantization.post_load_hook: + hook = partial(self.post_load_hook, weight_name=param_name) + gm.register_load_state_dict_post_hook(hook) # Setup scale names and target module for parameter case def get_scale_name(scale_name): diff --git a/tensorrt_llm/_torch/auto_deploy/transform/library/quantize_moe.py b/tensorrt_llm/_torch/auto_deploy/transform/library/quantize_moe.py index 82efc02e32ef..81c1b4febc13 100644 --- a/tensorrt_llm/_torch/auto_deploy/transform/library/quantize_moe.py +++ b/tensorrt_llm/_torch/auto_deploy/transform/library/quantize_moe.py @@ -1,4 +1,4 @@ -# SPDX-FileCopyrightText: Copyright (c) 2022-2025 NVIDIA CORPORATION & AFFILIATES. All rights reserved. +# SPDX-FileCopyrightText: Copyright (c) 2022-2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. # SPDX-License-Identifier: Apache-2.0 # # Licensed under the Apache License, Version 2.0 (the "License"); @@ -70,7 +70,8 @@ def quantize_param_list(weight_names: List[str]) -> Tuple[List[Node], List[List[ submod.register_buffer(scale_name, scale_val) # Register load hook - gm._register_load_state_dict_pre_hook(partial(quant_impl.load_hook, weight_name=name)) + hook = partial(quant_impl.load_hook, weight_name=name) + gm._register_load_state_dict_pre_hook(hook) # Create get_attr nodes for new param and each scale with gm.graph.inserting_before(node): diff --git a/tensorrt_llm/_torch/auto_deploy/transform/library/sharding.py b/tensorrt_llm/_torch/auto_deploy/transform/library/sharding.py index 14b5526999bb..f2bf0d307910 100644 --- a/tensorrt_llm/_torch/auto_deploy/transform/library/sharding.py +++ b/tensorrt_llm/_torch/auto_deploy/transform/library/sharding.py @@ -89,6 +89,7 @@ def is_trtllm_op_available(): shape, subgraph, ) +from ...utils.pipeline_cache_hooks import mark_pipeline_cache_hook from ...utils.quantization_utils import ( cutlass_fp4_scale_to_modelopt_fp4_scale, modelopt_fp4_scale_to_cutlass_fp4_scale, @@ -588,17 +589,16 @@ def quantization_cb( for k, v in sharded_scales.items(): submod.register_buffer(k, v) - gm._register_load_state_dict_pre_hook( - partial( - self.shard_load_hook, - weight_name=weight_key, - weight_original_shape=weight_original_shape, - dim=dim, - rank=rank, - world_size=world_size, - min_local_shape=min_local_shape, - ) + hook = partial( + self.shard_load_hook, + weight_name=weight_key, + weight_original_shape=weight_original_shape, + dim=dim, + rank=rank, + world_size=world_size, + min_local_shape=min_local_shape, ) + gm._register_load_state_dict_pre_hook(hook) class FP8WeightShardingInfo(QuantizationShardingMixin, WeightShardingInfo): @@ -919,14 +919,13 @@ def slice_tensor(t: torch.Tensor) -> torch.Tensor: gm.get_submodule(modname).register_parameter(param_name, param_new) # Register load state dict hook - gm._register_load_state_dict_pre_hook( - partial( - _load_hook, - f_split=slice_tensor, - param_key=weight_key, - param_shape=param_new.shape, - ) + hook = partial( + _load_hook, + f_split=slice_tensor, + param_key=weight_key, + param_shape=param_new.shape, ) + gm._register_load_state_dict_pre_hook(hook) else: # Handle dynamic tensor with gm.graph.inserting_before(bmm_node): @@ -1333,6 +1332,18 @@ def check_and_apply(transform: ShardingTransformInfo) -> bool: f"BMM={len(transforms.bmm_transforms)}, " f"RMSNorm={len(transforms.rmsnorm_transforms)}" ) + + # If there are EP transforms and we have a CachedSequenceInterface, ensure + # batch_info_host is added to the graph as a placeholder and activated on + # the SequenceInfo so the runtime DP-aware max_num_tokens (slot 14) flows + # into the MoE all-to-all op as a kwarg. _add_or_retrieve_input is + # idempotent — safe even if another transform (e.g. + # gather_logits_before_lm_head) already added the placeholder. + # When cm is None (e.g., unit tests that drive the sharding transform + # standalone), skip — the MoE op falls back to max_num_tokens. + if transforms.ep_transforms and cm is not None: + self._add_or_retrieve_input(gm, cm, "batch_info_host", init_val=True) + with WeightBiasInfoCache(): for tp_transform in transforms.weight_sharding_transforms: if check_and_apply(tp_transform): @@ -1702,12 +1713,25 @@ def f_split( # the state_dict (e.g., unfusing fused MoE checkpoint weights into # individual expert keys). With the hook on gm, it would run before # unfusing and fail to find the individual expert keys. + hook = partial( + _load_hook, + f_split=f_split, + param_key=param_name, + param_shape=sharded_shape, + ) submod._register_load_state_dict_pre_hook( - partial( - _load_hook, - f_split=f_split, - param_key=param_name, - param_shape=sharded_shape, + mark_pipeline_cache_hook( + hook, + { + "type": "shard_tp", + "param_key": param_name, + "param_shape": list(sharded_shape), + "dim": dim, + "rank": rank, + "world_size": world_size, + "min_local_shape": min_local_shape, + "fused_weight_dims": list(fused_weight_dims) if fused_weight_dims else None, + }, ) ) param_new = nn.Parameter(sharded_weight.detach().clone(), requires_grad=requires_grad) @@ -1955,14 +1979,13 @@ def _tp_shard_moe_scale( # Register load hook on the owning submodule so it runs after any # parent-level checkpoint format conversion hooks (e.g., fused MoE unfusing). - submod._register_load_state_dict_pre_hook( - partial( - _load_hook, - f_split=f_split, - param_key=attr_name, - param_shape=sharded_scale.shape, - ) + hook = partial( + _load_hook, + f_split=f_split, + param_key=attr_name, + param_shape=sharded_scale.shape, ) + submod._register_load_state_dict_pre_hook(hook) def _insert_sharded_moe( @@ -2138,11 +2161,23 @@ def get_partition(lst, world_size, rank): # (Will be used inside the op to determine enable_alltoall and workspace size) mapping_config = config.dist_config.serialize() + # Look up batch_info_host placeholder if present. ShardingTransformExecutor + # ensures it's added/activated when there are EP transforms; if it's missing + # (e.g., a different code path bypasses the executor), the MoE op falls back + # to max_num_tokens for runtime padding. + batch_info_host_nodes = gm.graph.find_nodes(op="placeholder", target="batch_info_host") + batch_info_host_node = batch_info_host_nodes[0] if batch_info_host_nodes else None + # Write back weight/scale list updates (applied above) and inject mapping args. # set_op_args uses the op schema to place values into kwargs or the correct # positional slot, avoiding manual index arithmetic. node.args = tuple(args) - set_op_args(node, mapping_config=mapping_config, max_num_tokens=config.max_num_tokens) + set_op_args( + node, + mapping_config=mapping_config, + max_num_tokens=config.max_num_tokens, + batch_info_host=batch_info_host_node, + ) if not enable_alltoall: # ===================================================================================== diff --git a/tensorrt_llm/_torch/auto_deploy/transform/library/sharding_ir.py b/tensorrt_llm/_torch/auto_deploy/transform/library/sharding_ir.py index cbb4bfd8c692..f191a817c13e 100644 --- a/tensorrt_llm/_torch/auto_deploy/transform/library/sharding_ir.py +++ b/tensorrt_llm/_torch/auto_deploy/transform/library/sharding_ir.py @@ -51,6 +51,7 @@ set_op_args, shape, ) +from ...utils.pipeline_cache_hooks import mark_pipeline_cache_hook from ..interface import ( BaseTransform, SharedConfig, @@ -91,13 +92,60 @@ def _shard_scale_and_hook( sn: WeightNode, sharded_scale: torch.Tensor, f_split, + pipeline_cache_spec: Optional[Dict[str, Any]] = None, ) -> None: """Register a sharded scale buffer and its corresponding load hook.""" buf_name = sn.node_key.rsplit(".", 1)[-1] sn.submod.register_buffer(buf_name, sharded_scale) - gm._register_load_state_dict_pre_hook( - partial(_load_hook, f_split=f_split, param_key=sn.node_key, param_shape=sharded_scale.shape) + hook = partial( + _load_hook, + f_split=f_split, + param_key=sn.node_key, + param_shape=sharded_scale.shape, ) + if pipeline_cache_spec is not None: + hook = mark_pipeline_cache_hook(hook, pipeline_cache_spec) + gm._register_load_state_dict_pre_hook(hook) + + +def _fp8_block_scale_pipeline_cache_spec( + sn: WeightNode, + sharded_scale: torch.Tensor, + dim: int, + rank: int, + world_size: int, +) -> Dict[str, Any]: + return { + "type": "shard_fp8_block_scale", + "param_key": sn.node_key, + "param_shape": list(sharded_scale.shape), + "dim": int(dim), + "rank": rank, + "world_size": world_size, + } + + +def _fp4_weight_scale_pipeline_cache_spec( + sn: WeightNode, + sharded_scale: torch.Tensor, + weight_shape: torch.Size, + dim: int, + rank: int, + world_size: int, + min_local_shape: int, + fused_weight_dims: Optional[Tuple[int, ...]] = None, +) -> Dict[str, Any]: + return { + "type": "shard_fp4_weight_scale", + "param_key": sn.node_key, + "param_shape": list(sharded_scale.shape), + "original_uint8_weight_shape": list(weight_shape), + "dim": int(dim), + "rank": rank, + "world_size": world_size, + "min_local_shape": min_local_shape, + "fused_weight_dims": list(fused_weight_dims) if fused_weight_dims else None, + } _SHARDING_HINT_NAMES = frozenset( @@ -328,7 +376,13 @@ def _shard_scales(self, gm, dc, weight_nodes, dim, min_shape=1, fused=None): _split_fp8_block_scale, dim=dim, rank=dc.tp_rank, world_size=dc.tp_size ) sharded = f_split(sn.tensor) - _shard_scale_and_hook(gm, sn, sharded, f_split) + _shard_scale_and_hook( + gm, + sn, + sharded, + f_split, + _fp8_block_scale_pipeline_cache_spec(sn, sharded, dim, dc.tp_rank, dc.tp_size), + ) @ShardableNode.register( @@ -353,7 +407,15 @@ def _shard_scales(self, gm, dc, weight_nodes, dim, min_shape=1, fused=None): fused_weight_dims=fused, ) sharded = f_split(sn.tensor) - _shard_scale_and_hook(gm, sn, sharded, f_split) + _shard_scale_and_hook( + gm, + sn, + sharded, + f_split, + _fp4_weight_scale_pipeline_cache_spec( + sn, sharded, weight_shape, dim, dc.tp_rank, dc.tp_size, min_shape, fused + ), + ) @ShardableNode.register(torch.ops.auto_deploy.view) @@ -625,7 +687,14 @@ def _shard_scales(self, gm, dc, weight_nodes): f_split = partial( _split_fp8_block_scale, dim=dim, rank=dc.tp_rank, world_size=dc.tp_size ) - _shard_scale_and_hook(gm, sn, f_split(sn.tensor), f_split) + sharded = f_split(sn.tensor) + _shard_scale_and_hook( + gm, + sn, + sharded, + f_split, + _fp8_block_scale_pipeline_cache_spec(sn, sharded, dim, dc.tp_rank, dc.tp_size), + ) @ShardableNode.register(torch.ops.auto_deploy.torch_nvfp4_swiglu_mlp) @@ -647,7 +716,16 @@ def _shard_scales(self, gm, dc, weight_nodes): min_local_shape=1, fused_weight_dims=None, ) - _shard_scale_and_hook(gm, sn, f_split(sn.tensor), f_split) + sharded = f_split(sn.tensor) + _shard_scale_and_hook( + gm, + sn, + sharded, + f_split, + _fp4_weight_scale_pipeline_cache_spec( + sn, sharded, weight_shape, dim, dc.tp_rank, dc.tp_size, 1 + ), + ) @ShardableNode.register( @@ -734,9 +812,15 @@ def get_partition(lst, world_size, rank): self.node.args = tuple(args) if enable_alltoall: - # mapping and max_num_tokens are needed downstream for MoE all-to-all dispatcher mapping_config = dc.serialize() - set_op_args(self.node, mapping_config=mapping_config, max_num_tokens=max_num_tokens) + batch_info_host_nodes = gm.graph.find_nodes(op="placeholder", target="batch_info_host") + batch_info_host_node = batch_info_host_nodes[0] if batch_info_host_nodes else None + set_op_args( + self.node, + mapping_config=mapping_config, + max_num_tokens=max_num_tokens, + batch_info_host=batch_info_host_node, + ) else: # with pure EP/TP parallelism, global expert indices must be localized self._localize_expert_indices( @@ -1092,6 +1176,14 @@ def _apply( max_num_tokens = cm.info.max_num_tokens if (cm and cm.info) else 0 + # When attention-DP is active with EP, the MoE all-to-all ops need + # runtime token counts (batch_info_host slot 14, ``max_dp_num_tokens``) + # to avoid over-padding. + # Add the placeholder before the node loop so MoEShardableNode.apply() + # can find and wire it into each MoE node. + if dc.enable_attention_dp and dc.moe_ep_size > 1 and cm is not None: + self._add_or_retrieve_input(gm, cm, "batch_info_host", init_val=True) + num_updates = 0 if self.config.simple_shard_only: num_updates = _apply_simple_shard(gm, dc) diff --git a/tensorrt_llm/_torch/auto_deploy/transform/optimizer.py b/tensorrt_llm/_torch/auto_deploy/transform/optimizer.py index 7dd1b26203b7..87972d011c70 100644 --- a/tensorrt_llm/_torch/auto_deploy/transform/optimizer.py +++ b/tensorrt_llm/_torch/auto_deploy/transform/optimizer.py @@ -16,7 +16,7 @@ import gc import time -from typing import Optional +from typing import Optional, Tuple import torch import torch.distributed as dist @@ -27,6 +27,7 @@ from ..shim.interface import CachedSequenceInterface from ..utils.logger import ad_logger from .interface import ( + BaseTransform, DistConfig, InferenceOptimizerConfig, SharedConfig, @@ -46,6 +47,7 @@ def __init__( ): self.factory = factory self.config = self._clean_config(config) + self._cache_key_config = self._copy_config(self.config) if not dist.is_initialized(): local_rank, world_size = 0, 1 else: @@ -72,6 +74,12 @@ def _clean_config(self, config: InferenceOptimizerConfig) -> StrictInferenceOpti # return strict config return strict_config + def _copy_config( + self, config: StrictInferenceOptimizerConfig + ) -> StrictInferenceOptimizerConfig: + """Return a deep copy used for stable cache keys across mutating transforms.""" + return {k: v.model_copy(deep=True) for k, v in config.items()} + def __call__(self, cm: CachedSequenceInterface, mod: Optional[nn.Module] = None) -> nn.Module: """Transform a model into an optimized inference model. @@ -86,15 +94,23 @@ def __call__(self, cm: CachedSequenceInterface, mod: Optional[nn.Module] = None) # RUN THROUGH CONFIGURED TRANSFORMATIONS ############################################################################################ + can_restore_from_prefix = mod is None + # start with an empty model if not provided if mod is None: mod = nn.Module() - # iterate over all transforms sorted by stage in the config start_time = time.time() - for idx, (t_name, t_config) in enumerate(self.config.items()): + start_idx = 0 + if can_restore_from_prefix: + restored_mod, start_idx = self._maybe_restore_from_cache(cm) + if restored_mod is not None: + mod = restored_mod + + # iterate over all transforms sorted by stage in the config + for idx, (t_name, t_config) in enumerate(list(self.config.items())[start_idx:], start_idx): # instantiate transform - transform = TransformRegistry.get(t_name)(t_config) + transform = self._create_transform(t_name, t_config) # run transform mod = transform(mod, cm, self.factory, self.shared_config, idx) total_time = time.time() - start_time @@ -106,3 +122,23 @@ def __call__(self, cm: CachedSequenceInterface, mod: Optional[nn.Module] = None) torch.cuda.empty_cache() gc.collect() return mod + + def _maybe_restore_from_cache( + self, cm: CachedSequenceInterface + ) -> Tuple[Optional[nn.Module], int]: + """Ask cache transforms for a restore before running their prefix.""" + for idx, (t_name, t_config) in reversed(list(enumerate(self._cache_key_config.items()))): + transform_cls = TransformRegistry.get(t_name) + if not callable(getattr(transform_cls, "maybe_restore", None)): + continue + transform = self._create_transform(t_name, t_config) + restored_mod = transform.maybe_restore(cm, self.factory, self.shared_config, idx) + if restored_mod is not None: + return restored_mod, idx + 1 + return None, 0 + + def _create_transform(self, t_name: str, t_config: TransformConfig) -> BaseTransform: + transform = TransformRegistry.get(t_name)(t_config) + if t_name == "pipeline_cache": + transform.set_cache_key_config(self._cache_key_config) + return transform diff --git a/tensorrt_llm/_torch/auto_deploy/transform/pipeline_cache/__init__.py b/tensorrt_llm/_torch/auto_deploy/transform/pipeline_cache/__init__.py new file mode 100644 index 000000000000..c45f81225976 --- /dev/null +++ b/tensorrt_llm/_torch/auto_deploy/transform/pipeline_cache/__init__.py @@ -0,0 +1,18 @@ +# SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. +# SPDX-License-Identifier: Apache-2.0 +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. + +"""AutoDeploy pipeline cache transform package.""" + +from .pipeline_cache import PipelineCache # noqa: F401 diff --git a/tensorrt_llm/_torch/auto_deploy/transform/pipeline_cache/common.py b/tensorrt_llm/_torch/auto_deploy/transform/pipeline_cache/common.py new file mode 100644 index 000000000000..dd8b6d66110b --- /dev/null +++ b/tensorrt_llm/_torch/auto_deploy/transform/pipeline_cache/common.py @@ -0,0 +1,107 @@ +# SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. +# SPDX-License-Identifier: Apache-2.0 +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. + +"""Shared helpers for AutoDeploy pipeline cache identity and file IO.""" + +import hashlib +import json +import os +import shutil +from collections.abc import Mapping +from enum import Enum +from pathlib import Path +from typing import Any + + +def _canonicalize_for_hash(value: Any) -> Any: + if isinstance(value, dict): + return { + str(key): _canonicalize_for_hash(val) + for key, val in sorted(value.items(), key=lambda item: str(item[0])) + } + if isinstance(value, (list, tuple)): + return [_canonicalize_for_hash(item) for item in value] + if isinstance(value, (set, frozenset)): + # Sets are unordered, so canonicalize each element and sort by its JSON + # encoding to produce a deterministic, hashable representation (e.g. + # DetectHiddenStatesForCaptureConfig.eagle3_layers_to_capture is a Set[int]). + canonical_items = [_canonicalize_for_hash(item) for item in value] + return sorted( + canonical_items, + key=lambda item: json.dumps(item, sort_keys=True, separators=(",", ":")), + ) + if isinstance(value, Path): + return str(value) + if isinstance(value, Enum): + return _canonicalize_for_hash(value.value) + return value + + +def hash_payload(payload: Mapping[str, Any]) -> str: + encoded = json.dumps(_canonicalize_for_hash(payload), sort_keys=True, separators=(",", ":")) + return hashlib.sha256(encoded.encode("utf-8")).hexdigest() + + +def read_json(path: Path) -> dict[str, Any]: + return json.loads(path.read_text(encoding="utf-8")) + + +def write_json_atomic(path: Path, payload: Any) -> None: + path.parent.mkdir(parents=True, exist_ok=True) + tmp_path = path.with_suffix(path.suffix + ".tmp") + data = json.dumps(payload, indent=2, sort_keys=True) + "\n" + with open(tmp_path, "w", encoding="utf-8") as f: + f.write(data) + f.flush() + os.fsync(f.fileno()) + os.replace(tmp_path, path) + fsync_dir(path.parent) + + +def fsync_dir(path: Path) -> None: + try: + fd = os.open(path, os.O_RDONLY) + except OSError: + return + try: + os.fsync(fd) + except OSError: + pass + finally: + os.close(fd) + + +def atomic_publish_rank_dir(tmp_rank_dir: Path, rank_dir: Path) -> None: + old_dir: Path | None = None + if rank_dir.exists(): + old_dir = rank_dir.with_name(f"{rank_dir.name}.old.{os.getpid()}") + rank_dir.rename(old_dir) + try: + tmp_rank_dir.rename(rank_dir) + fsync_dir(rank_dir.parent) + except OSError: + if old_dir is not None and old_dir.exists() and not rank_dir.exists(): + old_dir.rename(rank_dir) + raise + if old_dir is not None: + shutil.rmtree(old_dir, ignore_errors=True) + + +def sha256_file(path: Path) -> str: + digest = hashlib.sha256() + with open(path, "rb") as f: + for chunk in iter(lambda: f.read(1024 * 1024), b""): + digest.update(chunk) + return digest.hexdigest() diff --git a/tensorrt_llm/_torch/auto_deploy/transform/pipeline_cache/hooks.py b/tensorrt_llm/_torch/auto_deploy/transform/pipeline_cache/hooks.py new file mode 100644 index 000000000000..15bb5bed3587 --- /dev/null +++ b/tensorrt_llm/_torch/auto_deploy/transform/pipeline_cache/hooks.py @@ -0,0 +1,360 @@ +# SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. +# SPDX-License-Identifier: Apache-2.0 +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. + +"""Load hook serialization helpers for the AutoDeploy pipeline cache.""" + +import importlib +import types +from collections.abc import Callable +from functools import partial +from typing import Any + +import torch +import torch.nn as nn + +from ...utils.logger import ad_logger +from ...utils.pipeline_cache_hooks import ( + callable_ref, + get_pipeline_cache_hook_spec, + json_dict, + json_instance_payload, +) + + +def _resolve_qualified_attr(module_name: str, qualname: str) -> Any: + obj: Any = importlib.import_module(module_name) + for part in qualname.split("."): + obj = getattr(obj, part) + return obj + + +def _identify_importable_hook( + hook: Callable, scope: str, target_module: nn.Module +) -> dict[str, Any] | None: + def identify_bound_method(method: Callable) -> dict[str, Any] | None: + owner = getattr(method, "__self__", None) + func = getattr(method, "__func__", None) + if owner is None or func is None: + return None + + ref = callable_ref(func) + if ref is None: + return None + + spec = { + "type": "importable_load_hook", + "scope": scope, + "callable": ref, + } + if owner is target_module: + spec["bind_to_module"] = True + return spec + + spec["owner_payload"] = json_instance_payload(owner) + owner_class_ref = callable_ref(type(owner)) + if owner_class_ref is not None: + spec["owner_class"] = owner_class_ref + return spec + + if isinstance(hook, partial): + if hook.args: + return None + keywords = json_dict(hook.keywords or {}) + if keywords is None: + return None + + spec = identify_bound_method(hook.func) + if spec is None: + ref = callable_ref(hook.func) + if ref is None: + return None + spec = { + "type": "importable_load_hook", + "scope": scope, + "callable": ref, + } + spec["keywords"] = keywords + return spec + + spec = identify_bound_method(hook) + if spec is not None: + return spec + + ref = callable_ref(hook) + if ref is None: + return None + return { + "type": "importable_load_hook", + "scope": scope, + "callable": ref, + } + + +def _identify_hook( + hook: Any, + scope: str = "root", + target_module: nn.Module | None = None, + *, + phase: str = "pre", + with_module: bool = False, +) -> dict[str, Any] | None: + spec = get_pipeline_cache_hook_spec(hook) + if spec is not None: + if spec.get("type") not in _HOOK_REBUILDERS: + return None + spec["scope"] = scope + else: + if target_module is None: + raise ValueError("target_module must be provided when identifying importable hooks.") + spec = _identify_importable_hook(hook, scope, target_module) + if spec is None: + return None + + spec.setdefault("phase", phase) + if spec["phase"] == "pre": + spec.setdefault("with_module", with_module) + return spec + + +def collect_hook_specs(model: nn.Module) -> tuple[list[dict[str, Any]], bool]: + """Collect declarative hook specs from load hooks on ``model`` and children.""" + specs: list[dict[str, Any]] = [] + + def log_unknown(hook_obj: Any) -> None: + qualname = getattr(hook_obj, "__qualname__", repr(hook_obj)) + ad_logger.warning(f"Pipeline cache: unrecognized hook of type {qualname}") + + def collect_from_module(mod: nn.Module, scope: str) -> bool: + for hook in mod._load_state_dict_pre_hooks.values(): + with_module = bool(getattr(hook, "with_module", False)) + hook_obj = hook.hook if hasattr(hook, "hook") else hook + spec = _identify_hook(hook_obj, scope, mod, phase="pre", with_module=with_module) + if spec is None: + log_unknown(hook_obj) + return False + specs.append(spec) + + for hook_obj in mod._load_state_dict_post_hooks.values(): + hook = hook_obj.hook if hasattr(hook_obj, "hook") else hook_obj + spec = _identify_hook(hook, scope, mod, phase="post") + if spec is None: + log_unknown(hook) + return False + specs.append(spec) + + return True + + if not collect_from_module(model, "root"): + return [], True + for name, child in model.named_modules(): + if name and not collect_from_module(child, name): + return [], True + + return specs, False + + +def _rebuild_shard_tp_hook(spec: dict[str, Any]) -> Callable: + from ..library.sharding import _load_hook, _split_tensor_for_tp + + dim = spec["dim"] + rank = spec["rank"] + world_size = spec["world_size"] + min_local_shape = spec["min_local_shape"] + fused_weight_dims = spec.get("fused_weight_dims") + if fused_weight_dims: + + def f_split( + t: torch.Tensor, fused_dims: list = fused_weight_dims, d: int = dim + ) -> torch.Tensor: + return torch.cat( + [ + _split_tensor_for_tp(w, dim, rank, world_size, min_local_shape) + for w in torch.split(t, fused_dims, dim=d) + ], + dim=d, + ) + + else: + f_split = partial( + _split_tensor_for_tp, + dim=dim, + rank=rank, + world_size=world_size, + min_local_shape=min_local_shape, + ) + return partial( + _load_hook, + f_split=f_split, + param_key=spec["param_key"], + param_shape=torch.Size(spec["param_shape"]), + ) + + +def _rebuild_shard_fp8_block_scale_hook(spec: dict[str, Any]) -> Callable: + from ..library.sharding import _load_hook + from ..library.sharding_ir import _split_fp8_block_scale + + f_split = partial( + _split_fp8_block_scale, + dim=spec["dim"], + rank=spec["rank"], + world_size=spec["world_size"], + ) + return partial( + _load_hook, + f_split=f_split, + param_key=spec["param_key"], + param_shape=torch.Size(spec["param_shape"]), + ) + + +def _rebuild_shard_fp4_weight_scale_hook(spec: dict[str, Any]) -> Callable: + from ..library.sharding import _load_hook, _shard_fp4_weight_scale + + f_split = partial( + _shard_fp4_weight_scale, + original_uint8_weight_shape=torch.Size(spec["original_uint8_weight_shape"]), + dim=spec["dim"], + rank=spec["rank"], + world_size=spec["world_size"], + min_local_shape=spec["min_local_shape"], + fused_weight_dims=spec["fused_weight_dims"], + ) + return partial( + _load_hook, + f_split=f_split, + param_key=spec["param_key"], + param_shape=torch.Size(spec["param_shape"]), + ) + + +def _rebuild_dedup_hook(spec: dict[str, Any]) -> Callable: + from ...export.export import _load_hook_for_deduplication + + return partial( + _load_hook_for_deduplication, + param_key_remaining=spec["param_key_remaining"], + param_key_removed=spec["param_key_removed"], + ) + + +def _rebuild_alias_hook(spec: dict[str, Any]) -> Callable: + from ...export.export import _build_aliasing_load_pre_hook + + return _build_aliasing_load_pre_hook(spec["aliased_groups"]) + + +def _rebuild_hook_owner(spec: dict[str, Any]) -> object: + owner_payload = spec.get("owner_payload", {}) + owner_class = spec.get("owner_class") + if owner_class is None: + return types.SimpleNamespace(**owner_payload) + + owner_cls = _resolve_qualified_attr(owner_class["module"], owner_class["qualname"]) + # Avoid running model or transform constructors when rebuilding load-hook owners. + owner = owner_cls.__new__(owner_cls) + for attr_name, value in owner_payload.items(): + try: + owner.__dict__[attr_name] = value + except AttributeError: + setattr(owner, attr_name, value) + return owner + + +def _rebuild_importable_hook( + spec: dict[str, Any], target_module: nn.Module | None = None +) -> Callable: + ref = spec["callable"] + hook_fn = _resolve_qualified_attr(ref["module"], ref["qualname"]) + + if bool(spec.get("bind_to_module")): + if target_module is None: + raise ValueError("Pipeline cache: module-bound hook restore requires target module.") + hook_fn = types.MethodType(hook_fn, target_module) + elif "owner_payload" in spec: + owner_class = spec.get("owner_class") + if target_module is not None and owner_class is not None: + owner_cls = _resolve_qualified_attr(owner_class["module"], owner_class["qualname"]) + if isinstance(target_module, owner_cls): + hook_fn = types.MethodType(hook_fn, target_module) + else: + hook_fn = types.MethodType(hook_fn, _rebuild_hook_owner(spec)) + else: + hook_fn = types.MethodType(hook_fn, _rebuild_hook_owner(spec)) + + keywords = spec.get("keywords", {}) or {} + if keywords: + hook_fn = partial(hook_fn, **keywords) + return hook_fn + + +_HOOK_REBUILDERS = { + "alias": _rebuild_alias_hook, + "dedup": _rebuild_dedup_hook, + "importable_load_hook": _rebuild_importable_hook, + "shard_fp4_weight_scale": _rebuild_shard_fp4_weight_scale_hook, + "shard_fp8_block_scale": _rebuild_shard_fp8_block_scale_hook, + "shard_tp": _rebuild_shard_tp_hook, +} + + +def _rebuild_hook(spec: dict[str, Any], target_module: nn.Module | None = None) -> Callable: + hook_type = spec["type"] + rebuilder = _HOOK_REBUILDERS.get(hook_type) + if rebuilder is not None: + if hook_type == "importable_load_hook": + return rebuilder(spec, target_module) + return rebuilder(spec) + raise ValueError(f"Pipeline cache: unknown hook spec type {hook_type!r}") + + +def reattach_hooks(model: nn.Module, specs: list[dict[str, Any]]) -> None: + """Rebuild and register AD-managed load hooks on ``model``.""" + for spec in specs: + scope = spec["scope"] + target_mod = model if scope == "root" else model.get_submodule(scope) + hook_fn = _rebuild_hook(spec, target_mod) + phase = spec.get("phase", "pre") + if phase == "pre": + target_mod._register_load_state_dict_pre_hook( + hook_fn, with_module=bool(spec.get("with_module", False)) + ) + elif phase == "post": + target_mod.register_load_state_dict_post_hook(hook_fn) + else: + raise ValueError(f"Pipeline cache: unknown hook phase {phase!r}") + + +def snapshot_and_clear_load_hooks(model: nn.Module) -> list[tuple[nn.Module, Any, Any]]: + records: list[tuple[nn.Module, Any, Any]] = [] + for module in model.modules(): + records.append( + ( + module, + module._load_state_dict_pre_hooks.copy(), + module._load_state_dict_post_hooks.copy(), + ) + ) + module._load_state_dict_pre_hooks.clear() + module._load_state_dict_post_hooks.clear() + return records + + +def restore_load_hooks(records: list[tuple[nn.Module, Any, Any]]) -> None: + for module, pre_hooks, post_hooks in records: + module._load_state_dict_pre_hooks.clear() + module._load_state_dict_pre_hooks.update(pre_hooks) + module._load_state_dict_post_hooks.clear() + module._load_state_dict_post_hooks.update(post_hooks) diff --git a/tensorrt_llm/_torch/auto_deploy/transform/pipeline_cache/pipeline_cache.py b/tensorrt_llm/_torch/auto_deploy/transform/pipeline_cache/pipeline_cache.py new file mode 100644 index 000000000000..3ee41267af08 --- /dev/null +++ b/tensorrt_llm/_torch/auto_deploy/transform/pipeline_cache/pipeline_cache.py @@ -0,0 +1,440 @@ +# SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. +# SPDX-License-Identifier: Apache-2.0 +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. + +"""Pre-weight-loading pipeline cache for AutoDeploy. + +This cache is an AutoDeploy transform. Place ``pipeline_cache`` at the boundary +where the graph should be snapshotted, at or before the sharding stage and +before ``load_weights``. The transform saves the incoming module on a miss and +the optimizer asks the same transform for a restore before running the prefix so +a hit skips the transforms before the cache point. + +The main artifact is a ``torch.save`` structural FX payload for the +``GraphModule`` or GraphModule-bearing wrapper. Load hooks are never part of the +artifact contract: recognized hooks are scrubbed before save and rebuilt from +``hooks.json``. +""" + +import json +import os +import shutil +from collections.abc import Mapping, Sequence +from pathlib import Path +from typing import Any, ClassVar + +import torch +import torch.distributed as dist +import torch.nn as nn +from pydantic import Field, model_validator + +from ...models.factory import ModelFactory +from ...shim.interface import CachedSequenceInterface +from ...utils.logger import ad_logger +from ..interface import ( + BaseTransform, + SharedConfig, + Stages, + StrictInferenceOptimizerConfig, + TransformConfig, + TransformInfo, + TransformRegistry, +) +from .common import ( + atomic_publish_rank_dir, + fsync_dir, + hash_payload, + read_json, + sha256_file, + write_json_atomic, +) +from .hooks import ( + collect_hook_specs, + reattach_hooks, + restore_load_hooks, + snapshot_and_clear_load_hooks, +) +from .structural import load_module_structural, save_module_structural, validate_pre_weight_snapshot + +MANIFEST_FILE_NAME = "manifest.json" +MODULE_FILE_NAME = "module.pt" +HOOKS_FILE_NAME = "hooks.json" + + +def _validate_no_forward_hooks(model: nn.Module) -> None: + modules_with_hooks = [ + name or "root" + for name, module in model.named_modules() + if getattr(module, "_forward_pre_hooks", None) or getattr(module, "_forward_hooks", None) + ] + if modules_with_hooks: + raise ValueError( + "pipeline_cache does not support caching modules with forward hooks; " + f"modules with forward hooks: {modules_with_hooks}" + ) + + +def _default_pipeline_cache_root() -> str: + return str(Path.home() / ".cache" / "tensorrt_llm" / "auto_deploy" / "pipeline_cache") + + +class PipelineCacheConfig(TransformConfig): + """Configuration for the torch-save pipeline cache transform.""" + + model_config = { + "extra": "forbid", + } + + enabled: bool = Field( + default=False, + description="Whether to enable the torch-save pipeline cache transform.", + ) + run_per_gm: ClassVar[bool] = False + run_graph_cleanup: ClassVar[bool] = False + requires_clean_graph: ClassVar[bool] = False + run_shape_prop: ClassVar[bool] = False + requires_shape_prop: ClassVar[bool] = False + skip_on_error: ClassVar[bool] = True + debug_visualize_dir: ClassVar[str | None] = None + expect_mem_change: ClassVar[bool] = False + root: str | None = Field( + default=None, + description=( + "Cache root. Defaults to ~/.cache/tensorrt_llm/auto_deploy/pipeline_cache " + "when the transform is enabled." + ), + ) + + @model_validator(mode="after") + def validate_enabled_cache(self) -> "PipelineCacheConfig": + if not self.enabled: + return self + if self.root in (None, ""): + self.root = _default_pipeline_cache_root() + if self.stage > Stages.SHARDING: + raise ValueError( + "pipeline_cache must be placed at or before the sharding stage so restore can " + "resume before weight loading." + ) + return self + + +def _dist_config_payload(shared_config: SharedConfig) -> dict[str, Any]: + dist_config = shared_config.dist_config + if dist_config is not None: + payload = dist_config.to_dict() + payload.pop("rank", None) + return payload + return {"world_size": shared_config.world_size} + + +def _cache_transform_index( + items: Sequence[tuple[str, TransformConfig]], transform_name: str +) -> int: + for idx, (name, _) in enumerate(items): + if name == transform_name: + return idx + raise ValueError(f"{transform_name} is missing from the optimizer config.") + + +def _collective_bool_and(local_value: bool) -> bool: + if not dist.is_available() or not dist.is_initialized(): + return local_value + backend = dist.get_backend() + device = ( + torch.device("cuda", torch.cuda.current_device()) + if backend == "nccl" + else torch.device("cpu") + ) + agreed = torch.tensor(1 if local_value else 0, dtype=torch.int32, device=device) + dist.all_reduce(agreed, op=dist.ReduceOp.MIN) + return bool(agreed.item()) + + +def _barrier() -> None: + if dist.is_available() and dist.is_initialized(): + dist.barrier() + + +@TransformRegistry.register("pipeline_cache") +class PipelineCache(BaseTransform): + """Transform that snapshots/restores the model at its configured pipeline position.""" + + config: PipelineCacheConfig + _cache_key_config: StrictInferenceOptimizerConfig | None + + @classmethod + def get_config_class(cls) -> type[TransformConfig]: + return PipelineCacheConfig + + def _post_init(self): + self._cache_key_config = None + + def set_cache_key_config(self, cache_key_config: StrictInferenceOptimizerConfig) -> None: + self._cache_key_config = cache_key_config + + def maybe_restore( + self, + _cm: CachedSequenceInterface, + factory: ModelFactory, + shared_config: SharedConfig, + transform_index: int, + ) -> nn.Module | None: + """Return a cached module for this transform point, or ``None`` on a miss.""" + if not self.config.enabled: + return None + items = self._cache_key_items() + context = self._build_context(factory, shared_config, items[:transform_index]) + if not _collective_bool_and(self._validate_manifest(context)): + return None + + local_success = False + module: nn.Module | None = None + try: + module = self._load_module(context) + local_success = True + except Exception as exc: + ad_logger.warning(f"Failed to restore AutoDeploy pipeline cache: {exc}") + module = None + + if not _collective_bool_and(local_success): + return None + assert module is not None + ad_logger.info(f"Restored AutoDeploy pipeline cache from {self._rank_dir(context)}") + return module + + def _apply_to_full_model( + self, + model: nn.Module, + _cm: CachedSequenceInterface, + factory: ModelFactory, + shared_config: SharedConfig, + ) -> tuple[nn.Module, TransformInfo]: + items = self._cache_key_items() + transform_index = _cache_transform_index(items, self.get_transform_key()) + context = self._build_context(factory, shared_config, items[:transform_index]) + saved = self._save_module(context, model) + info = TransformInfo( + skipped=not saved, + num_matches=1 if saved else 0, + is_clean=True, + has_valid_shapes=True, + ) + return model, info + + def _build_context( + self, + factory: ModelFactory, + shared_config: SharedConfig, + prefix_items: Sequence[tuple[str, TransformConfig]], + ) -> dict[str, Any]: + root = Path(str(self.config.root)).expanduser() + root.mkdir(parents=True, exist_ok=True) + transform_prefix = [ + {"name": name, "config": config.model_dump(mode="python")} + for name, config in prefix_items + ] + transform_prefix_hash = hash_payload({"transforms": transform_prefix}) + dist_config_payload = ( + _dist_config_payload(shared_config) + if any(config.stage >= Stages.SHARDING for _, config in prefix_items) + else None + ) + identity = { + "model_identifier": factory.get_pipeline_cache_model_identifier(), + "checkpoint_fingerprint": factory.get_pipeline_cache_checkpoint_fingerprint(), + "transform_prefix_hash": transform_prefix_hash, + "dist_config": dist_config_payload, + } + return { + "root": root, + "cache_key": hash_payload(identity), + "shared_config": shared_config, + } + + def _cache_key_items(self) -> list[tuple[str, TransformConfig]]: + if self._cache_key_config is None: + raise ValueError("pipeline_cache requires the cache-key transform config.") + return list(self._cache_key_config.items()) + + def _save_module( + self, + context: Mapping[str, Any], + model: nn.Module, + ) -> bool: + _barrier() + rank_dir = self._rank_dir(context) + tmp_rank_dir = self._tmp_rank_dir(context) + cache_entry_dir = self._cache_entry_dir(context) + try: + shutil.rmtree(tmp_rank_dir, ignore_errors=True) + tmp_rank_dir.mkdir(parents=True, exist_ok=True) + + local_save_success = False + try: + validate_pre_weight_snapshot(model) + hook_specs, has_unknown = collect_hook_specs(model) + if has_unknown: + raise ValueError("graph contains unrecognized pipeline cache load hooks") + _validate_no_forward_hooks(model) + + hook_records = snapshot_and_clear_load_hooks(model) + try: + with open(tmp_rank_dir / MODULE_FILE_NAME, "wb") as module_file: + save_module_structural(model, module_file) + module_file.flush() + os.fsync(module_file.fileno()) + finally: + restore_load_hooks(hook_records) + + write_json_atomic(tmp_rank_dir / HOOKS_FILE_NAME, hook_specs) + checksums = { + file_name: sha256_file(tmp_rank_dir / file_name) + for file_name in ( + MODULE_FILE_NAME, + HOOKS_FILE_NAME, + ) + } + manifest = self._build_manifest( + context, + file_checksums=checksums, + ) + write_json_atomic(tmp_rank_dir / MANIFEST_FILE_NAME, manifest) + fsync_dir(tmp_rank_dir) + local_save_success = True + except Exception as exc: + ad_logger.warning(f"Skipping AutoDeploy pipeline cache save: {exc}") + + if not _collective_bool_and(local_save_success): + shutil.rmtree(rank_dir, ignore_errors=True) + _barrier() + return False + + local_publish_success = False + try: + cache_entry_dir.mkdir(parents=True, exist_ok=True) + fsync_dir(cache_entry_dir) + atomic_publish_rank_dir(tmp_rank_dir, rank_dir) + local_publish_success = True + except Exception as exc: + ad_logger.warning(f"Skipping AutoDeploy pipeline cache save: {exc}") + + if not _collective_bool_and(local_publish_success): + shutil.rmtree(rank_dir, ignore_errors=True) + _barrier() + return False + + _barrier() + ad_logger.info(f"Saved AutoDeploy pipeline cache to {rank_dir}") + return True + finally: + shutil.rmtree(tmp_rank_dir, ignore_errors=True) + + def _build_manifest( + self, + context: Mapping[str, Any], + file_checksums: Mapping[str, str], + ) -> dict[str, Any]: + shared_config = context["shared_config"] + return { + "cache_key": context["cache_key"], + "file_checksums": dict(file_checksums), + "rank": shared_config.local_rank, + } + + def _validate_manifest(self, context: Mapping[str, Any]) -> bool: + if not self._has_complete_snapshot(context): + return False + manifest_path = self._rank_dir(context) / MANIFEST_FILE_NAME + try: + manifest = read_json(manifest_path) + except (json.JSONDecodeError, OSError) as exc: + ad_logger.warning(f"Ignoring invalid pipeline cache manifest {manifest_path}: {exc}") + return False + + expected = { + "cache_key": context["cache_key"], + "rank": context["shared_config"].local_rank, + } + for key, expected_value in expected.items(): + if manifest.get(key) != expected_value: + ad_logger.info( + f"Pipeline cache manifest mismatch: {key}={manifest.get(key)!r} " + f"!= {expected_value!r}" + ) + return False + try: + self._verify_file_checksums(context, manifest) + except ValueError as exc: + ad_logger.warning(str(exc)) + return False + return True + + def _load_module( + self, + context: Mapping[str, Any], + ) -> nn.Module: + rank_dir = self._rank_dir(context) + module = load_module_structural(rank_dir / MODULE_FILE_NAME) + + hook_specs = read_json(rank_dir / HOOKS_FILE_NAME) + reattach_hooks(module, hook_specs) + return module + + def _verify_file_checksums( + self, context: Mapping[str, Any], manifest: Mapping[str, Any] + ) -> None: + rank_dir = self._rank_dir(context) + checksums = manifest.get("file_checksums", {}) or {} + required_files = ( + MODULE_FILE_NAME, + HOOKS_FILE_NAME, + ) + for file_name in required_files: + expected = checksums.get(file_name) + if not expected: + raise ValueError(f"Pipeline cache manifest is missing checksum for {file_name}.") + path = rank_dir / file_name + if not path.exists(): + raise ValueError(f"Pipeline cache file is missing: {path}") + actual = sha256_file(path) + if actual != expected: + raise ValueError( + f"Pipeline cache checksum mismatch for {path}: {actual} != {expected}" + ) + + def _has_complete_snapshot(self, context: Mapping[str, Any]) -> bool: + cache_entry_dir = self._cache_entry_dir(context) + for rank in range(context["shared_config"].world_size): + rank_dir = cache_entry_dir / f"rank_{rank}" + for file_name in ( + MANIFEST_FILE_NAME, + MODULE_FILE_NAME, + HOOKS_FILE_NAME, + ): + if not (rank_dir / file_name).exists(): + return False + return True + + def _cache_entry_dir(self, context: Mapping[str, Any]) -> Path: + return context["root"] / context["cache_key"] + + def _rank_dir(self, context: Mapping[str, Any]) -> Path: + return self._cache_entry_dir(context) / f"rank_{context['shared_config'].local_rank}" + + def _tmp_rank_dir(self, context: Mapping[str, Any]) -> Path: + shared_config = context["shared_config"] + return context["root"] / ( + f".{context['cache_key']}.rank_{shared_config.local_rank}.tmp.{os.getpid()}" + ) diff --git a/tensorrt_llm/_torch/auto_deploy/transform/pipeline_cache/structural.py b/tensorrt_llm/_torch/auto_deploy/transform/pipeline_cache/structural.py new file mode 100644 index 000000000000..3443b525bf3a --- /dev/null +++ b/tensorrt_llm/_torch/auto_deploy/transform/pipeline_cache/structural.py @@ -0,0 +1,543 @@ +# SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. +# SPDX-License-Identifier: Apache-2.0 +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. + +"""FX GraphModule save/load helpers for the AutoDeploy pipeline cache.""" + +import importlib +import inspect + +# Used only to probe torch.save-compatible cache payloads. +import pickle # nosec B403 +import types +from collections.abc import Mapping, Sequence +from typing import Any + +import torch +import torch.nn as nn +from torch._subclasses import FakeTensorMode +from torch.fx import GraphModule +from torch.fx.graph import Graph, _PyTreeCodeGen +from torch.fx.graph_module import _CodeOnlyModule +from torch.fx.immutable_collections import immutable_dict, immutable_list +from torch.fx.node import Node + +from ...utils._graph import named_graphmodules +from ...utils.dist_config import DistConfig +from ...utils.node_utils import invalidate_weight_node_cache + +_GRAPHMODULE_PAYLOAD_KIND = "graphmodule_snapshot" +_MODULE_TREE_PAYLOAD_KIND = "module_tree" + + +# ShardingTransformContainer carries live distributed objects after construction. The cache only +# needs the serializable config, so rebuild that config into a pre-runtime form before torch.save. +def _cacheable_sharding_transform_container(value: Any) -> Any: + from ..library.sharding import ShardingTransformContainer + + if not isinstance(value, ShardingTransformContainer): + return value + + config = value.config.model_copy(deep=True) + config.mapping = None + config.dist_config = DistConfig.from_dict(config.dist_config.to_dict()) + return ShardingTransformContainer(config=config) + + +def _sanitized_graphmodule_body(gm: GraphModule) -> dict[str, Any]: + # The body is the non-graph part of GraphModule.__dict__. It is saved with torch.save after + # removing fields that would pull the live FX graph or runtime-only objects back into pickle. + body: dict[str, Any] = {} + for key, value in gm.__dict__.items(): + if key == "_graph": + continue + sanitized = _cacheable_sharding_transform_container(value) + if sanitized is not gm and getattr(sanitized, "__self__", None) is not gm: + body[key] = sanitized + return body + + +def _is_pickleable(value: Any) -> bool: + try: + pickle.dumps(value, protocol=2) + except Exception: + return False + return True + + +def _resolve_qualified_attr(module_name: str, qualname: str) -> Any: + obj: Any = importlib.import_module(module_name) + for part in qualname.split("."): + obj = getattr(obj, part) + return obj + + +# FX node targets can include torch custom ops. Those are stable by namespace/op/overload, while +# Python callables are only accepted when importing module.qualname resolves to the same object. +def _encode_graph_target_ref(target: Any) -> dict[str, str]: + if isinstance(target, torch._ops.OpOverload): + return { + "kind": "torch_op_overload", + "namespace": target.namespace, + "opname": target._opname, + "overload": target._overloadname, + } + if isinstance(target, torch._ops.OpOverloadPacket): + namespace, opname = target._qualified_op_name.split("::", 1) + return { + "kind": "torch_op_packet", + "namespace": namespace, + "opname": opname, + } + + module_name = getattr(target, "__module__", None) + qualname = getattr(target, "__qualname__", None) or getattr(target, "__name__", None) + if isinstance(module_name, str) and isinstance(qualname, str) and "" not in qualname: + try: + resolved = _resolve_qualified_attr(module_name, qualname) + except (AttributeError, ImportError, ValueError): + resolved = None + if resolved is target: + return { + "kind": "importable", + "module": module_name, + "qualname": qualname, + } + + raise ValueError( + "Pipeline cache: graph target is not pickleable and cannot be restored by import: " + f"{target!r} ({type(target).__module__}.{type(target).__qualname__})." + ) + + +def _decode_graph_target_ref(ref: Mapping[str, str]) -> Any: + if ref.get("kind") == "torch_op_overload": + packet = getattr(getattr(torch.ops, ref["namespace"]), ref["opname"]) + return getattr(packet, ref["overload"]) + if ref.get("kind") == "torch_op_packet": + return getattr(getattr(torch.ops, ref["namespace"]), ref["opname"]) + if ref.get("kind") == "importable": + return _resolve_qualified_attr(ref["module"], ref["qualname"]) + raise ValueError(f"Pipeline cache: unknown graph target reference {ref!r}.") + + +def _encode_graph_target(target: Any) -> dict[str, Any]: + if _is_pickleable(target): + return {"kind": "literal", "value": target} + return {"kind": "ref", "value": _encode_graph_target_ref(target)} + + +def _decode_graph_target(spec: Mapping[str, Any]) -> Any: + kind = spec.get("kind") + if kind == "literal": + return spec["value"] + if kind == "ref": + return _decode_graph_target_ref(spec["value"]) + raise ValueError(f"Pipeline cache: unknown graph target spec {spec!r}.") + + +# GraphModule can keep bound methods in __dict__ for export/runtime behavior. Serialize those as +# function refs and rebind them after construction to avoid direct self-references in torch.save. +def _graphmodule_bound_method_specs(gm: GraphModule) -> list[dict[str, Any]]: + specs: list[dict[str, Any]] = [] + for name, value in gm.__dict__.items(): + if not inspect.ismethod(value) or getattr(value, "__self__", None) is not gm: + continue + if _is_exported_program_train_eval_method(name, value): + continue + function_ref = _encode_graph_target_ref(value.__func__) + specs.append({"name": name, "function_ref": function_ref}) + return specs + + +def _is_exported_program_train_eval_method(name: str, value: Any) -> bool: + if name not in ("train", "eval"): + return False + func = getattr(value, "__func__", None) + return getattr(func, "__module__", None) == "torch.export.exported_program" and getattr( + func, "__qualname__", "" + ).startswith("ExportedProgram.module.._") + + +def _restore_graphmodule_bound_methods( + module: GraphModule, specs: Sequence[Mapping[str, Any]] +) -> None: + for spec in specs: + name = spec.get("name") + function_ref = spec.get("function_ref") + if not isinstance(name, str) or not isinstance(function_ref, Mapping): + raise ValueError(f"pipeline cache module payload has invalid bound method: {spec!r}") + setattr(module, name, types.MethodType(_decode_graph_target_ref(function_ref), module)) + + +# Node metadata often contains live Nodes, modules, or real tensors. Keep durable pickleable +# metadata and rebuild placeholder/get_attr "val" entries as fake tensors from shape/dtype. +def _meta_value_to_spec(value: Any) -> dict[str, Any] | None: + shape = getattr(value, "shape", None) + dtype = getattr(value, "dtype", None) + if shape is not None and dtype is not None: + return { + "kind": "tensor", + "shape": _concrete_shape(shape), + "dtype": dtype, + } + return None + + +def _meta_value_from_spec(spec: Mapping[str, Any], fake_mode: FakeTensorMode) -> Any: + if spec.get("kind") == "tensor": + tensor = torch.empty(tuple(spec["shape"]), dtype=spec["dtype"], device="meta") + return fake_mode.from_tensor(tensor, static_shapes=True) + raise ValueError(f"Pipeline cache: unknown placeholder meta value spec {spec!r}.") + + +def _concrete_shape(shape: Any) -> tuple[int, ...]: + def concrete_dim(dim: Any) -> int: + try: + return int(dim) + except (TypeError, ValueError): + node = getattr(dim, "node", None) + hint = getattr(node, "hint", None) + if hint is not None: + return int(hint) + raise ValueError(f"Pipeline cache: cannot serialize symbolic shape dimension {dim!r}.") + + concrete_dims: list[int] = [] + for dim in shape: + concrete_dims.append(concrete_dim(dim)) + return tuple(concrete_dims) + + +def _contains_non_durable_meta_ref(value: Any) -> bool: + if isinstance(value, (Node, torch.Tensor, nn.Module)): + return True + if isinstance(value, Mapping): + return any( + _contains_non_durable_meta_ref(key) or _contains_non_durable_meta_ref(item) + for key, item in value.items() + ) + if isinstance(value, (list, tuple, set, frozenset, immutable_list)): + return any(_contains_non_durable_meta_ref(item) for item in value) + return False + + +def _sanitize_node_meta_for_pickling( + node: torch.fx.Node, +) -> tuple[dict[str, Any], dict[str, Any] | None]: + sanitized: dict[str, Any] = {} + placeholder_meta_spec = None + for key, value in node.meta.items(): + if key == "val": + if node.op in ("placeholder", "get_attr"): + placeholder_meta_spec = _meta_value_to_spec(value) + continue + if not _contains_non_durable_meta_ref(value) and _is_pickleable(value): + sanitized[key] = value + return sanitized, placeholder_meta_spec + + +def _restore_placeholder_meta_values( + graph: Graph, placeholder_meta_specs: Mapping[str, Mapping[str, Any]] +) -> None: + fake_mode = FakeTensorMode(allow_non_fake_inputs=True) + for node in graph.nodes: + spec = placeholder_meta_specs.get(node.name) + if spec is not None: + node.meta["val"] = _meta_value_from_spec(spec, fake_mode) + + +# Args/kwargs are structurally encoded so Node references survive graph reconstruction by name +# instead of by pickle identity. This is the main reason the cache owns graph_state. +def _encode_graph_arg(value: Any) -> dict[str, Any]: + if isinstance(value, Node): + return {"kind": "node", "name": value.name} + if isinstance(value, torch.Size): + return {"kind": "torch_size", "items": [_encode_graph_arg(item) for item in value]} + if isinstance(value, immutable_list): + return {"kind": "immutable_list", "items": [_encode_graph_arg(item) for item in value]} + if isinstance(value, immutable_dict): + return { + "kind": "immutable_dict", + "items": [(key, _encode_graph_arg(item)) for key, item in value.items()], + } + if isinstance(value, tuple): + return {"kind": "tuple", "items": [_encode_graph_arg(item) for item in value]} + if isinstance(value, list): + return {"kind": "list", "items": [_encode_graph_arg(item) for item in value]} + if isinstance(value, dict): + return { + "kind": "dict", + "items": [(key, _encode_graph_arg(item)) for key, item in value.items()], + } + if isinstance(value, slice): + return { + "kind": "slice", + "start": _encode_graph_arg(value.start), + "stop": _encode_graph_arg(value.stop), + "step": _encode_graph_arg(value.step), + } + if _is_pickleable(value): + return {"kind": "literal", "value": value} + raise ValueError( + "Pipeline cache: graph argument is not pickleable: " + f"{value!r} ({type(value).__module__}.{type(value).__qualname__})." + ) + + +def _decode_graph_arg(spec: Mapping[str, Any], nodes_by_name: Mapping[str, Node]) -> Any: + kind = spec.get("kind") + if kind == "node": + return nodes_by_name[spec["name"]] + if kind == "torch_size": + return torch.Size(_decode_graph_arg(item, nodes_by_name) for item in spec["items"]) + if kind == "immutable_list": + return immutable_list(_decode_graph_arg(item, nodes_by_name) for item in spec["items"]) + if kind == "immutable_dict": + return immutable_dict( + [(key, _decode_graph_arg(item, nodes_by_name)) for key, item in spec["items"]] + ) + if kind == "tuple": + return tuple(_decode_graph_arg(item, nodes_by_name) for item in spec["items"]) + if kind == "list": + return [_decode_graph_arg(item, nodes_by_name) for item in spec["items"]] + if kind == "dict": + return {key: _decode_graph_arg(item, nodes_by_name) for key, item in spec["items"]} + if kind == "slice": + return slice( + _decode_graph_arg(spec["start"], nodes_by_name), + _decode_graph_arg(spec["stop"], nodes_by_name), + _decode_graph_arg(spec["step"], nodes_by_name), + ) + if kind == "literal": + return spec["value"] + raise ValueError(f"Pipeline cache: unknown graph argument spec {spec!r}.") + + +def _graph_codegen_to_state(graph: Graph) -> dict[str, Any] | None: + # torch.export graphs carry PyTreeCodeGen state. Without it, restored modules lose their + # original input/output flattening behavior even though the node list itself is correct. + codegen = getattr(graph, "_codegen", None) + pytree_info = getattr(codegen, "pytree_info", None) + if pytree_info is not None and _is_pickleable(pytree_info): + return { + "kind": "pytree", + "pytree_info": pytree_info, + } + return None + + +def _graph_codegen_from_state(state: Mapping[str, Any] | None) -> Any: + if state is None: + return None + if state.get("kind") == "pytree": + return _PyTreeCodeGen(state["pytree_info"]) + return None + + +def _graph_to_state(graph: Graph) -> dict[str, Any]: + # Raw torch.fx.Graph pickling captures private lookup tables and object identities that are + # brittle across runs. graph_state stores only the ordered nodes plus structural references. + nodes = [] + placeholder_meta_specs = {} + for node in graph.nodes: + meta, placeholder_meta_spec = _sanitize_node_meta_for_pickling(node) + if placeholder_meta_spec is not None: + placeholder_meta_specs[node.name] = placeholder_meta_spec + nodes.append( + { + "name": node.name, + "op": node.op, + "target": _encode_graph_target(node.target), + "args": _encode_graph_arg(node.args), + "kwargs": _encode_graph_arg(node.kwargs), + "type": node.type if _is_pickleable(node.type) else None, + "meta": meta, + } + ) + state = { + "nodes": nodes, + } + codegen_state = _graph_codegen_to_state(graph) + if codegen_state is not None: + state["codegen"] = codegen_state + if placeholder_meta_specs: + state["placeholder_meta"] = placeholder_meta_specs + return state + + +def _graph_from_state(state: Mapping[str, Any]) -> Graph: + graph = Graph() + nodes_by_name: dict[str, Node] = {} + node_states = state.get("nodes") + if not isinstance(node_states, Sequence): + raise ValueError("pipeline cache graph payload is missing nodes.") + for node_state in node_states: + if not isinstance(node_state, Mapping): + raise ValueError(f"pipeline cache graph payload has invalid node: {node_state!r}") + args = _decode_graph_arg(node_state["args"], nodes_by_name) + kwargs = _decode_graph_arg(node_state["kwargs"], nodes_by_name) + node = graph.create_node( + node_state["op"], + _decode_graph_target(node_state["target"]), + args=args, + kwargs=kwargs, + name=node_state["name"], + type_expr=node_state.get("type"), + ) + node.meta = dict(node_state.get("meta", {})) + nodes_by_name[node.name] = node + + codegen = _graph_codegen_from_state(state.get("codegen")) + if codegen is not None: + graph._codegen = codegen + placeholder_meta_specs = state.get("placeholder_meta", {}) + if not isinstance(placeholder_meta_specs, Mapping): + raise ValueError("pipeline cache graph payload has invalid placeholder metadata.") + _restore_placeholder_meta_values(graph, placeholder_meta_specs) + return graph + + +def _mark_cached_shape_metadata_invalid(module: nn.Module) -> None: + # Weight nodes are rebuilt after cache load, so shape-prop history must not claim that cached + # weight-dependent shapes are still valid for later transforms. + for _, graph_module in named_graphmodules(module): + invalidate_weight_node_cache(graph_module) + autodeploy_meta = graph_module.meta.get("_autodeploy", {}) + history = autodeploy_meta.get("transform_history", {}) + for key, info in list(history.items()): + history[key] = info.model_copy(update={"has_valid_shapes": False}) + + +class _GraphModulePlaceholder(nn.Module): + """Temporary stand-in while torch.save serializes an nn.Module wrapper.""" + + def __init__(self, name: str): + super().__init__() + self.name = name + + +def _graphmodule_to_structural_payload(gm: GraphModule) -> dict[str, Any]: + body = _sanitized_graphmodule_body(gm) + return { + "type": _GRAPHMODULE_PAYLOAD_KIND, + "class_name": body.get("_graphmodule_cls_name", type(gm).__name__), + "body": body, + "bound_methods": _graphmodule_bound_method_specs(gm), + "graph_state": _graph_to_state(gm.graph), + } + + +def _graphmodule_from_structural_payload(payload: Mapping[str, Any]) -> GraphModule: + graph_state = payload.get("graph_state") + body = payload.get("body") + if not isinstance(graph_state, Mapping) or not isinstance(body, dict): + raise ValueError("pipeline cache module payload is missing GraphModule state.") + graph = _graph_from_state(graph_state) + root = _CodeOnlyModule(body) + module = GraphModule(root, graph, class_name=payload["class_name"]) + for key, value in body.items(): + if key == "_graph": + continue + module.__dict__[key] = value + module.recompile() + bound_methods = payload.get("bound_methods", []) + if not isinstance(bound_methods, Sequence): + raise ValueError("pipeline cache GraphModule payload has invalid bound methods.") + _restore_graphmodule_bound_methods(module, bound_methods) + return module + + +def _replace_submodule(module: nn.Module, target: str, replacement: nn.Module) -> None: + parent_name, _, child_name = target.rpartition(".") + parent = module.get_submodule(parent_name) if parent_name else module + parent._modules[child_name] = replacement + + +def _named_graphmodule_roots(module: nn.Module) -> list[tuple[str, GraphModule]]: + roots: list[tuple[str, GraphModule]] = [] + for name, graph_module in named_graphmodules(module): + if any(parent == "" or name.startswith(f"{parent}.") for parent, _ in roots): + continue + roots.append((name, graph_module)) + return roots + + +def save_module_structural(module: nn.Module, module_file: Any) -> None: + if isinstance(module, GraphModule): + torch.save(_graphmodule_to_structural_payload(module), module_file) + return + + graphmodules = _named_graphmodule_roots(module) + if not graphmodules: + raise ValueError( + "pipeline_cache only supports GraphModule or nn.Module wrappers containing " + "GraphModule children." + ) + + graphmodule_payloads = [ + {"name": name, "payload": _graphmodule_to_structural_payload(graph_module)} + for name, graph_module in graphmodules + ] + try: + # Qwen-style wrappers need the root module pickled, but their GraphModule children still + # use the structural graph_state path. Replace children only for the duration of save. + for name, _ in graphmodules: + _replace_submodule(module, name, _GraphModulePlaceholder(name)) + payload = { + "type": _MODULE_TREE_PAYLOAD_KIND, + "module": module, + "graphmodules": graphmodule_payloads, + } + torch.save(payload, module_file) + finally: + for name, graph_module in graphmodules: + _replace_submodule(module, name, graph_module) + + +def load_module_structural(module_file: Any) -> nn.Module: + payload = torch.load(module_file, map_location="cpu", weights_only=False) + if isinstance(payload, Mapping) and payload.get("type") == _GRAPHMODULE_PAYLOAD_KIND: + module = _graphmodule_from_structural_payload(payload) + _mark_cached_shape_metadata_invalid(module) + return module + if not isinstance(payload, Mapping) or payload.get("type") != _MODULE_TREE_PAYLOAD_KIND: + raise ValueError( + f"pipeline cache module has unsupported payload shape: {type(payload).__name__}" + ) + + module = payload.get("module") + if not isinstance(module, nn.Module): + raise ValueError("pipeline cache module tree payload is missing the root module.") + graphmodule_payloads = payload.get("graphmodules") + if not isinstance(graphmodule_payloads, list): + raise ValueError("pipeline cache module tree payload is missing GraphModule states.") + + for item in graphmodule_payloads: + if not isinstance(item, Mapping) or not isinstance(item.get("name"), str): + raise ValueError(f"pipeline cache module tree has invalid GraphModule entry: {item!r}") + graph_module = _graphmodule_from_structural_payload(item["payload"]) + _replace_submodule(module, item["name"], graph_module) + _mark_cached_shape_metadata_invalid(module) + return module + + +def validate_pre_weight_snapshot(model: nn.Module) -> None: + materialized_params = [ + name for name, param in model.named_parameters() if param.device.type != "meta" + ] + if materialized_params: + raise ValueError( + "pipeline_cache only supports pre-weight-loading snapshots; materialized " + f"parameters found: {materialized_params[:5]}" + ) diff --git a/tensorrt_llm/_torch/auto_deploy/utils/cuda_graph.py b/tensorrt_llm/_torch/auto_deploy/utils/cuda_graph.py index d31cb39aca1b..d9f4337bb15c 100644 --- a/tensorrt_llm/_torch/auto_deploy/utils/cuda_graph.py +++ b/tensorrt_llm/_torch/auto_deploy/utils/cuda_graph.py @@ -30,6 +30,13 @@ def __new__(cls, *args, **kwargs): # the graph is executed with representative inputs. WARM_UP: bool = False + # Indicates that captured-graph wrappers must short-circuit to eager. + # Set by ad_executor.maybe_pad_for_cuda_graph under attention-DP mixed mode + # so all ranks read kwargs (e.g. batch_info_host slot 14) consistently + # instead of using stale capture-time scalar kernel args. See + # BypassCapturedGraphs() below. + BYPASS: bool = False + def begin_warm_up(): if CudaGraphState.WARM_UP: raise ValueError("Already in a warm-up state") @@ -43,6 +50,19 @@ def end_warm_up(): def in_warm_up() -> bool: return CudaGraphState.WARM_UP + def begin_bypass(): + if CudaGraphState.BYPASS: + raise ValueError("Already in a bypass state") + CudaGraphState.BYPASS = True + + def end_bypass(): + if not CudaGraphState.BYPASS: + raise ValueError("Not in bypass state") + CudaGraphState.BYPASS = False + + def in_bypass() -> bool: + return CudaGraphState.BYPASS + cuda_graph_state = CudaGraphState @@ -54,3 +74,23 @@ def CudaGraphWarmUpPhase(): yield finally: cuda_graph_state.end_warm_up() + + +@contextmanager +def BypassCapturedGraphs(): + """Force every CapturedGraph wrapper inside this scope to short-circuit to eager. + + Used by ``ad_executor.maybe_pad_for_cuda_graph`` under attention-DP mixed mode: + when the cross-rank ``tp_allgather`` vote says some ranks must run eager (e.g. + one rank is in prefill while others are in decode), all ranks enter this + context for the call so captured graphs whose shapes happen to match are + bypassed too. Otherwise the captured kernel-launch args (notably the + ``int(batch_info_host[14].item())`` baked at capture time, where slot 14 + holds ``max_dp_num_tokens`` per ``BatchInfo``) would diverge from the eager + ranks' fresh reads, corrupting the ``MoeAlltoAll`` collective. + """ + cuda_graph_state.begin_bypass() + try: + yield + finally: + cuda_graph_state.end_bypass() diff --git a/tensorrt_llm/_torch/auto_deploy/utils/node_utils.py b/tensorrt_llm/_torch/auto_deploy/utils/node_utils.py index 286242ce5228..17b4012a83e4 100644 --- a/tensorrt_llm/_torch/auto_deploy/utils/node_utils.py +++ b/tensorrt_llm/_torch/auto_deploy/utils/node_utils.py @@ -808,23 +808,36 @@ def all_gather_ops() -> frozenset: Strategy (AUTO/SYMM_MEM) and workspace_id (for symm-mem ProcessGroup selection) flow through as op arguments, not as separate op identities. + + The TRT-LLM-backed ops are silently skipped if their custom_ops module + failed to register (e.g. in the standalone ``llmc`` package, where + ``trtllm_dist`` is not importable). """ return frozenset( - { - torch.ops.auto_deploy.trtllm_dist_all_gather, - torch.ops.auto_deploy.torch_dist_all_gather, - } + op + for op in ( + _auto_deploy_op("trtllm_dist_all_gather"), + _auto_deploy_op("torch_dist_all_gather"), + ) + if op is not None ) @functools.cache def all_reduce_ops() -> frozenset: - """All AllReduce custom op packets recognized by AutoDeploy.""" + """All AllReduce custom op packets recognized by AutoDeploy. + + The TRT-LLM-backed op is silently skipped if its custom_ops module + failed to register (e.g. in the standalone ``llmc`` package, where + ``trtllm_dist`` is not importable). + """ return frozenset( - { - torch.ops.auto_deploy.trtllm_dist_all_reduce, - torch.ops.auto_deploy.torch_dist_all_reduce, - } + op + for op in ( + _auto_deploy_op("trtllm_dist_all_reduce"), + _auto_deploy_op("torch_dist_all_reduce"), + ) + if op is not None ) @@ -1339,6 +1352,79 @@ def set_op_args(node: Node, **name_value_pairs) -> None: node.kwargs = kwargs +# Classification hints are layer-level: they are invariant across the fine-grained ops that +# make up one logical layer (e.g. all projections of a SwiGLU MLP share the same +# ``layer_type``) and are consumed by policy filters such as ``shard_layers`` -- NOT by +# per-weight sharding mechanics. They are therefore the only sharding-related kwargs that are +# well-defined to carry onto a fused/replacement op produced by an N->1 pattern rewrite (by +# consensus). Per-weight mechanics (``tp_mode``, ``output_sizes``, ``tp_min_local_shape``, +# ``tp_scaled_dim``, ``enable_sharding``) are intentionally NOT propagated: a fused op's +# ShardableNode re-derives those structurally, so copying them across a rewrite is ill-defined +# (the constituents legitimately disagree -- e.g. an MLA layer mixes ``tp_mode`` none/colwise/ +# rowwise while sharing a single ``layer_type``). +CLASSIFICATION_HINT_NAMES = frozenset({"layer_type"}) + + +def _op_schema_arg_names(node: Node) -> set: + """Return the argument names declared by a call_function node's op schema. + + Returns an empty set for non-call_function nodes or ops without an introspectable + schema, so callers can use it as a safe membership test. + """ + if not isinstance(node, Node) or node.op != "call_function": + return set() + try: + return {a.name for a in _get_op_schema(node).arguments} + except (ValueError, RuntimeError): + return set() + + +def collect_classification_hints(nodes: Iterable[Node]) -> dict: + """Return a consensus value for each classification hint across ``nodes``. + + For every name in :data:`CLASSIFICATION_HINT_NAMES`, scan the call_function nodes that + declare it and collect the distinct *meaningful* values (ignoring ``None`` and the + ``"unknown"`` default). A name is included in the result only when exactly one such + value is observed; conflicting values are dropped with a warning, since a conflict + means the caller grouped nodes that belong to different logical layers. + """ + result: dict = {} + for name in CLASSIFICATION_HINT_NAMES: + values = set() + for n in nodes: + if name not in _op_schema_arg_names(n): + continue + [value] = extract_op_args(n, name) + if value is not None and value != "unknown": + values.add(value) + if len(values) == 1: + result[name] = next(iter(values)) + elif len(values) > 1: + ad_logger.warning( + f"Conflicting '{name}' hints {sorted(values)} among matched nodes; " + "not propagating to the replacement op (matched nodes may span layers)." + ) + return result + + +def stamp_hints(nodes: Iterable[Node], hints: dict) -> int: + """Set ``hints`` on every node in ``nodes`` whose op schema declares them. + + Returns the number of nodes updated. Each hint is applied only to nodes whose op + actually declares that argument, so passing a heterogeneous node list is safe. + """ + if not hints: + return 0 + count = 0 + for n in nodes: + names = _op_schema_arg_names(n) + to_set = {k: v for k, v in hints.items() if k in names} + if to_set: + set_op_args(n, **to_set) + count += 1 + return count + + def predecessors( node: Node, depth: int = 1, diff --git a/tensorrt_llm/_torch/auto_deploy/utils/pattern_matcher.py b/tensorrt_llm/_torch/auto_deploy/utils/pattern_matcher.py index fbd12dc7b147..f508c1a324d7 100644 --- a/tensorrt_llm/_torch/auto_deploy/utils/pattern_matcher.py +++ b/tensorrt_llm/_torch/auto_deploy/utils/pattern_matcher.py @@ -55,6 +55,7 @@ from torch.fx import GraphModule from ..export import torch_export_to_gm +from .node_utils import collect_classification_hints, stamp_hints @contextlib.contextmanager @@ -127,6 +128,18 @@ def apply(self, match: Match, graph: torch.fx.Graph, node: torch.fx.Node) -> Non del node assert match.replacement_graph is not None output_nodes = match.output_nodes() + + # Carry layer-level classification hints (currently ``layer_type``) from the matched + # nodes onto the replacement op(s). This is the only sharding-related metadata that is + # well-defined to propagate across an N->1 rewrite: it is invariant across the + # fine-grained ops of one logical layer and is consumed by the downstream hint-driven + # sharder (``apply_sharding_hints`` / ``shard_layers``). Per-weight mechanics (tp_mode, + # output_sizes, ...) are intentionally NOT carried -- the replacement op's ShardableNode + # re-derives them structurally. Collect before the rewrite (cheap; reads only the + # matched nodes) so the node-set diff below is paid only when there is a hint to carry. + class_hints = collect_classification_hints(match.nodes) + nodes_before = set(graph.nodes) if class_hints else None + self.replace_with_graph( match, graph, @@ -134,6 +147,10 @@ def apply(self, match: Match, graph: torch.fx.Graph, node: torch.fx.Node) -> Non self.normalize_args(*match.args, **match.kwargs), ) + if class_hints: + inserted_nodes = [n for n in graph.nodes if n not in nodes_before] + stamp_hints(inserted_nodes, class_hints) + if len(output_nodes) > 1: # Torch's generic replacement path inserts the copied replacement graph relative to the # earliest matched output node. That is usually fine for single-output rewrites, but it diff --git a/tensorrt_llm/_torch/auto_deploy/utils/pipeline_cache_hooks.py b/tensorrt_llm/_torch/auto_deploy/utils/pipeline_cache_hooks.py new file mode 100644 index 000000000000..76ae42cbeb86 --- /dev/null +++ b/tensorrt_llm/_torch/auto_deploy/utils/pipeline_cache_hooks.py @@ -0,0 +1,87 @@ +# SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. +# SPDX-License-Identifier: Apache-2.0 +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. + +"""Markers for AutoDeploy load hooks that need pipeline-cache reconstruction.""" + +import importlib +import json +from collections.abc import Mapping +from typing import Any + +PIPELINE_CACHE_HOOK_SPEC_ATTR = "_auto_deploy_pipeline_cache_spec" + + +def _resolve_qualified_attr(module_name: str, qualname: str) -> Any: + obj: Any = importlib.import_module(module_name) + for part in qualname.split("."): + obj = getattr(obj, part) + return obj + + +def callable_ref(func: Any) -> dict[str, str] | None: + """Return an importable reference for a callable, or ``None`` if it is local.""" + module_name = getattr(func, "__module__", None) + qualname = getattr(func, "__qualname__", None) + if not isinstance(module_name, str) or not isinstance(qualname, str): + return None + if "" in qualname: + return None + + try: + resolved = _resolve_qualified_attr(module_name, qualname) + except (AttributeError, ImportError, ValueError): + return None + if resolved is not func: + return None + return {"module": module_name, "qualname": qualname} + + +def json_dict(value: Mapping[str, Any]) -> dict[str, Any] | None: + """Return a JSON-serializable copy of ``value``, or ``None``.""" + result = dict(value) + try: + return json.loads(json.dumps(result)) + except (TypeError, ValueError): + return None + + +def json_instance_payload(obj: Any) -> dict[str, Any]: + """Return JSON-serializable public attributes needed to rebuild a hook owner.""" + payload: dict[str, Any] = {} + for attr_name, value in getattr(obj, "__dict__", {}).items(): + if attr_name.startswith("_"): + continue + if callable(value): + continue + try: + value = json.loads(json.dumps(value)) + except (TypeError, ValueError): + continue + payload[attr_name] = value + return payload + + +def mark_pipeline_cache_hook(hook: Any, spec: Mapping[str, Any]) -> Any: + """Attach an explicit pipeline-cache reconstruction spec to a load hook.""" + setattr(hook, PIPELINE_CACHE_HOOK_SPEC_ATTR, dict(spec)) + return hook + + +def get_pipeline_cache_hook_spec(hook: Any) -> dict[str, Any] | None: + """Return the hook's explicit pipeline-cache spec, if one was attached.""" + spec = getattr(hook, PIPELINE_CACHE_HOOK_SPEC_ATTR, None) + if spec is None: + return None + return dict(spec) diff --git a/tensorrt_llm/_torch/custom_ops/cpp_custom_ops.py b/tensorrt_llm/_torch/custom_ops/cpp_custom_ops.py index b31bb56230c6..b09d87d3b864 100644 --- a/tensorrt_llm/_torch/custom_ops/cpp_custom_ops.py +++ b/tensorrt_llm/_torch/custom_ops/cpp_custom_ops.py @@ -680,6 +680,7 @@ def _( cluster_rank: int, min_latency_mode: bool, use_fp8_block_scaling: bool, + skip_data_expand: bool = False, ): experts_per_token = token_selected_experts.shape[1] @@ -1013,6 +1014,20 @@ def _(workspace, cp_rank, cp_size): # This op initializes workspace in-place and returns nothing return None + @torch.library.register_fake("trtllm::ulysses_post_unscatter_qkv") + def _(q_in, k_in, v_in, layout=0): + # Storage is always NHD-contig [B, P*Sp, H, D]. HND-shape return is a + # transpose-view (HND-shape, NHD-stride, non-contig) so Inductor sees + # the same stride pattern as the real op. + P, B, Sp, H, D = q_in.shape + nhd_shape = (B, P * Sp, H, D) + + def _mk(t): + base = t.new_empty(nhd_shape) + return base.transpose(1, 2) if layout == 0 else base + + return (_mk(q_in), _mk(k_in), _mk(v_in)) + @torch.library.register_fake("trtllm::helix_post_process") def _(gathered_o, gathered_stats, scale): return gathered_o.new_empty(*gathered_o.shape[1:]) diff --git a/tensorrt_llm/_torch/custom_ops/cute_dsl_custom_ops.py b/tensorrt_llm/_torch/custom_ops/cute_dsl_custom_ops.py index 681cc3d3a0d1..efdfb0640c9e 100644 --- a/tensorrt_llm/_torch/custom_ops/cute_dsl_custom_ops.py +++ b/tensorrt_llm/_torch/custom_ops/cute_dsl_custom_ops.py @@ -529,6 +529,7 @@ def forward( self, inputs: List[torch.Tensor], tactic, + bias: Optional[torch.Tensor] = None, **kwargs, ) -> torch.Tensor: """ @@ -542,6 +543,8 @@ def forward( inputs[3]: Weight scale tensor of shape (n, k//16), dtype: fp8. inputs[4]: Alpha scaling factor. dtype: float32. tactic: Tiling and cluster strategy, typically a tuple (mma_tiler_mn, cluster_shape_mn). + bias: Optional per-N bias [N]. Added post-GEMM inside the + custom op (native CuTeDSL epilogue fusion is a follow-up). Returns: torch.Tensor: Output tensor of shape (m, n), dtype: bf16. @@ -758,6 +761,12 @@ def forward( if swap_ab: c_tensor = c_tensor.permute(1, 0) + if bias is not None: + if bias.ndim != 1 or bias.shape[0] != c_tensor.shape[-1]: + raise ValueError( + f"bias must be a 1-D tensor of shape [N]={c_tensor.shape[-1]}, " + f"got shape {tuple(bias.shape)}") + c_tensor = c_tensor + bias return c_tensor # a/b: fp4, scale: fp8, output: bf16 diff --git a/tensorrt_llm/_torch/custom_ops/torch_custom_ops.py b/tensorrt_llm/_torch/custom_ops/torch_custom_ops.py index 2555475016b4..0170e0417112 100644 --- a/tensorrt_llm/_torch/custom_ops/torch_custom_ops.py +++ b/tensorrt_llm/_torch/custom_ops/torch_custom_ops.py @@ -558,9 +558,10 @@ def forward( self, inputs: List[torch.Tensor], tactic: int = -1, + bias: Optional[torch.Tensor] = None, ) -> torch.Tensor: mat1, mat2, mat1_scale, mat2_scale, global_scale = inputs - return self.fp4_gemm_runner.run_gemm( + out = self.fp4_gemm_runner.run_gemm( mat1, mat2, mat1_scale, @@ -569,7 +570,9 @@ def forward( self.output_buffer_kind, tactic, self.group, + bias, ) + return out class CublasLtFP4GemmRunner(TunableRunner): @@ -621,6 +624,7 @@ def forward( self, inputs: List[torch.Tensor], tactic: int = -1, + bias: Optional[torch.Tensor] = None, ) -> torch.Tensor: mat1, mat2, mat1_scale, mat2_scale, alpha = inputs result = self.cublaslt_runner.run_gemm( @@ -632,6 +636,7 @@ def forward( self.output_buffer_kind, tactic, self.group, + bias, ) return result @@ -688,6 +693,7 @@ def forward( self, inputs: List[torch.Tensor], tactic: int = -1, + bias: Optional[torch.Tensor] = None, ) -> torch.Tensor: act_fp4, weight, act_sf, weight_scale, alpha = inputs @@ -697,14 +703,13 @@ def forward( act_sf_unswizzled = torch.ops.trtllm.block_scale_interleave_reverse( act_sf.view((m + 128 - 1) // 128 * 128, -1)) - # Call CUDA Core NVFP4 GEMM result = torch.ops.trtllm.cuda_core_nvfp4_gemm( act_fp4, weight, scale_a=act_sf_unswizzled, scale_b=weight_scale, alpha=alpha, - bias=None, + bias=bias, out_dtype=self.output_dtype, output_buffer_kind=self.output_buffer_kind, group=self.group, @@ -714,16 +719,20 @@ def forward( @torch.library.custom_op("trtllm::nvfp4_gemm_cublaslt", mutates_args=()) def nvfp4_gemm_cublaslt( - act_fp4: torch.Tensor, - weight: torch.Tensor, - act_sf: torch.Tensor, - weight_scale: torch.Tensor, - alpha: torch.Tensor, - output_dtype: torch.dtype, - output_buffer_kind: int = int(BufferKind.DEFAULT), + act_fp4: torch.Tensor, + weight: torch.Tensor, + act_sf: torch.Tensor, + weight_scale: torch.Tensor, + alpha: torch.Tensor, + output_dtype: torch.dtype, + output_buffer_kind: int = int(BufferKind.DEFAULT), + bias: Optional[torch.Tensor] = None, ) -> torch.Tensor: """cuBLASLt-based NVFP4 GEMM with heuristic-based auto-tuning. + Args: + bias: Optional per-N bias [N], fused via CUBLASLT_EPILOGUE_BIAS. + Note: This function is primarily used internally by nvfp4_gemm. Direct usage is discouraged. Consider using nvfp4_gemm instead @@ -742,24 +751,27 @@ def nvfp4_gemm_cublaslt( [nvfp4_gemm_runner], nvfp4_gemm_runner.tuning_config, [act_fp4, weight, act_sf, weight_scale, alpha], + bias=bias, ) result = nvfp4_gemm_runner( inputs=[act_fp4, weight, act_sf, weight_scale, alpha], - tactic=best_tactic) + tactic=best_tactic, + bias=bias) return result @nvfp4_gemm_cublaslt.register_fake def _( - act_fp4: torch.Tensor, - weight: torch.Tensor, - act_sf: torch.Tensor, - weight_scale: torch.Tensor, - alpha: torch.Tensor, - output_dtype: torch.dtype, - output_buffer_kind: int = int(BufferKind.DEFAULT), + act_fp4: torch.Tensor, + weight: torch.Tensor, + act_sf: torch.Tensor, + weight_scale: torch.Tensor, + alpha: torch.Tensor, + output_dtype: torch.dtype, + output_buffer_kind: int = int(BufferKind.DEFAULT), + bias: Optional[torch.Tensor] = None, ) -> torch.Tensor: return act_fp4.new_empty((act_fp4.size(0), weight.size(0)), dtype=output_dtype) @@ -767,16 +779,21 @@ def _( @torch.library.custom_op("trtllm::nvfp4_gemm_cutlass", mutates_args=()) def nvfp4_gemm_cutlass( - act_fp4: torch.Tensor, - weight: torch.Tensor, - act_sf: torch.Tensor, - weight_scale: torch.Tensor, - alpha: torch.Tensor, - output_dtype: torch.dtype, - output_buffer_kind: int = int(BufferKind.DEFAULT), + act_fp4: torch.Tensor, + weight: torch.Tensor, + act_sf: torch.Tensor, + weight_scale: torch.Tensor, + alpha: torch.Tensor, + output_dtype: torch.dtype, + output_buffer_kind: int = int(BufferKind.DEFAULT), + bias: Optional[torch.Tensor] = None, ) -> torch.Tensor: """CUTLASS-based NVFP4 GEMM with auto-tuning. + Args: + bias: Optional per-N bias [N], fused via the CUTLASS + LinCombPerColBias epilogue. + Note: This function is primarily used internally by nvfp4_gemm. Direct usage is discouraged. Consider using nvfp4_gemm instead @@ -794,22 +811,25 @@ def nvfp4_gemm_cutlass( [nvfp4_gemm_runner], nvfp4_gemm_runner.tuning_config, [act_fp4, weight, act_sf, weight_scale, alpha], + bias=bias, ) return nvfp4_gemm_runner( inputs=[act_fp4, weight, act_sf, weight_scale, alpha], - tactic=best_tactic) + tactic=best_tactic, + bias=bias) @nvfp4_gemm_cutlass.register_fake def _( - act_fp4: torch.Tensor, - weight: torch.Tensor, - act_sf: torch.Tensor, - weight_scale: torch.Tensor, - alpha: torch.Tensor, - output_dtype: torch.dtype, - output_buffer_kind: int = int(BufferKind.DEFAULT), + act_fp4: torch.Tensor, + weight: torch.Tensor, + act_sf: torch.Tensor, + weight_scale: torch.Tensor, + alpha: torch.Tensor, + output_dtype: torch.dtype, + output_buffer_kind: int = int(BufferKind.DEFAULT), + bias: Optional[torch.Tensor] = None, ) -> torch.Tensor: return act_fp4.new_empty((act_fp4.size(0), weight.size(0)), dtype=output_dtype) @@ -961,6 +981,7 @@ def forward( tactic: Union[ Tuple, int] = -1, # tuple: (backend name, sub_tactic_id), or int: -1 for fallback + bias: Optional[torch.Tensor] = None, **kwargs, ) -> torch.Tensor: # Handle fallback tactic on cache miss @@ -977,22 +998,27 @@ def forward( return CudaCoreNVFP4Runner(self.output_buffer_kind, self.output_dtype, group=self.group)(inputs, - tactic=sub_tactic) + tactic=sub_tactic, + bias=bias) elif backend == "cutlass": return FP4GemmRunner(fp4_utils.FP4GemmType.W4A4_NVFP4_NVFP4, self.output_buffer_kind, self.output_dtype, - group=self.group)(inputs, tactic=sub_tactic) + group=self.group)(inputs, + tactic=sub_tactic, + bias=bias) elif backend == "cublaslt": return CublasLtFP4GemmRunner(self.output_buffer_kind, self.output_dtype, group=self.group)(inputs, - tactic=sub_tactic) + tactic=sub_tactic, + bias=bias) elif backend == "cutedsl": return CuteDSLNVFP4BlackwellRunner(self.output_dtype, self.output_buffer_kind, self.group)(inputs, - tactic=sub_tactic) + tactic=sub_tactic, + bias=bias) else: raise ValueError(f"Invalid tactic: {tactic}") @@ -1008,6 +1034,7 @@ def nvfp4_gemm( output_buffer_kind: int = int(BufferKind.DEFAULT), allowed_backends: str = "cutlass,cublaslt,cuda_core", group: Optional[List[int]] = None, + bias: Optional[torch.Tensor] = None, ) -> torch.Tensor: """Unified NVFP4 GEMM with automatic backend selection. @@ -1077,6 +1104,7 @@ def nvfp4_gemm( NVFP4GemmUnifiedRunner. tuning_config, # All runners use the same tuning_config [act_fp4, weight, act_sf, weight_scale, alpha], + bias=bias, ) except IndexError as e: # Provide more helpful error message @@ -1091,6 +1119,7 @@ def nvfp4_gemm( return runner( inputs=[act_fp4, weight, act_sf, weight_scale, alpha], tactic=best_tactic, + bias=bias, ) @@ -1105,6 +1134,7 @@ def _( output_buffer_kind: int = int(BufferKind.DEFAULT), allowed_backends: str = "cutlass,cublaslt,cuda_core", group: Optional[List[int]] = None, + bias: Optional[torch.Tensor] = None, ) -> torch.Tensor: """Fake implementation for torch.compile support.""" return act_fp4.new_empty((act_fp4.size(0), weight.size(0)), @@ -2417,11 +2447,14 @@ class Fp4QuantTactic(enum.IntEnum): def _fp4_quantize_dispatch(input: torch.Tensor, input_scale: torch.Tensor, - scaling_vector_size: int, + scaling_vector_size: int, sf_use_ue8m0: bool, is_sf_swizzled_layout: bool, tactic: int) -> Tuple[torch.Tensor, torch.Tensor]: """Dispatch FP4 quantization to TRTLLM or FlashInfer kernel.""" if tactic == Fp4QuantTactic.FLASHINFER and IS_FLASHINFER_AVAILABLE: + assert not sf_use_ue8m0, ( + "FlashInfer FP4 tactic does not support sf_use_ue8m0=True; " + "force the TRTLLM tactic.") act_fp4, act_sf = _flashinfer_nvfp4_quantize( input, input_scale, @@ -2439,7 +2472,7 @@ def _fp4_quantize_dispatch(input: torch.Tensor, input_scale: torch.Tensor, return act_fp4, act_sf else: return torch.ops.trtllm.fp4_quantize(input, input_scale, - scaling_vector_size, + scaling_vector_size, sf_use_ue8m0, is_sf_swizzled_layout) @@ -2461,12 +2494,15 @@ class Fp4QuantKernelRunner(TunableRunner): def __init__(self, scaling_vector_size: int = 16, - is_sf_swizzled_layout: bool = False): + sf_use_ue8m0: bool = False, + is_sf_swizzled_layout: bool = True): self.scaling_vector_size = scaling_vector_size + self.sf_use_ue8m0 = sf_use_ue8m0 self.is_sf_swizzled_layout = is_sf_swizzled_layout def unique_id(self): - return (self.scaling_vector_size, self.is_sf_swizzled_layout) + return (self.scaling_vector_size, self.sf_use_ue8m0, + self.is_sf_swizzled_layout) def get_valid_tactics( self, @@ -2474,7 +2510,8 @@ def get_valid_tactics( profile: OptimizationProfile, ) -> List[int]: tactics = [Fp4QuantTactic.TRTLLM] - if IS_FLASHINFER_AVAILABLE: + # FlashInfer FP4 kernel has no UE8M0 / MXFP4 mode. + if IS_FLASHINFER_AVAILABLE and not self.sf_use_ue8m0: tactics.append(Fp4QuantTactic.FLASHINFER) return tactics @@ -2486,6 +2523,7 @@ def forward( input, input_scale = inputs act_fp4, act_sf = _fp4_quantize_dispatch(input, input_scale, self.scaling_vector_size, + self.sf_use_ue8m0, self.is_sf_swizzled_layout, tactic) return act_fp4 @@ -2496,7 +2534,8 @@ def tunable_fp4_quantize( input: torch.Tensor, input_scale: torch.Tensor, scaling_vector_size: int = 16, - is_sf_swizzled_layout: bool = False, + sf_use_ue8m0: bool = False, + is_sf_swizzled_layout: bool = True, ) -> List[torch.Tensor]: """FP4 quantization with autotuning between TRTLLM and FlashInfer kernels. @@ -2508,14 +2547,17 @@ def tunable_fp4_quantize( input: Activation tensor [M, K] in bf16/fp16 input_scale: Global scale factor tensor scaling_vector_size: Block size for scale factors (default: 16) - is_sf_swizzled_layout: Whether to use swizzled layout for scales + sf_use_ue8m0: MXFP4 (UE8M0 SF) when True; NVFP4 (UE4M3 SF) when + False. FlashInfer tactic does not support True. + is_sf_swizzled_layout: Emit SWIZZLED 128x4 FP8 e4m3 SF layout when + True (default). Returns: List of [act_fp4, act_sf] - quantized activation and scale factors """ tuner = AutoTuner.get() - quant_runner = Fp4QuantKernelRunner(scaling_vector_size, + quant_runner = Fp4QuantKernelRunner(scaling_vector_size, sf_use_ue8m0, is_sf_swizzled_layout) _, best_tactic = tuner.choose_one( @@ -2528,6 +2570,7 @@ def tunable_fp4_quantize( try: act_fp4, act_sf = _fp4_quantize_dispatch(input, input_scale, scaling_vector_size, + sf_use_ue8m0, is_sf_swizzled_layout, best_tactic) except Exception: @@ -2536,6 +2579,7 @@ def tunable_fp4_quantize( f"{input.shape}, falling back to TRTLLM kernel.") act_fp4, act_sf = _fp4_quantize_dispatch(input, input_scale, scaling_vector_size, + sf_use_ue8m0, is_sf_swizzled_layout, Fp4QuantTactic.TRTLLM) else: @@ -2548,7 +2592,8 @@ def _( input: torch.Tensor, input_scale: torch.Tensor, scaling_vector_size: int = 16, - is_sf_swizzled_layout: bool = False, + sf_use_ue8m0: bool = False, + is_sf_swizzled_layout: bool = True, ) -> List[torch.Tensor]: """Fake implementation for torch.compile support. @@ -2557,6 +2602,7 @@ def _( swizzled_layout=True in get_fp4_shape to match the actual output size. We also reshape FlashInfer's output to match in _fp4_quantize_dispatch. """ + del sf_use_ue8m0, is_sf_swizzled_layout output_shape, scale_shape = fp4_utils.get_fp4_shape(input.shape, scaling_vector_size, True) diff --git a/tensorrt_llm/_torch/custom_ops/trtllm_gen_custom_ops.py b/tensorrt_llm/_torch/custom_ops/trtllm_gen_custom_ops.py index a6df9e7c3bcd..0f9eb4a5e618 100644 --- a/tensorrt_llm/_torch/custom_ops/trtllm_gen_custom_ops.py +++ b/tensorrt_llm/_torch/custom_ops/trtllm_gen_custom_ops.py @@ -1902,10 +1902,10 @@ def get_valid_tactics(self, inputs: List[torch.Tensor], self.top_k, hidden_size, self.intermediate_size, - self.valid_hidden_size or hidden_size, - self.valid_intermediate_size or self.intermediate_size, self.local_num_experts, num_tokens, + self.valid_hidden_size or hidden_size, + self.valid_intermediate_size or self.intermediate_size, ) return tactics diff --git a/tensorrt_llm/_torch/distributed/communicator.py b/tensorrt_llm/_torch/distributed/communicator.py index bff85c544881..6fbbf16a19df 100644 --- a/tensorrt_llm/_torch/distributed/communicator.py +++ b/tensorrt_llm/_torch/distributed/communicator.py @@ -178,6 +178,10 @@ def allgather(self, obj, root=0): def allreduce(self, obj, op: ReduceOp = ReduceOp.SUM): pass + @abstractmethod + def tp_allreduce(self, obj, op: ReduceOp = ReduceOp.SUM): + pass + @abstractmethod def tp_broadcast(self, obj, root=0, **kwargs): pass @@ -766,6 +770,10 @@ def allreduce(self, obj, op: ReduceOp = ReduceOp.SUM): reduce_op = reduce_op_to_mpi(op) return mpi_comm().allreduce(obj, reduce_op) + def tp_allreduce(self, obj, op: ReduceOp = ReduceOp.SUM): + reduce_op = reduce_op_to_mpi(op) + return self.tp_comm.allreduce(obj, reduce_op) + class MultiHandleWrapper: """ @@ -999,6 +1007,25 @@ def allreduce( return obj + @log_op + def tp_allreduce( + self, + obj: int | float | torch.Tensor, + op: ReduceOp = ReduceOp.SUM, + ): + is_base_type = isinstance(obj, int) or isinstance(obj, float) + if is_base_type: + obj = torch.tensor(obj) + + dist.all_reduce(obj, + op=reduce_op_to_torch(op), + group=self.mapping.tp_group_pg) + + if is_base_type: + obj = obj.item() + + return obj + @log_op def tp_allgather(self, obj): if isinstance(obj, torch.Tensor): diff --git a/tensorrt_llm/_torch/models/__init__.py b/tensorrt_llm/_torch/models/__init__.py index 16d9875083b4..11760e684361 100644 --- a/tensorrt_llm/_torch/models/__init__.py +++ b/tensorrt_llm/_torch/models/__init__.py @@ -5,6 +5,7 @@ # under transformers >= 5.5; see _torch/configs/__init__.py. import tensorrt_llm._torch.configs # noqa: F401 +from .modeling_afmoe import AfmoeForCausalLM from .modeling_auto import AutoModelForCausalLM from .modeling_bert import BertForSequenceClassification from .modeling_clip import CLIPVisionModel @@ -53,6 +54,7 @@ # Note: for better readiblity, this should have same order as imports above __all__ = [ + "AfmoeForCausalLM", "AutoModelForCausalLM", "BertForSequenceClassification", "CLIPVisionModel", diff --git a/tensorrt_llm/_torch/models/checkpoints/__init__.py b/tensorrt_llm/_torch/models/checkpoints/__init__.py index f4094417b3ca..b10a93132ca8 100644 --- a/tensorrt_llm/_torch/models/checkpoints/__init__.py +++ b/tensorrt_llm/_torch/models/checkpoints/__init__.py @@ -1,4 +1,5 @@ from .base_checkpoint_loader import BaseCheckpointLoader +from .hf.afmoe_weight_mapper import AfmoeHfWeightMapper from .hf.checkpoint_loader import HfCheckpointLoader from .hf.config_loader import HfConfigLoader from .hf.gemma3_weight_mapper import Gemma3HfWeightMapper @@ -24,9 +25,9 @@ from .mx.checkpoint_loader import MXCheckpointLoader __all__ = [ - "HfConfigLoader", "HfWeightLoader", "HfWeightMapper", "MistralConfigLoader", - "MistralWeightMapper", "MistralCheckpointLoader", "BaseCheckpointLoader", - "HfCheckpointLoader", "NemotronHHfWeightMapper", + "AfmoeHfWeightMapper", "HfConfigLoader", "HfWeightLoader", "HfWeightMapper", + "MistralConfigLoader", "MistralWeightMapper", "MistralCheckpointLoader", + "BaseCheckpointLoader", "HfCheckpointLoader", "NemotronHHfWeightMapper", "NemotronNasHfWeightMapper", "Gemma3HfWeightMapper", "MixtralHfWeightMapper", "Llama4HfWeightMapper", "Qwen2MoeHfWeightMapper", "Qwen3MoeHfWeightMapper", "Qwen2VLHfWeightMapper", diff --git a/tensorrt_llm/_torch/models/checkpoints/hf/afmoe_weight_mapper.py b/tensorrt_llm/_torch/models/checkpoints/hf/afmoe_weight_mapper.py new file mode 100644 index 000000000000..40bb97939175 --- /dev/null +++ b/tensorrt_llm/_torch/models/checkpoints/hf/afmoe_weight_mapper.py @@ -0,0 +1,105 @@ +# SPDX-FileCopyrightText: Copyright (c) 2022-2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. +# SPDX-License-Identifier: Apache-2.0 +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. + +import torch +from torch import nn + +from tensorrt_llm._torch.models.checkpoints.hf.weight_mapper import HfWeightMapper +from tensorrt_llm._torch.models.modeling_utils import register_mapper +from tensorrt_llm._torch.modules.fused_moe.interface import MoE + + +@register_mapper("HF", "AfmoeForCausalLM") +class AfmoeHfWeightMapper(HfWeightMapper): + def __init__(self): + super().__init__() + + self.params_map = { + # MoE expert weights: gate_proj->w1, up_proj->w3, down_proj->w2 + r"(.*experts\.\d+\.)gate_proj(.*)": r"\1w1\2", + r"(.*experts\.\d+\.)up_proj(.*)": r"\1w3\2", + r"(.*experts\.\d+\.)down_proj(.*)": r"\1w2\2", + # HF router weight path -> TRT-LLM gate path + r"(.*)\.router\.gate\.(.*)": r"\1.gate.\2", + # expert_bias -> gate.e_score_correction_bias + r"(.*)\.mlp\.expert_bias(.*)": r"\1.mlp.gate.e_score_correction_bias\2", + } + + def preprocess_weights(self, weights: dict) -> dict: + weights = self.rename_by_params_map(self.params_map, weights) + weights = self._fuse_attention_gate(weights) + return weights + + def _fuse_attention_gate(self, weights: dict) -> dict: + """Fuse the separate attention ``gate_proj`` into ``q_proj``. + + AfmoeAttention uses ``attn_output_gate=True``, so the gate weights are + interleaved with the query weights per head and loaded through the fused + QKV projection. The HF checkpoint stores ``q_proj`` and ``gate_proj`` as + two separate matrices of shape ``[num_heads * head_dim, hidden]``; the + fused QKV projection expects the query slot laid out per head as + ``[head0_q, head0_gate, head1_q, head1_gate, ...]`` (see + ``Attention.forward`` where ``q_gate`` is viewed as + ``[..., num_heads, 2 * head_dim]`` and chunked into q/gate). + """ + marker = ".self_attn.gate_proj." + gate_keys = [k for k in weights if marker in k] + if not gate_keys: + return weights + + num_heads = self.model.config.num_attention_heads + for gate_key in gate_keys: + prefix, suffix = gate_key.split(marker) + q_key = f"{prefix}.self_attn.q_proj.{suffix}" + if q_key not in weights: + continue + weights[q_key] = self._interleave_per_head(weights[q_key], weights[gate_key], num_heads) + del weights[gate_key] + return weights + + @staticmethod + def _interleave_per_head(q: torch.Tensor, gate: torch.Tensor, num_heads: int) -> torch.Tensor: + """Interleave q and gate rows per head: ``[h0_q, h0_gate, h1_q, ...]``. + + Works for 2D weights ``[num_heads * per_head, hidden]`` as well as 1D + biases and FP8 block scales, since the split is always taken along the + leading (output) dimension. + """ + assert q.shape[0] % num_heads == 0, ( + f"q_proj rows {q.shape[0]} not divisible by num_heads {num_heads}" + ) + assert gate.shape == q.shape, f"gate_proj shape {gate.shape} != q_proj shape {q.shape}" + per_head = q.shape[0] // num_heads + tail = q.shape[1:] + q = q.reshape(num_heads, per_head, *tail) + gate = gate.reshape(num_heads, per_head, *tail) + fused = torch.stack([q, gate], dim=1) + return fused.reshape(num_heads * 2 * per_head, *tail).contiguous() + + def is_special_instance_module(self, module: nn.Module) -> bool: + return isinstance(module, MoE) + + def handle_special_instance_module( + self, + module: nn.Module, + module_name: str, + module_weights: dict, + allow_partial_loading: bool = False, + ) -> None: + if isinstance(module, MoE): + module.load_weights( + weights=[module_weights], + allow_partial_loading=allow_partial_loading, + ) diff --git a/tensorrt_llm/_torch/models/modeling_afmoe.py b/tensorrt_llm/_torch/models/modeling_afmoe.py new file mode 100644 index 000000000000..e11ad402409e --- /dev/null +++ b/tensorrt_llm/_torch/models/modeling_afmoe.py @@ -0,0 +1,465 @@ +# SPDX-FileCopyrightText: Copyright (c) 2022-2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. +# SPDX-License-Identifier: Apache-2.0 +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. + +"""Inference-only AFMoE (Arcee Foundation MoE) for TensorRT-LLM. + +Follows the HF implementation of AfmoeForCausalLM. + +Key architectural features: + - Per-layer attention type (sliding_attention vs global) + - Q/K RMSNorm in attention + - Gated attention output (sigmoid gate) + - RoPE only on local (sliding-window) attention layers + - Dense MLP for early layers, MoE with shared experts for later layers + - 4 layer norms per decoder block (pre/post attention, pre/post MLP) + - Optional muP embedding scaling +""" + +from typing import Optional + +import torch +from torch import nn +from transformers import PretrainedConfig +from transformers.models.auto.configuration_auto import CONFIG_MAPPING + +from tensorrt_llm.functional import PositionEmbeddingType + +from ...logger import logger +from ..attention_backend import AttentionMetadata +from ..attention_backend.interface import PositionalEmbeddingParams, RopeParams +from ..distributed import AllReduce +from ..model_config import ModelConfig +from ..modules.decoder_layer import DecoderLayer +from ..modules.embedding import Embedding +from ..modules.fused_moe import DeepSeekV3MoeRoutingMethod, create_moe +from ..modules.fused_moe.routing import Deepseekv3RoutingImpl +from ..modules.gated_mlp import GatedMLP +from ..modules.qk_norm_attention import QKNormRoPEAttention +from ..modules.rms_norm import RMSNorm +from ..utils import AuxStreamType +from .modeling_utils import DecoderModel, DecoderModelForCausalLM, register_auto_model + + +class AfmoeConfig(PretrainedConfig): + model_type = "afmoe" + + +if AfmoeConfig.model_type not in CONFIG_MAPPING: + logger.warning_once( + "transformers does not natively support 'AfmoeConfig'. " + "Registering AfmoeConfig so AutoConfig can load AFMoE checkpoints.", + key="AFMOE_REGISTER_WARNING", + ) + CONFIG_MAPPING.register(AfmoeConfig.model_type, AfmoeConfig, exist_ok=True) + + +def _validate_routing_config(config: PretrainedConfig) -> None: + """Validate that the routing config matches our Deepseekv3RoutingImpl assumptions.""" + score_func = getattr(config, "scoring_func", getattr(config, "score_func", "sigmoid")) + if score_func != "sigmoid": + raise ValueError( + f"AFMoE implementation uses sigmoid scoring via " + f"Deepseekv3RoutingImpl, but config has " + f"scoring_func={score_func!r}. Only 'sigmoid' is supported." + ) + + norm_topk = getattr(config, "norm_topk_prob", getattr(config, "route_norm", True)) + if not norm_topk: + raise ValueError( + "AFMoE implementation assumes normalized top-k probabilities " + "(norm_topk_prob=True / route_norm=True), but config disables it." + ) + + +class AfmoeGate(nn.Module): + """Router gate for AFMoE, following the DeepSeekV3 grouped top-k pattern.""" + + def __init__( + self, + hidden_size: int, + num_experts: int, + top_k: int, + n_group: int, + topk_group: int, + route_scale: float, + dtype: Optional[torch.dtype] = None, + ): + super().__init__() + self.weight = nn.Parameter( + torch.empty((num_experts, hidden_size), dtype=dtype), + requires_grad=False, + ) + self.e_score_correction_bias = nn.Parameter( + torch.empty(num_experts, dtype=torch.float32), + requires_grad=False, + ) + self.routing_impl = Deepseekv3RoutingImpl( + top_k=top_k, + n_group=n_group, + topk_group=topk_group, + routed_scaling_factor=route_scale, + is_fused=True, + ) + + def forward(self, hidden_states: torch.Tensor) -> torch.Tensor: + logits = torch.ops.trtllm.dsv3_router_gemm_op( + hidden_states, + self.weight.t(), + bias=None, + out_dtype=torch.float32, + ) + return logits + + def load_weights(self, weights: list[dict]): + assert len(weights) == 1 + self.weight.copy_(weights[0]["weight"][:]) + self.e_score_correction_bias.copy_( + weights[0]["e_score_correction_bias"][:].to(self.e_score_correction_bias.dtype) + ) + + @property + def routing_method(self) -> DeepSeekV3MoeRoutingMethod: + return DeepSeekV3MoeRoutingMethod( + top_k=self.routing_impl.top_k, + n_group=self.routing_impl.n_group, + topk_group=self.routing_impl.topk_group, + routed_scaling_factor=self.routing_impl.routed_scaling_factor, + is_fused=self.routing_impl.is_fused, + callable_e_score_correction_bias=lambda: self.e_score_correction_bias, + ) + + +class AfmoeMoE(nn.Module): + """MoE layer with shared experts for AFMoE. + + Both routed experts and shared experts produce TP-partial results + (reduce_results=False / reduce_output=False). After summing them + we perform a single AllReduce so that each rank holds the full + hidden-state, matching the DeepSeekV3 MoE pattern. + """ + + def __init__( + self, + model_config: ModelConfig[PretrainedConfig], + aux_stream: torch.cuda.Stream, + layer_idx: Optional[int] = None, + ): + super().__init__() + config = model_config.pretrained_config + + self.hidden_dim = config.hidden_size + self.num_experts = config.num_experts + self.top_k = config.num_experts_per_tok + self.num_shared_experts = getattr(config, "num_shared_experts", 0) + self.enable_attention_dp = model_config.mapping.enable_attention_dp + + self.gate = AfmoeGate( + hidden_size=self.hidden_dim, + num_experts=self.num_experts, + top_k=self.top_k, + n_group=config.n_group, + topk_group=config.topk_group, + route_scale=getattr(config, "route_scale", 1.0), + dtype=config.torch_dtype, + ) + + self.experts = create_moe( + num_experts=self.num_experts, + routing_method=self.gate.routing_method, + hidden_size=self.hidden_dim, + intermediate_size=config.moe_intermediate_size, + aux_stream_dict={AuxStreamType.MoeChunkingOverlap: aux_stream}, + dtype=config.torch_dtype, + reduce_results=False, + model_config=model_config, + layer_idx=layer_idx, + ) + + if self.num_shared_experts > 0: + shared_intermediate = config.moe_intermediate_size * self.num_shared_experts + self.shared_experts = GatedMLP( + hidden_size=self.hidden_dim, + intermediate_size=shared_intermediate, + bias=False, + dtype=config.torch_dtype, + config=model_config, + overridden_tp_size=1 if self.enable_attention_dp else None, + reduce_output=False, + layer_idx=layer_idx, + ) + else: + self.shared_experts = None + + self.mapping = model_config.mapping + + self.allreduce = None + if not self.enable_attention_dp and self.mapping.tp_size > 1: + self.allreduce = AllReduce( + mapping=model_config.mapping, + strategy=model_config.allreduce_strategy, + ) + + def forward( + self, + hidden_states: torch.Tensor, + attn_metadata: AttentionMetadata, + ) -> torch.Tensor: + all_rank_num_tokens = attn_metadata.all_rank_num_tokens + router_logits = self.gate(hidden_states) + + routed_output = self.experts( + hidden_states, + router_logits, + all_rank_num_tokens=all_rank_num_tokens, + use_dp_padding=False, + ) + + if self.shared_experts is not None: + shared_output = self.shared_experts(hidden_states) + final_output = shared_output.add_(routed_output) + else: + final_output = routed_output + + if self.allreduce is not None: + final_output = self.allreduce(final_output) + + return final_output + + +class AfmoeAttention(QKNormRoPEAttention): + """Attention with Q/K norm, per-layer sliding window, and a sigmoid output gate. + + Inherits QK-norm + RoPE handling from ``QKNormRoPEAttention``. The output + gate is fused into the QKV projection (``attn_output_gate=True``), and RoPE + is applied only on local (sliding-window) layers, matching the HF + ``AfmoeAttention`` reference. + """ + + def __init__( + self, + model_config: ModelConfig[PretrainedConfig], + layer_idx: Optional[int] = None, + ): + config = model_config.pretrained_config + layer_types = getattr(config, "layer_types", []) + self.is_local_attention = ( + layer_idx is not None + and layer_idx < len(layer_types) + and layer_types[layer_idx] == "sliding_attention" + ) + self.attention_window_size = config.sliding_window if self.is_local_attention else None + + pos_embd_params = None + if self.is_local_attention: + pos_embd_params = PositionalEmbeddingParams( + type=PositionEmbeddingType.rope_gpt_neox, + rope=RopeParams.from_config(config), + ) + + super().__init__( + hidden_size=config.hidden_size, + num_attention_heads=config.num_attention_heads, + num_key_value_heads=config.num_key_value_heads, + max_position_embeddings=getattr(config, "max_position_embeddings", 131072), + bias=False, + pos_embd_params=pos_embd_params, + fuse_qk_norm_rope=False, + skip_rope=not self.is_local_attention, + attn_output_gate=True, + is_qk_norm=True, + layer_idx=layer_idx, + dtype=config.torch_dtype, + config=model_config, + ) + + def forward( + self, + position_ids: torch.IntTensor, + hidden_states: torch.Tensor, + attn_metadata: AttentionMetadata, + **kwargs, + ) -> torch.Tensor: + return super().forward( + position_ids=position_ids, + hidden_states=hidden_states, + attn_metadata=attn_metadata, + attention_window_size=self.attention_window_size, + **kwargs, + ) + + +class AfmoeDecoderLayer(DecoderLayer): + def __init__( + self, + model_config: ModelConfig[PretrainedConfig], + layer_idx: int, + aux_stream: torch.cuda.Stream, + ): + super().__init__() + config = model_config.pretrained_config + self.hidden_size = config.hidden_size + self.layer_idx = layer_idx + + self.self_attn = AfmoeAttention(model_config, layer_idx=layer_idx) + + num_dense_layers = getattr(config, "num_dense_layers", 0) + self.moe_enabled = layer_idx >= num_dense_layers + if self.moe_enabled: + self.mlp = AfmoeMoE(model_config, aux_stream, layer_idx=layer_idx) + else: + self.mlp = GatedMLP( + hidden_size=config.hidden_size, + intermediate_size=config.intermediate_size, + bias=False, + dtype=config.torch_dtype, + config=model_config, + overridden_tp_size=1 if model_config.mapping.enable_attention_dp else None, + layer_idx=layer_idx, + ) + + self.input_layernorm = RMSNorm( + hidden_size=config.hidden_size, + eps=config.rms_norm_eps, + dtype=config.torch_dtype, + ) + self.post_attention_layernorm = RMSNorm( + hidden_size=config.hidden_size, + eps=config.rms_norm_eps, + dtype=config.torch_dtype, + ) + self.pre_mlp_layernorm = RMSNorm( + hidden_size=config.hidden_size, + eps=config.rms_norm_eps, + dtype=config.torch_dtype, + ) + self.post_mlp_layernorm = RMSNorm( + hidden_size=config.hidden_size, + eps=config.rms_norm_eps, + dtype=config.torch_dtype, + ) + + def forward( + self, + position_ids: torch.IntTensor, + hidden_states: torch.Tensor, + attn_metadata: AttentionMetadata, + residual: Optional[torch.Tensor], + **kwargs, + ) -> torch.Tensor: + if residual is None: + residual = hidden_states + hidden_states = self.input_layernorm(hidden_states) + else: + hidden_states, residual = self.input_layernorm(hidden_states, residual) + + hidden_states = self.self_attn( + position_ids=position_ids, + hidden_states=hidden_states, + attn_metadata=attn_metadata, + **kwargs, + ) + hidden_states = self.post_attention_layernorm(hidden_states) + + hidden_states, residual = self.pre_mlp_layernorm(hidden_states, residual) + + if self.moe_enabled: + hidden_states = self.mlp(hidden_states, attn_metadata) + else: + hidden_states = self.mlp(hidden_states) + + hidden_states = self.post_mlp_layernorm(hidden_states) + + return hidden_states, residual + + +class AfmoeModel(DecoderModel): + def __init__(self, model_config: ModelConfig[PretrainedConfig]): + super().__init__(model_config) + config = model_config.pretrained_config + _validate_routing_config(config) + + self.vocab_size = config.vocab_size + self.mup_enabled = getattr(config, "mup_enabled", False) + self.hidden_size = config.hidden_size + self.aux_stream = torch.cuda.Stream() + + self.embed_tokens = Embedding( + config.vocab_size, + config.hidden_size, + dtype=config.torch_dtype, + enable_torch_compile_for_embedding=model_config.enable_torch_compile_for_embedding, + ) + + self.layers = nn.ModuleList( + [ + AfmoeDecoderLayer(model_config, layer_idx, self.aux_stream) + for layer_idx in range(config.num_hidden_layers) + ] + ) + self.norm = RMSNorm( + hidden_size=config.hidden_size, + eps=config.rms_norm_eps, + dtype=config.torch_dtype, + ) + + def forward( + self, + attn_metadata: AttentionMetadata, + input_ids: Optional[torch.IntTensor] = None, + position_ids: Optional[torch.IntTensor] = None, + inputs_embeds: Optional[torch.FloatTensor] = None, + **kwargs, + ) -> torch.Tensor: + if (input_ids is None) ^ (inputs_embeds is not None): + raise ValueError( + "You cannot specify both input_ids and inputs_embeds at " + "the same time, and must specify either one" + ) + + if inputs_embeds is None: + inputs_embeds = self.embed_tokens(input_ids) + + if self.mup_enabled: + inputs_embeds = inputs_embeds * (self.hidden_size**0.5) + + hidden_states = inputs_embeds + + residual = None + for decoder_layer in self.layers: + hidden_states, residual = decoder_layer( + position_ids=position_ids, + hidden_states=hidden_states, + attn_metadata=attn_metadata, + residual=residual, + **kwargs, + ) + + hidden_states, _ = self.norm(hidden_states, residual) + return hidden_states + + +@register_auto_model("AfmoeForCausalLM") +class AfmoeForCausalLM(DecoderModelForCausalLM[AfmoeModel, PretrainedConfig]): + def __init__(self, model_config: ModelConfig[PretrainedConfig]): + super().__init__( + AfmoeModel(model_config), + config=model_config, + hidden_size=model_config.pretrained_config.hidden_size, + vocab_size=model_config.pretrained_config.vocab_size, + ) + + def load_weights(self, weights: dict, weight_mapper, **kwargs): + weights = weight_mapper.preprocess_weights(weights) + super().load_weights(weights=weights, weight_mapper=weight_mapper, **kwargs) diff --git a/tensorrt_llm/_torch/models/modeling_deepseekv3.py b/tensorrt_llm/_torch/models/modeling_deepseekv3.py index accb27ef310a..6e2b4b532f49 100755 --- a/tensorrt_llm/_torch/models/modeling_deepseekv3.py +++ b/tensorrt_llm/_torch/models/modeling_deepseekv3.py @@ -340,7 +340,7 @@ def split_kv_b_proj(kv_b_proj: torch.Tensor, # preserved as `_ckpt_num_nextn_predict_layers`. ckpt_num_nextn_predict_layers = ( getattr(self.config, '_ckpt_num_nextn_predict_layers', None) - or self.config.num_nextn_predict_layers) + or getattr(self.config, 'num_nextn_predict_layers', None)) def detect_shared_mtp_weights() -> bool: # Detect if MTP layers share checkpoint weights (model has more MTP @@ -348,7 +348,8 @@ def detect_shared_mtp_weights() -> bool: # multiple model MTP layers map to the same checkpoint layer via # modulo, and mark_consumed must be skipped to avoid deleting # weights that later MTP layers still need. - model_nextn = self.config.num_nextn_predict_layers or 0 + model_nextn = getattr(self.config, 'num_nextn_predict_layers', + None) or 0 return model_nextn > (ckpt_num_nextn_predict_layers or 0) > 0 has_shared_mtp_weights = detect_shared_mtp_weights() diff --git a/tensorrt_llm/_torch/models/modeling_exaone4_5.py b/tensorrt_llm/_torch/models/modeling_exaone4_5.py index 1506c4fce23e..a617f7c5d34c 100644 --- a/tensorrt_llm/_torch/models/modeling_exaone4_5.py +++ b/tensorrt_llm/_torch/models/modeling_exaone4_5.py @@ -9,7 +9,7 @@ from transformers.models.auto import CONFIG_MAPPING from tensorrt_llm._torch.models.checkpoints.base_weight_mapper import BaseWeightMapper -from tensorrt_llm._torch.models.modeling_multimodal_utils import _is_disagg +from tensorrt_llm._torch.models.modeling_multimodal_utils import _is_mm_disagg from ...inputs import ( ContentFormat, @@ -198,7 +198,7 @@ def __init__( llm_model_config.pretrained_config = llm_model_config.pretrained_config.text_config self.llm = AutoModelForCausalLM.from_config(llm_model_config) - if not _is_disagg(): + if not _is_mm_disagg(): mm_encoder_config = copy.deepcopy(model_config) self.mm_encoder = Exaone4_5_VisionModel(mm_encoder_config, Qwen2_5_VisionModel) else: @@ -231,7 +231,7 @@ def forward( mm_multimodal_params = self._get_requests_with_mm_data(multimodal_params) if len(mm_multimodal_params) > 0: - if not _is_disagg(): + if not _is_mm_disagg(): mm_embeds = get_multimodal_embeddings( encoder_forward_fn=self.mm_encoder.forward, multimodal_params=mm_multimodal_params, @@ -262,6 +262,6 @@ def forward( def load_weights(self, weights, weight_mapper: BaseWeightMapper): assert isinstance(weight_mapper, Exaone4_5HfWeightMapper) weights = weight_mapper.preprocess_weights(weights) - if not _is_disagg(): + if not _is_mm_disagg(): self.mm_encoder.load_weights(weights) self.llm.load_weights(weights, weight_mapper) diff --git a/tensorrt_llm/_torch/models/modeling_exaone_moe.py b/tensorrt_llm/_torch/models/modeling_exaone_moe.py index ba8577da9613..9df138259b57 100644 --- a/tensorrt_llm/_torch/models/modeling_exaone_moe.py +++ b/tensorrt_llm/_torch/models/modeling_exaone_moe.py @@ -1,18 +1,3 @@ -# SPDX-FileCopyrightText: Copyright (c) 2022-2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. -# SPDX-License-Identifier: Apache-2.0 -# -# Licensed under the Apache License, Version 2.0 (the "License"); -# you may not use this file except in compliance with the License. -# You may obtain a copy of the License at -# -# http://www.apache.org/licenses/LICENSE-2.0 -# -# Unless required by applicable law or agreed to in writing, software -# distributed under the License is distributed on an "AS IS" BASIS, -# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -# See the License for the specific language governing permissions and -# limitations under the License. - import math import os from typing import Dict, List, Optional, Tuple diff --git a/tensorrt_llm/_torch/models/modeling_gemma3vl.py b/tensorrt_llm/_torch/models/modeling_gemma3vl.py index 5f327c82c026..58303b01e5ae 100644 --- a/tensorrt_llm/_torch/models/modeling_gemma3vl.py +++ b/tensorrt_llm/_torch/models/modeling_gemma3vl.py @@ -1,6 +1,5 @@ import copy import dataclasses -import os from typing import List, Optional, Tuple import torch @@ -23,17 +22,11 @@ from ..modules.linear import Linear from ..modules.rms_norm import RMSNorm from .modeling_gemma3 import Gemma3ForCausalLM -from .modeling_multimodal_utils import fuse_input_embeds +from .modeling_multimodal_utils import (_MULTIMODAL_ENV_NAME, _is_mm_disagg, + fuse_input_embeds) from .modeling_siglip import SiglipVisionModel from .modeling_utils import ModelConfig, filter_weights, register_auto_model -_MULTIMODAL_ENV_NAME = "TLLM_MULTIMODAL_DISAGGREGATED" - - -# Make this a runtime lookup rather than a module-wide constant for easier unit testing. -def _is_disagg() -> bool: - return os.getenv(_MULTIMODAL_ENV_NAME, "0") == "1" - class Gemma3InputProcessor(BaseMultimodalInputProcessor, BaseMultimodalDummyInputsBuilder): @@ -185,7 +178,7 @@ def forward(self, vision_outputs: torch.Tensor): class Gemma3VLM(PreTrainedModel): def __init__(self, model_config: ModelConfig[Gemma3Config]): - if _is_disagg(): + if _is_mm_disagg(): raise NotImplementedError( "Gemma3VLM does not support disaggregated inference yet. Please unset " f"the {_MULTIMODAL_ENV_NAME} environment variable, or set it to '0'." diff --git a/tensorrt_llm/_torch/models/modeling_gemma4mm.py b/tensorrt_llm/_torch/models/modeling_gemma4mm.py index 66ef1b03cfcc..38e33d11069a 100644 --- a/tensorrt_llm/_torch/models/modeling_gemma4mm.py +++ b/tensorrt_llm/_torch/models/modeling_gemma4mm.py @@ -23,7 +23,6 @@ import copy import dataclasses import math -import os from typing import Dict, List, Optional, Tuple import torch @@ -51,7 +50,12 @@ from .modeling_gemma4 import Gemma4ForCausalLM from .modeling_gemma4_audio import Gemma4AudioModel from .modeling_gemma4_vision import Gemma4VisionModel -from .modeling_multimodal_utils import find_input_mm_embeds, fuse_input_embeds +from .modeling_multimodal_utils import ( + _MULTIMODAL_ENV_NAME, + _is_mm_disagg, + find_input_mm_embeds, + fuse_input_embeds, +) from .modeling_utils import ModelConfig, filter_weights, register_auto_model _MIN_TRANSFORMERS_FOR_GEMMA4 = "5.5.0" @@ -69,12 +73,6 @@ PreTrainedModel, ) -_MULTIMODAL_ENV_NAME = "TLLM_MULTIMODAL_DISAGGREGATED" - - -def _is_disagg() -> bool: - return os.getenv(_MULTIMODAL_ENV_NAME, "0") == "1" - class RMSNormNoScale(nn.Module): """RMSNorm without learnable scale (for multimodal embedder pre-projection).""" @@ -602,7 +600,7 @@ def _check_and_adjust_experts_implementation(self, *args, **kwargs): return None def __init__(self, model_config: ModelConfig[Gemma4Config]): - if _is_disagg(): + if _is_mm_disagg(): raise NotImplementedError( "Gemma4ForConditionalGeneration does not support " "disaggregated inference yet. Please unset the " diff --git a/tensorrt_llm/_torch/models/modeling_kimi_k25.py b/tensorrt_llm/_torch/models/modeling_kimi_k25.py index d130210376ba..7a85d98ce27f 100644 --- a/tensorrt_llm/_torch/models/modeling_kimi_k25.py +++ b/tensorrt_llm/_torch/models/modeling_kimi_k25.py @@ -49,7 +49,7 @@ PreTrainedTokenizerBase, ) -from tensorrt_llm.inputs.multimodal import MultimodalParams +from tensorrt_llm.inputs.multimodal import DisaggPrefillMultimodalInputs, MultimodalParams from tensorrt_llm.mapping import Mapping from ..._utils import prefer_pinned @@ -291,23 +291,6 @@ def _frames_to_chunks( # Default vocabulary size for K2.5 _VOCAB_SIZE = 163840 -# K2.5 special token markers that the transformers 5.5.x Rust fast tokenizer -# BPE-splits instead of mapping to canonical IDs. When any of these appear in -# a prompt, we must route tokenization through the slow ``TikTokenTokenizer``. -# Pure text (no markers and no multimodal data) keeps the fast tokenizer. -# See NVBug 6182617 (correctness) and NVBug 6248987 (perf). -_K25_SPECIAL_TOKEN_MARKERS = ( - "<|media_begin|>", - "<|media_content|>", - "<|media_pad|>", - "<|media_end|>", - "<|im_user|>", - "<|im_assistant|>", - "<|im_system|>", - "<|im_end|>", - "<|im_middle|>", -) - # --------------------------------------------------------------------------- # Native MoonViT3d Vision Encoder Components @@ -1069,16 +1052,6 @@ def __init__( config, "media_placeholder_token_id", _MEDIA_PLACEHOLDER_TOKEN_ID ) - # transformers 5.5.x ``AutoTokenizer`` may route K2.5 to the Rust - # fast backend, which BPE-splits ``<|media_pad|>`` / ``<|im_user|>`` - # / etc. instead of mapping them to their canonical IDs. The slow - # ``TikTokenTokenizer`` preserves them. Swap is deferred until we - # actually see an input that needs it (multimodal data or a K2.5 - # special token marker in the prompt) — the text-only thinking - # path keeps the fast tokenizer to avoid a GIL-bound 9x TPOT - # regression. See NVBug 6182617 (correctness) / 6248987 (perf). - self._slow_tokenizer_active = False - @property def config(self) -> PretrainedConfig: return self._config @@ -1195,51 +1168,6 @@ def get_num_tokens_per_video(self, *, video: List, **kwargs) -> int: total_tokens += self.get_num_tokens_per_image(image=chunk[0]) return total_tokens - @staticmethod - def _input_needs_slow_tokenizer(text: Optional[str]) -> bool: - """Return True iff ``text`` contains any K2.5 special token marker - that the Rust fast tokenizer would BPE-split incorrectly.""" - if not text: - return False - return any(marker in text for marker in _K25_SPECIAL_TOKEN_MARKERS) - - def _ensure_k25_slow_tokenizer(self) -> None: - """Override ``self._tokenizer`` and ``self._processor.tokenizer`` - with the model's slow ``TikTokenTokenizer``. - - Idempotent: callers invoke this lazily, on the first request that - actually requires correct mapping of K2.5 special tokens. Done this - way (instead of unconditionally in ``__init__``) so text-only - prompts keep the fast Rust tokenizer — running the slow Python - ``TikTokenTokenizer`` on the orchestrator GIL adds ~100 ms per - ``_fetch_new_requests`` / ``broadcast_requests`` step at 8 K-token - prompts, an order-of-magnitude TPOT regression. The slow class' - ``tokens_trie`` always splits the special tokens correctly. - See NVBug 6182617 (correctness) and NVBug 6248987 (perf). - """ - if self._slow_tokenizer_active: - return - from transformers.dynamic_module_utils import get_class_from_dynamic_module - - slow_cls = get_class_from_dynamic_module( - "tokenization_kimi.TikTokenTokenizer", - self._model_path, - ) - slow_tok = slow_cls.from_pretrained(self._model_path, trust_remote_code=True) - - logger.info( - "K2.5 InputProcessor swapping in slow TikTokenTokenizer " - "(originally %s). See NVBug 6182617.", - type(self._tokenizer).__name__, - ) - - self._tokenizer = slow_tok - # Image-only path uses ``self._processor.tokenizer`` (an - # independent instance from ``AutoProcessor``); swap it too. - if getattr(self._processor, "tokenizer", None) is not None: - self._processor.tokenizer = slow_tok - self._slow_tokenizer_active = True - @torch.inference_mode() def call_with_text_prompt( self, @@ -1271,18 +1199,9 @@ def call_with_text_prompt( # Text-only path if not images and not videos: - # Fast tokenizer is fine unless the prompt itself carries K2.5 - # special tokens (rare on the thinking perf path); only fall - # back to the slow ``TikTokenTokenizer`` then. See NVBug 6248987. - if self._input_needs_slow_tokenizer(text_prompt): - self._ensure_k25_slow_tokenizer() token_ids = self._tokenizer(text_prompt, return_tensors="pt").input_ids[0] return token_ids.to(torch.int32).tolist(), {} - # Multimodal path: prompt is rewritten with media placeholders that - # the fast tokenizer would BPE-split, so we always need the slow one. - self._ensure_k25_slow_tokenizer() - # Build the ``medias`` list expected by KimiK25Processor. # The HF processor accepts either ``messages`` (chat format) or # both ``medias`` and ``text``. Since we already have the @@ -1492,12 +1411,12 @@ def call_with_text_prompt( "multimodal_data": multimodal_data, } - def get_prompt_token_ids( + def build_disagg_prefill_multimodal_inputs( self, inputs: TextPrompt, mm_handles: List[Dict[str, Any]], - ) -> Tuple[List[int], List[int], List[int]]: - """Build token IDs with multimodal placeholders expanded for disaggregated serving. + ) -> DisaggPrefillMultimodalInputs: + """Build disaggregated prefill inputs from multimodal embedding handles. Args: inputs: Text prompt input container. @@ -1505,7 +1424,9 @@ def get_prompt_token_ids( context phase, each containing ``tensor_size``. Returns: - Tuple of (expanded_ids, mm_token_lengths, mm_token_offsets). + DisaggPrefillMultimodalInputs containing expanded token IDs, + prompt-side MM positions/lengths, exact runs, and encoder-output + embedding lengths. """ text_prompt = inputs.get("prompt") if not text_prompt: @@ -1521,9 +1442,6 @@ def get_prompt_token_ids( f"must match model hidden size {expected_hidden_size}" ) - # Disagg-serving multimodal path: prompt has media placeholders that - # must map to canonical IDs, so the slow tokenizer is required. - self._ensure_k25_slow_tokenizer() input_ids = self._tokenizer(text_prompt, return_tensors="pt").input_ids[0] placeholder_id = self._media_placeholder_token_id @@ -1556,7 +1474,15 @@ def get_prompt_token_ids( expanded_ids[write_pos] = input_ids[read_pos] write_pos += 1 - return (expanded_ids.to(torch.int32).tolist(), mm_token_length, mm_token_offsets) + return DisaggPrefillMultimodalInputs( + prompt_token_ids=expanded_ids.to(torch.int32).tolist(), + multimodal_lengths=mm_token_length, + multimodal_positions=mm_token_offsets, + multimodal_embedding_lengths=[mm_handle["tensor_size"][0] for mm_handle in mm_handles], + multimodal_item_run_cu_offsets=list(range(len(mm_token_length) + 1)), + multimodal_run_positions=mm_token_offsets, + multimodal_run_lengths=mm_token_length, + ) # --------------------------------------------------------------------------- diff --git a/tensorrt_llm/_torch/models/modeling_laguna.py b/tensorrt_llm/_torch/models/modeling_laguna.py index 6d48944a3170..fbfe7abc323f 100644 --- a/tensorrt_llm/_torch/models/modeling_laguna.py +++ b/tensorrt_llm/_torch/models/modeling_laguna.py @@ -21,7 +21,6 @@ from torch import nn from transformers import PretrainedConfig -from tensorrt_llm._utils import get_sm_version from tensorrt_llm.functional import PositionEmbeddingType, RotaryScalingType from ..attention_backend import AttentionMetadata @@ -248,12 +247,6 @@ def __init__( self._use_gating = bool(gating) self._gate_per_head = gating == "per-head" or gating is True - # Temporary workaround: Hopper fails without unfused RoPE for Laguna - # While Blackwell has issues when RoPE is unfused. - # This check is to unblock Blackwell on main while we find proper fixes - # https://nvbugs/6211185 - rope_fusion = get_sm_version() in (100, 103) - # fuse_qk_norm_rope=False is required: the fused kernel reads # partial_rotary_factor and yarn params from pretrained_config # globally, ignoring per-layer RopeParams. Laguna has different @@ -266,7 +259,6 @@ def __init__( bias=getattr(config, "qkv_bias", False) or getattr(config, "attention_bias", False), pos_embd_params=pos_embd_params, fuse_qk_norm_rope=False, - rope_fusion=rope_fusion, layer_idx=layer_idx, dtype=config.torch_dtype, dense_bias=False, diff --git a/tensorrt_llm/_torch/models/modeling_llava_next.py b/tensorrt_llm/_torch/models/modeling_llava_next.py index 910bc3c82a18..5b09b28a577c 100644 --- a/tensorrt_llm/_torch/models/modeling_llava_next.py +++ b/tensorrt_llm/_torch/models/modeling_llava_next.py @@ -1,5 +1,4 @@ import copy -import os from typing import Any, ClassVar, Dict, List, Optional, Tuple, Union import numpy as np @@ -15,7 +14,9 @@ BaseWeightMapper from tensorrt_llm._torch.models.checkpoints.hf.llava_next_weight_mapper import \ LlavaNextHfWeightMapper -from tensorrt_llm.inputs.multimodal import MultimodalParams +from tensorrt_llm._torch.models.modeling_multimodal_utils import _is_mm_disagg +from tensorrt_llm.inputs.multimodal import (DisaggPrefillMultimodalInputs, + MultimodalParams) from ...inputs import (BaseMultimodalDummyInputsBuilder, BaseMultimodalInputProcessor, ContentFormat, @@ -29,11 +30,10 @@ from .modeling_auto import AutoModelForCausalLM from .modeling_clip import CLIPVisionModel from .modeling_multimodal_utils import (find_input_mm_embeds, fuse_input_embeds, + get_attached_multimodal_embeddings, get_multimodal_embeddings) from .modeling_utils import register_auto_model, register_vision_encoder -DISAGG = os.getenv('TLLM_MULTIMODAL_DISAGGREGATED', '0') == '1' - class LlavaNextInputProcessor(BaseMultimodalInputProcessor, BaseMultimodalDummyInputsBuilder): @@ -111,7 +111,8 @@ def _expand_image_placeholders_in_token_ids( num_mm_tokens_per_placeholder: List[int], ) -> Tuple[List[int], List[int], List[int]]: """ - Shared logic (called by expand_prompt_token_ids_for_mm and get_prompt_token_ids): + Shared logic (called by expand_prompt_token_ids_for_mm and + build_disagg_prefill_multimodal_inputs): replace each image placeholder token in prompt_token_ids with placeholder_id repeated num_mm_tokens_per_placeholder[i] times. @@ -268,12 +269,11 @@ def _postprocess( mm_features = mm_features.view(-1, mm_features.shape[-1]) return fused_input_ids, mm_features - def get_prompt_token_ids( - self, inputs: Union[TextPrompt, TokensPrompt], - mm_handles: List[Dict[str, - Any]]) -> Tuple[List[int], List[int], List[int]]: + def build_disagg_prefill_multimodal_inputs( + self, inputs: Union[TextPrompt, TokensPrompt], + mm_handles: List[Dict[str, Any]]) -> DisaggPrefillMultimodalInputs: """ - Build input token ids with multimodal placeholders expanded to the number of MM tokens. + Build disaggregated prefill inputs from multimodal embedding handles. Uses an already tokenized prompt or tokenizes the txt prompt first. @@ -282,10 +282,9 @@ def get_prompt_token_ids( mm_handles: List of multimodal embedding handles. Returns: - Tuple[List[int], List[int], List[int]]: - - expanded_ids: token ids with each image token expanded to a placeholder repeated per MM token - - mm_token_length: per-image MM token lengths - - mm_token_offsets: start offsets (positions) for each image's MM tokens within expanded_ids + DisaggPrefillMultimodalInputs containing expanded token IDs, + prompt-side MM positions/lengths, exact runs, and encoder-output + embedding lengths. """ # TODO: Move this function to the base input processor class when extending for more models text_prompt = inputs.get("prompt") @@ -327,7 +326,18 @@ def get_prompt_token_ids( f"({mm_token_length[-1] + mm_token_offsets[-1]}) should be less " f"than or equal to final_length ({final_length})") - return expanded_ids, mm_token_length, mm_token_offsets + return DisaggPrefillMultimodalInputs( + prompt_token_ids=expanded_ids, + multimodal_lengths=mm_token_length, + multimodal_positions=mm_token_offsets, + multimodal_embedding_lengths=[ + mm_handle["tensor_size"][0] for mm_handle in mm_handles + ], + multimodal_item_run_cu_offsets=list(range(len(mm_token_length) + + 1)), + multimodal_run_positions=mm_token_offsets, + multimodal_run_lengths=mm_token_length, + ) def _attach_multimodal_embeddings_impl( self, inputs: TextPrompt, @@ -619,7 +629,7 @@ def __init__(self, model_config: ModelConfig[PretrainedConfig], *args, super().__init__(config) if hasattr(self, "llm"): return - if not DISAGG: + if not _is_mm_disagg(): self.mm_encoder = LlavaNextVisionModel(model_config) else: self.mm_encoder = None @@ -694,15 +704,14 @@ def forward( multimodal_params = kwargs.get("multimodal_params", []) mm_embeds = [] if len(multimodal_params) > 0: - if not DISAGG: + if self.mm_encoder is not None: mm_embeds = get_multimodal_embeddings( encoder_forward_fn=self.mm_encoder.forward, multimodal_params=multimodal_params[:num_context_requests]) else: - raise NotImplementedError( - "LlavaNextModel does not support disaggregated inference yet. Please unset " - f"the TLLM_MULTIMODAL_DISAGGREGATED environment variable, or set it to '0'." - ) + # E/P prefill: encoder already ran; use attached embeddings. + mm_embeds = get_attached_multimodal_embeddings( + multimodal_params[:num_context_requests]) mm_embeds = find_input_mm_embeds( mm_embeds, multimodal_params[:num_context_requests]) input_ids, inputs_embeds = fuse_input_embeds( diff --git a/tensorrt_llm/_torch/models/modeling_mistral.py b/tensorrt_llm/_torch/models/modeling_mistral.py index 7de6f2523d5f..7391920cf41c 100644 --- a/tensorrt_llm/_torch/models/modeling_mistral.py +++ b/tensorrt_llm/_torch/models/modeling_mistral.py @@ -25,7 +25,7 @@ from tensorrt_llm._torch.models.modeling_multimodal_mixin import ( MultimodalEncoderOutput, MultimodalModelMixin, PreparedLlmInputs) from tensorrt_llm._torch.models.modeling_multimodal_utils import ( - _MULTIMODAL_ENV_NAME, _is_disagg) + _MULTIMODAL_ENV_NAME, _is_mm_disagg) from tensorrt_llm._torch.models.modeling_utils import (DecoderModel, DecoderModelForCausalLM, _load_weights_impl, @@ -567,7 +567,8 @@ def __init__( self, model_config: ModelConfig[Mistral3Config], ): - if _is_disagg(): + # No MM E/P handoff here yet. Fail before partial model setup. + if _is_mm_disagg(): raise NotImplementedError( "Mistral3VLM does not support disaggregated inference yet. Please unset " f"the {_MULTIMODAL_ENV_NAME} environment variable, or set it to '0'." diff --git a/tensorrt_llm/_torch/models/modeling_multimodal_utils.py b/tensorrt_llm/_torch/models/modeling_multimodal_utils.py index 5615f33c1ec2..81d35a6132b9 100644 --- a/tensorrt_llm/_torch/models/modeling_multimodal_utils.py +++ b/tensorrt_llm/_torch/models/modeling_multimodal_utils.py @@ -35,10 +35,18 @@ # Make this a runtime lookup rather than a module-wide constant for easier unit testing. -def _is_disagg() -> bool: +# MM E/P split flag. Not generic disaggregated serving. +def _is_mm_disagg() -> bool: return os.getenv(_MULTIMODAL_ENV_NAME, "0") == "1" +def has_raw_multimodal_payload(param: MultimodalParams) -> bool: + multimodal_data = param.multimodal_data or {} + modality_type = multimodal_data.get("modality_type") + return (modality_type in ("image", "video", "audio") + and multimodal_data.get(modality_type) is not None) + + # Processor *output* keys that transformers 5.x's # ``ProcessorMixin._merge_kwargs`` strictly rejects when they leak into # ``output_kwargs[]`` and reach ``validate_typed_dict``. They @@ -270,6 +278,34 @@ def get_multimodal_embeddings( return [all_embeddings] +def get_attached_multimodal_embeddings( + multimodal_params: List[MultimodalParams]) -> List[torch.Tensor]: + """Gather embeddings already stored on MultimodalParams. + + Use this on E/P prefill workers and cached-only paths. The encoder already + ran somewhere else. This only makes the tensor list that + find_input_mm_embeds slices. + """ + attached_embeddings = [] + for param in multimodal_params: + embeds = param.multimodal_data.get("multimodal_embedding") + # No attached embedding for this request. + if embeds is None: + continue + # Some paths stash chunks. Slicer expects one tensor. + if isinstance(embeds, list): + embeds = torch.cat(embeds, dim=0) + param.multimodal_data["multimodal_embedding"] = embeds + if not isinstance(embeds, torch.Tensor): + raise TypeError("multimodal_embedding must be a torch.Tensor") + attached_embeddings.append(embeds) + + if not attached_embeddings: + return [] + # Match get_multimodal_embeddings output: one concatenated tensor. + return [torch.cat(attached_embeddings, dim=0)] + + def find_input_mm_embeds( mm_embeds: List[torch.Tensor], multimodal_params: List[MultimodalParams]) -> List[torch.Tensor]: @@ -291,10 +327,15 @@ def find_input_mm_embeds( Note: - Supports both individual batching (len(mm_embeds) == len(multimodal_params)) and pre-concatenated batching (len(mm_embeds) == 1) + - Call get_attached_multimodal_embeddings before this helper when + embeddings are already attached to multimodal_params. - Handles chunked prefill by considering chunk boundaries and current chunk tokens - Example: if a request has 8 MM embed rows, 2 cached rows, and 3 rows in the current chunk, this keeps rows [2:5]. """ + if not isinstance(mm_embeds, list): + raise TypeError("mm_embeds must be a list") + # Current support two batching modes: # 1. Pre-concatenated mm_embeds for each batch, i.e., len(mm_embeds) == 1 # 2. Individual mm_embeds for each multimodal param, i.e., len(mm_embeds) == len(multimodal_params) @@ -317,6 +358,11 @@ def find_input_mm_embeds( ) return [] + if not mm_embeds: + raise ValueError( + "No multimodal embeddings were provided or cached for active multimodal tokens." + ) + if total_mm_tokens == sum(mm_embed.shape[0] for mm_embed in mm_embeds): return mm_embeds diff --git a/tensorrt_llm/_torch/models/modeling_nemotron_nano.py b/tensorrt_llm/_torch/models/modeling_nemotron_nano.py index c81407e77809..1ab1be554094 100644 --- a/tensorrt_llm/_torch/models/modeling_nemotron_nano.py +++ b/tensorrt_llm/_torch/models/modeling_nemotron_nano.py @@ -1,7 +1,6 @@ # Copyright (c) 2025-2026, NVIDIA CORPORATION. All rights reserved. import copy import math -import os import re from dataclasses import dataclass from typing import Any, ClassVar, Dict, List, Optional, Sequence, Tuple, Union @@ -14,7 +13,15 @@ from PIL import Image from tensorrt_llm._torch.models.checkpoints import NemotronHHfWeightMapper -from tensorrt_llm.inputs.multimodal import MultimodalParams +from tensorrt_llm.inputs.multimodal import ( + DisaggPrefillMultimodalInputs, + MultimodalParams, + _as_cpu_tensor, + _compute_mm_masks, + _find_mm_token_runs_from_mask, + _find_mm_token_start_pos_from_masks, + find_mm_token_lengths, +) from ...inputs import ( AudioData, @@ -24,10 +31,12 @@ MultimodalPlaceholderMetadata, MultimodalPlaceholderPlacement, TextPrompt, + TokensPrompt, compute_retained_tokens_count, compute_retained_tokens_from_tubelet_budget, compute_retention_mask, register_input_processor, + support_multimodal_disaggregated, ) from ...logger import logger from ...sampling_params import SamplingParams @@ -35,13 +44,16 @@ from ..model_config import ModelConfig from .modeling_auto import AutoModelForCausalLM from .modeling_multimodal_utils import ( + _is_mm_disagg, find_input_mm_embeds, fuse_input_embeds, + get_attached_multimodal_embeddings, get_multimodal_embeddings, + has_raw_multimodal_payload, ) from .modeling_parakeet import ParakeetExtractor, ProjectedParakeet from .modeling_radio import RADIOVisionModel, calc_seq_lens -from .modeling_utils import register_auto_model +from .modeling_utils import register_auto_model, register_vision_encoder # Set max_num_tiles to 1 for video modality, to match the training behavior. VIDEO_MAX_NUM_TILES = 1 @@ -390,10 +402,6 @@ def stack(images: List[torch.Tensor], patch_size: int) -> torch.Tensor: # Make this a runtime lookup rather than a module-wide constant for easier unit testing. -def _is_disagg() -> bool: - return os.getenv("TLLM_MULTIMODAL_DISAGGREGATED", "0") == "1" - - class SquaredReLU(nn.Module): def forward(self, x): return torch.pow(torch.nn.functional.relu(x), 2) @@ -406,6 +414,7 @@ class NanoV2VLVisionEncoder(transformers.PreTrainedModel): def __init__(self, model_config: ModelConfig[transformers.PretrainedConfig]): config = model_config.pretrained_config super().__init__(config) + self.model_config = model_config self.image_size = config.force_image_size self.patch_size = config.patch_size self.num_image_token = int( @@ -878,6 +887,39 @@ def _video_tubelet_geometry(self, t: int, T: int, ih: int, iw: int) -> Tuple[int return num_tubelets, wh +class NanoV2VLMultimodalEncoder(NanoV2VLVisionEncoder): + """EPD-only encoder wrapper for Nano VL image/video handoff. + + Full Nano V3 can support more modalities through the full model path. + This wrapper is only for the mm_encoder_only EPD worker. It returns one + vision embedding tensor for image/video inputs and does not run Nano audio + or video-audio interleave logic. + """ + + def __init__(self, model_config: ModelConfig[transformers.PretrainedConfig], *args, **kwargs): + super().__init__(model_config) + + def forward(self, multimodal_params: List[MultimodalParams]) -> List[torch.Tensor]: + for param in multimodal_params: + modality_type = param.multimodal_data["modality_type"] + if modality_type == "audio": + # EPD encoder-only handoff does not own the Nano audio encoder. + raise NotImplementedError( + "NanoV2VL MultimodalEncoder currently supports image/video inputs, not audio." + ) + audio_data = param.multimodal_data[modality_type].get("audio") + if audio_data is not None: + # TODO(TRTLLM-13129): Add audio support for encoder handoff. + raise NotImplementedError( + "NanoV2VL MultimodalEncoder does not yet encode audio extracted from video." + ) + + mm_embeddings, _ = super().forward(multimodal_params) + if not mm_embeddings: + return [] + return [torch.cat(mm_embeddings, dim=0)] + + class NanoV2VLInputProcessor(BaseMultimodalInputProcessor, BaseMultimodalDummyInputsBuilder): supports_token_id_mm_expansion: ClassVar[bool] = True @@ -2229,6 +2271,93 @@ def call_with_text_prompt( "multimodal_data": multimodal_data, } + def build_disagg_prefill_multimodal_inputs( + self, inputs: Union[TextPrompt, TokensPrompt], mm_handles: List[Dict[str, Any]] + ) -> DisaggPrefillMultimodalInputs: + text_prompt = inputs.get("prompt") + prompt_token_ids = inputs.get("prompt_token_ids") + if prompt_token_ids is None and not text_prompt: + raise ValueError("Either prompt_token_ids or text prompt is required") + if not isinstance(mm_handles, list): + raise TypeError("mm_handles must be a list") + + mm_data = inputs.get("multi_modal_data") or {} + if not mm_data: + raise ValueError("multi_modal_data is required for NanoV2VL multimodal handoff") + modalities = [name for name, value in mm_data.items() if value is not None] + if len(modalities) != 1: + raise ValueError( + "NanoV2VL multimodal handoff supports exactly one modality per request" + ) + if modalities[0] == "audio": + raise NotImplementedError( + "NanoV2VL multimodal handoff does not support audio-only inputs" + ) + + num_mm_tokens_by_key = find_mm_token_lengths(mm_data, self) + num_mm_tokens = [length for lengths in num_mm_tokens_by_key.values() for length in lengths] + if len(num_mm_tokens) != len(mm_handles): + raise RuntimeError( + f"Expected {len(num_mm_tokens)} multimodal handles, got {len(mm_handles)}." + ) + + expected_hidden_size = self.config.llm_config.hidden_size + multimodal_embedding_lengths: List[int] = [] + for i, mm_handle in enumerate(mm_handles): + tensor_size = mm_handle["tensor_size"] + if len(tensor_size) != 2: + raise RuntimeError( + f"Expected multimodal embedding {i} to be rank 2, got tensor_size={tensor_size}." + ) + if tensor_size[1] != expected_hidden_size: + raise RuntimeError( + f"Expected multimodal embedding {i} to have hidden size " + f"{expected_hidden_size}, got {tensor_size[1]}." + ) + multimodal_embedding_lengths.append(tensor_size[0]) + + if prompt_token_ids is None: + prompt_token_ids = self.tokenizer.encode(text_prompt, add_special_tokens=False) + prompt_token_ids = list(prompt_token_ids) + + expanded_ids, _ = self.expand_prompt_token_ids_for_mm( + prompt_token_ids, + num_mm_tokens, + hf_processor_mm_kwargs=inputs.get("mm_processor_kwargs"), + mm_data=mm_data, + ) + + input_ids_tensor = _as_cpu_tensor(expanded_ids) + mm_mask, embed_mask, special_mask = _compute_mm_masks( + input_ids_tensor, + vocab_size=self.get_vocab_size(), + mm_token_ids=self.get_mm_token_ids(), + mm_special_token_ids=self.get_mm_special_token_ids(), + ) + if int(embed_mask.sum().item()) != sum(multimodal_embedding_lengths): + raise RuntimeError( + "Multimodal embedding length mismatch: " + f"prompt has {int(embed_mask.sum().item())} embedding slots, " + f"handles provide {sum(multimodal_embedding_lengths)}." + ) + mm_token_offsets, special_token_offsets = _find_mm_token_start_pos_from_masks( + mm_mask, special_mask, num_mm_tokens + ) + item_run_cu_offsets, run_positions, run_lengths = _find_mm_token_runs_from_mask( + mm_mask, num_mm_tokens + ) + + return DisaggPrefillMultimodalInputs( + prompt_token_ids=expanded_ids, + multimodal_lengths=num_mm_tokens, + multimodal_positions=mm_token_offsets, + multimodal_embedding_lengths=multimodal_embedding_lengths, + multimodal_item_run_cu_offsets=item_run_cu_offsets, + multimodal_run_positions=run_positions, + multimodal_run_lengths=run_lengths, + special_token_offsets=special_token_offsets, + ) + def _prepare_audio_features( self, text: str, @@ -2423,6 +2552,8 @@ def _resample_audios( ) +@support_multimodal_disaggregated +@register_vision_encoder(NanoV2VLMultimodalEncoder) @register_auto_model("NemotronH_Nano_Omni_Reasoning_V3") @register_auto_model("NemotronH_Nano_VL_V2") @register_input_processor( @@ -2439,9 +2570,6 @@ class NemotronH_Nano_VL_V2(transformers.PreTrainedModel): _supports_flash_attn = True def __init__(self, model_config: ModelConfig): - if _is_disagg(): - raise ValueError("NanoV2VL does not support disaggregated inference yet.") - config = model_config.pretrained_config super().__init__(config) @@ -2493,10 +2621,12 @@ def load_weights(self, weights): # to be the LLM-only config and no longer has vision_config / # sound_config / force_image_size / etc. mm_pretrained = self._mm_model_config.pretrained_config - if self.vision_encoder is None and not _is_disagg(): + # Normal workers own encoders. MM E/P handoff uses attached embeddings. + is_multimodal_encoder_worker = not _is_mm_disagg() + if self.vision_encoder is None and is_multimodal_encoder_worker: self.vision_encoder = NanoV2VLVisionEncoder(self._mm_model_config).eval().to("cuda") sound_config = getattr(mm_pretrained, "sound_config", None) - if self.sound_encoder is None and sound_config is not None: + if self.sound_encoder is None and sound_config is not None and is_multimodal_encoder_worker: self.sound_encoder = ( ProjectedParakeet( sound_config, @@ -2681,6 +2811,24 @@ def _validate_evs_context_batch( "multimodal context chunks form a contiguous input_ids prefix." ) + def _check_encoders_exist(self, raw_ctx_params: List[MultimodalParams]) -> None: + """Check encoders needed by raw inputs exist. + + Raw image/video needs vision encoder; raw audio needs sound encoder. + Encoder-only EPD worker may have only one. Reject early with clear + message, not deep encoder failure. + """ + needs_vision_encoder = any( + param.multimodal_data["modality_type"] in ("image", "video") for param in raw_ctx_params + ) + if needs_vision_encoder and self.vision_encoder is None: + raise ValueError("Raw image/video inputs require a local NanoV2VL vision encoder.") + needs_sound_encoder = any( + param.multimodal_data["modality_type"] == "audio" for param in raw_ctx_params + ) + if needs_sound_encoder and self.sound_encoder is None: + raise ValueError("Raw audio inputs require a local NanoV2VL sound encoder.") + def merge_evs_mm_embeds( self, num_tokens_in_videos: List[int], @@ -2996,16 +3144,27 @@ def forward( ctx_params = multimodal_params[:num_context_requests] if self.video_pruning_rate > 0: self._validate_evs_context_batch(ctx_params, num_context_requests) - if not _is_disagg(): + raw_ctx_params = [param for param in ctx_params if has_raw_multimodal_payload(param)] + # Raw image/video/audio tensors: run local encoder. + if raw_ctx_params: + self._check_encoders_exist(raw_ctx_params) mm_embedding = get_multimodal_embeddings( encoder_forward_fn=self._encode_multimodal, multimodal_params=ctx_params, ) + # E/P prefill: encoder already ran; use attached embeddings. else: - raise NotImplementedError( - "Nano-V2-VLM does not support disaggregated inference yet. Please unset " - "the TLLM_MULTIMODAL_DISAGGREGATED environment variable, or set it to '0'." - ) + if self.video_pruning_rate > 0 and any( + param.has_content() and param.multimodal_data.get("modality_type") == "video" + for param in ctx_params + ): + # TODO(TRTLLM-12534): Carry EVS retained-token counts through + # encoder handoff before enabling video pruning for E/P. + raise ValueError( + "EVS video pruning is not supported with attached " + "multimodal embeddings yet." + ) + mm_embedding = get_attached_multimodal_embeddings(ctx_params) # Adjust input_ids in videos if EVS is applied. if self.video_pruning_rate > 0: # Retrieve per-video count stashed by `_encode_multimodal`. diff --git a/tensorrt_llm/_torch/models/modeling_phi4mm.py b/tensorrt_llm/_torch/models/modeling_phi4mm.py index abcc0c1f5ff2..df9afdf34508 100644 --- a/tensorrt_llm/_torch/models/modeling_phi4mm.py +++ b/tensorrt_llm/_torch/models/modeling_phi4mm.py @@ -42,7 +42,8 @@ from ..attention_backend import AttentionMetadata from ..model_config import ModelConfig from .modeling_auto import AutoModelForCausalLM -from .modeling_multimodal_utils import (find_input_mm_embeds, fuse_input_embeds, +from .modeling_multimodal_utils import (_is_mm_disagg, find_input_mm_embeds, + fuse_input_embeds, get_multimodal_embeddings) from .modeling_utils import register_auto_model @@ -73,10 +74,6 @@ def _is_torch_compile() -> bool: return os.getenv("TLLM_MULTIMODAL_ENCODER_TORCH_COMPILE", "0") == "1" -def _is_disagg() -> bool: - return os.getenv("TLLM_MULTIMODAL_DISAGGREGATED", "0") == "1" - - # Load the Phi4MM classes from HuggingFace Phi-4-multimodal-instruct repo. # Remove this function by using the transformers version of Phi4Multimodal when weights/configs are converted to transformers format. def _load_phi4mm_classes(local_path): @@ -957,7 +954,7 @@ class Phi4MMForCausalLM(transformers.PreTrainedModel): _supports_flash_attn = True def __init__(self, model_config: ModelConfig): - if _is_disagg(): + if _is_mm_disagg(): raise ValueError( "Phi4MM does not support disaggregated inference yet.") @@ -968,7 +965,7 @@ def __init__(self, model_config: ModelConfig): if hasattr(self, "llm"): return - if not _is_disagg(): + if not _is_mm_disagg(): _load_phi4mm_classes(config._name_or_path) self.hf_phi4mm_model = HFPhi4MultimodalEncoder(config).eval() @@ -989,7 +986,7 @@ def __init__(self, model_config: ModelConfig): def load_weights(self, weights): # Load weights into HFPhi4MultimodalEncoder. - if not _is_disagg(): + if not _is_mm_disagg(): filtered_weights = {} for k, v in weights.items(): # Skip image_embed head weights since we set it as NoOp. @@ -1076,7 +1073,7 @@ def forward( multimodal_params = kwargs.get("multimodal_params", []) mm_embedding = [] if len(multimodal_params) > 0: - if not _is_disagg(): + if not _is_mm_disagg(): encoder_kwargs = { "mm_token_ids": self.mm_token_ids, } diff --git a/tensorrt_llm/_torch/models/modeling_qwen2vl.py b/tensorrt_llm/_torch/models/modeling_qwen2vl.py index 7db60f085dfd..05fa290d105c 100644 --- a/tensorrt_llm/_torch/models/modeling_qwen2vl.py +++ b/tensorrt_llm/_torch/models/modeling_qwen2vl.py @@ -22,12 +22,13 @@ BaseWeightMapper from tensorrt_llm._torch.models.checkpoints.hf.qwen2vl_weight_mapper import \ Qwen2VLHfWeightMapper -from tensorrt_llm._torch.models.modeling_multimodal_utils import _is_disagg +from tensorrt_llm._torch.models.modeling_multimodal_utils import _is_mm_disagg from tensorrt_llm._torch.modules.attention import Attention from tensorrt_llm._torch.modules.linear import Linear, TensorParallelMode from tensorrt_llm._torch.modules.rms_norm import RMSNorm from tensorrt_llm.functional import PositionEmbeddingType -from tensorrt_llm.inputs.multimodal import MultimodalParams +from tensorrt_llm.inputs.multimodal import (DisaggPrefillMultimodalInputs, + MultimodalParams) from ..._utils import nvtx_range, prefer_pinned from ...inputs import (BaseMultimodalDummyInputsBuilder, @@ -55,6 +56,7 @@ from .modeling_auto import AutoModelForCausalLM from .modeling_multimodal_utils import (bypass_processor_output_validation, find_input_mm_embeds, fuse_input_embeds, + get_attached_multimodal_embeddings, get_multimodal_embeddings) from .modeling_utils import (ModelConfig, QuantConfig, _load_weights_impl, filter_weights, register_auto_model, @@ -1075,7 +1077,8 @@ def __init__( llm_model_config.pretrained_config.architectures = ["Qwen2ForCausalLM"] self.llm = AutoModelForCausalLM.from_config(llm_model_config) - if not _is_disagg(): + # Normal worker owns encoder. MM E/P prefill worker gets attached embeddings. + if not _is_mm_disagg(): mm_encoder_config = copy.deepcopy(model_config) self.mm_encoder = Qwen2VisionModelBase( mm_encoder_config, kwargs.get('vision_model_class', None)) @@ -1191,7 +1194,8 @@ def forward( mm_multimodal_params = self._get_requests_with_mm_data( multimodal_params) if len(mm_multimodal_params) > 0: - if not _is_disagg(): + # Local encoder present: raw pixels/videos become embeddings here. + if self.mm_encoder is not None: mm_embeds = get_multimodal_embeddings( encoder_forward_fn=self.mm_encoder.forward, multimodal_params=mm_multimodal_params) @@ -1200,6 +1204,10 @@ def forward( "Qwen2VLModel does not support disaggregated inference yet. Please unset " f"the TLLM_MULTIMODAL_DISAGGREGATED environment variable, or set it to '0'." ) + # E/P prefill: encoder already ran; use attached embeddings. + else: + mm_embeds = get_attached_multimodal_embeddings( + mm_multimodal_params) mm_embeds = find_input_mm_embeds(mm_embeds, mm_multimodal_params) if not self.model_config.pretrained_config.disable_fuse_rope: @@ -1267,7 +1275,7 @@ def multimodal_data_device_paths(self) -> List[str]: ] def load_weights(self, weights, weight_mapper: BaseWeightMapper): - if not _is_disagg(): + if self.mm_encoder is not None: self.mm_encoder.load_weights(weights) self.llm.load_weights(weights, weight_mapper) @@ -1275,22 +1283,20 @@ def load_weights(self, weights, weight_mapper: BaseWeightMapper): class Qwen2_5VLInputProcessorBase(Qwen2VLInputProcessorBase): - def get_prompt_token_ids( - self, inputs: TextPrompt, - mm_handles: List[Dict[str, - Any]]) -> Tuple[List[int], List[int], List[int]]: + def build_disagg_prefill_multimodal_inputs( + self, inputs: TextPrompt, + mm_handles: List[Dict[str, Any]]) -> DisaggPrefillMultimodalInputs: """ - Build input token ids with multimodal placeholders expanded to the number of MM tokens. + Build disaggregated prefill inputs from multimodal embedding handles. Args: inputs: Text prompt input container. Must contain a non-empty prompt string. mm_handles: List of multimodal embedding handles. Returns: - Tuple[List[int], List[int], List[int]]: - - expanded_ids: token ids with each image token expanded to a placeholder repeated per MM token - - mm_token_length: per-image MM token lengths - - mm_token_offsets: start offsets (positions) for each image's MM tokens within expanded_ids + DisaggPrefillMultimodalInputs containing expanded token IDs, + prompt-side MM positions/lengths, exact runs, and encoder-output + embedding lengths. """ # TODO: Move this function to the base input processor class when extending for more models text_prompt = inputs.get("prompt") @@ -1347,8 +1353,18 @@ def get_prompt_token_ids( assert write_pos == final_length, f"Write position mismatch: {write_pos} != {final_length}" assert mm_token_length[-1] + mm_token_offsets[ -1] <= final_length, f"mm_token_length[-1] + mm_token_offsets[-1] ({mm_token_length[-1] + mm_token_offsets[-1]}) should be less than or equal to final_length ({final_length})" - return expanded_ids.to( - torch.int32).tolist(), mm_token_length, mm_token_offsets + return DisaggPrefillMultimodalInputs( + prompt_token_ids=expanded_ids.to(torch.int32).tolist(), + multimodal_lengths=mm_token_length, + multimodal_positions=mm_token_offsets, + multimodal_embedding_lengths=[ + mm_handle["tensor_size"][0] for mm_handle in mm_handles + ], + multimodal_item_run_cu_offsets=list(range(len(mm_token_length) + + 1)), + multimodal_run_positions=mm_token_offsets, + multimodal_run_lengths=mm_token_length, + ) @support_multimodal_disaggregated @@ -1387,7 +1403,7 @@ def load_weights(self, weights, weight_mapper: BaseWeightMapper): if isinstance(weight_mapper, Qwen2VLHfWeightMapper): weights = weight_mapper.preprocess_weights(weights) - if not _is_disagg(): + if self.mm_encoder is not None: self.mm_encoder.load_weights(weights) self.llm.load_weights(weights) diff --git a/tensorrt_llm/_torch/models/modeling_qwen3.py b/tensorrt_llm/_torch/models/modeling_qwen3.py index e9985b02c52d..f925d8963e07 100644 --- a/tensorrt_llm/_torch/models/modeling_qwen3.py +++ b/tensorrt_llm/_torch/models/modeling_qwen3.py @@ -56,8 +56,8 @@ def __init__( mrope_section=config.rope_scaling.get("mrope_section", None), mrope_interleaved=config.rope_scaling.get( "mrope_interleaved", False)) - if config.rope_scaling.get("mrope_interleaved", False): - fuse_qk_norm_rope = False + # Interleaved mRoPE is now supported by the fused qk_norm_rope kernel + # (use_mrope path), so it no longer forces the unfused RoPE path. else: pos_embd_params = PositionalEmbeddingParams( type=PositionEmbeddingType.rope_gpt_neox, diff --git a/tensorrt_llm/_torch/models/modeling_qwen3_next.py b/tensorrt_llm/_torch/models/modeling_qwen3_next.py index d6f4fd57794f..345f8eacee6e 100644 --- a/tensorrt_llm/_torch/models/modeling_qwen3_next.py +++ b/tensorrt_llm/_torch/models/modeling_qwen3_next.py @@ -490,7 +490,10 @@ def __init__(self, model_config: ModelConfig[Qwen3NextConfig], self.self_attn = Qwen3NextAttention( model_config, layer_idx=layer_idx, - fuse_qk_norm_rope=False, + # Gemma-style QK-norm is now supported by the fused qk_norm_rope + # kernel (use_gemma path), so fuse instead of running separate + # split + q/k RMSNorm + RoPE kernels. + fuse_qk_norm_rope=True, ) self.mlp = _create_mlp(model_config, aux_stream, layer_idx) diff --git a/tensorrt_llm/_torch/models/modeling_qwen3vl.py b/tensorrt_llm/_torch/models/modeling_qwen3vl.py index 38205de69687..f2553a2e2b0d 100644 --- a/tensorrt_llm/_torch/models/modeling_qwen3vl.py +++ b/tensorrt_llm/_torch/models/modeling_qwen3vl.py @@ -13,7 +13,7 @@ Qwen3VLVisionPatchEmbed as HFQwen3VLVisionPatchEmbed, ) -from tensorrt_llm._torch.models.modeling_multimodal_utils import _is_disagg +from tensorrt_llm._torch.models.modeling_multimodal_utils import _is_mm_disagg from tensorrt_llm.functional import PositionEmbeddingType from tensorrt_llm.mapping import Mapping @@ -29,7 +29,7 @@ register_input_processor, support_multimodal_disaggregated, ) -from ...inputs.multimodal import MultimodalParams +from ...inputs.multimodal import DisaggPrefillMultimodalInputs, MultimodalParams from ...logger import logger from ...sampling_params import SamplingParams from ..attention_backend import AttentionMetadata @@ -46,6 +46,7 @@ bypass_processor_output_validation, find_input_mm_embeds, fuse_input_embeds, + get_attached_multimodal_embeddings, get_multimodal_embeddings, ) from .modeling_qwen2vl import Qwen2_5_VLVisionAttention @@ -59,6 +60,99 @@ ) +def _expand_prompt_token_ids_for_mm_handoff( + input_ids: torch.Tensor, + mm_handles: List[Dict[str, Any]], + *, + image_token_id: int, + video_token_id: int, + vision_start_token_id: int, + placeholder_id: int, +) -> DisaggPrefillMultimodalInputs: + """Expand Qwen3-VL image/video placeholders and emit sparse MM layout. + + Qwen handoff has one coarse or token per item. + This helper expands that one token to the number of embedding rows in the + handoff handle, then returns the sparse layout metadata. + + Agg gets this expansion from Qwen's HF processor taking raw images/videos + as inputs. Reusing that would be wasteful here, hence this helper that + expands based on the embedding handles row count. + + """ + placeholder_positions = [ + pos + for pos, token in enumerate(input_ids.tolist()) + if token in (image_token_id, video_token_id) + ] + if len(placeholder_positions) != len(mm_handles): + raise ValueError( + "Number of multimodal placeholders must match number of mm_handles: " + f"placeholders={len(placeholder_positions)}, " + f"mm_handles={len(mm_handles)}" + ) + + total_mm_embed_tokens = sum(mm_handle["tensor_size"][0] for mm_handle in mm_handles) + final_length = len(input_ids) - len(placeholder_positions) + total_mm_embed_tokens + expanded_ids = torch.empty(final_length, dtype=input_ids.dtype) + + mm_token_lengths: List[int] = [] + mm_token_offsets: List[int] = [] + item_types: List[int] = [] + item_run_cu_offsets: List[int] = [0] + run_positions: List[int] = [] + run_lengths: List[int] = [] + multimodal_embedding_lengths: List[int] = [] + special_token_offsets: List[int] = [] + + write_pos = 0 + mm_handle_idx = 0 + flat_mm_offset = 0 + for read_pos, token_id in enumerate(input_ids.tolist()): + if token_id not in (image_token_id, video_token_id): + expanded_ids[write_pos] = token_id + write_pos += 1 + continue + + mm_token_num = mm_handles[mm_handle_idx]["tensor_size"][0] + has_leading_special = ( + read_pos > 0 and int(input_ids[read_pos - 1].item()) == vision_start_token_id + ) + run_start = write_pos - 1 if has_leading_special else write_pos + prompt_mm_length = mm_token_num + int(has_leading_special) + + expanded_ids[write_pos : write_pos + mm_token_num] = placeholder_id + mm_token_offsets.append(run_start) + mm_token_lengths.append(prompt_mm_length) + multimodal_embedding_lengths.append(mm_token_num) + item_types.append(0 if token_id == image_token_id else 1) + run_positions.append(run_start) + run_lengths.append(prompt_mm_length) + item_run_cu_offsets.append(len(run_positions)) + + if has_leading_special: + special_token_offsets.append(flat_mm_offset) + + write_pos += mm_token_num + flat_mm_offset += prompt_mm_length + mm_handle_idx += 1 + + if write_pos != final_length: + raise RuntimeError(f"Write position mismatch: {write_pos} != {final_length}") + + return DisaggPrefillMultimodalInputs( + prompt_token_ids=expanded_ids.to(torch.int32).tolist(), + multimodal_lengths=mm_token_lengths, + multimodal_positions=mm_token_offsets, + multimodal_embedding_lengths=multimodal_embedding_lengths, + multimodal_item_run_cu_offsets=item_run_cu_offsets, + multimodal_run_positions=run_positions, + multimodal_run_lengths=run_lengths, + special_token_offsets=special_token_offsets, + item_types=item_types, + ) + + class Qwen3VLInputProcessorBase(BaseMultimodalInputProcessor, BaseMultimodalDummyInputsBuilder): def __init__( self, @@ -264,31 +358,16 @@ def get_num_tokens_per_video( video_grid_thw: Optional[torch.Tensor] = None, **kwargs, ) -> int: + if video_grid_thw is None: + raise ValueError( + "Qwen3-VL video token count requires processor-produced video_grid_thw" + ) + merge = self.config.vision_config.spatial_merge_size - if video_grid_thw is not None: - t, h, w = (int(x) for x in video_grid_thw) - return t * (h // merge) * (w // merge) - - # Must run the full processor: HF's Qwen3VLProcessor._get_num_multimodal_tokens - # (what the base class default delegates to) raises on video-only calls - # and returns a wrong-formula fallback that would break chunked prefill. - do_rescale = not (video and isinstance(video[0], torch.Tensor)) - processed = self._processor( - text=["<|vision_start|><|video_pad|><|vision_end|>"], - videos=[video], - padding=True, - do_rescale=do_rescale, - return_tensors="pt", - **kwargs, + token_counts = ( + video_grid_thw[:, 0] * (video_grid_thw[:, 1] // merge) * (video_grid_thw[:, 2] // merge) ) - vgt = processed.get("video_grid_thw") - if vgt is None or len(vgt) == 0: - raise RuntimeError( - "get_num_tokens_per_video: HF processor returned no " - "video_grid_thw for the provided video." - ) - t, h, w = (int(x) for x in vgt[0].tolist()) - return t * (h // merge) * (w // merge) + return int(token_counts.sum().item()) def _preprocess( self, text: Dict[str, Any], mm_data: Dict[str, Any], mm_processor_kwargs: Dict[str, Any] @@ -396,21 +475,20 @@ def call_with_text_prompt( "multimodal_data": multimodal_data, } - def get_prompt_token_ids( + def build_disagg_prefill_multimodal_inputs( self, inputs: TextPrompt, mm_handles: List[Dict[str, Any]] - ) -> Tuple[List[int], List[int], List[int]]: + ) -> DisaggPrefillMultimodalInputs: """ - Build input token ids with multimodal placeholders expanded to the number of MM tokens. + Build disaggregated prefill inputs from multimodal embedding handles. Args: inputs: Text prompt input container. Must contain a non-empty prompt string. mm_handles: List of multimodal embedding handles. Returns: - Tuple[List[int], List[int], List[int]]: - - expanded_ids: token ids with each image token expanded to a placeholder repeated per MM token - - mm_token_length: per-image MM token lengths - - mm_token_offsets: start offsets (positions) for each image's MM tokens within expanded_ids + DisaggPrefillMultimodalInputs containing expanded token IDs, + prompt-side MM positions/lengths, exact runs, and encoder-output + embedding lengths. """ # TODO: Move this function to the base input processor class when extending for more models text_prompt = inputs.get("prompt") @@ -433,44 +511,14 @@ def get_prompt_token_ids( input_ids = self.tokenizer(text_prompt, return_tensors="pt").input_ids[0] - # TODO: what about `video_token_id`? - image_token_index = self.config.image_token_id - - image_mask = input_ids == image_token_index - image_positions = torch.where(image_mask)[0] - num_images = len(image_positions) - assert num_images == len(mm_handles), "Number of images must match number of mm_handles" - total_mm_tokens = sum(mm_handle["tensor_size"][0] for mm_handle in mm_handles) - final_length = len(input_ids) - num_images + total_mm_tokens - # Create output tensor - expanded_ids = torch.empty(final_length, dtype=input_ids.dtype) - placeholder_id = self.tllm_multimodal_token_id - - # Fill the expanded sequence - write_pos = 0 - image_cnt = 0 - mm_token_length = [] - mm_token_offsets = [] - for read_pos in range(len(input_ids)): - if input_ids[read_pos] == image_token_index: - # Replace with placeholder id - mm_token_num = mm_handles[image_cnt]["tensor_size"][0] - expanded_ids[write_pos : write_pos + mm_token_num] = placeholder_id - mm_token_offsets.append(write_pos) - mm_token_length.append(mm_token_num) - write_pos += mm_token_num - image_cnt += 1 - else: - # Copy text token as-is - expanded_ids[write_pos] = input_ids[read_pos] - write_pos += 1 - - assert write_pos == final_length, f"Write position mismatch: {write_pos} != {final_length}" - assert mm_token_length[-1] + mm_token_offsets[-1] <= final_length, ( - f"mm_token_length[-1] + mm_token_offsets[-1] ({mm_token_length[-1] + mm_token_offsets[-1]}) should be less " - f"than or equal to final_length ({final_length})" + return _expand_prompt_token_ids_for_mm_handoff( + input_ids, + mm_handles, + image_token_id=self.config.image_token_id, + video_token_id=self.config.video_token_id, + vision_start_token_id=self.config.vision_start_token_id, + placeholder_id=self.tllm_multimodal_token_id, ) - return expanded_ids.to(torch.int32).tolist(), mm_token_length, mm_token_offsets class Qwen3VLVisionAttention(Qwen2_5_VLVisionAttention): @@ -1058,7 +1106,9 @@ def __init__( # Qwen3ForCausalLM. self.llm = AutoModelForCausalLM.from_config(llm_model_config) - if not _is_disagg(): + self.mm_encoder = None + # Normal workers own the encoder. MM E/P handoff uses attached embeddings. + if not _is_mm_disagg(): self.mm_encoder = Qwen3VisionModelBase( copy.deepcopy(model_config), kwargs.get("vision_model_class", None) ).eval() @@ -1188,18 +1238,31 @@ def forward( # NOTE: Qwen*-VL series has mrope_config even on the text-only prompts, # so we need to separate the mm_multimodal_params from the text-only prompts. - mm_multimodal_params = self._get_requests_with_mm_data(multimodal_params) + mm_multimodal_params, has_raw_image_or_video_data = self._get_requests_with_mm_data( + multimodal_params + ) if len(mm_multimodal_params) > 0: - if not _is_disagg(): + # Raw image/video tensors: run local encoder. + if has_raw_image_or_video_data and self.mm_encoder is not None: mm_embeds = get_multimodal_embeddings( encoder_forward_fn=self.mm_encoder.forward, multimodal_params=mm_multimodal_params, ) + # Raw image/video tensors on a worker with no encoder: bad route. + elif has_raw_image_or_video_data: + raise ValueError( + "Raw multimodal inputs require a local multimodal encoder on this " + "worker, or multimodal_embedding handles from an encoder handoff." + ) + # support_mm_disagg is only set in subclasses of Qwen3VLModelBase that support EPD elif not getattr(self, "support_mm_disagg", False): raise NotImplementedError( f"{type(self)} does not support disaggregated inference yet. Please unset " "the TLLM_MULTIMODAL_DISAGGREGATED environment variable, or set it to '0'." ) + # E/P prefill: encoder already ran; use attached embeddings. + else: + mm_embeds = get_attached_multimodal_embeddings(mm_multimodal_params) mm_embeds = find_input_mm_embeds(mm_embeds, mm_multimodal_params) if self.use_deepstack: @@ -1239,19 +1302,22 @@ def forward( def _get_requests_with_mm_data(self, multimodal_params): mm_multimodal_params = [] + # TODO: This returns one batch-wide "has raw pixels/video" flag. That is + # safe only when a batch is all raw-MM or all attached embeddings. If a + # scheduler can mix both, split raw requests from attached-embedding + # requests and merge outputs back by request index. + has_raw_image_or_video_data = False for multimodal_param in multimodal_params: data = multimodal_param.multimodal_data - if ( - # The first 2 conditions check whether there is input on which inference should be run. + has_raw_data = ( data.get("image", {}).get("pixel_values") is not None or data.get("video", {}).get("pixel_values_videos") is not None - # This condition corresponds to when the embeddings are already populated, as is e.g. - # the case in EPD disagg in the prefill worker. - or data.get("multimodal_embedding") is not None - ): + ) + has_raw_image_or_video_data |= has_raw_data + if has_raw_data or data.get("multimodal_embedding") is not None: mm_multimodal_params.append(multimodal_param) - return mm_multimodal_params + return mm_multimodal_params, has_raw_image_or_video_data @support_multimodal_disaggregated @@ -1284,7 +1350,7 @@ def multimodal_data_device_paths(self) -> List[str]: return ["image.pixel_values", "video.pixel_values_videos", "multimodal_embedding"] def load_weights(self, weights: Dict[str, torch.Tensor], weight_mapper: BaseWeightMapper): - if not _is_disagg(): + if self.mm_encoder is not None: self.mm_encoder.load_weights(weights) weight_mapper = Qwen3VLHfWeightMapper() diff --git a/tensorrt_llm/_torch/models/modeling_qwen3vl_moe.py b/tensorrt_llm/_torch/models/modeling_qwen3vl_moe.py index 4736960cf594..e26a9c317cc2 100644 --- a/tensorrt_llm/_torch/models/modeling_qwen3vl_moe.py +++ b/tensorrt_llm/_torch/models/modeling_qwen3vl_moe.py @@ -3,8 +3,6 @@ import torch from transformers import PretrainedConfig -from tensorrt_llm._torch.models.modeling_multimodal_utils import _is_disagg - from ...inputs import ( ContentFormat, MultimodalPlaceholderMetadata, @@ -64,7 +62,7 @@ def multimodal_data_device_paths(self) -> List[str]: ] def load_weights(self, weights: Dict[str, torch.Tensor], weight_mapper: BaseWeightMapper): - if not _is_disagg(): + if self.mm_encoder is not None: self.mm_encoder.load_weights(weights) weight_mapper = Qwen3VLMoeHfWeightMapper() diff --git a/tensorrt_llm/_torch/models/modeling_speculative.py b/tensorrt_llm/_torch/models/modeling_speculative.py index 62683b3f62f2..d960dd401eea 100755 --- a/tensorrt_llm/_torch/models/modeling_speculative.py +++ b/tensorrt_llm/_torch/models/modeling_speculative.py @@ -402,65 +402,53 @@ def forward( inputs_embeds: Optional[torch.FloatTensor] = None, spec_metadata: Optional[SpecMetadata] = None, hidden_states: Optional[torch.Tensor] = None, - all_rank_num_tokens: Optional[List[int]] = None, ) -> torch.Tensor: - # When ``all_rank_num_tokens`` is supplied the caller wants this draft - # forward to run with a different attention-DP token distribution - # (e.g. the worker's per-step value); restore the original on exit so - # the next call sees the same attn_metadata it had on entry. - previous_all_rank_num_tokens = attn_metadata.all_rank_num_tokens - if all_rank_num_tokens is not None: - attn_metadata.all_rank_num_tokens = all_rank_num_tokens + assert self.embed_tokens is not None - try: - if (input_ids is None) ^ (inputs_embeds is not None): - raise ValueError( - "You cannot specify both input_ids and inputs_embeds at the same time, and must specify either one" - ) + if (input_ids is None) ^ (inputs_embeds is not None): + raise ValueError( + "You cannot specify both input_ids and inputs_embeds at the same time, and must specify either one" + ) - if inputs_embeds is None: - assert self.embed_tokens is not None - inputs_embeds = self.embed_tokens(input_ids).to(self.dtype) - - assert hidden_states is not None - # NOTE: If hidden states from the target model have to be concatenated, - # ideally, we expect that to happen outside the model definition. This - # helps us avoid data-dependent control flow and gives us better CUDA - # graph coverage. - if self._eh_proj_before_attn: - input_embeds = self.enorm(inputs_embeds) - hidden_states = torch.cat([input_embeds, hidden_states], dim=-1) - hidden_states = self.eh_proj(hidden_states) - - residual = None - if self.num_layers > 1: - for layer in self.midlayer: - if residual is not None: - hidden_states = hidden_states + residual - hidden_states, residual = layer( - position_ids=position_ids, - embeds=inputs_embeds, - hidden_states=hidden_states, - attn_metadata=attn_metadata, - spec_metadata=spec_metadata, - ) - else: - hidden_states, residual = self.midlayer( + if inputs_embeds is None: + inputs_embeds = self.embed_tokens(input_ids).to(self.dtype) + + assert hidden_states is not None + # NOTE: If hidden states from the target model have to be concatenated, + # ideally, we expect that to happen outside the model definition. This + # helps us avoid data-dependent control flow and gives us better CUDA + # graph coverage. + if self._eh_proj_before_attn: + input_embeds = self.enorm(inputs_embeds) + hidden_states = torch.cat([input_embeds, hidden_states], dim=-1) + hidden_states = self.eh_proj(hidden_states) + + residual = None + if self.num_layers > 1: + for layer in self.midlayer: + if residual is not None: + hidden_states = hidden_states + residual + hidden_states, residual = layer( position_ids=position_ids, embeds=inputs_embeds, hidden_states=hidden_states, attn_metadata=attn_metadata, spec_metadata=spec_metadata, ) + else: + hidden_states, residual = self.midlayer( + position_ids=position_ids, + embeds=inputs_embeds, + hidden_states=hidden_states, + attn_metadata=attn_metadata, + spec_metadata=spec_metadata, + ) - hidden_states, hidden_states_to_save = self.norm( - hidden_states, residual) - if self._return_hidden_post_norm: - return hidden_states, hidden_states - return hidden_states, hidden_states_to_save - finally: - if all_rank_num_tokens is not None: - attn_metadata.all_rank_num_tokens = previous_all_rank_num_tokens + hidden_states, hidden_states_to_save = self.norm( + hidden_states, residual) + if self._return_hidden_post_norm: + return hidden_states, hidden_states + return hidden_states, hidden_states_to_save # We use Llama3 as the base architecture for EAGLE3 draft layers @@ -644,13 +632,14 @@ def forward( spec_metadata: SpecMetadata | None = None, hidden_states: torch.Tensor | None = None, ) -> torch.Tensor: + assert self.embed_tokens is not None + if (input_ids is None) ^ (inputs_embeds is not None): raise ValueError( "You cannot specify both input_ids and inputs_embeds at the same time, and must specify either one" ) if inputs_embeds is None: - assert self.embed_tokens is not None inputs_embeds = self.embed_tokens(input_ids).to(self.dtype) assert hidden_states is not None diff --git a/tensorrt_llm/_torch/models/modeling_step3p7.py b/tensorrt_llm/_torch/models/modeling_step3p7.py index ff3ba6bee2c6..d849dd12a127 100644 --- a/tensorrt_llm/_torch/models/modeling_step3p7.py +++ b/tensorrt_llm/_torch/models/modeling_step3p7.py @@ -1473,6 +1473,7 @@ def forward( return_context_logits: bool = False, spec_metadata: Optional[SpecMetadata] = None, resource_manager=None, + spec_input_ids: Optional[torch.LongTensor] = None, **kwargs, ) -> torch.Tensor: hidden_states = self.model( @@ -1498,18 +1499,22 @@ def forward( True, ) - spec_input_ids = input_ids + # The MTP/spec worker always needs the real token ids. On the + # multimodal path the main model consumes fused ``inputs_embeds`` + # and ``input_ids`` is None, so the VLM wrapper forwards the + # pre-fusion token ids via ``spec_input_ids``. + spec_token_ids = spec_input_ids if spec_input_ids is not None else input_ids spec_position_ids = position_ids if attn_metadata.padded_num_tokens is not None: - if input_ids is not None: - spec_input_ids = input_ids[: attn_metadata.num_tokens] + if spec_token_ids is not None: + spec_token_ids = spec_token_ids[: attn_metadata.num_tokens] if position_ids is not None: spec_position_ids = _slice_spec_position_ids( position_ids, attn_metadata.num_tokens ) return self.spec_worker( - input_ids=spec_input_ids, + input_ids=spec_token_ids, position_ids=spec_position_ids, hidden_states=hidden_states, logits=logits, diff --git a/tensorrt_llm/_torch/models/modeling_step3p7vl.py b/tensorrt_llm/_torch/models/modeling_step3p7vl.py index 7f4027b309f4..32c32b5087cb 100644 --- a/tensorrt_llm/_torch/models/modeling_step3p7vl.py +++ b/tensorrt_llm/_torch/models/modeling_step3p7vl.py @@ -18,17 +18,11 @@ embedding via Conv2d, 47 transformer blocks with 2D RoPE, two trailing Conv2d downsamplers). The matching projector ``vit_large_projector`` is a single bf16 Linear from ``4 * width`` to ``text_config.hidden_size``. - -The vision tower is intentionally kept in raw torch (SDPA for non-causal -attention) instead of TensorRT-LLM's ``Attention`` module. ``Attention`` -specialises for causal/MLA text decoders; a faithful port of the HF code -keeps weight names trivially compatible (``vision_model.transformer.resblocks. -.attn.{in_proj_weight,in_proj_bias,out_proj.{weight,bias}}``) and avoids -plumbing the vision attention through the text attention metadata. """ from __future__ import annotations +import math from typing import Any, Dict, List, Optional, Tuple, Union import torch @@ -40,8 +34,9 @@ from transformers.dynamic_module_utils import get_class_from_dynamic_module from tensorrt_llm.inputs.multimodal import MultimodalParams +from tensorrt_llm.mapping import Mapping -from ..._utils import nvtx_range +from ..._utils import nvtx_range, prefer_pinned from ...inputs import ( BaseMultimodalInputProcessor, ContentFormat, @@ -53,11 +48,16 @@ from ...logger import logger from ...sampling_params import SamplingParams from ..attention_backend import AttentionMetadata +from ..attention_backend.interface import PredefinedAttentionMask +from ..attention_backend.utils import get_attention_backend from ..model_config import ModelConfig +from ..modules.attention import Attention from ..modules.layer_norm import LayerNorm +from ..modules.linear import Linear +from ..modules.mlp import MLP from ..speculative import SpecMetadata from .modeling_multimodal_utils import ( - _is_disagg, + _is_mm_disagg, find_input_mm_embeds, fuse_input_embeds, get_multimodal_embeddings, @@ -83,15 +83,27 @@ def _rotate_half(x: torch.Tensor) -> torch.Tensor: return x.reshape(*x.shape[:-2], -1) -def _apply_rotary_emb(freqs: torch.Tensor, t: torch.Tensor) -> torch.Tensor: +def _apply_rotary_emb_cos_sin( + cos: torch.Tensor, sin: torch.Tensor, t: torch.Tensor +) -> torch.Tensor: + """Apply 2D RoPE from precomputed ``cos``/``sin`` tables. + + The encoder computes ``cos``/``sin`` once per forward and threads them + through every layer, so the same RoPE table is not recomputed per layer + (47 layers x q/k = 94 cos+sin evaluations otherwise). + """ dtype = t.dtype - rot_dim = freqs.shape[-1] + rot_dim = cos.shape[-1] t_rot = t[..., :rot_dim] t_pass = t[..., rot_dim:] - t_rot = (t_rot * freqs.cos()) + (_rotate_half(t_rot) * freqs.sin()) + t_rot = (t_rot * cos) + (_rotate_half(t_rot) * sin) return torch.cat((t_rot, t_pass), dim=-1).to(dtype) +def _apply_rotary_emb(freqs: torch.Tensor, t: torch.Tensor) -> torch.Tensor: + return _apply_rotary_emb_cos_sin(freqs.cos(), freqs.sin(), t) + + class Step3VisionRope2D(nn.Module): """Cached 2D rotary positional embedding for the vision tower.""" @@ -139,20 +151,25 @@ def _compute_2d_freqs(self) -> torch.Tensor: freqs = torch.cat([torch.zeros(1, freqs.shape[-1]), freqs], dim=0) return freqs[None, None, ...] - def forward( + def freqs_for_grid( self, - q: torch.Tensor, - k: torch.Tensor, grid_hw: Tuple[int, int], - ) -> Tuple[torch.Tensor, torch.Tensor]: + device: torch.device, + ) -> torch.Tensor: + """Per-token 2D-RoPE frequencies for one image, shape ``(seq, dim)``. + + ``seq == grid_h * grid_w`` (plus one for a leading CLS token when + ``use_cls_token``). Used by the encoder to build a flat frequency + tensor over the concatenated varlen token stream. + """ if grid_hw[0] != self.max_grid_height or grid_hw[1] != self.max_grid_width: - rows = torch.arange(grid_hw[0], device=q.device).view(-1, 1) - cols = torch.arange(grid_hw[1], device=q.device).view(1, -1) + rows = torch.arange(grid_hw[0], device=device).view(-1, 1) + cols = torch.arange(grid_hw[1], device=device).view(1, -1) positions = (rows * self.max_grid_width + cols).reshape(-1).to(torch.long) if self.use_cls_token: positions = torch.cat( [ - torch.zeros(1, device=q.device, dtype=torch.long), + torch.zeros(1, device=device, dtype=torch.long), positions + 1, ], dim=0, @@ -160,6 +177,17 @@ def forward( freqs = self.freqs_cache.index_select(2, positions) else: freqs = self.freqs_cache + # freqs_cache is (1, 1, seq, dim); drop the leading broadcast axes. + return freqs.to(device)[0, 0] + + def forward( + self, + q: torch.Tensor, + k: torch.Tensor, + grid_hw: Tuple[int, int], + ) -> Tuple[torch.Tensor, torch.Tensor]: + # Retained for the (B, heads, seq, dim) reference path used in tests. + freqs = self.freqs_for_grid(grid_hw, q.device)[None, None] return _apply_rotary_emb(freqs, q), _apply_rotary_emb(freqs, k) @@ -174,116 +202,209 @@ def forward(self, hidden_states: torch.Tensor) -> torch.Tensor: return hidden_states * self.gamma -class Step3VisionMLP(nn.Module): - """``c_fc -> act -> c_proj`` FFN matching the HF weight names.""" - - def __init__(self, hidden_size: int, intermediate_size: int, hidden_act: str): - super().__init__() - self.c_fc = nn.Linear(hidden_size, intermediate_size, bias=True) - self.act_fn = ACT2FN[hidden_act] - self.c_proj = nn.Linear(intermediate_size, hidden_size, bias=True) +class Step3VisionMLP(MLP): + """``c_fc -> act -> c_proj`` FFN, dispatched through TRT-LLM ``MLP``. - def forward(self, hidden_states: torch.Tensor) -> torch.Tensor: - return self.c_proj(self.act_fn(self.c_fc(hidden_states))) + The non-gated vision FFN maps directly onto the base ``MLP`` module + (``up_proj -> activation -> down_proj``). The HF ``mlp.c_fc`` / ``mlp.c_proj`` + weights are remapped onto the base class's ``up_proj`` / ``down_proj`` in + ``Step3p7VisionTower._remap_vision_weights``. The vision tower runs + single-rank (``Mapping(world_size=1)``), so the base module's column/row + tensor-parallel modes are no-ops here. + """ + def __init__( + self, + model_config: ModelConfig, + hidden_size: int, + intermediate_size: int, + hidden_act: str, + dtype: torch.dtype, + ): + super().__init__( + hidden_size=hidden_size, + intermediate_size=intermediate_size, + bias=True, + activation=ACT2FN[hidden_act], + dtype=dtype, + config=model_config, + ) -class Step3VisionAttention(nn.Module): - """Vision MHA with 2D RoPE. - HF stores the fused QKV projection as ``in_proj_weight``/``in_proj_bias`` - (a single ``3*H x H`` matrix); we keep the same parameter names so the - checkpoint loads without remapping. +# trtllm-gen FMHA ships cubins for these head_dim sizes only. The +# PerceptionEncoder head_dim (1536/16 = 96) is not in the set, so q/k/v/o_proj +# head dims are zero-padded up to the next supported size (128). The kernel +# sees zero-padded channels while 2D RoPE math runs on the real channels; the +# softmax scale is preserved through a compensating ``q_scaling`` (see below). +# +# TODO(perf): padding 96->128 wastes ~33% of the QK^T / P*V flops and adds a +# per-forward ``torch.cat`` on q/k/v every layer. The head_dim restriction is +# specific to the trtllm-gen cubins, not to attention in general: FlashInfer ragged +# prefill supports head_dim=96 natively. Dispatching the vision tower's +# attention through a head_dim-96-native backend would drop the padding, the +# ``q_scaling`` compensation, and the per-forward pads. The same hack exists in +# ``modeling_gemma4_vision.py`` (72->80), so a shared helper could fix both. +_FMHA_SUPPORTED_HEAD_DIMS = (64, 80, 128, 256, 512) + + +def _fmha_padded_head_dim(head_dim: int) -> int: + if head_dim in _FMHA_SUPPORTED_HEAD_DIMS: + return head_dim + return next(d for d in _FMHA_SUPPORTED_HEAD_DIMS if d >= head_dim) + + +class Step3VisionAttention(Attention): + """Vision MHA with 2D RoPE, dispatched through TRT-LLM ``Attention``. + + Subclasses ``Attention`` to participate in the TRT-LLM backend dispatch + (context-only, ``PredefinedAttentionMask.FULL``, varlen via per-image + ``attn_metadata``). The HF fused ``in_proj_*`` / ``out_proj`` weights are + remapped onto the base class's fused ``qkv_proj`` / ``o_proj`` in + ``Step3p7VisionTower.load_weights`` (with head_dim zero-padding). + + HF uses softmax ``scale = head_dim ** -0.5``. TRT-LLM uses + ``qk_scale = 1 / (sqrt(self.head_dim) * q_scaling)`` with ``self.head_dim`` + being the *padded* size, so we pass ``q_scaling = sqrt(hf_head_dim / + padded_head_dim)`` to recover ``1 / sqrt(hf_head_dim)`` exactly. """ def __init__( self, + model_config: ModelConfig, hidden_size: int, num_heads: int, - max_grid_height: int, - max_grid_width: int, - use_cls_token: bool, - use_rope2d: bool, - rope_theta: float = 10000.0, - rope_theta_rescale_factor: float = 1.0, + layer_idx: int, + dtype: torch.dtype, + attn_bias: bool = True, ): - super().__init__() if hidden_size % num_heads != 0: raise ValueError( f"hidden_size ({hidden_size}) must be divisible by num_heads ({num_heads})." ) - self.num_heads = num_heads - self.head_dim = hidden_size // num_heads - self.scale = self.head_dim**-0.5 - - # HF parameter names: in_proj_weight (3H, H), in_proj_bias (3H,), out_proj. - self.in_proj_weight = nn.Parameter(torch.zeros(hidden_size * 3, hidden_size)) - self.in_proj_bias = nn.Parameter(torch.zeros(hidden_size * 3)) - self.out_proj = nn.Linear(hidden_size, hidden_size, bias=True) - - self.rope: Optional[Step3VisionRope2D] = None - if use_rope2d: - self.rope = Step3VisionRope2D( - dim=self.head_dim, - max_grid_height=max_grid_height, - max_grid_width=max_grid_width, - use_cls_token=use_cls_token, - theta=rope_theta, - theta_rescale_factor=rope_theta_rescale_factor, - ) + hf_head_dim = hidden_size // num_heads + padded_head_dim = _fmha_padded_head_dim(hf_head_dim) + q_scaling = math.sqrt(hf_head_dim / padded_head_dim) + super().__init__( + hidden_size=hidden_size, + num_attention_heads=num_heads, + num_key_value_heads=num_heads, # vision MHA + max_position_embeddings=None, + bias=attn_bias, + pos_embd_params=None, + rope_fusion=False, + layer_idx=layer_idx, + dtype=dtype, + dense_bias=attn_bias, + config=model_config, + q_scaling=q_scaling, + head_dim=padded_head_dim, + ) + # ``self.head_dim`` is the kernel-facing padded size; ``hf_head_dim`` is + # the real width seen by 2D RoPE; ``head_dim_pad`` is the zero width. + self.hf_head_dim = hf_head_dim + self.head_dim_pad = padded_head_dim - hf_head_dim def forward( self, hidden_states: torch.Tensor, - grid_hw: Tuple[int, int], + attn_metadata: AttentionMetadata, + rope_cos_sin: Optional[Tuple[torch.Tensor, torch.Tensor]] = None, ) -> torch.Tensor: - # TODO: port the vision attention/projector to TRT-LLM modules - bsz, seq_len, _ = hidden_states.shape - qkv = F.linear(hidden_states, self.in_proj_weight, self.in_proj_bias) - q, k, v = qkv.chunk(3, dim=-1) - q = q.view(bsz, seq_len, self.num_heads, self.head_dim).transpose(1, 2) - k = k.view(bsz, seq_len, self.num_heads, self.head_dim).transpose(1, 2) - v = v.view(bsz, seq_len, self.num_heads, self.head_dim).transpose(1, 2) - if self.rope is not None: - q, k = self.rope(q, k, grid_hw=grid_hw) - attn_output = F.scaled_dot_product_attention(q, k, v, is_causal=False, scale=self.scale) - attn_output = attn_output.transpose(1, 2).reshape( - bsz, seq_len, self.num_heads * self.head_dim + # Flat (num_tokens, hidden) layout; per-image segments are described by + # ``attn_metadata`` (FULL mask, context-only). ``rope_cos_sin`` is the + # flat per-token 2D-RoPE ``(cos, sin)`` pair, each shaped + # (num_tokens, 1, hf_head_dim), precomputed once by the encoder. + num_tokens = hidden_states.shape[0] + qkv = self.qkv_proj(hidden_states) + q, k, v = self.split_qkv(qkv) + q = q.view(num_tokens, self.num_heads, self.head_dim) + k = k.view(num_tokens, self.num_heads, self.head_dim) + v = v.view(num_tokens, self.num_heads, self.head_dim) + + # Slice the real (unpadded) channels for RoPE so the rotation matches HF. + if self.head_dim_pad > 0: + q_real = q[..., : self.hf_head_dim] + k_real = k[..., : self.hf_head_dim] + v_real = v[..., : self.hf_head_dim] + else: + q_real, k_real, v_real = q, k, v + + if rope_cos_sin is not None: + cos, sin = rope_cos_sin + q_real = _apply_rotary_emb_cos_sin(cos, sin, q_real) + k_real = _apply_rotary_emb_cos_sin(cos, sin, k_real) + + # Re-pad with zeros for the FMHA kernel. Zeros in q/k pad don't change + # QK^T; zeros in v pad produce zero output channels stripped by o_proj. + if self.head_dim_pad > 0: + pad_shape = q_real.shape[:-1] + (self.head_dim_pad,) + q = torch.cat([q_real, q_real.new_zeros(pad_shape)], dim=-1) + k = torch.cat([k_real, k_real.new_zeros(pad_shape)], dim=-1) + v = torch.cat([v_real, v_real.new_zeros(pad_shape)], dim=-1) + else: + q, k, v = q_real, k_real, v_real + + q = q.reshape(num_tokens, self.num_heads * self.head_dim) + k = k.reshape(num_tokens, self.num_heads * self.head_dim) + v = v.reshape(num_tokens, self.num_heads * self.head_dim) + + # Keep q/k/v in the projection weight dtype so the FMHA dispatcher does + # not fall back to the unfused path (RoPE can promote to fp32). + target_dtype = self.qkv_proj.weight.dtype + q, k, v = q.to(target_dtype), k.to(target_dtype), v.to(target_dtype) + + q, k, v = self.convert_qkv(q, k, v) + attn_output = self.forward_impl( + q=q, + k=k, + v=v, + attn_metadata=attn_metadata, + attention_mask=PredefinedAttentionMask.FULL, + attention_window_size=None, + attention_mask_data=None, + mrope_config=None, + attention_sinks=None, ) - return self.out_proj(attn_output) + return self.o_proj(attn_output, layer_idx=self.layer_idx) class Step3VisionBlock(nn.Module): - """Single vision transformer block (Pre-LN + LayerScale).""" + """Single vision transformer block (Pre-LN + LayerScale). + + Operates on a flat ``(num_tokens, hidden)`` stream; the 2D-RoPE + ``(cos, sin)`` tables (``rope_cos_sin``) and ``attn_metadata`` are owned by + the encoder and threaded through unchanged. + """ def __init__( self, + model_config: ModelConfig, + layer_idx: int, hidden_size: int, num_heads: int, mlp_ratio: float, hidden_act: str, layer_norm_eps: float, ls_init_value: Optional[float], - max_grid_height: int, - max_grid_width: int, - use_cls_token: bool, - use_rope2d: bool, - rope_theta: float, - rope_theta_rescale_factor: float, + dtype: torch.dtype, ): super().__init__() self.attn = Step3VisionAttention( + model_config=model_config, hidden_size=hidden_size, num_heads=num_heads, - max_grid_height=max_grid_height, - max_grid_width=max_grid_width, - use_cls_token=use_cls_token, - use_rope2d=use_rope2d, - rope_theta=rope_theta, - rope_theta_rescale_factor=rope_theta_rescale_factor, + layer_idx=layer_idx, + dtype=dtype, + ) + self.ln_1 = LayerNorm(hidden_size=hidden_size, eps=layer_norm_eps, dtype=dtype) + self.ln_2 = LayerNorm(hidden_size=hidden_size, eps=layer_norm_eps, dtype=dtype) + self.mlp = Step3VisionMLP( + model_config=model_config, + hidden_size=hidden_size, + intermediate_size=int(hidden_size * mlp_ratio), + hidden_act=hidden_act, + dtype=dtype, ) - self.ln_1 = LayerNorm(hidden_size=hidden_size, eps=layer_norm_eps) - self.ln_2 = LayerNorm(hidden_size=hidden_size, eps=layer_norm_eps) - self.mlp = Step3VisionMLP(hidden_size, int(hidden_size * mlp_ratio), hidden_act) ls = ls_init_value if ls_init_value is not None else 1.0 self.ls_1 = Step3VisionLayerScale(hidden_size, ls) self.ls_2 = Step3VisionLayerScale(hidden_size, ls) @@ -291,11 +412,12 @@ def __init__( def forward( self, hidden_states: torch.Tensor, - grid_hw: Tuple[int, int], + attn_metadata: AttentionMetadata, + rope_cos_sin: Optional[Tuple[torch.Tensor, torch.Tensor]] = None, ) -> torch.Tensor: residual = hidden_states hidden_states = self.ln_1(hidden_states) - hidden_states = self.attn(hidden_states, grid_hw=grid_hw) + hidden_states = self.attn(hidden_states, attn_metadata, rope_cos_sin) hidden_states = residual + self.ls_1(hidden_states) residual = hidden_states @@ -308,15 +430,18 @@ def forward( class Step3VisionTransformer(nn.Module): def __init__(self, depth: int, **block_kwargs): super().__init__() - self.resblocks = nn.ModuleList([Step3VisionBlock(**block_kwargs) for _ in range(depth)]) + self.resblocks = nn.ModuleList( + [Step3VisionBlock(layer_idx=i, **block_kwargs) for i in range(depth)] + ) def forward( self, hidden_states: torch.Tensor, - grid_hw: Tuple[int, int], + attn_metadata: AttentionMetadata, + rope_cos_sin: Optional[Tuple[torch.Tensor, torch.Tensor]] = None, ) -> torch.Tensor: for block in self.resblocks: - hidden_states = block(hidden_states, grid_hw=grid_hw) + hidden_states = block(hidden_states, attn_metadata, rope_cos_sin) return hidden_states @@ -331,7 +456,12 @@ class Step3p7VisionEncoder(nn.Module): the post-downsample feature map ready for the projector. """ - def __init__(self, vision_config: PretrainedConfig, dtype: torch.dtype): + def __init__( + self, + model_config: ModelConfig, + vision_config: PretrainedConfig, + dtype: torch.dtype, + ): super().__init__() self.config = vision_config @@ -358,12 +488,12 @@ def __init__(self, vision_config: PretrainedConfig, dtype: torch.dtype): bias=False, ) self.ln_pre = ( - LayerNorm(hidden_size=self.hidden_size, eps=self.layer_norm_eps) + LayerNorm(hidden_size=self.hidden_size, eps=self.layer_norm_eps, dtype=dtype) if self.use_ln_pre else nn.Identity() ) self.ln_post = ( - LayerNorm(hidden_size=self.hidden_size, eps=self.layer_norm_eps) + LayerNorm(hidden_size=self.hidden_size, eps=self.layer_norm_eps, dtype=dtype) if self.use_ln_post else nn.Identity() ) @@ -392,22 +522,32 @@ def __init__(self, vision_config: PretrainedConfig, dtype: torch.dtype): self.transformer = Step3VisionTransformer( depth=self.num_hidden_layers, + model_config=model_config, hidden_size=self.hidden_size, num_heads=self.num_heads, mlp_ratio=self.mlp_ratio, hidden_act=self.hidden_act, layer_norm_eps=self.layer_norm_eps, ls_init_value=self.ls_init_value, - max_grid_height=grid_size, - max_grid_width=grid_size, - use_cls_token=self.use_cls_token, - use_rope2d=self.use_rope2d, - rope_theta=float(getattr(vision_config, "rope_theta", 10000.0)), - rope_theta_rescale_factor=float( - getattr(vision_config, "rope_theta_rescale_factor", 1.0) - ), + dtype=dtype, ) + # 2D RoPE owned by the encoder; one cache shared across all layers + # (frequencies depend only on the grid + head_dim). RoPE rotates the + # real (unpadded) head channels, so its ``dim`` is the HF head_dim. + self.rope: Optional[Step3VisionRope2D] = None + if self.use_rope2d: + self.rope = Step3VisionRope2D( + dim=self.hidden_size // self.num_heads, + max_grid_height=grid_size, + max_grid_width=grid_size, + use_cls_token=self.use_cls_token, + theta=float(getattr(vision_config, "rope_theta", 10000.0)), + theta_rescale_factor=float( + getattr(vision_config, "rope_theta_rescale_factor", 1.0) + ), + ) + # Two trailing Conv2d downsamplers (stride 2 each, channel x2 each). self.vit_downsampler1 = nn.Conv2d( self.hidden_size, @@ -430,6 +570,50 @@ def __init__(self, vision_config: PretrainedConfig, dtype: torch.dtype): self.to(dtype) self._dtype = dtype + # Context-only attention metadata (no KV cache); rebuilt lazily when a + # batch needs more token capacity than the current allocation. + self._metadata_cls = get_attention_backend(model_config.attn_backend).Metadata + self._attn_metadata: Optional[AttentionMetadata] = None + self._attn_metadata_capacity = 0 + + def _prepare_attn_metadata(self, seq_lens: List[int]) -> AttentionMetadata: + total_tokens = int(sum(seq_lens)) + if self._attn_metadata is None or total_tokens > self._attn_metadata_capacity: + capacity = max(total_tokens, 8192) + self._attn_metadata = self._metadata_cls( + max_num_requests=8192, + max_num_tokens=capacity, + kv_cache_manager=None, + ) + self._attn_metadata_capacity = capacity + md = self._attn_metadata + batch_size = len(seq_lens) + md.num_contexts = batch_size + md.request_ids = list(range(1, batch_size + 1)) + md.prompt_lens = list(seq_lens) + md.seq_lens = torch.tensor(seq_lens, dtype=torch.int, pin_memory=prefer_pinned()) + md.max_seq_len = max(seq_lens) if seq_lens else 0 + md.prepare() + return md + + def _flat_rope_cos_sin( + self, grid_hw: Tuple[int, int], batch: int, device: torch.device + ) -> Optional[Tuple[torch.Tensor, torch.Tensor]]: + """Flat per-token 2D-RoPE ``(cos, sin)`` for ``batch`` same-grid images. + + Each table has shape ``(batch * seq, 1, hf_head_dim)``; the head axis is + left as 1 so it broadcasts over attention heads. All images in a single + ``_encode`` call share the grid, so the single-image frequencies are + simply tiled. ``cos``/``sin`` are evaluated once here and reused across + all layers instead of being recomputed inside every attention call. + """ + if self.rope is None: + return None + freqs = self.rope.freqs_for_grid(grid_hw, device).unsqueeze(1) # (seq, 1, hf_hd) + if batch > 1: + freqs = freqs.repeat(batch, 1, 1) + return freqs.cos(), freqs.sin() + def _sample_abs_posemb(self, grid_h: int, grid_w: int) -> torch.Tensor: if self.posemb_grid_size == grid_h and self.posemb_grid_size == grid_w: return self.positional_embedding[None, ...] @@ -452,7 +636,12 @@ def _sample_abs_posemb(self, grid_h: int, grid_w: int) -> torch.Tensor: pos_embed = torch.cat([cls_token_embed, pos_embed], dim=0) return pos_embed[None, ...] - def forward_features(self, pixel_values: torch.Tensor) -> torch.Tensor: + def _embed(self, pixel_values: torch.Tensor) -> Tuple[torch.Tensor, Tuple[int, int]]: + """Conv patch-embed + (optional) CLS token + abs posemb + pre-LN. + + Returns ``(hidden (B, P, D), grid_hw)`` where ``P`` includes the CLS + token when ``use_cls_token``. + """ bsz, _, height, width = pixel_values.shape grid_h, grid_w = height // self.patch_size, width // self.patch_size hidden = self.conv1(pixel_values) # (B, D, Gh, Gw) @@ -463,9 +652,24 @@ def forward_features(self, pixel_values: torch.Tensor) -> torch.Tensor: if self.use_abs_posemb: hidden = hidden + self._sample_abs_posemb(grid_h, grid_w).to(hidden.dtype) hidden = self.ln_pre(hidden) - hidden = self.transformer(hidden, grid_hw=(grid_h, grid_w)) + return hidden, (grid_h, grid_w) + + def forward_features(self, pixel_values: torch.Tensor) -> torch.Tensor: + """Pre-downsample patch features ``(B, Gh*Gw, D)`` for a same-shape batch. + + The transformer runs over a flat varlen token stream: each image is one + context segment (``PredefinedAttentionMask.FULL``) in a tower-local + ``attn_metadata``; the segments share the grid so RoPE freqs are tiled. + """ + hidden, grid_hw = self._embed(pixel_values) # (B, P, D) + bsz, num_tokens, hidden_dim = hidden.shape + flat = hidden.reshape(bsz * num_tokens, hidden_dim) + rope_cos_sin = self._flat_rope_cos_sin(grid_hw, bsz, flat.device) + attn_metadata = self._prepare_attn_metadata([num_tokens] * bsz) + flat = self.transformer(flat, attn_metadata, rope_cos_sin) if self.use_ln_post: - hidden = self.ln_post(hidden) + flat = self.ln_post(flat) + hidden = flat.reshape(bsz, num_tokens, hidden_dim) if self.use_cls_token: hidden = hidden[:, 1:, :] return hidden @@ -519,15 +723,36 @@ def __init__(self, model_config: ModelConfig[PretrainedConfig]): text_config = _get_text_config(model_config) self.image_token_id = int(getattr(pretrained_config, "image_token_id", 128001)) - self.vision_model = Step3p7VisionEncoder(vision_config, dtype=outer_dtype) + # The vision tower is replicated on every rank (it is not + # tensor-parallel sharded and is bf16 even in the FP8/NVFP4 text + # checkpoints). Build a dedicated single-rank, quant-disabled + # ModelConfig for the TRT-LLM ``Attention``/``Linear`` submodules so + # they neither shard nor quantize, while still honouring the parent's + # attention backend selection. + vision_model_config = ModelConfig( + pretrained_config=vision_config, + mapping=Mapping(world_size=1, tp_size=1, rank=0), + attn_backend=getattr(model_config, "attn_backend", "TRTLLM"), + skip_create_weights_in_init=False, + ) + self.vision_model = Step3p7VisionEncoder( + vision_model_config, vision_config, dtype=outer_dtype + ) proj_in = 4 * int(vision_config.width) proj_out = int(text_config.hidden_size) proj_bias = bool(getattr(pretrained_config, "projector_bias", False)) - # Single GPU rank for the bring-up; keep the projector as a plain - # bf16 Linear so weights from ``vit_large_projector.weight`` load - # directly without an extra remapping. - self.vit_large_projector = nn.Linear(proj_in, proj_out, bias=proj_bias).to(outer_dtype) + # Projector ported to a TRT-LLM ``Linear`` (replicated, single rank). + # The parameter names stay ``weight``/``bias`` so ``vit_large_projector.*`` + # weights load directly without remapping. + self.vit_large_projector = Linear( + proj_in, + proj_out, + bias=proj_bias, + dtype=outer_dtype, + mapping=Mapping(world_size=1, tp_size=1, rank=0), + skip_create_weights_in_init=False, + ) @property def dtype(self) -> torch.dtype: @@ -560,10 +785,81 @@ def load_weights(self, weights: Dict[str, torch.Tensor]): projector_state[sub] = weights[key] if vision_state: + vision_state = self._remap_vision_weights(vision_state) self.vision_model.load_state_dict(vision_state, strict=True) if projector_state: self.vit_large_projector.load_state_dict(projector_state, strict=True) + def _remap_vision_weights( + self, vision_state: Dict[str, torch.Tensor] + ) -> Dict[str, torch.Tensor]: + """Remap HF block weights onto the TRT-LLM ``Attention`` / ``MLP`` layout. + + Attention: HF stores per-block attention as ``attn.in_proj_{weight,bias}`` + (a single ``3H x H`` matrix) and ``attn.out_proj.{weight,bias}``. The + ported ``Attention`` uses a fused ``attn.qkv_proj`` and ``attn.o_proj``. + When the HF head_dim (e.g. 96) is not in the FMHA cubin set, the q/k/v + and o_proj head dims are zero-padded up to the kernel-supported size + (e.g. 128) per head — zeros in the appended channels are inert + (``pad·pad = 0`` in QK^T, zero V channels give zero output channels that + o_proj's zero-padded columns then ignore), so the math is unchanged. + + MLP: HF stores the non-gated FFN as ``mlp.c_fc.{weight,bias}`` / + ``mlp.c_proj.{weight,bias}``; the ported ``MLP`` module uses + ``mlp.up_proj`` / ``mlp.down_proj``. These are renamed verbatim (no + padding — the FFN dims are kernel-agnostic). + """ + num_heads = self.vision_model.num_heads + hidden = self.vision_model.hidden_size + hf_head_dim = hidden // num_heads + padded_head_dim = _fmha_padded_head_dim(hf_head_dim) + pad = padded_head_dim - hf_head_dim + + def _pad_out_rows(t: torch.Tensor, heads: int) -> torch.Tensor: + # (heads * hf_head_dim, ...) -> (heads * padded_head_dim, ...) by + # zero-padding the head_dim within each head. + tail = t.shape[1:] + t = t.view(heads, hf_head_dim, *tail) + zeros = t.new_zeros(heads, pad, *tail) + return torch.cat([t, zeros], dim=1).reshape(heads * padded_head_dim, *tail) + + remapped: Dict[str, torch.Tensor] = {} + for key, val in vision_state.items(): + if key.endswith(".attn.in_proj_weight"): + prefix = key[: -len("in_proj_weight")] + q, k, v = val.chunk(3, dim=0) # each (heads * hf_head_dim, H) + if pad > 0: + q, k, v = (_pad_out_rows(t, num_heads) for t in (q, k, v)) + remapped[prefix + "qkv_proj.weight"] = torch.cat([q, k, v], dim=0) + elif key.endswith(".attn.in_proj_bias"): + prefix = key[: -len("in_proj_bias")] + q, k, v = val.chunk(3, dim=0) + if pad > 0: + q, k, v = (_pad_out_rows(t, num_heads) for t in (q, k, v)) + remapped[prefix + "qkv_proj.bias"] = torch.cat([q, k, v], dim=0) + elif key.endswith(".attn.out_proj.weight"): + prefix = key[: -len("out_proj.weight")] + w = val # (H, heads * hf_head_dim) -- pad the input dim per head. + if pad > 0: + w = w.view(-1, num_heads, hf_head_dim) + zeros = w.new_zeros(w.shape[0], num_heads, pad) + w = torch.cat([w, zeros], dim=2).reshape(-1, num_heads * padded_head_dim) + remapped[prefix + "o_proj.weight"] = w + elif key.endswith(".attn.out_proj.bias"): + prefix = key[: -len("out_proj.bias")] + remapped[prefix + "o_proj.bias"] = val + elif key.endswith(".mlp.c_fc.weight"): + remapped[key[: -len("c_fc.weight")] + "up_proj.weight"] = val + elif key.endswith(".mlp.c_fc.bias"): + remapped[key[: -len("c_fc.bias")] + "up_proj.bias"] = val + elif key.endswith(".mlp.c_proj.weight"): + remapped[key[: -len("c_proj.weight")] + "down_proj.weight"] = val + elif key.endswith(".mlp.c_proj.bias"): + remapped[key[: -len("c_proj.bias")] + "down_proj.bias"] = val + else: + remapped[key] = val + return remapped + def _process_image_features(self, image_features: torch.Tensor) -> torch.Tensor: """Project post-downsample vision features to the text hidden size.""" return self.vit_large_projector(image_features.to(self._dtype)) @@ -588,56 +884,98 @@ def forward(self, multimodal_params: List[MultimodalParams]) -> List[torch.Tenso ``Step3VLProcessor._get_image_repl_features``: patch features come first (``num_patches`` blocks of ``num_patch_feature_size`` tokens), then the full image feature block (``num_image_feature_size`` tokens). + + All images and patches across the whole batch are gathered, grouped by + pixel-tensor shape, and encoded in as few batched vision passes as + possible (one ``_encode`` per distinct shape), then scattered back and + reassembled per request according to ``num_patches``. """ - per_request_embeds: List[torch.Tensor] = [] - for mm in multimodal_params: - # TODO: batch full images across all requests, batch patch images across all - # requests where shapes match, and then split/reassemble according to num_patches + device = self.vision_model.conv1.weight.device + + # ---- Pass 1: gather every image / patch across all requests. ---- + # ``order`` keeps request order; per request we hold its full images, + # its patch images, and the per-full-image patch counts. + order: List[int] = [] + full_imgs: Dict[int, List[torch.Tensor]] = {} + patch_imgs: Dict[int, List[torch.Tensor]] = {} + num_patches: Dict[int, List[int]] = {} + + def _flatten_to_images(t: torch.Tensor) -> List[torch.Tensor]: + if t.dim() >= 5: + t = t.view(-1, *t.shape[-3:]) + elif t.dim() == 3: + t = t.unsqueeze(0) + return list(t.to(device)) + + for req_idx, mm in enumerate(multimodal_params): image_data = mm.multimodal_data.get("image") if mm.multimodal_data else None if image_data is None: continue pixel_values = image_data.get("pixel_values") - patch_pixel_values = image_data.get("patch_pixel_values") - num_patches_list = image_data.get("num_patches") if pixel_values is None: continue + fulls = _flatten_to_images(pixel_values) - pixel_values = pixel_values.to(self.vision_model.conv1.weight.device) - if pixel_values.dim() >= 5: - pixel_values = pixel_values.view(-1, *pixel_values.shape[-3:]) - elif pixel_values.dim() == 3: - pixel_values = pixel_values.unsqueeze(0) - image_feats = self._encode(pixel_values) # (N, P_img, H) - - patch_feats = None + patches: List[torch.Tensor] = [] + patch_pixel_values = image_data.get("patch_pixel_values") if patch_pixel_values is not None and patch_pixel_values.numel() > 0: - patch_pixel_values = patch_pixel_values.to(self.vision_model.conv1.weight.device) - if patch_pixel_values.dim() >= 5: - patch_pixel_values = patch_pixel_values.view(-1, *patch_pixel_values.shape[-3:]) - elif patch_pixel_values.dim() == 3: - patch_pixel_values = patch_pixel_values.unsqueeze(0) - if patch_pixel_values.shape[0] > 0: - patch_feats = self._encode(patch_pixel_values) # (M, P_patch, H) - - # Build the per-request flat embedding stream: - # patches (if any, in order) then full image, repeated per image. - if num_patches_list is None: - num_images = image_feats.shape[0] - num_patches_list = [0] * num_images - elif isinstance(num_patches_list, torch.Tensor): - num_patches_list = num_patches_list.flatten().tolist() + patches = _flatten_to_images(patch_pixel_values) + + npl = image_data.get("num_patches") + if npl is None: + npl = [0] * len(fulls) + elif isinstance(npl, torch.Tensor): + npl = npl.flatten().tolist() else: - num_patches_list = list(num_patches_list) + npl = list(npl) + + order.append(req_idx) + full_imgs[req_idx] = fulls + patch_imgs[req_idx] = patches + num_patches[req_idx] = npl + + if not order: + return [] + # ---- Pass 2: group every image by pixel-tensor shape and encode each + # group in a single batched vision pass; scatter features back. ---- + to_encode: List[Tuple[torch.Tensor, Tuple[int, str, int]]] = [] + for req_idx in order: + for i, img in enumerate(full_imgs[req_idx]): + to_encode.append((img, (req_idx, "full", i))) + for i, img in enumerate(patch_imgs[req_idx]): + to_encode.append((img, (req_idx, "patch", i))) + + shape_groups: Dict[Tuple[int, ...], List[int]] = {} + for gi, (img, _ref) in enumerate(to_encode): + shape_groups.setdefault(tuple(img.shape), []).append(gi) + + feats: List[Optional[torch.Tensor]] = [None] * len(to_encode) + for idxs in shape_groups.values(): + batch = torch.stack([to_encode[gi][0] for gi in idxs], dim=0) + encoded = self._encode(batch) # (G, P, text_hidden) + for j, gi in enumerate(idxs): + feats[gi] = encoded[j] + + full_feats: Dict[int, List[torch.Tensor]] = {r: [None] * len(full_imgs[r]) for r in order} + patch_feats: Dict[int, List[torch.Tensor]] = {r: [None] * len(patch_imgs[r]) for r in order} + for gi, (_img, (req_idx, role, i)) in enumerate(to_encode): + (full_feats if role == "full" else patch_feats)[req_idx][i] = feats[gi] + + # ---- Pass 3: reassemble each request as [patches... | full image]. ---- + per_request_embeds: List[torch.Tensor] = [] + for req_idx in order: + ff = full_feats[req_idx] + pf = patch_feats[req_idx] cur_patch_idx = 0 flat_blocks: List[torch.Tensor] = [] - for img_idx, n_p in enumerate(num_patches_list): - if n_p > 0 and patch_feats is not None: - blk = patch_feats[cur_patch_idx : cur_patch_idx + n_p] + for img_idx, n_p in enumerate(num_patches[req_idx]): + for j in range(cur_patch_idx, cur_patch_idx + n_p): + blk = pf[j] flat_blocks.append(blk.reshape(-1, blk.shape[-1])) - cur_patch_idx += n_p - flat_blocks.append(image_feats[img_idx].reshape(-1, image_feats.shape[-1])) - + cur_patch_idx += n_p + full_blk = ff[img_idx] + flat_blocks.append(full_blk.reshape(-1, full_blk.shape[-1])) if flat_blocks: per_request_embeds.append(torch.cat(flat_blocks, dim=0)) @@ -905,6 +1243,19 @@ def __init__(self, model_config: ModelConfig[PretrainedConfig], *args, **kwargs) # ----- engine-facing surface (delegate to the inner causal LM) ------- + @property + def multimodal_data_device_paths(self) -> List[str]: + # Restrict the H2D copy to the tensors the vision tower actually + # consumes on GPU. ``num_patches`` / ``patch_newline_mask`` are metadata + # used host-side for reassembly, so keeping them on CPU avoids needless + # copies and a potential GPU sync if ``num_patches`` ever reached + # ``Step3p7VisionTower.forward`` as a CUDA tensor and hit ``.tolist()``. + return [ + "image.pixel_values", + "image.patch_pixel_values", + "multimodal_embedding", + ] + @property def vocab_size_padded(self) -> int: return self.llm.vocab_size_padded @@ -946,7 +1297,7 @@ def load_weights( allow_partial_loading: bool = False, ): """Split vision/text weights and delegate to the inner LM loader.""" - if self.mm_encoder is None and not _is_disagg() and hasattr(weights, "items"): + if self.mm_encoder is None and not _is_mm_disagg() and hasattr(weights, "items"): # Construct the vision tower here, outside MetaInitMode, so its # PerceptionEncoder / HF submodules allocate real tensors. Move it # straight to CUDA (model_loader already ran model.to("cuda") for @@ -1003,7 +1354,19 @@ def forward( ) mm_embeds = find_input_mm_embeds(mm_embeds, mm_context_params) + spec_input_ids = input_ids if input_ids is not None and mm_embeds: + # ``spec_input_ids`` only feeds the MTP draft path; skip the + # ``torch.where`` rewrite of the OOV sentinels back to the image + # token id entirely when speculative decoding is off. + if self.spec_worker is not None: + vocab_size = self.llm.model.embed_tokens.num_embeddings + image_token_id = int(getattr(self.config, "image_token_id", 128001)) + spec_input_ids = torch.where( + input_ids >= vocab_size, + input_ids.new_full((), image_token_id), + input_ids, + ) input_ids, inputs_embeds = fuse_input_embeds( self.llm.model.embed_tokens, input_ids, mm_embeds, **kwargs ) @@ -1016,5 +1379,6 @@ def forward( return_context_logits=return_context_logits, spec_metadata=spec_metadata, resource_manager=resource_manager, + spec_input_ids=spec_input_ids, **kwargs, ) diff --git a/tensorrt_llm/_torch/models/modeling_utils.py b/tensorrt_llm/_torch/models/modeling_utils.py index 69256521d364..03dbf36d0bc0 100755 --- a/tensorrt_llm/_torch/models/modeling_utils.py +++ b/tensorrt_llm/_torch/models/modeling_utils.py @@ -755,12 +755,13 @@ class SomeVLModel(...): """ def wrapper(model_cls: Type[nn.Module]) -> Type[nn.Module]: + registered = False for arch_name, registered_cls in MODEL_CLASS_MAPPING.items(): - if registered_cls.__name__ == model_cls.__name__: + if registered_cls is model_cls: MODEL_CLASS_VISION_ENCODER_MAPPING[arch_name] = ( vision_encoder_cls, vlm_base_model) - break - else: + registered = True + if not registered: raise ValueError( f"register_vision_encoder: model class {model_cls.__name__} is not registered " f"via register_auto_model; decorator order must ensure registration occurs first." diff --git a/tensorrt_llm/_torch/modules/fla/fused_sigmoid_gating_recurrent.py b/tensorrt_llm/_torch/modules/fla/fused_sigmoid_gating_recurrent.py index 7337f7798425..83dcc4df672f 100644 --- a/tensorrt_llm/_torch/modules/fla/fused_sigmoid_gating_recurrent.py +++ b/tensorrt_llm/_torch/modules/fla/fused_sigmoid_gating_recurrent.py @@ -1,4 +1,6 @@ # Adapted from https://github.com/sgl-project/sglang/blob/main/python/sglang/srt/layers/attention/fla/fused_sigmoid_gating_recurrent.py +# SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. +# SPDX-License-Identifier: Apache-2.0 import os from typing import Optional @@ -8,6 +10,7 @@ import triton.language as tl from tensorrt_llm._torch.modules.fla.utils import custom_device_ctx +from tensorrt_llm._utils import is_flashinfer_gdn_supported_arch from tensorrt_llm.logger import logger try: @@ -201,6 +204,11 @@ def _can_use_flashinfer_gdn_decode( return False if not _FLASHINFER_GDN_BF16_STATE_AVAILABLE: return False + # FlashInfer's GDN decode kernel is built for Hopper (SM90) and datacenter + # Blackwell (SM100/SM103) only; on consumer Blackwell (SM120) and other archs + # it aborts at launch -> fall back to the Triton fused-recurrent kernel. + if not is_flashinfer_gdn_supported_arch(): + return False if initial_state_source is None: return False if initial_state_source.dtype != torch.bfloat16: diff --git a/tensorrt_llm/_torch/modules/fused_moe/create_moe.py b/tensorrt_llm/_torch/modules/fused_moe/create_moe.py index 8ca56a219dc3..67142b6e02d2 100644 --- a/tensorrt_llm/_torch/modules/fused_moe/create_moe.py +++ b/tensorrt_llm/_torch/modules/fused_moe/create_moe.py @@ -183,9 +183,7 @@ def resolve_moe_cls( has_quant = (effective_quant_config is not None and effective_quant_config.layer_quant_mode.has_any_quant( exclude_kv_cache=True)) - if (moe_cls == TRTLLMGenFusedMoE and not has_quant - and not TRTLLMGenFusedMoE._supports_flashinfer_bf16_routing_method( - routing_method)): + if (moe_cls == TRTLLMGenFusedMoE and not has_quant): moe_cls = CutlassFusedMoE # Routed-expert LoRA is supported only on CutlassFusedMoE with unquantized diff --git a/tensorrt_llm/_torch/modules/fused_moe/fused_moe_deepgemm.py b/tensorrt_llm/_torch/modules/fused_moe/fused_moe_deepgemm.py index e5286f2b7887..0b775ecc4edc 100644 --- a/tensorrt_llm/_torch/modules/fused_moe/fused_moe_deepgemm.py +++ b/tensorrt_llm/_torch/modules/fused_moe/fused_moe_deepgemm.py @@ -177,6 +177,198 @@ def masked_index_copy_group_quant_fp8( return output_s +@triton.jit +def _fused_expand_group_quant_fp8( + # Source input (original hidden states before expansion) + source_input_ptr, + # Permutation mapping: expanded_idx -> unpermuted expanded idx + perm_to_unperm_ptr, + # Output pointers + out_q_ptr, + out_s_ptr, + # Expert offset metadata + start_offsets_ptr, + row_indices_ptr, + # Dimensions + row_size, + col_size, + dim_size, + group_size, + # Output scale factor size + aligned_col, + aligned_dim, + # Parameters + num_source_tokens, + eps, + fp8_max, + # Block size + BLOCK: tl.constexpr, + NUM_STAGE: tl.constexpr, +): + """Fused expand + group quantize FP8 kernel. + + Combines expandInputRowsKernel and _masked_index_copy_group_quant_fp8 + into a single pass. Instead of reading from an intermediate expanded + buffer, this kernel reads directly from the original (compact) input + using the permutation map to find the source row. + + The permuted_row_to_unpermuted_row mapping encodes the original expanded + index as: unpermuted_idx = k_rank * num_source_tokens + token_id. + Therefore: source_row = unpermuted_idx % num_source_tokens. + """ + group_block = tl.program_id(0) + token_block = tl.program_id(1) + token_block_num = tl.num_programs(1) + + # calculate group and element offsets + num_tokens = tl.load(start_offsets_ptr + row_size) + elem_offsets = group_block * group_size * 4 + tl.arange(0, BLOCK) + output_s_offs = out_s_ptr + group_block * aligned_col + + # process tokens + for token_index in tl.range(token_block, + num_tokens, + token_block_num, + num_stages=NUM_STAGE): + # load indices for output placement + row_idx = tl.load(row_indices_ptr + token_index) + start_offset = tl.load(start_offsets_ptr + row_idx) + idx = row_idx * col_size + token_index - start_offset + idx_s = row_idx * aligned_dim * aligned_col + token_index - start_offset + + # Compute source row: unpermuted_idx = k_rank * num_source_tokens + token_id + unpermuted_idx = tl.load(perm_to_unperm_ptr + token_index) + source_row = unpermuted_idx % num_source_tokens + + output_s_int32 = 0 + for group_index in tl.range(4): + # load input data directly from original (compact) source + dim_offset = elem_offsets + group_index * group_size + valid = dim_offset < dim_size + input_data = tl.load(source_input_ptr + source_row * dim_size + + dim_offset, + mask=valid, + other=0.0) + # quantization (identical to _masked_index_copy_group_quant_fp8) + _absmax = tl.maximum(tl.max(tl.abs(input_data)), eps) + output_s = _absmax / fp8_max + output_s = tl.exp2(tl.ceil(tl.log2(tl.abs(output_s)))) + output_q = tl.clamp(input_data / output_s, -fp8_max, + fp8_max).to(out_q_ptr.dtype.element_ty) + output_s = output_s.to(tl.int32, bitcast=True) >> 23 + output_s_int32 += output_s << (group_index * 8) + + # store quantized values + tl.store(out_q_ptr + idx * dim_size + dim_offset, + output_q, + mask=valid) + tl.store(output_s_offs + idx_s, output_s_int32) + + +def fused_expand_group_quant_fp8( + output: torch.Tensor, + output_s: torch.Tensor, + source_input: torch.Tensor, + perm_to_unperm: torch.Tensor, + start_offsets: torch.Tensor, + row_indices: torch.Tensor, + experts_per_token: int, + group_size: int, + eps: float = 1e-10, +): + """Fused expand + group quantize FP8. + + Instead of reading from the expanded intermediate buffer (permuted_data), + this reads directly from the original input using the permutation map. + This eliminates the 3.5MB intermediate buffer read, replacing it with + indirect reads from the 448KB source (which fits in L2 cache). + + The permutation map encodes: unpermuted_idx = k_rank * num_tokens + token_id. + To recover the source row: source_row = unpermuted_idx % num_tokens. + + Args: + output: Pre-allocated FP8 output [num_experts, col_size, dim_size] + output_s: Pre-allocated scale output + source_input: Original input hidden states [num_tokens, dim_size] + perm_to_unperm: Mapping from expanded idx to unpermuted expanded idx + start_offsets: Expert first token offsets [num_experts + 1] + row_indices: Token-to-expert map [num_expanded_tokens] + experts_per_token: Number of experts per token (top_k) + group_size: Quantization group size (128) + eps: Epsilon for numerical stability + """ + assert ( + source_input.shape[-1] % group_size == 0 + ), "the last dimension of `source_input` cannot be divisible by `group_size`" + assert source_input.is_contiguous(), "`source_input` is not contiguous" + assert source_input.ndim == 2, "source_input must be a 2D tensor" + assert output.ndim == 3, "Output must be a 3D tensor, [row, col, dim]" + assert start_offsets.shape[ + 0] == output.shape[0] + 1, "Start offsets must be (num_experts + 1)" + + row_size = output.shape[0] + col_size = output.shape[1] + dim_size = output.shape[2] + + alignment = 4 + scale_dim = (dim_size + group_size - 1) // group_size + padded_dim_size = (scale_dim + alignment - 1) // alignment * alignment + padded_col_size = (col_size + alignment - 1) // alignment * alignment + + # get block/grid/stage/warp - use num_expanded_tokens for workload sizing + num_expanded_tokens = perm_to_unperm.shape[0] + num_groups = (dim_size + group_size - 1) // group_size + BLOCK = group_size + if num_expanded_tokens <= 1000 or col_size <= 256: # Small workload + TOKEN_BLOCK_NUM = 256 + NUM_STAGES = 4 + num_warps = 2 + elif num_expanded_tokens <= 10000 or col_size <= 2048: # Medium workload + TOKEN_BLOCK_NUM = 1024 + NUM_STAGES = 2 + num_warps = 1 + else: # Large workload + TOKEN_BLOCK_NUM = 2048 + NUM_STAGES = 2 + num_warps = 1 + grid = ( + (num_groups + 3) // 4, + TOKEN_BLOCK_NUM, + ) + + # FP8 quantization parameters + finfo = torch.finfo(torch.float8_e4m3fn) + fp8_max = finfo.max + + # num_source_tokens is the number of original (compact) input tokens + # The perm_to_unperm map encodes: value = k_rank * num_source_tokens + token_id + # So source_row = value % num_source_tokens + num_source_tokens = source_input.shape[0] + + _fused_expand_group_quant_fp8[grid]( + source_input, + perm_to_unperm, + output, + output_s, + start_offsets, + row_indices, + row_size, + col_size, + dim_size, + group_size, + padded_col_size, + padded_dim_size // 4, + num_source_tokens, + eps, + fp8_max, + BLOCK=BLOCK, + NUM_STAGE=NUM_STAGES, + num_warps=num_warps, + ) + output_s = output_s.transpose(1, 2)[:, :col_size, :] + return output_s + + @triton.jit def masked_index_gather_kernel(output_ptr, input_ptr, start_offsets_ptr, row_indices_ptr, row_size, col_size, dim_size, @@ -418,12 +610,17 @@ def _preprocess_after_permute_kernel( @nvtx_range("[DG] preprocess_after_permute") def preprocess_after_permute(expert_first_token_offset_tensor, - permuted_data_tensor): + num_permuted_tokens): """ Python wrapper that launches a single fused kernel to get the token-to-expert map and the number of tokens per expert. + + Only the number of permuted (expanded) tokens is needed here, not the + permuted activations themselves. Callers that run moe_permute_op with + skip_data_expand=True leave permuted_data_tensor uninitialized, so the count + must come from a populated tensor (e.g. permuted_row_to_unpermuted_row_tensor.shape[0]). """ - total_tokens = permuted_data_tensor.shape[0] + total_tokens = num_permuted_tokens num_experts = expert_first_token_offset_tensor.shape[0] - 1 # create output tensors @@ -770,13 +967,20 @@ def run_moe( assert token_selected_experts is not None assert token_final_scales is not None - # Permutation + # Permutation. + # skip_data_expand=True computes the permutation maps but skips the + # data-copy step (expandInputRowsKernel), so permuted_data_tensor and + # permuted_token_final_scales_tensor are returned with UNINITIALIZED + # contents (still full-size, just never written). The fused expand+quant + # kernel re-derives the activations from x via + # permuted_row_to_unpermuted_row_tensor instead, so all unused outputs are + # discarded with `_`. ( permuted_row_to_unpermuted_row_tensor, - permuted_token_selected_experts_tensor, - permuted_data_tensor, + _, # permuted_token_selected_experts_tensor (unused) + _, # permuted_data_tensor (uninitialized under skip_data_expand) expert_first_token_offset_tensor, - permuted_token_final_scales_tensor, + _, # permuted_token_final_scales_tensor (uninitialized under skip_data_expand) unpermuted_row_to_permuted_row_tensor, ) = torch.ops.trtllm.moe_permute_op( x, @@ -795,14 +999,19 @@ def run_moe( cluster_rank=self.cluster_rank, min_latency_mode=False, use_fp8_block_scaling=True, + skip_data_expand=True, ) - if permuted_data_tensor.numel() == 0: + # permuted_row_to_unpermuted_row_tensor has one entry per permuted + # (expanded) token, so its length is the expanded token count. Use it + # instead of the uninitialized permuted_data_tensor. + num_permuted_tokens = permuted_row_to_unpermuted_row_tensor.shape[0] + if num_permuted_tokens == 0: return torch.zeros_like(x) # Preprocess after permute masked_m, token_to_expert_map = preprocess_after_permute( - expert_first_token_offset_tensor, permuted_data_tensor) + expert_first_token_offset_tensor, num_permuted_tokens) expected_m = (token_selected_experts.numel() + self.expert_size_per_partition - @@ -821,12 +1030,14 @@ def run_moe( self.expert_size_per_partition, scale_k_padded // 4, m_padded) - act_input_sf = masked_index_copy_group_quant_fp8( + act_input_sf = fused_expand_group_quant_fp8( act_input_fp8, act_input_sf, - permuted_data_tensor, + x, + permuted_row_to_unpermuted_row_tensor, expert_first_token_offset_tensor, token_to_expert_map, + experts_per_token=token_selected_experts.shape[1], group_size=128) # Grouped gemm 1 diff --git a/tensorrt_llm/_torch/modules/fused_moe/fused_moe_trtllm_gen.py b/tensorrt_llm/_torch/modules/fused_moe/fused_moe_trtllm_gen.py index ebab505ccb5c..e9dac388d34b 100644 --- a/tensorrt_llm/_torch/modules/fused_moe/fused_moe_trtllm_gen.py +++ b/tensorrt_llm/_torch/modules/fused_moe/fused_moe_trtllm_gen.py @@ -107,6 +107,12 @@ class TRTLLMGenFusedMoE(MoE): QuantAlgo.W4A8_MXFP4_MXFP8, } + # Activations supported by the FlashInfer BF16 kernels: Swiglu and Relu2. + _BF16_SUPPORTED_ACTIVATIONS = { + ActivationType.Swiglu, + ActivationType.Relu2, + } + @classmethod def can_implement( cls, @@ -333,16 +339,12 @@ def _is_unquantized_path(self) -> bool: return self.quant_config is None or not self.quant_config.layer_quant_mode.has_any_quant( exclude_kv_cache=True) - @staticmethod - def _supports_flashinfer_bf16_routing_method( - routing_method: BaseMoeRoutingMethod, ) -> bool: - # FIXME: ban DeepSeekV3 FlashInfer trtllm_bf16_routed_moe() as it appears to have bug - return not isinstance(routing_method, DeepSeekV3MoeRoutingMethod) - def _requires_separated_routing(self) -> bool: - """Whether this backend instance expects precomputed top-k routing.""" - # FIXME: ban FlashInfer BF16 MoE direct routing as it appears to have accuracy bug - return self.use_flashinfer and self._is_unquantized_path() + """BF16 FlashInfer uses separated routing, except DeepSeekV3 which uses + the fused kernel (its separated variant has accuracy issues).""" + if not (self.use_flashinfer and self._is_unquantized_path()): + return False + return not isinstance(self.routing_method, DeepSeekV3MoeRoutingMethod) def _check_flashinfer_backend_support(self) -> bool: # For BF16 (unquantized) path, we will use FlashInfer regardless whether @@ -350,10 +352,7 @@ def _check_flashinfer_backend_support(self) -> bool: if self._is_unquantized_path(): if not self._is_flashinfer_fused_moe_available(): return False - if self.activation_type != ActivationType.Swiglu: - return False - if not self._supports_flashinfer_bf16_routing_method( - self.routing_method): + if self.activation_type not in self._BF16_SUPPORTED_ACTIVATIONS: return False return True @@ -451,8 +450,10 @@ def _check_configs(self): "TRTLLMGenFusedMoE only supports bf16 (FlashInfer), fp8_block_scaling, nvfp4, w4a16_mxfp4, w4a8_mxfp4_fp8 and w4a8_mxfp4_mxfp8 dtypes." if not self.has_any_quant: - assert self.activation_type == ActivationType.Swiglu, \ - "TRTLLMGenFusedMoE BF16 path only supports Swiglu activation." + assert self.activation_type in self._BF16_SUPPORTED_ACTIVATIONS, \ + ("TRTLLMGenFusedMoE BF16 path only supports " + f"{[a.name for a in self._BF16_SUPPORTED_ACTIVATIONS]} activations, " + f"got {self.activation_type.name}.") assert not self.bias and self.swiglu_alpha is None and self.swiglu_beta is None and self.swiglu_limit is None, \ "TRTLLMGenFusedMoE BF16 path does not support bias/swiglu custom parameters." diff --git a/tensorrt_llm/_torch/modules/fused_moe/moe_op_backend.py b/tensorrt_llm/_torch/modules/fused_moe/moe_op_backend.py index 503106033ea6..775590ec2434 100644 --- a/tensorrt_llm/_torch/modules/fused_moe/moe_op_backend.py +++ b/tensorrt_llm/_torch/modules/fused_moe/moe_op_backend.py @@ -25,8 +25,6 @@ import torch -from ...utils import ActType_TrtllmGen - # Global registry for MoE backends _MOE_OP_BACKEND_REGISTRY: Dict[str, Type["MoEOpBackend"]] = {} @@ -805,11 +803,8 @@ def run_bf16_moe( enable_pdl=None, tune_max_num_tokens=8192, ): - # FlashInfer BF16 MoE does not expose an activation_type argument. - # TRTLLMGen constrains the BF16 path to Swiglu, so reject anything - # else here instead of silently calling a mismatched kernel. - if gated_act_type != ActType_TrtllmGen.SwiGlu: - raise ValueError("FlashInfer BF16 fused MoE only supports Swiglu activation.") + # Forward the activation (Swiglu/Relu2) to the FlashInfer BF16 kernels. + activation_type = self.cvt_activation_type(gated_act_type) if router_logits is not None: result = self._fused_moe.trtllm_bf16_moe( @@ -832,6 +827,7 @@ def run_bf16_moe( do_finalize=do_finalize, enable_pdl=enable_pdl, tune_max_num_tokens=tune_max_num_tokens, + activation_type=activation_type, ) else: packed_topk_ids = (topk_ids.to(torch.int32) << 16) | topk_weights.to( @@ -856,6 +852,7 @@ def run_bf16_moe( do_finalize=do_finalize, enable_pdl=enable_pdl, tune_max_num_tokens=tune_max_num_tokens, + activation_type=activation_type, ) if output is not None and do_finalize: diff --git a/tensorrt_llm/_torch/modules/fused_moe/ops/moe_op_deepgemm.py b/tensorrt_llm/_torch/modules/fused_moe/ops/moe_op_deepgemm.py index 3d8c1ea5787b..ab8936374530 100644 --- a/tensorrt_llm/_torch/modules/fused_moe/ops/moe_op_deepgemm.py +++ b/tensorrt_llm/_torch/modules/fused_moe/ops/moe_op_deepgemm.py @@ -1,4 +1,4 @@ -# Copyright (c) 2025, NVIDIA CORPORATION. All rights reserved. +# Copyright (c) 2025-2026, NVIDIA CORPORATION. All rights reserved. # Licensed under the Apache License, Version 2.0 (the "License"); # you may not use this file except in compliance with the License. # You may obtain a copy of the License at @@ -146,7 +146,7 @@ def compute_moe( """ # Import necessary functions for DeepGemm - from ..fused_moe_deepgemm import (masked_index_copy_group_quant_fp8, + from ..fused_moe_deepgemm import (fused_expand_group_quant_fp8, preprocess_after_permute, set_strides, triton_masked_index_gather) @@ -169,13 +169,17 @@ def compute_moe( intermediate_size = module.intermediate_size hidden_size = x.shape[1] - # Permute the data for expert-parallel processing + # Permute the data for expert-parallel processing. + # Unlike DeepGemmFusedMoE (which fuses gather+finalize and never touches + # permuted_data_tensor), this op reuses permuted_data_tensor as a + # write-before-read scratch buffer in the gather+finalize tail below, so + # it is kept; only the genuinely unused outputs are discarded with `_`. ( permuted_row_to_unpermuted_row_tensor, - permuted_token_selected_experts_tensor, + _, # permuted_token_selected_experts_tensor (unused) permuted_data_tensor, expert_first_token_offset_tensor, - permuted_token_final_scales_tensor, + _, # permuted_token_final_scales_tensor (uninitialized under skip_data_expand) unpermuted_row_to_permuted_row_tensor, ) = torch.ops.trtllm.moe_permute_op( x, @@ -194,14 +198,18 @@ def compute_moe( cluster_rank=cluster_rank, min_latency_mode=min_latency_mode, use_fp8_block_scaling=True, # Always use block scaling for DeepGemm + skip_data_expand=True, ) - if permuted_data_tensor.numel() == 0: + # Take the expanded-token count from the populated permutation map (one + # entry per permuted token) rather than the uninitialized data tensor. + num_permuted_tokens = permuted_row_to_unpermuted_row_tensor.shape[0] + if num_permuted_tokens == 0: return torch.zeros_like(x) # Preprocess for masked operations masked_m, token_to_expert_map = preprocess_after_permute( - expert_first_token_offset_tensor, permuted_data_tensor) + expert_first_token_offset_tensor, num_permuted_tokens) expected_m = (token_selected_slots.numel() + expert_size_per_partition - 1) // expert_size_per_partition @@ -222,13 +230,15 @@ def compute_moe( expert_size_per_partition, scale_k_padded // 4, m_padded) - # Quantize and copy input with masking - act_input_sf = masked_index_copy_group_quant_fp8( + # Fused expand + quantize (reads from original input via perm map) + act_input_sf = fused_expand_group_quant_fp8( act_input_fp8, act_input_sf, - permuted_data_tensor, + x, + permuted_row_to_unpermuted_row_tensor, expert_first_token_offset_tensor, token_to_expert_map, + experts_per_token=token_selected_slots.shape[1], group_size=128) # First grouped GEMM (w3 and w1) diff --git a/tensorrt_llm/_torch/modules/linear.py b/tensorrt_llm/_torch/modules/linear.py index 84a695b1f974..aae3f3a65ab2 100644 --- a/tensorrt_llm/_torch/modules/linear.py +++ b/tensorrt_llm/_torch/modules/linear.py @@ -1404,6 +1404,11 @@ def apply(self, module: Linear, input: torch.Tensor, group = (module.mapping.tp_group if output_buffer_kind == int(BufferKind.NCCL_WINDOW) and module.mapping is not None else None) + # Fuse bias inside the GEMM op when N is unpadded and the output is a + # plain buffer; otherwise fall back to post-op `out + bias` below. + fuse_bias_in_gemm = (bias is not None + and output_buffer_kind == int(BufferKind.DEFAULT) + and module.weight.shape[0] == module.out_features) output = torch.ops.trtllm.nvfp4_gemm( act_fp4, module.weight, @@ -1413,7 +1418,8 @@ def apply(self, module: Linear, input: torch.Tensor, module.dtype, output_buffer_kind=output_buffer_kind, allowed_backends=allowed_backends_str, - group=group) + group=group, + bias=bias if fuse_bias_in_gemm else None) # Take the dim of out_features if padded. Make sure the output is contiguous if output.shape[-1] > module.out_features: output = output[..., :module.out_features].contiguous() @@ -1421,7 +1427,7 @@ def apply(self, module: Linear, input: torch.Tensor, if original_shape is not None: output = output.reshape(*original_shape[:-1], output.shape[-1]) - if bias is not None: + if bias is not None and not fuse_bias_in_gemm: output = output + bias return output diff --git a/tensorrt_llm/_torch/modules/mamba/gdn_mixer.py b/tensorrt_llm/_torch/modules/mamba/gdn_mixer.py index a6882d11fbae..aa6146620ead 100644 --- a/tensorrt_llm/_torch/modules/mamba/gdn_mixer.py +++ b/tensorrt_llm/_torch/modules/mamba/gdn_mixer.py @@ -3,6 +3,7 @@ # SPDX-FileCopyrightText: Copyright (c) 2022-2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. # SPDX-License-Identifier: Apache-2.0 +import functools import os from typing import Optional @@ -12,17 +13,12 @@ from torch import nn from transformers import Qwen3NextConfig -# Default: FlashInfer GDN prefill ON. Set TLLM_USE_FLASHINFER_GDN_PREFILL=0 to -# fall back to the vendored Triton chunk_gated_delta_rule. -if os.getenv("TLLM_USE_FLASHINFER_GDN_PREFILL", "1") == "1": - from tensorrt_llm._torch.modules.fla.flashinfer_chunk import chunk_gated_delta_rule -else: - from tensorrt_llm._torch.modules.fla.chunk import chunk_gated_delta_rule from tensorrt_llm._torch.modules.fla.fused_recurrent import fused_recurrent_gated_delta_rule_update from tensorrt_llm._torch.modules.fla.fused_sigmoid_gating_recurrent import ( fused_sigmoid_gating_delta_rule_update, ) from tensorrt_llm._torch.pyexecutor.mamba_cache_manager import use_cpp_mamba_cache_manager +from tensorrt_llm._utils import is_flashinfer_gdn_supported_arch from tensorrt_llm.mapping import Mapping from ...attention_backend import AttentionMetadata @@ -43,6 +39,29 @@ from .mamba2_metadata import Mamba2Metadata +# FlashInfer GDN prefill is ON by default; set TLLM_USE_FLASHINFER_GDN_PREFILL=0 +# to force the vendored Triton chunk_gated_delta_rule everywhere. FlashInfer only +# ships the GDN prefill kernel for Hopper (SM90) and datacenter Blackwell +# (SM100/SM103); on consumer Blackwell (SM120) and other archs it aborts at +# launch, so we fall back to Triton there. Resolution is deferred to first call +# (and cached) so importing this module never initializes CUDA. +@functools.lru_cache(maxsize=1) +def _resolve_chunk_gated_delta_rule(): + if ( + os.getenv("TLLM_USE_FLASHINFER_GDN_PREFILL", "1") == "1" + and is_flashinfer_gdn_supported_arch() + ): + from tensorrt_llm._torch.modules.fla.flashinfer_chunk import chunk_gated_delta_rule as impl + else: + from tensorrt_llm._torch.modules.fla.chunk import chunk_gated_delta_rule as impl + return impl + + +@torch.compiler.disable +def chunk_gated_delta_rule(*args, **kwargs): + return _resolve_chunk_gated_delta_rule()(*args, **kwargs) + + def ensure_divisibility(numerator, denominator): """Ensure that numerator is divisible by the denominator.""" assert numerator % denominator == 0, "{} is not divisible by {}".format(numerator, denominator) diff --git a/tensorrt_llm/_torch/modules/qk_norm_attention.py b/tensorrt_llm/_torch/modules/qk_norm_attention.py index 94448d825c96..0ee43381dace 100644 --- a/tensorrt_llm/_torch/modules/qk_norm_attention.py +++ b/tensorrt_llm/_torch/modules/qk_norm_attention.py @@ -169,8 +169,9 @@ def __init__( self.fuse_qk_norm_rope = fuse_qk_norm_rope self.skip_rope = skip_rope - if use_gemma_rms_norm: - assert fuse_qk_norm_rope is False, "fused_qk_norm_rope is not supported for gemma rms norm." + # Gemma-style RMSNorm (scale by (1 + weight)) is supported by the fused + # qk_norm_rope kernel via the use_gemma flag threaded through below. + self.use_gemma_rms_norm = use_gemma_rms_norm # If fuse_qk_norm_rope is true, do not apply fused RoPE in attention OP, and self.rotary_emb # will be skipped in the overridden apply_rope. @@ -241,14 +242,34 @@ def apply_qk_norm_rope(self, qkv, position_ids): self.pretrained_config, "partial_rotary_factor") else 1.0 rotary_dim = int(self.head_dim * partial_rotary_factor) + # Interleaved mRoPE: position_ids is 3D [3, ...] (temporal/height/width) + # and each rotary half-dim picks a section per + # MRotaryEmbedding.apply_interleaved_rope. Fall back to plain RoPE for + # 2D/1D position_ids (e.g. dummy requests), mirroring the unfused path. + mrope_section = getattr(self.pos_embd_params, "mrope_section", None) + use_mrope = bool( + getattr(self.pos_embd_params, "mrope_interleaved", False) + ) and mrope_section is not None and position_ids.dim() == 3 + if use_mrope: + # [3, num_tokens] row-major (sec*num_tokens + token); the upstream 3D + # position_ids may be a non-contiguous view, and the op requires + # contiguous, so force it here. + position_ids_arg = position_ids.reshape(3, -1).contiguous().to( + torch.int32) + mrope_section1, mrope_section2 = mrope_section[1], mrope_section[2] + else: + position_ids_arg = position_ids.reshape(-1).contiguous().to( + torch.int32) + mrope_section1, mrope_section2 = 0, 0 + torch.ops.trtllm.fused_qk_norm_rope( qkv, self.num_heads, self.num_key_value_heads, self.num_key_value_heads, self.head_dim, rotary_dim, self.q_norm.variance_epsilon, self.q_norm.weight, - self.k_norm.weight, - self.pos_embd_params.rope.theta, self.pos_embd_params.is_neox, - position_ids.view(-1), factor, low, high, attention_factor, - self.is_qk_norm) + self.k_norm.weight, self.pos_embd_params.rope.theta, + self.pos_embd_params.is_neox, position_ids_arg, factor, low, high, + attention_factor, self.is_qk_norm, self.use_gemma_rms_norm, + use_mrope, mrope_section1, mrope_section2) return qkv, None, None def apply_rope(self, q: torch.Tensor, k: Optional[torch.Tensor], diff --git a/tensorrt_llm/_torch/pyexecutor/_util.py b/tensorrt_llm/_torch/pyexecutor/_util.py index addf98611597..1e96f88621b5 100644 --- a/tensorrt_llm/_torch/pyexecutor/_util.py +++ b/tensorrt_llm/_torch/pyexecutor/_util.py @@ -7,6 +7,7 @@ import tensorrt_llm import tensorrt_llm.bindings.executor as trtllm +from tensorrt_llm._torch.models.modeling_multimodal_utils import _is_mm_disagg from tensorrt_llm._torch.models.modeling_utils import \ MODEL_CLASS_VISION_ENCODER_MAPPING from tensorrt_llm._utils import (confidential_compute_enabled, get_sm_version, @@ -392,18 +393,8 @@ def _create_dummy_mm_context_request( multimodal_input = extra_processed_inputs.get( 'multimodal_input') multimodal_data = extra_processed_inputs.get('multimodal_data') - req_mm_input = trtllm.MultimodalInput( - multimodal_hashes=multimodal_input.multimodal_hashes, - multimodal_positions=multimodal_input.multimodal_positions, - multimodal_lengths=multimodal_input.multimodal_lengths, - multimodal_uuids=multimodal_input.multimodal_uuids, - multimodal_item_run_cu_offsets=multimodal_input. - multimodal_item_run_cu_offsets, - multimodal_run_positions=multimodal_input. - multimodal_run_positions, - multimodal_run_lengths=multimodal_input. - multimodal_run_lengths, - ) if multimodal_input else None + req_mm_input = multimodal_input.to_binding( + trtllm) if multimodal_input else None request = trtllm.Request(prompt_token_ids, max_tokens=1, @@ -445,9 +436,12 @@ def _create_dummy_mm_context_request( def _create_dummy_context_requests( self, input_seq_len: int) -> List[trtllm.Request]: requests = [] - if hasattr(self._model_engine.model, - "original_arch") and MODEL_CLASS_VISION_ENCODER_MAPPING.get( - self._model_engine.model.original_arch, None): + # Disaggregated workers receive multimodal embeddings instead of raw + # pixel inputs, so capacity probing must use the text-only fallback. + if (not _is_mm_disagg() + and hasattr(self._model_engine.model, "original_arch") + and MODEL_CLASS_VISION_ENCODER_MAPPING.get( + self._model_engine.model.original_arch, None)): requests = self._create_dummy_mm_context_request(input_seq_len) # if succeed profiling with multimodal requests then return, otherwise profile # with default case @@ -1761,6 +1755,8 @@ def create_py_executor_instance( execution_stream=execution_stream, waiting_queue_policy=waiting_queue_policy, dwdp_manager=dwdp_manager, + enable_kv_pool_rebalance=llm_args.kv_cache_config. + enable_kv_pool_rebalance, ) diff --git a/tensorrt_llm/_torch/pyexecutor/adp_iter_stats.py b/tensorrt_llm/_torch/pyexecutor/adp_iter_stats.py index 1f22061f4349..dff8d078eedb 100644 --- a/tensorrt_llm/_torch/pyexecutor/adp_iter_stats.py +++ b/tensorrt_llm/_torch/pyexecutor/adp_iter_stats.py @@ -50,6 +50,7 @@ class ADPIterStatsRecord: # step in lockstep, so this is a reasonable approximation. host_step_time_ms: Optional[float] = None prev_device_step_time_ms: Optional[float] = None + gpu_forward_time_ms: Optional[float] = None class ADPIterStatsBuffer: @@ -78,6 +79,7 @@ def __init__(self) -> None: # _make_rank_iter_stats / finalize). self._rank0_host_step_time_ms: Dict[int, Optional[float]] = {} self._rank0_prev_device_step_time_ms: Dict[int, Optional[float]] = {} + self._rank0_gpu_forward_time_ms: Dict[int, Optional[float]] = {} self._oldest_iter: Optional[int] = None @staticmethod @@ -105,6 +107,7 @@ def queue( is_rank0: bool, host_step_time_ms: Optional[float] = None, prev_device_step_time_ms: Optional[float] = None, + gpu_forward_time_ms: Optional[float] = None, ) -> None: """Queue local stats; rank 0 also keeps objects needed for fanout.""" payload = self.make_payload(stats) @@ -125,6 +128,7 @@ def queue( self._rank0_kv_iter_stats[iter_id] = kv_iter_stats self._rank0_host_step_time_ms[iter_id] = host_step_time_ms self._rank0_prev_device_step_time_ms[iter_id] = prev_device_step_time_ms + self._rank0_gpu_forward_time_ms[iter_id] = gpu_forward_time_ms def next_payload(self) -> Optional[RankIterStatsPayload]: """Return the oldest pending stats payload to piggyback.""" @@ -158,6 +162,7 @@ def _discard(self, iter_id: int, *, recompute_oldest: bool = True) -> None: self._rank0_kv_iter_stats.pop(iter_id, None) self._rank0_host_step_time_ms.pop(iter_id, None) self._rank0_prev_device_step_time_ms.pop(iter_id, None) + self._rank0_gpu_forward_time_ms.pop(iter_id, None) if recompute_oldest and iter_id == self._oldest_iter: self._recompute_oldest_iter() @@ -288,6 +293,7 @@ def finalize( kv_iter_stats = self._rank0_kv_iter_stats.get(iter_stats_iter) host_step_time_ms = self._rank0_host_step_time_ms.get(iter_stats_iter) prev_device_step_time_ms = self._rank0_prev_device_step_time_ms.get(iter_stats_iter) + gpu_forward_time_ms = self._rank0_gpu_forward_time_ms.get(iter_stats_iter) for rank_state in sorted(matching_states, key=lambda s: s.rank): rank = rank_state.rank @@ -299,6 +305,7 @@ def finalize( attention_dp_rank=rank, host_step_time_ms=host_step_time_ms, prev_device_step_time_ms=prev_device_step_time_ms, + gpu_forward_time_ms=gpu_forward_time_ms, ) ) diff --git a/tensorrt_llm/_torch/pyexecutor/config_utils.py b/tensorrt_llm/_torch/pyexecutor/config_utils.py index 757b262a0c88..2ab710bf14ac 100644 --- a/tensorrt_llm/_torch/pyexecutor/config_utils.py +++ b/tensorrt_llm/_torch/pyexecutor/config_utils.py @@ -267,6 +267,23 @@ def extract_mamba_kv_cache_params( ) +class _Qwen35MoeVLMConfig(transformers.Qwen3NextConfig): + """Thin subclass that restores the top-level model_type for Qwen3.5 MoE. + + ``_Qwen35ConfigCompat`` normalizes the HF config into Qwen3NextConfig + (needed by the PyTorch backend model), but that loses the original + ``model_type``. The serving layer needs ``model_type = "qwen3_5_moe"`` + for ``MULTIMODAL_PLACEHOLDER_REGISTRY`` lookup; without it, + ``resolve_top_level_model_type`` returns ``"qwen3_next"`` and multimodal + requests fail with "Unknown modality". + + To remove: when ``_Qwen35ConfigCompat`` is removed and the PyTorch backend + consumes ``Qwen3_5MoeConfig`` directly. + """ + + model_type = "qwen3_5_moe" + + class _Qwen35ConfigCompat: """Temporary shim that normalizes Qwen3.5 HF configs into Qwen3NextConfig. @@ -457,8 +474,11 @@ def load_pretrained_config(model_name_or_path: str, "Qwen3_5ForCausalLM", "Qwen3_5ForConditionalGeneration", )): - model_config = transformers.Qwen3NextConfig.from_dict( - _Qwen35ConfigCompat.normalize(config_dict)) + normalized = _Qwen35ConfigCompat.normalize(config_dict) + if model_type in ("qwen3_5_moe", "qwen3_5_moe_text"): + model_config = _Qwen35MoeVLMConfig.from_dict(normalized) + else: + model_config = transformers.Qwen3NextConfig.from_dict(normalized) elif (model_type == "exaone4" and config_dict.get("sliding_window") is None and config_dict.get("layer_types") is None): # transformers 5.5.x Exaone4Config.__post_init__ first forces diff --git a/tensorrt_llm/_torch/pyexecutor/connectors/kv_cache_connector.py b/tensorrt_llm/_torch/pyexecutor/connectors/kv_cache_connector.py index c024081088f4..f5034256e142 100644 --- a/tensorrt_llm/_torch/pyexecutor/connectors/kv_cache_connector.py +++ b/tensorrt_llm/_torch/pyexecutor/connectors/kv_cache_connector.py @@ -69,6 +69,13 @@ class RequestData: computed_position: int # The number of scheduled tokens for the upcoming forward pass. num_scheduled_tokens: int + # The cumulative chain of block hashes for full blocks of beam 0. Each entry + # is the hash that KV cache events will report for the corresponding block; + # the chain is read directly from the KV cache manager's stored block hashes + # rather than recomputed Python-side. May front-run the corresponding KV cache + # event emission slightly: when a block becomes full during generation, its + # hash is committed in the same scheduler step. + block_hashes: List[int] = field(default_factory=list) # The retention priorities for each new block (same length as new_block_ids). # Used for priority-based offload filtering. None means use default priority. priorities: Optional[List[int]] = None @@ -315,6 +322,11 @@ def update_and_build_data(self, req: LlmRequest, kv_cache_manager: "KVCacheManag block_ids = kv_cache_manager.get_cache_indices(req) tokens = req.get_tokens(0) + # Commit hashes for any blocks that have become full since the last call + # and read back the full cumulative chain. The C++ side sets each block's + # mBlockKey/mHash on first call, so subsequent calls become pure lookups. + block_hashes = kv_cache_manager.commit_and_get_block_hashes(req) + new_block_ids = block_ids[len(self.block_ids) :] new_tokens = tokens[len(self.tokens) :] @@ -347,7 +359,8 @@ def update_and_build_data(self, req: LlmRequest, kv_cache_manager: "KVCacheManag new_block_ids, computed_position, num_scheduled_tokens, - priorities, + block_hashes=block_hashes, + priorities=priorities, cache_salt_id=req.cache_salt_id, ) diff --git a/tensorrt_llm/_torch/pyexecutor/llm_request.py b/tensorrt_llm/_torch/pyexecutor/llm_request.py index 79cff4fde8af..21bdd6c0b3e4 100644 --- a/tensorrt_llm/_torch/pyexecutor/llm_request.py +++ b/tensorrt_llm/_torch/pyexecutor/llm_request.py @@ -12,6 +12,8 @@ from tensorrt_llm.sampling_params import LogprobMode SamplingConfig = tensorrt_llm.bindings.SamplingConfig + +MAX_SPEC_DECODE_POSITIONS = 16 ''' CONTEXT_INIT: typing.ClassVar[LlmRequestState] # value = ENCODER_INIT: typing.ClassVar[LlmRequestState] # value = @@ -395,21 +397,18 @@ def append_log_probs(self, self._log_probs.append(log_probs, cum_log_probs) def append_mm_embeddings(self, mm_embeddings: torch.Tensor, - multimodal_lengths: List[int]): + mm_embedding_lengths: List[int]): """Split concatenated embeddings by per-item lengths and create handles. Args: mm_embeddings: Concatenated multimodal embeddings tensor of shape [total_tokens, hidden_dim]. - multimodal_lengths: Current per-item split lengths. + mm_embedding_lengths: Per-item encoder-output embedding lengths. """ - # TODO(TRTLLM-12175): callers currently pass request.multimodal_lengths, - # a prompt-side MM-token count that may include non-embedding - # special/framing tokens. This split needs per-item encoder-output - # embedding lengths instead. - split_embeddings = torch.split(mm_embeddings, multimodal_lengths, dim=0) + split_embeddings = torch.split(mm_embeddings, + mm_embedding_lengths, + dim=0) - # Create a SharedTensorContainer handle for each split self._mm_embeddings = [ SharedTensorContainer.from_tensor(emb).dump_to_dict() for emb in split_embeddings @@ -421,10 +420,10 @@ def set_mrope_position( mrope_position_ids: torch.Tensor, mrope_position_deltas: torch.Tensor, ): - self._mrope_position_ids = (SharedTensorContainer.from_tensor( - mrope_position_ids).dump_to_dict()) - self._mrope_position_deltas = (SharedTensorContainer.from_tensor( - mrope_position_deltas).dump_to_dict()) + self._mrope_position_ids = SharedTensorContainer.from_tensor( + mrope_position_ids).dump_to_dict() + self._mrope_position_deltas = SharedTensorContainer.from_tensor( + mrope_position_deltas).dump_to_dict() self.diff.mrope_position_ids = self._mrope_position_ids self.diff.mrope_position_deltas = self._mrope_position_deltas @@ -660,7 +659,8 @@ def __init__( return_perf_metrics=return_perf_metrics, stop_words_list=torch.tensor(stop_words_list, dtype=torch.int32) if stop_words_list else None, - **kwargs) + **kwargs, + ) self.py_client_id = client_id self.py_request_id = self.request_id self.py_llm_request_type = self.llm_request_type @@ -684,6 +684,8 @@ def __init__( self.py_num_accepted_draft_tokens = 0 self.py_num_accepted_draft_tokens_indices = [] self.py_rewind_draft_token_separate_adjustment = 0 + self.py_per_pos_drafted = [0] * MAX_SPEC_DECODE_POSITIONS + self.py_per_pos_accepted = [0] * MAX_SPEC_DECODE_POSITIONS self.py_decoding_iter = 0 self.is_attention_dp_dummy = False self.is_cuda_graph_dummy = False @@ -941,6 +943,50 @@ def convert_wordlist(word_list) -> List[List[int]]: return [tokens, offsets] +def _validate_optional_int_list(values: Any, + field_name: str) -> Optional[List[int]]: + if values is None: + return None + if not isinstance(values, list): + raise TypeError(f"{field_name} must be a list") + if not all(isinstance(value, int) for value in values): + raise TypeError(f"{field_name} must contain only integers") + return values + + +def get_multimodal_embedding_lengths( + request: LlmRequest) -> Optional[List[int]]: + """Return explicit per-item encoder-output lengths for a multimodal request.""" + py_multimodal_data = request.py_multimodal_data + if py_multimodal_data is not None and not isinstance( + py_multimodal_data, dict): + raise TypeError("py_multimodal_data must be a dict") + # `multimodal_embedding_lengths` is Python-side layout metadata, not a + # nanobind request field, so validate the flat handoff contract here. + multimodal_embedding_lengths = _validate_optional_int_list( + py_multimodal_data.get("multimodal_embedding_lengths") + if py_multimodal_data is not None else None, + "multimodal_embedding_lengths") + if multimodal_embedding_lengths is None: + return None + + if any(length < 0 for length in multimodal_embedding_lengths): + raise ValueError("multimodal_embedding_lengths must be non-negative") + multimodal_lengths = request.multimodal_lengths + if multimodal_lengths is not None: + if len(multimodal_embedding_lengths) != len(multimodal_lengths): + raise ValueError("multimodal_embedding_lengths length must match " + "multimodal_lengths") + for item_idx, (embedding_length, prompt_length) in enumerate( + zip(multimodal_embedding_lengths, multimodal_lengths)): + if embedding_length > prompt_length: + raise ValueError( + f"multimodal_embedding_lengths[{item_idx}] exceeds " + f"multimodal_lengths[{item_idx}]") + + return multimodal_embedding_lengths + + def executor_request_to_llm_request( req_id: int, executor_request: ExecutorRequest, diff --git a/tensorrt_llm/_torch/pyexecutor/mamba_cache_manager.py b/tensorrt_llm/_torch/pyexecutor/mamba_cache_manager.py index 58435ce36516..7f1af74d4c83 100644 --- a/tensorrt_llm/_torch/pyexecutor/mamba_cache_manager.py +++ b/tensorrt_llm/_torch/pyexecutor/mamba_cache_manager.py @@ -1712,8 +1712,6 @@ def _prepare_resources(self, scheduled_batch: ScheduledRequests): # we skip refresh_blocks entirely when nothing was scheduled. self._pending_state_transfers = self.impl.copy_linear_attention_block_batch( self.requests) - if self._pending_state_transfers: - logger.info(f"Need to transfer mamba state blocks") self._setup_state_indices() num_contexts = len(scheduled_batch.context_requests) if num_contexts > 0: diff --git a/tensorrt_llm/_torch/pyexecutor/model_engine.py b/tensorrt_llm/_torch/pyexecutor/model_engine.py index b5ab2964b1c0..65e4eb5fa49d 100644 --- a/tensorrt_llm/_torch/pyexecutor/model_engine.py +++ b/tensorrt_llm/_torch/pyexecutor/model_engine.py @@ -20,6 +20,7 @@ from tensorrt_llm.bindings.internal.runtime import TaskLayerModuleConfig from tensorrt_llm.inputs.multimodal import (MultimodalParams, MultimodalRuntimeData, + _has_mm_payload_keys, check_mm_embed_cumsum_if_needed) from tensorrt_llm.inputs.registry import (create_input_processor, create_input_processor_with_hash) @@ -67,7 +68,8 @@ EncoderCUDAGraphRunnerConfig) from .guided_decoder import CapturableGuidedDecoder from .layerwise_nvtx_marker import LayerwiseNvtxMarker -from .llm_request import LlmRequest, get_draft_token_length +from .llm_request import (LlmRequest, get_draft_token_length, + get_multimodal_embedding_lengths) from .mamba_cache_manager import MambaHybridCacheManager from .model_loader import ModelLoader, _construct_checkpoint_loader from .resource_manager import (BaseResourceManager, KVCacheManager, @@ -625,6 +627,7 @@ def __init__( # with different KV cache managers. self.kv_cache_manager_key = ResourceManagerType.DRAFT_KV_CACHE_MANAGER if is_draft_model else ResourceManagerType.KV_CACHE_MANAGER self.lora_model_config: Optional[LoraModelConfig] = None + self._trtllm_gen_jit_warmup = False # Create config and runner cuda_graph_runner_config = CUDAGraphRunnerConfig( @@ -938,6 +941,8 @@ def warmup(self, resource_manager: ResourceManager) -> None: and self.guided_decoder is None and not isinstance(kv_cache_manager, MambaHybridCacheManager)) + self._run_attention_warmup(resource_manager, can_run_general_warmup) + if can_run_general_warmup: # Specialize torch.compile graphs across the key input shapes before CUDA graph capture. warmup_requests_configs = self._get_full_general_warmup_requests( @@ -1034,6 +1039,55 @@ def _general_warmup_impl( f"{num_gen_tokens} generation tokens. Skipping.") torch.cuda.empty_cache() + def _run_attention_warmup(self, + resource_manager: ResourceManager, + can_run_general_warmup: bool = True) -> None: + if not issubclass(self.attn_backend.Metadata, TrtllmAttentionMetadata): + return + + @contextlib.contextmanager + def trtllm_gen_fmha_jit_warmup(): + previous = self._trtllm_gen_jit_warmup + self._trtllm_gen_jit_warmup = True + try: + yield + finally: + self._trtllm_gen_jit_warmup = previous + + logger.info("Running TRTLLM-Gen FMHA JIT warmup") + + warmup_requests_configs = [] + if not self.is_draft_model and self.guided_decoder is None: + # doesn't support 2-model speculative draft and guided decoding + warmup_requests_configs.append( + (1 + self.max_total_draft_tokens, 1)) # one generation request + else: + logger.debug("Skipped TRTLLM-Gen FMHA JIT warmup for Gen kernels") + + if can_run_general_warmup: + warmup_requests_configs.append((1, 0)) # one context token + else: + logger.debug("Skipped TRTLLM-Gen FMHA JIT warmup for Ctx kernels") + + for num_tokens, num_gen_requests in warmup_requests_configs: + warmup_request = self._create_warmup_request( + resource_manager, + num_tokens=num_tokens, + num_gen_requests=num_gen_requests) + + with self.no_cuda_graph(), self._release_batch_context( + warmup_request, resource_manager) as batch: + if batch is None and self.mapping.tp_size <= 1: + continue # Not enough KV cache space (single rank, safe to skip) + self._assert_all_tp_ranks_have_warmup_batch(batch, num_tokens) + if batch is None: + continue # All ranks agree: not enough space + with trtllm_gen_fmha_jit_warmup(): + self.forward(batch, + new_tensors_device=None, + resource_manager=resource_manager) + torch.cuda.synchronize() + def _run_autotuner_warmup(self, resource_manager: ResourceManager): """Runs a forward pass to populate the autotuner cache.""" if not self.llm_args.enable_autotuner: @@ -1984,19 +2038,6 @@ def _get_all_rank_ctx_requests(self, num_ctx_requests: int): return list(self.dist.tp_allgather(num_ctx_requests)) return None - def _set_spec_metadata_all_rank_num_tokens( - self, spec_metadata: SpecMetadata, - spec_all_rank_num_tokens: List[int], - all_rank_num_seqs: List[int]) -> None: - # Eagle3 / MTP-eagle one-model use subseq_all_rank_num_tokens for - # draft loop iterations i>0 (per-sequence counts, since each - # sequence contributes one token per iteration). - spec_metadata.all_rank_num_tokens = spec_all_rank_num_tokens - spec_metadata.all_rank_num_seqs = all_rank_num_seqs - if (spec_metadata.spec_dec_mode.is_mtp_eagle_one_model() - or spec_metadata.spec_dec_mode.is_eagle3_one_model()): - spec_metadata.subseq_all_rank_num_tokens = all_rank_num_seqs - def _get_padding_params( self, total_num_tokens: int, num_ctx_requests: int, attn_all_rank_num_tokens: Optional[List[int]] @@ -2205,9 +2246,12 @@ def _prepare_incremental_update_metadata( all_rank_num_tokens = self.dist.tp_cp_allgather( [spec_metadata.num_tokens, len(sequence_lengths)]) - self._set_spec_metadata_all_rank_num_tokens( - spec_metadata, [item[0] for item in all_rank_num_tokens], - [item[1] for item in all_rank_num_tokens]) + spec_metadata.all_rank_num_tokens = [ + item[0] for item in all_rank_num_tokens + ] + spec_metadata.all_rank_num_seqs = [ + item[1] for item in all_rank_num_tokens + ] # Set iteration states - batch dictionary updates self.iter_states.update({ @@ -3429,9 +3473,13 @@ def previous_seq_slots_device(): all_rank_num_tokens = self.dist.tp_cp_allgather( [spec_metadata.num_tokens, len(sequence_lengths)]) - self._set_spec_metadata_all_rank_num_tokens( - spec_metadata, [item[0] for item in all_rank_num_tokens], - [item[1] for item in all_rank_num_tokens]) + + spec_all_rank_num_tokens = [ + item[0] for item in all_rank_num_tokens + ] + all_rank_num_seqs = [item[1] for item in all_rank_num_tokens] + spec_metadata.all_rank_num_tokens = spec_all_rank_num_tokens + spec_metadata.all_rank_num_seqs = all_rank_num_seqs if mm_token_indices is not None: mask = torch.ones(total_num_tokens, dtype=torch.bool) @@ -3593,12 +3641,16 @@ def _prepare_tp_inputs_no_cache( attn_metadata.num_tokens, spec_metadata.num_tokens, len(sequence_lengths) ]) - attn_metadata.all_rank_num_tokens = [ + attn_all_rank_num_tokens = [ item[0] for item in all_rank_num_tokens ] - self._set_spec_metadata_all_rank_num_tokens( - spec_metadata, [item[1] for item in all_rank_num_tokens], - [item[2] for item in all_rank_num_tokens]) + spec_all_rank_num_tokens = [ + item[1] for item in all_rank_num_tokens + ] + all_rank_num_seqs = [item[2] for item in all_rank_num_tokens] + attn_metadata.all_rank_num_tokens = attn_all_rank_num_tokens + spec_metadata.all_rank_num_tokens = spec_all_rank_num_tokens + spec_metadata.all_rank_num_seqs = all_rank_num_seqs else: all_rank_num_tokens = self.dist.tp_cp_allgather( attn_metadata.num_tokens) @@ -4405,6 +4457,8 @@ def forward(self, attn_metadata = self._set_up_attn_metadata(kv_cache_manager, draft_kv_cache_manager) + if isinstance(attn_metadata, TrtllmAttentionMetadata): + attn_metadata.trtllm_gen_jit_warmup = self._trtllm_gen_jit_warmup if self.enable_spec_decode: spec_resource_manager = resource_manager.get_resource_manager( ResourceManagerType.SPEC_RESOURCE_MANAGER) @@ -4640,41 +4694,63 @@ def _forward_step_mm_encoder_only( multimodal_params = inputs.get("multimodal_params", []) if not multimodal_params or len(multimodal_params) == 0: # Return empty embeddings if no multimodal data - return {'mm_embeddings': []} - # TODO(TRTLLM-12175): split encoder outputs by explicit per-request - # encoder-output embedding lengths. multimodal_lengths is a - # prompt-side MM-token count and may include non-embedding - # special/framing tokens. - if getattr(scheduled_requests.context_requests[0], 'multimodal_lengths', - None) is None: - multimodal_chunks = None - else: - multimodal_chunks = [ - sum(request.multimodal_lengths) - for request in scheduled_requests.context_requests - if request.multimodal_lengths is not None - ] + return { + 'mm_embeddings': [], + 'mm_embedding_request_indices': [], + 'mm_embedding_lengths': [], + } + # Some ctx requests carry only mrope metadata (no actual vision + # content). Skip them so the encoder only runs on real image payloads. + mm_context_requests = [(request_idx, request) for request_idx, request + in enumerate(scheduled_requests.context_requests) + if request.py_multimodal_data is not None] + if len(mm_context_requests) != len(multimodal_params): + raise ValueError( + "mm_encoder_only expects one multimodal payload per context " + "request carrying py_multimodal_data") + mm_request_indices_with_payload = [] + mm_params_with_payload = [] + mm_embedding_lengths = [] + for (request_idx, + request), multimodal_param in zip(mm_context_requests, + multimodal_params): + if not _has_mm_payload_keys(request.py_multimodal_data): + # mrope-only warmup request (no actual vision content) -> skip. + continue + multimodal_embedding_lengths = get_multimodal_embedding_lengths( + request) + if multimodal_embedding_lengths is None: + # Vision payload keys present but no pre-computed embedding + # lengths — skip to avoid a downstream sum(None) TypeError. + continue + mm_request_indices_with_payload.append(request_idx) + mm_params_with_payload.append(multimodal_param) + mm_embedding_lengths.append(multimodal_embedding_lengths) + if not mm_params_with_payload: + return { + 'mm_embeddings': [], + 'mm_embedding_request_indices': [], + 'mm_embedding_lengths': [], + } # For mm_encoder_only mode, we only run the vision encoder part # The model should be a vision encoder (e.g., Qwen2VisionModelBase) - mm_embeddings = self.model.forward(multimodal_params) + mm_embeddings = self.model.forward(mm_params_with_payload) assert len( mm_embeddings ) == 1, "mm_embeddings should be a 1-element list, mix modality (video+image) is not supported" - if multimodal_chunks is None or len(multimodal_chunks) != len( - multimodal_params): - mm_embeddings = list( - torch.chunk(mm_embeddings[0], - scheduled_requests.num_context_requests, - dim=0)) - else: - mm_embeddings = list( - torch.split(mm_embeddings[0], multimodal_chunks, dim=0)) + split_lengths = [sum(lengths) for lengths in mm_embedding_lengths] + mm_embeddings = list(torch.split(mm_embeddings[0], split_lengths, + dim=0)) + if len(mm_embeddings) != len(mm_embedding_lengths): + raise ValueError( + "mm_encoder_only produced an embedding batch that does not " + "match mm_embedding_lengths") # Extract mrope position data from multimodal_params if available mrope_position_ids_list = [] mrope_position_deltas_list = [] - for multimodal_param in multimodal_params: + for multimodal_param in mm_params_with_payload: mrope_config = multimodal_param.multimodal_data.get( 'mrope_config', {}) mrope_position_ids = mrope_config.get('mrope_position_ids') @@ -4684,7 +4760,21 @@ def _forward_step_mm_encoder_only( if mrope_position_deltas is not None: mrope_position_deltas_list.append(mrope_position_deltas) - result = {'mm_embeddings': mm_embeddings, 'logits': None} + # mrope lists must align 1:1 with multimodal_params (or be empty); + # the sampler indexes them by per-MM-result position into mm_embeddings. + assert (len(mrope_position_ids_list) == len(mrope_position_deltas_list) + and len(mrope_position_ids_list) + in (0, len(mm_params_with_payload))), ( + f"mrope alignment: got {len(mrope_position_ids_list)} ids, " + f"{len(mrope_position_deltas_list)} deltas, " + f"{len(mm_params_with_payload)} mm params") + + result = { + 'mm_embeddings': mm_embeddings, + 'logits': None, + 'mm_embedding_request_indices': mm_request_indices_with_payload, + 'mm_embedding_lengths': mm_embedding_lengths, + } if mrope_position_ids_list: result['mrope_position_ids'] = mrope_position_ids_list if mrope_position_deltas_list: diff --git a/tensorrt_llm/_torch/pyexecutor/perf_metrics_manager.py b/tensorrt_llm/_torch/pyexecutor/perf_metrics_manager.py index 4d8d8351e2aa..cb13757956a0 100644 --- a/tensorrt_llm/_torch/pyexecutor/perf_metrics_manager.py +++ b/tensorrt_llm/_torch/pyexecutor/perf_metrics_manager.py @@ -29,6 +29,7 @@ def __init__(self, enabled: bool): self.enabled = enabled self._perf_events = None self._perf_event_idx = 0 + self._forward_event_pool = [] # ------------------------------------------------------------------ # GPU event helpers @@ -45,8 +46,8 @@ def create_timing_events(self): Returns: Tuple of ``(gpu_forward_start, gpu_forward_end, - gpu_sample_end)`` or ``(None, None, None)`` if metrics are - disabled. + gpu_sample_end)`` or ``(None, None, None)`` if per-request perf + metrics are disabled. """ if not self.enabled: return None, None, None @@ -60,6 +61,16 @@ def create_timing_events(self): self._perf_event_idx += 1 return events + def borrow_forward_timing_events(self): + """Borrow a forward-only pair when the ping-pong perf events are unavailable.""" + if self._forward_event_pool: + return self._forward_event_pool.pop() + return (torch.cuda.Event(enable_timing=True), torch.cuda.Event(enable_timing=True)) + + def release_forward_timing_events(self, start_event, end_event) -> None: + if start_event is not None and end_event is not None: + self._forward_event_pool.append((start_event, end_event)) + @contextmanager def record_perf_events( self, start_event: Optional[torch.cuda.Event], end_event: Optional[torch.cuda.Event] @@ -105,6 +116,22 @@ def get_timestamp(self) -> Optional[float]: """Return a CPU timestamp if metrics are enabled, else ``None``.""" return get_steady_clock_now_in_seconds() if self.enabled else None + @staticmethod + def try_compute_gpu_elapsed_time_ms( + start_event: Optional[torch.cuda.Event], + end_event: Optional[torch.cuda.Event], + ) -> Optional[float]: + """Return CUDA-event elapsed time if ready, without synchronizing.""" + if start_event is None or end_event is None: + return None + try: + if not end_event.query(): + return None + return float(start_event.elapsed_time(end_event)) + except RuntimeError as e: + logger.warning("Failed to compute GPU event elapsed_time: %s", e) + return None + @staticmethod def save_timing_to_requests( requests, diff --git a/tensorrt_llm/_torch/pyexecutor/py_executor.py b/tensorrt_llm/_torch/pyexecutor/py_executor.py index 4d4de1a5d03c..2e8f1c5bfb74 100644 --- a/tensorrt_llm/_torch/pyexecutor/py_executor.py +++ b/tensorrt_llm/_torch/pyexecutor/py_executor.py @@ -37,6 +37,7 @@ from tensorrt_llm.logger import logger from tensorrt_llm.mapping import CpType from tensorrt_llm.runtime.generation import CUASSERT +from tensorrt_llm.runtime.kv_cache_manager_v2._exceptions import OutOfPagesError from tensorrt_llm.tools.layer_wise_benchmarks import get_calibrator from tensorrt_llm.tools.profiler.host_profile_tools.host_profiler import ( get_global_profiler, host_profiler_context) @@ -60,7 +61,8 @@ from .handle_logits import HandleLogits from .hang_detector import HangDetector from .kv_cache_transceiver import KvCacheTransceiver -from .llm_request import (ATTENTION_DP_DUMMY_REQUEST_ID, ExecutorRequest, +from .llm_request import (ATTENTION_DP_DUMMY_REQUEST_ID, + MAX_SPEC_DECODE_POSITIONS, ExecutorRequest, LlmRequest, LlmRequestState, LlmResponse, get_draft_token_length) from .mamba_cache_manager import (BaseMambaCacheManager, @@ -143,6 +145,18 @@ def _strip_py_multimodal_data_post_prefill(request: LlmRequest) -> None: strip_mm_data_for_generation(mm_data) +@dataclasses.dataclass +class ScheduledBatchStats: + # None means the counter was not captured and _update_iter_stats should + # fall back to the existing scheduled_batch/request accessors. + num_ctx_requests: Optional[int] = None + num_ctx_tokens: Optional[int] = None + num_ctx_kv_tokens: Optional[int] = None + num_gen_requests: Optional[int] = None + num_gen_kv_tokens: Optional[int] = None + num_paused_requests: Optional[int] = None + + @dataclasses.dataclass class BatchState: scheduled_requests: ScheduledRequests @@ -150,6 +164,10 @@ class BatchState: iter_start_time: float = 0 iter_stats: IterationStats = None + scheduled_batch_stats: Optional[ScheduledBatchStats] = None + gpu_forward_start_event: Optional[torch.cuda.Event] = None + gpu_forward_end_event: Optional[torch.cuda.Event] = None + gpu_forward_events_from_perf_pool: bool = False @dataclasses.dataclass @@ -313,7 +331,8 @@ def __init__( execution_stream: Optional[torch.cuda.Stream] = None, waiting_queue_policy: WaitingQueuePolicy = WaitingQueuePolicy.FCFS, adp_router: Optional[ADPRouter] = None, - dwdp_manager: Optional[DwdpManager] = None): + dwdp_manager: Optional[DwdpManager] = None, + enable_kv_pool_rebalance: bool = False): super(PyExecutor, self).__init__() self.device_id = torch.cuda.current_device() self.global_rank = dist.rank @@ -346,6 +365,7 @@ def __init__( None) self.guided_decoder = guided_decoder self.disable_overlap_scheduler = disable_overlap_scheduler + self.enable_kv_pool_rebalance = enable_kv_pool_rebalance self.enable_early_first_token_response = enable_early_first_token_response self.virtual_memory_pools = virtual_memory_pools @@ -1276,6 +1296,60 @@ def _get_init_iter_stats(self, num_new_active_requests, return stats + @staticmethod + def _is_stats_dummy_request(req) -> bool: + return bool(getattr(req, "is_dummy", False)) + + def _collect_scheduled_batch_stats( + self, scheduled_batch: ScheduledRequests) -> ScheduledBatchStats: + """Collect scheduled-batch counters before forward mutates requests.""" + filter_dummies = getattr(self, "enable_attention_dp", False) + + num_context_requests = 0 + num_ctx_tokens = 0 + num_ctx_kv_tokens = 0 + for req in scheduled_batch.context_requests: + if filter_dummies and self._is_stats_dummy_request(req): + continue + num_context_requests += 1 + try: + start = req.context_current_position + chunk = req.context_chunk_size + except RuntimeError: + last_chunk = getattr(req, "py_last_context_chunk", None) + if last_chunk is None or last_chunk[0] is None: + continue + start, end = last_chunk + chunk = end - start + num_ctx_tokens += chunk + num_ctx_kv_tokens += start + + num_gen_requests = 0 + num_gen_kv_tokens = 0 + for req in scheduled_batch.generation_requests: + if filter_dummies and self._is_stats_dummy_request(req): + continue + num_gen_requests += 1 + try: + num_gen_kv_tokens += req.get_num_tokens(0) + except RuntimeError: + pass + + num_paused_requests = 0 + for req in scheduled_batch.paused_requests: + if filter_dummies and self._is_stats_dummy_request(req): + continue + num_paused_requests += 1 + + return ScheduledBatchStats( + num_ctx_requests=num_context_requests, + num_ctx_tokens=num_ctx_tokens, + num_ctx_kv_tokens=num_ctx_kv_tokens, + num_gen_requests=num_gen_requests, + num_gen_kv_tokens=num_gen_kv_tokens, + num_paused_requests=num_paused_requests, + ) + def _populate_req_stats( self, finished_requests: List[LlmRequest], active_requests: List[LlmRequest], @@ -1332,9 +1406,17 @@ def get_queued_req_stats(request_id: int) -> RequestStats: return req_stats - def _update_iter_stats(self, stats, iter_latency_ms, num_completed_requests, - scheduled_batch, micro_batch_id) -> IterationStats: + def _update_iter_stats( + self, + stats, + iter_latency_ms, + num_completed_requests, + scheduled_batch, + micro_batch_id, + scheduled_batch_stats: Optional[ScheduledBatchStats] = None + ) -> IterationStats: stats.iter_latency_ms = iter_latency_ms + scheduled_batch_stats = (scheduled_batch_stats or ScheduledBatchStats()) stats.num_queued_requests = self.executor_request_queue.get_request_queue_size( ) @@ -1379,9 +1461,6 @@ def _update_iter_stats(self, stats, iter_latency_ms, num_completed_requests, else: self._latest_kv_iter_stats = None - def is_stats_dummy_request(req) -> bool: - return bool(getattr(req, "is_dummy", False)) - # Attention-DP may add dummy requests to keep ranks aligned during # distributed scheduling. CUDA graph padding can add dummies too. # Those placeholders are not user work, so count the request lists @@ -1392,17 +1471,26 @@ def is_stats_dummy_request(req) -> bool: # from treating dummy requests as real load. num_context_requests = sum( 1 for req in scheduled_batch.context_requests - if not is_stats_dummy_request(req)) + if not self._is_stats_dummy_request(req)) num_gen_requests = sum( 1 for req in scheduled_batch.generation_requests - if not is_stats_dummy_request(req)) + if not self._is_stats_dummy_request(req)) num_paused_requests = sum(1 for req in scheduled_batch.paused_requests - if not is_stats_dummy_request(req)) + if not self._is_stats_dummy_request(req)) else: num_context_requests = scheduled_batch.num_context_requests num_gen_requests = scheduled_batch.num_generation_requests num_paused_requests = len(scheduled_batch.paused_requests) + num_context_requests = int( + scheduled_batch_stats.num_ctx_requests if scheduled_batch_stats. + num_ctx_requests is not None else num_context_requests) + num_gen_requests = int( + scheduled_batch_stats.num_gen_requests if scheduled_batch_stats. + num_gen_requests is not None else num_gen_requests) + num_paused_requests = int( + scheduled_batch_stats.num_paused_requests if scheduled_batch_stats. + num_paused_requests is not None else num_paused_requests) stats.inflight_batching_stats.num_context_requests = num_context_requests stats.inflight_batching_stats.num_gen_requests = num_gen_requests @@ -1469,6 +1557,10 @@ def is_stats_dummy_request(req) -> bool: # num_context_requests / num_gen_requests / num_ctx_tokens / # num_paused_requests members with token-weighted counts and # queue/paused KV accounting. + stats.inflight_batching_stats.num_ctx_tokens = int( + scheduled_batch_stats.num_ctx_tokens if scheduled_batch_stats. + num_ctx_tokens is not None else stats.inflight_batching_stats. + num_ctx_tokens) # Tokens read from prior state (prefix-cache hits and # previously-chunked tokens) summed across scheduled context @@ -1480,30 +1572,36 @@ def is_stats_dummy_request(req) -> bool: # getContextCurrentPosition() accessors that would raise # RuntimeError on a mutated request. num_ctx_kv_tokens = 0 - for req in scheduled_batch.context_requests: - if is_stats_dummy_request(req): - continue - last_chunk = getattr(req, "py_last_context_chunk", None) - if last_chunk is not None and last_chunk[0] is not None: - start, _end = last_chunk - num_ctx_kv_tokens += start - else: - try: - num_ctx_kv_tokens += \ - req.context_current_position - except RuntimeError: - pass + if scheduled_batch_stats.num_ctx_kv_tokens is not None: + num_ctx_kv_tokens = int(scheduled_batch_stats.num_ctx_kv_tokens) + else: + for req in scheduled_batch.context_requests: + if self._is_stats_dummy_request(req): + continue + last_chunk = getattr(req, "py_last_context_chunk", None) + if last_chunk is not None and last_chunk[0] is not None: + start, _end = last_chunk + num_ctx_kv_tokens += start + else: + try: + num_ctx_kv_tokens += \ + req.context_current_position + except RuntimeError: + pass # Total KV context length (prompt + tokens generated so far) # summed across scheduled generation requests. num_gen_kv_tokens = 0 - for req in scheduled_batch.generation_requests: - if is_stats_dummy_request(req): - continue - try: - num_gen_kv_tokens += req.get_num_tokens(0) - except RuntimeError: - pass + if scheduled_batch_stats.num_gen_kv_tokens is not None: + num_gen_kv_tokens = int(scheduled_batch_stats.num_gen_kv_tokens) + else: + for req in scheduled_batch.generation_requests: + if self._is_stats_dummy_request(req): + continue + try: + num_gen_kv_tokens += req.get_num_tokens(0) + except RuntimeError: + pass # Normal requests waiting in the executor_request_queue that have # never been scheduled. Excludes non-normal control items @@ -1550,7 +1648,7 @@ def is_stats_dummy_request(req) -> bool: # pool for this iteration. num_paused_kv_tokens = 0 for req in scheduled_batch.paused_requests: - if is_stats_dummy_request(req): + if self._is_stats_dummy_request(req): continue try: num_paused_kv_tokens += req.get_num_tokens(0) @@ -1573,7 +1671,8 @@ def _append_iter_stats(self, kv_iter_stats: Optional[Dict[int, object]] = None, attention_dp_rank: Optional[int] = None, host_step_time_ms: Optional[float] = None, - prev_device_step_time_ms: Optional[float] = None): + prev_device_step_time_ms: Optional[float] = None, + gpu_forward_time_ms: Optional[float] = None): """Append one iteration's finalized stats to the export buffer. The normal Attention-DP path fans out rank-local rows before calling @@ -1596,6 +1695,9 @@ def _append_iter_stats(self, value lags by one loop relative to ``host_step_time_ms`` (its sibling on the same record describes a slightly older batch); see _profiler ping-pong comment. + gpu_forward_time_ms: Batch-matched GPU forward time captured by + the events surrounding this batch's ``_forward_step``. + Surfaces as ``gpuForwardTimeMS`` in the /metrics JSON. """ # Non-ADP appends immediately, so the latest KV stats belong to this # IterationStats. ADP appends later and passes the saved iter-matched @@ -1664,6 +1766,8 @@ def _append_iter_stats(self, local_dict["hostStepTimeMS"] = host_step_time_ms if prev_device_step_time_ms is not None: local_dict["prevDeviceStepTimeMS"] = prev_device_step_time_ms + if gpu_forward_time_ms is not None: + local_dict["gpuForwardTimeMS"] = gpu_forward_time_ms local_dict["schedulerMode"] = scheduler_mode local_dict["rank"] = self.dist.tp_rank @@ -1695,12 +1799,14 @@ def _append_iter_stats(self, # [4] host_step_time_ms: Optional[float] # [5] prev_device_step_time_ms: Optional[float] # [6] scheduler_mode: "overlap" | "non_overlap" + # [7] gpu_forward_time_ms: Optional[float] with self.stats_lock: if len(self.stats) > self.max_stats_len: self.stats.pop(0) self.stats.append( (stats, req_stats, kv_iter_stats, attention_dp_rank, - host_step_time_ms, prev_device_step_time_ms, scheduler_mode)) + host_step_time_ms, prev_device_step_time_ms, scheduler_mode, + gpu_forward_time_ms)) def _process_iter_stats( self, @@ -1726,15 +1832,25 @@ def _process_iter_stats( # consumers which interpretation applies. iter_latency_ms = (iter_end_time - batch_state.iter_start_time) * 1e3 if batch_state.iter_stats is None: + if batch_state.gpu_forward_events_from_perf_pool: + self.perf_manager.release_forward_timing_events( + batch_state.gpu_forward_start_event, + batch_state.gpu_forward_end_event) return - # Snapshot the per-loop CPU and GPU timings captured by the most - # recent profile_step. These belong to the loop that BUILT this - # batch (host wall) and the loop one earlier than that for the GPU - # forward (per the ping-pong design). Save them now so the values - # ride along with the IterationStats through any ADP fanout delay. + # Snapshot per-loop profiler timings plus the batch-matched GPU + # forward time. The FPM GPU value is read from CUDA events without + # synchronizing here; the normal sampler/update path has already + # established the required completion point for processed batches. host_step_time_ms = self._latest_host_step_time_ms prev_device_step_time_ms = self._latest_prev_device_step_time_ms + gpu_forward_time_ms = self.perf_manager.try_compute_gpu_elapsed_time_ms( + batch_state.gpu_forward_start_event, + batch_state.gpu_forward_end_event) + if batch_state.gpu_forward_events_from_perf_pool: + self.perf_manager.release_forward_timing_events( + batch_state.gpu_forward_start_event, + batch_state.gpu_forward_end_event) req_stats = self._populate_req_stats( finished_requests, active_requests, @@ -1745,7 +1861,8 @@ def _process_iter_stats( stats = self._update_iter_stats(batch_state.iter_stats, iter_latency_ms, len(finished_requests), batch_state.scheduled_requests, - micro_batch_id) + micro_batch_id, + batch_state.scheduled_batch_stats) if self.enable_attention_dp: self._adp_iter_stats.queue( stats, @@ -1753,13 +1870,15 @@ def _process_iter_stats( kv_iter_stats=self._latest_kv_iter_stats, is_rank0=self.dist.rank == 0, host_step_time_ms=host_step_time_ms, - prev_device_step_time_ms=prev_device_step_time_ms) + prev_device_step_time_ms=prev_device_step_time_ms, + gpu_forward_time_ms=gpu_forward_time_ms) else: self._append_iter_stats( stats, req_stats, host_step_time_ms=host_step_time_ms, - prev_device_step_time_ms=prev_device_step_time_ms) + prev_device_step_time_ms=prev_device_step_time_ms, + gpu_forward_time_ms=gpu_forward_time_ms) def _executor_loop_cleanup(self): # Wake any waiters in await_responses BEFORE potentially-blocking @@ -1933,14 +2052,18 @@ def _executor_loop_pp(self): # _check_disagg_ctx_cache_transfer_status together or skips # it together, so the internal allgather in # CacheTransceiver::checkContextTransferStatus always has - # full quorum. With PP > 1 the schedule is broadcast from - # rank 0 so num_fitting_reqs should already be uniform, but - # has_any_inflight_requests is rank-local and could - # otherwise diverge. + # full quorum. The C++ syncComm inside that helper is at + # most TP-wide (mGroupTensorParaComm; mGroupTPInDPComm + # with attention_dp), so a TP-scoped OR vote is sufficient. + # Using WORLD allreduce here serialized the disagg prefill + # host loop on every iter (nvbug/6280060). local_need_check = (num_fitting_reqs == 0 and not fitting_disagg_gen_init_requests) - any_need_check = self.dist.allreduce(int(local_need_check), - op=ReduceOp.MAX) + if self.dist.tp_size > 1: + any_need_check = self.dist.tp_allreduce( + int(local_need_check), op=ReduceOp.MAX) + else: + any_need_check = int(local_need_check) if any_need_check > 0: if local_need_check and not all_gen_first: logger.warning( @@ -1994,13 +2117,25 @@ def _executor_loop_pp(self): # Return the first token to the client self._handle_first_token_response(scheduled_batch) + scheduled_batch_stats = ( + self._collect_scheduled_batch_stats(scheduled_batch) + if self.enable_iter_perf_stats else None) + gpu_forward_start = None + gpu_forward_end = None + gpu_forward_events_from_perf_pool = False + if self.enable_iter_perf_stats: + gpu_forward_start, gpu_forward_end = self.perf_manager.borrow_forward_timing_events( + ) + gpu_forward_events_from_perf_pool = True + # Stage 1.1: Async forward (all ranks) and decoding pass (last rank only) if not self.dist.is_last_pp_rank: with torch.cuda.nvtx.range( f"_forward_step_inter_pp pp_rank {self.dist.pp_rank}" ): sample_state = self._forward_step_inter_pp( - scheduled_batch) + scheduled_batch, gpu_forward_start, + gpu_forward_end) else: with torch.cuda.nvtx.range( f"_forward_step_last_pp pp_rank {self.dist.pp_rank}" @@ -2010,7 +2145,10 @@ def _executor_loop_pp(self): self.guided_decoder.add_batch(scheduled_batch) self.guided_decoder.init_disagg_gen_requests() - batch_outputs = self._forward_step(scheduled_batch) + with self.perf_manager.record_perf_events( + gpu_forward_start, gpu_forward_end): + batch_outputs = self._forward_step( + scheduled_batch) guided_decoder_failed_requests = None if self.guided_decoder is not None: @@ -2050,14 +2188,16 @@ def _executor_loop_pp(self): self._update_generation_requests_that_will_complete_next_iteration( scheduled_batch.generation_requests) - if self.enable_iter_perf_stats: - iter_stats.inflight_batching_stats.num_ctx_tokens = self.model_engine.iter_states[ - 'num_ctx_tokens'] batch_state = BatchStatePP( scheduled_requests=scheduled_batch, sample_state=sample_state, iter_start_time=iter_start_time, iter_stats=iter_stats, + scheduled_batch_stats=scheduled_batch_stats, + gpu_forward_start_event=gpu_forward_start, + gpu_forward_end_event=gpu_forward_end, + gpu_forward_events_from_perf_pool= + gpu_forward_events_from_perf_pool, microbatch_id=microbatch_id, ) @@ -2484,7 +2624,7 @@ def _prepare_and_schedule_batch(self): schedule_style == DisaggScheduleStyle.GENERATION_FIRST for req in self.active_requests) # [disagg-ctx-deadlock-fix] _check_disagg_ctx_cache_transfer_status - # internally invokes a TP-wide allgather inside + # internally invokes a TP-scoped allgather inside # CacheTransceiver::checkContextTransferStatus. Gating the call on # rank-local `num_fitting_reqs` (which can drift between ranks by # one block due to per-rank UCX/CUDA-event-sync timing variance) @@ -2493,11 +2633,16 @@ def _prepare_and_schedule_batch(self): # deadlock. OR the decision across TP ranks: if ANY rank wants the # call, ALL ranks call it. Ranks that don't locally need it use the # non-blocking variant so the collective stays in sync without - # holding any individual rank. + # holding any individual rank. Use TP-scoped allreduce (matches + # the C++ syncComm scope) instead of WORLD to avoid serializing + # the disagg prefill host loop on every iter (nvbug/6280060). local_need_check = (num_fitting_reqs == 0 and not fitting_disagg_gen_init_requests) - any_need_check = self.dist.allreduce(int(local_need_check), - op=ReduceOp.MAX) + if self.dist.tp_size > 1: + any_need_check = self.dist.tp_allreduce(int(local_need_check), + op=ReduceOp.MAX) + else: + any_need_check = int(local_need_check) if any_need_check > 0: if local_need_check and not all_gen_first: logger.warning( @@ -2702,6 +2847,9 @@ def _executor_loop(self): if self._resource_governor_enabled: self._sync_and_process_resource_governor_queue() + if self._is_kv_manager_v2 and self._can_pause_for_rebalance(): + self._maybe_rebalance_kv_pools() + scheduled_batch, iter_stats = self._prepare_and_schedule_batch() self._handle_control_request() @@ -2718,6 +2866,11 @@ def _executor_loop(self): self._pause_requests(scheduled_batch.paused_requests) finished_requests = [] + sample_state = None + scheduled_batch_stats = None + gpu_forward_start = None + gpu_forward_end = None + gpu_forward_events_from_perf_pool = False can_queue, _ = self._can_queue(scheduled_batch) @@ -2778,9 +2931,17 @@ def _executor_loop(self): if hasattr(self.drafter, "guided_decoder"): self.guided_decoder.rollback_draft_tokens() + scheduled_batch_stats = ( + self._collect_scheduled_batch_stats(scheduled_batch) + if self.enable_iter_perf_stats else None) + # GPU and CPU timing for perf metrics gpu_forward_start, gpu_forward_end, gpu_sample_end = self.perf_manager.create_timing_events( ) + if self.enable_iter_perf_stats and gpu_forward_start is None: + gpu_forward_start, gpu_forward_end = self.perf_manager.borrow_forward_timing_events( + ) + gpu_forward_events_from_perf_pool = True with self.perf_manager.record_perf_events( gpu_forward_start, gpu_forward_end) as fwd_timing: @@ -2798,11 +2959,12 @@ def _executor_loop(self): sample_state = self._sample_async( scheduled_batch, batch_outputs) - self.perf_manager.save_timing_to_requests( - scheduled_batch.all_requests(), gpu_forward_start, - gpu_forward_end, gpu_sample_end, fwd_timing.start_time, - fwd_timing.end_time, sample_timing.start_time, - sample_timing.end_time) + if self.perf_manager.enabled: + self.perf_manager.save_timing_to_requests( + scheduled_batch.all_requests(), gpu_forward_start, + gpu_forward_end, gpu_sample_end, + fwd_timing.start_time, fwd_timing.end_time, + sample_timing.start_time, sample_timing.end_time) # Handle guided decoder errors after _sample_async to avoid state conflicts. # If called before, failed requests would be marked as GENERATION_COMPLETE, @@ -2854,14 +3016,20 @@ def _executor_loop(self): self._kv_connector_terminate_requests() if self.enable_iter_perf_stats and sample_state is not None: - iter_stats.inflight_batching_stats.num_ctx_tokens = self.model_engine.iter_states[ - 'num_ctx_tokens'] self._process_iter_stats( finished_requests, self.active_requests, BatchState(scheduled_requests=scheduled_batch, sample_state=sample_state, iter_stats=iter_stats, - iter_start_time=iter_start_time)) + iter_start_time=iter_start_time, + scheduled_batch_stats=scheduled_batch_stats, + gpu_forward_start_event=gpu_forward_start, + gpu_forward_end_event=gpu_forward_end, + gpu_forward_events_from_perf_pool= + gpu_forward_events_from_perf_pool)) + elif gpu_forward_events_from_perf_pool: + self.perf_manager.release_forward_timing_events( + gpu_forward_start, gpu_forward_end) self.iter_counter += 1 @@ -2936,6 +3104,88 @@ def _sync_and_process_resource_governor_queue(self): else: raise ValueError(f"Invalid request type: {type(request)}.") + def _can_pause_for_rebalance(self) -> bool: + """Gate KV pool rebalance to the cases the v1 hook supports. + + MVP scope: single-GPU aggregated, no in-flight disagg transfer, + no beam search, no drafter, not during warmup or shutdown. + Honors the ``enable_kv_pool_rebalance`` opt-in flag (default off). + """ + if not self.enable_kv_pool_rebalance: + return False + if self.dist.pp_size > 1: + return False + if self.kv_cache_transceiver is not None: + return False + if self.is_warmup: + return False + if self.is_shutdown: + return False + if self.kv_cache_manager.max_beam_width > 1: + return False + if self.drafter is not None: + return False + return True + + def _consume_previous_batch_for_rebalance(self) -> None: + """Drain ``previous_batch`` so its _KVCache instances are quiescent. + + No-op when ``previous_batch is None`` -- i.e., always a no-op in + the non-overlap loop, since that loop never sets previous_batch. + In the overlap loop this fires when the rebalance hook catches a + pending in-flight iteration; we consume it inline so suspend can + safely run. + + Mirrors the inline sequence in ``_executor_loop_overlap`` that + handles ``previous_batch``. Unlike the inline code we are not + guarded by ``should_process_previous_batch``: the rebalance gate + already excludes the multi-rank-divergence cases that flag exists + to handle. + """ + if self.previous_batch is None: + return + self._update_requests(self.previous_batch.sample_state) + self._send_kv_async( + self.previous_batch.scheduled_requests.all_requests()) + self._flush_pending_transfer_responses() + self._process_previous_batch() + self.perf_manager.compute_batch_gpu_times( + self.previous_batch.scheduled_requests.all_requests()) + self.previous_batch = None + + def _maybe_rebalance_kv_pools(self) -> None: + """Rebalance KV pool ratios when the V2 auto-tuner asks for it. + + Fast path: ``need_adjustment`` checks the sample counter and the + 120s cooldown before doing any real work. On the slow path we + drain pending GPU work, consume any in-flight ``previous_batch`` + (overlap loop only), suspend every active request, call + ``adjust()``, and resume. Resume failures stay suspended; the + scheduler reactivates them through prepare_context / + try_allocate_generation on the next iteration, the same path it + uses today after eviction. + """ + mgr = self.kv_cache_manager + if not mgr.impl.need_adjustment: + return + + torch.cuda.current_stream().synchronize() + self._consume_previous_batch_for_rebalance() + + paused: List[LlmRequest] = [] + for req in self.active_requests: + if mgr.is_request_active(req.py_request_id): + mgr.suspend_request(req) + paused.append(req) + + try: + mgr.impl.adjust() + except OutOfPagesError as e: + logger.warning(f"KV pool adjust() failed: {e!r}") + + for req in paused: + mgr.resume_request(req) + @contextmanager def control_action(self): """ @@ -2982,6 +3232,9 @@ def _executor_loop_overlap(self): if self._resource_governor_enabled: self._sync_and_process_resource_governor_queue() + if self._is_kv_manager_v2 and self._can_pause_for_rebalance(): + self._maybe_rebalance_kv_pools() + scheduled_batch, iter_stats = self._prepare_and_schedule_batch() self._handle_control_request() @@ -2996,6 +3249,7 @@ def _executor_loop_overlap(self): if not self._is_kv_manager_v2: self._terminate_requests(scheduled_batch.paused_requests) + gpu_forward_events_from_perf_pool = False can_queue, can_queue_this_rank = self._can_queue( scheduled_batch) @@ -3093,9 +3347,17 @@ def _executor_loop_overlap(self): else: previous_tensors_device = self.previous_batch and self.previous_batch.sample_state and self.previous_batch.sample_state.device + scheduled_batch_stats = ( + self._collect_scheduled_batch_stats(scheduled_batch) + if self.enable_iter_perf_stats else None) + # GPU timing for perf metrics gpu_forward_start, gpu_forward_end, gpu_sample_end = self.perf_manager.create_timing_events( ) + if self.enable_iter_perf_stats and gpu_forward_start is None: + gpu_forward_start, gpu_forward_end = self.perf_manager.borrow_forward_timing_events( + ) + gpu_forward_events_from_perf_pool = True with self.perf_manager.record_perf_events( gpu_forward_start, gpu_forward_end) as fwd_timing: @@ -3170,20 +3432,23 @@ def _executor_loop_overlap(self): scheduled_batch.generation_requests) if can_queue: - self.perf_manager.save_timing_to_requests( - scheduled_batch.all_requests(), gpu_forward_start, - gpu_forward_end, gpu_sample_end, fwd_timing.start_time, - fwd_timing.end_time, sample_timing.start_time, - sample_timing.end_time) - if self.enable_iter_perf_stats: - iter_stats.inflight_batching_stats.num_ctx_tokens = self.model_engine.iter_states[ - 'num_ctx_tokens'] + if self.perf_manager.enabled: + self.perf_manager.save_timing_to_requests( + scheduled_batch.all_requests(), gpu_forward_start, + gpu_forward_end, gpu_sample_end, + fwd_timing.start_time, fwd_timing.end_time, + sample_timing.start_time, sample_timing.end_time) self.previous_batch = BatchState( scheduled_requests=scheduled_batch, sample_state=sample_state, iter_start_time=iter_start_time, - iter_stats=iter_stats) + iter_stats=iter_stats, + scheduled_batch_stats=scheduled_batch_stats, + gpu_forward_start_event=gpu_forward_start, + gpu_forward_end_event=gpu_forward_end, + gpu_forward_events_from_perf_pool= + gpu_forward_events_from_perf_pool) elif not can_queue_this_rank: # If the batch is empty on this rank, we need to clear the previous batch. self.previous_batch = None @@ -3305,8 +3570,13 @@ def _process_previous_batch(self): self._process_iter_stats(finished_requests, self.active_requests, self.previous_batch) - def _forward_step_inter_pp(self, scheduled_batch) -> SampleState: - self._forward_step(scheduled_batch) + def _forward_step_inter_pp(self, + scheduled_batch, + gpu_forward_start=None, + gpu_forward_end=None) -> SampleState: + with self.perf_manager.record_perf_events(gpu_forward_start, + gpu_forward_end): + self._forward_step(scheduled_batch) sampler_event = torch.cuda.Event() sampler_event.record() self._update_request_states(scheduled_batch) @@ -3462,8 +3732,9 @@ def _fetch_new_requests( kv_iter_stats=record.kv_iter_stats, attention_dp_rank=record.attention_dp_rank, host_step_time_ms=record.host_step_time_ms, - prev_device_step_time_ms=record.prev_device_step_time_ms - ) + prev_device_step_time_ms=record. + prev_device_step_time_ms, + gpu_forward_time_ms=record.gpu_forward_time_ms) all_ranks_num_active_requests = [ s.num_active_requests for s in all_rank_states ] @@ -4675,6 +4946,16 @@ def _handle_responses(self, emit_first_iter: bool = True): request.draft_tokens = request.py_draft_tokens or [] request.decoding_iter = request.py_decoding_iter + py_num_accepted = getattr(request, 'py_num_accepted_draft_tokens', + 0) + draft_len = get_draft_token_length(request) + if draft_len > 0: + for pos in range(min(draft_len, MAX_SPEC_DECODE_POSITIONS)): + request.py_per_pos_drafted[pos] += 1 + for pos in range(min(py_num_accepted, + MAX_SPEC_DECODE_POSITIONS)): + request.py_per_pos_accepted[pos] += 1 + self.perf_manager.append_step_metrics( request, self.iter_counter, batch_token_time=batch_token_time) @@ -4698,6 +4979,8 @@ def _handle_responses(self, emit_first_iter: bool = True): if response: request_done = request.is_finished response.result.cached_tokens = request.cached_tokens + response.result.per_pos_drafted = request.py_per_pos_drafted + response.result.per_pos_accepted = request.py_per_pos_accepted new_responses.append((req_id, response)) if request_done: diff --git a/tensorrt_llm/_torch/pyexecutor/resource_manager.py b/tensorrt_llm/_torch/pyexecutor/resource_manager.py index 86fbbcc87da3..d8e948d15689 100644 --- a/tensorrt_llm/_torch/pyexecutor/resource_manager.py +++ b/tensorrt_llm/_torch/pyexecutor/resource_manager.py @@ -33,7 +33,7 @@ # isort: off from tensorrt_llm.runtime.kv_cache_manager_v2 import ( DEFAULT_BEAM_INDEX, AttentionLayerConfig, BufferConfig, CacheTierConfig, - GpuCacheTierConfig, HostCacheTierConfig, ReuseScope) + DiskCacheTierConfig, GpuCacheTierConfig, HostCacheTierConfig, ReuseScope) # isort: on from tensorrt_llm.runtime.kv_cache_manager_v2 import \ KVCacheManager as KVCacheManagerPy @@ -161,6 +161,8 @@ def _ensure_int64_cpu_tensor( def _resolve_multimodal_run_metadata( req: LlmRequest) -> Optional[_MmRunMetadata]: + # TODO(perf): cache per request; block-reuse invokes this once per block, + # repeatedly rebuilding identical tensors for the same request metadata. # Worked example for one logical multimodal item split by text: # # prompt index: 0 1 2 3 4 5 @@ -734,10 +736,9 @@ def append_to_kv_heads_per_layer(num_kv_heads_per_layer: List[int], live_state_slots = self.max_batch_size * pp_size max_snapshots = live_state_slots if kv_cache_config.enable_block_reuse: - max_snapshots = max( + max_snapshots += ( kv_cache_config.max_tokens // - linear_attention_metadata.states_snapshot_interval, - live_state_slots) + linear_attention_metadata.states_snapshot_interval) blocks_per_window[LinearCacheType.RECURRENT_STATES.value] = ( int(max_snapshots), 0) @@ -1502,6 +1503,31 @@ def get_num_front_blocks_removed(self, return self.impl.get_num_front_blocks_removed(request_id, window_size=window_size) + def commit_and_get_block_hashes( + self, + request: LlmRequest, + window_size: Optional[int] = None) -> List[int]: + """Commit and return the chain of stored block hashes for ``request``. + + Wraps ``BaseKVCacheManager::commitAndGetBlockHashesForRequest``. The C++ + side sets each block's ``mBlockKey`` and ``mHash`` on first call so the + hash matches what ``storeBlocks`` would later compute. Beam-width-1 + only; the connector enforces this at startup. + """ + if window_size is None: + # ``is_vswa`` (distinct window sizes) is the real VSWA signal; a + # uniform per-layer vector such as ``[4096, 4096, ...]`` has + # ``len > 1`` yet a single effective window, so keying off the + # length would spuriously reject it for connector callers that omit + # ``window_size``. + if self.is_vswa: + raise ValueError("window_size must be provided for VSWA") + window_size = self.max_attention_window_vec[0] + + return list( + self.impl.commit_and_get_block_hashes_for_request( + request, window_size)) + def unpin_blocks_by_id(self, kv_cache_block_id: int): self.impl.unpin_blocks_by_id(kv_cache_block_id) @@ -2035,16 +2061,13 @@ def _calculate_max_num_blocks_for_linear_attention( pp_size = self.mapping.pp_size if self.mapping is not None else 1 intercept = self.max_batch_size * pp_size * state_bytes_local - # heuristic: When block reuse is enabled, we assume the mamba snapshots are dominant instead of active states, - # otherwise we may run out of kv cache blocks prior to mamba blocks due to the large number of max_batch_size. - # So we ignore intercept and only calculate max_tokens based on slope - # This can be improved by a more accurate max_batch_size and ISL/OSL estimation in the future. - if mamba_slope > 0: - max_tokens = max((primary_budget) // slope, 0) - else: - max_tokens = max((primary_budget - intercept) // slope, 0) + max_tokens = max((primary_budget - intercept) // slope, 0) if kv_cache_config.max_tokens is not None: max_tokens = min(kv_cache_config.max_tokens, max_tokens) + if max_tokens < kv_cache_config.max_tokens: + logger.warning( + f'The memory budget for Mamba + KV cache cannot fit the user-specified max_tokens of {kv_cache_config.max_tokens}. The calculated max_tokens based on the memory budget is {max_tokens}. Please consider adjusting max_batch_size/max_tokens/mamba_state_cache_interval.' + ) kv_blocks_in_primary_pool = int(max_tokens // self.tokens_per_block) @@ -2067,7 +2090,7 @@ def _calculate_max_num_blocks_for_linear_attention( max_snapshots += self.spec_config.max_draft_len if (kv_cache_config.enable_block_reuse and interval is not None and interval > 0): - max_snapshots = max(max_tokens // interval, max_snapshots) + max_snapshots += max_tokens // interval secondary_snapshots = int(max_snapshots * (self._secondary_pool_memory_bytes / @@ -2521,6 +2544,16 @@ def append_to_kv_heads_per_layer(num_kv_heads_per_layer: List[int], logger.info( f"KV cache manager v2 host cache quota set to {host_quota / (1 << 30):.2f}GiB" ) + disk_cache_size = kv_cache_config.disk_cache_size + if disk_cache_size is not None and disk_cache_size > 0: + disk_cache_path = kv_cache_config.disk_cache_path + assert disk_cache_path is not None + cache_tiers.append( + DiskCacheTierConfig(quota=disk_cache_size, + path=disk_cache_path)) + logger.info( + f"KV cache manager v2 disk cache quota set to {disk_cache_size / (1 << 30):.2f}GiB at {disk_cache_path}" + ) self.vocab_size = vocab_size @@ -3055,6 +3088,18 @@ def suspend_request(self, req: LlmRequest) -> None: if kv_cache is not None and kv_cache.is_active: kv_cache.suspend() + def resume_request(self, req: LlmRequest) -> bool: + """Resume a previously-suspended KV cache for *req*. + + Returns True if the cache is (or becomes) active on GPU, False if + resume was refused (e.g. GPU pressure above max_util_for_resume) + or no cache exists for the request. + """ + kv_cache = self.kv_cache_map.get(req.py_request_id) + if kv_cache is None: + return False + return self._resume_and_restore(req.py_request_id, kv_cache) + # ---- prepare_resources ---- @nvtx_range("prepare_resources_kv_cache_manager_v2") diff --git a/tensorrt_llm/_torch/pyexecutor/sampler.py b/tensorrt_llm/_torch/pyexecutor/sampler.py index fc8e76b923e1..3c823888c363 100644 --- a/tensorrt_llm/_torch/pyexecutor/sampler.py +++ b/tensorrt_llm/_torch/pyexecutor/sampler.py @@ -291,9 +291,65 @@ def is_generation_model(self) -> bool: @dataclass(kw_only=True) class MultimodalResult: mm_embeddings: List[torch.Tensor] + # needed to torch.split the mm_embeddings into item-wise chunks + mm_embedding_lengths: List[List[int]] + # needed when requests mix text-only and multimodal ones + mm_embedding_request_indices: List[int] + # number of context requests in the batch + num_context_requests: int # Can be used to include e.g. `mrope_position_ids`, etc. extra_data: Optional[Dict[str, Any]] = None + def __post_init__(self) -> None: + num_embeddings = len(self.mm_embeddings) + num_lengths = len(self.mm_embedding_lengths) + if num_lengths != num_embeddings: + raise ValueError( + "mm_embedding_lengths batch size does not match mm_embeddings: " + f"{num_lengths} != {num_embeddings}" + ) + num_request_indices = len(self.mm_embedding_request_indices) + if num_request_indices != num_embeddings: + raise ValueError( + "mm_embedding_request_indices batch size does not match " + f"mm_embeddings: {num_request_indices} != {num_embeddings}" + ) + for result_index, (mm_embedding, mm_embedding_lengths) in enumerate( + zip(self.mm_embeddings, self.mm_embedding_lengths, strict=True) + ): + actual_rows = len(mm_embedding) + expected_rows = sum(mm_embedding_lengths) + if actual_rows != expected_rows: + raise ValueError( + f"mm_embedding shape mismatch for result {result_index}: " + f"{actual_rows} != {expected_rows}" + ) + for request_index in self.mm_embedding_request_indices: + if request_index < 0 or request_index >= self.num_context_requests: + raise ValueError( + "mm_embedding_request_indices contains an invalid request " + f"index: {request_index} not in [0, {self.num_context_requests})" + ) + + @classmethod + def from_model_outputs( + cls, model_outputs: Dict[str, Any], num_context_requests: int + ) -> "MultimodalResult": + result_keys = { + "mm_embeddings", + "mm_embedding_lengths", + "mm_embedding_request_indices", + } + return cls( + mm_embeddings=model_outputs["mm_embeddings"], + mm_embedding_lengths=model_outputs["mm_embedding_lengths"], + mm_embedding_request_indices=model_outputs["mm_embedding_request_indices"], + num_context_requests=num_context_requests, + extra_data={ + key: value for key, value in model_outputs.items() if key not in result_keys + }, + ) + @dataclass(kw_only=True) class SampleStateWithMMResult(SampleState[SampleStateTensors, SampleStateTensors]): @@ -336,11 +392,10 @@ def sample_async( resource_manager: Optional[ResourceManager] = None, ) -> SampleState: # from model_outputs to MultimodalResult - data = MultimodalResult( - mm_embeddings=model_outputs.pop("mm_embeddings"), - extra_data={**model_outputs}, - ) assert not scheduled_requests.generation_requests + data = MultimodalResult.from_model_outputs( + model_outputs, scheduled_requests.num_context_requests + ) return self.SampleState(requests=scheduled_requests.context_requests, data=data) @override @@ -356,26 +411,28 @@ def update_requests( extra_data = state.data.extra_data or {} mrope_position_ids = extra_data.get("mrope_position_ids", None) mrope_position_deltas = extra_data.get("mrope_position_deltas", None) - for i, (request, mm_embedding) in enumerate(zip(requests, mm_embeddings)): + for request in requests: request.state = LlmRequestState.GENERATION_COMPLETE # NOTE: This is a hack: set finish reason manually and set the beam 0 request.set_finished_reason(FinishReason.LENGTH, 0) - assert request.multimodal_lengths is not None - # TODO(TRTLLM-12175): request.multimodal_lengths is a - # prompt-side MM-token count and may include non-embedding - # special/framing tokens. This validation needs per-item - # encoder-output embedding lengths instead. - if len(mm_embedding) != sum(request.multimodal_lengths): - raise ValueError( - f"mm_embedding shape mismatch: {len(mm_embedding)} != {sum(request.multimodal_lengths)}" - ) - request.py_result.append_mm_embeddings(mm_embedding, request.multimodal_lengths) + request_indices = state.data.mm_embedding_request_indices + for result_index, (request_index, mm_embedding) in enumerate( + zip(request_indices, mm_embeddings, strict=True) + ): + request = requests[request_index] + mm_embedding_lengths = state.data.mm_embedding_lengths[result_index] + + request.py_result.append_mm_embeddings(mm_embedding, mm_embedding_lengths) # Store mrope data if available if mrope_position_ids is not None and mrope_position_deltas is not None: + mrope_index = ( + request_index if len(mrope_position_ids) == len(requests) else result_index + ) request.py_result.set_mrope_position( - mrope_position_ids[i], mrope_position_deltas[i] + mrope_position_ids[mrope_index], + mrope_position_deltas[mrope_index], ) @override diff --git a/tensorrt_llm/_torch/speculative/__init__.py b/tensorrt_llm/_torch/speculative/__init__.py index d1c1b2605283..0f16df6baffd 100644 --- a/tensorrt_llm/_torch/speculative/__init__.py +++ b/tensorrt_llm/_torch/speculative/__init__.py @@ -2,12 +2,12 @@ from .dflash import DFlashSpecMetadata, DFlashWorker from .draft_target import (DraftTargetOneModelSpecMetadata, DraftTargetOneModelWorker) -from .eagle3 import Eagle3SpecMetadata, MTPEagleWorker +from .eagle3 import Eagle3SpecMetadata from .interface import (SpecMetadata, SpecWorkerBase, prepare_attn_metadata_for_draft_replay, restore_attn_metadata_after_draft_replay, should_use_separate_draft_kv_cache) -from .mtp import MTPSampler, MTPSpecMetadata, MTPWorker +from .mtp import MTPEagleWorker, MTPSampler, MTPSpecMetadata, MTPWorker from .ngram import NGramDrafter, NGramPoolManager from .pard import PARDSpecMetadata, PARDWorker from .sa_enhancer import SADraftEnhancer diff --git a/tensorrt_llm/_torch/speculative/eagle3.py b/tensorrt_llm/_torch/speculative/eagle3.py index 6acef9ed348f..b5b0b9e24877 100644 --- a/tensorrt_llm/_torch/speculative/eagle3.py +++ b/tensorrt_llm/_torch/speculative/eagle3.py @@ -2,7 +2,6 @@ from typing import TYPE_CHECKING, Dict, List, Optional, Set import torch -import torch.nn.functional as F from torch import nn from tensorrt_llm._torch.custom_ops import inplace_slice_copy @@ -10,15 +9,12 @@ from tensorrt_llm.mapping import Mapping from ..attention_backend import AttentionMetadata -from ..distributed.ops import allgather -from ..model_config import ModelConfig from ..pyexecutor.llm_request import LlmRequest -from ..pyexecutor.mamba_cache_manager import MambaHybridCacheManager from ..pyexecutor.resource_manager import BaseResourceManager, SlotManager from ..pyexecutor.sampler import TorchSampler from ..pyexecutor.scheduler import ScheduledRequests from .interface import SpecMetadata, SpecWorkerBase -from .mtp import MTPSampler, _select_mtp_position_ids +from .mtp import MTPSampler from .sa_enhancer import SADraftEnhancer from .spec_tree_manager import SpecTreeManager @@ -76,15 +72,6 @@ def __init__(self, ) # sequence length, only used for metadata preparation self.seq_lens = {i: 0 for i in range(slot_size)} - - # Per-request delta pool tracking whether the request is in the - # thinking phase; mirrors MTPHiddenStatesManager.mtp_relaxed_delta_pool. - self.use_relaxed_acceptance_for_thinking = getattr( - config, 'use_relaxed_acceptance_for_thinking', False) - if self.use_relaxed_acceptance_for_thinking: - self.relaxed_delta_pool = torch.zeros((slot_size, ), - dtype=torch.float, - device='cuda') # start indices of each slot self.start_indices = {i: 0 for i in range(slot_size)} # whether the next draft forward is the first @@ -111,8 +98,6 @@ def prepare_resources(self, scheduled_batch: ScheduledRequests): if req.is_first_context_chunk: slot_id = self.slot_manager.add_slot(req.request_id) self.slot_ids.append(slot_id) - if self.use_relaxed_acceptance_for_thinking: - self.relaxed_delta_pool[slot_id].fill_(0) # reset the flag before model forward self.is_first_draft = True @@ -123,8 +108,6 @@ def free_resources(self, request: LlmRequest): slot_id = self.slot_manager.get_slot(request.request_id) self.seq_lens[slot_id] = 0 self.start_indices[slot_id] = 0 - if self.use_relaxed_acceptance_for_thinking: - self.relaxed_delta_pool[slot_id].fill_(0) self.slot_manager.remove_slot(request.request_id) if self.sa_manager is not None: self.sa_manager.remove_request(request.request_id) @@ -382,32 +365,15 @@ class Eagle3OneModelSpecMetadata(SpecMetadata): dtype: torch.dtype = torch.bfloat16 # The index of the batch inputs batch_indices_cuda: Optional[torch.Tensor] = None - # Optional resource manager (used to access SA manager and relaxed-acceptance - # delta pool for Eagle3+SA / Eagle3+relaxed-thinking / MTP Eagle modes) + # Optional resource manager (used to access SA manager for EAGLE3+SA) spec_resource_manager: Optional[Eagle3ResourceManager] = None # Dynamic tree flags use_dynamic_tree: bool = False eagle_choices: Optional[List[List[int]]] = None - # Slot IDs for each request; populated in prepare() when spec_resource_manager - # is present (required for relaxed acceptance, mirrors MTPSpecMetadata.slot_ids). - slot_ids: Optional[torch.Tensor] = None - # One-model speculative decoding uses the first draft forward token counts - # for the first loop iteration and per-sequence token counts for - # subsequent iterations. - subseq_all_rank_num_tokens: Optional[List[int]] = None def __post_init__(self): if self.layers_to_capture is None: - if self.spec_dec_mode.is_mtp_eagle_one_model(): - # MTP Eagle one-model feeds the target model's hidden_states - # directly to the MTP layer (see Eagle3OneModelWorker - # prepare_1st_drafter_inputs / _run_draft_forward, both gated - # on self.is_mtp_eagle). It never reads spec_metadata.hidden_states, - # so leave layers_to_capture empty: this makes is_layer_capture() - # return False everywhere and avoids the post-MLP/MoE fusion - # disable side effect in modeling_deepseekv3 / glm / etc. - self.layers_to_capture = () - elif self.num_layers == 1: + if self.num_layers == 1: self.layers_to_capture = (self.num_layers - 1, ) else: if self.num_layers <= 5: @@ -419,13 +385,8 @@ def __post_init__(self): else: self.layers_to_capture = sorted(list(self.layers_to_capture)) self.num_capture_layers = len(self.layers_to_capture) - if self.num_capture_layers == 0: - # No layers to capture (MTP Eagle one-model). Skip buffer - # allocation entirely; nothing reads self.hidden_states on this - # path. - self.hidden_states = None - elif (self.spec_resource_manager is not None - and self.spec_resource_manager.hidden_states is not None): + if (self.spec_resource_manager is not None + and self.spec_resource_manager.hidden_states is not None): self.hidden_states = self.spec_resource_manager.hidden_states expected_cols = self.hidden_size * len(self.layers_to_capture) assert self.hidden_states.shape[1] == expected_cols, ( @@ -454,13 +415,6 @@ def __post_init__(self): dtype=torch.int, device='cuda', ) - # Pre-allocate slot_ids; filled in prepare() when spec_resource_manager - # is present. Mirrors MTPSpecMetadata.slot_ids allocation pattern. - self.slot_ids = torch.empty( - [self.max_num_requests], - dtype=torch.long, - device='cuda', - ) # Set tree flags based on config if self.use_dynamic_tree: @@ -487,33 +441,11 @@ def prepare(self): pin_memory=prefer_pinned()) self.batch_indices_cuda[:num_seqs].copy_(batch_indices, non_blocking=True) - # `num_tokens` here only feeds the attention-DP shape hint - # (allgathered in model_engine and overridden into - # `attn_metadata.all_rank_num_tokens` on the step-0 draft forward). - # Each mode uses a different convention: - # - MTP Eagle: keep the 1st-iter shape (matches input_ids). - # - Eagle3: subtract to the subseq shape. - if not self.spec_dec_mode.is_mtp_eagle_one_model(): - if self.is_spec_dec_tree: - self.num_tokens -= ( - self.num_generations) * self.max_total_draft_tokens - else: - self.num_tokens -= (self.num_generations) * self.max_draft_len - - if getattr(self.spec_resource_manager, "slot_manager", - None) is not None: - # Populate slot_ids for all requests in this batch. Used by relaxed - # acceptance (relaxed_delta_pool indexing), mirroring the pattern - # in MTPSpecMetadata.prepare(). - eagle_slot_ids = [ - self.spec_resource_manager.slot_manager.get_slot(rid) - for rid in self.request_ids - ] - eagle_slot_ids_tensor = torch.tensor(eagle_slot_ids, - dtype=torch.int, - pin_memory=prefer_pinned()) - self.slot_ids[:num_seqs].copy_(eagle_slot_ids_tensor, - non_blocking=True) + if self.is_spec_dec_tree: + self.num_tokens -= ( + self.num_generations) * self.max_total_draft_tokens + else: + self.num_tokens -= (self.num_generations) * self.max_draft_len sa_manager = getattr(self.spec_resource_manager, 'sa_manager', None) if sa_manager is not None: @@ -553,51 +485,41 @@ def _get_max_new_tokens(self, args: TorchSampler.Args, class Eagle3OneModelWorker(SpecWorkerBase): - """Unified one-model worker for Eagle3 and MTP Eagle speculative decoding. + """Eagle3 one-model worker for linear tree speculative decoding. - The operating mode is determined by ``spec_config.spec_dec_mode``: - - EAGLE3_ONE_MODEL: multi-layer hidden states from Eagle3, apply_eagle3_fc - projection, independent EAGLE draft model network. - - MTP_EAGLE_ONE_MODEL: single last-layer hidden states, MTP layer called - repeatedly, supports TP-aware sampling and Mamba hybrid cache. - - Where the two modes differ, ``self.is_mtp_eagle`` is used to branch. - For dynamic tree Eagle3, use ``Eagle3OneModelDynamicTreeWorker`` from - ``eagle3_dynamic_tree.py``. + For dynamic tree mode, use Eagle3OneModelDynamicTreeWorker from + eagle3_dynamic_tree.py instead. """ def __init__(self, spec_config: "EagleDecodingConfig", - mapping: Optional[Mapping] = None, - model_config: Optional[ModelConfig] = None, + mapping: Mapping, use_separate_draft_kv_cache: bool = False): super().__init__(use_separate_draft_kv_cache) self.spec_config = spec_config self.mapping = mapping - # model_config is required for MTP Eagle TP / ADP / Mamba support; the - # Eagle3 path can leave it as None. - self.model_config = model_config - - # Mode flag: True = MTP Eagle one-model, False = Eagle3 one-model. - self.is_mtp_eagle = spec_config.spec_dec_mode.is_mtp_eagle_one_model() - - # SA enhancer (common to both modes) self.sa_enhancer: Optional[SADraftEnhancer] = None if getattr(spec_config, 'sa_config', None) is not None: self.sa_enhancer = SADraftEnhancer(spec_config.sa_config.threshold) self.use_dynamic_tree = getattr(spec_config, 'use_dynamic_tree', False) self.spec_tree_manager = None - # MTP Eagle: lazily-resolved flag for Mamba hybrid cache support - self._is_mamba_hybrid_cache = None - @property def max_draft_len(self) -> int: return self.spec_config.max_draft_len def _prepare_attn_metadata_for_spec_dec(self, attn_metadata): attn_metadata.prepare_for_spec_dec("_seq_lens", "_seq_lens_cuda") + # Save kv_lens_cuda values separately instead of routing through + # prepare_for_spec_dec, which would clone the tensor and break the + # kv_lens_cuda_runtime view that TRTLLM attention reads from. batch_size = attn_metadata.num_seqs + if hasattr(attn_metadata, 'kv_lens_cuda'): + self._saved_kv_lens_cuda = attn_metadata.kv_lens_cuda[: + batch_size].clone( + ) + else: + self._saved_kv_lens_cuda = None # Save spec-dec params that the drafting loop will overwrite. # Without this, CUDA graph warmup's second iteration would run @@ -625,6 +547,12 @@ def _prepare_attn_metadata_for_spec_dec(self, attn_metadata): def _restore_attn_metadata_from_spec_dec(self, attn_metadata): super()._restore_attn_metadata_from_spec_dec(attn_metadata) + if self._saved_kv_lens_cuda is not None: + batch_size = self._saved_kv_lens_cuda.shape[0] + attn_metadata.kv_lens_cuda[:batch_size].copy_( + self._saved_kv_lens_cuda) + self._saved_kv_lens_cuda = None + if self._saved_packed_mask is not None: batch_size = self._saved_packed_mask.shape[0] attn_metadata.spec_decoding_packed_mask[:batch_size].copy_( @@ -671,24 +599,9 @@ def forward(self, self._execute_guided_decoder_if_present(logits) - # Sample and accept tokens. ``input_ids`` is required by the relaxed- - # acceptance path (scans for thinking-phase tokens); ignored otherwise. + # Sample and accept tokens accepted_tokens, num_accepted_tokens = self.sample_and_accept_draft_tokens( - input_ids, logits, attn_metadata, spec_metadata) - - # Mamba hybrid models need state updates after token acceptance because - # the accepted token count affects which Mamba states are valid. The - # isinstance check below naturally no-ops on non-Mamba kv_cache_managers, - # so this is safe to run unconditionally regardless of spec mode (Eagle3 - # over a Mamba-style draft is plausible, even if no such draft exists today). - if self._is_mamba_hybrid_cache is None: - self._is_mamba_hybrid_cache = isinstance( - attn_metadata.kv_cache_manager, MambaHybridCacheManager) - if num_gens > 0 and self._is_mamba_hybrid_cache: - attn_metadata.kv_cache_manager.update_mamba_states( - attn_metadata=attn_metadata, - num_accepted_tokens=num_accepted_tokens, - state_indices=attn_metadata.mamba_metadata.state_indices) + logits, attn_metadata, spec_metadata) sa_manager = getattr(spec_metadata.spec_resource_manager, 'sa_manager', None) @@ -717,9 +630,7 @@ def forward(self, spec_metadata=spec_metadata, draft_model=draft_model) - # Predict draft tokens. ``original_all_rank_num_tokens`` is saved here - # so the post-loop restore (below) can put attn_metadata back into a - # state the target model expects. + # Predict draft tokens original_all_rank_num_tokens = attn_metadata.all_rank_num_tokens # Get the draft KV cache manager if using separate layouts @@ -768,38 +679,28 @@ def _forward_linear_draft_loop(self, inputs, attn_metadata, spec_metadata, num_contexts, batch_size, num_accepted_tokens, original_all_rank_num_tokens): - """Linear draft loop, unified for Eagle3 and MTP Eagle.""" + """Original linear draft loop (1 token per layer).""" runtime_draft_len = spec_metadata.runtime_draft_len - num_gens = batch_size - num_contexts next_draft_tokens = [] draft_logits_list = [] - last_tokens_idx = torch.cumsum( - attn_metadata.seq_lens_cuda, dim=0, dtype=torch.long) - 1 + position_ids = inputs["position_ids"] with self.draft_kv_cache_context(attn_metadata, draft_kv_cache_manager): for i in range(runtime_draft_len): - # Run draft model (mode-specific via helper). The helper - # passes ``all_rank_num_tokens`` as a kwarg so the draft model - # handles save/restore internally (Eagle3DraftModel.forward - # uses try/finally); attn_metadata is left untouched here. - hidden_states, hidden_states_to_save = self._run_draft_forward( - draft_model, inputs, spec_metadata, i) - - # Compute gather_ids: on the first draft step each generation - # request may have accepted multiple tokens, so we index into - # the flattened token sequence to find the last accepted one. - # From step 1 onwards every sequence has length 1, so - # ``batch_indices_cuda`` is sufficient. if i == 0: + num_gens = batch_size - num_contexts start_ids_gen = ( spec_metadata.batch_indices_cuda[:num_gens] * (runtime_draft_len + 1)).long() gather_ids_gen = (start_ids_gen + num_accepted_tokens[num_contexts:] - 1 + attn_metadata.num_ctx_tokens) - gather_ids = torch.concat( - [last_tokens_idx[:num_contexts], gather_ids_gen], dim=0) + gather_ids = torch.concat([ + spec_metadata.gather_ids[:num_contexts], gather_ids_gen + ], + dim=0) else: + # All of the seq_len are 1, use batch_indices_cuda as gather_ids gather_ids = spec_metadata.batch_indices_cuda[:batch_size] if self.guided_decoder is not None: @@ -808,133 +709,59 @@ def _forward_linear_draft_loop(self, inputs, attn_metadata, spec_metadata, num_accepted_tokens, draft_step=i) - # Compute logits. - # MTP Eagle: shared_head of the MTP layer, with optional - # ADP+LM-head-TP padding to ``max_num_requests`` so every TP - # rank produces logits of the same shape. - # Eagle3: logits_processor of the EAGLE draft model. - use_lm_head_tp_in_adp = ( - self.is_mtp_eagle and self.model_config is not None - and self.model_config.mapping.enable_attention_dp - and getattr(self.model_config.mapping, - 'enable_lm_head_tp_in_adp', False)) - if self.is_mtp_eagle: - if use_lm_head_tp_in_adp: - hidden_states_gathered = hidden_states[gather_ids] - token_count = hidden_states_gathered.view( - -1, hidden_states_gathered.shape[-1]).shape[0] - max_num_requests = spec_metadata.max_num_requests - pad_len = max_num_requests - token_count - if pad_len > 0: - padded_hidden_states = F.pad( - hidden_states_gathered.view( - -1, hidden_states_gathered.shape[-1]), - (0, 0, 0, pad_len), - mode="constant", - value=0) - elif pad_len == 0: - padded_hidden_states = hidden_states_gathered.view( - -1, hidden_states_gathered.shape[-1]) - else: - raise ValueError( - "Eagle3OneModelWorker (MTP Eagle mode): " - "token_count > max_num_requests, which is not supported" - ) - logits = draft_model.mtp_layers[0].shared_head( - padded_hidden_states, draft_model.lm_head, - attn_metadata, True) - else: - logits = draft_model.mtp_layers[0].shared_head( - hidden_states[gather_ids], draft_model.lm_head, - attn_metadata, True) - else: - logits = draft_model.logits_processor( - hidden_states[gather_ids], draft_model.lm_head, - attn_metadata, True) - + # Update attn_metadata.all_rank_num_tokens for attention DP + if original_all_rank_num_tokens is not None: + if i == 0: + attn_metadata.all_rank_num_tokens = original_all_rank_num_tokens + elif spec_metadata.all_rank_num_seqs is not None: + attn_metadata.all_rank_num_tokens = spec_metadata.all_rank_num_seqs + + hidden_states, hidden_states_to_save = draft_model.model( + **inputs) + + # FIXME (jhaotingc): Currently we disable use_spec_decoding mode for Eagle engine nth steps except 1st step. + # Eagle engine takes in draft_len tokens from the previous step, run spec-dec mode with those tokens, + # then the following step can use regular decoding mode to generate 1 tokens per step. + # Currently the spec-dec mask for chained tree is not implemented yet. + # When token tree is supported, this can be removed and all steps may use spec-dec mode as well. + attn_metadata.use_spec_decoding = False + + logits = draft_model.logits_processor(hidden_states[gather_ids], + draft_model.lm_head, + attn_metadata, True) if self.guided_decoder is not None: - if self.is_mtp_eagle: - self.guided_decoder.execute_draft_batch(logits, - draft_step=i) - else: - d2t = getattr(draft_model.model, "d2t", None) - self.guided_decoder.execute_draft_batch(logits, - d2t, - draft_step=i) - - # Sample the next draft token. - # MTP Eagle: TP-aware sampler; when ADP+LM-head-TP is active - # logits are padded to max_num_requests across TP ranks, so - # the result must be trimmed back to token_count. - # Eagle3: simple greedy sampling; d2t remaps vocab indices when - # the draft model uses a compressed vocabulary. - if self.is_mtp_eagle: - if use_lm_head_tp_in_adp: - mapping_lm_head_tp = draft_model.mtp_layers[ - 0].shared_head.mapping_lm_head_tp - new_draft_token = self.draft_sampler( - logits, mapping_lm_head_tp) - new_draft_token = new_draft_token[:token_count] - else: - new_draft_token = self.draft_sampler(logits) - else: d2t = getattr(draft_model.model, "d2t", None) - new_draft_token = self._draft_sampler_greedy(logits, d2t) + self.guided_decoder.execute_draft_batch(logits, + d2t, + draft_step=i) - # Stash unpadded Eagle3 draft logits for rejection sampling on - # the next iteration. MTP Eagle's logits may be ADP-padded to - # max_num_requests, so we skip them here. - if not self.is_mtp_eagle and spec_metadata.use_rejection_sampling: + if spec_metadata.use_rejection_sampling: draft_logits_list.append(logits.clone()) + new_draft_token = self.draft_decoder(logits, draft_model) next_draft_tokens.append(new_draft_token) - - # Update hidden states for the next iteration. - # MTP Eagle: the MTP layer returns a single tensor; slice by - # gather_ids to get one hidden state per request. - # Eagle3: the EAGLE draft model returns a secondary - # ``hidden_states_to_save`` specifically for this purpose. - if self.is_mtp_eagle: - hidden_states = hidden_states[gather_ids] - else: - hidden_states = hidden_states_to_save[gather_ids] - position_ids = (_select_mtp_position_ids( - inputs["position_ids"], gather_ids) + 1) - - # Update attn_metadata for the next iteration. + # update inputs + hidden_states = hidden_states_to_save[gather_ids] + position_ids = inputs["position_ids"][gather_ids] + 1 + # update attn_metadata if i == 0: attn_metadata._seq_lens[:batch_size].fill_(1) attn_metadata._seq_lens_cuda[:batch_size].fill_(1) attn_metadata.on_update() - has_kv_cache = inputs[ - "attn_metadata"].kv_cache_manager is not None - if has_kv_cache: + # cannot run generation if there is no kv cache + if inputs["attn_metadata"].kv_cache_manager is not None: attn_metadata.host_request_types[:attn_metadata. num_contexts].fill_(1) attn_metadata.num_contexts = 0 + # update kv_lens_cuda if hasattr(attn_metadata, 'kv_lens_cuda'): attn_metadata.kv_lens_cuda[num_contexts:batch_size] -= ( runtime_draft_len - num_accepted_tokens[num_contexts:]) attn_metadata.kv_lens_cuda[:num_contexts] += 1 - - if has_kv_cache: - self._prepare_flash_mla_generation_layout( - attn_metadata, num_contexts, batch_size) - if hasattr(attn_metadata, 'kv_lens_cuda'): - attn_metadata.update_for_spec_dec() - - # Both Eagle3 and MTP Eagle drafters take ``draft_len + 1`` - # tokens in the first draft step (attention runs in spec-dec - # mode), then 1 token per step in subsequent iterations. - # Disable spec_decoding here so the masks/positions stay - # correct on subsequent iters. - attn_metadata.use_spec_decoding = False - else: - if hasattr(attn_metadata, 'kv_lens_cuda'): - attn_metadata.kv_lens_cuda[:batch_size] += 1 - attn_metadata.update_for_spec_dec() - + elif hasattr(attn_metadata, 'kv_lens_cuda'): + attn_metadata.kv_lens_cuda[:batch_size] += 1 + # support attention dp inputs = { "input_ids": new_draft_token, "position_ids": position_ids, @@ -960,220 +787,53 @@ def _forward_linear_draft_loop(self, inputs, attn_metadata, spec_metadata, return next_draft_tokens - def _get_step_all_rank_num_tokens(self, spec_metadata, step_idx: int): - """Pick the right ``all_rank_num_tokens`` for this draft iteration. - - Step 0 uses ``spec_metadata.all_rank_num_tokens``; subsequent steps - use ``spec_metadata.subseq_all_rank_num_tokens`` since every sequence - contributes a single token per iteration. - """ - return (spec_metadata.all_rank_num_tokens - if step_idx == 0 else spec_metadata.subseq_all_rank_num_tokens) - - def _run_draft_forward(self, draft_model, inputs, spec_metadata, - step_idx: int): - """Invoke the draft model for one iteration, branching on mode. - - ``all_rank_num_tokens`` is passed as a kwarg in both modes. For MTP - Eagle it goes directly to ``mtp_layers[0]``; for Eagle3 it goes to - ``Eagle3DraftModel.forward`` which guards it with a try/finally so - attn_metadata sees the original value on return. - """ - all_rank_num_tokens = self._get_step_all_rank_num_tokens( - spec_metadata, step_idx) - - if self.is_mtp_eagle: - hidden_states = draft_model.mtp_layers[0]( - embed_tokens=draft_model.embed_tokens, - all_rank_num_tokens=all_rank_num_tokens, - **inputs) - return hidden_states, None - - inputs["all_rank_num_tokens"] = all_rank_num_tokens - hidden_states, hidden_states_to_save = draft_model.model(**inputs) - return hidden_states, hidden_states_to_save - - def _prepare_flash_mla_generation_layout(self, attn_metadata, num_contexts, - batch_size): - """Reorder ``kv_block_ids_per_seq`` so gen requests precede context. - - Flash MLA on first-step expects the layout used during normal - generation; both Eagle3 and MTP Eagle hit this when context requests - share the batch with gen requests. - """ - if num_contexts <= 0 or not attn_metadata.enable_flash_mla: - return - reorder_block_ids_per_seq = torch.cat([ - attn_metadata.kv_block_ids_per_seq[num_contexts:batch_size], - attn_metadata.kv_block_ids_per_seq[:num_contexts] - ]) - attn_metadata.block_ids_per_seq[:batch_size, :].copy_( - reorder_block_ids_per_seq, non_blocking=True) - - @torch.compile(options={"max-autotune": True}) - def _get_local_max_and_combined(self, logits, mapping_lm_tp=None): - local_max_values, local_argmax = torch.max(logits, dim=-1, keepdim=True) - vocab_per_rank = logits.shape[-1] - mapping_lm_tp = mapping_lm_tp if mapping_lm_tp is not None else \ - self.model_config.mapping - max_index_per_rank = local_argmax.type( - torch.int32) + (mapping_lm_tp.tp_rank * vocab_per_rank) - max_index_per_rank_float = max_index_per_rank.float() - local_max_values_float32 = local_max_values.float() - combined = torch.stack( - [max_index_per_rank_float, local_max_values_float32], - dim=-1).flatten(-2) - return combined - - @torch.compile(options={"max-autotune": True}) - def _get_draft_tokens_from_gathered(self, gathered): - gathered_indices_float = gathered[..., 0::2] - gathered_values_float = gathered[..., 1::2] - max_indices = torch.argmax(gathered_values_float, dim=-1, keepdim=True) - draft_tokens = torch.gather(gathered_indices_float, -1, - max_indices).squeeze(-1).type(torch.int32) - return draft_tokens - - def draft_sampler( - self, - logits: torch.Tensor, - mapping_lm_head_tp=None, - ): - """TP-aware greedy draft token sampler (MTP Eagle path). - - Falls back to simple argmax when no tensor parallelism is active or - when only attention DP is enabled without LM-head TP. - """ - if (self.model_config is not None - and hasattr(self.model_config, 'mapping') - and self.model_config.mapping.tp_size > 1 - and not self.model_config.mapping.enable_attention_dp): - combined = self._get_local_max_and_combined(logits) - gathered = allgather(combined, self.model_config.mapping, dim=-1) - return self._get_draft_tokens_from_gathered(gathered) - elif (self.model_config is not None - and hasattr(self.model_config, 'mapping') - and self.model_config.mapping.tp_size > 1 - and self.model_config.mapping.enable_lm_head_tp_in_adp): - combined = self._get_local_max_and_combined(logits, - mapping_lm_head_tp) - gathered = allgather(combined, mapping_lm_head_tp, dim=-1) - batch_size = logits.shape[0] - local_batch_size = batch_size // mapping_lm_head_tp.tp_size - gathered = gathered.view(mapping_lm_head_tp.tp_size, - local_batch_size, -1) - sliced_gathered = gathered[mapping_lm_head_tp.tp_rank] - return self._get_draft_tokens_from_gathered(sliced_gathered) - else: - return self._draft_sampler_greedy(logits) - - @torch.compile(options={"max-autotune": True}) - def _topk_kernel(self, gen_logprobs, num_gens, mtp_num_modules, - spec_metadata): - topk_value, topk_indices = torch.topk(gen_logprobs, - k=self.spec_config.relaxed_topk, - dim=-1) - topk_indices = topk_indices.reshape(num_gens, mtp_num_modules + 1, - self.spec_config.relaxed_topk) - topk_value = topk_value.reshape(num_gens, mtp_num_modules + 1, - self.spec_config.relaxed_topk) - draft_tokens = spec_metadata.draft_tokens.reshape( - num_gens, mtp_num_modules) - return topk_value, topk_indices, draft_tokens - - @torch.compile(options={"max-autotune": True}) - def _process_generation_logits(self, logits, num_contexts): - gen_logits = logits[num_contexts:] - gen_logprobs = torch.softmax(gen_logits, dim=-1) - return gen_logprobs - def sample_and_accept_draft_tokens( self, - input_ids: torch.IntTensor, logits: torch.Tensor, attn_metadata: AttentionMetadata, spec_metadata: Eagle3OneModelSpecMetadata, ): - """Sample the golden token and verify previously proposed draft tokens. - - ``input_ids`` is scanned for thinking-phase tokens when relaxed - acceptance is enabled (both Eagle3 and MTP Eagle); ignored otherwise. - """ batch_size = attn_metadata.num_seqs num_contexts = attn_metadata.num_contexts num_gens = batch_size - num_contexts - runtime_draft_len = spec_metadata.runtime_draft_len - - if getattr(self.spec_config, 'use_relaxed_acceptance_for_thinking', - False): - # Relaxed acceptance — common path for Eagle3 and MTP Eagle. - # Accepts draft tokens that fall within the top-K candidates of the - # target distribution during the thinking phase. - if logits.dim() == 1: - logits = logits.unsqueeze(0) - - accepted_tokens = torch.ones((batch_size, runtime_draft_len + 1), - dtype=torch.int, - device=logits.device) - num_accepted_tokens = torch.ones(batch_size, - dtype=torch.int, - device=logits.device) - - resource_manager = spec_metadata.spec_resource_manager - relaxed_delta_pool = resource_manager.relaxed_delta_pool - - # Context phase: detect thinking tokens and update the delta pool - con_logits = logits[:num_contexts] - con_target_tokens = torch.argmax(con_logits, dim=-1) - accepted_tokens[:num_contexts, 0] = con_target_tokens[:num_contexts] - last_tokens_idx_for_thinking = torch.cumsum( - attn_metadata.seq_lens_cuda, dim=0, dtype=torch.long) - 1 - ctx_input_ids = input_ids[:attn_metadata.num_ctx_tokens] - ctx_is_think = (ctx_input_ids == - self.spec_config.begin_thinking_phase_token).int() - ctx_is_think_cumsum = torch.cumsum(ctx_is_think, dim=0) - ctx_last_cumsum = ctx_is_think_cumsum[ - last_tokens_idx_for_thinking[:num_contexts]] - ctx_think_tokens_num = torch.diff( - ctx_last_cumsum, - dim=0, - prepend=torch.zeros(1, - dtype=torch.int, - device=ctx_last_cumsum.device)) - ctx_delta = (ctx_think_tokens_num - >= 1).int() * self.spec_config.relaxed_delta - ctx_slot_ids = spec_metadata.slot_ids[:num_contexts] - relaxed_delta_pool.index_copy_(0, ctx_slot_ids, ctx_delta) - - # Generation phase: top-k logprobs + relaxed acceptance op - gen_logprobs = self._process_generation_logits(logits, num_contexts) - topk_value, topk_indices, draft_tokens = self._topk_kernel( - gen_logprobs, num_gens, runtime_draft_len, spec_metadata) - - accepted_tokens, num_accepted_tokens = torch.ops.trtllm.mtp_relaxed_acceptance_op( - spec_metadata.slot_ids, topk_value, topk_indices, draft_tokens, - relaxed_delta_pool, num_accepted_tokens, accepted_tokens, - runtime_draft_len, batch_size, num_contexts, - self.spec_config.relaxed_topk, self.spec_config.relaxed_delta, - self.spec_config.begin_thinking_phase_token, - self.spec_config.end_thinking_phase_token) - - num_accepted_tokens = self._apply_force_accepted_tokens( - num_accepted_tokens, num_contexts, runtime_draft_len) - - return accepted_tokens, num_accepted_tokens - - # Strict acceptance — common path for Eagle3 and MTP Eagle. Both modes - # use runtime_draft_len for dynamic draft length support. - if logits.dim() == 1: - logits = logits.unsqueeze(0) + # Linear mode: reshape draft tokens for base implementation draft_tokens = spec_metadata.draft_tokens.reshape( - num_gens, runtime_draft_len) if num_gens > 0 else torch.empty( - 0, runtime_draft_len, dtype=torch.int, device=logits.device) + num_gens, + spec_metadata.runtime_draft_len) if num_gens > 0 else torch.empty( + 0, + spec_metadata.runtime_draft_len, + dtype=torch.int, + device=logits.device) return self._accept_draft_tokens(logits, draft_tokens, num_contexts, batch_size, spec_metadata) + def draft_decoder( + self, + logits: torch.Tensor, + draft_model: nn.Module, + ): + ''' + Sampling draft tokens with support for non-greedy sampling. + + Args: + logits: torch.Tensor + [num_tokens, vocab_size] + Logits produced by the draft model. + draft_model: nn.Module + The draft model. + + Returns: + draft_tokens: torch.Tensor + [batch_size * max_draft_len] + Draft token ids. Flattened. + ''' + + d2t = getattr(draft_model.model, "d2t", None) + draft_tokens = self._draft_sampler_greedy(logits, d2t) + + return draft_tokens + def prepare_1st_drafter_inputs( self, input_ids: torch.LongTensor, @@ -1184,24 +844,15 @@ def prepare_1st_drafter_inputs( spec_metadata: Eagle3OneModelSpecMetadata, draft_model: nn.Module, ): - """Prepare inputs for the first draft model forward. - - Branching: - - Eagle3: applies ``apply_eagle3_fc`` on multi-layer concatenated - hidden states. - - MTP Eagle: uses ``hidden_states`` directly (single last layer); - no FC projection. - """ num_contexts = attn_metadata.num_contexts num_tokens = input_ids.shape[0] - if not self.is_mtp_eagle: - # Eagle3: project the multi-layer concatenated hidden states. - hidden_size_up = spec_metadata.hidden_size * len( - spec_metadata.layers_to_capture) - hidden_states = spec_metadata.hidden_states[:num_tokens, : - hidden_size_up] - hidden_states = draft_model.apply_eagle3_fc(hidden_states) + # prepare hidden states + hidden_size_up = spec_metadata.hidden_size * len( + spec_metadata.layers_to_capture) + hidden_states = spec_metadata.hidden_states[:num_tokens, : + hidden_size_up] + hidden_states = draft_model.apply_eagle3_fc(hidden_states) # context input_ids_ctx = self._prepare_context_input_ids( @@ -1222,25 +873,3 @@ def prepare_1st_drafter_inputs( "attn_metadata": attn_metadata, "spec_metadata": spec_metadata, } - - -class MTPEagleWorker(Eagle3OneModelWorker): - """Backward-compatible alias for ``Eagle3OneModelWorker`` in MTP Eagle mode. - - The constructor matches the historical positional signature - ``(spec_config, model_config, use_separate_draft_kv_cache)`` so callers - that import ``MTPEagleWorker`` from ``mtp.py`` or instantiate it directly - keep working. All logic is inherited from :class:`Eagle3OneModelWorker`. - """ - - def __init__(self, - spec_config, - model_config: Optional[ModelConfig] = None, - use_separate_draft_kv_cache: bool = False): - super().__init__( - spec_config, - mapping=None, - model_config=model_config, - use_separate_draft_kv_cache=use_separate_draft_kv_cache) - # Preserved for callers/tests that still expect this attribute. - self.is_thop = False diff --git a/tensorrt_llm/_torch/speculative/eagle3_dynamic_tree.py b/tensorrt_llm/_torch/speculative/eagle3_dynamic_tree.py index 47376001166d..90afb921d0a8 100644 --- a/tensorrt_llm/_torch/speculative/eagle3_dynamic_tree.py +++ b/tensorrt_llm/_torch/speculative/eagle3_dynamic_tree.py @@ -180,19 +180,7 @@ def __init__( self, spec_config: "EagleDecodingConfig", mapping, use_separate_draft_kv_cache: bool = False ): """Initialize dynamic-tree specific buffers and helper ops.""" - super().__init__( - spec_config, - mapping=mapping, - use_separate_draft_kv_cache=use_separate_draft_kv_cache, - ) - if ( - getattr(spec_config, "use_relaxed_acceptance_for_thinking", False) - or getattr(spec_config, "sa_config", None) is not None - ): - raise ValueError( - "Dynamic tree mode does not support relaxed acceptance or " - "suffix-automaton enhancement." - ) + super().__init__(spec_config, mapping, use_separate_draft_kv_cache) assert self.use_dynamic_tree, ( "Eagle3OneModelDynamicTreeWorker requires use_dynamic_tree=True" ) @@ -465,13 +453,8 @@ def _relocate_kv_eagerly(self, attn_metadata, batch_size): ) @nvtx_range("eagle3_dyn.sample_and_accept_draft_tokens") - def sample_and_accept_draft_tokens(self, input_ids, logits, attn_metadata, spec_metadata): - """Override to handle dynamic tree verification. - - ``input_ids`` is unused here (relaxed acceptance is not supported in - dynamic-tree mode); accepted to match the base class signature. - """ - del input_ids + def sample_and_accept_draft_tokens(self, logits, attn_metadata, spec_metadata): + """Override to handle dynamic tree verification.""" batch_size = attn_metadata.num_seqs num_contexts = attn_metadata.num_contexts num_gens = batch_size - num_contexts diff --git a/tensorrt_llm/_torch/speculative/interface.py b/tensorrt_llm/_torch/speculative/interface.py index c62111f0f511..c7a8358124cf 100644 --- a/tensorrt_llm/_torch/speculative/interface.py +++ b/tensorrt_llm/_torch/speculative/interface.py @@ -1,18 +1,3 @@ -# SPDX-FileCopyrightText: Copyright (c) 2022-2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. -# SPDX-License-Identifier: Apache-2.0 -# -# Licensed under the Apache License, Version 2.0 (the "License"); -# you may not use this file except in compliance with the License. -# You may obtain a copy of the License at -# -# http://www.apache.org/licenses/LICENSE-2.0 -# -# Unless required by applicable law or agreed to in writing, software -# distributed under the License is distributed on an "AS IS" BASIS, -# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -# See the License for the specific language governing permissions and -# limitations under the License. - import copy import os from abc import ABC, abstractmethod @@ -235,10 +220,7 @@ class SpeculativeDecodingMode(IntEnum): AUTO = auto() def is_mtp_one_model(self): - # Union: covers vanilla MTP and MTP_EAGLE_ONE_MODEL. Use is_mtp_vanilla() - # when only the vanilla MTP variant should match. - return (self == SpeculativeDecodingMode.MTP - or self == SpeculativeDecodingMode.MTP_EAGLE_ONE_MODEL) + return self == SpeculativeDecodingMode.MTP or self == SpeculativeDecodingMode.MTP_EAGLE_ONE_MODEL def is_mtp_eagle_one_model(self): return self == SpeculativeDecodingMode.MTP_EAGLE_ONE_MODEL @@ -314,7 +296,7 @@ def support_capturable_guided_decoder(self): def support_dynamic_draft_len(self): # TODO: expand to all one-model algorithms - return self.is_eagle3_one_model() or self.is_mtp_eagle_one_model() + return self.is_eagle3_one_model() def has_draft_model(self): return self.is_eagle3() or self.is_draft_target() or self.is_mtp_eagle() @@ -734,15 +716,8 @@ def skip_forward( attn_metadata, spec_metadata, draft_model, - resource_manager=None, ): - """Skip spec dec for non-last rank (PP). Returns placeholder outputs. - - ``resource_manager`` is accepted but unused; it appears in the - ``forward()`` signature of one-model workers (Eagle3 / MTP-Eagle) and - the caller in ``modeling_speculative.py`` forwards it unconditionally, - so the skip path must accept it as well. - """ + """Skip spec dec for non-last rank (PP). Returns placeholder outputs.""" batch_size = attn_metadata.num_seqs accepted_tokens = torch.empty((batch_size, (self.max_draft_len + 1)), dtype=torch.int, diff --git a/tensorrt_llm/_torch/speculative/mtp.py b/tensorrt_llm/_torch/speculative/mtp.py index dda345844c19..b8b5ff102586 100644 --- a/tensorrt_llm/_torch/speculative/mtp.py +++ b/tensorrt_llm/_torch/speculative/mtp.py @@ -3,12 +3,16 @@ from typing import TYPE_CHECKING, List, Optional import torch +import torch.nn.functional as F +from tensorrt_llm._torch.pyexecutor.mamba_cache_manager import \ + MambaHybridCacheManager from tensorrt_llm._utils import prefer_pinned from tensorrt_llm.mapping import Mapping from ..attention_backend import AttentionMetadata from ..distributed.ops import allgather +from ..model_config import ModelConfig from ..pyexecutor.llm_request import LlmRequest from ..pyexecutor.resource_manager import BaseResourceManager, SlotManager from ..pyexecutor.sampler import TorchSampler @@ -207,7 +211,7 @@ def prepare(self): mtp_slot_ids.append(slot_id) # MTP Vanilla: Update mtp hidden states and past tokens - if self.spec_dec_mode.is_mtp_vanilla(): + if self.spec_dec_mode.is_mtp_one_model(): mtp_hidden_states_ptrs = [] mtp_past_tokens_ptrs = [] for slot_id in mtp_slot_ids: @@ -1146,3 +1150,277 @@ def draft_sampler( draft_tokens = self._draft_sampler_greedy(logits) return draft_tokens + + +class MTPEagleWorker(MTPWorker): + + def __init__(self, + spec_config: "MTPDecodingConfig", + model_config: Optional[ModelConfig] = None, + use_separate_draft_kv_cache: bool = False): + super().__init__(spec_config, model_config, use_separate_draft_kv_cache) + self.model_config = model_config + self.mtp_num_modules = spec_config.max_draft_len + self._is_mamba_hybrid_cache = None + + @torch.compile(options={"max-autotune": True}) + def update_draft_tokens(self, next_draft_tokens, new_draft_token, + hidden_states, gather_ids, inputs): + next_draft_tokens.append(new_draft_token) + # update inputs + hidden_states = hidden_states[gather_ids] + position_ids = ( + _select_mtp_position_ids(inputs["position_ids"], gather_ids) + 1) + return hidden_states, position_ids + + @torch.compile(options={"max-autotune": True}) + def prepare_position_ids_and_last_tokens(self, position_ids, seq_lens_cuda): + position_ids = position_ids.squeeze(0) + last_tokens_idx = torch.cumsum(seq_lens_cuda, dim=0, + dtype=torch.long) - 1 + return position_ids, last_tokens_idx + + def forward( + self, + input_ids, + position_ids, + hidden_states, + logits, + attn_metadata, + spec_metadata, + draft_model, + resource_manager=None, + ): + + batch_size = attn_metadata.num_seqs + num_contexts = attn_metadata.num_contexts + num_gens = batch_size - num_contexts + + raw_logits = logits + + self._execute_guided_decoder_if_present(logits) + + # Sample and verify draft tokens + accepted_tokens, num_accepted_tokens = self.sample_and_accept_draft_tokens( + input_ids, logits, spec_metadata, attn_metadata) + + if self._is_mamba_hybrid_cache is None: + self._is_mamba_hybrid_cache = isinstance( + attn_metadata.kv_cache_manager, MambaHybridCacheManager) + if num_gens > 0 and self._is_mamba_hybrid_cache: + attn_metadata.kv_cache_manager.update_mamba_states( + attn_metadata=attn_metadata, + num_accepted_tokens=num_accepted_tokens, + state_indices=attn_metadata.mamba_metadata.state_indices) + + # Save the old attn_metadata and spec_metadata + self._prepare_attn_metadata_for_spec_dec(attn_metadata) + + position_ids, last_tokens_idx = self.prepare_position_ids_and_last_tokens( + position_ids, attn_metadata.seq_lens_cuda) + inputs = self.prepare_drafter_inputs(input_ids=input_ids, + position_ids=position_ids, + last_tokens_idx=last_tokens_idx, + hidden_states=hidden_states, + accepted_tokens=accepted_tokens, + attn_metadata=attn_metadata, + spec_metadata=spec_metadata) + + # Get the draft KV cache manager if using separate layouts + draft_kv_cache_manager = self.get_draft_kv_cache_manager( + resource_manager) + + # Predict draft tokens + next_draft_tokens = [] + with self.draft_kv_cache_context(attn_metadata, draft_kv_cache_manager): + for i in range(self.mtp_num_modules): + if i == 0: + hidden_states = draft_model.mtp_layers[0]( + embed_tokens=draft_model.embed_tokens, + all_rank_num_tokens=spec_metadata.all_rank_num_tokens, + **inputs) + + start_ids_gen = ( + spec_metadata.batch_indices_cuda[:num_gens] * + (self.mtp_num_modules + 1)).long() + gather_ids_gen = (start_ids_gen + + num_accepted_tokens[num_contexts:] - 1 + + attn_metadata.num_ctx_tokens) + gather_ids = torch.concat( + [last_tokens_idx[:num_contexts], gather_ids_gen], dim=0) + else: + hidden_states = draft_model.mtp_layers[0]( + embed_tokens=draft_model.embed_tokens, + all_rank_num_tokens=spec_metadata. + subseq_all_rank_num_tokens, + **inputs) + + # All of the seq_len are 1, use batch_indices_cuda as gather_ids + gather_ids = spec_metadata.batch_indices_cuda[:batch_size] + + if self.guided_decoder is not None: + new_tokens = inputs["input_ids"][gather_ids] + self.guided_decoder.add_draft_batch(new_tokens, + num_accepted_tokens, + draft_step=i) + if self.model_config.mapping.enable_attention_dp and \ + getattr(self.model_config.mapping, 'enable_lm_head_tp_in_adp', False): + hidden_states_gathered = hidden_states[gather_ids] + token_count = hidden_states_gathered.view( + -1, hidden_states_gathered.shape[-1]).shape[0] + max_num_requests = spec_metadata.max_num_requests + pad_len = max_num_requests - token_count + if pad_len > 0: + padded_hidden_states = F.pad( + hidden_states_gathered.view( + -1, hidden_states_gathered.shape[-1]), + (0, 0, 0, pad_len), + mode="constant", + value=0) + elif pad_len == 0: + padded_hidden_states = hidden_states_gathered.view( + -1, hidden_states_gathered.shape[-1]) + else: + raise ValueError( + "In MTPEagleWorker.forward(), token_count > max_num_requests, which is not supported" + ) + logits = draft_model.mtp_layers[0].shared_head( + padded_hidden_states, draft_model.lm_head, + attn_metadata, True) + else: + logits = draft_model.mtp_layers[0].shared_head( + hidden_states[gather_ids], draft_model.lm_head, + attn_metadata, True) + if self.guided_decoder is not None: + self.guided_decoder.execute_draft_batch(logits, + draft_step=i) + + if self.model_config.mapping.enable_attention_dp and \ + getattr(self.model_config.mapping, 'enable_lm_head_tp_in_adp', False): + mapping_lm_head_tp = draft_model.mtp_layers[ + 0].shared_head.mapping_lm_head_tp + new_draft_token = self.draft_sampler( + logits, mapping_lm_head_tp) + new_draft_token = new_draft_token[:token_count] + else: + new_draft_token = self.draft_sampler(logits) + + hidden_states, position_ids = self.update_draft_tokens( + next_draft_tokens, new_draft_token, hidden_states, + gather_ids, inputs) + # update attn_metadata + if i == 0: + attn_metadata._seq_lens[:batch_size].fill_(1) + attn_metadata._seq_lens_cuda[:batch_size].fill_(1) + attn_metadata.on_update() + # cannot run generation if there is no kv cache + has_kv_cache = inputs[ + "attn_metadata"].kv_cache_manager is not None + if has_kv_cache: + attn_metadata.host_request_types[:attn_metadata. + num_contexts].fill_(1) + attn_metadata.num_contexts = 0 + # update kv_lens_cuda + if hasattr(attn_metadata, 'kv_lens_cuda'): + attn_metadata.kv_lens_cuda[num_contexts:batch_size] -= ( + self.mtp_num_modules - + num_accepted_tokens[num_contexts:]) + attn_metadata.kv_lens_cuda[:num_contexts] += 1 + # update metadata for flash mla + if has_kv_cache and num_contexts > 0 and attn_metadata.enable_flash_mla: + reorder_block_ids_per_seq = torch.cat([ + attn_metadata. + kv_block_ids_per_seq[num_contexts:batch_size], + attn_metadata.kv_block_ids_per_seq[:num_contexts] + ]) + attn_metadata.block_ids_per_seq[:batch_size, :].copy_( + reorder_block_ids_per_seq, non_blocking=True) + # update metadata + # some attention metadata needs to be updated when changing seq_lens/kv_lens + attn_metadata.update_for_spec_dec() + # Disable spec-dec mode for subsequent iterations (i>0) + # as draft model only infer 1 token for the subsequent inference. + attn_metadata.use_spec_decoding = False + elif hasattr(attn_metadata, 'kv_lens_cuda'): + # update kv_lens_cuda + attn_metadata.kv_lens_cuda[:batch_size] += 1 + + # update metadata + # some attention metadata needs to be updated when changing kv_lens + attn_metadata.update_for_spec_dec() + inputs = { + "input_ids": new_draft_token, + "position_ids": position_ids, + "hidden_states": hidden_states, + "attn_metadata": attn_metadata, + } + + # restore attn_metadata to support cuda graph + self._restore_attn_metadata_from_spec_dec(attn_metadata) + attn_metadata.use_spec_decoding = True + + # Override with SA draft tokens after all MTP layers have run, + # so that MTP layers never see SA tokens in their inputs. + # Must happen before stacking since next_draft_tokens is still a list. + if self.sa_enhancer is not None: + stacked = torch.stack(next_draft_tokens, dim=1) + gen_draft_tokens = stacked[num_contexts:] + gen_draft_tokens = self.sa_enhancer.maybe_override_all_draft_tokens( + gen_draft_tokens) + stacked[num_contexts:] = gen_draft_tokens + next_draft_tokens = [stacked[:, i] for i in range(stacked.shape[1])] + + next_draft_tokens, next_new_tokens = self._prepare_next_tokens( + next_draft_tokens, accepted_tokens, spec_metadata, batch_size, + num_accepted_tokens) + + return { + 'logits': raw_logits, + 'new_tokens': accepted_tokens, + 'new_tokens_lens': num_accepted_tokens, + 'next_draft_tokens': next_draft_tokens, + 'next_new_tokens': next_new_tokens + } + + @torch.compile(options={"max-autotune": True}) + def _prepare_next_tokens(self, next_draft_tokens, accepted_tokens, + spec_metadata, batch_size, num_accepted_tokens): + """ + Stack draft tokens and prepare next_new_tokens for overlap scheduler. + """ + next_draft_tokens = torch.stack(next_draft_tokens, dim=1) + next_new_tokens = self._prepare_next_new_tokens( + accepted_tokens, next_draft_tokens, + spec_metadata.batch_indices_cuda, batch_size, num_accepted_tokens) + return next_draft_tokens, next_new_tokens + + @torch.compile(options={"max-autotune": True}) + def prepare_drafter_inputs( + self, + input_ids: torch.IntTensor, + position_ids: torch.IntTensor, + last_tokens_idx: torch.LongTensor, + hidden_states: torch.Tensor, + accepted_tokens: torch.Tensor, + attn_metadata: AttentionMetadata, + spec_metadata: MTPSpecMetadata, + ): + num_contexts = attn_metadata.num_contexts + + # context + input_ids_ctx = self._prepare_context_input_ids( + input_ids, attn_metadata.num_ctx_tokens, last_tokens_idx, + accepted_tokens, num_contexts) + + # generation + input_ids_gen = accepted_tokens[num_contexts:, :].flatten() + + # get draft inputs + input_ids = torch.concat([input_ids_ctx, input_ids_gen], dim=0) + + return { + "input_ids": input_ids, + "position_ids": position_ids, + "hidden_states": hidden_states, + "attn_metadata": attn_metadata, + } diff --git a/tensorrt_llm/_torch/speculative/utils.py b/tensorrt_llm/_torch/speculative/utils.py index 9c4284878b06..f2dd8ed2ca50 100644 --- a/tensorrt_llm/_torch/speculative/utils.py +++ b/tensorrt_llm/_torch/speculative/utils.py @@ -20,10 +20,11 @@ from .eagle3 import (Eagle3OneModelDynamicTreeResourceManager, Eagle3OneModelSampler, Eagle3OneModelSpecMetadata, Eagle3OneModelWorker, Eagle3ResourceManager, - Eagle3SpecMetadata, MTPEagleWorker) + Eagle3SpecMetadata) from .eagle3_dynamic_tree import Eagle3OneModelDynamicTreeWorker from .model_drafter import ModelDrafter -from .mtp import MTPHiddenStatesManager, MTPSampler, MTPSpecMetadata, MTPWorker +from .mtp import (MTPEagleWorker, MTPHiddenStatesManager, MTPSampler, + MTPSpecMetadata, MTPWorker) from .ngram import NGramDrafter, NGramPoolManager from .pard import PARDSpecMetadata, PARDWorker from .sa_worker import SASampler, SASpecMetadata, SAWorker @@ -42,28 +43,7 @@ def get_spec_metadata(spec_config, use_rejection_sampling = getattr(spec_config, "use_rejection_sampling", False) vocab_size = getattr(model_config, "vocab_size", 0) - if spec_config.spec_dec_mode.is_mtp_eagle_one_model(): - # MTP Eagle one-model reuses Eagle3 one-model metadata for the - # unified worker/sampler/slot_ids plumbing, but skips per-layer - # hidden-state capture: the worker feeds the target model's - # hidden_states directly into the MTP layer, so we leave - # layers_to_capture unset and let Eagle3OneModelSpecMetadata default - # it to an empty tuple. This also keeps post-MLP/MoE fusion enabled - # on models that gate it on is_layer_capture(). - return Eagle3OneModelSpecMetadata( - max_draft_len=spec_config.max_draft_len, - max_total_draft_tokens=spec_config.tokens_per_gen_step - 1, - spec_dec_mode=spec_config.spec_dec_mode, - max_num_requests=max_num_requests, - num_layers=model_config.num_hidden_layers, - hidden_size=model_config.hidden_size, - max_num_tokens=max_num_tokens, - allow_advanced_sampling=spec_config.allow_advanced_sampling, - use_rejection_sampling=use_rejection_sampling, - vocab_size=vocab_size, - spec_resource_manager=spec_resource_manager, - ) - if spec_config.spec_dec_mode.is_mtp_vanilla(): + if spec_config.spec_dec_mode.is_mtp_one_model(): return MTPSpecMetadata( max_draft_len=spec_config.max_draft_len, max_total_draft_tokens=spec_config.tokens_per_gen_step - 1, @@ -205,21 +185,16 @@ def get_spec_resource_manager(model_engine, draft_model_engine=None): sa_manager = SuffixAutomatonManager(sa_cfg, max_num_requests, max_seq_len) if spec_config.use_relaxed_acceptance_for_thinking or sa_manager is not None: - # Unified resource manager: the unified worker reads - # ``relaxed_delta_pool`` from ``Eagle3ResourceManager`` (mirrors the - # pool ``MTPHiddenStatesManager`` used to provide). - return Eagle3ResourceManager( + return MTPHiddenStatesManager( spec_config, model_config.torch_dtype, model_config.hidden_size, max_num_requests, - max_seq_len, - max_num_tokens, sa_manager=sa_manager, ) else: return None - if spec_dec_mode.is_mtp_vanilla(): + if spec_dec_mode.is_mtp_one_model(): sa_manager = None sa_cfg = getattr(spec_config, 'sa_config', None) if sa_cfg is not None: @@ -288,10 +263,7 @@ def get_spec_decoder( sampler_args: TorchSampler.Args, spec_config: "DecodingBaseConfig", ): - if spec_config.spec_dec_mode.is_mtp_eagle_one_model(): - # MTP Eagle one-model now uses the same sampler as Eagle3 one-model. - return Eagle3OneModelSampler(sampler_args, spec_config=spec_config) - if spec_config.spec_dec_mode.is_mtp_vanilla(): + if spec_config.spec_dec_mode.is_mtp_one_model(): return MTPSampler(sampler_args, nextn=spec_config.max_draft_len) if spec_config.spec_dec_mode.is_eagle3( ) or spec_config.spec_dec_mode.is_mtp_eagle(): @@ -342,9 +314,7 @@ def get_spec_drafter(model_engine, def get_num_spec_layers(spec_config): - if spec_config.spec_dec_mode.is_mtp_eagle_one_model(): - return 1 - if spec_config.spec_dec_mode.is_mtp_vanilla(): + if spec_config.spec_dec_mode.is_mtp_one_model(): return spec_config.num_nextn_predict_layers if spec_config.spec_dec_mode.is_eagle3_one_model(): num_eagle_layers = spec_config.num_eagle_layers @@ -366,10 +336,8 @@ def get_spec_worker(spec_config, if getattr(spec_config, 'use_dynamic_tree', False): return Eagle3OneModelDynamicTreeWorker(spec_config, mapping, use_separate_draft_kv_cache) - return Eagle3OneModelWorker( - spec_config, - mapping=mapping, - use_separate_draft_kv_cache=use_separate_draft_kv_cache) + return Eagle3OneModelWorker(spec_config, mapping, + use_separate_draft_kv_cache) if spec_dec_mode.is_pard(): return PARDWorker(spec_config, mapping, use_separate_draft_kv_cache) if spec_dec_mode.is_dflash(): diff --git a/tensorrt_llm/_torch/visual_gen/__init__.py b/tensorrt_llm/_torch/visual_gen/__init__.py index 2be964b60215..f7c5ca753ccd 100644 --- a/tensorrt_llm/_torch/visual_gen/__init__.py +++ b/tensorrt_llm/_torch/visual_gen/__init__.py @@ -12,7 +12,7 @@ from tensorrt_llm._torch.visual_gen.output import PipelineOutput from .checkpoints import WeightLoader -from .config import DiffusionModelConfig +from .config import DiffusionModelConfig, DiffusionPipelineConfig from .mapping import VisualGenMapping from .models import AutoPipeline, BasePipeline, WanPipeline from .pipeline_loader import PipelineLoader @@ -20,6 +20,7 @@ __all__ = [ "DiffusionModelConfig", + "DiffusionPipelineConfig", "PipelineComponent", "WeightLoader", "PipelineLoader", diff --git a/tensorrt_llm/_torch/visual_gen/attention_backend/parallel.py b/tensorrt_llm/_torch/visual_gen/attention_backend/parallel.py index 241aa8b2d166..bb1a84e6c30c 100644 --- a/tensorrt_llm/_torch/visual_gen/attention_backend/parallel.py +++ b/tensorrt_llm/_torch/visual_gen/attention_backend/parallel.py @@ -20,7 +20,7 @@ """ -from typing import TYPE_CHECKING, Optional +from typing import TYPE_CHECKING, Callable, ClassVar, Dict, Optional import torch import torch.distributed as dist @@ -42,6 +42,25 @@ _flash_attn_combine_import_error = e +def post_permute_5d_to_4d(out_5d, P): + """5D [P, B, Sp, H/P, D] → 4D [B, P*Sp, H/P, D] (block-by-rank gather). + .contiguous() copies slot data out (layout-normalize for SDPA, decoupling + from IPC slot lifetime). Inductor fuses permute+contig with downstream + SDPA input prep.""" + _P, Bt, Spt, HpP, Dt = out_5d.shape + return out_5d.permute(1, 0, 2, 3, 4).contiguous().view(Bt, _P * Spt, HpP, Dt) + + +def _ulysses_post_unscatter(q_5d, k_5d, v_5d, *, is_hnd): + """One-launch fused replacement for the post-A2A 5D -> 4D chain. + + is_hnd=True -> output [B, H, P*Sp, D] (VANILLA / torch SDPA) + is_hnd=False -> output [B, P*Sp, H, D] (TRTLLM / FA4) + """ + layout = 0 if is_hnd else 1 + return torch.ops.trtllm.ulysses_post_unscatter_qkv(q_5d, k_5d, v_5d, layout) + + class UlyssesAttention(AttentionBackend): """ Ulysses Sequence Parallelism wrapper. @@ -65,10 +84,16 @@ class UlyssesAttention(AttentionBackend): + 1 for output (2 collectives total) """ + # One side stream shared across all UlyssesAttention instances on the + # same device. Per-layer streams inflate the stream count and break + # cuda_graph capture. + _side_stream_by_device: ClassVar[Dict[int, "torch.cuda.Stream"]] = {} + def __init__( self, inner_backend: AttentionBackend, process_group: torch.distributed.ProcessGroup, + async_ulysses: bool = False, ): self.inner_backend = inner_backend self.process_group = process_group @@ -83,6 +108,24 @@ def __init__( self.num_heads = self.sharded_num_heads * self.world_size self.num_kv_heads = self.sharded_num_kv_heads * self.world_size + # Async pipeline state. Eagerly populated when async_ulysses=True; + # forward_async assumes these are set. Non-async path doesn't touch + # them. + self._pg_boxed = None + self._async_side_stream: Optional[torch.cuda.Stream] = None + # Count of deferred pushes since the last `_join_async`. `_join_async` + # drains exactly this many `ulysses_a2a_async_barrier` calls on the + # side stream so V/Q/K pushes FIFO together without intermediate + # barrier kernels. + self._pending_barriers: int = 0 + if async_ulysses: + device = torch.cuda.current_device() + if device not in UlyssesAttention._side_stream_by_device: + UlyssesAttention._side_stream_by_device[device] = torch.cuda.Stream(device=device) + self._async_side_stream = UlyssesAttention._side_stream_by_device[device] + if process_group is not None: + self._pg_boxed = process_group.boxed() + def forward( self, q: torch.Tensor, @@ -166,6 +209,120 @@ def _forward_unfused( return self._output_a2a(output, batch_size, seq_len_full) + # ------------------------------------------------------------------ + # Split-QKV async A2A pipeline. `_issue_async` and `_join_async` are + # the only stream-switch boundaries and are @torch.compiler.disable'd; + # the caller's compiled forward fuses each compute_{q,k,v} closure. + # ------------------------------------------------------------------ + + @torch.compiler.disable(recursive=False) + def _issue_async(self, perm_4d: torch.Tensor) -> torch.Tensor: + """Issue one V/Q/K async a2a (CE push only; barrier deferred to join). + Phase 1 (acquire slot + CUDA C permute+scatter) runs on the CURRENT + (default) stream. Phase 2a (cudaMemcpyBatchAsync peer push) is queued + on the comm side stream, gated by an event so it waits for Phase 1. + Phase 2b (symm-mem barrier) is NOT issued here — `_join_async` drains + all pending barriers in one shot so V/Q/K pushes FIFO through CE + without intermediate barrier kernels splitting them up. Returns the + 5D recv-buf view. + + Comm-stream FIFO serializes consecutive V/Q/K pushes in caller order; + no explicit chain event is needed between them. The default stream + is free to immediately begin the next V/Q/K compute — that's where + the V_push ∥ Q_compute ∥ K_compute overlap comes from.""" + recv, send_h = torch.ops.trtllm.ulysses_a2a_async_prepare(perm_4d, self._pg_boxed) + ev = torch.cuda.Event() + ev.record() + with torch.cuda.stream(self._async_side_stream): + ev.wait() + torch.ops.trtllm.ulysses_a2a_async_push(send_h, self._pg_boxed) + self._pending_barriers += 1 + return recv + + @torch.compiler.disable(recursive=False) + def _join_async(self) -> None: + """Drain pending symm-mem barriers (one per deferred push) on the + side stream, then have the default stream wait on the tail event. + Comm-stream FIFO preserves [push V, push Q, push K, barrier, barrier, + barrier] order; all N barriers fire on channel=0 with identical + semantics, so the default stream sees a fully-synced recv buffer.""" + with torch.cuda.stream(self._async_side_stream): + for _ in range(self._pending_barriers): + torch.ops.trtllm.ulysses_a2a_async_barrier(self._pg_boxed) + ev_done = torch.cuda.Event() + ev_done.record() + self._pending_barriers = 0 + torch.cuda.current_stream().wait_event(ev_done) + + def forward_async( + self, + compute_q: Callable[[], torch.Tensor], + compute_k: Callable[[], torch.Tensor], + compute_v: Callable[[], torch.Tensor], + **attn_kwargs, + ) -> torch.Tensor: + """Run the async ulysses attention path (V/Q/K rolling A2A). + + Args: + compute_q / compute_k / compute_v : caller-provided closures that + each return a 4D tensor `[B, S_local, H, D]`. The closure + typically does `GEMM → (RMSNorm) → (RoPE) → view(4D)`; closures + live in the caller's compiled forward so inductor fuses each + into a single Triton kernel. + **attn_kwargs : forwarded to the wrapped inner attention backend + (mask, scale, etc.). + + Returns: + output tensor in the caller's sharded layout `[B, S/P, H, D]`. + + Pipeline: V/Q/K computed in V→Q→K order on the default stream; each + compute's output is fed to `_issue_async` which queues push+barrier on + the comm side stream. Default stream proceeds to the next compute + immediately, so V's push overlaps with Q's compute, Q's push overlaps + with K's compute. `_join_async` makes default wait on the last push. + Post-attention permute / SDPA / reverse A2A run in the caller's outer + compile region for additional inductor fusion.""" + P = self.world_size + + v_4d = compute_v() + v_5d = self._issue_async(v_4d) + + q_4d = compute_q() + q_5d = self._issue_async(q_4d) + + k_4d = compute_k() + k_5d = self._issue_async(k_4d) + + self._join_async() + + # Fast path: one fused kernel replaces the eager post-A2A chain + # (6 ops for HND target: permute+reshape+contig + transpose+contig + # per Q/K/V; 3 ops for NHD target). bf16-only because the kernel is + # only instantiated for __nv_bfloat16. + _, B_q, Sp_q, HpP_q, D_q = q_5d.shape + is_hnd = self.inner_backend.preferred_layout == AttentionTensorLayout.HND + use_fused_post_unscatter = q_5d.dtype == torch.bfloat16 + if use_fused_post_unscatter: + q_out, k_out, v_out = _ulysses_post_unscatter(q_5d, k_5d, v_5d, is_hnd=is_hnd) + B = B_q + seq_len_full = P * Sp_q + else: + v_out = post_permute_5d_to_4d(v_5d, P) + q_out = post_permute_5d_to_4d(q_5d, P) + k_out = post_permute_5d_to_4d(k_5d, P) + + B = q_out.shape[0] + seq_len_full = q_out.shape[1] + if is_hnd: + q_out = q_out.transpose(1, 2).contiguous() + k_out = k_out.transpose(1, 2).contiguous() + v_out = v_out.transpose(1, 2).contiguous() + + attn_kwargs["seq_len"] = seq_len_full + attn_kwargs["seq_len_kv"] = seq_len_full + output = self.inner_backend.forward(q=q_out, k=k_out, v=v_out, **attn_kwargs) + return self._output_a2a(output, B, seq_len_full) + def _output_a2a( self, output: torch.Tensor, @@ -622,6 +779,7 @@ def wrap_parallel_attention( *, visual_gen_mapping: Optional["VisualGenMapping"] = None, enable_sequence_parallel: bool = True, + async_ulysses: bool = False, ) -> AttentionBackend: """Wrap a compute backend with the configured parallelism strategy. @@ -650,5 +808,9 @@ def wrap_parallel_attention( attn = RingAttention(attn, process_group=vgm.ring_group) if ulysses_size > 1: - attn = UlyssesAttention(attn, process_group=vgm.ulysses_group) + attn = UlyssesAttention( + attn, + process_group=vgm.ulysses_group, + async_ulysses=async_ulysses, + ) return attn diff --git a/tensorrt_llm/_torch/visual_gen/checkpoints/prefetch.py b/tensorrt_llm/_torch/visual_gen/checkpoints/prefetch.py new file mode 100644 index 000000000000..7e4f7a34e5a0 --- /dev/null +++ b/tensorrt_llm/_torch/visual_gen/checkpoints/prefetch.py @@ -0,0 +1,165 @@ +# SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. +# SPDX-License-Identifier: Apache-2.0 +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. +"""Host page-cache prefetch helpers for visual generation checkpoints.""" + +import multiprocessing +import os +from concurrent.futures import ThreadPoolExecutor +from typing import Iterable, Optional, Set + +import psutil +import torch.distributed as dist + +from tensorrt_llm.logger import logger + +_PREFETCH_CHUNK_SIZE = 16 * 1024 * 1024 + + +def _dist_initialized() -> bool: + return dist.is_available() and dist.is_initialized() + + +def _dist_barrier() -> None: + if _dist_initialized(): + dist.barrier() + + +def _get_int_env(name: str, default: int) -> int: + try: + return int(os.environ.get(name, "")) + except ValueError: + return default + + +def _local_rank_and_size() -> tuple[int, int]: + if not _dist_initialized(): + return 0, 1 + + rank = dist.get_rank() + world_size = dist.get_world_size() + local_rank = _get_int_env("LOCAL_RANK", rank) + local_size = _get_int_env("LOCAL_WORLD_SIZE", world_size) + + if local_size < 1 or local_rank < 0 or local_rank >= local_size: + return rank, world_size + return local_rank, local_size + + +def _get_local_available_host_memory() -> int: + """Return the minimum available host memory observed by local ranks. + + The prefetch/skip decision must be the same for all ranks that synchronize + at the post-prefetch barrier. Use torch.distributed to collect per-rank + snapshots and reduce the local slice to its minimum. + """ + available_memory = psutil.virtual_memory().available + if not _dist_initialized() or dist.get_world_size() == 1: + return available_memory + + world_size = dist.get_world_size() + gathered_memory: list[int | None] = [None] * world_size + dist.all_gather_object(gathered_memory, int(available_memory)) + + local_rank, local_size = _local_rank_and_size() + local_start = dist.get_rank() - local_rank + local_end = min(local_start + local_size, world_size) + local_memory = [ + memory for memory in gathered_memory[local_start:local_end] if memory is not None + ] + if not local_memory: + return available_memory + return min(local_memory) + + +def _normalize_paths( + file_names: Iterable[str], + prefetched_paths: Optional[Set[str]], +) -> list[str]: + paths: list[str] = [] + seen: set[str] = set() + for file_name in file_names: + path = os.path.abspath(file_name) + if path in seen: + continue + seen.add(path) + if prefetched_paths is not None and path in prefetched_paths: + continue + paths.append(path) + return paths + + +def _prefetch_file(file_name: str, description: str) -> None: + if not os.path.exists(file_name): + return + + logger.info(f"Prefetching {description} file {file_name} to host page cache...") + with open(file_name, "rb") as f: + while f.read(_PREFETCH_CHUNK_SIZE): + pass + logger.info(f"Finished prefetching {description} file {file_name}.") + + +def prefetch_files_to_host_cache( + file_names: Iterable[str], + *, + description: str, + prefetched_paths: Optional[Set[str]] = None, + ignore_errors: bool = False, +) -> bool: + """Warm checkpoint files in host page cache across distributed local ranks. + + Returns True only when all selected files were already prefetched or were + prefetched successfully. If prefetch is skipped or fails, returns False + when ignore_errors=True and raises otherwise. + """ + paths = _normalize_paths(file_names, prefetched_paths) + success = False + try: + if not paths: + success = True + return True + + prefetch_size = sum(os.path.getsize(path) for path in paths if os.path.exists(path)) + available_memory = _get_local_available_host_memory() + if prefetch_size >= available_memory * 0.9: + logger.info( + f"Skipping {description} prefetch because files require " + f"{prefetch_size / (1024**3):.2f}GB and available host memory is " + f"{available_memory / (1024**3):.2f}GB." + ) + return False + + local_rank, local_size = _local_rank_and_size() + local_paths = paths[local_rank::local_size] + if local_paths: + logger.info( + f"Prefetching {prefetch_size / (1024**3):.2f}GB {description} " + "files across distributed local ranks." + ) + max_workers = min(multiprocessing.cpu_count() * 2, 16, len(local_paths)) + with ThreadPoolExecutor(max_workers=max_workers) as executor: + list(executor.map(lambda path: _prefetch_file(path, description), local_paths)) + + success = True + return True + except Exception as exc: + if not ignore_errors: + raise + logger.warning(f"{description} prefetch failed; continuing without prefetch: {exc}") + return False + finally: + if success and prefetched_paths is not None: + prefetched_paths.update(paths) + _dist_barrier() diff --git a/tensorrt_llm/_torch/visual_gen/checkpoints/weight_loader.py b/tensorrt_llm/_torch/visual_gen/checkpoints/weight_loader.py index f1b22553ba66..824120840131 100644 --- a/tensorrt_llm/_torch/visual_gen/checkpoints/weight_loader.py +++ b/tensorrt_llm/_torch/visual_gen/checkpoints/weight_loader.py @@ -1,6 +1,7 @@ """Weight loader for diffusion models.""" import json +from concurrent.futures import ThreadPoolExecutor, as_completed from pathlib import Path from typing import Any, Dict, List, Union @@ -8,6 +9,7 @@ import tqdm from tensorrt_llm._torch.models.checkpoints.base_weight_loader import BaseWeightLoader +from tensorrt_llm._torch.visual_gen.checkpoints.prefetch import prefetch_files_to_host_cache from tensorrt_llm._torch.visual_gen.pipeline_registry import PipelineComponent from tensorrt_llm.logger import logger from tensorrt_llm.mapping import Mapping @@ -18,7 +20,7 @@ class WeightLoader(BaseWeightLoader): Weight loader for diffusion models. Loads weights from safetensors/bin files, similar to HfWeightLoader - but simpler (no parallel loading optimization for now). + but tailored for diffusion checkpoint layouts. Supports loading multiple components (e.g., transformer and transformer_2): loader = WeightLoader(components=["transformer", "transformer_2"]) @@ -87,12 +89,13 @@ def load_weights( if not weight_files: raise ValueError(f"No weight files found in {weight_dir}") - # Load all weights with progress bar - component_weights = {} - desc = f"Loading {component}" if is_pipeline else "Loading checkpoint" - for wf in tqdm.tqdm(weight_files, desc=desc): - component_weights.update(self._load_file(wf)) + if all(wf.endswith(".safetensors") for wf in weight_files): + prefetch_files_to_host_cache( + weight_files, + description="visual-gen checkpoint", + ) + component_weights = self._load_weight_files(weight_files, component, is_pipeline) all_weights[component] = component_weights # Return flat dict for single component (backward compatibility) @@ -102,6 +105,32 @@ def load_weights( # Return nested dict for multiple components return all_weights + def _load_weight_files( + self, weight_files: List[str], component: str, is_pipeline: bool + ) -> Dict[str, Any]: + desc = f"Loading {component}" if is_pipeline else "Loading checkpoint" + if len(weight_files) <= 1: + component_weights = {} + for wf in tqdm.tqdm(weight_files, desc=desc): + component_weights.update(self._load_file(wf)) + return component_weights + + workers = min(4, len(weight_files)) + + logger.info(f"Loading {len(weight_files)} {component} shard files with {workers} workers") + component_weights = {} + with ThreadPoolExecutor(max_workers=workers) as executor: + futures = {executor.submit(self._load_file, wf): wf for wf in weight_files} + for future in tqdm.tqdm(as_completed(futures), total=len(futures), desc=desc): + wf = futures[future] + try: + loaded = future.result() + except Exception as exc: + raise RuntimeError(f"Failed to load weight file {wf}") from exc + component_weights.update(loaded) + + return component_weights + def _find_weight_files(self, weight_dir) -> List[str]: """Find safetensors or bin weight files. diff --git a/tensorrt_llm/_torch/visual_gen/config.py b/tensorrt_llm/_torch/visual_gen/config.py index 34c7b6665621..d709fab278e6 100644 --- a/tensorrt_llm/_torch/visual_gen/config.py +++ b/tensorrt_llm/_torch/visual_gen/config.py @@ -12,7 +12,7 @@ # WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. # See the License for the specific language governing permissions and # limitations under the License. -"""Internal DiffusionModelConfig and loading helpers.""" +"""Internal VisualGen pipeline and model configuration helpers.""" import json from pathlib import Path @@ -85,25 +85,84 @@ def create_attention_metadata_state() -> Dict[str, Any]: return {"metadata": None, "capacity": (0, 0)} +class _VisualGenConfigBase(BaseModel): + """Base for internal VisualGen configs that carry runtime objects.""" + + # Pydantic reserves `model_config` for class-level settings. This is not + # a VisualGen model config; it lets fields hold objects such as Mapping. + model_config = ConfigDict(arbitrary_types_allowed=True) + + +class DiffusionModelConfig(_VisualGenConfigBase): + """Internal config for one TRT-LLM VisualGen model component.""" + + component_name: Optional[str] = None + pretrained_config: Optional[Any] = None + mapping: Mapping = PydanticField(default_factory=Mapping) + skip_create_weights_in_init: bool = False + force_dynamic_quantization: bool = False + allreduce_strategy: AllReduceStrategy = PydanticField(default=AllReduceStrategy.NCCL) + extra_attrs: Dict = PydanticField(default_factory=dict) + + # Unified parallelism mapping copied from the owning pipeline config. + visual_gen_mapping: Optional[Any] = None # VisualGenMapping (lazy import) + + dynamic_weight_quant: bool = False + + # Shared runtime configs copied from the owning pipeline config. + quant_config: QuantConfig = PydanticField(default_factory=QuantConfig) + # Per-layer quant (from load_diffusion_quant_config layer_quant_config; None until mixed-precision parsing exists) + quant_config_dict: Optional[Dict[str, QuantConfig]] = None + compilation: CompilationConfig = PydanticField(default_factory=CompilationConfig) + torch_compile: TorchCompileConfig = PydanticField(default_factory=TorchCompileConfig) + cuda_graph: CudaGraphConfig = PydanticField(default_factory=CudaGraphConfig) + attention: AttentionConfig = PydanticField(default_factory=AttentionConfig) + attention_metadata_state: Optional[Dict[str, Any]] = None + parallel: ParallelConfig = PydanticField(default_factory=ParallelConfig) + cache: Optional[CacheConfig] = None + + # Observability — flat field mirrors VisualGenArgs.enable_layerwise_nvtx_marker. + enable_layerwise_nvtx_marker: bool = False + + @property + def cache_backend(self) -> Optional[CacheBackendName]: + return self.cache.cache_backend if self.cache is not None else None # type: ignore[return-value] + + @property + def teacache(self) -> Optional[TeaCacheConfig]: + return self.cache if isinstance(self.cache, TeaCacheConfig) else None + + @property + def cache_dit(self) -> Optional[CacheDiTConfig]: + return self.cache if isinstance(self.cache, CacheDiTConfig) else None + + @property + def torch_dtype(self) -> "torch.dtype": + """Get the torch dtype of the model (default: bfloat16).""" + return torch.bfloat16 + + def get_quant_config(self, name: Optional[str] = None) -> QuantConfig: + """Get quantization config for a layer or global. Resembles LLM ModelConfig.get_quant_config.""" + if name is None or self.quant_config_dict is None: + return self.quant_config + if name in self.quant_config_dict: + return self.quant_config_dict[name] + return self.quant_config + + # ============================================================================= -# DiffusionModelConfig - Internal configuration (merged/parsed) +# DiffusionPipelineConfig - Internal pipeline configuration (merged/parsed) # ============================================================================= -class DiffusionModelConfig(BaseModel): - """Internal ModelConfig for diffusion models. +class DiffusionPipelineConfig(_VisualGenConfigBase): + """Internal config for an entire VisualGen pipeline. - This is created by PipelineLoader from VisualGenArgs + checkpoint. - Contains merged/parsed config from: - - pretrained_config: From checkpoint/config.json - - quant_config: From checkpoint or user quant config - - Sub-configs: From VisualGenArgs (pipeline, attention, teacache) - - visual_gen_mapping: Populated by setup_visual_gen_mapping() from ParallelConfig + This is created by PipelineLoader from VisualGenArgs + checkpoint and owns + pipeline/runtime state plus one DiffusionModelConfig per model component. """ - model_config = ConfigDict(arbitrary_types_allowed=True) - - pretrained_config: Optional[Any] = None + model_configs: Dict[str, DiffusionModelConfig] = PydanticField(default_factory=dict) mapping: Mapping = PydanticField(default_factory=Mapping) skip_create_weights_in_init: bool = False force_dynamic_quantization: bool = False @@ -127,15 +186,17 @@ class DiffusionModelConfig(BaseModel): parallel: ParallelConfig = PydanticField(default_factory=ParallelConfig) cache: Optional[CacheConfig] = None - # Merged per-family pipeline_config: registry-entry defaults overlaid - # with the user-supplied VisualGenArgs.pipeline_config dict (user - # values win). Validated against the registry entry's `defaults` - # before assignment, so unknown keys never reach here. - pipeline_config: Dict[str, Any] = PydanticField(default_factory=dict) - # Observability — flat field mirrors VisualGenArgs.enable_layerwise_nvtx_marker. enable_layerwise_nvtx_marker: bool = False + @property + def primary_model_config(self) -> DiffusionModelConfig: + return self.model_configs["transformer"] + + @property + def primary_pretrained_config(self) -> Any: + return self.primary_model_config.pretrained_config + @property def cache_backend(self) -> Optional[CacheBackendName]: return self.cache.cache_backend if self.cache is not None else None # type: ignore[return-value] @@ -161,6 +222,33 @@ def get_quant_config(self, name: Optional[str] = None) -> QuantConfig: return self.quant_config_dict[name] return self.quant_config + def _make_model_config( + self, + component_name: str, + model_pretrained_config: Any, + ) -> DiffusionModelConfig: + return DiffusionModelConfig( + component_name=component_name, + pretrained_config=model_pretrained_config, + mapping=self.mapping, + skip_create_weights_in_init=self.skip_create_weights_in_init, + force_dynamic_quantization=self.force_dynamic_quantization, + allreduce_strategy=self.allreduce_strategy, + extra_attrs=self.extra_attrs, + visual_gen_mapping=self.visual_gen_mapping, + dynamic_weight_quant=self.dynamic_weight_quant, + quant_config=self.quant_config, + quant_config_dict=self.quant_config_dict, + compilation=self.compilation, + torch_compile=self.torch_compile, + cuda_graph=self.cuda_graph, + attention=self.attention, + attention_metadata_state=self.attention_metadata_state, + parallel=self.parallel, + cache=self.cache, + enable_layerwise_nvtx_marker=self.enable_layerwise_nvtx_marker, + ) + @staticmethod def load_diffusion_quant_config( quant_config_dict: dict, @@ -346,12 +434,12 @@ def from_pretrained( checkpoint_dir: str, args: Optional["VisualGenArgs"] = None, **kwargs, - ) -> "DiffusionModelConfig": + ) -> "DiffusionPipelineConfig": """ Load config from pretrained checkpoint. Called by PipelineLoader with VisualGenArgs: - config = DiffusionModelConfig.from_pretrained( + config = DiffusionPipelineConfig.from_pretrained( checkpoint_dir=args.model, args=args, ) @@ -404,6 +492,7 @@ def from_pretrained( # Discover pipeline components (diffusers layout) components = discover_pipeline_components(checkpoint_path) + component_config_dicts: Dict[str, Dict[str, Any]] = {} if components: # ---------- Diffusers directory layout ---------- @@ -415,8 +504,11 @@ def from_pretrained( if not config_path.exists(): raise ValueError(f"Config not found at {config_path}") - with open(config_path) as f: - config_dict = json.load(f) + for component_name, component_config_path in components.items(): + with open(component_config_path) as f: + component_config_dicts[component_name] = json.load(f) + + config_dict = component_config_dicts[component] pretrained_config = SimpleNamespace(**config_dict) # Ensure _name_or_path is set so TeaCache coefficient matching works. @@ -439,6 +531,10 @@ def from_pretrained( if native_config is not None: transformer_dict = native_config.get("transformer", {}) + component_config_dicts["transformer"] = transformer_dict + transformer_2_dict = native_config.get("transformer_2") + if isinstance(transformer_2_dict, dict): + component_config_dicts["transformer_2"] = transformer_2_dict pretrained_config = SimpleNamespace(**transformer_dict) if not getattr(pretrained_config, "_name_or_path", None): pretrained_config._name_or_path = str(checkpoint_path) @@ -551,8 +647,7 @@ def from_pretrained( create_attention_metadata_state() if attention_cfg.backend == "TRTLLM" else None ) - return cls( - pretrained_config=pretrained_config, + pipeline_config = cls( quant_config=quant_config, quant_config_dict=quant_config_dict, dynamic_weight_quant=dynamic_weight_quant, @@ -566,8 +661,29 @@ def from_pretrained( parallel=parallel_cfg, cache=cache_cfg, enable_layerwise_nvtx_marker=enable_layerwise_nvtx_marker, - pipeline_config=resolved_pipeline_config, skip_create_weights_in_init=True, extra_attrs=extra_attrs, **kwargs, ) + + for component_name, config_dict in component_config_dicts.items(): + if component_name == component: + component_pretrained_config = pretrained_config + else: + component_pretrained_config = SimpleNamespace(**config_dict) + if not getattr(component_pretrained_config, "_name_or_path", None): + component_pretrained_config._name_or_path = getattr( + pretrained_config, "_name_or_path", "" + ) + pipeline_config.model_configs[component_name] = pipeline_config._make_model_config( + component_name, + component_pretrained_config, + ) + + if not pipeline_config.model_configs: + pipeline_config.model_configs["transformer"] = pipeline_config._make_model_config( + "transformer", + pretrained_config, + ) + + return pipeline_config diff --git a/tensorrt_llm/_torch/visual_gen/models/cosmos3/pipeline_cosmos3.py b/tensorrt_llm/_torch/visual_gen/models/cosmos3/pipeline_cosmos3.py index 800006216bf2..732dc5d4fa9d 100644 --- a/tensorrt_llm/_torch/visual_gen/models/cosmos3/pipeline_cosmos3.py +++ b/tensorrt_llm/_torch/visual_gen/models/cosmos3/pipeline_cosmos3.py @@ -52,15 +52,23 @@ TRTLLM_DISABLE_COSMOS3_GUARDRAILS = os.environ.get("TRTLLM_DISABLE_COSMOS3_GUARDRAILS", "0") == "1" -# TODO: add hf_ids -@register_pipeline("Cosmos3OmniMoTPipeline") +@register_pipeline( + "Cosmos3OmniMoTPipeline", + hf_ids=[ + "nvidia/Cosmos3-Nano", + "nvidia/Cosmos3-Super", + "nvidia/Cosmos3-Super-Image2Video", + "nvidia/Cosmos3-Super-Text2Image", + ], + doc="Cosmos3 Omnimodal world models.", +) class Cosmos3OmniMoTPipeline(BasePipeline): - def __init__(self, model_config): - super().__init__(model_config) + def __init__(self, pipeline_config): + super().__init__(pipeline_config) def _init_transformer(self) -> None: logger.info("Initializing Cosmos3VFMTransformer") - self.transformer = Cosmos3VFMTransformer(self.model_config) + self.transformer = Cosmos3VFMTransformer(self.pipeline_config.model_configs["transformer"]) def load_weights(self, weights: dict) -> None: if self.transformer is not None and hasattr(self.transformer, "load_weights"): @@ -107,6 +115,10 @@ def load_standard_components( subfolder=PipelineComponent.SCHEDULER, ) + # Re-check the env var in case it was changed after initialization like in unit tests. + guardrails_disabled = os.environ.get("TRTLLM_DISABLE_COSMOS3_GUARDRAILS", "0") == "1" + global TRTLLM_DISABLE_COSMOS3_GUARDRAILS + TRTLLM_DISABLE_COSMOS3_GUARDRAILS = guardrails_disabled if not TRTLLM_DISABLE_COSMOS3_GUARDRAILS: # lazy import try: diff --git a/tensorrt_llm/_torch/visual_gen/models/cosmos3/transformer_cosmos3.py b/tensorrt_llm/_torch/visual_gen/models/cosmos3/transformer_cosmos3.py index 015534cfab02..82e8d7fa65b6 100644 --- a/tensorrt_llm/_torch/visual_gen/models/cosmos3/transformer_cosmos3.py +++ b/tensorrt_llm/_torch/visual_gen/models/cosmos3/transformer_cosmos3.py @@ -17,7 +17,6 @@ from typing import Tuple import torch -import torch.distributed as dist import torch.nn as nn import torch.nn.functional as F from diffusers.models.embeddings import TimestepEmbedding @@ -27,8 +26,10 @@ from tensorrt_llm._torch.modules.gated_mlp import GatedMLP from tensorrt_llm._torch.modules.linear import Linear from tensorrt_llm._torch.visual_gen.config import DiffusionModelConfig +from tensorrt_llm._torch.visual_gen.models.modeling import BaseDiffusionModel from tensorrt_llm._torch.visual_gen.modules.attention import Attention, QKVMode from tensorrt_llm._torch.visual_gen.quantization.loader import DynamicLinearWeightLoader +from tensorrt_llm._torch.visual_gen.utils import SequenceSharder from tensorrt_llm.logger import logger from tensorrt_llm.models.modeling_utils import QuantConfig @@ -221,7 +222,7 @@ def __init__( num_key_value_heads=num_key_value_heads, head_dim=head_dim, qkv_mode=QKVMode.SEPARATE_QKV, - qk_norm=True, + qk_norm=False, qk_norm_mode="per_head", bias=False, config=model_config, @@ -247,9 +248,9 @@ def forward_with_kv( q, k, v = self.get_qkv(hidden_states) - q = q.view(batch_size, seq_len, self.num_attention_heads, self.head_dim) - k = k.view(batch_size, seq_len, self.num_key_value_heads, self.head_dim) - v = v.view(batch_size, seq_len, self.num_key_value_heads, self.head_dim) + q = q.view(batch_size, seq_len, self.local_num_attention_heads, self.head_dim) + k = k.view(batch_size, seq_len, self.local_num_key_value_heads, self.head_dim) + v = v.view(batch_size, seq_len, self.local_num_key_value_heads, self.head_dim) q, k = self.apply_qk_norm(q, k) q, k = qwen3_apply_rotary_pos_emb(q, k, freqs_cos, freqs_sin) @@ -300,7 +301,7 @@ def __init__( num_key_value_heads=num_key_value_heads, head_dim=head_dim, qkv_mode=QKVMode.FUSE_QKV, - qk_norm=True, + qk_norm=False, qk_norm_mode="per_head", bias=False, config=model_config, @@ -341,9 +342,9 @@ def forward( q, k, v = self.get_qkv(hidden_states) - q = q.view(batch_size, seq_len_gen, self.num_attention_heads, self.head_dim) - k = k.view(batch_size, seq_len_gen, self.num_key_value_heads, self.head_dim) - v = v.view(batch_size, seq_len_gen, self.num_key_value_heads, self.head_dim) + q = q.view(batch_size, seq_len_gen, self.local_num_attention_heads, self.head_dim) + k = k.view(batch_size, seq_len_gen, self.local_num_key_value_heads, self.head_dim) + v = v.view(batch_size, seq_len_gen, self.local_num_key_value_heads, self.head_dim) q, k = self.apply_qk_norm(q, k) q, k = qwen3_apply_rotary_pos_emb(q, k, freqs_cos, freqs_sin) @@ -395,6 +396,7 @@ def __init__(self, model_config: DiffusionModelConfig, layer_idx: int): dtype=torch.bfloat16, config=model_config, layer_idx=layer_idx, + reduce_output=model_config.mapping.tp_size > 1, ) def forward( @@ -457,6 +459,7 @@ def __init__(self, model_config: DiffusionModelConfig, layer_idx: int): dtype=torch.bfloat16, config=model_config, layer_idx=layer_idx, + reduce_output=model_config.mapping.tp_size > 1, ) def forward( @@ -639,10 +642,9 @@ def forward( return cached_kv -class Cosmos3VFMTransformer(nn.Module): +class Cosmos3VFMTransformer(BaseDiffusionModel): def __init__(self, model_config: DiffusionModelConfig): - super().__init__() - self.model_config = model_config + super().__init__(model_config) pretrained_config = model_config.pretrained_config self.hidden_size = pretrained_config.hidden_size @@ -669,44 +671,31 @@ def __init__(self, model_config: DiffusionModelConfig): ) vgm = model_config.visual_gen_mapping - attn2d_row_size = vgm.attn2d_row_size if vgm else 1 - attn2d_col_size = vgm.attn2d_col_size if vgm else 1 - attn2d_mesh_size = attn2d_row_size * attn2d_col_size - ulysses_size = vgm.ulysses_size if vgm else 1 - use_attn2d = attn2d_mesh_size > 1 - use_ulysses = ulysses_size > 1 - if vgm is not None and vgm.tp_size > 1: - raise ValueError( - f"Cosmos3 does not support tensor parallelism. Got tp_size={vgm.tp_size}" - ) + self.sharder = SequenceSharder.from_vgm( + vgm, + num_attention_heads=self.num_attention_heads, + num_kv_heads=self.num_kv_heads, + ) + tp_size = vgm.tp_size if vgm else 1 + ulysses_size = vgm.ulysses_size if vgm else 1 + cp_size = vgm.cp_size if vgm else 1 + head_divisibility_factor = tp_size * ulysses_size - if use_ulysses and ( - self.num_attention_heads % ulysses_size != 0 or self.num_kv_heads % ulysses_size != 0 + if (ulysses_size > 1 or tp_size > 1) and ( + self.num_attention_heads % head_divisibility_factor != 0 + or self.num_kv_heads % head_divisibility_factor != 0 ): raise ValueError( f"num_attention_heads ({self.num_attention_heads}) and " f"num_kv_heads ({self.num_kv_heads}) must be divisible by " - f"ulysses_size ({ulysses_size})" + f"TP * Ulysses size ({tp_size} * {ulysses_size})" ) - if use_attn2d: - # Attention2D is not compatible with Cosmos3 cross-attention: its forward() + if cp_size > 1: + # Context parallelism is not compatible with Cosmos3 cross-attention: its forward() # TODO: Re-enable once Ring/Attn2D PRs with cross-attention support have landed. - raise NotImplementedError( - "Attention2D (Ring attention) is not supported for Cosmos3. " - "Use Ulysses sequence parallelism instead." - ) - elif use_ulysses: - self.use_seq_parallel = True - self.seq_parallel_size = ulysses_size - self.seq_parallel_pg = vgm.ulysses_group - self.seq_parallel_rank = vgm.ulysses_rank - else: - self.use_seq_parallel = False - self.seq_parallel_size = 1 - self.seq_parallel_pg = None - self.seq_parallel_rank = 0 + raise NotImplementedError("Context parallelism is not supported for Cosmos3. ") self.language_model = Cosmos3LanguageModel(model_config) @@ -920,73 +909,40 @@ def forward( cached_kv_full = self.language_model(text_ids, text_mask, freqs_und) self.cached_freqs_gen = freqs_gen - if self.use_seq_parallel: - rank = self.seq_parallel_rank - # Round max_real_len up to next multiple of ulysses_size. - # At most seq_parallel_size-1 extra positions, negligible softmax dilution. - val = ( - self.seq_parallel_size - max_real_len % self.seq_parallel_size - ) % self.seq_parallel_size + if self.sharder.is_active: + # Round max_real_len up to next multiple of sharder.size. + # At most size-1 extra positions, negligible softmax dilution. + val = (self.sharder.size - max_real_len % self.sharder.size) % self.sharder.size S_text_shard_total = int(max_real_len) + val - S_text_shard = S_text_shard_total // self.seq_parallel_size self.cached_kv = [] for k, v in cached_kv_full: - # Slice to S_text_shard_total; zero out the val padding positions k = k[:, :S_text_shard_total].clone() v = v[:, :S_text_shard_total].clone() if val > 0: k[:, int(max_real_len) :] = 0 v[:, int(max_real_len) :] = 0 self.cached_kv.append( - ( - k[:, rank * S_text_shard : (rank + 1) * S_text_shard], - v[:, rank * S_text_shard : (rank + 1) * S_text_shard], - ) + (self.sharder.shard(k, dim=1), self.sharder.shard(v, dim=1)) ) else: self.cached_kv = cached_kv_full - if self.use_seq_parallel: - S_gen = hidden_gen.shape[1] - pad = (self.seq_parallel_size - S_gen % self.seq_parallel_size) % self.seq_parallel_size - if pad > 0: - # This will cause minor noise in softmax due to padding. - hidden_gen = F.pad(hidden_gen, (0, 0, 0, pad)) - cos, sin = self.cached_freqs_gen - cos_padded = F.pad(cos, (0, 0, 0, 0, 0, pad)) - sin_padded = F.pad(sin, (0, 0, 0, 0, 0, pad)) - else: - cos_padded, sin_padded = self.cached_freqs_gen - padded_s_gen = S_gen + pad - S_shard = padded_s_gen // self.seq_parallel_size - hidden_gen = hidden_gen[ - :, self.seq_parallel_rank * S_shard : (self.seq_parallel_rank + 1) * S_shard - ] - # Shard freqs_gen to match - freqs_gen = ( - cos_padded[ - :, self.seq_parallel_rank * S_shard : (self.seq_parallel_rank + 1) * S_shard - ], - sin_padded[ - :, self.seq_parallel_rank * S_shard : (self.seq_parallel_rank + 1) * S_shard - ], - ) - else: - freqs_gen = self.cached_freqs_gen + S_gen = hidden_gen.shape[1] + hidden_gen = self.sharder.shard(hidden_gen, dim=1, pad_to_multiple=True) + cos, sin = self.cached_freqs_gen + cos = self.sharder.shard(cos, dim=1, pad_to_multiple=True) + sin = self.sharder.shard(sin, dim=1, pad_to_multiple=True) + freqs_gen = (cos, sin) for i, layer in enumerate(self.gen_layers): k_und, v_und = self.cached_kv[i] - if self.seq_parallel_size <= 1: + if not self.sharder.is_active: k_und = k_und[:, :max_real_len] v_und = v_und[:, :max_real_len] hidden_gen = layer(hidden_gen, k_und, v_und, freqs_gen) - if self.use_seq_parallel: - hidden_gen = hidden_gen.contiguous() - parts = [torch.empty_like(hidden_gen) for _ in range(self.seq_parallel_size)] - dist.all_gather(parts, hidden_gen, group=self.seq_parallel_pg) - hidden_gen = torch.cat(parts, dim=1)[:, :S_gen] # [B, S_gen, patch_latent_dim] + hidden_gen = self.sharder.gather(hidden_gen, dim=1, unpad_to=S_gen) hidden_gen = self.norm_moe_gen(hidden_gen) return self.unpatchify(self.llm2vae(hidden_gen), T, H, W) diff --git a/tensorrt_llm/_torch/visual_gen/models/flux/pipeline_flux.py b/tensorrt_llm/_torch/visual_gen/models/flux/pipeline_flux.py index c43345f9c8c4..196c3c927e7a 100644 --- a/tensorrt_llm/_torch/visual_gen/models/flux/pipeline_flux.py +++ b/tensorrt_llm/_torch/visual_gen/models/flux/pipeline_flux.py @@ -50,16 +50,16 @@ class FluxPipeline(BasePipeline): Supports FLUX.1-dev (50 steps, guidance) and FLUX.1-schnell (4 steps, no guidance). """ - def __init__(self, model_config): + def __init__(self, pipeline_config): if ( - model_config.visual_gen_mapping is not None - and model_config.visual_gen_mapping.cfg_size != 1 + pipeline_config.visual_gen_mapping is not None + and pipeline_config.visual_gen_mapping.cfg_size != 1 ): raise ValueError( "FluxPipeline does not support CFG parallelism. Please set cfg_size to 1." ) - super().__init__(model_config) + super().__init__(pipeline_config) @staticmethod def _compute_flux_timestep_embedding( @@ -99,7 +99,7 @@ def _compute_flux_timestep_embedding( @property def dtype(self): - return self.model_config.torch_dtype + return self.pipeline_config.torch_dtype @property def device(self): @@ -121,7 +121,9 @@ def warmup_cache_key(self, height: int, width: int, **kwargs) -> tuple: def _init_transformer(self) -> None: """Initialize FLUX transformer with quantization support.""" logger.info("Creating FLUX transformer with quantization support...") - self.transformer = FluxTransformer2DModel(model_config=self.model_config) + self.transformer = FluxTransformer2DModel( + model_config=self.pipeline_config.model_configs["transformer"] + ) def _run_warmup(self, height: int, width: int, num_frames: int, steps: int) -> None: with torch.no_grad(): @@ -156,7 +158,7 @@ def load_standard_components( self.text_encoder = CLIPTextModel.from_pretrained( checkpoint_dir, subfolder=PipelineComponent.TEXT_ENCODER, - torch_dtype=self.model_config.torch_dtype, + torch_dtype=self.pipeline_config.torch_dtype, ).to(device) # T5 tokenizer and text encoder (for sequence embeddings) @@ -171,7 +173,7 @@ def load_standard_components( self.text_encoder_2 = T5EncoderModel.from_pretrained( checkpoint_dir, subfolder=PipelineComponent.TEXT_ENCODER_2, - torch_dtype=self.model_config.torch_dtype, + torch_dtype=self.pipeline_config.torch_dtype, ).to(device) # VAE @@ -203,7 +205,7 @@ def load_weights(self, weights: dict) -> None: self.transformer.load_weights(transformer_weights) logger.info("Transformer weights loaded successfully.") - self._target_dtype = self.model_config.torch_dtype + self._target_dtype = self.pipeline_config.torch_dtype if self.transformer is not None: self.transformer.eval() diff --git a/tensorrt_llm/_torch/visual_gen/models/flux/pipeline_flux2.py b/tensorrt_llm/_torch/visual_gen/models/flux/pipeline_flux2.py index 8675a0387e79..82302aac8ce3 100644 --- a/tensorrt_llm/_torch/visual_gen/models/flux/pipeline_flux2.py +++ b/tensorrt_llm/_torch/visual_gen/models/flux/pipeline_flux2.py @@ -119,16 +119,16 @@ class Flux2Pipeline(BasePipeline): # Default for backward compatibility (FLUX.2-dev) HIDDEN_STATE_LAYERS: Tuple[int, ...] = (10, 20, 30) - def __init__(self, model_config): + def __init__(self, pipeline_config): if ( - model_config.visual_gen_mapping is not None - and model_config.visual_gen_mapping.cfg_size != 1 + pipeline_config.visual_gen_mapping is not None + and pipeline_config.visual_gen_mapping.cfg_size != 1 ): raise ValueError( "Flux2Pipeline does not support CFG parallelism. Please set cfg_size to 1." ) - super().__init__(model_config) + super().__init__(pipeline_config) @staticmethod def _compute_flux2_timestep_embedding( @@ -167,7 +167,7 @@ def _compute_flux2_timestep_embedding( @property def dtype(self): - return self.model_config.torch_dtype + return self.pipeline_config.torch_dtype @property def device(self): @@ -189,7 +189,9 @@ def warmup_cache_key(self, height: int, width: int, **kwargs) -> tuple: def _init_transformer(self) -> None: """Initialize FLUX.2 transformer with quantization support.""" logger.info("Creating FLUX.2 transformer with quantization support...") - self.transformer = Flux2Transformer2DModel(model_config=self.model_config) + self.transformer = Flux2Transformer2DModel( + model_config=self.pipeline_config.model_configs["transformer"] + ) def _run_warmup(self, height: int, width: int, num_frames: int, steps: int) -> None: with torch.no_grad(): @@ -255,13 +257,13 @@ def load_standard_components( # Mistral3 is a multimodal model (not pure CausalLM) self.text_encoder = Mistral3ForConditionalGeneration.from_pretrained( text_encoder_path, - torch_dtype=self.model_config.torch_dtype, + torch_dtype=self.pipeline_config.torch_dtype, ).to(device) else: # Qwen3 and other CausalLM text encoders self.text_encoder = AutoModelForCausalLM.from_pretrained( text_encoder_path, - torch_dtype=self.model_config.torch_dtype, + torch_dtype=self.pipeline_config.torch_dtype, ).to(device) # VAE (FLUX.2-specific VAE with BatchNorm) @@ -294,7 +296,7 @@ def load_weights(self, weights: dict) -> None: self.transformer.load_weights(transformer_weights) logger.info("Transformer weights loaded successfully.") - self._target_dtype = self.model_config.torch_dtype + self._target_dtype = self.pipeline_config.torch_dtype if self.transformer is not None: self.transformer.eval() diff --git a/tensorrt_llm/_torch/visual_gen/models/flux/transformer_flux.py b/tensorrt_llm/_torch/visual_gen/models/flux/transformer_flux.py index e87ace476d74..99852d3f6f6b 100644 --- a/tensorrt_llm/_torch/visual_gen/models/flux/transformer_flux.py +++ b/tensorrt_llm/_torch/visual_gen/models/flux/transformer_flux.py @@ -34,6 +34,7 @@ from tensorrt_llm._torch.visual_gen.models.flux.attention import FluxJointAttention from tensorrt_llm._torch.visual_gen.models.flux.joint_proj import FluxJointAttnMLPProj from tensorrt_llm._torch.visual_gen.models.flux.pos_embed_flux import FluxPosEmbed +from tensorrt_llm._torch.visual_gen.models.modeling import BaseDiffusionModel from tensorrt_llm._torch.visual_gen.quantization.loader import DynamicLinearWeightLoader from tensorrt_llm._torch.visual_gen.utils import SequenceSharder from tensorrt_llm.models.modeling_utils import QuantConfig @@ -554,7 +555,7 @@ def forward( return encoder_hidden_states, hidden_states -class FluxTransformer2DModel(nn.Module): +class FluxTransformer2DModel(BaseDiffusionModel): """FLUX Transformer model for text-to-image generation. This is the native TRT-LLM implementation of FLUX transformer. @@ -572,8 +573,7 @@ class FluxTransformer2DModel(nn.Module): """ def __init__(self, model_config: DiffusionModelConfig): - super().__init__() - self.model_config = model_config + super().__init__(model_config) vgm = model_config.visual_gen_mapping num_heads = getattr(model_config.pretrained_config, "num_attention_heads", 24) diff --git a/tensorrt_llm/_torch/visual_gen/models/flux/transformer_flux2.py b/tensorrt_llm/_torch/visual_gen/models/flux/transformer_flux2.py index 15dce09d9565..0fb2d53311df 100644 --- a/tensorrt_llm/_torch/visual_gen/models/flux/transformer_flux2.py +++ b/tensorrt_llm/_torch/visual_gen/models/flux/transformer_flux2.py @@ -41,6 +41,7 @@ AdaLayerNormContinuous, _remap_checkpoint_keys, ) +from tensorrt_llm._torch.visual_gen.models.modeling import BaseDiffusionModel from tensorrt_llm._torch.visual_gen.quantization.loader import DynamicLinearWeightLoader from tensorrt_llm._torch.visual_gen.utils import SequenceSharder from tensorrt_llm.models.modeling_utils import QuantConfig @@ -417,7 +418,7 @@ def forward( # ============================================================================= -class Flux2Transformer2DModel(nn.Module): +class Flux2Transformer2DModel(BaseDiffusionModel): """FLUX.2 Transformer model for image generation (Native TRT-LLM). This implements the full FLUX.2 architecture matching HuggingFace diffusers: @@ -433,8 +434,7 @@ def __init__(self, model_config: DiffusionModelConfig): Args: model_config: DiffusionModelConfig instance (from DiffusionModelLoader) """ - super().__init__() - self.model_config = model_config + super().__init__(model_config) vgm = model_config.visual_gen_mapping num_heads = getattr(model_config.pretrained_config, "num_attention_heads", 48) diff --git a/tensorrt_llm/_torch/visual_gen/models/ltx2/ltx2_core/utils_ltx2.py b/tensorrt_llm/_torch/visual_gen/models/ltx2/ltx2_core/utils_ltx2.py index 6e75448d435e..646624f8bd10 100644 --- a/tensorrt_llm/_torch/visual_gen/models/ltx2/ltx2_core/utils_ltx2.py +++ b/tensorrt_llm/_torch/visual_gen/models/ltx2/ltx2_core/utils_ltx2.py @@ -15,9 +15,13 @@ def to_velocity( velocity = (sample - denoised) / sigma """ + # Tensor sigma: keep on device. `.item()` would force a D2H sync that + # deadlocks under nsys profiling combined with CUDA graph replay. + # The scheduler guarantees sigma > 0 inside the denoise loop, so we + # skip the zero check on the tensor path (re-checking would re-sync). if isinstance(sigma, torch.Tensor): - sigma = sigma.to(calc_dtype).item() - if sigma == 0: + sigma = sigma.to(calc_dtype) + elif sigma == 0: raise ValueError("Sigma can't be 0.0") return ((sample.to(calc_dtype) - denoised.to(calc_dtype)) / sigma).to(sample.dtype) diff --git a/tensorrt_llm/_torch/visual_gen/models/ltx2/pipeline_ltx2.py b/tensorrt_llm/_torch/visual_gen/models/ltx2/pipeline_ltx2.py index fc5a21758478..f48b3d05aea7 100644 --- a/tensorrt_llm/_torch/visual_gen/models/ltx2/pipeline_ltx2.py +++ b/tensorrt_llm/_torch/visual_gen/models/ltx2/pipeline_ltx2.py @@ -8,7 +8,7 @@ import os import time from pathlib import Path -from typing import Any, Dict, List, Optional, Tuple, Union +from typing import Any, Dict, List, Optional, Set, Tuple, Union import safetensors.torch import torch @@ -17,6 +17,7 @@ from tensorrt_llm._torch.utils import make_weak_ref from tensorrt_llm._torch.visual_gen.cache.teacache import CacheContext +from tensorrt_llm._torch.visual_gen.checkpoints.prefetch import prefetch_files_to_host_cache from tensorrt_llm._torch.visual_gen.cuda_graph_runner import CUDAGraphRunner, CUDAGraphRunnerConfig from tensorrt_llm._torch.visual_gen.output import CudaPhaseTimer, PipelineOutput from tensorrt_llm._torch.visual_gen.pipeline import BasePipeline, ExtraParamSchema @@ -151,6 +152,23 @@ def _assert_resolution(height: int, width: int, *, is_two_stage: bool = False) - ) +_LTX2_PREFETCHED_SAFETENSORS: Set[str] = set() + + +def _prefetch_ltx2_safetensors_files(file_names: List[str]) -> bool: + """Warm LTX-2 safetensors files in the host page cache. + + For distributed runs, local ranks split the file list and synchronize before + weight loading so ranks do not duplicate the prefetch work on the same node. + """ + return prefetch_files_to_host_cache( + file_names, + description="LTX-2 checkpoint", + prefetched_paths=_LTX2_PREFETCHED_SAFETENSORS, + ignore_errors=True, + ) + + def _load_ltx2_transformer_weights( checkpoint_dir: str, prefix: str, @@ -178,6 +196,8 @@ def _load_ltx2_transformer_weights( if not sft_paths: raise ValueError(f"No safetensors files found in {checkpoint_dir}") + _prefetch_ltx2_safetensors_files(sft_paths) + exclude_prefixes = tuple(exclude_prefixes) if exclude_prefixes else () weights: Dict[str, torch.Tensor] = {} @@ -609,7 +629,7 @@ def resolve_variant(cls, config): logger.info(f"{LTX2_FORCE_ONE_STAGE_ENV} is enabled; forcing one-stage LTX2 pipeline.") return cls - checkpoint_path = getattr(config.pretrained_config, "_name_or_path", "") + checkpoint_path = getattr(config.primary_pretrained_config, "_name_or_path", "") if checkpoint_path: config.extra_attrs.update( resolve_ltx2_pipeline_extra_attrs(Path(checkpoint_path), config.extra_attrs) @@ -624,7 +644,7 @@ def resolve_variant(cls, config): @property def dtype(self): - return self.model_config.torch_dtype + return self.pipeline_config.torch_dtype @property def default_warmup_resolutions(self): @@ -713,13 +733,14 @@ def _init_transformer(self) -> None: the reference ``LTXModelConfigurator.from_config()``. Missing keys fall back to the same defaults the reference uses. """ - attn_cfg = getattr(self.model_config, "attention", None) + attn_cfg = getattr(self.pipeline_config, "attention", None) if attn_cfg is not None and getattr(attn_cfg, "quant_attention_config", None) is not None: raise NotImplementedError( "Quantized attention is not yet supported for the LTX-2 pipeline." ) - cfg = self.model_config.pretrained_config + model_config = self.pipeline_config.model_configs["transformer"] + cfg = model_config.pretrained_config rope_type = LTXRopeType(getattr(cfg, "rope_type", "interleaved")) freq_prec = getattr(cfg, "frequencies_precision", False) @@ -760,7 +781,7 @@ def _init_transformer(self) -> None: rope_type=rope_type, double_precision_rope=double_precision_rope, apply_gated_attention=apply_gated_attention, - model_config=self.model_config, + model_config=model_config, ) self.transformer._transformer_config = vars(cfg) @@ -786,11 +807,11 @@ def _setup_cuda_graphs(self): iterations (WARMUP_STEPS=2), so the captured graph contains the optimized compiled kernels. """ - if not self.model_config.cuda_graph.enable: + if not self.pipeline_config.cuda_graph.enable: return runner = _LTX2CUDAGraphRunner(CUDAGraphRunnerConfig(use_cuda_graph=True)) - compile_note = " (with torch.compile)" if self.model_config.torch_compile.enable else "" + compile_note = " (with torch.compile)" if self.pipeline_config.torch_compile.enable else "" logger.info( f"CUDA graph runner: wrapping transformer.forward (Modality-aware){compile_note}" ) @@ -829,7 +850,7 @@ def load_standard_components( tokenizer files, and ``preprocessor_config.json``. """ skip_components = skip_components or [] - dtype = self.model_config.torch_dtype + dtype = self.pipeline_config.torch_dtype needs_text = ( PipelineComponent.TOKENIZER not in skip_components @@ -858,8 +879,9 @@ def load_standard_components( ).to(device) # --- Resolve native config ---------------------------------------- - native_config = self.model_config.extra_attrs.get("monolithic_safetensors_config") + native_config = self.pipeline_config.extra_attrs.get("monolithic_safetensors_config") sft_paths = _find_safetensors_files(checkpoint_dir) + _prefetch_ltx2_safetensors_files(sft_paths) if native_config is None and sft_paths: native_config = _read_safetensors_config(sft_paths[0]) @@ -999,7 +1021,7 @@ def post_load_weights(self) -> None: # self._setup_teacache(self.transformer, coefficients=LTX2_TEACACHE_COEFFICIENTS) # Cache-DiT - if self.transformer is not None and self.model_config.cache_backend == "cache_dit": + if self.transformer is not None and self.pipeline_config.cache_backend == "cache_dit": self._setup_cache_acceleration(self.transformer, coefficients=None) # Compression ratios from native scale factors @@ -1445,7 +1467,7 @@ def forward( # CFG parallel for multi-modal guidance: each GPU handles one # CFG pass (cond or uncond), results are all-gathered, then # STG/modality passes run on every GPU before the guidance formula. - vgm = self.model_config.visual_gen_mapping + vgm = self.pipeline_config.visual_gen_mapping cfg_size = vgm.cfg_size if vgm else 1 seq_parallel_size = vgm.seq_size if vgm is not None else 1 do_cfg_parallel_mm = use_multi_modal_guidance and cfg_size >= 2 and do_cfg diff --git a/tensorrt_llm/_torch/visual_gen/models/ltx2/pipeline_ltx2_two_stages.py b/tensorrt_llm/_torch/visual_gen/models/ltx2/pipeline_ltx2_two_stages.py index 6a8e365d41cf..776ca9885a78 100644 --- a/tensorrt_llm/_torch/visual_gen/models/ltx2/pipeline_ltx2_two_stages.py +++ b/tensorrt_llm/_torch/visual_gen/models/ltx2/pipeline_ltx2_two_stages.py @@ -35,7 +35,12 @@ ) from .ltx2_core.upsampler import LatentUpsamplerConfigurator, upsample_video from .ltx2_core.video_vae import TilingConfig -from .pipeline_ltx2 import LTX2Pipeline, _assert_resolution, _find_safetensors_files +from .pipeline_ltx2 import ( + LTX2Pipeline, + _assert_resolution, + _find_safetensors_files, + _prefetch_ltx2_safetensors_files, +) STAGE_2_DISTILLED_SIGMA_VALUES = [0.909375, 0.725, 0.421875, 0.0] _FP8_DTYPES = (torch.float8_e4m3fn, torch.float8_e5m2) @@ -97,6 +102,7 @@ def _load_lora_deltas( sft_paths = _find_safetensors_files(lora_path) if not sft_paths: raise ValueError(f"No safetensors files found at {lora_path}") + _prefetch_ltx2_safetensors_files(sft_paths) raw: Dict[str, torch.Tensor] = {} alpha_dict: Dict[str, float] = {} @@ -656,9 +662,9 @@ def load_standard_components( **kwargs, ) - dtype = self.model_config.torch_dtype - spatial_upsampler_path = self.model_config.extra_attrs.get("spatial_upsampler_path", "") - distilled_lora_path = self.model_config.extra_attrs.get("distilled_lora_path", "") + dtype = self.pipeline_config.torch_dtype + spatial_upsampler_path = self.pipeline_config.extra_attrs.get("spatial_upsampler_path", "") + distilled_lora_path = self.pipeline_config.extra_attrs.get("distilled_lora_path", "") # --- Spatial upsampler --- if spatial_upsampler_path: @@ -666,6 +672,7 @@ def load_standard_components( sft_paths = _find_safetensors_files(spatial_upsampler_path) if not sft_paths: raise ValueError(f"No safetensors files found at {spatial_upsampler_path}") + _prefetch_ltx2_safetensors_files(sft_paths) config: Dict[str, Any] = {} try: diff --git a/tensorrt_llm/_torch/visual_gen/models/ltx2/transformer_ltx2.py b/tensorrt_llm/_torch/visual_gen/models/ltx2/transformer_ltx2.py index ce09797c389c..7eff0b2e3d7c 100644 --- a/tensorrt_llm/_torch/visual_gen/models/ltx2/transformer_ltx2.py +++ b/tensorrt_llm/_torch/visual_gen/models/ltx2/transformer_ltx2.py @@ -29,7 +29,9 @@ from tensorrt_llm._torch.modules.linear import Linear, WeightMode from tensorrt_llm._torch.modules.mlp import MLP +from tensorrt_llm._torch.utils import Fp4QuantizedTensor from tensorrt_llm._torch.visual_gen.attention_backend.utils import create_attention +from tensorrt_llm._torch.visual_gen.models.modeling import BaseDiffusionModel from tensorrt_llm._torch.visual_gen.modules.attention import Attention, QKVMode from tensorrt_llm._torch.visual_gen.quantization.loader import DynamicLinearWeightLoader from tensorrt_llm._torch.visual_gen.utils import SequenceSharder @@ -87,6 +89,8 @@ def __init__( config: Optional["DiffusionModelConfig"] = None, layer_idx: int = 0, enable_sequence_parallel: bool = False, + use_ulysses: bool = False, + async_ulysses: bool = False, ): from tensorrt_llm._torch.visual_gen.config import DiffusionModelConfig @@ -98,10 +102,24 @@ def __init__( self.rope_type = rope_type self._is_cross_attn = context_dim is not None + # Async ulysses opt-in: V/Q/K GEMMs interleave with the all-to-all on a + # side stream. Forces SEPARATE_QKV so the 3 projections can issue + # independently. + self._use_async_ulysses = bool( + use_ulysses + and not self._is_cross_attn + and async_ulysses + and vgm is not None + and vgm.ulysses_size > 1 + ) + # Self-attention: FUSE_QKV enables the optimized backend + auto Ulysses # wrapping from the base class. - # Cross-attention: SEPARATE_QKV since K/V come from a different source. - qkv_mode = QKVMode.SEPARATE_QKV if self._is_cross_attn else QKVMode.FUSE_QKV + # Cross-attention or async ulysses: SEPARATE_QKV. + if self._is_cross_attn or self._use_async_ulysses: + qkv_mode = QKVMode.SEPARATE_QKV + else: + qkv_mode = QKVMode.FUSE_QKV # Caller opts in via enable_sequence_parallel. Cross-attn supports # Ulysses-only (SEPARATE_QKV + ring/attn2d is rejected in Attention); @@ -132,13 +150,11 @@ def __init__( config=config, layer_idx=layer_idx, enable_sequence_parallel=enable_sp, + enable_ulysses=use_ulysses, + async_ulysses=self._use_async_ulysses, ) - # Build a runtime-toggleable Ulysses ↔ plain pair. - # Self-attn: audio length isn't always divisible by ulysses_size, so - # we need a plain fallback. Cross-attn (v2a): same need — audio Q is - # padded when divisible, plain backend is used otherwise. Plain has - # to be built with the full (unsharded) head count. + # Validate Ulysses head divisibility (from main). self._has_dual_attn = False if enable_sp and ulysses_size > 1: U = ulysses_size @@ -152,6 +168,12 @@ def __init__( # Base class already built `self.attn` as the Ulysses-wrapped path # (sharded inner backend + UlyssesAttention) for both self-attn and # cross-attn paths. + + # For audio self-attention that may need a runtime Ulysses toggle + # (sequence length not always divisible by ulysses_size), create a + # plain backend as fallback. The base class already set self.attn + # to UlyssesAttention(inner_backend=sharded_backend). + if use_ulysses and not self._is_cross_attn and ulysses_size > 1: self._ulysses_attn = self.attn self._plain_attn = create_attention( backend=self.attn_backend, @@ -286,7 +308,9 @@ def forward( Caller contract: - FUSE_QKV (self-attn): pe must be set; k_pe and pre_projected_kv unused. - SEPARATE_QKV (cross-attn): cached path requires pre_projected_kv; - uncached path requires `context`. pe optional (None = norm-only). + uncached path uses ``context`` (may be None when the async-Ulysses + inner backend was swapped to a non-async one — falls back to + self-attn via kv_source=x). pe optional (None = norm-only). k_pe overrides pe for K (e.g. AV cross-attn) when provided. Args: @@ -297,46 +321,92 @@ def forward( silently ignores it. ``LTX2Attention`` constructs ``audio_attn1`` with a VANILLA backend whenever Ulysses is active under a TRTLLM backend config (see ``_init_audio_modules``). + + Routing: + 1. Async-Ulysses self-attn → ``forward_async`` (V/Q/K rolling A2A). + 2. FUSE_QKV self-attn → packed fused kernel (or naive mini-config). + 3. SEPARATE_QKV cross-attn → split fused kernel (or naive mini-config). """ - # Fallback to the naive eager rope path when fusion is disabled or - # the kernel doesn't support this head_dim. LTX-2 prod has - # fuse_qk_norm_rope=True and head_dim ∈ {64, 128}, so this branch - # only fires under mini-config unit tests (head_dim=32). - if not self.fuse_qk_norm_rope or self.head_dim not in (64, 128): - return self._forward_unfused(x, context, pe, k_pe, pre_projected_kv, key_padding_mask) + # Async-Ulysses self-attn dispatch. ``hasattr`` guard: audio_attn1 may + # have ``set_ulysses_active(False)`` swap ``self.attn`` to a plain + # backend that lacks ``forward_async`` — fall through to the sync + # uncached SEPARATE_QKV branch, which handles context=None via + # kv_source=x. + if ( + self.qkv_mode == QKVMode.SEPARATE_QKV + and self._use_async_ulysses + and context is None + and pre_projected_kv is None + and hasattr(self.attn, "forward_async") + ): + return self.forward_async(x, freqs=pe) + + # Fused gate: prod uses fused kernels (head_dim ∈ {64, 128}); mini-config + # tests (head_dim=32) fall to naive ops. + use_fused = self.fuse_qk_norm_rope and self.head_dim in (64, 128) and self.qk_norm if self.qkv_mode == QKVMode.FUSE_QKV: - # ─── self-attn → packed kernel (norm + rope on QKV in-place) ─── - qkv = self.qkv_proj(x) - cos, sin = pe - self.apply_packed_qk_norm_rope(qkv, cos, sin) - q, k, v = qkv.split([self.q_dim, self.kv_dim, self.kv_dim], dim=-1) + # ─── sync self-attn ─── + if use_fused and pe is not None: + # Fused packed kernel: norm + RoPE on QKV in-place. + qkv = self.qkv_proj(x) + cos, sin = pe + self.apply_packed_qk_norm_rope(qkv, cos, sin) + q, k, v = qkv.split([self.q_dim, self.kv_dim, self.kv_dim], dim=-1) + else: + # Naive (mini-config head_dim ∉ {64, 128}). + q, k, v = self.get_qkv(x) + if self.qk_norm: + q = self.norm_q(q) + k = self.norm_k(k) + if pe is not None: + q = apply_rotary_emb(q, pe, self.rope_type) + k = apply_rotary_emb(k, pe, self.rope_type) elif self.qkv_mode == QKVMode.SEPARATE_QKV: - # ─── cross-attn → split kernel (norm or norm+rope based on pe) ─── if pre_projected_kv is not None: - # K/V cached by caller (text cross-attn + AV cross-attn). - # The caller is responsible for any K-norm + K-rope on the - # cached tensor; we only fuse Q here. + # ─── cached cross-attn (text + AV cross-attn) ─── + # K/V cached by caller; we only norm+RoPE Q here. k, v = pre_projected_kv q = self.to_q(x) - self.apply_split_norm_or_norm_rope( - q, self.norm_q.weight, self.num_attention_heads, pe - ) + if use_fused: + self.apply_split_norm_or_norm_rope( + q, self.norm_q.weight, self.num_attention_heads, pe + ) + else: + if self.qk_norm: + q = self.norm_q(q) + if pe is not None: + q = apply_rotary_emb(q, pe, self.rope_type) else: - # Uncached cross-attn (not exercised by LTX-2 in practice; kept for fuse-dispatch consistency). + # ─── uncached cross-attn / async self-attn fallback ─── + # LTX-2 prod doesn't use uncached cross-attn (always pre-projects + # K/V). This branch also catches async self-attn when the inner + # backend lacks forward_async (audio Ulysses-inactive swap): + # context=None then, fall back to self-attn via kv_source=x. + kv_source = context if context is not None else x q = self.to_q(x) - k = self.to_k(context) - v = self.to_v(context) - self.apply_split_norm_or_norm_rope( - q, self.norm_q.weight, self.num_attention_heads, pe - ) - self.apply_split_norm_or_norm_rope( - k, - self.norm_k.weight, - self.num_key_value_heads, - k_pe if k_pe is not None else pe, - ) + k = self.to_k(kv_source) + v = self.to_v(kv_source) + if use_fused: + self.apply_split_norm_or_norm_rope( + q, self.norm_q.weight, self.num_attention_heads, pe + ) + self.apply_split_norm_or_norm_rope( + k, + self.norm_k.weight, + self.num_key_value_heads, + k_pe if k_pe is not None else pe, + ) + else: + if self.qk_norm: + q = self.norm_q(q) + k = self.norm_k(k) + if pe is not None: + q = apply_rotary_emb(q, pe, self.rope_type) + k_pe_use = k_pe if k_pe is not None else pe + if k_pe_use is not None: + k = apply_rotary_emb(k, k_pe_use, self.rope_type) attn_kwargs = {} if key_padding_mask is not None: @@ -353,58 +423,87 @@ def forward( return self.to_out[0](out) - def _forward_unfused( + def forward_async( self, x: torch.Tensor, - context: torch.Tensor | None, - pe: tuple[torch.Tensor, torch.Tensor] | None, - k_pe: tuple[torch.Tensor, torch.Tensor] | None, - pre_projected_kv: tuple[torch.Tensor, torch.Tensor] | None, - key_padding_mask: torch.Tensor | None = None, + freqs: tuple[torch.Tensor, torch.Tensor] | None = None, ) -> torch.Tensor: - """Fallback path for unsupported configs (head_dim ∉ {64, 128} or - ``fuse_qk_norm_rope=False``). + """LTX-2 async-Ulysses self-attn driver. Structurally mirrors base + ``Attention.forward_async`` (single function, fused/unfused branches) + but uses LTX-2's ``apply_rotary_emb`` (with ``rope_type``) on the + unfused fallback and injects gated-attention scaling in 4D between + the attn output and ``to_out``. - LTX-2 prod hardcodes ``fuse_qk_norm_rope=True`` and head_dim ∈ - {64, 128}, so in production this is never entered. Exercised by the - mini-config unit tests in ``test_ltx2_transformer.py`` (head_dim=32) - and by ablation tests that explicitly disable fusion. + Precondition: caller in ``LTX2Attention.forward`` gates on + ``_use_async_ulysses`` + ``hasattr(self.attn, "forward_async")``. - Contract: caller must pass *pe* / *k_pe* in 4D layout - ([B, T, H, D] for SPLIT rope, [B, T, D] for INTERLEAVED). The fused - kernel's 2D form is not compatible with the naive ``apply_rotary_emb``. + Returns 3D ``[B, S, H*D]`` matching ``forward``'s output contract. """ - if pre_projected_kv is not None: - k, v = pre_projected_kv - q = self.to_q(x) + B, S, _ = x.shape + H = self.num_attention_heads + KV = self.num_key_value_heads + D = self.head_dim + # Mirrors LTX2Attention.forward's fused gate; qkv_mode is implicitly + # SEPARATE_QKV under async (caller-enforced). head_dim check matches + # the fused split kernel's HEAD_DIM template instantiations {64, 128}. + use_fused = ( + self.fuse_qk_norm_rope + and self.head_dim in (64, 128) + and freqs is not None + and self.qk_norm + ) + + # SEPARATE_QKV self-attn 3x fp4_quantize dedup; see Attention.forward_async. + if self._maybe_share_qkv_quantize and getattr(self.to_q, "input_scale", None) is not None: + x_2d = x.reshape(-1, x.shape[-1]) + fp4, sf = torch.ops.trtllm.tunable_fp4_quantize( + x_2d, self.to_q.input_scale, self.to_q.scaling_vector_size, False + ) + qkv_input = Fp4QuantizedTensor(fp4, sf, is_sf_swizzled=False) + else: + qkv_input = x + + def compute_q(): + q = self.to_q(qkv_input) + if q.dim() == 2: + q = q.view(B, S, -1) + if use_fused: + self.apply_split_norm_rope(q, self.norm_q.weight, H, freqs[0], freqs[1]) + return q.view(B, S, H, D) + # Unfused fallback (mini-config); LTX-2 RoPE with rope_type. if self.qk_norm: q = self.norm_q(q) - else: - q, k, v = self.get_qkv(x, context) - q, k = self.apply_qk_norm(q, k) - - if pe is not None: - q = apply_rotary_emb(q, pe, self.rope_type) - # k_pe=None with pre_projected_kv signals K already rotated. - if k_pe is not None: - k = apply_rotary_emb(k, k_pe, self.rope_type) - elif pre_projected_kv is None: - k = apply_rotary_emb(k, pe, self.rope_type) + q = q.view(B, S, H, D) + if freqs is not None: + q = apply_rotary_emb(q, freqs, self.rope_type) + return q + + def compute_k(): + k = self.to_k(qkv_input) + if k.dim() == 2: + k = k.view(B, S, -1) + if use_fused: + self.apply_split_norm_rope(k, self.norm_k.weight, KV, freqs[0], freqs[1]) + return k.view(B, S, KV, D) + if self.qk_norm: + k = self.norm_k(k) + k = k.view(B, S, KV, D) + if freqs is not None: + k = apply_rotary_emb(k, freqs, self.rope_type) + return k - attn_kwargs = {} - if key_padding_mask is not None: - attn_kwargs["key_padding_mask"] = key_padding_mask - out = self._attn_impl(q, k, v, **attn_kwargs) + def compute_v(): + return self.to_v(qkv_input).view(B, S, KV, D) + + out_4d = self.attn.forward_async(compute_q, compute_k, compute_v) + # LTX-2 gated-attention scaling in 4D before to_out. if self.to_gate_logits is not None: - gate_logits = self.to_gate_logits(x) - b, t, _ = out.shape - out = out.view(b, t, self.num_attention_heads, self.head_dim) - gates = 2.0 * torch.sigmoid(gate_logits) - out = out * gates.unsqueeze(-1) - out = out.view(b, t, self.num_attention_heads * self.head_dim) + gates = 2.0 * torch.sigmoid(self.to_gate_logits(x)) + out_4d = out_4d * gates.unsqueeze(-1) - return self.to_out[0](out) + b, t = out_4d.shape[:2] + return self.to_out[0](out_4d.reshape(b, t, H * D)) # --------------------------------------------------------------------------- @@ -471,6 +570,7 @@ def _make_mlp(cfg, model_config, idx): ) def _init_video_modules(self, cfg, rope_type, eps, model_config, idx): + _async_ulysses = model_config.parallel.async_ulysses if model_config is not None else False self.attn1 = LTX2Attention( query_dim=cfg.dim, heads=cfg.heads, @@ -482,6 +582,8 @@ def _init_video_modules(self, cfg, rope_type, eps, model_config, idx): config=model_config, layer_idx=idx, enable_sequence_parallel=True, + use_ulysses=True, + async_ulysses=_async_ulysses, ) self.attn2 = LTX2Attention( query_dim=cfg.dim, @@ -928,7 +1030,7 @@ def is_audio_enabled(self) -> bool: return self in (LTXModelType.AudioVideo, LTXModelType.AudioOnly) -class LTXModel(nn.Module): +class LTXModel(BaseDiffusionModel): """LTX-2 transformer built from TRT-LLM primitives. Native implementation using optimized TRT-LLM Linear, RMSNorm, MLP, and @@ -966,8 +1068,10 @@ def __init__( apply_gated_attention: bool = False, model_config: Optional["DiffusionModelConfig"] = None, ): - super().__init__() - self.model_config = model_config + from tensorrt_llm._torch.visual_gen.config import DiffusionModelConfig + + model_config = model_config or DiffusionModelConfig() + super().__init__(model_config) self.model_type = model_type self.use_middle_indices_grid = use_middle_indices_grid self.rope_type = rope_type diff --git a/tensorrt_llm/_torch/visual_gen/models/modeling.py b/tensorrt_llm/_torch/visual_gen/models/modeling.py new file mode 100644 index 000000000000..899feffb429e --- /dev/null +++ b/tensorrt_llm/_torch/visual_gen/models/modeling.py @@ -0,0 +1,29 @@ +# SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. +# SPDX-License-Identifier: Apache-2.0 +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. +"""Base classes for VisualGen model components.""" + +import torch.nn as nn + +from tensorrt_llm._torch.visual_gen.config import DiffusionModelConfig + + +class BaseDiffusionModel(nn.Module): + """Base class for TRT-LLM VisualGen model components.""" + + def __init__(self, model_config: DiffusionModelConfig): + super().__init__() + self.model_config = model_config + self.component_name = model_config.component_name + self.pretrained_config = model_config.pretrained_config diff --git a/tensorrt_llm/_torch/visual_gen/models/qwen_image/pipeline_qwen_image.py b/tensorrt_llm/_torch/visual_gen/models/qwen_image/pipeline_qwen_image.py index 1c42f96d458b..1290453c57a0 100644 --- a/tensorrt_llm/_torch/visual_gen/models/qwen_image/pipeline_qwen_image.py +++ b/tensorrt_llm/_torch/visual_gen/models/qwen_image/pipeline_qwen_image.py @@ -76,8 +76,8 @@ class QwenImagePipeline(BasePipeline): # either version. DEFAULT_GENERATION_PARAMS = _DEFAULT_GENERATION_PARAMS - def __init__(self, model_config): - super().__init__(model_config) + def __init__(self, pipeline_config): + super().__init__(pipeline_config) # Qwen-Image uses 8x VAE downsample + 2x2 patch packing. Both # scheduler and image-prep assume a latent grid divisible by # (vae_scale_factor * 2 == 16). vae_scale_factor is updated by @@ -87,7 +87,7 @@ def __init__(self, model_config): @property def dtype(self): - return self.model_config.torch_dtype + return self.pipeline_config.torch_dtype @property def device(self): @@ -122,12 +122,11 @@ def resolution_multiple_of(self) -> Tuple[int, int]: # ------------------------------------------------------------------ def _init_transformer(self) -> None: logger.info("Creating Qwen-Image transformer") - # ``pretrained_config`` on the DiffusionModelConfig is populated - # from ``/transformer/config.json`` as a SimpleNamespace by - # ``DiffusionModelConfig.from_pretrained``. Read the fields we - # care about with sensible defaults (matching the Qwen-Image 20B - # reference model). - pretrained = getattr(self.model_config, "pretrained_config", None) + model_config = self.pipeline_config.model_configs["transformer"] + # ``pretrained_config`` is populated from + # ``/transformer/config.json``. Read the fields we care + # about with defaults matching the Qwen-Image 20B reference model. + pretrained = getattr(model_config, "pretrained_config", None) def _cfg(name: str, default): if pretrained is None: @@ -137,7 +136,7 @@ def _cfg(name: str, default): return getattr(pretrained, name, default) self.transformer = QwenImageTransformer2DModel( - model_config=self.model_config, + model_config=model_config, patch_size=_cfg("patch_size", 2), in_channels=_cfg("in_channels", 64), out_channels=_cfg("out_channels", 16), @@ -200,7 +199,7 @@ def load_standard_components( self.text_encoder = Qwen2_5_VLForConditionalGeneration.from_pretrained( checkpoint_dir, subfolder=PipelineComponent.TEXT_ENCODER, - torch_dtype=self.model_config.torch_dtype, + torch_dtype=self.pipeline_config.torch_dtype, ).to(device) if PipelineComponent.VAE not in skip_components: @@ -233,7 +232,7 @@ def load_weights(self, weights: dict) -> None: # default. Cast only non-quantized tensors so FP8/NVFP4 weights # and FP32 scales keep the dtypes created by Linear.load_weights(). self.transformer.to_inference_dtype().eval() - self._target_dtype = self.model_config.torch_dtype + self._target_dtype = self.pipeline_config.torch_dtype # ------------------------------------------------------------------ # Prompt encoding (Qwen2.5-VL chat template). diff --git a/tensorrt_llm/_torch/visual_gen/models/qwen_image/transformer_qwen_image.py b/tensorrt_llm/_torch/visual_gen/models/qwen_image/transformer_qwen_image.py index 9b3330d51011..f06db14a45b6 100644 --- a/tensorrt_llm/_torch/visual_gen/models/qwen_image/transformer_qwen_image.py +++ b/tensorrt_llm/_torch/visual_gen/models/qwen_image/transformer_qwen_image.py @@ -29,6 +29,7 @@ from tensorrt_llm._torch.modules.mlp import MLP from tensorrt_llm._torch.modules.rms_norm import RMSNorm from tensorrt_llm._torch.visual_gen.config import DiffusionModelConfig +from tensorrt_llm._torch.visual_gen.models.modeling import BaseDiffusionModel from tensorrt_llm._torch.visual_gen.modules.attention import Attention, QKVMode from tensorrt_llm._torch.visual_gen.quantization.loader import DynamicLinearWeightLoader @@ -734,7 +735,7 @@ def forward( # =========================================================================== -class QwenImageTransformer2DModel(nn.Module): +class QwenImageTransformer2DModel(BaseDiffusionModel): """Qwen-Image 20B MMDiT transformer. Mirrors ``diffusers.models.transformers.transformer_qwenimage.QwenImageTransformer2DModel`` @@ -756,8 +757,8 @@ def __init__( axes_dims_rope: Tuple[int, int, int] = (16, 56, 56), attn_backend: str = "sdpa", ): - super().__init__() - self.model_config = model_config or DiffusionModelConfig() + model_config = model_config or DiffusionModelConfig() + super().__init__(model_config) self.attn_backend = attn_backend self.patch_size = patch_size diff --git a/tensorrt_llm/_torch/visual_gen/models/wan/pipeline_wan.py b/tensorrt_llm/_torch/visual_gen/models/wan/pipeline_wan.py index f314f33fad3f..1cda852093f1 100644 --- a/tensorrt_llm/_torch/visual_gen/models/wan/pipeline_wan.py +++ b/tensorrt_llm/_torch/visual_gen/models/wan/pipeline_wan.py @@ -85,27 +85,30 @@ "Wan-AI/Wan2.1-T2V-14B-Diffusers", "Wan-AI/Wan2.2-T2V-A14B-Diffusers", "Wan-AI/Wan2.2-TI2V-5B-Diffusers", + "nvidia/Wan2.2-T2V-A14B-Diffusers-FP8", + "nvidia/Wan2.2-T2V-A14B-Diffusers-NVFP4", ], doc="Wan 2.1 & 2.2 text-to-video family.", ) class WanPipeline(BasePipeline): - def __init__(self, model_config): + def __init__(self, pipeline_config): # Wan2.2 A14B two-stage denoising parameters self.transformer_2 = None - self.boundary_ratio = getattr(model_config.pretrained_config, "boundary_ratio", None) - self.expand_timesteps = getattr(model_config.pretrained_config, "expand_timesteps", False) + primary_pretrained_config = pipeline_config.primary_pretrained_config + self.boundary_ratio = getattr(primary_pretrained_config, "boundary_ratio", None) + self.expand_timesteps = getattr(primary_pretrained_config, "expand_timesteps", False) # Derived model type flags self.is_wan22_14b = self.boundary_ratio is not None self.is_wan22_5b = self.expand_timesteps # Validate TeaCache compatibility before allocating GPU memory - if (self.is_wan22_14b or self.is_wan22_5b) and model_config.cache_backend == "teacache": + if (self.is_wan22_14b or self.is_wan22_5b) and pipeline_config.cache_backend == "teacache": raise ValueError( "TeaCache is not supported for Wan 2.2 models. " "Use cache_backend='none' or 'cache_dit' (not 'teacache')." ) - super().__init__(model_config) + super().__init__(pipeline_config) def _compute_wan_timestep_embedding(self, module, timestep=None, **kwargs): """Compute timestep embedding for WAN transformer. @@ -124,7 +127,7 @@ def _compute_wan_timestep_embedding(self, module, timestep=None, **kwargs): t_emb = ce.time_embedder(t_freq) - teacache = self.model_config.teacache + teacache = self.pipeline_config.teacache if teacache is not None and teacache.use_ret_steps: return ce.time_proj(ce.act_fn(t_emb)).to(torch.float32) else: @@ -132,7 +135,7 @@ def _compute_wan_timestep_embedding(self, module, timestep=None, **kwargs): @property def dtype(self): - return self.model_config.torch_dtype + return self.pipeline_config.torch_dtype @property def device(self): @@ -176,12 +179,16 @@ def resolution_multiple_of(self): def _init_transformer(self) -> None: logger.info("Creating WAN transformer with quantization support...") - self.transformer = WanTransformer3DModel(model_config=self.model_config) + self.transformer = WanTransformer3DModel( + model_config=self.pipeline_config.model_configs["transformer"] + ) # Wan2.2 A14B: create second transformer for two-stage denoising if self.is_wan22_14b: logger.info("Creating second transformer for Wan2.2 A14B two-stage denoising...") - self.transformer_2 = WanTransformer3DModel(model_config=self.model_config) + self.transformer_2 = WanTransformer3DModel( + model_config=self.pipeline_config.model_configs["transformer_2"] + ) def load_standard_components( self, @@ -222,7 +229,7 @@ def load_standard_components( self.text_encoder = UMT5EncoderModel.from_pretrained( checkpoint_dir, subfolder=PipelineComponent.TEXT_ENCODER, - torch_dtype=self.model_config.torch_dtype, + torch_dtype=self.pipeline_config.torch_dtype, ).to(device) if PipelineComponent.VAE not in skip_components: @@ -286,7 +293,7 @@ def load_weights(self, weights: dict) -> None: logger.info("Transformer_2 weights loaded successfully.") # Cache the target dtype from model config (default: bfloat16) - self._target_dtype = self.model_config.torch_dtype + self._target_dtype = self.pipeline_config.torch_dtype # Set model to eval mode if self.transformer is not None: @@ -298,7 +305,7 @@ def post_load_weights(self) -> None: super().post_load_weights() # Calls transformer.post_load_weights() for FP8 scale transformations if self.transformer is not None: # TeaCache extractor only when using TeaCache (not Cache-DiT). - if self.model_config.cache_backend == "teacache": + if self.pipeline_config.cache_backend == "teacache": register_extractor_from_config( ExtractorConfig( model_class_name="WanTransformer3DModel", @@ -313,7 +320,7 @@ def post_load_weights(self) -> None: ) self.transformer_cache_backend = self.cache_accelerator else: - if self.model_config.cache_backend == "cache_dit": + if self.pipeline_config.cache_backend == "cache_dit": self._setup_cache_acceleration(self.transformer, coefficients=None) # TeaCache is not supported for Wan 2.2 unless using Cache-DiT. self.transformer_cache_backend = self.cache_accelerator diff --git a/tensorrt_llm/_torch/visual_gen/models/wan/pipeline_wan_i2v.py b/tensorrt_llm/_torch/visual_gen/models/wan/pipeline_wan_i2v.py index ca9e53ecf9a8..2ff09e153a03 100644 --- a/tensorrt_llm/_torch/visual_gen/models/wan/pipeline_wan_i2v.py +++ b/tensorrt_llm/_torch/visual_gen/models/wan/pipeline_wan_i2v.py @@ -88,20 +88,22 @@ doc="Wan 2.1 & 2.2 image-to-video family.", ) class WanImageToVideoPipeline(BasePipeline): - def __init__(self, model_config): + def __init__(self, pipeline_config): # Wan2.2 14B two-stage denoising parameters self.transformer_2 = None - self.boundary_ratio = getattr(model_config.pretrained_config, "boundary_ratio", None) + self.boundary_ratio = getattr( + pipeline_config.primary_pretrained_config, "boundary_ratio", None + ) self.is_wan22_14b = self.boundary_ratio is not None # Validate TeaCache compatibility before allocating GPU memory - if self.is_wan22_14b and model_config.cache_backend == "teacache": + if self.is_wan22_14b and pipeline_config.cache_backend == "teacache": raise ValueError( "TeaCache is not supported for Wan 2.2 models. " "Use cache_backend='none' or 'cache_dit' (not 'teacache')." ) - super().__init__(model_config) + super().__init__(pipeline_config) def _compute_wan_timestep_embedding(self, module, timestep=None, **kwargs): """Compute timestep embedding for Wan I2V transformer. @@ -119,7 +121,7 @@ def _compute_wan_timestep_embedding(self, module, timestep=None, **kwargs): t_emb = ce.time_embedder(t_freq) - teacache = self.model_config.teacache + teacache = self.pipeline_config.teacache if teacache is not None and teacache.use_ret_steps: # ret_steps mode: use timestep_proj — what the ret_steps coefficients were calibrated for return ce.time_proj(ce.act_fn(t_emb)).to(torch.float32) @@ -128,7 +130,7 @@ def _compute_wan_timestep_embedding(self, module, timestep=None, **kwargs): @property def dtype(self): - return self.model_config.torch_dtype + return self.pipeline_config.torch_dtype @property def device(self): @@ -166,12 +168,16 @@ def resolution_multiple_of(self): def _init_transformer(self) -> None: logger.info("Creating WAN I2V transformer with quantization support...") - self.transformer = WanTransformer3DModel(model_config=self.model_config) + self.transformer = WanTransformer3DModel( + model_config=self.pipeline_config.model_configs["transformer"] + ) # Wan2.2: Optionally create second transformer for two-stage denoising if self.boundary_ratio is not None: logger.info("Creating second transformer for Wan2.2 I2V two-stage denoising...") - self.transformer_2 = WanTransformer3DModel(model_config=self.model_config) + self.transformer_2 = WanTransformer3DModel( + model_config=self.pipeline_config.model_configs["transformer_2"] + ) def load_standard_components( self, @@ -217,7 +223,7 @@ def load_standard_components( self.text_encoder = UMT5EncoderModel.from_pretrained( checkpoint_dir, subfolder=PipelineComponent.TEXT_ENCODER, - torch_dtype=self.model_config.torch_dtype, + torch_dtype=self.pipeline_config.torch_dtype, ).to(device) if PipelineComponent.VAE not in skip_components: @@ -306,7 +312,7 @@ def load_weights(self, weights: dict) -> None: logger.info("Transformer_2 weights loaded successfully.") # Cache the target dtype from model config (default: bfloat16) - self._target_dtype = self.model_config.torch_dtype + self._target_dtype = self.pipeline_config.torch_dtype # Set model to eval mode if self.transformer is not None: @@ -319,7 +325,7 @@ def load_weights(self, weights: dict) -> None: def post_load_weights(self) -> None: super().post_load_weights() # Calls transformer.post_load_weights() for FP8 scale transformations if self.transformer is not None: - if self.model_config.cache_backend == "teacache": + if self.pipeline_config.cache_backend == "teacache": register_extractor_from_config( ExtractorConfig( model_class_name="WanTransformer3DModel", @@ -334,7 +340,7 @@ def post_load_weights(self) -> None: ) self.transformer_cache_backend = self.cache_accelerator else: - if self.model_config.cache_backend == "cache_dit": + if self.pipeline_config.cache_backend == "cache_dit": self._setup_cache_acceleration(self.transformer, coefficients=None) self.transformer_cache_backend = self.cache_accelerator diff --git a/tensorrt_llm/_torch/visual_gen/models/wan/transformer_wan.py b/tensorrt_llm/_torch/visual_gen/models/wan/transformer_wan.py index 0bac474df0ff..5d6264f67b7a 100644 --- a/tensorrt_llm/_torch/visual_gen/models/wan/transformer_wan.py +++ b/tensorrt_llm/_torch/visual_gen/models/wan/transformer_wan.py @@ -12,6 +12,7 @@ from tensorrt_llm._torch.modules.linear import Linear, TensorParallelMode from tensorrt_llm._torch.modules.mlp import MLP from tensorrt_llm._torch.visual_gen.config import DiffusionModelConfig +from tensorrt_llm._torch.visual_gen.models.modeling import BaseDiffusionModel from tensorrt_llm._torch.visual_gen.modules.attention import Attention, QKVMode from tensorrt_llm._torch.visual_gen.modules.rms_norm import RMSNormTPAware from tensorrt_llm._torch.visual_gen.quantization.loader import DynamicLinearWeightLoader @@ -27,7 +28,6 @@ def get_parameter_device(module): return next(module.parameters()).device - # ========================================================================= # 1. Rotary Positional Embeddings # ========================================================================= @@ -290,17 +290,30 @@ def __init__( # However, this kernel does not support TP due to the cross-head # normalization being a collective op. Thus, we must disable it if # using TP. + # When ulysses_size > 1 AND parallel.async_ulysses is set, switch + # to SEPARATE_QKV so V/Q/K projections can stream-pipeline through + # the async ulysses A2A path. tp_size = model_config.mapping.tp_size if model_config.mapping else 1 + vgm_self = model_config.visual_gen_mapping + ulysses_size_self = vgm_self.ulysses_size if vgm_self is not None else 1 + _async_a2a = model_config.parallel.async_ulysses if model_config is not None else False + self._use_async_ulysses = bool(ulysses_size_self > 1) and _async_a2a + _qkv_mode_self = QKVMode.SEPARATE_QKV if self._use_async_ulysses else QKVMode.FUSE_QKV self.attn1 = Attention( hidden_size=hidden_size, num_attention_heads=num_heads, head_dim=head_dim, - qkv_mode=QKVMode.FUSE_QKV, + qkv_mode=_qkv_mode_self, qk_norm=True, eps=eps, + # fuse_qk_norm_rope=True drives the packed kernel on sync (FUSE_QKV) + # and the split kernel on async (SEPARATE_QKV via forward_async). + # Disabled when TP>1 since the fused kernel lacks cross-rank + # all-reduce for the cross-head RMSNorm variance. fuse_qk_norm_rope=(tp_size == 1), config=model_config, layer_idx=_layer_idx, + async_ulysses=self._use_async_ulysses, ) # Cross-attention with separate Q, K, V @@ -414,15 +427,15 @@ def forward( # Prepare frequencies for Attention freqs = (freqs_cos, freqs_sin) if freqs_cos is not None and freqs_sin is not None else None - # Self-attention with RoPE - x = ( - x.float() - + self.attn1( - normed, - freqs=freqs, - ).float() - * gate_msa - ).to(x.dtype) + # Self-attention with RoPE. Async-ulysses dispatches to forward_async + # so each V/Q/K GEMM + norm + RoPE overlaps with the peer push on the + # side stream; both paths return 3D [B, S, H*D]. + if self._use_async_ulysses: + attn1_out = self.attn1.forward_async(normed, freqs=freqs) + else: + attn1_out = self.attn1(normed, freqs=freqs) + + x = (x.float() + attn1_out.float() * gate_msa).to(x.dtype) norm_x = self.norm2(x.float()).to(x.dtype) @@ -474,16 +487,14 @@ def forward( return x -class WanTransformer3DModel(nn.Module): +class WanTransformer3DModel(BaseDiffusionModel): _supports_gradient_checkpointing = True def __init__( self, model_config: DiffusionModelConfig, ): - super().__init__() - - self.model_config = model_config + super().__init__(model_config) vgm = model_config.visual_gen_mapping diff --git a/tensorrt_llm/_torch/visual_gen/modules/attention.py b/tensorrt_llm/_torch/visual_gen/modules/attention.py index 3465fcd63acd..37a1763ebce6 100644 --- a/tensorrt_llm/_torch/visual_gen/modules/attention.py +++ b/tensorrt_llm/_torch/visual_gen/modules/attention.py @@ -7,6 +7,7 @@ from tensorrt_llm.llmapi.llm_args import SkipSoftmaxAttentionConfig from ...modules.linear import Linear, TensorParallelMode, WeightMode, WeightsLoadingConfig +from ...utils import Fp4QuantizedTensor from ..attention_backend.interface import AttentionTensorLayout from ..attention_backend.parallel import wrap_parallel_attention from ..attention_backend.utils import create_attention @@ -53,6 +54,8 @@ def __init__( config: Optional[DiffusionModelConfig] = None, layer_idx: Optional[int] = None, enable_sequence_parallel: bool = True, + enable_ulysses: bool = True, + async_ulysses: bool = False, ): super().__init__() @@ -115,6 +118,20 @@ def __init__( self._init_qkv_proj() + # Structural eligibility for SEPARATE_QKV self-attn quantize dedup. + # When True, get_qkv() may pre-quantize hidden_states once and pass the + # shared Fp4QuantizedTensor to to_q/to_k/to_v (relies on Linear's + # Fp4QuantizedTensor shortcut). Numerical equality of the per-tensor + # input_scales is an invariant of modelopt's self-attn calibration + # (q/k/v share the same input distribution -> same calibrated scale). + self._maybe_share_qkv_quantize = ( + self.qkv_mode == QKVMode.SEPARATE_QKV + and self.quant_config is not None + and getattr(self.quant_config, "layer_quant_mode", None) is not None + and self.quant_config.layer_quant_mode.has_nvfp4() + and not self.force_dynamic_quantization + ) + attention_metadata_state = getattr(config, "attention_metadata_state", None) if self.qk_norm: @@ -160,9 +177,20 @@ def __init__( ] ) - # Ulysses shards heads across workers; inner backend sees sharded head count. - # Attention2D gathers sequence (not heads); see wrap_parallel_attention for nesting. - use_ulysses = ulysses_size > 1 and enable_sequence_parallel + # Ulysses auto-wrap normally skips SEPARATE_QKV (cross-attention). + # The async-ulysses path uses SEPARATE_QKV for stream-pipelined + # V/Q/K projections AND still needs the head-sharding wrap — opt in + # via async_ulysses=True. + use_ulysses = ( + ulysses_size > 1 + and enable_sequence_parallel + and enable_ulysses + and (self.qkv_mode != QKVMode.SEPARATE_QKV or async_ulysses) + ) + + # Compute head counts for the backend + # Ulysses shards heads across workers; inner backend sees sharded count + # Attention2D gathers sequence (not heads); inner backend sees full count if use_ulysses: backend_num_heads = self.local_num_attention_heads // ulysses_size backend_num_kv_heads = self.local_num_key_value_heads // ulysses_size @@ -214,6 +242,7 @@ def __init__( self.attn, visual_gen_mapping=vgm, enable_sequence_parallel=enable_sequence_parallel, + async_ulysses=use_ulysses and async_ulysses, ) def _init_qkv_proj(self) -> None: @@ -520,3 +549,104 @@ def forward( out = self._attn_impl(q, k, v) out = self.to_out[0](out) return out + + def forward_async( + self, + hidden_states: torch.Tensor, + freqs: Optional[Tuple[torch.Tensor, torch.Tensor]] = None, + ) -> torch.Tensor: + """Async-Ulysses self-attn driver. Structurally mirrors ``forward``: + each closure does ``to_{q,k,v}`` + (optional) fused norm+RoPE on the + default stream while the previous tensor's peer push runs on a side + stream, so V/Q/K projections overlap with the all-to-all. + + Fused path: ``apply_split_norm_rope`` (SEPARATE_QKV analog of + ``apply_packed_qk_norm_rope``) does in-place RMSNorm + RoPE in one + kernel launch per Q/K. Same math as the packed kernel, just split + across two launches instead of one packed launch. + + Unfused path: naive ``norm_q`` + ``apply_rotary_emb``, mirroring + ``forward``'s unfused branch. + + Precondition: caller gates on ``_use_async_ulysses`` so ``self.attn`` + is a ``UlyssesAttention`` with ``async_ulysses=True``. + + Returns 3D ``[B, S, H*D]`` matching ``forward``'s output contract. + + TODO (kernel follow-up): the fused split kernel below writes Q/K to an + intermediate tensor, then ``UlyssesAttention._issue_async`` permutes + and scatters that tensor into the symm-mem slot. Folding the + permute+scatter into a "ulyssesPermuteScatter" epilogue inside the + fused norm+RoPE kernel would let it write directly into the slot, + saving one alloc + one copy + one kernel launch per Q/K closure. + """ + # Runtime precondition guard. Without async_ulysses=True at init, + # `self.attn` is the bare backend (e.g. TrtllmAttention) which has + # no `forward_async` method — the inner call below would otherwise + # crash with a non-prescriptive AttributeError deep in the function. + if not hasattr(self.attn, "forward_async"): + raise ValueError( + "Attention.forward_async() requires the inner attention to be a " + "UlyssesAttention with async_ulysses=True. Build the Attention with " + "ParallelConfig(ulysses_size > 1, async_ulysses=True), or use " + "forward() for sync execution." + ) + + B, S, _ = hidden_states.shape + H = self.num_attention_heads + KV = self.num_key_value_heads + D = self.head_dim + # Mirrors forward()'s fused gate. qkv_mode is implicitly SEPARATE_QKV + # under async (caller-enforced), so the FUSE_QKV check in forward() + # has no async analog here. + use_fused = self.fuse_qk_norm_rope and freqs is not None and self.qk_norm + + # SEPARATE_QKV self-attn 3x fp4_quantize dedup: pre-quantize hidden_states + # once and pass the shared Fp4QuantizedTensor to to_q/to_k/to_v via Linear's + # Fp4QuantizedTensor shortcut. Saves 2 of 3 fp4_quantize launches per layer. + # Eligibility is structural (set in __init__); runtime gate checks that the + # checkpoint loaded an input_scale (some attn Linears can be excluded from + # NVFP4 per checkpoint config — e.g. LTX-2 transformer_blocks.10.attn1). + if self._maybe_share_qkv_quantize and getattr(self.to_q, "input_scale", None) is not None: + x_2d = hidden_states.reshape(-1, hidden_states.shape[-1]) + fp4, sf = torch.ops.trtllm.tunable_fp4_quantize( + x_2d, self.to_q.input_scale, self.to_q.scaling_vector_size, False + ) + qkv_input = Fp4QuantizedTensor(fp4, sf, is_sf_swizzled=False) + else: + qkv_input = hidden_states + + def compute_q(): + q = self.to_q(qkv_input) + if q.dim() == 2: + q = q.view(B, S, -1) + if use_fused: + self.apply_split_norm_rope(q, self.norm_q.weight, H, freqs[0], freqs[1]) + return q.view(B, S, H, D) + if self.qk_norm: + q = self.norm_q(q) + q = q.view(B, S, H, D) + if freqs is not None: + q = apply_rotary_emb(q, freqs[0], freqs[1]) + return q + + def compute_k(): + k = self.to_k(qkv_input) + if k.dim() == 2: + k = k.view(B, S, -1) + if use_fused: + self.apply_split_norm_rope(k, self.norm_k.weight, KV, freqs[0], freqs[1]) + return k.view(B, S, KV, D) + if self.qk_norm: + k = self.norm_k(k) + k = k.view(B, S, KV, D) + if freqs is not None: + k = apply_rotary_emb(k, freqs[0], freqs[1]) + return k + + def compute_v(): + return self.to_v(qkv_input).view(B, S, KV, D) + + out_4d = self.attn.forward_async(compute_q, compute_k, compute_v) + b, t = out_4d.shape[:2] + return self.to_out[0](out_4d.reshape(b, t, H * D)) diff --git a/tensorrt_llm/_torch/visual_gen/pipeline.py b/tensorrt_llm/_torch/visual_gen/pipeline.py index 9d19d7cf778e..7a0c629bf5c9 100644 --- a/tensorrt_llm/_torch/visual_gen/pipeline.py +++ b/tensorrt_llm/_torch/visual_gen/pipeline.py @@ -98,7 +98,7 @@ def _parse_profile_range(): if TYPE_CHECKING: from .cache import CacheAccelerator - from .config import DiffusionModelConfig + from .config import DiffusionPipelineConfig class BasePipeline(nn.Module): @@ -107,7 +107,7 @@ class BasePipeline(nn.Module): """ @classmethod - def resolve_variant(cls, config: "DiffusionModelConfig") -> Type["BasePipeline"]: + def resolve_variant(cls, config: "DiffusionPipelineConfig") -> Type["BasePipeline"]: """Return *cls* or a more specialized subclass based on *config*. Override in subclasses to select a variant pipeline at creation @@ -117,11 +117,11 @@ def resolve_variant(cls, config: "DiffusionModelConfig") -> Type["BasePipeline"] """ return cls - def __init__(self, model_config: "DiffusionModelConfig"): + def __init__(self, pipeline_config: "DiffusionPipelineConfig"): super().__init__() - self.model_config = model_config - self.config = model_config.pretrained_config - self.mapping: Mapping = getattr(model_config, "mapping", None) or Mapping() + self.pipeline_config = pipeline_config + self.config = pipeline_config.primary_pretrained_config + self.mapping: Mapping = getattr(pipeline_config, "mapping", None) or Mapping() self._cuda_graph_runners: Dict[str, CUDAGraphRunner] = {} self._parallel_vae_enabled: bool = False self._warmed_up_shapes: Set[tuple] = set() @@ -171,10 +171,10 @@ def _cuda_profiler_stop(self): def _setup_cuda_graphs(self): """Wrap all transformer components with CUDA graph capture/replay.""" - if not self.model_config.cuda_graph.enable: + if not self.pipeline_config.cuda_graph.enable: return - if self.model_config.torch_compile.enable: + if self.pipeline_config.torch_compile.enable: logger.warning( "CUDA graphs with torch.compile not yet supported. Using torch.compile only." ) @@ -294,7 +294,7 @@ def resolve_warmup_plan(self) -> Tuple[List[Tuple[int, int, int]], int]: Returns: (shapes, steps) tuple where shapes = list of (h, w, f) """ - warmup_cfg = self.model_config.compilation + warmup_cfg = self.pipeline_config.compilation if warmup_cfg.resolutions is not None or warmup_cfg.num_frames is not None: resolutions = ( @@ -397,13 +397,12 @@ def post_load_weights(self) -> None: self.transformer.post_load_weights() def _apply_teacache_coefficients(self, coefficients: Optional[Dict]) -> None: - """Pick TeaCache coefficients from checkpoint path; updates model_config.teacache in place.""" + """Pick TeaCache coefficients from checkpoint path; updates pipeline config in place.""" if not coefficients: return - teacache_cfg = self.model_config.teacache - checkpoint_path = ( - getattr(getattr(self.model_config, "pretrained_config", None), "_name_or_path", "") - or "" + teacache_cfg = self.pipeline_config.teacache + checkpoint_path = getattr( + self.pipeline_config.primary_pretrained_config, "_name_or_path", "" ) matched = False for model_size, coeff_data in coefficients.items(): @@ -445,7 +444,7 @@ def _setup_cache_acceleration( self.cache_accelerator.unwrap() self.cache_accelerator = None - cfg = self.model_config + cfg = self.pipeline_config if cfg.cache_backend == "cache_dit": acc = CacheDiTAccelerator(self, cfg.cache_dit) @@ -476,8 +475,8 @@ def setup_parallel_vae(self): parallel-VAE decode ownership applies. The actual ``ParallelVAEFactory`` wrap is a local side effect that only runs on ranks in ``vae_ranks``. """ - parallel_cfg = self.model_config.parallel - vgm = self.model_config.visual_gen_mapping + parallel_cfg = self.pipeline_config.parallel + vgm = self.pipeline_config.visual_gen_mapping # Global preconditions — evaluate identically on every rank. self._parallel_vae_enabled = ( @@ -528,7 +527,7 @@ def torch_compile(self) -> None: For non-transformer components, compiles the entire module. """ - tc_config = self.model_config.torch_compile + tc_config = self.pipeline_config.torch_compile # Using default as max-autotune mode takes more initialization time and # does not improve performance a lot. @@ -663,7 +662,7 @@ def decode_latents( Non-decoding ranks return ``None`` (or a tuple of ``None``). """ if self._parallel_vae_enabled: - vgm = self.model_config.visual_gen_mapping + vgm = self.pipeline_config.visual_gen_mapping decode_ranks = set(vgm.vae_ranks) else: decode_ranks = {0} @@ -703,7 +702,7 @@ def _setup_cfg_config( Returns: Dict with CFG configuration including split tensors """ - vgm = self.model_config.visual_gen_mapping + vgm = self.pipeline_config.visual_gen_mapping cfg_size = vgm.cfg_size if vgm else 1 ulysses_size = vgm.ulysses_size if vgm else 1 attn2d_row_size = vgm.attn2d_row_size if vgm else 1 @@ -774,7 +773,7 @@ def _denoise_step_cfg_parallel( local_extras, ): """Execute single denoising step with CFG parallel.""" - vgm = self.model_config.visual_gen_mapping + vgm = self.pipeline_config.visual_gen_mapping cfg_pg = vgm.cfg_group if vgm else None cfg_size = vgm.cfg_size if vgm else 1 @@ -1106,7 +1105,7 @@ def denoise( if getattr(self, "cache_accelerator", None) and self.cache_accelerator.is_enabled(): stats = self.cache_accelerator.get_stats() if stats: - if self.model_config.cache_backend == "cache_dit": + if self.pipeline_config.cache_backend == "cache_dit": logger.info("Cache-DiT stats: %s", stats) elif "hit_rate" in stats: logger.info( diff --git a/tensorrt_llm/_torch/visual_gen/pipeline_loader.py b/tensorrt_llm/_torch/visual_gen/pipeline_loader.py index ac61ce729fbc..d4e0a7f1295e 100644 --- a/tensorrt_llm/_torch/visual_gen/pipeline_loader.py +++ b/tensorrt_llm/_torch/visual_gen/pipeline_loader.py @@ -2,7 +2,7 @@ Model loader for diffusion pipelines. Flow: -1. Load config via DiffusionModelConfig.from_pretrained() +1. Load config via DiffusionPipelineConfig.from_pretrained() 2. Create pipeline via AutoPipeline.from_config() with MetaInit 3. Load weights with on-the-fly quantization if dynamic_weight_quant=True 4. Call pipeline.post_load_weights() @@ -28,7 +28,7 @@ from tensorrt_llm.visual_gen.args import VisualGenArgs from tensorrt_llm.visual_gen.sparse_attention import SkipSoftmaxConfig, apply_skip_softmax_overrides -from .config import DiffusionModelConfig +from .config import DiffusionPipelineConfig from .mapping import VisualGenMapping from .models import AutoPipeline from .pipeline_registry import PIPELINE_REGISTRY, PipelineComponent @@ -140,7 +140,7 @@ def _resolve_pipeline_config(self, checkpoint_dir: str) -> dict: ) return {**entry.defaults, **user_pipeline_config} - def _setup_visual_gen_mapping(self, config: DiffusionModelConfig) -> None: + def _setup_visual_gen_mapping(self, config: DiffusionPipelineConfig) -> None: ws = dist.get_world_size() if dist.is_initialized() else 1 rk = dist.get_rank() if dist.is_initialized() else 0 attn2d_row, attn2d_col = self.args.parallel_config.attn2d_size @@ -155,8 +155,12 @@ def _setup_visual_gen_mapping(self, config: DiffusionModelConfig) -> None: tp_size=self.args.parallel_config.tp_size, parallel_vae_size=self.args.parallel_config.parallel_vae_size, ) + llm_mapping = vgm.to_llm_mapping() config.visual_gen_mapping = vgm - config.mapping = vgm.to_llm_mapping() + config.mapping = llm_mapping + for model_config in config.model_configs.values(): + model_config.visual_gen_mapping = vgm + model_config.mapping = llm_mapping def load( self, @@ -169,7 +173,7 @@ def load( Flow: 1. Resolve checkpoint_dir (local path or HuggingFace Hub model ID) - 2. Load config via DiffusionModelConfig.from_pretrained() + 2. Load config via DiffusionPipelineConfig.from_pretrained() 3. Create pipeline via AutoPipeline.from_config() with MetaInit 4. Load transformer weights via pipeline.load_transformer_weights() 5. Load auxiliary components (VAE, text_encoder) @@ -207,7 +211,7 @@ def load( # Merge pretrained checkpoint config with user-provided VisualGenArgs # ===================================================================== logger.info(f"Loading config from {checkpoint_dir}") - config = DiffusionModelConfig.from_pretrained( + config = DiffusionPipelineConfig.from_pretrained( checkpoint_dir, args=self.args, pipeline_config=resolved_pipeline_config, diff --git a/tensorrt_llm/_torch/visual_gen/pipeline_registry.py b/tensorrt_llm/_torch/visual_gen/pipeline_registry.py index 7be918d0ffec..4300a2943e80 100644 --- a/tensorrt_llm/_torch/visual_gen/pipeline_registry.py +++ b/tensorrt_llm/_torch/visual_gen/pipeline_registry.py @@ -2,7 +2,7 @@ # SPDX-License-Identifier: Apache-2.0 """Pipeline registry for unified config flow. -Follows: VisualGenArgs → PipelineLoader → DiffusionModelConfig → AutoPipeline → BasePipeline +Follows: VisualGenArgs → PipelineLoader → DiffusionPipelineConfig → AutoPipeline → BasePipeline All pipelines (Wan, Flux, Flux2, LTX2, QwenImage) register via @register_pipeline decorator. @@ -35,7 +35,7 @@ from tensorrt_llm.logger import logger if TYPE_CHECKING: - from .config import DiffusionModelConfig + from .config import DiffusionPipelineConfig from .pipeline import BasePipeline @@ -123,11 +123,11 @@ class AutoPipeline: @staticmethod def from_config( - config: "DiffusionModelConfig", + config: "DiffusionPipelineConfig", checkpoint_dir: str, ) -> "BasePipeline": """ - Create pipeline instance from DiffusionModelConfig. + Create pipeline instance from DiffusionPipelineConfig. """ # Detect pipeline type from model_index.json or from model safetensors class_name = AutoPipeline._detect_from_checkpoint(checkpoint_dir) @@ -147,7 +147,7 @@ def from_config( logger.info(f"AutoPipeline: Creating {pipeline_class.__name__} from {checkpoint_dir}") - # Instantiate pipeline with DiffusionModelConfig + # Instantiate pipeline with DiffusionPipelineConfig return pipeline_class(config) @staticmethod diff --git a/tensorrt_llm/_utils.py b/tensorrt_llm/_utils.py index c53e7a085048..841f396104f5 100644 --- a/tensorrt_llm/_utils.py +++ b/tensorrt_llm/_utils.py @@ -813,6 +813,20 @@ def is_sm_100f(sm_version=None): return sm_version == 100 or sm_version == 103 +@lru_cache(maxsize=1) +def is_flashinfer_gdn_supported_arch(sm_version=None): + """Whether FlashInfer ships GDN (gated-delta-rule) kernels for this arch. + + FlashInfer's GDN chunk-prefill and bf16-state decode kernels are built only + for Hopper (SM90) and datacenter Blackwell (SM100/SM103). On consumer + Blackwell (SM120) and other architectures the kernels abort at launch, so + callers must fall back to the vendored Triton kernels. + """ + if sm_version is None: + sm_version = get_sm_version() + return sm_version in (90, 100, 103) + + def print_all_stacks(): """Print stack traces for all threads""" for thread_id, frame in sys._current_frames().items(): diff --git a/tensorrt_llm/bench/benchmark/__init__.py b/tensorrt_llm/bench/benchmark/__init__.py index 83fd3e066614..53fa8b337d66 100644 --- a/tensorrt_llm/bench/benchmark/__init__.py +++ b/tensorrt_llm/bench/benchmark/__init__.py @@ -1,6 +1,6 @@ import json from pathlib import Path -from typing import Callable, Dict, Optional +from typing import Callable, Dict, Optional, Set from pydantic import AliasChoices, BaseModel, Field @@ -10,8 +10,34 @@ from tensorrt_llm.bench.build.build import get_model_config from tensorrt_llm.bench.dataclasses.configuration import RuntimeConfig from tensorrt_llm.bench.dataclasses.general import BenchmarkEnvironment +from tensorrt_llm.commands.utils import \ + collect_explicit_cli_keys as _collect_explicit_cli_keys from tensorrt_llm.logger import logger +# Map trtllm-bench Click parameter names to the LlmArgs field name (or +# merge-function CLI scalar name) used by `update_llm_args_with_extra_options`. +# `--beam_width` is intentionally absent: it feeds SamplingParams, not +# llm_args, so it must not participate in the CLI-vs-YAML precedence. +_BENCH_CLICK_TO_LLM_ARG = { + "tp": "tensor_parallel_size", + "pp": "pipeline_parallel_size", + "ep": "moe_expert_parallel_size", + "cluster_size": "moe_cluster_parallel_size", + "kv_cache_free_gpu_mem_fraction": "free_gpu_memory_fraction", + "enable_chunked_context": "enable_chunked_prefill", +} + + +def collect_explicit_cli_keys() -> Set[str]: + """Return CLI flag names the user typed, translated to LlmArgs field names. + + Thin trtllm-bench-specific wrapper around the shared + `tensorrt_llm.commands.utils.collect_explicit_cli_keys` helper. + """ + return _collect_explicit_cli_keys(exclude=("extra_llm_api_options", + "config"), + translate=_BENCH_CLICK_TO_LLM_ARG) + class GeneralExecSettings(BaseModel): model_config = { diff --git a/tensorrt_llm/bench/benchmark/low_latency.py b/tensorrt_llm/bench/benchmark/low_latency.py index c2c66d9e37d8..127b1bcdebe9 100644 --- a/tensorrt_llm/bench/benchmark/low_latency.py +++ b/tensorrt_llm/bench/benchmark/low_latency.py @@ -24,7 +24,8 @@ optgroup) from huggingface_hub import snapshot_download -from tensorrt_llm.bench.benchmark import (generate_json_report, +from tensorrt_llm.bench.benchmark import (collect_explicit_cli_keys, + generate_json_report, get_general_cli_options, get_llm) from tensorrt_llm.bench.benchmark.utils.asynchronous import async_benchmark from tensorrt_llm.bench.benchmark.utils.general import generate_warmup_dataset @@ -65,9 +66,9 @@ "extra_llm_api_options", type=str, default=None, - help= - "Path to a YAML file that overwrites the parameters specified by trtllm-bench. " - "Can be specified as either --config or --extra_llm_api_options.") + help="Path to a YAML configuration file. Explicit CLI flags take precedence " + "over values in this file. Can be specified as either --config or " + "--extra_llm_api_options.") @optgroup.option( "--backend", type=click.Choice(ALL_SUPPORTED_BACKENDS), @@ -297,6 +298,7 @@ def latency_command( exec_settings["performance_options"]["multi_block_mode"] = True exec_settings["extra_llm_api_options"] = params.get("extra_llm_api_options") + exec_settings["explicit_cli_keys"] = collect_explicit_cli_keys() # Decoding Options if medusa_choices is not None: diff --git a/tensorrt_llm/bench/benchmark/throughput.py b/tensorrt_llm/bench/benchmark/throughput.py index 2e9df91deae1..4e2fd04b9a13 100755 --- a/tensorrt_llm/bench/benchmark/throughput.py +++ b/tensorrt_llm/bench/benchmark/throughput.py @@ -25,6 +25,7 @@ from huggingface_hub import snapshot_download from tensorrt_llm.bench.benchmark import (GeneralExecSettings, + collect_explicit_cli_keys, generate_json_report, get_general_cli_options, get_llm) from tensorrt_llm.bench.benchmark.utils.asynchronous import async_benchmark @@ -81,9 +82,9 @@ "extra_llm_api_options", type=str, default=None, - help= - "Path to a YAML file that overwrites the parameters specified by trtllm-bench. " - "Can be specified as either --config or --extra_llm_api_options.") + help="Path to a YAML configuration file. Explicit CLI flags take precedence " + "over values in this file. Can be specified as either --config or " + "--extra_llm_api_options.") @optgroup.option("--sampler_options", type=click.Path(exists=True, readable=True, @@ -437,6 +438,7 @@ def throughput_command( # LlmArgs exec_settings["extra_llm_api_options"] = params.pop("extra_llm_api_options") exec_settings["iteration_log"] = options.iteration_log + exec_settings["explicit_cli_keys"] = collect_explicit_cli_keys() # Construct the runtime configuration dataclass. runtime_config = RuntimeConfig(**exec_settings) diff --git a/tensorrt_llm/bench/dataclasses/configuration.py b/tensorrt_llm/bench/dataclasses/configuration.py index 45d27b557677..d88bd2b722fe 100755 --- a/tensorrt_llm/bench/dataclasses/configuration.py +++ b/tensorrt_llm/bench/dataclasses/configuration.py @@ -2,7 +2,7 @@ from dataclasses import dataclass from pathlib import Path -from typing import Any, Dict, List, Literal, Optional, Union +from typing import Any, Dict, List, Literal, Optional, Set, Union from pydantic import (BaseModel, Field, PositiveFloat, field_validator, model_validator) @@ -36,6 +36,7 @@ class RuntimeConfig(BaseModel): backend: Literal["pytorch", "_autodeploy", None] = None extra_llm_api_options: Optional[str] = None iteration_log: Optional[Path] = None + explicit_cli_keys: Optional[Set[str]] = None def get_llm_args(self) -> Dict: model = self.engine_dir or self.model_path or self.model @@ -86,7 +87,9 @@ def get_llm_args(self) -> Dict: llm_args["kv_cache_config"] = backend_cache_config | kv_cache_config updated_llm_args = update_llm_args_with_extra_options( - llm_args, self.extra_llm_api_options) + llm_args, + self.extra_llm_api_options, + explicit_cli_keys=self.explicit_cli_keys) if self.backend == "pytorch": cuda_graph_config = updated_llm_args.pop( diff --git a/tensorrt_llm/bench/dataclasses/reporting.py b/tensorrt_llm/bench/dataclasses/reporting.py index 77dce5441daa..3c92667f2444 100755 --- a/tensorrt_llm/bench/dataclasses/reporting.py +++ b/tensorrt_llm/bench/dataclasses/reporting.py @@ -165,6 +165,7 @@ def generate_statistics_summary(self, max_draft_tokens: int, num_accepted_draft_tokens = [] draft_acceptance_rate = [] acceptance_length = [] + decoding_iterations = [] for entry in self.requests.values(): start_time = min(entry.start_timestamp, start_time) @@ -193,6 +194,7 @@ def generate_statistics_summary(self, max_draft_tokens: int, float(num_draft_tokens[-1])) acceptance_length.append(entry.num_total_output_tokens / (entry.decode_iteration + 1)) + decoding_iterations.append(entry.decode_iteration + 1) global_acceptance_length = sum( output_tokens) / total_decoding_iterations @@ -202,10 +204,22 @@ def generate_statistics_summary(self, max_draft_tokens: int, num_draft_tokens) if num_draft_tokens else None num_accepted_draft_tokens_percentiles = PercentileStats.from_iterable( num_accepted_draft_tokens) if num_accepted_draft_tokens else None + # Weight the per-request acceptance rate (AR) and acceptance length + # (AL) averages by the number of decoding iterations the request ran. + # An equally-weighted mean would bias the result toward short requests, + # which run fewer decoding iterations; iteration weighting makes the + # .average a token-level mean so longer requests contribute + # proportionally. This also makes acceptance_length_percentiles.average + # equal the globally-computed acceptance_length + # (sum(output_tokens) / total_decoding_iterations), since AL_i = + # output_tokens_i / iterations_i and the weights cancel the per-request + # iterations. Percentiles are unaffected. draft_acceptance_rate_percentiles = PercentileStats.from_iterable( - draft_acceptance_rate) if draft_acceptance_rate else None + draft_acceptance_rate, + weights=decoding_iterations) if draft_acceptance_rate else None acceptance_length_percentiles = PercentileStats.from_iterable( - acceptance_length) if acceptance_length else None + acceptance_length, + weights=decoding_iterations) if acceptance_length else None requests = list(self.requests.values()) stats = BenchmarkStatistics( diff --git a/tensorrt_llm/bench/dataclasses/statistics.py b/tensorrt_llm/bench/dataclasses/statistics.py index 06be9dfccdd7..88ec62432413 100644 --- a/tensorrt_llm/bench/dataclasses/statistics.py +++ b/tensorrt_llm/bench/dataclasses/statistics.py @@ -100,15 +100,35 @@ class PercentileStats(BaseModel): average: float @classmethod - def from_iterable(cls, values: List[Any]) -> PercentileStats: + def from_iterable(cls, + values: List[Any], + weights: Optional[List[float]] = None) -> PercentileStats: + """Build percentile statistics from ``values``. + + When ``weights`` is provided, ``average`` is computed as a weighted + mean (``sum(w * v) / sum(w)``) instead of an equally-weighted mean. + This is used to weight per-request metrics (e.g. speculative decoding + acceptance rate / acceptance length) by the number of decoding + iterations so that longer requests, which run more decoding iterations, + contribute proportionally. Percentiles, minimum and maximum are + unaffected. + """ length = len(values) sorted_values = sorted(values) + if weights is not None: + total_weight = sum(weights) + average = (sum(w * v + for w, v in zip(weights, values, strict=True)) / + total_weight + if total_weight > 0 else float(sum(values)) / length) + else: + average = float(sum(values)) / length return cls( p50=sorted_values[int(length * 0.50)], p90=sorted_values[int(length * 0.90)], p95=sorted_values[int(length * 0.95)], p99=sorted_values[int(length * 0.99)], - average=float(sum(values)) / length, + average=average, minimum=min(values), maximum=max(values), ) diff --git a/tensorrt_llm/commands/eval.py b/tensorrt_llm/commands/eval.py index 024821737ce8..82553c2545f7 100644 --- a/tensorrt_llm/commands/eval.py +++ b/tensorrt_llm/commands/eval.py @@ -27,6 +27,17 @@ from ..llmapi.llm_utils import update_llm_args_with_extra_options from ..logger import logger, severity_map from ..usage import config as _telemetry_config +from .utils import collect_explicit_cli_keys + +# Map Click parameter names to the LlmArgs field name (or merge-function CLI +# scalar name) used by `update_llm_args_with_extra_options`. +_CLICK_TO_LLM_ARG = { + "tp_size": "tensor_parallel_size", + "pp_size": "pipeline_parallel_size", + "ep_size": "moe_expert_parallel_size", + "kv_cache_free_gpu_memory_fraction": "free_gpu_memory_fraction", + "disable_kv_cache_reuse": "enable_block_reuse", +} @click.group() @@ -112,8 +123,9 @@ "extra_llm_api_options", type=str, default=None, - help="Path to a YAML file that overwrites the parameters. " - "Can be specified as either --config or --extra_llm_api_options.") + help="Path to a YAML configuration file. Explicit CLI flags " + "take precedence over values in this file. Can be specified " + "as either --config or --extra_llm_api_options.") @click.option("--disable_kv_cache_reuse", is_flag=True, default=False, @@ -132,6 +144,10 @@ def main(ctx, model: str, tokenizer: Optional[str], telemetry: bool): logger.set_level(log_level) + explicit_cli_keys = collect_explicit_cli_keys( + exclude=("extra_llm_api_options", "config"), + translate=_CLICK_TO_LLM_ARG) + kv_cache_config = KvCacheConfig( free_gpu_memory_fraction=kv_cache_free_gpu_memory_fraction, enable_block_reuse=not disable_kv_cache_reuse) @@ -182,13 +198,10 @@ def main(ctx, model: str, tokenizer: Optional[str], param_hint="backend") if extra_llm_api_options is not None: - llm_args = update_llm_args_with_extra_options(llm_args, - extra_llm_api_options) - - # CLI --no-telemetry always wins over YAML config - if not telemetry: - llm_args["telemetry_config"] = llm_args["telemetry_config"].model_copy( - update={"disabled": True}) + llm_args = update_llm_args_with_extra_options( + llm_args, + extra_llm_api_options, + explicit_cli_keys=explicit_cli_keys) profiler.start("trtllm init") llm = llm_cls(**llm_args) diff --git a/tensorrt_llm/commands/serve.py b/tensorrt_llm/commands/serve.py index 5608872da2dd..629dfa2d6a5a 100644 --- a/tensorrt_llm/commands/serve.py +++ b/tensorrt_llm/commands/serve.py @@ -11,7 +11,7 @@ import sys import uuid from pathlib import Path -from typing import Any, Dict, Literal, Mapping, Optional, Sequence +from typing import Any, Dict, Literal, Mapping, Optional, Sequence, Set import click import torch @@ -23,7 +23,8 @@ from tensorrt_llm import MultimodalEncoder from tensorrt_llm._tensorrt_engine import LLM from tensorrt_llm._utils import mpi_rank -from tensorrt_llm.commands.utils import get_is_diffusion_model +from tensorrt_llm.commands.utils import (collect_explicit_cli_keys, + get_is_diffusion_model) from tensorrt_llm.executor.utils import LlmLauncherEnvs from tensorrt_llm.inputs.multimodal import MultimodalServerConfig from tensorrt_llm.llmapi import (BuildConfig, CapacitySchedulerPolicy, @@ -119,13 +120,15 @@ def _signal_handler_cleanup_child(signum, frame): sys.exit(128 + signum) -def is_non_default_or_required(param_name, value, backend): +def is_non_default_or_required(param_name, value, backend, explicit_cli_keys): """ Check if a parameter should be explicitly included in llm_args. Returns True if parameter is either: 1. Always required (core params that must be present), OR - 2. Different from its default value in the backend's LlmArgs class + 2. Set explicitly on the CLI (its name or one of its constructor + scalars is in `explicit_cli_keys`), OR + 3. Different from its default value in the backend's LlmArgs class """ always_include = { "model", "backend", "tokenizer", "custom_tokenizer", @@ -138,6 +141,20 @@ def is_non_default_or_required(param_name, value, backend): if value is None: return False + if param_name in explicit_cli_keys: + return True + + # LlmArgs fields built from CLI scalars whose names differ from the field + # name (e.g. `--free_gpu_memory_fraction` constructs `kv_cache_config`). + cli_derived_fields = { + "kv_cache_config": ("free_gpu_memory_fraction", "kv_cache_dtype"), + "build_config": + ("max_batch_size", "max_num_tokens", "max_beam_width", "max_seq_len"), + } + if any(s in explicit_cli_keys + for s in cli_derived_fields.get(param_name, ())): + return True + if backend == "tensorrt": llm_args_class = TrtLlmArgs elif backend == "_autodeploy": @@ -192,8 +209,11 @@ def get_llm_args( telemetry: bool = True, agent_percentage: float = 0.0, agent_types: Optional[str] = None, + explicit_cli_keys: Optional[Set[str]] = None, **llm_args_extra_dict: Any): + explicit_cli_keys = explicit_cli_keys or set() + if gpus_per_node is None: gpus_per_node = device_count() if gpus_per_node == 0: @@ -209,9 +229,6 @@ def get_llm_args( raise ValueError(f"Invalid cp_type: {cp_config['cp_type']}. " \ f"Must be one of: {', '.join([t.name for t in CpType])}") - kv_cache_default_fraction = KvCacheConfig.model_fields[ - 'free_gpu_memory_fraction'].default - cli_maybe_overrides = { "model": model, @@ -225,8 +242,7 @@ def get_llm_args( tokenizer or model, "kv_cache_config": KvCacheConfig(free_gpu_memory_fraction=free_gpu_memory_fraction, - dtype=kv_cache_dtype) if free_gpu_memory_fraction - != kv_cache_default_fraction or kv_cache_dtype != "auto" else None, + dtype=kv_cache_dtype), "cp_config": cp_config, "build_config": @@ -291,12 +307,35 @@ def get_llm_args( llm_args = { param: value for param, value in cli_maybe_overrides.items() - if is_non_default_or_required(param, value, backend) + if is_non_default_or_required(param, value, backend, explicit_cli_keys) } return llm_args, llm_args_extra_dict +def _build_llm_args_from_disagg_server_cfg(other_args: Dict) -> Dict: + """Construct llm_args from a disaggregated server config's `other_args`. + + `other_args` is a single source — there is no separate CLI / YAML + distinction here. Every key is user-set, so we pass all keys as + `explicit_cli_keys` to `get_llm_args` to bypass the value-based filter + that would otherwise drop fields equal to their LlmArgs class defaults + (e.g. `tensor_parallel_size: 1`). + + Do NOT pass `explicit_cli_keys` to `update_llm_args_with_extra_dict`: + `llm_args_extra_dict` here is just the catch-all for kwargs that didn't + match `get_llm_args`'s named signature (e.g. `quant_config`, + `lora_config`, `pytorch_backend_config`) — it isn't a separate YAML + being overridden. Passing the explicit set would trigger the merge + function's "drop YAML keys claimed by explicit CLI" filter and + silently lose those kwargs. + """ + disagg_explicit_keys = set(other_args) + llm_args, llm_args_extra_dict = get_llm_args( + **other_args, explicit_cli_keys=disagg_explicit_keys) + return update_llm_args_with_extra_dict(llm_args, llm_args_extra_dict) + + def launch_server( host: str, port: int, @@ -717,9 +756,9 @@ def convert(self, value: Any, param: Optional["click.Parameter"], type=str, default=None, help=help_info_with_stability_tag( - "Path to a YAML file that overwrites the parameters specified by trtllm-serve. " - "Can be specified as either --config or --extra_llm_api_options.", - "prototype")) + "Path to a YAML configuration file. Explicit CLI flags take precedence " + "over values in this file. Can be specified as either --config or " + "--extra_llm_api_options.", "prototype")) @click.option( "--reasoning_parser", type=click.Choice(["auto"] + list(ReasoningParserFactory.keys())), @@ -933,6 +972,9 @@ def serve( f"Failed to import custom module from {custom_module_dir}: {e}") raise e + explicit_cli_keys = collect_explicit_cli_keys( + exclude=("extra_llm_api_options", "config")) + def _serve_llm(): nonlocal server_role llm_args, _ = get_llm_args( @@ -964,19 +1006,15 @@ def _serve_llm(): video_pruning_rate=video_pruning_rate, telemetry=telemetry, agent_percentage=agent_percentage, - agent_types=agent_types) + agent_types=agent_types, + explicit_cli_keys=explicit_cli_keys) llm_args_extra_dict = {} if extra_llm_api_options is not None: with open(extra_llm_api_options, 'r') as f: llm_args_extra_dict = yaml.safe_load(f) - llm_args = update_llm_args_with_extra_dict(llm_args, - llm_args_extra_dict) - - # CLI --no-telemetry always wins over YAML config - if not telemetry: - llm_args["telemetry_config"] = llm_args[ - "telemetry_config"].model_copy(update={"disabled": True}) + llm_args = update_llm_args_with_extra_dict( + llm_args, llm_args_extra_dict, explicit_cli_keys=explicit_cli_keys) metadata_server_cfg = parse_metadata_server_config_file( metadata_server_config_file) @@ -1100,9 +1138,8 @@ def _serve_visual_gen(): "extra_encoder_options", type=str, default=None, - help= - "Path to a YAML file that overwrites the parameters specified by trtllm-serve. " - "Prefer --config over --extra_encoder_options.") + help="Path to a YAML configuration file. Explicit CLI flags take precedence " + "over values in this file. Prefer --config over --extra_encoder_options.") @click.option("--hf_revision", "--revision", "revision", @@ -1143,6 +1180,9 @@ def serve_encoder(model: str, host: str, port: int, log_level: str, logger.warning( "--extra_encoder_options is deprecated, use --config instead.") + explicit_cli_keys = collect_explicit_cli_keys( + exclude=("extra_encoder_options", "config")) + llm_args, _ = get_llm_args( model=model, max_batch_size=max_batch_size, @@ -1152,19 +1192,15 @@ def serve_encoder(model: str, host: str, port: int, log_level: str, revision=revision, free_gpu_memory_fraction=free_gpu_memory_fraction, tensor_parallel_size=tensor_parallel_size, - telemetry=telemetry) + telemetry=telemetry, + explicit_cli_keys=explicit_cli_keys) encoder_args_extra_dict = {} if extra_encoder_options is not None: with open(extra_encoder_options, 'r') as f: encoder_args_extra_dict = yaml.safe_load(f) - encoder_args = update_llm_args_with_extra_dict(llm_args, - encoder_args_extra_dict) - - # CLI --no-telemetry always wins over YAML config - if not telemetry: - encoder_args["telemetry_config"] = encoder_args[ - "telemetry_config"].model_copy(update={"disabled": True}) + encoder_args = update_llm_args_with_extra_dict( + llm_args, encoder_args_extra_dict, explicit_cli_keys=explicit_cli_keys) metadata_server_cfg = parse_metadata_server_config_file( metadata_server_config_file) @@ -1324,9 +1360,7 @@ def disaggregated_mpi_worker(config_file: Optional[str], log_level: str): DisaggLauncherEnvs.TLLM_DISAGG_INSTANCE_IDX) server_cfg = disagg_cfg.server_configs[int(instance_idx)] - llm_args, llm_args_extra_dict = get_llm_args(**server_cfg.other_args) - llm_args = update_llm_args_with_extra_dict(llm_args, - llm_args_extra_dict) + llm_args = _build_llm_args_from_disagg_server_cfg(server_cfg.other_args) # Ignore the non-LLM args llm_args.pop("router", None) @@ -1349,9 +1383,10 @@ def disaggregated_mpi_worker(config_file: Optional[str], log_level: str): instance_idx) server_cfg = disagg_cfg.server_configs[instance_idx] - llm_args, llm_args_extra_dict = get_llm_args(**server_cfg.other_args) - llm_args = update_llm_args_with_extra_dict(llm_args, - llm_args_extra_dict) + # NOTE: the resulting llm_args is currently unused; _launch_disaggregated_leader + # does not take it. Keeping the call symmetric with the client branch above + # so any future use of llm_args here behaves the same way. + _build_llm_args_from_disagg_server_cfg(server_cfg.other_args) _launch_disaggregated_leader(sub_comm, instance_idx, config_file, log_level) diff --git a/tensorrt_llm/commands/utils.py b/tensorrt_llm/commands/utils.py index 46a87bbc2da1..b968e30cbe3a 100644 --- a/tensorrt_llm/commands/utils.py +++ b/tensorrt_llm/commands/utils.py @@ -2,6 +2,10 @@ import json import logging import os +from typing import Iterable, Mapping, Optional, Set + +import click +from click.core import ParameterSource from tensorrt_llm._torch.visual_gen.config import ParallelConfig from tensorrt_llm.llmapi.utils import download_hf_partial @@ -134,6 +138,29 @@ def get_visual_gen_model_type(model_path: str): ) +def collect_explicit_cli_keys( + *, + exclude: Iterable[str] = (), + translate: Optional[Mapping[str, str]] = None, +) -> Set[str]: + """Return CLI flag names the user typed on the command line. + + Reads the active Click context and selects parameters whose source is + `ParameterSource.COMMANDLINE`. `exclude` removes meta flags that aren't + config keys (e.g. `extra_llm_api_options`, `config`). `translate` maps + each Click parameter name to the LlmArgs field name (or merge-function + CLI scalar name) used by `update_llm_args_with_extra_options`; entries + not present in the map pass through unchanged. + """ + ctx = click.get_current_context() + explicit = { + name for name in ctx.params if ctx.get_parameter_source(name) == ParameterSource.COMMANDLINE + } - set(exclude) + if translate is None: + return explicit + return {translate.get(name, name) for name in explicit} + + def get_visual_gen_num_gpus(diffusion_config: dict) -> int: """Compute the number of GPUs from a visual_gen config. diff --git a/tensorrt_llm/executor/base_worker.py b/tensorrt_llm/executor/base_worker.py index 18e8a182f210..e42f2b25b24c 100644 --- a/tensorrt_llm/executor/base_worker.py +++ b/tensorrt_llm/executor/base_worker.py @@ -468,21 +468,8 @@ def _enqueue_request(self, if request.multimodal_params is not None and request.multimodal_params.has_content( ): if request.multimodal_params.multimodal_input is not None: - multimodal_input = tllm.MultimodalInput( - multimodal_hashes=request.multimodal_params. - multimodal_input.multimodal_hashes, - multimodal_positions=request.multimodal_params. - multimodal_input.multimodal_positions, - multimodal_lengths=request.multimodal_params. - multimodal_input.multimodal_lengths, - multimodal_uuids=request.multimodal_params.multimodal_input. - multimodal_uuids, - multimodal_item_run_cu_offsets=request.multimodal_params. - multimodal_input.multimodal_item_run_cu_offsets, - multimodal_run_positions=request.multimodal_params. - multimodal_input.multimodal_run_positions, - multimodal_run_lengths=request.multimodal_params. - multimodal_input.multimodal_run_lengths) + multimodal_input = request.multimodal_params.multimodal_input.to_binding( + tllm) # NOTE: Setting to None here to avoid sending multimodal_input again through the 'py_multimodal_data' field request.multimodal_params.multimodal_input = None @@ -622,7 +609,8 @@ def _deduce_max_tokens(request: GenerationRequest, executor_request.py_disaggregated_params = request.disaggregated_params if self._is_pytorch_backend and request.multimodal_params is not None: if request.multimodal_params.multimodal_data is not None: - # NOTE: Deserialize SharedTensor handle to actual tensor + # Resolve SharedTensorContainer dicts inside multimodal_data, including + # E/P handoff embedding handles parked under "multimodal_embedding". request.multimodal_params.to_tensor("multimodal_data") executor_request.py_multimodal_data = request.multimodal_params.multimodal_data @@ -833,6 +821,7 @@ def _stats_serializer(stats) -> str: host_step_time_ms = stats[4] if len(stats) > 4 else None prev_device_step_time_ms = stats[5] if len(stats) > 5 else None scheduler_mode = stats[6] if len(stats) > 6 else None + gpu_forward_time_ms = stats[7] if len(stats) > 7 else None stats_dict = json.loads(iteration_stats.to_json_str()) # Always tag the row so Dynamo's adapter can read @@ -891,6 +880,11 @@ def _stats_serializer(stats) -> str: # comment in PyExecutor._profiler for the design rationale. if prev_device_step_time_ms is not None: stats_dict["prevDeviceStepTimeMS"] = prev_device_step_time_ms + # Batch-matched GPU forward time measured from the CUDA events around + # this record's _forward_step. This is the preferred field for + # ForwardPassMetrics wall_time. + if gpu_forward_time_ms is not None: + stats_dict["gpuForwardTimeMS"] = gpu_forward_time_ms # Scheduler mode for this record. "overlap" means iterLatencyMS # spans ~2 loops (use hostStepTimeMS for clean per-loop cost); # "non_overlap" means iterLatencyMS is itself the clean per-loop diff --git a/tensorrt_llm/executor/result.py b/tensorrt_llm/executor/result.py index 2649f7aa5516..4c2bd2b4cfa8 100644 --- a/tensorrt_llm/executor/result.py +++ b/tensorrt_llm/executor/result.py @@ -1,6 +1,7 @@ import asyncio import dataclasses import json +import math import time import weakref from dataclasses import dataclass, field @@ -24,6 +25,7 @@ from ..disaggregated_params import DisaggregatedParams from ..llmapi.tracer import global_tracer from ..llmapi.utils import AsyncQueue, print_traceback_on_error +from ..logger import logger from ..metrics import MetricNames, MetricsCollector, RequestEventTiming from ..metrics.perf_utils import \ process_req_perf_metrics as _process_req_perf_metrics @@ -67,8 +69,7 @@ class LogProbsResult(NamedTuple): class ResponseWrapper: - """ - 1. Wrapper of runtime response with optional outputs computed post runtime. + """1. Wrapper of runtime response with optional outputs computed post runtime. 2. A workaround to pass around RequestPerfMetrics. """ @@ -169,7 +170,7 @@ def logprobs_diff(self) -> TokenLogprobs | SimpleTokenLogprobs: class GenerationResultBase: - ''' This holds the core logic of the GenerationResult class. ''' + """This holds the core logic of the GenerationResult class.""" def __init__(self, id: int, @@ -183,6 +184,8 @@ def __init__(self, self._disaggregated_params = None self.decoding_iter = 0 self.cached_tokens = 0 + self.per_pos_drafted = None + self.per_pos_accepted = None # Average decoded tokens per runtime iteration; set when the first LLM response arrives. # None indicates not yet available (e.g., before first step/stream). self.avg_decoded_tokens_per_iter: Optional[float] = None @@ -279,8 +282,7 @@ def _handle_sequence(self, logprobs_result=None, req_perf_metrics_dict: Optional[dict[str, float]] = None): - """ Handle a single sequence in the response. """ - + """Handle a single sequence in the response.""" seq_idx = sequence_index src_idx = sequence_index if self.sampling_params.use_beam_search else 0 @@ -491,6 +493,10 @@ def _handle_response(self, context_phase_params = response_result.context_phase_params self.decoding_iter = response_result.decoding_iter self.cached_tokens = getattr(response_result, 'cached_tokens', 0) + self.per_pos_drafted = getattr(response_result, 'per_pos_drafted', + None) + self.per_pos_accepted = getattr(response_result, 'per_pos_accepted', + None) self.avg_decoded_tokens_per_iter = response_result.avg_decoded_tokens_per_iter if context_phase_params is not None: existing_disagg_params = self.disaggregated_params @@ -546,7 +552,6 @@ def _handle_response(self, if hasattr(response_result, "mm_embedding_handles" ) and response_result.mm_embedding_handles is not None: - # mm_embedding_handles is a list of handles (one per multimodal item). mm_embedding_handles = response_result.mm_embedding_handles if self._disaggregated_params is not None: self._disaggregated_params.multimodal_embedding_handles = mm_embedding_handles @@ -610,10 +615,87 @@ def record_stats(self, metrics_stats.update(processed_metrics_stat) # Record prompt tokens only for the first candidate to avoid # double-counting the shared prompt across n candidates. + prompt_token_ids = getattr(self, "prompt_token_ids", None) if output.finish_reason and sequence_index == 0: - prompt_token_ids = getattr(self, "prompt_token_ids", None) if prompt_token_ids is not None and len(prompt_token_ids) > 0: metrics_stats[MetricNames.PROMPT_TOKENS] = len(prompt_token_ids) + + # Request-scoped metrics: only record for the first candidate to avoid + # double-counting across n candidates. + if output.finish_reason and sequence_index == 0: + metrics_stats[MetricNames.PROMPT_CACHE_CACHED_TOKENS] = \ + self.cached_tokens + + spec_dec_logged = False + if self.per_pos_drafted is not None and any( + d > 0 for d in self.per_pos_drafted): + metrics_stats[MetricNames.SPEC_DEC_ACCEPTED_PER_POS] = \ + self.per_pos_accepted + metrics_stats[MetricNames.SPEC_DEC_DRAFTED_PER_POS] = \ + self.per_pos_drafted + spec_dec_logged = True + if not spec_dec_logged and output.request_perf_metrics is not None: + spec_dec = output.request_perf_metrics.speculative_decoding + if spec_dec is not None and spec_dec.total_draft_tokens > 0: + metrics_stats[MetricNames.SPEC_DEC_ACCEPTED_PER_POS] = \ + [spec_dec.total_accepted_draft_tokens] + metrics_stats[MetricNames.SPEC_DEC_DRAFTED_PER_POS] = \ + [spec_dec.total_draft_tokens] + + if output.prompt_logprobs and prompt_token_ids: + try: + prompt_lps = [] + for i, entry in enumerate(output.prompt_logprobs): + if i >= len(prompt_token_ids): + break + token_id = prompt_token_ids[i] + if isinstance(entry, dict): + if token_id in entry: + lp_obj = entry[token_id] + lp = lp_obj.logprob if hasattr( + lp_obj, 'logprob') else float(lp_obj) + prompt_lps.append(lp) + elif isinstance(entry, (int, float)): + prompt_lps.append(float(entry)) + if prompt_lps: + mean_lp = sum(prompt_lps) / len(prompt_lps) + ppl = math.exp(-mean_lp) + if math.isfinite(ppl): + metrics_stats[MetricNames.PREFILL_PERPLEXITY] = ppl + except (ValueError, TypeError): + logger.debug("Failed to compute prefill perplexity", + exc_info=True) + + # Candidate-scoped metric: generation perplexity is computed per candidate + # from this candidate's logprobs. + num_gen_tokens = output.length + if output.finish_reason and num_gen_tokens > 0: + gen_ppl = None + if output.cumulative_logprob is not None: + gen_ppl = math.exp(-output.cumulative_logprob / num_gen_tokens) + elif output.logprobs: + try: + gen_lps = [] + for i, entry in enumerate(output.logprobs): + if isinstance(entry, dict): + token_id = output.token_ids[i] if i < len( + output.token_ids) else None + if token_id is not None and token_id in entry: + lp_obj = entry[token_id] + lp = lp_obj.logprob if hasattr( + lp_obj, 'logprob') else float(lp_obj) + gen_lps.append(lp) + elif isinstance(entry, (int, float)): + gen_lps.append(float(entry)) + if gen_lps: + mean_lp = sum(gen_lps) / len(gen_lps) + gen_ppl = math.exp(-mean_lp) + except (ValueError, TypeError): + logger.debug("Failed to compute generation perplexity", + exc_info=True) + if gen_ppl is not None and math.isfinite(gen_ppl): + metrics_stats[MetricNames.GENERATION_PERPLEXITY] = gen_ppl + self.candidate_metrics.append(metrics_stats) self.metrics_dict.update(metrics_stats) @@ -722,7 +804,7 @@ def safe_set_attr(span, attr, value): class DetokenizedGenerationResultBase(GenerationResultBase): - ''' The base class for the generation result with detokenization support. ''' + """The base class for the generation result with detokenization support.""" # import once and avoid cyclic import from .postproc_worker import PostprocWorker @@ -801,14 +883,13 @@ def _handle_response(self, response: "GenerationExecutor.Response"): class GenerationResult(GenerationResultBase): - ''' - The result of a generation request. It can be used to wait for the completion of the request. + """The result of a generation request. It can be used to wait for the completion of the request. Args: generation_request (GenerationRequest): The generation request object. background_error_handler (Callable, optional): The error handler to process the errors from the background threads/processes. Defaults to None. executor (GenerationExecutor, optional): The executor that created this result. Defaults to None. - ''' + """ def __init__( self, @@ -958,8 +1039,7 @@ def __hash__(self): class IterationResult: - """ - Runtime results for all available iterations. + """Runtime results for all available iterations. """ def __init__(self): @@ -981,8 +1061,7 @@ def mark_undone(self): self._done = False def get_results(self) -> List[dict]: - """ - Return all runtime results in the queue. + """Return all runtime results in the queue. """ results = [] while not self._done: @@ -1020,8 +1099,7 @@ def compute_logprobs( simple_prompt_logprobs: bool = False, simple_logprobs: bool = False, ) -> LogProbsResult: - """ - Compute top-K logprobs from logits when engine doesn't provide them directly. + """Compute top-K logprobs from logits when engine doesn't provide them directly. Used for post-processing logits into logprobs. - Prompt logprobs (from context_logits): always used. diff --git a/tensorrt_llm/inputs/multimodal.py b/tensorrt_llm/inputs/multimodal.py index f19c0af72007..35c7e7413341 100644 --- a/tensorrt_llm/inputs/multimodal.py +++ b/tensorrt_llm/inputs/multimodal.py @@ -23,6 +23,131 @@ _HASH_SCHEME_TAG = b"trtllm.mm.hash.v1" +def _validate_int_list(values: Any, field_name: str) -> None: + """Boundary metadata must be owned Python list[int]. No tensor/tuple.""" + if not isinstance(values, list): + raise TypeError(f"{field_name} must be a list") + if not all(isinstance(value, int) for value in values): + raise TypeError(f"{field_name} must contain only integers") + + +def _validate_multimodal_positions_and_lengths( + multimodal_positions: List[int], + multimodal_lengths: List[int], + expected_num_items: int, + expected_num_items_name: str, +) -> None: + """Validate one prompt span per MM item. + + expected_num_items is owner count: hashes for MultimodalInput, + embedding lengths for E/P handoff. Positions are prompt offsets. Lengths + are prompt token counts. + """ + _validate_int_list(multimodal_positions, "multimodal_positions") + _validate_int_list(multimodal_lengths, "multimodal_lengths") + + if len(multimodal_positions) != len(multimodal_lengths): + raise ValueError(f"Position and length arrays must match in size: " + f"positions={len(multimodal_positions)}, " + f"lengths={len(multimodal_lengths)}") + if len(multimodal_positions) != expected_num_items: + raise ValueError( + f"{expected_num_items_name}, multimodal_positions, and " + "multimodal_lengths must all have the same length") + + if any(position < 0 for position in multimodal_positions): + raise ValueError("multimodal_positions must be non-negative") + if any(length <= 0 for length in multimodal_lengths): + raise ValueError("multimodal_lengths must be positive") + + +def _validate_multimodal_runs( + num_items: int, + multimodal_lengths: List[int], + multimodal_item_run_cu_offsets: Optional[List[int]], + multimodal_run_positions: Optional[List[int]], + multimodal_run_lengths: Optional[List[int]], + item_count_name: str, +) -> None: + """Validate exact runs when they are present. + + Either no run fields, or all three. Offsets length is num_items + 1. + Runs for each item must sum to multimodal_lengths[i]. Values must fit + int32 for executor/KV-cache code. + """ + run_fields = ( + multimodal_item_run_cu_offsets, + multimodal_run_positions, + multimodal_run_lengths, + ) + if all(field is None for field in run_fields): + return + if any(field is None for field in run_fields): + raise ValueError( + "multimodal_item_run_cu_offsets, multimodal_run_positions, " + "and multimodal_run_lengths must be provided together") + + assert multimodal_item_run_cu_offsets is not None + assert multimodal_run_positions is not None + assert multimodal_run_lengths is not None + + for field_name, values in ( + ("multimodal_item_run_cu_offsets", multimodal_item_run_cu_offsets), + ("multimodal_run_positions", multimodal_run_positions), + ("multimodal_run_lengths", multimodal_run_lengths), + ): + _validate_int_list(values, field_name) + if any(value > _INT32_MAX for value in values): + raise ValueError(f"{field_name} values must fit in int32") + + if len(multimodal_item_run_cu_offsets) != num_items + 1: + raise ValueError("multimodal_item_run_cu_offsets length must be " + f"len({item_count_name}) + 1") + if multimodal_item_run_cu_offsets[0] != 0: + raise ValueError("multimodal_item_run_cu_offsets must start at 0") + if len(multimodal_run_positions) != len(multimodal_run_lengths): + raise ValueError( + "multimodal_run_positions and multimodal_run_lengths must " + "have the same length") + if multimodal_item_run_cu_offsets[-1] != len(multimodal_run_positions): + raise ValueError( + "multimodal_item_run_cu_offsets[-1] must equal the number of " + "flat multimodal runs") + if not all(multimodal_item_run_cu_offsets[i] <= + multimodal_item_run_cu_offsets[i + 1] + for i in range(len(multimodal_item_run_cu_offsets) - 1)): + raise ValueError( + "multimodal_item_run_cu_offsets must be non-decreasing") + if any(pos < 0 for pos in multimodal_run_positions): + raise ValueError("multimodal_run_positions must be non-negative") + if any(length <= 0 for length in multimodal_run_lengths): + raise ValueError("multimodal_run_lengths must be positive") + for run_idx, (position, length) in enumerate( + zip(multimodal_run_positions, multimodal_run_lengths)): + if position + length > _INT32_MAX: + raise ValueError( + f"multimodal run {run_idx} end position exceeds int32 " + f"range: position={position}, length={length}, " + f"max={_INT32_MAX}") + + for item_idx, expected_length in enumerate(multimodal_lengths): + run_begin = multimodal_item_run_cu_offsets[item_idx] + run_end = multimodal_item_run_cu_offsets[item_idx + 1] + actual_length = sum(multimodal_run_lengths[run_begin:run_end]) + if actual_length != expected_length: + raise ValueError( + f"multimodal run lengths for item {item_idx} sum to " + f"{actual_length}, expected {expected_length}") + item_positions = multimodal_run_positions[run_begin:run_end] + item_lengths = multimodal_run_lengths[run_begin:run_end] + for prev_pos, prev_len, pos in zip(item_positions, item_lengths, + item_positions[1:]): + if pos < prev_pos + prev_len: + raise ValueError( + "multimodal runs must be ordered and non-overlapping " + "within each item") + + def strip_mm_data_for_generation(mm_data: Dict[str, Any]) -> None: """Clear `mm_data` in place, retaining only `mrope_config.mrope_position_deltas`. @@ -123,23 +248,12 @@ def __post_init__(self): f"All hash arrays must have the same length, got lengths: {hash_lengths}" ) - # Check that positions and lengths are valid - if not all(isinstance(x, int) for x in self.multimodal_positions): - raise TypeError("multimodal_positions must contain only integers") - - if not all(isinstance(x, int) for x in self.multimodal_lengths): - raise TypeError("multimodal_lengths must contain only integers") - - # Check position and length arrays match in size - if len(self.multimodal_positions) != len(self.multimodal_lengths): - raise ValueError( - f"Position and length arrays must match in size: " - f"positions={len(self.multimodal_positions)}, lengths={len(self.multimodal_lengths)}" - ) - if len(self.multimodal_hashes) != len(self.multimodal_positions): - raise ValueError( - "multimodal_hashes, multimodal_positions, and multimodal_lengths " - "must all have the same length") + _validate_multimodal_positions_and_lengths( + self.multimodal_positions, + self.multimodal_lengths, + len(self.multimodal_hashes), + "multimodal_hashes", + ) # Validate multimodal_uuids if provided if self.multimodal_uuids is not None: @@ -155,90 +269,14 @@ def __post_init__(self): f"multimodal_uuids[{i}] must be a string or None, got {type(uuid)}" ) - self._validate_multimodal_runs() - - def _validate_multimodal_runs(self) -> None: - run_fields = ( + _validate_multimodal_runs( + len(self.multimodal_hashes), + self.multimodal_lengths, self.multimodal_item_run_cu_offsets, self.multimodal_run_positions, self.multimodal_run_lengths, + "multimodal_hashes", ) - if all(field is None for field in run_fields): - return - if any(field is None for field in run_fields): - raise ValueError( - "multimodal_item_run_cu_offsets, multimodal_run_positions, " - "and multimodal_run_lengths must be provided together") - - assert self.multimodal_item_run_cu_offsets is not None - assert self.multimodal_run_positions is not None - assert self.multimodal_run_lengths is not None - - if len(self.multimodal_item_run_cu_offsets) != len( - self.multimodal_hashes) + 1: - raise ValueError("multimodal_item_run_cu_offsets length must be " - "len(multimodal_hashes) + 1") - if self.multimodal_item_run_cu_offsets[0] != 0: - raise ValueError("multimodal_item_run_cu_offsets must start at 0") - if len(self.multimodal_run_positions) != len( - self.multimodal_run_lengths): - raise ValueError( - "multimodal_run_positions and multimodal_run_lengths must " - "have the same length") - if self.multimodal_item_run_cu_offsets[-1] != len( - self.multimodal_run_positions): - raise ValueError( - "multimodal_item_run_cu_offsets[-1] must equal the number of " - "flat multimodal runs") - - for field_name, values in ( - ("multimodal_item_run_cu_offsets", - self.multimodal_item_run_cu_offsets), - ("multimodal_run_positions", self.multimodal_run_positions), - ("multimodal_run_lengths", self.multimodal_run_lengths), - ): - if not isinstance(values, list): - raise TypeError(f"{field_name} must be a list") - if not all(isinstance(x, int) for x in values): - raise TypeError(f"{field_name} must contain only integers") - if any(value > _INT32_MAX for value in values): - raise ValueError(f"{field_name} values must fit in int32") - - if not all( - self.multimodal_item_run_cu_offsets[i] <= - self.multimodal_item_run_cu_offsets[i + 1] - for i in range(len(self.multimodal_item_run_cu_offsets) - 1)): - raise ValueError( - "multimodal_item_run_cu_offsets must be non-decreasing") - if any(pos < 0 for pos in self.multimodal_run_positions): - raise ValueError("multimodal_run_positions must be non-negative") - if any(length <= 0 for length in self.multimodal_run_lengths): - raise ValueError("multimodal_run_lengths must be positive") - for run_idx, (position, length) in enumerate( - zip(self.multimodal_run_positions, - self.multimodal_run_lengths)): - if position + length > _INT32_MAX: - raise ValueError( - f"multimodal run {run_idx} end position exceeds int32 " - f"range: position={position}, length={length}, " - f"max={_INT32_MAX}") - - for item_idx, expected_length in enumerate(self.multimodal_lengths): - run_begin = self.multimodal_item_run_cu_offsets[item_idx] - run_end = self.multimodal_item_run_cu_offsets[item_idx + 1] - actual_length = sum(self.multimodal_run_lengths[run_begin:run_end]) - if actual_length != expected_length: - raise ValueError( - f"multimodal run lengths for item {item_idx} sum to " - f"{actual_length}, expected {expected_length}") - item_positions = self.multimodal_run_positions[run_begin:run_end] - item_lengths = self.multimodal_run_lengths[run_begin:run_end] - for prev_pos, prev_len, pos in zip(item_positions, item_lengths, - item_positions[1:]): - if pos < prev_pos + prev_len: - raise ValueError( - "multimodal runs must be ordered and non-overlapping " - "within each item") @classmethod def from_components( @@ -267,6 +305,87 @@ def to_tensor(self) -> Tuple[torch.Tensor, torch.Tensor, torch.Tensor]: torch.tensor(self.multimodal_positions, dtype=torch.int32), torch.tensor(self.multimodal_lengths, dtype=torch.int32)) + def run_metadata(self) -> Dict[str, List[int]]: + metadata = {} + if self.multimodal_item_run_cu_offsets is not None: + metadata[ + "multimodal_item_run_cu_offsets"] = self.multimodal_item_run_cu_offsets + if self.multimodal_run_positions is not None: + metadata["multimodal_run_positions"] = self.multimodal_run_positions + if self.multimodal_run_lengths is not None: + metadata["multimodal_run_lengths"] = self.multimodal_run_lengths + return metadata + + def to_binding(self, executor_module: Any) -> Any: + kwargs = dict(multimodal_hashes=self.multimodal_hashes, + multimodal_positions=self.multimodal_positions, + multimodal_lengths=self.multimodal_lengths, + multimodal_uuids=self.multimodal_uuids) + kwargs.update(self.run_metadata()) + return executor_module.MultimodalInput(**kwargs) + + +@dataclass +class DisaggPrefillMultimodalInputs: + """Typed multimodal metadata returned by E/P disagg prefill processors.""" + + prompt_token_ids: List[int] + multimodal_lengths: List[int] + multimodal_positions: List[int] + multimodal_embedding_lengths: List[int] + multimodal_item_run_cu_offsets: Optional[List[int]] = None + multimodal_run_positions: Optional[List[int]] = None + multimodal_run_lengths: Optional[List[int]] = None + special_token_offsets: Optional[List[int]] = None + item_types: Optional[List[int]] = None + + def __post_init__(self) -> None: + _validate_int_list(self.prompt_token_ids, "prompt_token_ids") + _validate_int_list(self.multimodal_embedding_lengths, + "multimodal_embedding_lengths") + _validate_multimodal_positions_and_lengths( + self.multimodal_positions, + self.multimodal_lengths, + len(self.multimodal_embedding_lengths), + "multimodal_embedding_lengths", + ) + + if any(length <= 0 for length in self.multimodal_embedding_lengths): + raise ValueError("multimodal_embedding_lengths must be positive") + + _validate_multimodal_runs( + len(self.multimodal_lengths), + self.multimodal_lengths, + self.multimodal_item_run_cu_offsets, + self.multimodal_run_positions, + self.multimodal_run_lengths, + "multimodal_lengths", + ) + self._validate_optional_metadata() + + def _validate_optional_metadata(self) -> None: + if self.special_token_offsets is not None: + _validate_int_list(self.special_token_offsets, + "special_token_offsets") + if any(offset < 0 for offset in self.special_token_offsets): + raise ValueError("special_token_offsets must be non-negative") + if self.item_types is not None: + _validate_int_list(self.item_types, "item_types") + if len(self.item_types) != len(self.multimodal_lengths): + raise ValueError("item_types length must match " + "multimodal_lengths") + + def to_multimodal_input(self, + mm_hashes: List[List[int]]) -> MultimodalInput: + return MultimodalInput.from_components( + mm_hashes, + self.multimodal_positions, + self.multimodal_lengths, + mm_item_run_cu_offsets=self.multimodal_item_run_cu_offsets, + mm_run_positions=self.multimodal_run_positions, + mm_run_lengths=self.multimodal_run_lengths, + ) + @dataclass class MultimodalRuntimeData: @@ -329,6 +448,7 @@ def __post_init__(self): # Extend only after auditing each key's consumers. _CPU_ONLY_MULTIMODAL_DATA_KEYS = frozenset({ "multimodal_embed_mask_cumsum", + "multimodal_embedding_lengths", }) @@ -354,7 +474,10 @@ class MultimodalParams: "mrope_rotary_cos_sin": torch.Tensor, # Rotary embeddings (Qwen2/2.5-VL) "mrope_position_deltas": torch.Tensor, # Position deltas (Qwen2/2.5-VL) }, - "multimodal_embedding": torch.Tensor, # Pre-computed vision embeddings + "multimodal_embedding": torch.Tensor | List[SharedTensor handle dict], + # Pre-computed embeddings. In E/P handoff this may temporarily hold + # SharedTensorContainer dicts; BaseWorker restores them to tensors with + # to_tensor("multimodal_data") before PyTorch forward. "image": { "pixel_values": torch.Tensor, "image_height": torch.Tensor | List[int], @@ -827,6 +950,13 @@ def find_mm_token_lengths( mm_video_dict = (multimodal_data or {}).get("video") or {} video_grid_thw = mm_video_dict.get("video_grid_thw") + if video_grid_thw is not None: + video_grid_thw = torch.as_tensor(video_grid_thw) + assert video_grid_thw.device.type == "cpu", ( + "video_grid_thw must be CPU-resident when computing " + f"multimodal metadata, got {video_grid_thw.device}.") + if video_grid_thw.ndim != 2 or video_grid_thw.shape[-1] != 3: + raise ValueError("video_grid_thw must have shape [num_segments, 3]") for modality, items in mm_items.items(): if not hasattr(input_processor, f"get_num_tokens_per_{modality}"): @@ -836,12 +966,14 @@ def find_mm_token_lengths( video_grid_thw_for_items = None if modality == "video" and video_grid_thw is not None: - if len(video_grid_thw) == len(items): + if len(items) == 1: + video_grid_thw_for_items = video_grid_thw + elif video_grid_thw.shape[0] == len(items): video_grid_thw_for_items = video_grid_thw else: logger.warning( "find_mm_token_lengths: video_grid_thw row count " - f"({len(video_grid_thw)}) does not match number of " + f"({video_grid_thw.shape[0]}) does not match number of " f"videos in mm_data ({len(items)}); falling back to " "per-item recompute without video_grid_thw.") @@ -872,8 +1004,9 @@ def find_mm_token_lengths( # metadata route. Keep this for now: Qwen3-VL needs the # processor-produced video_grid_thw for correct video token # counts. - call_kwargs["video_grid_thw"] = video_grid_thw_for_items[ - idx] + call_kwargs["video_grid_thw"] = ( + video_grid_thw_for_items if len(items) == 1 else + video_grid_thw_for_items[idx:idx + 1]) num_tokens = input_processor.get_num_tokens_per_video( **call_kwargs) modality_token_lengths.append(num_tokens) @@ -896,6 +1029,7 @@ def find_mm_token_lengths( _MM_METADATA_ONLY_KEYS = frozenset({ "mrope_config", "multimodal_embed_mask_cumsum", + "multimodal_embedding_lengths", "special_token_offsets", "layout_metadata", }) @@ -1132,6 +1266,32 @@ def _find_mm_token_runs_from_mask( return item_run_cu_offsets, run_positions, run_lengths +def _find_mm_embedding_lengths_from_masks( + mm_mask: torch.Tensor, + embed_mask: torch.Tensor, + num_mm_tokens: List[int], +) -> List[int]: + """Compute embedding-slot counts per logical multimodal item.""" + if not torch.any(mm_mask): + return [] + + mm_positions = torch.where(mm_mask)[0] + lengths_t = torch.tensor(num_mm_tokens) + assert mm_positions.numel() == lengths_t.sum().item(), ( + f"Number of multimodal tokens ({mm_positions.numel()}) does not match " + f"sum of per-unit lengths ({lengths_t.sum().item()}): " + f"num_mm_tokens={num_mm_tokens}") + + embedding_lengths: List[int] = [] + offset = 0 + for item_length in num_mm_tokens: + item_positions = mm_positions[offset:offset + item_length] + offset += item_length + embedding_lengths.append(int(embed_mask[item_positions].sum().item())) + + return embedding_lengths + + def validate_mm_inputs(prompt_token_ids: Union[torch.Tensor, List[int], np.ndarray], mm_hashes: List[List[int]], start_positions: List[int], diff --git a/tensorrt_llm/inputs/registry.py b/tensorrt_llm/inputs/registry.py index 801e27b977eb..e9ed709010ba 100644 --- a/tensorrt_llm/inputs/registry.py +++ b/tensorrt_llm/inputs/registry.py @@ -20,6 +20,7 @@ from .content_format import ContentFormat from .data import TextPrompt from .multimodal import (MultimodalInput, _as_cpu_tensor, _compute_mm_masks, + _find_mm_embedding_lengths_from_masks, _find_mm_token_runs_from_mask, _find_mm_token_start_pos_from_masks, apply_mm_hashes, default_hasher, find_mm_token_lengths, @@ -818,10 +819,11 @@ def support_multimodal_disaggregated(model_cls: Type[nn.Module]): raise TypeError( f"{processor_cls.__name__} must inherit from BaseMultimodalInputProcessor to support multimodal disagg" ) - method = getattr(processor_cls, "get_prompt_token_ids", None) + method = getattr(processor_cls, "build_disagg_prefill_multimodal_inputs", + None) if method is None or not callable(method): raise TypeError( - f"{processor_cls.__name__} must implement a callable method `get_prompt_token_ids` to support multimodal disagg" + f"{processor_cls.__name__} must implement a callable method `build_disagg_prefill_multimodal_inputs` to support multimodal disagg" ) setattr(processor_cls, "support_mm_disagg", True) @@ -1116,6 +1118,7 @@ def multimodal_hashing_process( if input_ids_tensor.numel() == 0: start_positions, start_special_token_positions = [], [] item_run_cu_offsets, run_positions, run_lengths = [0], [], [] + multimodal_embedding_lengths = [] else: mm_mask, embed_mask, special_mask = _compute_mm_masks( input_ids_tensor, @@ -1131,6 +1134,11 @@ def multimodal_hashing_process( num_mm_tokens)) item_run_cu_offsets, run_positions, run_lengths = ( _find_mm_token_runs_from_mask(mm_mask, num_mm_tokens)) + multimodal_embedding_lengths = ( + _find_mm_embedding_lengths_from_masks(mm_mask, embed_mask, + num_mm_tokens)) + extra_processed_inputs["multimodal_data"][ + "multimodal_embedding_lengths"] = multimodal_embedding_lengths # Store special token offsets if available if len(start_special_token_positions ) > 0 and mm_special_token_ids is not None: diff --git a/tensorrt_llm/llmapi/llm.py b/tensorrt_llm/llmapi/llm.py index 3f387d97863e..d8c471d8624e 100644 --- a/tensorrt_llm/llmapi/llm.py +++ b/tensorrt_llm/llmapi/llm.py @@ -17,7 +17,8 @@ from transformers import PreTrainedTokenizerBase from tensorrt_llm._utils import mpi_disabled -from tensorrt_llm.inputs.multimodal import MultimodalInput, MultimodalParams +from tensorrt_llm.inputs.multimodal import (DisaggPrefillMultimodalInputs, + MultimodalParams) from tensorrt_llm.inputs.registry import BaseMultimodalInputProcessor from tensorrt_llm.llmapi import tracing from tensorrt_llm.metrics.enums import MetricNames @@ -566,13 +567,29 @@ def _preprocess( # This branch is applicable for Encode --> Prefill handoff scenario, # in E/P/D/ and E/PD settings. Prefill worker executes this code path. if is_mm_disagg: + if self.args.backend == "_autodeploy": + raise ValueError( + "Multimodal disaggregated inference (encode -> prefill " + "embedding handoff) is not supported with the AutoDeploy " + "backend. AutoDeploy runs the multimodal encoder in-prefill " + "on raw inputs and does not consume precomputed multimodal " + "embeddings.") if not getattr(self.input_processor, "support_mm_disagg", False): raise ValueError( "Multimodal disaggregated inference is not supported for this model" ) mm_handles = disaggregated_params.multimodal_embedding_handles - prompt_token_ids, mm_token_length, mm_token_positions = self.input_processor.get_prompt_token_ids( - inputs, mm_handles) + # TODO(TRTLLM-12869): Pass encoder-side MM layout through + # DisaggregatedParams so prefill does not rebuild prompt tokens, + # positions, lengths, runs, special offsets, and cumsum here. + disagg_mm_inputs = ( + self.input_processor.build_disagg_prefill_multimodal_inputs( + inputs, mm_handles)) + if not isinstance(disagg_mm_inputs, DisaggPrefillMultimodalInputs): + raise TypeError( + "build_disagg_prefill_multimodal_inputs must return " + "DisaggPrefillMultimodalInputs") + prompt_token_ids = disagg_mm_inputs.prompt_token_ids prompt = inputs.get("prompt", None) query_token_ids = inputs.get("query_token_ids", None) if is_gen_only: @@ -581,9 +598,25 @@ def _preprocess( ) else: mm_hashes = disaggregated_params.multimodal_hashes - multimodal_input = MultimodalInput.from_components( - mm_hashes, mm_token_positions, mm_token_length) - multimodal_data = {"multimodal_embedding": mm_handles} + multimodal_input = disagg_mm_inputs.to_multimodal_input( + mm_hashes) + # E/P handoff carries SharedTensorContainer dicts. Park them under the + # embedding key so BaseWorker's recursive to_tensor("multimodal_data") + # restores local tensor views before PyTorch forward. Until then this + # key holds handles, not tensors. + multimodal_data = { + "multimodal_embedding": + mm_handles, + "multimodal_embedding_lengths": + (disagg_mm_inputs.multimodal_embedding_lengths), + } + if disagg_mm_inputs.special_token_offsets is not None: + multimodal_data["special_token_offsets"] = ( + disagg_mm_inputs.special_token_offsets) + if disagg_mm_inputs.item_types is not None: + multimodal_data["layout_metadata"] = { + "item_types": disagg_mm_inputs.item_types + } if disaggregated_params.mrope_position_ids_handle is not None: # NOTE: `PyTorchModelEngine` assumes both are present when using mrope. assert disaggregated_params.mrope_position_deltas_handle is not None diff --git a/tensorrt_llm/llmapi/llm_args.py b/tensorrt_llm/llmapi/llm_args.py index 673a139372f9..30d352ff1811 100644 --- a/tensorrt_llm/llmapi/llm_args.py +++ b/tensorrt_llm/llmapi/llm_args.py @@ -1,18 +1,3 @@ -# SPDX-FileCopyrightText: Copyright (c) 2022-2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. -# SPDX-License-Identifier: Apache-2.0 -# -# Licensed under the Apache License, Version 2.0 (the "License"); -# you may not use this file except in compliance with the License. -# You may obtain a copy of the License at -# -# http://www.apache.org/licenses/LICENSE-2.0 -# -# Unless required by applicable law or agreed to in writing, software -# distributed under the License is distributed on an "AS IS" BASIS, -# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -# See the License for the specific language governing permissions and -# limitations under the License. - import ast import functools import json @@ -1768,13 +1753,13 @@ class MTPDecodingConfig(DecodingBaseConfig): description= "Enable relaxed acceptance during thinking phase for reasoning models. Accepts draft tokens matching any top-K candidate instead of exact top-1." ) - relaxed_topk: PositiveInt = Field( + relaxed_topk: int = Field( default=1, description= "Number of top candidate tokens to consider for relaxed acceptance. Draft token is accepted if it matches any of these." ) - relaxed_delta: NonNegativeFloat = Field( - default=0.0, + relaxed_delta: float = Field( + default=0., description= "Probability threshold for relaxed acceptance. Only candidates with prob >= (top-1 prob - delta) are kept." ) @@ -1805,12 +1790,12 @@ class MTPDecodingConfig(DecodingBaseConfig): "Auto-populated from the model's pretrained config. Do not set manually." ) - begin_thinking_phase_token: NonNegativeInt = Field( + begin_thinking_phase_token: int = Field( default=128798, description= "Token ID marking start of thinking phase. Relaxed acceptance only applies within this phase." ) - end_thinking_phase_token: NonNegativeInt = Field( + end_thinking_phase_token: int = Field( default=128799, description= "Token ID marking end of thinking phase. Strict acceptance resumes after this." @@ -1857,14 +1842,6 @@ def supports_backend(self, backend: str) -> bool: @property def num_capture_layers(self) -> int: - # MTP_EAGLE (two-model) feeds captured target hidden states into the - # separate draft engine, so the shared Eagle3ResourceManager must - # allocate a hidden_states buffer for it. MTP_EAGLE_ONE_MODEL passes - # the target model's hidden_states straight to the MTP layer - # (see Eagle3OneModelWorker.prepare_1st_drafter_inputs / _run_draft_forward, - # both gated on self.is_mtp_eagle), so no capture buffer is needed - # and we should skip allocation to avoid disabling post-MLP/MoE - # fusion via the layer-capture hook. return 1 if self.spec_dec_mode.is_mtp_eagle() else 0 @property @@ -2733,6 +2710,16 @@ class KvCacheConfig(StrictBaseModel, PybindMirror): description= "Size of the host cache in bytes. If both `max_tokens` and `host_cache_size` are specified, memory corresponding to the minimum will be used." ) + disk_cache_size: Optional[NonNegativeInt] = Field( + default=None, + description= + "Size of the disk cache in bytes. Only used by KV cache manager v2 in the PyTorch backend." + ) + disk_cache_path: Optional[str] = Field( + default=None, + description= + "Directory used for disk KV cache files. Must be set when `disk_cache_size` is positive." + ) cross_kv_cache_fraction: Optional[float] = Field( default=None, description= @@ -2833,6 +2820,19 @@ class KvCacheConfig(StrictBaseModel, PybindMirror): "The maximum utilization of the KV cache for resume. Default is 95%. Only used when using KV cache manager v2 (experimental)." ) + enable_kv_pool_rebalance: bool = Field( + default=False, + status="prototype", + description= + "Opt in to the KVCacheManagerV2 auto-tuner (``adjust()``) for " + "rebalancing pool-group ratios between iterations. When True the " + "PyExecutor calls ``adjust()`` opportunistically; the auto-tuner " + "itself remains gated by V2's internal 2000-sample / 120s cooldown. " + "When False (default) the rebalance hook is skipped entirely and " + "pool ratios remain at their warmup-derived values. Beta: enable at " + "your own risk. Only used when using KV cache manager v2 " + "(experimental).") + def _to_pybind(self): config = _KvCacheConfig( enable_block_reuse=self.enable_block_reuse, @@ -2881,6 +2881,19 @@ def validate_max_gpu_total_bytes(cls, v: int): "kv_cache_config.max_gpu_total_bytes must be non-negative") return v + @model_validator(mode='after') + def validate_disk_cache_config(self): + if self.disk_cache_size is not None and self.disk_cache_size > 0: + if not self.disk_cache_path: + raise ValueError( + "kv_cache_config.disk_cache_path must be set when disk_cache_size is positive" + ) + if not os.path.isdir(self.disk_cache_path): + raise ValueError( + f"kv_cache_config.disk_cache_path {self.disk_cache_path} does not exist or is not a directory" + ) + return self + @field_validator('max_attention_window') @classmethod def validate_max_attention_window(cls, v: Optional[List[int]]): @@ -4790,23 +4803,56 @@ def get_executor_config( def update_llm_args_with_extra_dict( llm_args: Dict, llm_args_dict: Dict, - extra_llm_api_options: Optional[str] = None) -> Dict: + extra_llm_api_options: Optional[str] = None, + explicit_cli_keys: Optional[Set[str]] = None) -> Dict: + """Merge YAML overrides into a CLI-derived llm_args dict. + + If `explicit_cli_keys` is provided, those CLI flag names override any + conflicting YAML values. CLI flags whose name does not match the + LlmArgs field name (e.g. `--free_gpu_memory_fraction` constructs + `kv_cache_config.free_gpu_memory_fraction`) are mapped to the nested + field they target. + + If `explicit_cli_keys` is None, YAML wins on conflicts. + """ + # CLI scalar -> nested KvCacheConfig field. Callers add the CLI scalar + # name to `explicit_cli_keys` to make it win over YAML's same-named + # field inside `kv_cache_config:`. + cli_to_kv_cache_field = { + "free_gpu_memory_fraction": "free_gpu_memory_fraction", + "kv_cache_dtype": "dtype", + "enable_block_reuse": "enable_block_reuse", + } + # Scalars that live both at the top level of LlmArgs and inside + # `build_config`. The build_config patch propagates the winning source + # to the nested location. + build_config_dual_loc_keys = ( + "max_batch_size", + "max_num_tokens", + "max_beam_width", + "max_seq_len", + ) + + explicit_cli_keys = explicit_cli_keys or set() if 'hf_revision' in llm_args_dict: llm_args_dict.setdefault('revision', llm_args_dict.pop('hf_revision')) # Deep merge kv_cache_config to prevent partial YAML kv_cache_config from replacing the complete kv_cache_config if 'kv_cache_config' in llm_args and 'kv_cache_config' in llm_args_dict: - # Convert KvCacheConfig object to dict if necessary base_kv_config = llm_args['kv_cache_config'] if isinstance(base_kv_config, KvCacheConfig): base_kv_config = base_kv_config.model_dump(exclude_unset=True) - llm_args_dict['kv_cache_config'] = base_kv_config | llm_args_dict[ - 'kv_cache_config'] + merged = base_kv_config | llm_args_dict['kv_cache_config'] + for cli_name, kv_field in cli_to_kv_cache_field.items(): + if cli_name in explicit_cli_keys and kv_field in base_kv_config: + merged[kv_field] = base_kv_config[kv_field] + llm_args_dict['kv_cache_config'] = merged # Deep merge telemetry_config: YAML can override fields like `disabled`, # but `usage_context` is determined by the CLI entry point and must not - # be overridden by user config. + # be overridden by user config. When `--telemetry/--no-telemetry` was + # typed explicitly, CLI's `disabled` wins over YAML. if 'telemetry_config' in llm_args and 'telemetry_config' in llm_args_dict: yaml_tc = llm_args_dict['telemetry_config'] if not isinstance(yaml_tc, (dict, TelemetryConfig)): @@ -4820,7 +4866,27 @@ def update_llm_args_with_extra_dict( if isinstance(yaml_tc, TelemetryConfig): yaml_tc = yaml_tc.model_dump(exclude_unset=True) yaml_tc.pop('usage_context', None) - llm_args_dict['telemetry_config'] = base_tc | yaml_tc + merged = base_tc | yaml_tc + if "telemetry" in explicit_cli_keys and 'disabled' in base_tc: + merged['disabled'] = base_tc['disabled'] + llm_args_dict['telemetry_config'] = merged + + # Drop YAML keys claimed by explicit CLI flags so the outer merge below + # cannot overwrite them. Warn only when the CLI value actually differs from + # the YAML value, so users who relied on the previous "YAML wins" behavior + # are notified that CLI now takes precedence. + if explicit_cli_keys: + overridden = sorted( + k for k in llm_args_dict + if k in explicit_cli_keys and llm_args.get(k) != llm_args_dict[k]) + if overridden: + logger.warning( + f"Explicit CLI flag(s) {overridden} override the value(s) set " + f"in the YAML config; CLI takes precedence.") + llm_args_dict = { + k: v + for k, v in llm_args_dict.items() if k not in explicit_cli_keys + } field_mapping = { "quant_config": QuantConfig, @@ -4840,8 +4906,9 @@ def update_llm_args_with_extra_dict( for field_name, field_type in field_mapping.items(): if field_name in llm_args_dict: llm_args_dict[field_name] = field_type(**llm_args_dict[field_name]) - extra_llm_str = f"because it's specified in {extra_llm_api_options}" if extra_llm_api_options else "" - logger.warning(f"Overriding {field_name} {extra_llm_str}") + if field_name in llm_args: + extra_llm_str = f" because it's specified in {extra_llm_api_options}" if extra_llm_api_options else "" + logger.info(f"YAML overrides {field_name}{extra_llm_str}") llm_args = llm_args | llm_args_dict @@ -4851,28 +4918,45 @@ def update_llm_args_with_extra_dict( if isinstance(llm_args["build_config"], dict): llm_args["build_config"] = BuildConfig(**llm_args["build_config"]) - for key in [ - "max_batch_size", - "max_num_tokens", - "max_beam_width", - "max_seq_len", - ]: - if key in llm_args_dict: + # Propagate dual-location scalars into build_config: explicit CLI flag + # wins; otherwise YAML's top-level scalar; otherwise leave alone. Warn + # only when the explicit CLI value actually differs from the YAML + # build_config value being replaced (a genuine override). + for key in build_config_dual_loc_keys: + if key in explicit_cli_keys and key in llm_args: + # Warn only on a genuine override of a YAML build_config value; + # otherwise just record where the value came from. + if getattr(llm_args["build_config"], key) != llm_args[key]: + logger.warning( + f"Explicit CLI flag --{key}={llm_args[key]} overrides " + f"the value set in the YAML build_config; CLI takes " + f"precedence.") + else: + logger.info( + f"build_config.{key} set to {llm_args[key]} from explicit CLI flag" + ) + setattr(llm_args["build_config"], key, llm_args[key]) + elif key in llm_args_dict: + setattr(llm_args["build_config"], key, llm_args_dict[key]) logger.info( - f"Overriding {key} from build_config to {llm_args_dict[key]}" + f"build_config.{key} set to {llm_args_dict[key]} from YAML top-level scalar" ) - setattr(llm_args["build_config"], key, llm_args_dict[key]) return llm_args -def update_llm_args_with_extra_options(llm_args: Dict, - extra_llm_api_options: str) -> Dict: +def update_llm_args_with_extra_options( + llm_args: Dict, + extra_llm_api_options: str, + explicit_cli_keys: Optional[Set[str]] = None) -> Dict: if extra_llm_api_options is not None: with open(extra_llm_api_options, 'r') as f: llm_args_dict = yaml.safe_load(f) - llm_args = update_llm_args_with_extra_dict(llm_args, llm_args_dict, - extra_llm_api_options) + llm_args = update_llm_args_with_extra_dict( + llm_args, + llm_args_dict, + extra_llm_api_options, + explicit_cli_keys=explicit_cli_keys) return llm_args diff --git a/tensorrt_llm/metrics/collector.py b/tensorrt_llm/metrics/collector.py index f10c622693bd..d876d2ddf0a0 100644 --- a/tensorrt_llm/metrics/collector.py +++ b/tensorrt_llm/metrics/collector.py @@ -14,6 +14,7 @@ # limitations under the License. """Utilities for Prometheus Metrics Collection.""" +import math import time from typing import Dict, List, Optional, Union @@ -43,6 +44,13 @@ class MetricsCollector: trtllm_request_inference_time_seconds trtllm_prompt_tokens_total trtllm_generation_tokens_total + trtllm_prompt_cached_tokens_total + trtllm_prompt_cached_tokens_per_request + trtllm_spec_decode_drafted_tokens_total + trtllm_spec_decode_accepted_tokens_total + trtllm_prefill_perplexity + trtllm_generation_perplexity + trtllm_request_error_total Iteration-level metrics: trtllm_kv_cache_hit_rate @@ -84,6 +92,8 @@ class MetricsCollector: trtllm_spec_decode_num_accepted_tokens_total trtllm_spec_decode_acceptance_length trtllm_spec_decode_draft_overhead + trtllm_prefill_batch_occupancy + trtllm_prefill_batch_tokens Config info metrics (logged once at startup via log_config_info): trtllm_model_config_info @@ -402,6 +412,67 @@ def __init__( documentation="Draft overhead in speculative decoding", labelnames=self.labels.keys()) + # Prompt cache hit tracking + self.counter_tokens_cached_prompt = Counter( + name=self.metric_prefix + "prompt_cached_tokens_total", + documentation="Total prompt tokens served from KV cache.", + labelnames=self.labels.keys()) + self.histogram_tokens_cached_prompt = Histogram( + name=self.metric_prefix + "prompt_cached_tokens_per_request", + documentation="Histogram of cached prompt tokens per request.", + buckets=[0, 64, 128, 256, 512, 1024, 2048, 4096, 8192], + labelnames=self.labels.keys()) + + # Per-position speculative decoding acceptance counters + self.labelname_token_pos = "token_position" # nosec: B105 + self.labels_with_token_pos = { + **self.labels, self.labelname_token_pos: "" + } + self.counter_tokens_drafted_per_position = Counter( + name=self.metric_prefix + "spec_decode_drafted_tokens_total", + documentation= + "Total drafted tokens per speculative decoding position.", + labelnames=self.labels_with_token_pos.keys()) + self.counter_tokens_accepted_per_position = Counter( + name=self.metric_prefix + "spec_decode_accepted_tokens_total", + documentation= + "Total accepted tokens per speculative decoding position.", + labelnames=self.labels_with_token_pos.keys()) + + # Per-request perplexity histograms + self.histogram_prefill_perplexity = Histogram( + name=self.metric_prefix + "prefill_perplexity", + documentation="Histogram of prefill perplexity per request.", + buckets=[1.0, 2.0, 5.0, 10.0, 25.0, 50.0, 100.0, 500.0, 1000.0], + labelnames=self.labels.keys()) + self.histogram_generation_perplexity = Histogram( + name=self.metric_prefix + "generation_perplexity", + documentation="Histogram of generation perplexity per request.", + buckets=[1.0, 2.0, 5.0, 10.0, 25.0, 50.0, 100.0, 500.0, 1000.0], + labelnames=self.labels.keys()) + + # Prefill batch occupancy / context token distribution + self.gauge_prefill_batch_occupancy = Gauge( + name=self.metric_prefix + "prefill_batch_occupancy", + documentation= + "Fraction of max active slots occupied by context requests.", + labelnames=self.labels.keys()) + self.histogram_prefill_batch_tokens = Histogram( + name=self.metric_prefix + "prefill_batch_tokens", + documentation="Histogram of total context tokens per iteration.", + buckets=[64, 128, 256, 512, 1024, 2048, 4096, 8192, 16384, 32768], + labelnames=self.labels.keys()) + + # HTTP error counter + self.labelname_http_code = "http_code" + self.labels_with_http_code = { + **self.labels, self.labelname_http_code: "" + } + self.counter_request_error = Counter( + name=self.metric_prefix + "request_error_total", + documentation="Total request errors, labeled by HTTP status code.", + labelnames=self.labels_with_http_code.keys()) + def log_config_info( self, model_config: Optional[Dict[str, str]] = None, @@ -539,6 +610,45 @@ def log_request_metrics_dict(self, metrics_dict: dict[str, float]) -> None: MetricNames.GENERATION_TOKENS, 0): self._log_counter(self.counter_generation_tokens, {}, generation_tokens) + if MetricNames.PROMPT_CACHE_CACHED_TOKENS in metrics_dict: + cached_tokens = metrics_dict[ + MetricNames.PROMPT_CACHE_CACHED_TOKENS] + if cached_tokens > 0: + self._log_counter(self.counter_tokens_cached_prompt, + self.labels, cached_tokens) + self._log_histogram(self.histogram_tokens_cached_prompt, + cached_tokens) + + per_pos_drafted = metrics_dict.get( + MetricNames.SPEC_DEC_DRAFTED_PER_POS) + per_pos_accepted = metrics_dict.get( + MetricNames.SPEC_DEC_ACCEPTED_PER_POS) + if per_pos_drafted is not None and per_pos_accepted is not None: + last_nonzero = -1 + for i in range(len(per_pos_drafted) - 1, -1, -1): + if per_pos_drafted[i] > 0: + last_nonzero = i + break + for pos in range(last_nonzero + 1): + labels_with_pos = { + **self.labels, self.labelname_token_pos: pos + } + if per_pos_drafted[pos] > 0: + self.counter_tokens_drafted_per_position.labels( + **labels_with_pos).inc(per_pos_drafted[pos]) + if per_pos_accepted[pos] > 0: + self.counter_tokens_accepted_per_position.labels( + **labels_with_pos).inc(per_pos_accepted[pos]) + + prefill_ppl = metrics_dict.get(MetricNames.PREFILL_PERPLEXITY) + if prefill_ppl is not None and math.isfinite(prefill_ppl): + self._log_histogram(self.histogram_prefill_perplexity, + prefill_ppl) + gen_ppl = metrics_dict.get(MetricNames.GENERATION_PERPLEXITY) + if gen_ppl is not None and math.isfinite(gen_ppl): + self._log_histogram(self.histogram_generation_perplexity, + gen_ppl) + self.last_log_time = time.time() def log_iteration_stats(self, iteration_stats: dict) -> None: @@ -651,12 +761,22 @@ def log_iteration_stats(self, iteration_stats: dict) -> None: self._log_gauge(self.num_scheduled_requests, ifb_stats["numScheduledRequests"]) if "numCtxTokens" in ifb_stats: - self._log_gauge(self.total_context_tokens, - ifb_stats["numCtxTokens"]) + num_ctx_tokens = ifb_stats["numCtxTokens"] + self._log_gauge(self.total_context_tokens, num_ctx_tokens) + if num_ctx_tokens > 0: + self._log_histogram(self.histogram_prefill_batch_tokens, + num_ctx_tokens) if "avgNumDecodedTokensPerIter" in ifb_stats: self._log_gauge(self.avg_decoded_tokens_per_iter, ifb_stats["avgNumDecodedTokensPerIter"]) + # Prefill batch occupancy: context_requests / max_active_requests + num_context = ifb_stats.get("numContextRequests", 0) + max_active = iteration_stats.get("maxNumActiveRequests", 0) + if max_active and max_active > 0: + self._log_gauge(self.gauge_prefill_batch_occupancy, + num_context / max_active) + # Speculative decoding stats if spec_stats := iteration_stats.get("specDecodingStats"): if "numDraftTokens" in spec_stats: @@ -740,3 +860,8 @@ def log_iteration_stats(self, iteration_stats: dict) -> None: if total_intra_device_copy_bytes > 0: self._log_counter(self.kv_cache_intra_device_copy_bytes_total, {}, total_intra_device_copy_bytes) + + def log_request_error(self, http_code: Union[int, str] = "") -> None: + """Increment the error counter, labeled by HTTP status code.""" + labels = {**self.labels, self.labelname_http_code: str(http_code)} + self.counter_request_error.labels(**labels).inc(1) diff --git a/tensorrt_llm/metrics/enums.py b/tensorrt_llm/metrics/enums.py index c26ccc3b23ba..1a76fbf16bf5 100644 --- a/tensorrt_llm/metrics/enums.py +++ b/tensorrt_llm/metrics/enums.py @@ -26,6 +26,11 @@ class MetricNames(Enum): INFERENCE_TIME = "inference_time" PROMPT_TOKENS = "prompt_tokens" GENERATION_TOKENS = "generation_tokens" + PROMPT_CACHE_CACHED_TOKENS = "prompt_cache_cached_tokens" + SPEC_DEC_ACCEPTED_PER_POS = "spec_dec_accepted_per_pos" + SPEC_DEC_DRAFTED_PER_POS = "spec_dec_drafted_per_pos" + PREFILL_PERPLEXITY = "prefill_perplexity" + GENERATION_PERPLEXITY = "generation_perplexity" class RequestEventTiming(Enum): diff --git a/tensorrt_llm/runtime/kv_cache_manager_v2/_block_radix_tree.py b/tensorrt_llm/runtime/kv_cache_manager_v2/_block_radix_tree.py index 6cada3da7cec..1024eca91575 100644 --- a/tensorrt_llm/runtime/kv_cache_manager_v2/_block_radix_tree.py +++ b/tensorrt_llm/runtime/kv_cache_manager_v2/_block_radix_tree.py @@ -14,6 +14,7 @@ # limitations under the License. import hashlib +from array import array from typing import TYPE_CHECKING, Iterable, Iterator, NamedTuple, Sequence, TypeVar, cast from . import rawref @@ -90,11 +91,21 @@ def update(self, data: int | bytes | Sequence[int | bytes]) -> "Hasher": elif type(data) is bytes: self._hasher.update(data) else: - for item in data: # type: ignore - assert ( - NDEBUG or (type(item) is int and (0 <= item < (1 << 64))) or type(item) is bytes - ) - self._hasher.update(item.to_bytes(8, "little") if (type(item) is int) else item) # type: ignore + # Hash the whole token block in one C call instead of one per token. + # array("Q", data).tobytes() packs each int as 8 native-endian bytes; + # all NVIDIA GPU host platforms (x86_64, aarch64/Grace) are little-endian + # so this is byte-identical to the per-token to_bytes(8, "little") loop. + # Falls back to that loop for multimodal blocks (which contain bytes items). + try: + self._hasher.update(array("Q", data).tobytes()) # type: ignore + except (TypeError, OverflowError): + for item in data: # type: ignore + assert ( + NDEBUG + or (type(item) is int and (0 <= item < (1 << 64))) + or type(item) is bytes + ) + self._hasher.update(item.to_bytes(8, "little") if (type(item) is int) else item) # type: ignore return self @property diff --git a/tensorrt_llm/runtime/kv_cache_manager_v2/_storage/_core.py b/tensorrt_llm/runtime/kv_cache_manager_v2/_storage/_core.py index 1db403131ba8..ab33a0eb5dac 100644 --- a/tensorrt_llm/runtime/kv_cache_manager_v2/_storage/_core.py +++ b/tensorrt_llm/runtime/kv_cache_manager_v2/_storage/_core.py @@ -429,14 +429,14 @@ def shrink_in_progress(self) -> bool: def finish_shrink(self) -> bool: assert NDEBUG or self._check() - if ( - self.shrink_in_progress - and self._target_capacity + len(self._overflow_slots) == self._num_active_slots - ): - assert ( - len(set(s.slot_id for s in self._overflow_slots)) == len(self._overflow_slots) - and len(self._overflow_slots) == self._num_active_slots - self._target_capacity - ), "Some slots are still in use." + # Overflow-range IDs that were ever issued are exactly + # max(0, _num_active_slots - _target_capacity); the underused case + # (_num_active_slots <= _target_capacity) collapses to zero. + expected_overflow = max(0, self._num_active_slots - self._target_capacity) + if self.shrink_in_progress and len(self._overflow_slots) == expected_overflow: + assert len(set(s.slot_id for s in self._overflow_slots)) == len(self._overflow_slots), ( + "Some slots are still in use." + ) for ev in set(s.ready_event for s in self._overflow_slots): ev.synchronize() for slot in self._overflow_slots: diff --git a/tensorrt_llm/runtime/kv_cache_manager_v2/_storage_manager.py b/tensorrt_llm/runtime/kv_cache_manager_v2/_storage_manager.py index 90f822ba5539..9ade62d5dc99 100644 --- a/tensorrt_llm/runtime/kv_cache_manager_v2/_storage_manager.py +++ b/tensorrt_llm/runtime/kv_cache_manager_v2/_storage_manager.py @@ -637,6 +637,15 @@ def shrink_pool_group( ), "Not enough slots" pool_group = self._levels[level].storage._pool_groups[pg_idx] assert new_num_slots < pool_group.num_slots, "Not required for expansion of pools" + allocator = pool_group._slot_allocator + # Fast path: when no slot id has ever been issued in the to-be-removed + # range [new_num_slots, _capacity), there is nothing to migrate. + # _num_active_slots is a monotone high-water mark of issued ids. + if allocator._num_active_slots <= new_num_slots: + allocator.prepare_for_shrink(new_num_slots) + allocator.finish_shrink() + pool_group.resize_pools(new_num_slots) + return ctrl = self._levels[level].controller # pages with overflow slots and their indices in the eviction queue. overflow_slots = deque[tuple[int, Page]]() @@ -647,7 +656,6 @@ def shrink_pool_group( num_overflow_persistent = len(overflow_persistent_pages) if num_overflow_persistent > new_num_slots: raise OutOfPagesError("Not enough slots to hold all persistent pages") - allocator = pool_group._slot_allocator # prevent allocating slots with id >= new_num_slots allocator.prepare_for_shrink(new_num_slots) min_num_evicted = 0 diff --git a/tensorrt_llm/serve/openai_protocol.py b/tensorrt_llm/serve/openai_protocol.py index 96316d2eb27d..59cc2f2d7295 100644 --- a/tensorrt_llm/serve/openai_protocol.py +++ b/tensorrt_llm/serve/openai_protocol.py @@ -158,6 +158,10 @@ class DisaggregatedParams(OpenAIBaseModel): schedule_style: Optional[DisaggScheduleStyle] = None conversation_id: Optional[str] = None ctx_usage: Optional[UsageInfo] = None + # TODO(TRTLLM-12407): Multimodal E/PD over trtllm-serve needs these protocol fields too: + # encoder embedding handles, multimodal hashes, and optional mRoPE handles. + # Add them here and in to_disaggregated_params()/to_llm_disaggregated_params() + # before routing MM encoder -> context -> generation through OpenAI protocol. class ErrorResponse(OpenAIBaseModel): diff --git a/tensorrt_llm/serve/openai_server.py b/tensorrt_llm/serve/openai_server.py index 37d56b7c92c4..ce157cb92a42 100644 --- a/tensorrt_llm/serve/openai_server.py +++ b/tensorrt_llm/serve/openai_server.py @@ -321,6 +321,8 @@ async def lifespan(app: FastAPI): @self.app.exception_handler(RequestValidationError) async def validation_exception_handler(_, exc): + if self.metrics_collector: + self.metrics_collector.log_request_error(http_code=400) return JSONResponse(status_code=400, content={"error": str(exc)}) if self.server_role is ServerRole.VISUAL_GEN: diff --git a/tensorrt_llm/tokenizer/tokenizer.py b/tensorrt_llm/tokenizer/tokenizer.py index f681b5496527..2e86bc0fd218 100644 --- a/tensorrt_llm/tokenizer/tokenizer.py +++ b/tensorrt_llm/tokenizer/tokenizer.py @@ -175,6 +175,7 @@ def maybe_fix_byte_level_tokenizer(tokenizer, pretrained_model_dir: str, class TransformersTokenizer(TokenizerBase): ''' A wrapper for the Transformers' tokenizer. + This is the default tokenizer for LLM. ''' def __init__(self, tokenizer): @@ -641,17 +642,38 @@ def load_hf_tokenizer(model_dir: str, trust_remote_code=trust_remote_code, use_fast=use_fast, **kwargs) - if trust_remote_code: maybe_register_transformers_modules_by_value() - return tokenizer - - except Exception as e: + except (OSError, ValueError) as e: logger.warning( - f"Failed to load hf tokenizer from {model_dir}, encounter error: {e}" + f"Failed to load hf tokenizer from hub for {model_dir}: {e}. " + f"The model may be gated and the token is unavailable in this " + f"environment. Retrying with local cache...") + except Exception: + raise + + # Same code block as before but with the specific usage of local_files_only to check if the tokenizer is available locally. + # Can come in handy in cases like when the model is in a gated repo, was correctly downloaded locally but the environment has no HF Auth Key present. + # See https://github.com/NVIDIA/TensorRT-LLM/issues/12805 for more details. + try: + kwargs['local_files_only'] = True + tokenizer = TransformersTokenizer.from_pretrained( + model_dir, + legacy=False, + padding_side='left', + truncation_side='left', + trust_remote_code=trust_remote_code, + use_fast=use_fast, + **kwargs) + if trust_remote_code: + maybe_register_transformers_modules_by_value() + return tokenizer + except (OSError, ValueError) as e: + logger.warning( + f"Failed to load hf tokenizer from local cache for {model_dir}: {e}" ) - return None + return None def load_custom_tokenizer( diff --git a/tensorrt_llm/visual_gen/args.py b/tensorrt_llm/visual_gen/args.py index 8daefd5d7bb6..82d64408ddf0 100644 --- a/tensorrt_llm/visual_gen/args.py +++ b/tensorrt_llm/visual_gen/args.py @@ -205,6 +205,15 @@ class ParallelConfig(StrictBaseModel): status="prototype", description=("Ulysses head-sharding degree. Heads are sharded across ulysses_size GPUs."), ) + async_ulysses: bool = Field( + False, + status="prototype", + description=( + "Enable the async Ulysses A2A pipeline: overlap per-rank V/Q/K projection compute " + "with cross-rank symm-mem all-to-all on a dedicated side stream. " + "Requires ulysses_size > 1. Defaults to False." + ), + ) ring_size: int = Field( 1, ge=1, @@ -258,6 +267,23 @@ def n_workers(self) -> int: def total_parallel_size(self) -> int: return self.cfg_size * self.seq_parallel_size + @model_validator(mode="after") + def _validate_async_ulysses(self) -> "ParallelConfig": + if self.async_ulysses: + if self.ulysses_size == 1: + raise ValueError( + "async_ulysses=True requires ulysses_size > 1; got " + f"ulysses_size={self.ulysses_size}." + ) + if self.ring_size > 1: + raise ValueError( + "async_ulysses=True is incompatible with ring_size > 1: " + "async_ulysses forces SEPARATE_QKV which bypasses the " + "RingAttention wrapper. Set ring_size=1 or async_ulysses=False " + f"(got ring_size={self.ring_size})." + ) + return self + def validate_world_size(self, world_size: int) -> None: if self.total_parallel_size > world_size: raise ValueError( @@ -481,7 +507,7 @@ class VisualGenArgs(StrictBaseModel): "Quantization config — accepts either a QuantConfig instance " "or a ModelOpt-format dict (e.g. ``{'quant_algo': 'FP8', " "'dynamic': True}``). Dict-form parsing happens lazily in " - "DiffusionModelConfig.from_pretrained." + "DiffusionPipelineConfig.from_pretrained." ), ) compilation_config: CompilationConfig = Field( diff --git a/tensorrt_llm/visual_gen/visual_gen.py b/tensorrt_llm/visual_gen/visual_gen.py index c61acdbf190b..3073f708adf7 100644 --- a/tensorrt_llm/visual_gen/visual_gen.py +++ b/tensorrt_llm/visual_gen/visual_gen.py @@ -680,11 +680,17 @@ class VisualGen: def supported_models(cls) -> List[str]: """Return canonical HuggingFace model IDs of every registered pipeline. - Fine-tunes inherit the parent's Diffusers ``_class_name`` and dispatch - automatically without needing to appear in this list. The result is - a fresh list — mutating it does not affect the underlying registry. + The returned list is a *subset* of the variants each pipeline can + actually run. It typically contains the original official upstream + checkpoints and well-known optimized checkpoints (e.g. NVIDIA NVFP4 / + FP8 quantizations published on HuggingFace) that have been tested. + Other variants — community fine-tunes and quantizations not + enumerated here while some of them may run if no model architecture + changes. + + IDs are returned sorted alphabetically for stable. """ - return [hf_id for entry in PIPELINE_REGISTRY.values() for hf_id in entry.hf_ids] + return sorted(hf_id for entry in PIPELINE_REGISTRY.values() for hf_id in entry.hf_ids) @classmethod @set_api_status("prototype") diff --git a/tests/integration/defs/.test_durations b/tests/integration/defs/.test_durations index 43043bf464ab..712c52627f61 100644 --- a/tests/integration/defs/.test_durations +++ b/tests/integration/defs/.test_durations @@ -37,8 +37,6 @@ "accuracy/test_disaggregated_serving.py::TestLlama3_1_8BInstruct::test_tp_pp_symmetric[MMLU-tp1pp2]": 128.10282056825235, "accuracy/test_disaggregated_serving.py::TestLlama3_1_8BInstruct::test_tp_pp_symmetric[MMLU-tp2pp1]": 121.90447079204023, "accuracy/test_disaggregated_serving.py::TestLlama3_1_8BInstruct::test_tp_pp_symmetric[MMLU-tp2pp2]": 117.0786016730126, - "accuracy/test_disaggregated_serving.py::TestLlama4ScoutInstruct::test_auto_dtype[False]": 64428.639228201006, - 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"test_unittests.py::test_unittests_v2[unittest/_torch/modules/moe/test_moe_comm.py::TestMoEComm::test_moe_comm_postquant]": 211.54122115299106 +} diff --git a/tests/integration/defs/accuracy/references/gsm8k.yaml b/tests/integration/defs/accuracy/references/gsm8k.yaml index 37fc0553e9af..5ad8ea7beb7d 100644 --- a/tests/integration/defs/accuracy/references/gsm8k.yaml +++ b/tests/integration/defs/accuracy/references/gsm8k.yaml @@ -215,12 +215,17 @@ Qwen/Qwen3.5-9B: accuracy: 92.82 Qwen/Qwen3.5-35B-A3B: - accuracy: 89.196 + - dtype: bfloat16 + accuracy: 89.196 - extra_acc_spec: h20 accuracy: 83.9 - spec_dec_algo: MTP accuracy: 94.53 - quant_algo: FP8_BLOCK_SCALES accuracy: 94.52 + - spec_dec_algo: DFlash + quant_algo: FP8_BLOCK_SCALES + accuracy: 94.52 Qwen/Qwen3.5-397B-A17B: - quant_algo: NVFP4 kv_cache_quant_algo: FP8 @@ -330,7 +335,7 @@ microsoft/phi-4: mistralai/Codestral-22B-v0.1: - accuracy: 67.10 openai/gpt-oss-120b: - - accuracy: 10.0 # TODO: update this when the perf is good. + - accuracy: 90.3 openai/gpt-oss-20b: - accuracy: 85.823 GPT-OSS/120B-MXFP4: @@ -472,9 +477,9 @@ zai-org/GLM-5-FP8: accuracy: 78.0 # Step-3.7-Flash text decoder (MoE) GSM8K, full 1319-sample split, TP4/EP4 with # TRTLLM attention + MoE backends. FP8 measured on the FP8 block-scale -# checkpoint; NVFP4 measured on the modelopt NVFP4 export (FP8 KV cache). FP8 -# MTP (mtp_nextn=3) is lossless and reuses the non-spec baseline. The NVFP4 -# export does not ship MTP weights, so it is only graded without MTP. +# checkpoint; NVFP4 measured on the modelopt NVFP4 export (FP8 KV cache). MTP +# (mtp_nextn=3) is lossless for both FP8 and NVFP4 and reuses the non-spec +# baseline accuracy. stepfun-ai/Step-3.7-Flash: - quant_algo: FP8_BLOCK_SCALES accuracy: 88 @@ -484,3 +489,7 @@ stepfun-ai/Step-3.7-Flash: - quant_algo: NVFP4 kv_cache_quant_algo: FP8 accuracy: 88 + - quant_algo: NVFP4 + kv_cache_quant_algo: FP8 + spec_dec_algo: MTP + accuracy: 88 diff --git a/tests/integration/defs/accuracy/references/mmmu.yaml b/tests/integration/defs/accuracy/references/mmmu.yaml index 5e3a2ba8f4c9..e2cbb94aadfa 100644 --- a/tests/integration/defs/accuracy/references/mmmu.yaml +++ b/tests/integration/defs/accuracy/references/mmmu.yaml @@ -24,7 +24,10 @@ google/gemma-3-12b-it: kv_cache_quant_algo: FP8 accuracy: 50.11 LGAI-EXAONE/EXAONE-4.5-33B: - - accuracy: 51.22 + # Empirically achieved ~46.5 across H20/B200/B300/GB200/GB300 since the + # model was added (PR #12873). The original 51.22 was committed without + # pre-merge CI validation and was never reproduced. See nvbugs/6211189. + - accuracy: 46.5 Qwen/Qwen2-VL-7B-Instruct: - accuracy: 48.44 Qwen/Qwen2.5-VL-7B-Instruct: @@ -85,7 +88,14 @@ moonshotai/Kimi-K2.5: # reuses the FP8 baseline. stepfun-ai/Step-3.7-Flash: - quant_algo: FP8_BLOCK_SCALES - accuracy: 64 + accuracy: 60 + - quant_algo: FP8_BLOCK_SCALES + spec_dec_algo: MTP + accuracy: 60 + - quant_algo: NVFP4 + kv_cache_quant_algo: FP8 + accuracy: 60 - quant_algo: NVFP4 kv_cache_quant_algo: FP8 - accuracy: 64 + spec_dec_algo: MTP + accuracy: 60 diff --git a/tests/integration/defs/accuracy/references/videomme.yaml b/tests/integration/defs/accuracy/references/videomme.yaml index 2bee39c8c2b6..186971bc05b7 100644 --- a/tests/integration/defs/accuracy/references/videomme.yaml +++ b/tests/integration/defs/accuracy/references/videomme.yaml @@ -3,6 +3,9 @@ # Initial Video-MME short-shard guardrail for E2E video QA. Update these values # after collecting stable model baselines on the generated 300-question shard. +Qwen/Qwen3-VL-2B-Instruct: + - accuracy: 54.5 + num_samples: 300 nvidia/Nemotron-3-Nano-Omni-30B-A3B-Reasoning-FP8: - quant_algo: FP8 kv_cache_quant_algo: FP8 diff --git a/tests/integration/defs/accuracy/test_disaggregated_serving.py b/tests/integration/defs/accuracy/test_disaggregated_serving.py index c786c80f3d19..74911add4cfd 100644 --- a/tests/integration/defs/accuracy/test_disaggregated_serving.py +++ b/tests/integration/defs/accuracy/test_disaggregated_serving.py @@ -916,46 +916,6 @@ def test_multi_instance(self, testset): test_sets=[get_accuracy_task(testset)]) -class TestLlama4ScoutInstruct(LlmapiAccuracyTestHarness): - MODEL_NAME = "meta-llama/Llama-4-Scout-17B-16E-Instruct" - MODEL_PATH = f"{llm_models_root()}/llama4-models/Llama-4-Scout-17B-16E-Instruct" - - @pytest.mark.skip_less_device_memory(140000) - @pytest.mark.timeout(3600) - @pytest.mark.skip_less_device(8) - @pytest.mark.parametrize("overlap_scheduler", [False, True]) - def test_auto_dtype(self, overlap_scheduler): - ctx_server_config = {"disable_overlap_scheduler": True} - gen_server_config = {"disable_overlap_scheduler": overlap_scheduler} - ctx_server_config["cache_transceiver_config"] = { - "backend": "DEFAULT", - "max_tokens_in_buffer": 4096 - } - gen_server_config["cache_transceiver_config"] = { - "backend": "DEFAULT", - "max_tokens_in_buffer": 4096 - } - # Keep this low to avoid warmup OOM in CI - ctx_server_config["max_seq_len"] = 8192 - gen_server_config["max_seq_len"] = 8192 - disaggregated_server_config = { - "hostname": "localhost", - "backend": "pytorch", - "context_servers": { - "num_instances": 1 - }, - "generation_servers": { - "num_instances": 1 - } - } - with launch_disaggregated_llm(disaggregated_server_config, - ctx_server_config, - gen_server_config, - self.MODEL_PATH, - tensor_parallel_size=4) as llm: - run_accuracy_test(llm, self.MODEL_NAME, ["MMLU", "GSM8K"]) - - @pytest.mark.timeout(DEFAULT_TEST_TIMEOUT) @skip_pre_hopper class TestDeepSeekV3Lite(LlmapiAccuracyTestHarness): diff --git a/tests/integration/defs/accuracy/test_epd_disagg_multimodal.py b/tests/integration/defs/accuracy/test_epd_disagg_multimodal.py new file mode 100644 index 000000000000..20659f9b7ca9 --- /dev/null +++ b/tests/integration/defs/accuracy/test_epd_disagg_multimodal.py @@ -0,0 +1,288 @@ +# SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. +# SPDX-License-Identifier: Apache-2.0 +"""VideoMME accuracy over llmapi encode / prefill-decode (E/PD) disaggregation. + +Separated from test_disaggregated_serving.py: the EPD-multimodal path uses an +in-process MultimodalEncoder plus a combined prefill/decode LLM, which is a +different mechanism from the trtllm-serve subprocess disaggregation exercised by +the other tests in that file. +""" + +# NOTE: +# The encoder and PD are resident on the same physical GPU in the current test +# harness. Placing them on different physical GPUs silently corrupts the +# embeddings (garbage output, no error raised) in TRT-LLM's current state because +# the consumer (PD worker) rebuilds the encoder's embedding from a CUDA-IPC handle +# that currently never copies the tensor onto the PD's own compute device. +# Real cross-GPU E/PD therefore requires a real cross-device transfer +# (CPU staging or NIXL/RDMA) that is currently not natively supported in TRT-LLM. + +import contextlib +import os +from dataclasses import dataclass +from typing import Any, Dict, Iterator, Mapping, Optional, Protocol +from unittest import mock + +import pytest + +from tensorrt_llm import LLM, MultimodalEncoder +from tensorrt_llm.llmapi import KvCacheConfig, RequestOutput, SamplingParams +from tensorrt_llm.quantization import QuantAlgo + +from ..conftest import llm_models_root, skip_pre_blackwell, skip_pre_hopper +from .accuracy_core import LlmapiAccuracyTestHarness, VideoMME +from .test_disaggregated_serving import DEFAULT_TEST_TIMEOUT, MyThreadPoolExecutor + + +class VideoMMECompatibleLLM(Protocol): + """LLM surface consumed by the VideoMME evaluator.""" + + args: Any + model: str + _hf_model_dir: str + tokenizer: Any + input_processor: Any + + def generate_async( + self, + inputs: Dict[str, Any], + sampling_params: Optional[SamplingParams] = None, + streaming: bool = False, + ) -> Any: ... + + +class _MultimodalEncoderPDAdapter: + """Adapter that runs VideoMME dict inputs through llmapi E/PD.""" + + def __init__( + self, encoder: MultimodalEncoder, pd_llm: LLM, thread_pool: MyThreadPoolExecutor + ) -> None: + self._encoder = encoder + self._pd_llm = pd_llm + self._thread_pool = thread_pool + self.args = pd_llm.args + self.model = pd_llm._hf_model_dir + self._hf_model_dir = pd_llm._hf_model_dir + self.tokenizer = pd_llm.tokenizer + self.input_processor = pd_llm.input_processor + + def _generate( + self, inputs: Dict[str, Any], sampling_params: Optional[SamplingParams], streaming: bool + ) -> RequestOutput: + if not isinstance(inputs, dict): + raise TypeError(f"Unsupported E/PD request input type: {type(inputs)}") + + encoder_output = self._encoder.generate_async(inputs).result() + disaggregated_params = encoder_output.disaggregated_params + if disaggregated_params is None: + raise RuntimeError("Multimodal encoder did not return disaggregated params.") + if disaggregated_params.multimodal_embedding_handles is None: + raise RuntimeError("Multimodal encoder did not return embedding handles.") + + disaggregated_params.request_type = "context_and_generation" + return self._pd_llm.generate_async( + inputs, + sampling_params=sampling_params, + streaming=streaming, + disaggregated_params=disaggregated_params, + ).result() + + def generate_async( + self, + inputs: Dict[str, Any], + sampling_params: Optional[SamplingParams] = None, + streaming: bool = False, + ): + future = self._thread_pool.submit(self._generate, inputs, sampling_params, streaming) + self._thread_pool.futures.append(future) + return future + + +@contextlib.contextmanager +def launch_multimodal_encoder_pd_llm( + encoder_llm_config: Dict[str, Any], + pd_llm_config: Dict[str, Any], + model_name: str, + max_workers: int = 16, +) -> Iterator[VideoMMECompatibleLLM]: + """Launch separate encoder and combined prefill/decode llmapi instances.""" + with contextlib.ExitStack() as stack: + stack.enter_context(mock.patch.dict(os.environ, {"TLLM_MULTIMODAL_DISAGGREGATED": "1"})) + thread_pool = stack.enter_context(MyThreadPoolExecutor(max_workers=max_workers)) + encoder = MultimodalEncoder(model=model_name, **encoder_llm_config) + pd_llm = LLM(model=model_name, **pd_llm_config) + with encoder, pd_llm: + yield _MultimodalEncoderPDAdapter(encoder, pd_llm, thread_pool) + + +@dataclass(frozen=True) +class EPDVariant: + """Immutable per-variant config for a VideoMME E/PD run.""" + + model_name: str + model_path: str + encoder_config: Mapping[str, Any] + pd_config: Mapping[str, Any] + expected_quant_algo: Optional[QuantAlgo] + max_workers: int + + @classmethod + def _build( + cls, + *, + model_name: str, + model_path: str, + kv_cache_config: KvCacheConfig, + max_batch_size: int, + expected_quant_algo: Optional[QuantAlgo], + max_num_tokens: int = 512, + attn_backend: Optional[str] = None, + max_workers: Optional[int] = None, + ) -> "EPDVariant": + """Fill shared encoder/PD defaults for one variant. + + Optional overrides are applied before construction so the frozen + instance never needs post-hoc mutation. + """ + # Optional attn_backend override, applied to both configs via a spread + # so the frozen instance never needs post-hoc mutation. + attn_override = {"attn_backend": attn_backend} if attn_backend is not None else {} + encoder_config = { + "trust_remote_code": True, + "max_batch_size": max_batch_size, + "cuda_graph_config": None, + **attn_override, + } + pd_config = { + "backend": "pytorch", + "disable_overlap_scheduler": True, + "trust_remote_code": True, + "kv_cache_config": kv_cache_config, + "enable_chunked_prefill": True, + "max_num_tokens": max_num_tokens, + "max_batch_size": max_batch_size, + "cuda_graph_config": None, + **attn_override, + } + + return cls( + model_name=model_name, + model_path=model_path, + encoder_config=encoder_config, + pd_config=pd_config, + expected_quant_algo=expected_quant_algo, + max_workers=max_workers if max_workers is not None else VideoMME.MAX_BATCH_SIZE, + ) + + @classmethod + def qwen3vl_2b(cls) -> "EPDVariant": + return cls._build( + model_name="Qwen/Qwen3-VL-2B-Instruct", + model_path=f"{llm_models_root()}/Qwen3/Qwen3-VL-2B-Instruct", + kv_cache_config=KvCacheConfig( + free_gpu_memory_fraction=0.8, + enable_block_reuse=False, + dtype="auto", + ), + max_batch_size=16, + expected_quant_algo=None, + max_workers=16, + attn_backend="VANILLA", + # Qwen3-VL VideoMME prompts can exceed 1024 tokens after visual + # expansion; avoid splitting a single context across vanilla + # SDPA chunks in the E/P handoff path. + max_num_tokens=2048, + ) + + @classmethod + def nano_omni_fp8(cls) -> "EPDVariant": + return cls._build( + model_name="nvidia/Nemotron-3-Nano-Omni-30B-A3B-Reasoning-FP8", + model_path=f"{llm_models_root()}/NVIDIA-Nemotron-3-Nano-Omni-30B-A3B-Reasoning-FP8", + kv_cache_config=KvCacheConfig( + free_gpu_memory_fraction=0.8, + mamba_ssm_cache_dtype="float32", + enable_block_reuse=False, + dtype="fp8", + ), + max_batch_size=64, + expected_quant_algo=QuantAlgo.FP8, + ) + + @classmethod + def nano_omni_nvfp4(cls) -> "EPDVariant": + return cls._build( + model_name="nvidia/Nemotron-3-Nano-Omni-30B-A3B-Reasoning-NVFP4", + model_path=f"{llm_models_root()}/NVIDIA-Nemotron-3-Nano-Omni-30B-A3B-Reasoning-NVFP4", + kv_cache_config=KvCacheConfig( + free_gpu_memory_fraction=0.8, + mamba_ssm_cache_dtype="float32", + enable_block_reuse=False, + dtype="fp8", + ), + max_batch_size=128, + expected_quant_algo=QuantAlgo.MIXED_PRECISION, + ) + + +class TestVideoMMEEPD(LlmapiAccuracyTestHarness): + """VideoMME accuracy over llmapi encode / prefill-decode (E/PD) disaggregation.""" + + SAMPLING_PARAMS = SamplingParams( + max_tokens=VideoMME.MAX_OUTPUT_LEN, + truncate_prompt_tokens=VideoMME.MAX_INPUT_LEN, + temperature=0.0, + top_k=1, + ) + + # Identical across all variants today; lifted to a class constant to mirror + # agg no_thinking_evaluator_kwargs. + NO_THINKING_EVALUATOR_KWARGS = { + "chat_template_kwargs": { + "enable_thinking": False, + }, + } + + def _launch_epd(self, variant: EPDVariant): + """Context manager: encoder + combined PD llmapi.""" + return launch_multimodal_encoder_pd_llm( + variant.encoder_config, + variant.pd_config, + variant.model_path, + max_workers=variant.max_workers, + ) + + def _run_videomme(self, llm, variant: EPDVariant) -> None: + actual_quant_algo = ( + llm.args.quant_config.quant_algo if llm.args.quant_config is not None else None + ) + assert actual_quant_algo == variant.expected_quant_algo + VideoMME(variant.model_name).evaluate( + llm, + sampling_params=self.SAMPLING_PARAMS, + extra_evaluator_kwargs=self.NO_THINKING_EVALUATOR_KWARGS, + ) + + @pytest.mark.timeout(DEFAULT_TEST_TIMEOUT) + @skip_pre_hopper + @pytest.mark.skip_less_device_memory(80000) + @pytest.mark.parametrize( + "variant", + [ + pytest.param( + EPDVariant.qwen3vl_2b(), marks=skip_pre_blackwell, id="qwen3vl_2b_instruct" + ), + pytest.param( + EPDVariant.nano_omni_fp8(), marks=skip_pre_hopper, id="nemotron_nano_v3_omni_fp8" + ), + pytest.param( + EPDVariant.nano_omni_nvfp4(), + marks=skip_pre_blackwell, + id="nemotron_nano_v3_omni_nvfp4", + ), + ], + ) + def test_disaggregated_videomme(self, variant: EPDVariant) -> None: + """Run VideoMME shard through a model-specific llmapi E/PD config.""" + with self._launch_epd(variant) as llm: + self._run_videomme(llm, variant) diff --git a/tests/integration/defs/accuracy/test_kv_pool_rebalance_accuracy.py b/tests/integration/defs/accuracy/test_kv_pool_rebalance_accuracy.py new file mode 100644 index 000000000000..121a2bc65bac --- /dev/null +++ b/tests/integration/defs/accuracy/test_kv_pool_rebalance_accuracy.py @@ -0,0 +1,153 @@ +# Copyright (c) 2026, NVIDIA CORPORATION. All rights reserved. +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. +r"""Accuracy test for the KVCacheManagerV2 rebalance hook. + +Verifies that forcing the V2 auto-tuner to fire mid-generation does not +change greedy-decode outputs. Uses Gemma-3-1B with explicit VSWA so the +KV cache lands in >=2 pool groups and ``adjust()`` has real work to do +(a single pool group would make rebalance a no-op). + +Run as: + LLM_MODELS_ROOT=/path pytest \ + tests/integration/defs/accuracy/test_kv_pool_rebalance_accuracy.py +""" + +import pytest + +from tensorrt_llm import LLM +from tensorrt_llm.llmapi import KvCacheConfig, SamplingParams + +from ..conftest import llm_models_root, skip_pre_hopper + +# --------------------------------------------------------------------------- # +# Ratio injection +# --------------------------------------------------------------------------- # + + +def _inject_pool_ratio_mismatch(llm: LLM, *, skew: float = 2.0) -> None: + """Force the V2 auto-tuner to do real pool-resize work on the next rebalance call. + + Bypasses the 2000-sample / 120s cooldown gates by stomping counters, + then perturbs ``_target_ratio_list_gpu`` so it differs from + ``_current_gpu_ratio`` by more than the 1.25x threshold inside + ``_need_adjustment``. + + Requires a model with >=2 pool groups (e.g. Gemma-3-1B with VSWA). + Asserts the precondition so a future model change can't silently + turn this test into a no-op. + """ + executor = llm._executor.engine + kv_cache_manager = executor.kv_cache_manager + impl = kv_cache_manager.impl + + impl._num_sampled_kv_caches = 2001 + impl._last_adjustment_time = 0.0 + + current = list(impl._current_gpu_ratio) + assert len(current) >= 2, ( + f"Ratio injection requires >=2 pool groups; got {len(current)}. " + "Check that VSWA is actually configured for this model." + ) + + skewed = [current[0] * skew] + list(current[1:]) + total = sum(skewed) + impl._target_ratio_list_gpu = [x / total for x in skewed] + + +# --------------------------------------------------------------------------- # +# Test +# --------------------------------------------------------------------------- # + +# A handful of prompts spanning short, medium, and long context lengths. +# The long prompt is intentionally repetitive so it occupies multiple KV +# blocks and creates enough pool pressure for rebalance to matter. +_PROMPTS = [ + "The capital of France is", + "Write one sentence about transformers.", + "List three prime numbers greater than 100:", + "The quick brown fox jumps over the lazy dog. " * 40, +] + +_SAMPLING = SamplingParams(max_tokens=64, temperature=0.0, top_k=1) + + +def _vswa_kv_cache_config(*, enable_rebalance: bool) -> KvCacheConfig: + """V2 manager + explicit VSWA pattern that yields multiple pool groups. + + Gemma-3-1B has 5 sliding-window layers : 1 full-attention layer. + """ + return KvCacheConfig( + use_kv_cache_manager_v2=True, + enable_kv_pool_rebalance=enable_rebalance, + max_attention_window=[512, 512, 512, 512, 512, 32768], + # Block reuse disabled per the standing Gemma3 WAR for non- + # inclusive sliding window kernel support. + enable_block_reuse=False, + enable_partial_reuse=False, + tokens_per_block=32, + free_gpu_memory_fraction=0.6, + ) + + +def _generate_tokens(*, model_path: str, disable_overlap: bool, enable_rebalance: bool): + """Run one LLM, return list[list[int]] of generated token ids. + + Note: the ratio-injection helper requires direct access to the + in-process PyExecutor, so the test runs in single-process worker + mode (``TLLM_WORKER_USE_SINGLE_PROCESS=1``). The caller is + responsible for setting that env var (via monkeypatch or otherwise) + before invoking this helper. + """ + with LLM( + model_path, + disable_overlap_scheduler=disable_overlap, + kv_cache_config=_vswa_kv_cache_config(enable_rebalance=enable_rebalance), + ) as llm: + if enable_rebalance: + _inject_pool_ratio_mismatch(llm) + outputs = llm.generate(_PROMPTS, _SAMPLING) + return [list(o.outputs[0].token_ids) for o in outputs] + + +@skip_pre_hopper +class TestKvPoolRebalanceAccuracy: + """Token-exact greedy-decode equivalence under rebalance. + + Compares rebalance=off and rebalance=on with a forced mid-generation + adjust(). + """ + + MODEL_PATH = f"{llm_models_root()}/gemma/gemma-3-1b-it/" + + @pytest.mark.parametrize("disable_overlap", [True, False], ids=["no_overlap", "overlap"]) + def test_rebalance_matches_baseline(self, disable_overlap, monkeypatch): + # Keep the PyExecutor in-process so the ratio-injection helper + # can reach .engine on the client side. + monkeypatch.setenv("TLLM_WORKER_USE_SINGLE_PROCESS", "1") + + baseline = _generate_tokens( + model_path=self.MODEL_PATH, disable_overlap=disable_overlap, enable_rebalance=False + ) + + treated = _generate_tokens( + model_path=self.MODEL_PATH, disable_overlap=disable_overlap, enable_rebalance=True + ) + + assert len(baseline) == len(treated) == len(_PROMPTS) + for i, (b, t) in enumerate(zip(baseline, treated)): + assert b == t, ( + f"prompt {i}: rebalance changed greedy-decode output\n" + f" baseline: {b[:16]}...\n" + f" treated: {t[:16]}..." + ) diff --git a/tests/integration/defs/accuracy/test_llm_api_autodeploy.py b/tests/integration/defs/accuracy/test_llm_api_autodeploy.py index d266e0467265..6a83a1de9b87 100644 --- a/tests/integration/defs/accuracy/test_llm_api_autodeploy.py +++ b/tests/integration/defs/accuracy/test_llm_api_autodeploy.py @@ -564,6 +564,8 @@ def get_default_sampling_params(self): @pytest.mark.skip_less_device_memory(32000) @pytest.mark.parametrize("attn_backend", ["flashinfer", "trtllm"]) + @pytest.mark.parametrize("enable_attention_dp", [False, True], + ids=["attn_dp_off", "attn_dp_on"]) @pytest.mark.parametrize("world_size", [1, 2, 4]) @pytest.mark.parametrize( "model_id", @@ -574,18 +576,29 @@ def get_default_sampling_params(self): pytest.param("nvfp4", marks=skip_pre_blackwell), ], ) - def test_accuracy(self, model_id, world_size, attn_backend): + def test_accuracy(self, model_id, world_size, enable_attention_dp, + attn_backend): if world_size > get_device_count(): pytest.skip(f"Not enough devices for world_size={world_size}") + # attention-DP requires at least 2 ranks to exercise the cross-rank + # max_dp_num_tokens path; on world_size=1 it's a no-op. + if enable_attention_dp and world_size < 2: + pytest.skip("attention_dp requires world_size >= 2") model_path = self.MODEL_PATHS[model_id] kwargs = {} device_memory_mib = get_device_memory() # bf16 always needs low-memory overrides; below H100-class total # memory, the quantized variants do too, since the 30B FP8 / NVFP4 # weights leave too little headroom for the nano_v3.yaml defaults. - if model_id == "bf16" or device_memory_mib < 80000: + # attention_dp adds non-trivial overhead from MoE all-to-all dispatch + # buffers and per-rank expert allocations, so the quantized variants + # also need low-memory overrides on H100-class hardware when it's on. + if (model_id == "bf16" or device_memory_mib < 80000 + or enable_attention_dp): low_memory_overrides(kwargs) kwargs["attn_backend"] = attn_backend + kwargs.setdefault("transforms", {}).setdefault( + "detect_sharding", {})["enable_attention_dp"] = enable_attention_dp with AutoDeployLLM(model=model_path, tokenizer=model_path, @@ -876,52 +889,19 @@ class TestGLM4Flash(LlmapiAccuracyTestHarness): """Accuracy regression tests for GLM-4.7-Flash variants.""" MODEL_NAME = "GLM-4.7-Flash" - MODEL_PATH_BF16 = hf_id_to_local_model_dir("zai-org/GLM-4.7-Flash") - MODEL_PATH_NVFP4 = hf_id_to_local_model_dir("DeepInfra/GLM-4.7-Flash-NVFP4") + MODEL_HF_ID_BF16 = "zai-org/GLM-4.7-Flash" + MODEL_HF_ID_NVFP4 = "DeepInfra/GLM-4.7-Flash-NVFP4" + CONFIG_YAML = "glm-4.7-flash.yaml" # Set minimum possible seq len + small buffer, for test speed & memory usage MAX_SEQ_LEN = max(MMLU.MAX_INPUT_LEN + MMLU.MAX_OUTPUT_LEN, GSM8K.MAX_INPUT_LEN + GSM8K.MAX_OUTPUT_LEN) MAX_NUM_TOKENS = MAX_SEQ_LEN - def get_default_kwargs(self, - enable_chunked_prefill=False, - attn_backend="flashinfer"): - yaml_paths, _ = _get_registry_yaml_extra("zai-org/GLM-4.7-Flash") - config = { - "yaml_extra": yaml_paths, - "skip_tokenizer_init": False, - "trust_remote_code": True, - "attn_backend": attn_backend, - "compile_backend": "torch-cudagraph", - "max_batch_size": 128, - "max_seq_len": self.MAX_SEQ_LEN, - "max_num_tokens": self.MAX_NUM_TOKENS, - "skip_loading_weights": False, - "disable_overlap_scheduler": False, - "cuda_graph_config": { - "batch_sizes": [1, 2, 4, 8, 16, 32, 64, 128] - }, - "kv_cache_config": { - "enable_block_reuse": False, - "free_gpu_memory_fraction": 0.8 - }, - "model_kwargs": { - "torch_dtype": "bfloat16" - } - } - if enable_chunked_prefill: - config["enable_chunked_prefill"] = True - config[ - "max_num_tokens"] = 512 # NOTE: must be > max(tokens_per_block, max_batch_size) - config.setdefault("transforms", {}) - config["transforms"]["compile_model"] = { - "piecewise_enabled": True, - } - else: - # Keep the original non-chunked variant behavior even when - # registry defaults enable chunked prefill. - config["enable_chunked_prefill"] = False + def get_default_kwargs(self): + config = _load_ad_config(self.CONFIG_YAML) + config["max_seq_len"] = self.MAX_SEQ_LEN + config["max_num_tokens"] = self.MAX_NUM_TOKENS return config def get_default_sampling_params(self): @@ -934,13 +914,11 @@ def get_default_sampling_params(self): @skip_pre_hopper @pytest.mark.skip_less_device_memory(80000) - @pytest.mark.parametrize("enable_chunked_prefill", [True, False]) - @pytest.mark.parametrize("attn_backend", ["flashinfer", "trtllm"]) - def test_auto_dtype(self, enable_chunked_prefill, attn_backend): - kwargs = self.get_default_kwargs(enable_chunked_prefill, attn_backend) + def test_auto_dtype(self): + kwargs = self.get_default_kwargs() sampling_params = self.get_default_sampling_params() - with AutoDeployLLM(model=self.MODEL_PATH_BF16, - tokenizer=self.MODEL_PATH_BF16, + model_path = hf_id_to_local_model_dir(self.MODEL_HF_ID_BF16) + with AutoDeployLLM(model=model_path, tokenizer=model_path, **kwargs) as llm: task = MMLU(self.MODEL_NAME) task.evaluate(llm, sampling_params=sampling_params) @@ -949,12 +927,11 @@ def test_auto_dtype(self, enable_chunked_prefill, attn_backend): @skip_pre_blackwell @pytest.mark.skip_less_device_memory(32000) - @pytest.mark.parametrize("enable_chunked_prefill", [True, False]) - def test_nvfp4(self, enable_chunked_prefill): - kwargs = self.get_default_kwargs(enable_chunked_prefill) + def test_nvfp4(self): + kwargs = self.get_default_kwargs() sampling_params = self.get_default_sampling_params() - with AutoDeployLLM(model=self.MODEL_PATH_NVFP4, - tokenizer=self.MODEL_PATH_NVFP4, + model_path = hf_id_to_local_model_dir(self.MODEL_HF_ID_NVFP4) + with AutoDeployLLM(model=model_path, tokenizer=model_path, **kwargs) as llm: # Manually set quant_config for NVFP4 model to get the accuracy threshold llm.args.quant_config.quant_algo = QuantAlgo.NVFP4 @@ -1251,7 +1228,7 @@ class TestGPTOSS(LlmapiAccuracyTestHarness): "reasoning_effort": "low", }, } - GSM8K_MAX_OUTPUT_LEN = 512 + GSM8K_MAX_OUTPUT_LEN = 8192 MODEL_PATHS = { "20b": f"{llm_models_root()}/gpt_oss/gpt-oss-20b", "120b": f"{llm_models_root()}/gpt_oss/gpt-oss-120b", @@ -1261,34 +1238,84 @@ class TestGPTOSS(LlmapiAccuracyTestHarness): pytest.param( "20b", "openai/gpt-oss-20b", - marks=pytest.mark.skip_less_device(2), + None, + None, id="20b", ), pytest.param( "120b", "openai/gpt-oss-120b", - marks=pytest.mark.skip_less_device(4), + None, + None, id="120b", ), + pytest.param( + "120b", + "openai/gpt-oss-120b", + 2, + "tp", + id="120b-tp2", + ), + pytest.param( + "120b", + "openai/gpt-oss-120b", + 2, + "ep", + id="120b-ep2", + ), ] - @pytest.mark.parametrize("model_id,model_name", MODEL_PARAMS) - def test_mxfp4_gsm8k(self, model_id, model_name, mocker): + @skip_pre_blackwell + @pytest.mark.skip_less_device(2) + @pytest.mark.parametrize( + "model_id,model_name,world_size_override,moe_topology", MODEL_PARAMS) + def test_mxfp4_gsm8k(self, model_id, model_name, world_size_override, + moe_topology, mocker): mocker.patch.object(GSM8K, "MAX_OUTPUT_LEN", self.GSM8K_MAX_OUTPUT_LEN) mocker.patch.dict(GSM8K.EVALUATE_KWARGS, {"scores_filter": "exact_match,flexible-extract"}) yaml_paths, registry_world_size = _get_registry_yaml_extra(model_name) - if get_device_count() < registry_world_size: + # world_size: yaml-driven; ``world_size_override`` is only used for + # MoE-TP / MoE-EP cases that exercise sharding on top of the same yaml. + world_size = (world_size_override if world_size_override is not None + else registry_world_size) + if get_device_count() < world_size: pytest.skip("Not enough devices for world size, skipping test") + # Override the default MoE topology via `apply_sharding_hints.dist_mapping`. + # The sharding invariants (`enabled`, `shard_layers: ["mha", "moe"]`, and + # `detect_sharding`/`sharding_transform_executor` disable) live in + # `gpt_oss.yaml`; here we only set the per-parametrize TP/EP mapping. + # `shard_layers=["mha","moe"]` (from yaml) lets the sharding pass wire up + # the MoE all_reduce inserted by ``QuantizeMXFP4MOE._apply_trtllm`` when + # tp_size > 1. + extra_kwargs = {} + if moe_topology is not None and world_size > 1: + if moe_topology == "tp": + moe_tp, moe_ep = world_size, 1 + elif moe_topology == "ep": + moe_tp, moe_ep = 1, world_size + else: + raise ValueError(f"unknown moe_topology={moe_topology!r}") + extra_kwargs["transforms"] = { + "apply_sharding_hints": { + "dist_mapping": { + "tp": world_size, + "moe_tp": moe_tp, + "moe_ep": moe_ep, + }, + }, + } + model_path = self.MODEL_PATHS[model_id] with AutoDeployLLM( model=model_path, tokenizer=model_path, - world_size=registry_world_size, + world_size=world_size, yaml_extra=yaml_paths, max_seq_len=GSM8K.MAX_INPUT_LEN + self.GSM8K_MAX_OUTPUT_LEN, + **extra_kwargs, ) as llm: task = GSM8K(model_name) task.evaluate(llm, diff --git a/tests/integration/defs/accuracy/test_llm_api_pytorch.py b/tests/integration/defs/accuracy/test_llm_api_pytorch.py index a56816ea4832..4a35e7643b8b 100644 --- a/tests/integration/defs/accuracy/test_llm_api_pytorch.py +++ b/tests/integration/defs/accuracy/test_llm_api_pytorch.py @@ -1081,155 +1081,6 @@ def test_fp8_chunked_prefill(self, cuda_graph, tp_size, pp_size, ep_size): task.evaluate(llm) -@pytest.mark.skip_less_device_memory(80000) -@pytest.mark.skip_less_host_memory(100000) -class TestLlama4ScoutInstruct(LlmapiAccuracyTestHarness): - MODEL_NAME = "meta-llama/Llama-4-Scout-17B-16E-Instruct" - - @skip_pre_hopper - @parametrize_with_ids("cuda_graph", [False, True]) - @pytest.mark.parametrize( - "tp_size,pp_size,ep_size", [(8, 1, 1), (8, 1, 4), (8, 1, 8), (4, 1, 1), - (4, 1, 2), (4, 1, 4)], - ids=["tp8", "tp8ep4", "tp8ep8", "tp4", "tp4ep2", "tp4ep4"]) - def test_auto_dtype(self, cuda_graph, tp_size, pp_size, ep_size): - if get_device_count() != tp_size * pp_size: - pytest.skip("Device count mismatch with world size") - - model_path = f"{llm_models_root()}/llama4-models/Llama-4-Scout-17B-16E-Instruct" - with LLM( - model_path, - tensor_parallel_size=tp_size, - # Keep this low to avoid warmup OOM in CI - max_seq_len=8192, - pipeline_parallel_size=pp_size, - moe_expert_parallel_size=ep_size, - cuda_graph_config=CudaGraphConfig() - if cuda_graph else None) as llm: - task = MMLU(self.MODEL_NAME) - task.evaluate(llm) - task = GSM8K(self.MODEL_NAME) - task.evaluate(llm) - - @skip_pre_hopper - @parametrize_with_ids("cuda_graph", [True]) - @pytest.mark.parametrize("tp_size,pp_size,ep_size", [(8, 1, 8), (4, 1, 1)], - ids=["tp8ep8", "tp4"]) - def test_fp8(self, cuda_graph, tp_size, pp_size, ep_size): - if get_device_count() != tp_size * pp_size: - pytest.skip("Device count mismatch with world size") - - model_path = f"{llm_models_root()}/llama4-models/Llama-4-Scout-17B-16E-Instruct-FP8" - with LLM( - model_path, - tensor_parallel_size=tp_size, - # Keep this low to avoid warmup OOM in CI - max_seq_len=8192, - pipeline_parallel_size=pp_size, - moe_expert_parallel_size=ep_size, - kv_cache_config=KvCacheConfig(free_gpu_memory_fraction=0.8), - cuda_graph_config=CudaGraphConfig() - if cuda_graph else None) as llm: - assert llm.args.quant_config.quant_algo == QuantAlgo.FP8 - task = MMLU(self.MODEL_NAME) - task.evaluate(llm) - task = GSM8K(self.MODEL_NAME) - task.evaluate(llm) - - @skip_pre_blackwell - @parametrize_with_ids("cuda_graph", [True]) - @pytest.mark.parametrize("tp_size,pp_size,ep_size", [(8, 1, 8), (4, 1, 1)], - ids=["tp8ep8", "tp4"]) - def test_fp4(self, cuda_graph, tp_size, pp_size, ep_size): - if get_device_count() != tp_size * pp_size: - pytest.skip("Device count mismatch with world size") - - model_path = f"{llm_models_root()}/llama4-models/Llama-4-Scout-17B-16E-Instruct-FP4" - with LLM( - model_path, - tensor_parallel_size=tp_size, - # Keep this low to avoid warmup OOM in CI - max_seq_len=8192, - pipeline_parallel_size=pp_size, - moe_expert_parallel_size=ep_size, - cuda_graph_config=CudaGraphConfig() - if cuda_graph else None) as llm: - assert llm.args.quant_config.quant_algo == QuantAlgo.NVFP4 - assert llm.args.quant_config.kv_cache_quant_algo == QuantAlgo.FP8 - task = MMLU(self.MODEL_NAME) - task.evaluate(llm) - task = GSM8K(self.MODEL_NAME) - task.evaluate(llm) - - @skip_pre_hopper - @pytest.mark.skip_less_mpi_world_size(4) - @parametrize_with_ids("cuda_graph", [True]) - @pytest.mark.parametrize("tp_size,pp_size,ep_size", [(4, 1, 4)], - ids=["tp4ep4"]) - def test_fp8_chunked_prefill(self, cuda_graph, tp_size, pp_size, ep_size): - with LLM( - f"{llm_models_root()}/llama4-models/Llama-4-Scout-17B-16E-Instruct-FP8", - tensor_parallel_size=tp_size, - max_seq_len=22000, - pipeline_parallel_size=pp_size, - moe_expert_parallel_size=ep_size, - enable_chunked_prefill=True, - max_num_tokens=256, - cuda_graph_config=CudaGraphConfig() - if cuda_graph else None) as llm: - assert llm.args.quant_config.quant_algo == QuantAlgo.FP8 - assert llm.args.quant_config.kv_cache_quant_algo == QuantAlgo.FP8 - task = MMLU(self.MODEL_NAME) - task.evaluate(llm) - task = GSM8K(self.MODEL_NAME) - task.evaluate(llm) - - @skip_pre_blackwell - @pytest.mark.skip_less_mpi_world_size(4) - @parametrize_with_ids("cuda_graph", [True]) - @pytest.mark.parametrize("tp_size,pp_size,ep_size", [(4, 1, 4)], - ids=["tp4ep4"]) - def test_fp4_chunked_prefill(self, cuda_graph, tp_size, pp_size, ep_size): - with LLM( - f"{llm_models_root()}/llama4-models/Llama-4-Scout-17B-16E-Instruct-FP4", - tensor_parallel_size=tp_size, - pipeline_parallel_size=pp_size, - moe_expert_parallel_size=ep_size, - max_seq_len=22000, - enable_chunked_prefill=True, - max_num_tokens=256, - cuda_graph_config=CudaGraphConfig() - if cuda_graph else None) as llm: - assert llm.args.quant_config.quant_algo == QuantAlgo.NVFP4 - assert llm.args.quant_config.kv_cache_quant_algo == QuantAlgo.FP8 - task = MMLU(self.MODEL_NAME) - task.evaluate(llm) - task = GSM8K(self.MODEL_NAME) - task.evaluate(llm) - - @skip_pre_hopper - @pytest.mark.skip_less_mpi_world_size(2) - def test_auto_dtype_tp2(self): - kv_cache_config = KvCacheConfig(free_gpu_memory_fraction=0.4) - _run_multinode_accuracy( - f"{llm_models_root()}/llama4-models/Llama-4-Scout-17B-16E-Instruct", - self.MODEL_NAME, - benchmarks=["mmlu"], - ep_size=2, - kv_cache_config=kv_cache_config) - - @skip_pre_hopper - @pytest.mark.skip_less_mpi_world_size(2) - def test_fp8_tp2(self): - kv_cache_config = KvCacheConfig(free_gpu_memory_fraction=0.4) - _run_multinode_accuracy( - f"{llm_models_root()}/llama4-models/Llama-4-Scout-17B-16E-Instruct-FP8", - self.MODEL_NAME, - benchmarks=["mmlu"], - ep_size=2, - kv_cache_config=kv_cache_config) - - class TestMistral7B(LlmapiAccuracyTestHarness): MODEL_NAME = "mistralai/Mistral-7B-v0.1" MODEL_PATH = f"{llm_models_root()}/mistral-7b-v0.1" @@ -4091,6 +3942,7 @@ def test_auto_dtype_tp8(self): with LLM(self.MODEL_PATH, tensor_parallel_size=8, kv_cache_config=kv_cache_config, + trust_remote_code=True, **pytorch_config) as llm: task = CnnDailymail(self.MODEL_NAME) @@ -6253,7 +6105,14 @@ def test_fp8(self, enable_block_reuse, mocker): kv_cache_config = KvCacheConfig(free_gpu_memory_fraction=0.8, enable_block_reuse=enable_block_reuse) - moe_config = MoeConfig(backend='DEEPGEMM') + # DeepGEMM MoE kernels only support datacenter Blackwell (SM100/SM103). + # Fall back to the CUTLASS MoE backend (which supports FP8 block scales) + # on other architectures such as Hopper (SM90) and consumer Blackwell + # (SM120/SM121); otherwise the unsupported kernel trips a scale-factor + # dtype assertion at warmup. + moe_backend = "DEEPGEMM" if get_sm_version() in (100, + 103) else "CUTLASS" + moe_config = MoeConfig(backend=moe_backend) cuda_graph_config = CudaGraphConfig(enable_padding=True, max_batch_size=128) with LLM(model_dir, @@ -6272,6 +6131,47 @@ def test_fp8(self, enable_block_reuse, mocker): task.evaluate(llm, extra_evaluator_kwargs=self.EXTRA_EVALUATOR_KWARGS) + @skip_pre_hopper + def test_fp8_moe_dflash(self, mocker): + # Covers DFlash speculative decoding on the Qwen3.5 FP8 MoE variant, + # which combines GDN linear attention + m-RoPE + MoE. See https://nvbugs/6140226. + target_model_path = f"{llm_models_root()}/Qwen3.5-35B-A3B-FP8" + dflash_model_path = f"{llm_models_root()}/Qwen3.5-35B-A3B-DFlash" + if not os.path.exists(target_model_path) or not os.path.exists( + dflash_model_path): + pytest.skip("Qwen3.5-35B-A3B FP8 target or DFlash draft model " + "directory does not exist") + + kv_cache_config = KvCacheConfig(free_gpu_memory_fraction=0.8, + enable_block_reuse=False) + cuda_graph_config = CudaGraphConfig(enable_padding=True, + max_batch_size=8) + # DEEPGEMM FP8-block-scale MoE is Blackwell-only (UE8M0 packed scale + # layout); fall back to CUTLASS on Hopper. + moe_config = MoeConfig( + backend="DEEPGEMM" if get_sm_version() >= 100 else "CUTLASS") + spec_config = DFlashDecodingConfig(max_draft_len=4, + speculative_model=dflash_model_path) + + with LLM(target_model_path, + trust_remote_code=True, + tensor_parallel_size=1, + moe_expert_parallel_size=1, + max_seq_len=4096, + max_batch_size=8, + enable_chunked_prefill=True, + kv_cache_config=kv_cache_config, + cuda_graph_config=cuda_graph_config, + moe_config=moe_config, + speculative_config=spec_config) as llm: + assert llm.args.quant_config.quant_algo == QuantAlgo.FP8_BLOCK_SCALES + assert llm.args.speculative_config.decoding_type == 'DFlash' + mocker.patch.object(GSM8K, "MAX_OUTPUT_LEN", + self.GSM8K_MAX_OUTPUT_LEN) + task = GSM8K(self.MODEL_NAME) + task.evaluate(llm, + extra_evaluator_kwargs=self.EXTRA_EVALUATOR_KWARGS) + class TestQwen3_5_9B(LlmapiAccuracyTestHarness): MODEL_NAME = "Qwen/Qwen3.5-9B" @@ -6816,6 +6716,35 @@ def test_auto_dtype_4gpus(self, tp_size, ep_size, attention_dp, task.evaluate(llm, extra_evaluator_kwargs=self.EXTRA_EVALUATOR_KWARGS) + @skip_pre_blackwell + @pytest.mark.skip_less_device_memory(80000) + @pytest.mark.skip_less_mpi_world_size(4) + @parametrize_with_ids("attention_dp", [False, True]) + def test_bf16_trtllm_gen_moe_backend(self, attention_dp): + + kv_cache_config = KvCacheConfig(enable_block_reuse=False, + mamba_ssm_cache_dtype="float32") + pytorch_config = dict(disable_overlap_scheduler=False, + cuda_graph_config=CudaGraphConfig( + max_batch_size=32, enable_padding=True)) + + with LLM( + f"{llm_models_root()}/NVIDIA-Nemotron-3-Super-120B-A12B-BF16", + kv_cache_config=kv_cache_config, + max_batch_size=32, + tensor_parallel_size=4, + moe_expert_parallel_size=4, + enable_attention_dp=attention_dp, + moe_config=MoeConfig(backend="TRTLLM"), + **pytorch_config, + ) as llm: + task = MMLU(self.MODEL_NAME) + task.evaluate(llm, + extra_evaluator_kwargs=self.EXTRA_EVALUATOR_KWARGS) + task = GSM8K(self.MODEL_NAME) + task.evaluate(llm, + extra_evaluator_kwargs=self.EXTRA_EVALUATOR_KWARGS) + def _run_nvfp4_4gpus_eplb(self, moe_backend, eplb_config, model_path): kv_cache_config = KvCacheConfig( enable_block_reuse=False, @@ -7480,10 +7409,9 @@ def test_fp8_block_scales(self, tp_size, ep_size, mtp_nextn): @skip_pre_blackwell @pytest.mark.skip_less_device(4) @pytest.mark.skip_less_device_memory(80000) + @parametrize_with_ids("mtp_nextn", [0, 3]) @parametrize_with_ids("tp_size,ep_size", [(4, 4)]) - def test_nvfp4(self, tp_size, ep_size): - # The NVFP4 export does not ship MTP weights, so this checkpoint is only - # exercised without speculative decoding (unlike the FP8/BF16 ones). + def test_nvfp4(self, tp_size, ep_size, mtp_nextn): model_path = f"{llm_models_root()}/Step-3.7-Flash-NVFP4" kv_cache_config = KvCacheConfig(free_gpu_memory_fraction=0.7, use_kv_cache_manager_v2=True) @@ -7493,12 +7421,17 @@ def test_nvfp4(self, tp_size, ep_size): moe_config=MoeConfig(backend="TRTLLM"), ) + mtp_config = None + if mtp_nextn > 0: + mtp_config = MTPDecodingConfig(max_draft_len=mtp_nextn) + with LLM(model_path, tensor_parallel_size=tp_size, moe_expert_parallel_size=ep_size, kv_cache_config=kv_cache_config, max_seq_len=8192, attn_backend="TRTLLM", + speculative_config=mtp_config, trust_remote_code=True, **pytorch_config) as llm: assert llm.args.quant_config.quant_algo == QuantAlgo.NVFP4 diff --git a/tests/integration/defs/accuracy/test_llm_api_pytorch_multimodal.py b/tests/integration/defs/accuracy/test_llm_api_pytorch_multimodal.py index 4e248a59e1ff..fe2177927b4b 100644 --- a/tests/integration/defs/accuracy/test_llm_api_pytorch_multimodal.py +++ b/tests/integration/defs/accuracy/test_llm_api_pytorch_multimodal.py @@ -16,12 +16,19 @@ from tensorrt_llm import LLM from tensorrt_llm.evaluate.post_processing import strip_thinking_and_extract_mmmu_answer -from tensorrt_llm.llmapi import CudaGraphConfig, KvCacheConfig, MoeConfig, SamplingParams +from tensorrt_llm.llmapi import ( + CudaGraphConfig, + KvCacheConfig, + MoeConfig, + MTPDecodingConfig, + SamplingParams, +) from tensorrt_llm.quantization import QuantAlgo from ..conftest import ( get_sm_version, llm_models_root, + parametrize_with_ids, skip_post_blackwell_ultra, skip_pre_blackwell, skip_pre_hopper, @@ -251,6 +258,7 @@ def test_auto_dtype(self, enable_chunked_prefill, max_num_tokens): enable_chunked_prefill=enable_chunked_prefill, max_num_tokens=max_num_tokens, kv_cache_config=self.kv_cache_config, + trust_remote_code=True, ) as llm: task = MMMU(self.MODEL_NAME) task.evaluate( @@ -771,12 +779,15 @@ class TestStep3_7(LlmapiAccuracyTestHarness): use_kv_cache_manager_v2=True, ) - def _make_llm(self, model_path: str): + def _make_llm(self, model_path: str, mtp_nextn: int = 0): pytorch_config = dict( disable_overlap_scheduler=False, cuda_graph_config=CudaGraphConfig(enable_padding=False), moe_config=MoeConfig(backend="TRTLLM"), ) + mtp_config = None + if mtp_nextn > 0: + mtp_config = MTPDecodingConfig(max_draft_len=mtp_nextn) return LLM( model_path, tensor_parallel_size=4, @@ -784,14 +795,16 @@ def _make_llm(self, model_path: str): kv_cache_config=self.kv_cache_config, max_seq_len=8192, attn_backend="TRTLLM", + speculative_config=mtp_config, trust_remote_code=True, **pytorch_config, ) @pytest.mark.skip_less_device(4) @pytest.mark.skip_less_device_memory(80000) - def test_fp8_block_scales(self): - with self._make_llm(f"{llm_models_root()}/Step-3.7-Flash-FP8") as llm: + @parametrize_with_ids("mtp_nextn", [0, 3]) + def test_fp8_block_scales(self, mtp_nextn): + with self._make_llm(f"{llm_models_root()}/Step-3.7-Flash-FP8", mtp_nextn=mtp_nextn) as llm: assert llm.args.quant_config.quant_algo == QuantAlgo.FP8_BLOCK_SCALES task = MMMU(self.MODEL_NAME) task.evaluate( @@ -803,8 +816,11 @@ def test_fp8_block_scales(self): @skip_pre_blackwell @pytest.mark.skip_less_device(4) @pytest.mark.skip_less_device_memory(80000) - def test_nvfp4(self): - with self._make_llm(f"{llm_models_root()}/Step-3.7-Flash-NVFP4") as llm: + @parametrize_with_ids("mtp_nextn", [0, 3]) + def test_nvfp4(self, mtp_nextn): + with self._make_llm( + f"{llm_models_root()}/Step-3.7-Flash-NVFP4", mtp_nextn=mtp_nextn + ) as llm: assert llm.args.quant_config.quant_algo == QuantAlgo.NVFP4 task = MMMU(self.MODEL_NAME) task.evaluate( diff --git a/tests/integration/defs/disaggregated/test_ad_disagg.py b/tests/integration/defs/disaggregated/test_ad_disagg.py new file mode 100644 index 000000000000..c74a38316066 --- /dev/null +++ b/tests/integration/defs/disaggregated/test_ad_disagg.py @@ -0,0 +1,1043 @@ +# SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. +# SPDX-License-Identifier: Apache-2.0 +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. + +import asyncio +import os +import pickle +import sys +import traceback +import uuid +from contextlib import ExitStack, contextmanager +from dataclasses import replace + +import cloudpickle +import pytest +import torch +from defs.conftest import get_sm_version, skip_pre_hopper +from mpi4py import MPI +from mpi4py.futures import MPIPoolExecutor + +from tensorrt_llm import DisaggregatedParams, SamplingParams +from tensorrt_llm._torch.auto_deploy import LLM as AutoDeployLLM +from tensorrt_llm._utils import set_mpi_comm +from tensorrt_llm.llmapi import Eagle3DecodingConfig + +cloudpickle.register_pickle_by_value(sys.modules[__name__]) +MPI.pickle.__init__( + cloudpickle.dumps, + cloudpickle.loads, + pickle.HIGHEST_PROTOCOL, +) + +WORKER_READY = "ready" +REQUEST_MODE_AGGREGATE = "aggregate" +MPI_REQUEST = 9999 +MPI_RESULT = MPI_REQUEST + 1 +OMPI_COMM_WORLD_ENV_KEYS = ( + "OMPI_COMM_WORLD_SIZE", + "OMPI_COMM_WORLD_RANK", + "OMPI_COMM_WORLD_LOCAL_SIZE", + "OMPI_COMM_WORLD_LOCAL_RANK", + "OMPI_COMM_WORLD_NODE_RANK", + "OMPI_UNIVERSE_SIZE", +) +AUTODEPLOY_DISAGG_SEED = 1234 +REDUCED_TINYLLAMA_LAYERS = 2 +REDUCED_DEEPSEEK_LAYERS = 2 +LLAMA_EAGLE3_EXPECTED_TEXT = " Berlin\nWhat is the capital of France? Paris\nWhat is the capital of" +LLAMA_EAGLE3_EXPECTED_TOKEN_IDS = [ + 20437, + 198, + 3923, + 374, + 279, + 6864, + 315, + 9822, + 30, + 12366, + 198, + 3923, + 374, + 279, + 6864, + 315, +] + + +MODEL_PATHS = { + "EAGLE3-LLaMA3.1-Instruct-8B": "EAGLE3-LLaMA3.1-Instruct-8B", + "Llama-3.1-8B-Instruct": "llama-3.1-model/Llama-3.1-8B-Instruct/", + "TinyLlama-1.1B-Chat-v1.0": "llama-models-v2/TinyLlama-1.1B-Chat-v1.0", + "DeepSeek-V3-Lite": "DeepSeek-V3-Lite/bf16", +} + + +def model_path(model_name): + llm_models_root = os.environ["LLM_MODELS_ROOT"] + for name, path in MODEL_PATHS.items(): + if name in model_name: + return os.path.join(llm_models_root, path) + raise ValueError(f"Unknown model: {model_name}") + + +def response_summary(response): + """Summarize values returned by AutoDeploy test workers. + + Inputs: + response: Payload from an AutoDeploy worker. It can be a formatted exception + string or a list of normal LLM output objects. + + Outputs: + A string representing the input response. + + This is useful because subprocess workers send results through MPI, so + assertion failures otherwise lose the key fields + needed to debug the disaggregated handoff: generated text/tokens, request + type, context request id, draft-token count, and logits shape when present. + """ + if isinstance(response, str): + return f"error={response}" + if isinstance(response, list) and response and hasattr(response[0], "token_ids"): + summaries = [] + for idx, output in enumerate(response): + disaggregated_params = output.disaggregated_params + if disaggregated_params is None: + request_type = REQUEST_MODE_AGGREGATE + ctx_request_id = None + else: + request_type = disaggregated_params.request_type + ctx_request_id = disaggregated_params.ctx_request_id + draft_tokens = ( + len(disaggregated_params.draft_tokens) + if disaggregated_params is not None + and disaggregated_params.draft_tokens is not None + else 0 + ) + logits = output.generation_logits + logits_shape = tuple(logits.shape) if logits is not None else None + summaries.append( + f"{idx}: text={output.text!r}, token_ids={output.token_ids}, " + f"disagg_type={request_type}, ctx_request_id={ctx_request_id}, " + f"draft_tokens={draft_tokens}, logits_shape={logits_shape}" + ) + return "[" + "; ".join(summaries) + "]" + return repr(response) + + +def seed_disagg(): + torch.manual_seed(AUTODEPLOY_DISAGG_SEED) + if torch.cuda.is_available(): + torch.cuda.manual_seed_all(AUTODEPLOY_DISAGG_SEED) + + +def base_config(extra_config=None): + common_config = dict( + runtime="trtllm", + attn_backend="trtllm", + max_batch_size=4, + max_seq_len=2048, + max_num_tokens=512, + trust_remote_code=True, + kv_cache_config={"max_tokens": 2048}, + compile_backend="torch-cudagraph", + cuda_graph_config={"batch_sizes": [1, 2, 4]}, + ) + if extra_config: + common_config.update(extra_config) + + return common_config + + +def disagg_config(extra_config=None): + return dict( + base_config(extra_config), + cache_transceiver_config={"backend": "DEFAULT"}, + ) + + +def context_config(extra_config=None): + # Context-only transfer happens after the request completes its context phase, + # so keep the context worker on the non-overlap scheduling path. + return dict( + disagg_config(extra_config), + disable_overlap_scheduler=True, + ) + + +def generation_config(generation_overlap, extra_config=None): + config = disagg_config(extra_config) + if not generation_overlap: + config["disable_overlap_scheduler"] = True + + return config + + +def single_output(response): + if isinstance(response, str): + raise RuntimeError(response) + if not isinstance(response, list) or not response: + raise RuntimeError(f"Expected a non-empty output list, got {response_summary(response)}") + return response[0] + + +def first_output(responses): + if len(responses) != 1: + raise RuntimeError(f"Expected one response, got {response_summary(responses)}") + return single_output(responses[0]) + + +def generation_params_from_context(context_output): + context_params = context_output.disaggregated_params + if context_params is None: + raise RuntimeError( + f"Context output has no disaggregated params: {response_summary([context_output])}" + ) + return replace(context_params, request_type="generation_only") + + +def has_draft_tokens(output): + params = output.disaggregated_params + return params is not None and params.draft_tokens is not None and len(params.draft_tokens) > 0 + + +def has_handoff_transport_metadata(params): + # C++ transceiver carries handoff state in opaque_state; Python/native + # transceiver carries the context endpoint in ctx_info_endpoint. + return params.opaque_state is not None or params.ctx_info_endpoint is not None + + +def run_aggregate_generation( + model, + world_size, + prompt, + sampling_params_kwargs=None, + extra_config=None, +): + """Run one non-disaggregated AutoDeploy generation request.""" + if sampling_params_kwargs is None: + sampling_params_kwargs = {"max_tokens": 25, "ignore_eos": True} + + seed_disagg() + with AutoDeployLLM( + model=model_path(model), + world_size=world_size, + **base_config(extra_config), + ) as llm: + seed_disagg() + result = llm.generate( + prompt, + sampling_params=SamplingParams(**sampling_params_kwargs), + use_tqdm=False, + ) + + output = result.outputs[0] + print(f"[AD DISAGG TEST] aggregate output: {response_summary([output])}") + return output + + +# --------------------------------------------------------------------------- +# Sequential live-pair tests. +# +# These tests run context-only and generation-only AutoDeploy instances in one +# process, one after the other, while keeping the context instance alive for +# the generation handoff. They usually run in the 1-GPU stage. Unlike the unit +# smoke tests, these load real weights. Keep exact output comparisons to +# single-request cases; batched handoff uses semantic slot checks because IFB can +# make multi-request generation differ from aggregate output even when handoff is +# correct. +# --------------------------------------------------------------------------- + + +def reduced_tinyllama_config(extra_config=None): + config = { + "model_kwargs": {"num_hidden_layers": REDUCED_TINYLLAMA_LAYERS}, + "max_batch_size": 4, + "max_seq_len": 512, + "max_num_tokens": 256, + "kv_cache_config": {"max_tokens": 1024}, + } + if extra_config: + config.update(extra_config) + return config + + +def reduced_deepseek_v3_mla_config(): + return { + "model_kwargs": {"num_hidden_layers": REDUCED_DEEPSEEK_LAYERS}, + "max_batch_size": 4, + "max_seq_len": 512, + "max_num_tokens": 256, + "kv_cache_config": {"max_tokens": 1024, "free_gpu_memory_fraction": 0.05}, + "transforms": { + "insert_cached_mla_attention": {"backend": "trtllm_mla"}, + "fuse_rope_into_trtllm_mla": {"enabled": True}, + "multi_stream_mla_attn": {"stage": "compile", "enabled": False}, + }, + } + + +def long_context_prompt(): + return ( + "TensorRT-LLM disaggregated serving separates context prefill from token generation. " + "The context worker computes the prompt KV cache, sends the cache state to the " + "generation worker, and returns the first generated token metadata. " + ) + + +def capital_completion_prompts(): + return [ + "The capital of Germany is", + "The capital of France is", + "The capital of Italy is", + "The capital of Spain is", + ] + + +def assert_context_handoff_metadata(context_output, expect_logits=False): + context_params = context_output.disaggregated_params + assert context_params is not None + assert context_params.request_type == "context_only" + assert len(context_output.token_ids) == 1 + assert context_params.ctx_request_id is not None + assert context_params.first_gen_tokens is not None + if expect_logits: + assert context_params.first_gen_logits is not None + assert has_handoff_transport_metadata(context_params) + + +def run_sequential_handoff( + model, + generation_overlap, + prompt, + sampling_params_kwargs=None, + extra_config=None, +): + if sampling_params_kwargs is None: + sampling_params_kwargs = {"max_tokens": 25, "ignore_eos": True} + + model_name = model_path(model) + with AutoDeployLLM( + model=model_name, + world_size=1, + **context_config(extra_config), + ) as context_llm: + seed_disagg() + context_output = context_llm.generate( + prompt, + sampling_params=SamplingParams(**sampling_params_kwargs), + disaggregated_params=DisaggregatedParams(request_type="context_only"), + use_tqdm=False, + ).outputs[0] + print(f"[AD DISAGG TEST] context output: {response_summary([context_output])}") + generation_params = generation_params_from_context(context_output) + + # Keep the context-side sender alive while generation consumes the + # handoff params. + with AutoDeployLLM( + model=model_name, + world_size=1, + **generation_config(generation_overlap, extra_config), + ) as generation_llm: + seed_disagg() + generation_output = generation_llm.generate( + prompt, + sampling_params=SamplingParams(**sampling_params_kwargs), + disaggregated_params=generation_params, + use_tqdm=False, + ).outputs[0] + print(f"[AD DISAGG TEST] generation output: {response_summary([generation_output])}") + + return { + "context": context_output, + "generation": generation_output, + } + + +async def run_async_requests(llm, prompts, sampling_params_kwargs, disaggregated_params): + futures = [] + for prompt, params in zip(prompts, disaggregated_params, strict=True): + seed_disagg() + futures.append( + llm.generate_async( + prompt, + sampling_params=SamplingParams(**sampling_params_kwargs), + disaggregated_params=params, + ) + ) + + outputs = [] + for future in futures: + result = await future + outputs.append(result.outputs[0]) + return outputs + + +def run_sequential_batch_handoff( + model, + generation_overlap, + prompts, + sampling_params_kwargs=None, + extra_config=None, +): + if sampling_params_kwargs is None: + sampling_params_kwargs = {"max_tokens": 25, "ignore_eos": True} + + model_name = model_path(model) + context_params = [DisaggregatedParams(request_type="context_only") for _ in range(len(prompts))] + with AutoDeployLLM( + model=model_name, + world_size=1, + **context_config(extra_config), + ) as context_llm: + context_outputs = asyncio.run( + run_async_requests(context_llm, prompts, sampling_params_kwargs, context_params) + ) + print(f"[AD DISAGG TEST] context batch output: {response_summary(context_outputs)}") + generation_params = [ + generation_params_from_context(context_output) for context_output in context_outputs + ] + + # Submit all generation-only requests before awaiting them so this + # remains a batch slot-transfer test while avoiding the async queue + # infrastructure used by the multi-GPU tests. + with AutoDeployLLM( + model=model_name, + world_size=1, + **generation_config(generation_overlap, extra_config), + ) as generation_llm: + generation_outputs = asyncio.run( + run_async_requests( + generation_llm, + prompts, + sampling_params_kwargs, + generation_params, + ) + ) + print( + f"[AD DISAGG TEST] generation batch output: {response_summary(generation_outputs)}" + ) + + return { + "context": context_outputs, + "generation": generation_outputs, + } + + +def reduced_model_config(model, extra_config=None): + if "DeepSeek-V3-Lite" in model: + config = reduced_deepseek_v3_mla_config() + else: + config = reduced_tinyllama_config() + if extra_config: + config.update(extra_config) + return config + + +def reduced_model_cases(): + return [ + pytest.param( + "TinyLlama-1.1B-Chat-v1.0", + id="tinyllama", + ), + pytest.param( + "DeepSeek-V3-Lite", + id="deepseek_v3_mla", + marks=skip_pre_hopper, + ), + ] + + +@pytest.mark.parametrize( + "model", + reduced_model_cases(), +) +@pytest.mark.skip_less_device_memory(30000) +@pytest.mark.timeout(600) +def test_reduced_layer_handoff_matches_aggregate(model): + """Check single-request disaggregated handoff matches aggregate generation.""" + prompt = "What is the capital of Germany?" + sampling_params_kwargs = { + "max_tokens": 8, + "ignore_eos": True, + "top_k": 1, + "seed": AUTODEPLOY_DISAGG_SEED, + } + extra_config = reduced_model_config(model) + # Keep real weights loaded, but reduce the decoder stack so this still + # exercises the model-specific attention/cache path without full-model cost. + aggregate_output = run_aggregate_generation( + model, + world_size=1, + prompt=prompt, + sampling_params_kwargs=sampling_params_kwargs, + extra_config=extra_config, + ) + outputs = run_sequential_handoff( + model, + generation_overlap=True, + prompt=prompt, + sampling_params_kwargs=sampling_params_kwargs, + extra_config=extra_config, + ) + + context_output = outputs["context"] + generation_output = outputs["generation"] + assert_context_handoff_metadata(context_output) + assert context_output.token_ids == aggregate_output.token_ids[:1] + assert generation_output.text == aggregate_output.text + assert generation_output.token_ids == aggregate_output.token_ids + + +@pytest.mark.parametrize( + "model", + reduced_model_cases(), +) +@pytest.mark.skip_less_device_memory(30000) +@pytest.mark.timeout(600) +def test_disaggregated_logits(model): + # Keep weighted but reduced layers so the test focuses on logits + # transfer/equality rather than full-model compile and memory cost. + extra_config = reduced_model_config(model, {"gather_generation_logits": True}) + sampling_params_kwargs = { + "max_tokens": 10, + "ignore_eos": True, + "return_generation_logits": True, + } + prompt = "What is the capital of Germany?" + aggregate_output = run_aggregate_generation( + model, + world_size=1, + prompt=prompt, + sampling_params_kwargs=sampling_params_kwargs, + extra_config=extra_config, + ) + outputs = run_sequential_handoff( + model, + generation_overlap=True, + prompt=prompt, + sampling_params_kwargs=sampling_params_kwargs, + extra_config=extra_config, + ) + + context_output = outputs["context"] + generation_output = outputs["generation"] + assert_context_handoff_metadata(context_output, expect_logits=True) + assert context_output.token_ids == aggregate_output.token_ids[:1] + assert generation_output.text == aggregate_output.text + assert generation_output.token_ids == aggregate_output.token_ids + assert aggregate_output.generation_logits is not None + assert generation_output.generation_logits is not None + assert aggregate_output.generation_logits.shape == generation_output.generation_logits.shape + # The MLA generation worker reconstructs logits from the compressed KV latent + # through a different kernel/batching path than the single aggregate pass, so + # bf16 rounding yields ~1-ULP logit differences. Use a looser tolerance for the + # MLA (DeepSeek) case; MHA (tinyllama) stays tight. The functional checks above + # (text/token_ids equality) remain strict for both. + if "DeepSeek-V3-Lite" in model: + rtol, atol = 1e-1, 1e-1 + else: + rtol, atol = 1e-2, 1e-2 + torch.testing.assert_close( + generation_output.generation_logits, + aggregate_output.generation_logits, + rtol=rtol, + atol=atol, + ) + + +@pytest.mark.skip_less_device_memory(30000) +@pytest.mark.timeout(600) +def test_tinyllama_batch_handoff_semantic_slots(): + prompts = capital_completion_prompts() + expected_capitals = ["Berlin", "Paris", "Rome", "Madrid"] + sampling_params_kwargs = { + "max_tokens": 12, + "ignore_eos": True, + "top_k": 1, + "seed": AUTODEPLOY_DISAGG_SEED, + } + outputs = run_sequential_batch_handoff( + "TinyLlama-1.1B-Chat-v1.0", + generation_overlap=True, + prompts=prompts, + sampling_params_kwargs=sampling_params_kwargs, + ) + + for expected_capital, context_output, generation_output in zip( + expected_capitals, outputs["context"], outputs["generation"], strict=True + ): + assert_context_handoff_metadata(context_output) + assert expected_capital.lower() in generation_output.text.lower(), response_summary( + outputs["generation"] + ) + + +@pytest.mark.parametrize( + "model", + reduced_model_cases(), +) +@pytest.mark.skip_less_device_memory(30000) +@pytest.mark.timeout(600) +def test_chunked_prefill_handoff(model): + # Chunked prefill needs real weights for aggregate-vs-disaggregated + # comparison, but not a full decoder stack. Use reduced layers so the test + # focuses on chunk-boundary handoff behavior with cuda graph enabled. + extra_config = reduced_model_config( + model, + { + "enable_chunked_prefill": True, + "max_num_tokens": 96, + }, + ) + prompt = long_context_prompt() * 4 + sampling_params_kwargs = {"max_tokens": 8, "ignore_eos": True} + aggregate_output = run_aggregate_generation( + model, + world_size=1, + prompt=prompt, + sampling_params_kwargs=sampling_params_kwargs, + extra_config=extra_config, + ) + outputs = run_sequential_handoff( + model, + generation_overlap=True, + prompt=prompt, + sampling_params_kwargs=sampling_params_kwargs, + extra_config=extra_config, + ) + + context_output = outputs["context"] + generation_output = outputs["generation"] + assert_context_handoff_metadata(context_output) + assert generation_output.token_ids + assert context_output.token_ids == aggregate_output.token_ids[:1] + assert generation_output.text == aggregate_output.text + assert generation_output.token_ids == aggregate_output.token_ids + + +# --------------------------------------------------------------------------- +# Async MPI worker tests. +# +# These tests launch separate context and generation worker processes and pass +# requests through an MPI intercommunicator. They are closer to the real +# disaggregated deployment shape because context and generation models can live on +# different GPUs, and some cases shard each worker across multiple GPUs. +# --------------------------------------------------------------------------- + + +def llama_eagle3_config(): + return { + "speculative_config": Eagle3DecodingConfig( + max_draft_len=3, + speculative_model=model_path("EAGLE3-LLaMA3.1-Instruct-8B"), + eagle3_one_model=True, + eagle3_layers_to_capture={1, 15, 28}, + ), + # Force the Eagle3 draft to match the BF16 Llama 3.1 target. Shared KV + # cache management requires matching target and draft KV dtypes. + "speculative_model_kwargs": {"torch_dtype": "bfloat16"}, + } + + +def get_ucx_tls(): + if get_sm_version() < 90: + return "^cuda_ipc,ib,gdr_copy" + return "^ib,gdr_copy" + + +def worker_cuda_devices(worker_world_sizes, visible_devices): + required_devices = sum(worker_world_sizes) + if visible_devices: + devices = [device.strip() for device in visible_devices.split(",") if device.strip()] + if len(devices) < required_devices: + pytest.skip( + f"AutoDeploy disaggregated world sizes {worker_world_sizes} require " + f"{required_devices} visible GPUs, got {len(devices)}" + ) + else: + devices = [str(device) for device in range(required_devices)] + + cuda_visible_devices = [] + start = 0 + for world_size in worker_world_sizes: + end = start + world_size + cuda_visible_devices.append(",".join(devices[start:end])) + start = end + return cuda_visible_devices + + +def worker_error(error): + return f"{type(error).__name__}: {error}\n{traceback.format_exc()}" + + +def isolate_ad_worker_from_outer_mpi(): + """Hide pytest's MPI transport from AutoDeploy's distributed init.""" + rank = MPI.COMM_WORLD.Get_rank() + ad_comm = MPI.COMM_WORLD.Split(color=rank, key=0) + set_mpi_comm(ad_comm) + for key in OMPI_COMM_WORLD_ENV_KEYS: + os.environ.pop(key, None) + return ad_comm + + +async def run_worker( + config, + model_name, + world_size, + cuda_visible_devices, + service_name, +): + os.environ["CUDA_VISIBLE_DEVICES"] = cuda_visible_devices + os.environ.setdefault("UCX_TLS", get_ucx_tls()) + os.environ.setdefault("UCX_MM_ERROR_HANDLING", "y") + + intercomm = MPI.COMM_WORLD.Connect(MPI.Lookup_name(service_name)) + ad_comm = isolate_ad_worker_from_outer_mpi() + try: + seed_disagg() + with AutoDeployLLM( + model=model_name, + world_size=world_size, + **config, + ) as llm: + intercomm.send(WORKER_READY, dest=0, tag=MPI_RESULT) + while True: + requests = intercomm.recv(source=0, tag=MPI_REQUEST) + if requests is None: + break + + futures = [] + for request in requests: + seed_disagg() + try: + result = llm.generate_async( + request[0], + sampling_params=request[1], + disaggregated_params=request[2], + ) + futures.append(result) + except Exception as e: + intercomm.send(worker_error(e), dest=0, tag=MPI_RESULT) + + for result in futures: + try: + output = await result + intercomm.send(output.outputs, dest=0, tag=MPI_RESULT) + except Exception as e: + intercomm.send(worker_error(e), dest=0, tag=MPI_RESULT) + except Exception as e: + intercomm.send(worker_error(e), dest=0, tag=MPI_RESULT) + raise + finally: + intercomm.Disconnect() + ad_comm.Free() + + +def worker_entry_point( + config, + model_name, + world_size, + cuda_visible_devices, + service_name, +): + return asyncio.run( + run_worker( + config, + model_name, + world_size, + cuda_visible_devices, + service_name, + ) + ) + + +def mpi_publish_name(): + service_name = f"ad_disagg_{uuid.uuid4()}" + port_name = MPI.Open_port() + MPI.Publish_name(service_name, port_name) + return service_name, port_name + + +def send_requests_to_worker(requests, worker_rank, intercomms): + intercomm = intercomms[worker_rank] + intercomm.send(requests, dest=0, tag=MPI_REQUEST) + responses = [] + for _ in range(len(requests)): + responses.append(intercomm.recv(source=0, tag=MPI_RESULT)) + return responses + + +@contextmanager +def worker_pool(worker_configs, model_names, world_sizes): + """Start async MPI workers and always tear them down after the test body. + + MPI cloudpickle serialization keeps worker callables by value, so CI workers + do not re-import this pytest module from the source checkout before the + installed TensorRT-LLM wheel is on the import path. + """ + if len(worker_configs) != len(model_names) or len(model_names) != len(world_sizes): + raise ValueError("worker_configs, model_names, and world_sizes must have the same length") + visible_devices = os.environ.get("CUDA_VISIBLE_DEVICES") + cuda_visible_devices = worker_cuda_devices(world_sizes, visible_devices) + services = [mpi_publish_name() for _ in world_sizes] + futures = [] + intercomms = [] + with ExitStack() as stack: + try: + for ( + config, + model_name, + world_size, + worker_cuda_visible_devices, + (service_name, _), + ) in zip( + worker_configs, + model_names, + world_sizes, + cuda_visible_devices, + services, + strict=True, + ): + executor = stack.enter_context( + MPIPoolExecutor( + max_workers=1, + path=sys.path, + env={ + "UCX_TLS": get_ucx_tls(), + "UCX_MM_ERROR_HANDLING": "y", + }, + ) + ) + futures.append( + executor.submit( + worker_entry_point, + config, + model_name, + world_size, + worker_cuda_visible_devices, + service_name, + ) + ) + + for _, port_name in services: + intercomms.append(MPI.COMM_SELF.Accept(port_name)) + for intercomm in intercomms: + ready_response = intercomm.recv(source=0, tag=MPI_RESULT) + if ready_response != WORKER_READY: + raise RuntimeError( + f"Unexpected AutoDeploy worker startup response: {ready_response}" + ) + yield intercomms + finally: + for intercomm in intercomms: + intercomm.send(None, dest=0, tag=MPI_REQUEST) + intercomm.Disconnect() + for service_name, port_name in services: + MPI.Unpublish_name(service_name, port_name) + MPI.Close_port(port_name) + for future in futures: + future.result() + + +def run_context_then_generation_handoff( + model, + worker_world_sizes, + generation_overlap, + prompt, + sampling_params_kwargs=None, + extra_config=None, +): + """Run one AutoDeploy disaggregated context-to-generation handoff. + + This launches a context worker and a generation worker. It sends one + context-only request to the context worker, turns the returned + ``DisaggregatedParams`` into a generation-only request, and sends that to + the generation worker. + + Returns: + dict with ``context`` and ``generation`` outputs. The caller owns all + behavioral assertions, including output text, handoff metadata, logits, + or draft-token checks. + """ + worker_configs = [ + context_config(extra_config), + generation_config(generation_overlap, extra_config), + ] + print( + "[AD DISAGG TEST] " + f"scenario start: model={model}, worker_world_sizes={worker_world_sizes}, " + f"generation_overlap={generation_overlap}, compile_backend=torch-cudagraph, " + ) + if sampling_params_kwargs is None: + sampling_params_kwargs = {"max_tokens": 25, "ignore_eos": True} + + model_names = [model_path(model) for _ in range(2)] + world_sizes = list(worker_world_sizes) + + with worker_pool(worker_configs, model_names, world_sizes) as intercomms: + context_requests = [ + ( + prompt, + SamplingParams(**sampling_params_kwargs), + DisaggregatedParams(request_type="context_only"), + ) + ] + context_responses = send_requests_to_worker(context_requests, 0, intercomms) + context_output = first_output(context_responses) + print( + f"[AD DISAGG TEST] context output: {response_summary([context_output])}", + ) + + generation_request_disagg_params = generation_params_from_context(context_output) + generation_requests = [ + (prompt, SamplingParams(**sampling_params_kwargs), generation_request_disagg_params) + ] + + generation_responses = send_requests_to_worker(generation_requests, 1, intercomms) + generation_output = first_output(generation_responses) + print( + f"[AD DISAGG TEST] generation output: {response_summary([generation_output])}", + ) + + return { + "context": context_output, + "generation": generation_output, + } + + +@pytest.mark.threadleak(enabled=False) +@pytest.mark.skip_less_device_memory(30000) +@pytest.mark.skip_less_device(2) +@pytest.mark.timeout(600) +def test_async_generation_matches_aggregate(): + aggregate_output = run_aggregate_generation( + "TinyLlama-1.1B-Chat-v1.0", + world_size=1, + prompt="What is the capital of Germany?", + sampling_params_kwargs={"max_tokens": 10, "ignore_eos": True}, + ) + outputs = run_context_then_generation_handoff( + "TinyLlama-1.1B-Chat-v1.0", + worker_world_sizes=(1, 1), + generation_overlap=True, + prompt="What is the capital of Germany?", + sampling_params_kwargs={"max_tokens": 10, "ignore_eos": True}, + ) + context_params = outputs["context"].disaggregated_params + assert context_params is not None + assert context_params.request_type == "context_only" + assert len(outputs["context"].token_ids) == 1 + assert context_params.ctx_request_id is not None + assert context_params.first_gen_tokens is not None + assert has_handoff_transport_metadata(context_params) + assert outputs["generation"].token_ids + assert outputs["context"].token_ids == aggregate_output.token_ids[:1] + assert outputs["generation"].text == aggregate_output.text + assert outputs["generation"].token_ids == aggregate_output.token_ids + + +@pytest.mark.threadleak(enabled=False) +@pytest.mark.skip_less_device_memory(30000) +@pytest.mark.skip_less_device(2) +@pytest.mark.timeout(600) +def test_async_generation_no_overlap_matches_aggregate(): + """Match aggregate generation with the generation worker on overlap=off. + + Same shape as test_async_generation_matches_aggregate but with the + generation worker on the non-overlap scheduling path. Covers MHA disagg + with overlap=off against the aggregate baseline. + """ + sampling_params_kwargs = {"max_tokens": 10, "ignore_eos": True} + aggregate_output = run_aggregate_generation( + "TinyLlama-1.1B-Chat-v1.0", + world_size=1, + prompt="What is the capital of Germany?", + sampling_params_kwargs=sampling_params_kwargs, + ) + outputs = run_context_then_generation_handoff( + "TinyLlama-1.1B-Chat-v1.0", + worker_world_sizes=(1, 1), + generation_overlap=False, + prompt="What is the capital of Germany?", + sampling_params_kwargs=sampling_params_kwargs, + ) + assert_context_handoff_metadata(outputs["context"]) + assert outputs["generation"].token_ids + assert outputs["context"].token_ids == aggregate_output.token_ids[:1] + assert outputs["generation"].text == aggregate_output.text + assert outputs["generation"].token_ids == aggregate_output.token_ids + + +@pytest.mark.threadleak(enabled=False) +@pytest.mark.skip_less_device_memory(30000) +@pytest.mark.skip_less_device(4) +@pytest.mark.timeout(900) +def test_async_sharded_generation_handoff(): + aggregate_output = run_aggregate_generation( + "TinyLlama-1.1B-Chat-v1.0", + world_size=2, + prompt="What is the capital of Germany?", + sampling_params_kwargs={"max_tokens": 10, "ignore_eos": True}, + ) + outputs = run_context_then_generation_handoff( + "TinyLlama-1.1B-Chat-v1.0", + worker_world_sizes=(2, 2), + generation_overlap=True, + prompt="What is the capital of Germany?", + sampling_params_kwargs={"max_tokens": 10, "ignore_eos": True}, + ) + assert_context_handoff_metadata(outputs["context"]) + assert outputs["generation"].token_ids + assert outputs["context"].token_ids == aggregate_output.token_ids[:1] + assert outputs["generation"].text == aggregate_output.text + assert outputs["generation"].token_ids == aggregate_output.token_ids + + +@skip_pre_hopper +@pytest.mark.threadleak(enabled=False) +@pytest.mark.skip_less_device_memory(80000) +@pytest.mark.skip_less_device(2) +@pytest.mark.timeout(900) +def test_async_eagle3_full_model_handoff(): + sampling_params_kwargs = { + "max_tokens": 16, + "ignore_eos": True, + "top_k": 1, + "seed": AUTODEPLOY_DISAGG_SEED, + } + extra_config = llama_eagle3_config() + outputs = run_context_then_generation_handoff( + "Llama-3.1-8B-Instruct", + worker_world_sizes=(1, 1), + generation_overlap=True, + prompt="What is the capital of Germany?", + sampling_params_kwargs=sampling_params_kwargs, + extra_config=extra_config, + ) + context_params = outputs["context"].disaggregated_params + assert context_params is not None + assert context_params.request_type == "context_only" + assert len(outputs["context"].token_ids) == 1 + assert context_params.ctx_request_id is not None + assert context_params.first_gen_tokens is not None + assert has_handoff_transport_metadata(context_params) + assert outputs["generation"].token_ids + assert has_draft_tokens(outputs["context"]) + assert has_draft_tokens(outputs["generation"]) + assert outputs["context"].text == " Berlin" + assert outputs["context"].token_ids == LLAMA_EAGLE3_EXPECTED_TOKEN_IDS[:1] + assert outputs["generation"].text == LLAMA_EAGLE3_EXPECTED_TEXT + assert outputs["generation"].token_ids == LLAMA_EAGLE3_EXPECTED_TOKEN_IDS diff --git a/tests/integration/defs/disaggregated/test_ad_disagg_trtllm_serve.py b/tests/integration/defs/disaggregated/test_ad_disagg_trtllm_serve.py new file mode 100644 index 000000000000..7c3dbc35f099 --- /dev/null +++ b/tests/integration/defs/disaggregated/test_ad_disagg_trtllm_serve.py @@ -0,0 +1,256 @@ +# SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. +# SPDX-License-Identifier: Apache-2.0 +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. + +import asyncio +import os +from pathlib import Path + +import pytest +import requests +from defs.common import get_free_port_in_ci as get_free_port +from defs.conftest import llm_models_root +from disagg_test_utils import ( + CHECK_STATUS_INTERVAL, + HEARTBEAT_INTERVAL, + INACTIVE_TIMEOUT, + run_ctx_worker, + run_disagg_server, + run_gen_worker, + terminate, +) +from openai import OpenAI + +pytest_plugins = ["disagg_test_utils"] + +SERVER_START_TIMEOUT_S = 300 +SERVER_READY_REQUEST_TIMEOUT_S = 5 +OPENAI_REQUEST_TIMEOUT_S = 60 +PROXY_PORT_MAX_RETRIES = 5 +TINYLLAMA_MODEL_DIR = "llama-models-v2/TinyLlama-1.1B-Chat-v1.0" +AUTODEPLOY_BACKEND = "_autodeploy" +EXPECTED_COMPLETION_SUBSTRING = "Berlin" + + +def tinyllama_model_path(): + return str(Path(llm_models_root()) / TINYLLAMA_MODEL_DIR) + + +def worker_cuda_devices(num_workers): + visible_devices = os.environ.get("CUDA_VISIBLE_DEVICES") + if visible_devices: + devices = [device.strip() for device in visible_devices.split(",") if device.strip()] + if len(devices) < num_workers: + pytest.skip( + f"AutoDeploy trtllm-serve disagg smoke requires {num_workers} " + f"visible GPUs, got {len(devices)}" + ) + return devices[:num_workers] + + return [str(device) for device in range(num_workers)] + + +def autodeploy_worker_config(disagg_cluster, disable_overlap_scheduler=False): + config = { + "backend": AUTODEPLOY_BACKEND, + "max_batch_size": 1, + "cuda_graph_config": {"batch_sizes": [1]}, + "cache_transceiver_config": {"backend": "DEFAULT"}, + "disagg_cluster": disagg_cluster, + } + if disable_overlap_scheduler: + config["disable_overlap_scheduler"] = True + + return config + + +def disagg_cluster_config(port): + """Create the service-discovery config shared by workers and proxy.""" + return { + "cluster_uri": f"http://localhost:{port}", + "cluster_name": "autodeploy_disagg_smoke", + "heartbeat_interval_sec": HEARTBEAT_INTERVAL, + "inactive_timeout_sec": INACTIVE_TIMEOUT, + "minimal_instances": { + "context_servers": 1, + "generation_servers": 1, + }, + } + + +def proxy_config(port, disagg_cluster): + """Create a disaggregated proxy config that discovers workers dynamically.""" + return { + "hostname": "localhost", + "port": port, + "backend": AUTODEPLOY_BACKEND, + "disagg_cluster": disagg_cluster, + "context_servers": {"router": {"type": "round_robin"}}, + "generation_servers": {"router": {"type": "round_robin"}}, + } + + +def _process_log(process_wrapper): + """Read captured subprocess output when the utility saved it to a file.""" + if process_wrapper is None or process_wrapper.log_path is None: + return "No process log was captured." + try: + with open(process_wrapper.log_path) as log_file: + return log_file.read() + except OSError as exc: + return f"Failed to read process log {process_wrapper.log_path}: {exc}" + + +async def wait_for_disagg_server_ready_or_exit(port, processes, timeout, request_timeout): + """Wait for proxy readiness, but fail fast if any subprocess exits.""" + loop = asyncio.get_running_loop() + deadline = loop.time() + timeout + last_readiness_error = "no readiness check was attempted" + while loop.time() < deadline: + for name, process_wrapper in processes.items(): + if ( + process_wrapper + and process_wrapper.process + and process_wrapper.process.poll() is not None + ): + # Process exited before the server became ready. + log = _process_log(process_wrapper) + startup_error = RuntimeError( + f"{name} process exited before disaggregated server became ready " + f"(returncode={process_wrapper.process.returncode}).\n{log}" + ) + raise startup_error + + try: + response = requests.get( + f"http://localhost:{port}/cluster_info", timeout=request_timeout + ) + if response.status_code == 200 and response.json().get("is_ready", False): + # Server is ready. + return + last_readiness_error = ( + f"last /cluster_info response: status={response.status_code}, body={response.text}" + ) + except requests.RequestException as exc: + last_readiness_error = f"last /cluster_info request failed: {exc}" + + await asyncio.sleep(CHECK_STATUS_INTERVAL) + + raise TimeoutError( + f"Timed out after {timeout}s waiting for disaggregated server on port {port}; " + f"{last_readiness_error}" + ) + + +@pytest.mark.skip_less_device_memory(30000) +@pytest.mark.skip_less_device(2) +@pytest.mark.timeout(900) +@pytest.mark.asyncio(loop_scope="module") +async def test_openai_completion(work_dir): + """Smoke test AutoDeploy disagg through trtllm-serve and the OpenAI API. + + The lower-level tests in ``test_ad_disagg.py`` drive AutoDeploy workers + directly and inspect context/generation handoff metadata. This test instead + verifies the trtllm-serve deployment shape: context worker, generation + worker, disaggregated proxy, and an OpenAI-compatible completion request. + """ + model = tinyllama_model_path() + ctx_device, gen_device = worker_cuda_devices(2) + + last_port_conflict = None + response = None + for attempt in range(PROXY_PORT_MAX_RETRIES): + disagg_port = get_free_port() + disagg_cluster = disagg_cluster_config(disagg_port) + ctx_worker = None + gen_worker = None + disagg_server = None + + try: + # Use the same service-discovery path as the broader PyTorch disagg + # tests for worker ports. Passing port=0 lets each trtllm-serve worker + # bind an OS-selected port in the child process and register that port + # with the disaggregated proxy. + ctx_worker = run_ctx_worker( + model, + autodeploy_worker_config(disagg_cluster, disable_overlap_scheduler=True), + work_dir, + port=0, + device=ctx_device, + ) + gen_worker = run_gen_worker( + model, + autodeploy_worker_config(disagg_cluster), + work_dir, + port=0, + device=gen_device, + ) + disagg_server = run_disagg_server( + proxy_config(disagg_port, disagg_cluster), + work_dir, + disagg_port, + save_log=True, + ) + try: + await wait_for_disagg_server_ready_or_exit( + disagg_port, + { + "context worker": ctx_worker, + "generation worker": gen_worker, + "disaggregated proxy": disagg_server, + }, + SERVER_START_TIMEOUT_S, + SERVER_READY_REQUEST_TIMEOUT_S, + ) + except RuntimeError as exc: + last_port_conflict = exc + if "disaggregated proxy" not in str(exc) or ( + "EADDRINUSE" not in str(exc) + and "address already in use" not in str(exc).lower() + ): + raise + print( + f"AutoDeploy disagg serve attempt {attempt + 1} of {PROXY_PORT_MAX_RETRIES} " + f"failed with proxy port conflict, retrying: {exc}" + ) + continue + + client = OpenAI( + api_key="tensorrt_llm", + base_url=f"http://localhost:{disagg_port}/v1", + timeout=OPENAI_REQUEST_TIMEOUT_S, + max_retries=0, + ) + response = client.completions.create( + model=model, + prompt="What is the capital of Germany?", + max_tokens=32, + temperature=0, + extra_body={"ignore_eos": True}, + ) + break + finally: + terminate(ctx_worker, gen_worker, disagg_server) + + if response is None: + raise RuntimeError( + f"Failed to start AutoDeploy disagg serve smoke after {PROXY_PORT_MAX_RETRIES} " + "proxy port attempts" + ) from last_port_conflict + + assert response.choices + response_text = response.choices[0].text + assert EXPECTED_COMPLETION_SUBSTRING in response_text, ( + f"expected {EXPECTED_COMPLETION_SUBSTRING!r} in response, got {response_text!r}" + ) diff --git a/tests/integration/defs/disaggregated/test_disaggregated.py b/tests/integration/defs/disaggregated/test_disaggregated.py index 437f5c2231a4..a5beb9c2de26 100644 --- a/tests/integration/defs/disaggregated/test_disaggregated.py +++ b/tests/integration/defs/disaggregated/test_disaggregated.py @@ -2275,9 +2275,15 @@ def test_disaggregated_gpt_oss_120b_harmony(disaggregated_test_root, model_dir = f"{llm_models_root()}/{model_path}" setup_model_symlink(llm_venv, model_dir, model_path) + env = llm_venv._new_env.copy() + tiktoken_vocab = os.path.join(llm_models_root(), "datasets", + "tiktoken_vocab") + env["TIKTOKEN_RS_CACHE_DIR"] = tiktoken_vocab + env["TIKTOKEN_ENCODINGS_BASE"] = tiktoken_vocab + run_disaggregated_test(disaggregated_example_root, "gpt_oss_120b_harmony", - env=llm_venv._new_env, + env=env, model_path=model_dir, cwd=llm_venv.get_working_directory()) diff --git a/tests/integration/defs/examples/test_eagle.py b/tests/integration/defs/examples/test_eagle.py index 0d03d9af5f76..0385edaff354 100644 --- a/tests/integration/defs/examples/test_eagle.py +++ b/tests/integration/defs/examples/test_eagle.py @@ -1,4 +1,4 @@ -# SPDX-FileCopyrightText: Copyright (c) 2022-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. +# SPDX-FileCopyrightText: Copyright (c) 2022-2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. # SPDX-License-Identifier: Apache-2.0 # # Licensed under the Apache License, Version 2.0 (the "License"); @@ -15,7 +15,7 @@ import pytest from defs.common import convert_weights, venv_check_call -from defs.conftest import get_sm_version, skip_post_blackwell, skip_pre_ada +from defs.conftest import get_sm_version, skip_post_blackwell from defs.trt_test_alternative import check_call # skip trt flow cases on post-Blackwell-Ultra @@ -94,52 +94,3 @@ def test_llm_eagle_1gpu(batch_size, data_type, use_dynamic_tree, [f"--eagle_dynamic_tree_max_top_k={3}", "--eagle_use_dynamic_tree"]) venv_check_call(llm_venv, summary_cmd) - - -# TODO: remove skip_post_blackwell after Speculative decoding is supported. -@skip_post_blackwell -@skip_pre_ada -@pytest.mark.parametrize("batch_size", [8], ids=['bs8']) -@pytest.mark.parametrize("data_type", ['float16']) -@pytest.mark.parametrize("eagle_model_roots", ["llama3.1-eagle-8b-hf_v0.5"], - indirect=True) -def test_llm_eagle_1gpu_modelopt_ckpt(batch_size, data_type, eagle_model_roots, - eagle_example_root, llm_datasets_root, - llm_rouge_root, llm_venv, cmodel_dir, - engine_dir): - print("Build engines...") - model_name = "eagle" - - # Although the datatype is float16, the actual weights are FP8. - # The datatype in the convert stage is used for the input and output of the plugin. - - model_dir = convert_weights(llm_venv=llm_venv, - example_root=eagle_example_root, - cmodel_dir=cmodel_dir, - model=model_name, - model_path=eagle_model_roots, - data_type=data_type) - - build_cmd = [ - "trtllm-build", - f"--checkpoint_dir={model_dir}", - f"--output_dir={engine_dir}", - f"--max_beam_width=1", - "--use_paged_context_fmha=enable", - f"--max_batch_size={batch_size}", - "--speculative_decoding_mode=eagle", - "--multiple_profiles=enable" # also test multiple_profiles - ] - - check_call(" ".join(build_cmd), shell=True, env=llm_venv._new_env) - - print("Run run...") - - run_cmd = [ - f"{eagle_example_root}/../run.py", f"--engine_dir={engine_dir}", - f"--tokenizer_dir={eagle_model_roots}", - "--eagle_choices=[[0], [0, 0], [1], [0, 1], [2], [0, 0, 0], [1, 0], [0, 2], [3], [0, 3], [4], [0, 4], [2, 0], [0, 5], [0, 0, 1], [5], [0, 6], [6], [0, 7], [0, 1, 0], [1, 1], [7], [0, 8], [0, 0, 2], [3, 0], [0, 9], [8], [9], [1, 0, 0], [0, 2, 0], [1, 2], [0, 0, 3], [4, 0], [2, 1], [0, 0, 4], [0, 0, 5], [0, 0, 0, 0], [0, 1, 1], [0, 0, 6], [0, 3, 0], [5, 0], [1, 3], [0, 0, 7], [0, 0, 8], [0, 0, 9], [6, 0], [0, 4, 0], [1, 4], [7, 0], [0, 1, 2], [2, 0, 0], [3, 1], [2, 2], [8, 0], [0, 5, 0], [1, 5], [1, 0, 1], [0, 2, 1], [9, 0], [0, 6, 0], [0, 0, 0, 1], [1, 6], [0, 7, 0]]", - "--max_output_len=100" - ] - - venv_check_call(llm_venv, run_cmd) diff --git a/tests/integration/defs/examples/test_phi.py b/tests/integration/defs/examples/test_phi.py index 8a414137c1bd..62f67e4bae65 100644 --- a/tests/integration/defs/examples/test_phi.py +++ b/tests/integration/defs/examples/test_phi.py @@ -1,4 +1,4 @@ -# SPDX-FileCopyrightText: Copyright (c) 2022-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. +# SPDX-FileCopyrightText: Copyright (c) 2022-2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. # SPDX-License-Identifier: Apache-2.0 # # Licensed under the Apache License, Version 2.0 (the "License"); @@ -12,15 +12,12 @@ # WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. # See the License for the specific language governing permissions and # limitations under the License. -import csv import os import defs.ci_profiler import pytest -from defs.common import (convert_weights, quantize_data, - test_llm_torch_multi_lora_support, venv_check_call) -from defs.conftest import (get_sm_version, skip_fp8_pre_ada, - skip_post_blackwell, skip_pre_ada) +from defs.common import test_llm_torch_multi_lora_support, venv_check_call +from defs.conftest import get_sm_version, skip_post_blackwell, skip_pre_ada from defs.trt_test_alternative import check_call # skip trt flow cases on post-Blackwell-Ultra @@ -42,107 +39,6 @@ def phi_example_root(llm_root, llm_venv): return example_root -@pytest.mark.parametrize("data_type", ["float16", "fp8"], - ids=["base_fp16", "base_fp8"]) -@pytest.mark.parametrize("lora_data_type", ["float16"], ids=["lora_fp16"]) -@pytest.mark.parametrize("llm_phi_model_root", ["Phi-3-mini-4k-instruct"], - indirect=True) -@pytest.mark.parametrize("llm_lora_model_root", - ["Phi-3-mini-4k-instruct-ru-lora"], - indirect=True) -def test_llm_phi_lora_1gpu(data_type, lora_data_type, phi_example_root, - llm_phi_model_root, llm_datasets_root, llm_venv, - cmodel_dir, engine_dir, llm_lora_model_root, - qcache_dir_without_install_package): - "run phi lora test on 1gpu" - print("Converting checkpoint...") - model_name = 'phi-3-lora' - if data_type == 'fp8': - skip_fp8_pre_ada(use_fp8=True) - if get_sm_version() >= 100: - pytest.skip("FP8 is not supported on post-Blackwell architectures") - model_dir = quantize_data( - llm_venv, - phi_example_root, - model_dir=llm_phi_model_root, - calib_dataset=f"{llm_datasets_root}/cnn_dailymail", - dtype="float16", - qformat="fp8", - kv_cache_dtype="fp8", - quantize_dir=qcache_dir_without_install_package, - calib_size=512) - else: - model_dir = convert_weights(llm_venv=llm_venv, - example_root=phi_example_root, - cmodel_dir=cmodel_dir, - model=model_name, - model_path=llm_phi_model_root) - - print("Build engines...") - build_cmd = [ - "trtllm-build", - f"--checkpoint_dir={model_dir}", - f"--output_dir={engine_dir}", - "--lora_plugin=auto", - "--gemm_plugin=auto", - "--max_batch_size=8", - f"--lora_dir={llm_lora_model_root}", - ] - check_call(" ".join(build_cmd), shell=True, env=llm_venv._new_env) - - ref_1 = [ - 1, 1815, 366, 3867, 5837, 304, 17545, 18240, 310, 9892, 16397, 322, - 8338, 265, 29888, 21211, 29973, 306, 29915, 29885, 3063, 363, 907, 1230, - 322, 9045, 29891, 9522, 5547, 393, 11039, 403, 1716, 285, 21211, 29889, - 29871 - ] - - ref_2 = [ - 1815, 366, 3867, 5837, 304, 17545, 18240, 310, 9892, 16397, 322, 8338, - 265, 29888, 21211, 29973, 13, 13, 7900, 22137, 29901, 315, 13946, 368, - 29991, 2266, 526, 777, 907, 1230, 5837, 304, 13389, 9892, 16397, 322 - ] - - input_text = "Can you provide ways to eat combinations of bananas and dragonfruits?" - - print(f"Run inference with lora id 0...") - venv_check_call(llm_venv, [ - f"{phi_example_root}/../../../run.py", - "--max_output_len=20", - f"--input_text={input_text}", - "--lora_task_uids=0", - f"--tokenizer_dir={llm_lora_model_root}", - f"--engine_dir={engine_dir}", - f"--output_csv={llm_venv.get_working_directory()}/use_lora.csv", - "--use_py_session", - ]) - - with open(f"{llm_venv.get_working_directory()}/use_lora.csv") as f: - predict = csv.reader(f) - predict = next(predict) - predict = [int(p) for p in predict] - assert ref_1 == predict or data_type != "float16" - - print(f"Run inference with lora id -1...") - venv_check_call(llm_venv, [ - f"{phi_example_root}/../../../run.py", - "--max_output_len=20", - f"--input_text={input_text}", - "--lora_task_uids=-1", - f"--tokenizer_dir={llm_phi_model_root}", - f"--engine_dir={engine_dir}", - f"--output_csv={llm_venv.get_working_directory()}/no_lora.csv", - "--use_py_session", - ]) - - with open(f"{llm_venv.get_working_directory()}/no_lora.csv") as f: - predict = csv.reader(f) - predict = next(predict) - predict = [int(p) for p in predict] - - assert ref_2 == predict or data_type != "float16" - - @skip_pre_ada @pytest.mark.parametrize("data_type", ['float16', 'bfloat16']) @pytest.mark.parametrize("qformat", ['fp8']) diff --git a/tests/integration/defs/examples/test_visual_gen.py b/tests/integration/defs/examples/test_visual_gen.py index 1d6d40336996..65852dbf21de 100644 --- a/tests/integration/defs/examples/test_visual_gen.py +++ b/tests/integration/defs/examples/test_visual_gen.py @@ -35,6 +35,7 @@ WAN_T2V_MODEL_SUBPATH = "Wan2.1-T2V-1.3B-Diffusers" WAN22_A14B_FP8_MODEL_SUBPATH = "Wan2.2-T2V-A14B-Diffusers-FP8" WAN22_A14B_NVFP4_MODEL_SUBPATH = "Wan2.2-T2V-A14B-Diffusers-NVFP4" +WAN22_I2V_A14B_NVFP4_MODEL_SUBPATH = "Wan2.2-I2V-A14B-Diffusers-NVFP4" VISUAL_GEN_OUTPUT_VIDEO = "trtllm_output.mp4" DIFFUSERS_REFERENCE_VIDEO = "diffusers_reference.mp4" WAN_T2V_PROMPT = "A cute cat playing piano" @@ -1297,3 +1298,196 @@ def test_wan_t2v_example(_visual_gen_deps, llm_root, llm_venv): ], ) assert os.path.isfile(output_path), f"Example did not produce output at {output_path}" + + +def test_flux1_example(_visual_gen_deps, llm_root, llm_venv): + """Run examples/visual_gen/models/flux1.py with NVFP4 config end-to-end. + + Validates that the FLUX.1-dev example script and ``configs/flux1-dev-fp4-1gpu.yaml`` + work together as documented. Uses the local FLUX.1-dev checkpoint and the shared + NVFP4 dynamic-quant config. + """ + model_path = _lpips_model_path("FLUX.1-dev") + _skip_if_missing(model_path, "FLUX.1-dev checkpoint", is_dir=True) + + out_dir = os.path.join(llm_venv.get_working_directory(), "visual_gen_output", "flux1_example") + os.makedirs(out_dir, exist_ok=True) + output_path = os.path.join(out_dir, "flux1_output.png") + + script_path = os.path.join(llm_root, "examples", "visual_gen", "models", "flux1.py") + config_path = os.path.join( + llm_root, "examples", "visual_gen", "configs", "flux1-dev-fp4-1gpu.yaml" + ) + assert os.path.isfile(script_path), f"Example script not found: {script_path}" + assert os.path.isfile(config_path), f"Config not found: {config_path}" + + venv_check_call( + llm_venv, + [ + script_path, + "--model", + model_path, + "--visual_gen_args", + config_path, + "--output_path", + output_path, + ], + ) + assert os.path.isfile(output_path), f"Example did not produce output at {output_path}" + + +def test_flux2_example(_visual_gen_deps, llm_root, llm_venv): + """Run examples/visual_gen/models/flux2.py with NVFP4 config end-to-end. + + Validates that the FLUX.2-dev example script and ``configs/flux2-dev-fp4-1gpu.yaml`` + work together as documented. Uses the local FLUX.2-dev checkpoint and the shared + NVFP4 dynamic-quant config. + """ + model_path = _lpips_model_path("FLUX.2-dev") + _skip_if_missing(model_path, "FLUX.2-dev checkpoint", is_dir=True) + + out_dir = os.path.join(llm_venv.get_working_directory(), "visual_gen_output", "flux2_example") + os.makedirs(out_dir, exist_ok=True) + output_path = os.path.join(out_dir, "flux2_output.png") + + script_path = os.path.join(llm_root, "examples", "visual_gen", "models", "flux2.py") + config_path = os.path.join( + llm_root, "examples", "visual_gen", "configs", "flux2-dev-fp4-1gpu.yaml" + ) + assert os.path.isfile(script_path), f"Example script not found: {script_path}" + assert os.path.isfile(config_path), f"Config not found: {config_path}" + + venv_check_call( + llm_venv, + [ + script_path, + "--model", + model_path, + "--visual_gen_args", + config_path, + "--output_path", + output_path, + ], + ) + assert os.path.isfile(output_path), f"Example did not produce output at {output_path}" + + +def test_ltx2_example(_visual_gen_deps, llm_root, llm_venv): + """Run examples/visual_gen/models/ltx2.py with NVFP4 config end-to-end. + + Validates that the LTX-2 example script and ``configs/ltx2-t2v-fp4-1gpu.yaml`` + work together as documented. The Gemma3 text encoder is passed separately via + ``--text_encoder_path`` because the shared YAML intentionally omits it to keep + the config model-path-agnostic. + """ + model_path = _lpips_model_path("LTX-2", "ltx-2-19b-dev.safetensors") + _skip_if_missing(model_path, "LTX-2 checkpoint") + text_encoder_path = _ltx2_lpips_text_encoder_path() + _skip_if_missing(text_encoder_path, "LTX-2 text encoder (gemma-3-12b-it)", is_dir=True) + + out_dir = os.path.join(llm_venv.get_working_directory(), "visual_gen_output", "ltx2_example") + os.makedirs(out_dir, exist_ok=True) + output_path = os.path.join(out_dir, "ltx2_output.mp4") + + script_path = os.path.join(llm_root, "examples", "visual_gen", "models", "ltx2.py") + config_path = os.path.join( + llm_root, "examples", "visual_gen", "configs", "ltx2-t2v-fp4-1gpu.yaml" + ) + assert os.path.isfile(script_path), f"Example script not found: {script_path}" + assert os.path.isfile(config_path), f"Config not found: {config_path}" + + venv_check_call( + llm_venv, + [ + script_path, + "--model", + model_path, + "--visual_gen_args", + config_path, + "--text_encoder_path", + text_encoder_path, + "--output_path", + output_path, + ], + ) + assert os.path.isfile(output_path), f"Example did not produce output at {output_path}" + + +def test_wan_i2v_example(_visual_gen_deps, llm_root, llm_venv): + """Run examples/visual_gen/models/wan_i2v.py with NVFP4 config end-to-end. + + Validates that the Wan I2V example script and ``configs/wan2.2-i2v-fp4-1gpu.yaml`` + work together as documented. Uses the pre-quantized Wan 2.2 I2V A14B NVFP4 + checkpoint and the default input image (cat_piano.png) bundled with the examples. + """ + scratch_space = conftest.llm_models_root() + model_path = os.path.join(scratch_space, WAN22_I2V_A14B_NVFP4_MODEL_SUBPATH) + if not os.path.isdir(model_path): + pytest.skip( + f"Model not found: {model_path} " + f"(set LLM_MODELS_ROOT or place {WAN22_I2V_A14B_NVFP4_MODEL_SUBPATH} under models root)" + ) + + out_dir = os.path.join(llm_venv.get_working_directory(), "visual_gen_output", "wan_i2v_example") + os.makedirs(out_dir, exist_ok=True) + output_path = os.path.join(out_dir, "wan_i2v_output.mp4") + + script_path = os.path.join(llm_root, "examples", "visual_gen", "models", "wan_i2v.py") + config_path = os.path.join( + llm_root, "examples", "visual_gen", "configs", "wan2.2-i2v-fp4-1gpu.yaml" + ) + assert os.path.isfile(script_path), f"Example script not found: {script_path}" + assert os.path.isfile(config_path), f"Config not found: {config_path}" + + venv_check_call( + llm_venv, + [ + script_path, + "--model", + model_path, + "--visual_gen_args", + config_path, + "--output_path", + output_path, + ], + ) + assert os.path.isfile(output_path), f"Example did not produce output at {output_path}" + + +def test_cosmos3_example(_visual_gen_deps, llm_root, llm_venv): + """Run examples/visual_gen/models/cosmos3_ti2v.py with FP8 config end-to-end. + + Validates that the Cosmos3-Nano example script and ``configs/cosmos3-nano-1gpu.yaml`` + work together as documented. Uses the local Cosmos3-Nano checkpoint and + the shared FP8 dynamic-quant config. + """ + model_path = _lpips_model_path("Cosmos3-Nano") + _skip_if_missing(model_path, "Cosmos3-Nano checkpoint", is_dir=True) + + out_dir = os.path.join(llm_venv.get_working_directory(), "visual_gen_output", "cosmos3_example") + os.makedirs(out_dir, exist_ok=True) + output_path = os.path.join(out_dir, "cosmos3_output.mp4") + + script_path = os.path.join(llm_root, "examples", "visual_gen", "models", "cosmos3_ti2v.py") + config_path = os.path.join( + llm_root, "examples", "visual_gen", "configs", "cosmos3-nano-1gpu.yaml" + ) + assert os.path.isfile(script_path), f"Example script not found: {script_path}" + assert os.path.isfile(config_path), f"Config not found: {config_path}" + + venv_check_call( + llm_venv, + [ + script_path, + "--model", + model_path, + "--visual_gen_args", + config_path, + "--prompt", + "A serene mountain landscape with snow-capped peaks and a flowing river", + "--output_path", + output_path, + ], + env={"TRTLLM_DISABLE_COSMOS3_GUARDRAILS": "1"}, + ) + assert os.path.isfile(output_path), f"Example did not produce output at {output_path}" diff --git a/tests/integration/defs/perf/_model_paths.py b/tests/integration/defs/perf/_model_paths.py index c7c021cae7ba..e995ce257f8f 100644 --- a/tests/integration/defs/perf/_model_paths.py +++ b/tests/integration/defs/perf/_model_paths.py @@ -123,16 +123,9 @@ "glm_5_nvfp4": "GLM-5-NVFP4", } -# Model PATH of HuggingFace +# Models loaded directly by HuggingFace repo id (downloaded at runtime, not synced locally). HF_MODEL_PATH = { - "llama_v3.1_8b_hf": "meta-llama/Llama-3.1-8B", - "llama_v3.1_8b_instruct_hf": "nvidia/Llama-3.1-8B-Instruct-FP8", - "llama_v3.1_nemotron_nano_8b_hf": "nvidia/Llama-3.1-Nemotron-Nano-8B-v1", - "llama_v3.1_nemotron_nano_8b_fp8_hf": "nvidia/Llama-3.1-Nemotron-Nano-8B-v1-FP8", - "llama_v3.3_nemotron_super_49b_hf": "nvidia/Llama-3_3-Nemotron-Super-49B-v1", - "llama_v3.3_nemotron_super_49b_fp8_hf": "nvidia/Llama-3_3-Nemotron-Super-49B-v1-FP8", - "llama_v3.1_nemotron_ultra_253b_fp8_hf": "nvidia/Llama-3_1-Nemotron-Ultra-253B-v1-FP8", - "phi_4_mini_instruct_hf": "microsoft/Phi-4-mini-instruct", + "nemotron_3_ultra_550b_nvfp4": "nvidia/NVIDIA-Nemotron-3-Ultra-550B-A55B-NVFP4", } LORA_MODEL_PATH = { diff --git a/tests/integration/defs/perf/pytorch_model_config.py b/tests/integration/defs/perf/pytorch_model_config.py index 0dbf1a91ee1d..66d1dd334002 100644 --- a/tests/integration/defs/perf/pytorch_model_config.py +++ b/tests/integration/defs/perf/pytorch_model_config.py @@ -586,6 +586,28 @@ def get_model_yaml_config(model_label: str, }, } }, + # Nemotron-3-Ultra-550B-NVFP4 throughput variant, aligned with curated yaml (served from HF). + { + 'patterns': ['nemotron_3_ultra_550b_nvfp4-serve-pytorch-'], + 'config': { + 'enable_attention_dp': True, + 'stream_interval': 10, + 'num_postprocess_workers': 4, + 'moe_config': { + 'backend': 'CUTEDSL', + }, + 'cuda_graph_config': { + 'enable_padding': True, + 'max_batch_size': 256, + }, + 'kv_cache_config': { + 'enable_block_reuse': False, + 'mamba_ssm_cache_dtype': 'float16', + 'mamba_ssm_stochastic_rounding': True, + 'mamba_ssm_philox_rounds': 5, + }, + } + }, ] # Apply pattern-based configurations on top of base config diff --git a/tests/integration/defs/perf/test_perf.py b/tests/integration/defs/perf/test_perf.py index c7b70638f700..1f01fe88b7fd 100644 --- a/tests/integration/defs/perf/test_perf.py +++ b/tests/integration/defs/perf/test_perf.py @@ -49,6 +49,7 @@ NEMOTRON_SUPER_MODELS = { "nemotron_3_super_120b_nvfp4", "nemotron_3_super_120b_nvfp4_mtp", + "nemotron_3_ultra_550b_nvfp4", "nemotron_3_nano_omni_nvfp4", "nemotron_3_nano_omni_nvfp4_image", } @@ -61,6 +62,7 @@ "kimi_k2_nvfp4", "nemotron_3_super_120b_nvfp4", "nemotron_3_super_120b_nvfp4_mtp", + "nemotron_3_ultra_550b_nvfp4", "glm_5_fp8", "nemotron_3_nano_omni_nvfp4", "nemotron_3_nano_omni_nvfp4_image", @@ -106,13 +108,12 @@ def get_model_dir(model_name: str): - model_dir = "" + # HF models use the repo id verbatim (downloaded at runtime, no LLM_MODELS_ROOT prefix). + if model_name in HF_MODEL_PATH.keys(): + return HF_MODEL_PATH[model_name] if model_name in MODEL_PATH_DICT.keys(): - model_dir = os.path.join(llm_models_root(), MODEL_PATH_DICT[model_name]) - elif model_name in HF_MODEL_PATH.keys(): - model_dir = os.path.join(llm_models_root(), - MODEL_PATH_DICT[model_name.split('_hf')[0]]) - return model_dir + return os.path.join(llm_models_root(), MODEL_PATH_DICT[model_name]) + return "" def get_dataset_path(): @@ -1038,14 +1039,13 @@ def get_trtllm_bench_build_command(self, engine_dir) -> list: model_dir = self.get_trtllm_bench_model() if model_dir == "": pytest.skip("Model Name is not supported by trtllm-bench") + # Legacy "_hf" label; weights load from --model_path. model_name = self._config.model_name if not model_name.endswith("_hf"): model_name = model_name + "_hf" - hf_model_name = HF_MODEL_PATH.get(model_name, "") build_cmd = [ - self._build_script, f"--log_level=info", - f"--workspace={engine_dir}", f"--model={hf_model_name}", - f"--model_path={model_dir}", "build", + self._build_script, "--log_level=info", f"--workspace={engine_dir}", + f"--model={model_name}", f"--model_path={model_dir}", "build", f"--tp_size={self._config.tp_size}", f"--pp_size={self._config.pp_size}" ] @@ -1170,11 +1170,11 @@ def get_trtllm_bench_command(self, engine_dir): model_name = self._config.model_name dataset_path = os.path.join(engine_dir, "synthetic_data.json") report_path = os.path.join(engine_dir, "report.json") + # Legacy "_hf" label; weights load from --model_path. if not model_name.endswith("_hf"): model_name = model_name + "_hf" - hf_model_name = HF_MODEL_PATH.get(model_name, "") tp_pp_str = f"tp_{self._config.tp_size}_pp_{self._config.pp_size}" - engine_dir = os.path.join(engine_dir, hf_model_name, tp_pp_str) + engine_dir = os.path.join(engine_dir, tp_pp_str) benchmark_cmd = [ self._benchmark_script, f"--model={model_name}", diff --git a/tests/integration/defs/perf/test_perf_sanity.py b/tests/integration/defs/perf/test_perf_sanity.py index bf60df583d0d..d37ffd9400c0 100644 --- a/tests/integration/defs/perf/test_perf_sanity.py +++ b/tests/integration/defs/perf/test_perf_sanity.py @@ -163,22 +163,22 @@ def gen_worker_log_sizes(output_dir: str, num_gen_servers: int) -> List[int]: return sizes -def parse_gen_worker_device_step_time( +def _scan_gen_worker_device_step_time( output_dir: str, num_gen_servers: int, start_offsets: Optional[List[int]] = None, -) -> Optional[float]: - """Mean per-iter prev_device_step_time (ms) across all gen workers. - - For each gen_server_{i}.log, average prev_device_step_time over iters >= 5, - then average those per-file means across the num_gen_servers workers. - Returns None if no usable line is found in any file. - - When start_offsets is provided, only the bytes from start_offsets[i] to - end-of-file are considered for gen_server_{i}.log — used to slice out a - single client's iteration segment. +) -> Tuple[List[float], int]: + """Single pass over the gen logs. Returns (per_file_means, total_count). + + per_file_means holds one mean per file that had >=1 usable line; + total_count is the number of usable (iter >= 5, numeric) lines across all + files, used by the caller to detect when the cross-node log flush has + settled. errors="replace" guards against invalid UTF-8: tqdm progress bars + (model load) write partial multibyte sequences that would otherwise raise + UnicodeDecodeError mid-scan. """ per_file_means: List[float] = [] + total_count = 0 for i in range(num_gen_servers): log_path = os.path.join(output_dir, f"gen_server_{i}.log") if not os.path.isfile(log_path): @@ -187,7 +187,7 @@ def parse_gen_worker_device_step_time( # large iteration counts. count = 0 mean = 0.0 - with open(log_path) as f: + with open(log_path, errors="replace") as f: if start_offsets is not None and i < len(start_offsets) and start_offsets[i]: f.seek(start_offsets[i]) for line in f: @@ -201,9 +201,55 @@ def parse_gen_worker_device_step_time( mean += (float(m.group(2)) - mean) / count if count: per_file_means.append(mean) - if not per_file_means: - return None - return sum(per_file_means) / len(per_file_means) + total_count += count + return per_file_means, total_count + + +def parse_gen_worker_device_step_time( + output_dir: str, + num_gen_servers: int, + start_offsets: Optional[List[int]] = None, + settle_timeout: float = 90.0, + poll_interval: float = 3.0, +) -> Optional[float]: + """Mean per-iter prev_device_step_time (ms) across all gen workers. + + For each gen_server_{i}.log, average prev_device_step_time over iters >= 5, + then average those per-file means across the num_gen_servers workers. + Returns None if no usable line is found in any file. + + When start_offsets is provided, only the bytes from start_offsets[i] to + end-of-file are considered for gen_server_{i}.log — used to slice out a + single client's iteration segment. + + The gen worker writes gen_server_{i}.log on a different node than the + benchmark/pytest process, and the worker is kept alive (waiting on the + benchmark_status file) when this runs — so when the client returns, the + decode iterations are done but their log lines may still be flushing across + NFS. Reading once immediately can see zero iter>=5 lines and wrongly return + None. So poll the slice until the usable-line count is non-zero AND stable + across two consecutive reads (flush drained), bounded by settle_timeout. + """ + deadline = time.time() + settle_timeout + prev_count = -1 + while True: + per_file_means, total_count = _scan_gen_worker_device_step_time( + output_dir, num_gen_servers, start_offsets + ) + # Non-empty and unchanged since the last poll → the flush has settled. + if total_count > 0 and total_count == prev_count: + return sum(per_file_means) / len(per_file_means) + if time.time() >= deadline: + if per_file_means: + print_info( + f"parse_gen_worker_device_step_time: settle_timeout " + f"({settle_timeout}s) reached with {total_count} line(s); " + "returning current mean." + ) + return sum(per_file_means) / len(per_file_means) + return None + prev_count = total_count + time.sleep(poll_interval) def add_perf_metric_value( diff --git a/tests/integration/defs/stress_test/disagg_cancel/README.md b/tests/integration/defs/stress_test/disagg_cancel/README.md index 8be4c893a469..8cc9650a8bf3 100644 --- a/tests/integration/defs/stress_test/disagg_cancel/README.md +++ b/tests/integration/defs/stress_test/disagg_cancel/README.md @@ -1,7 +1,7 @@ # Disaggregated Cancellation Stress-Test Suite Marathon-style stress tests that gate regressions of the bug class -fixed by [PR #13713](https://github.com/NVIDIA/TensorRT-LLM/pull/13713) +fixed by (cleanup / lifetime / quiescence invariants in the disagg KV transceiver under heavy mid-flight cancellation). @@ -9,7 +9,7 @@ transceiver under heavy mid-flight cancellation). |---|---| | **Tracked by** | [TRTLLM-12648](https://jirasw.nvidia.com/browse/TRTLLM-12648), [TRTLLM-12721](https://jirasw.nvidia.com/browse/TRTLLM-12721) | | **Bug it gates** | NVBug 6104831 (disaggregated permanent wedge) | -| **Fix it gates** | [PR #13713](https://github.com/NVIDIA/TensorRT-LLM/pull/13713) | +| **Fix it gates** | | ## Status @@ -19,14 +19,15 @@ land incrementally: | Thread | Status | |--------|--------| | `log_scanner_thread` | Implemented — hard-zero log fail-fast | -| `metrics_thread` | Stub (Step 2) | +| `metrics_thread` | Implemented — `trtllm_kv_cache_utilization` scraper | | `injector_thread` | Implemented — SIGSTOP/SIGCONT/SIGKILL + respawn | -| `canary_thread` | Stub | -| `load_thread` | Stub | +| `canary_thread` | Implemented — greedy canaries + token-equivalence | +| `load_thread` | Implemented — duration-bounded steady/burst cancellation load | -Component-level coverage: `test_log_scanner.py`, `test_injector.py`. -The parametrized marathon pytest still runs a lifecycle smoke until -`setup()` launches a real cluster and the remaining threads are wired. +Component-level coverage: `test_log_scanner.py`, `test_metrics_thread.py`, +`test_injector.py`, `test_canary.py`, `test_load_thread.py`. The +parametrized marathon pytest still runs a lifecycle smoke until +`setup()` launches a real cluster. ## File layout @@ -37,7 +38,10 @@ tests/integration/defs/stress_test/disagg_cancel/ ├── harness.py (DisaggCancellationStressHarness) ├── test_disagg_cancel_stress.py (pytest entry point) ├── test_log_scanner.py (log_scanner unit tests) +├── test_metrics_thread.py (metrics_thread unit tests) ├── test_injector.py (injector unit tests) +├── test_canary.py (canary_thread unit tests) +├── test_load_thread.py (load_thread unit tests) └── configs/ ├── README.md (YAML schema + how to add a config) ├── marathon_cpp_v1_deepseek.yaml @@ -58,7 +62,7 @@ Future additions: The marathons are **not** registered in pre-merge CI. They are run nightly / weekly via `tests/integration/test_lists/qa/llm_function_stress.txt` (wiring -lands together with the load-thread implementation). +lands with the explicit CI-registration change). ### Unit tests (no GPU, no cluster) @@ -74,15 +78,26 @@ cd /path/to/TensorRT-LLM export PYTHONPATH=tests/integration/defs:tests/integration/defs/disaggregated +# Steps 1-2 — log scanner + metrics (optional sanity) +python3 -m pytest -c /dev/null -o addopts= \ + --confcutdir=tests/integration/defs/stress_test \ + tests/integration/defs/stress_test/disagg_cancel/test_log_scanner.py \ + tests/integration/defs/stress_test/disagg_cancel/test_metrics_thread.py -v + # Step 3 — injector thread (SIGSTOP / SIGCONT / SIGKILL + respawn) python3 -m pytest -c /dev/null -o addopts= \ --confcutdir=tests/integration/defs/stress_test \ tests/integration/defs/stress_test/disagg_cancel/test_injector.py -v -# Step 1 — log scanner (optional sanity alongside injector PR) +# Step 4 — canary thread (greedy canaries + token-equivalence) python3 -m pytest -c /dev/null -o addopts= \ --confcutdir=tests/integration/defs/stress_test \ - tests/integration/defs/stress_test/disagg_cancel/test_log_scanner.py -v + tests/integration/defs/stress_test/disagg_cancel/test_canary.py -v + +# Step 5 — load thread (steady/burst wrapper around cancel stress load) +python3 -m pytest -c /dev/null -o addopts= \ + --confcutdir=tests/integration/defs/stress_test \ + tests/integration/defs/stress_test/disagg_cancel/test_load_thread.py -v # Marathon YAML parse/validate (includes stress_config.injections schedule) python3 -m pytest -c /dev/null -o addopts= \ @@ -90,14 +105,12 @@ python3 -m pytest -c /dev/null -o addopts= \ tests/integration/defs/stress_test/disagg_cancel/test_disagg_cancel_stress.py::test_all_marathon_yamls_parse_and_validate -v ``` -All three together: +All component tests together: ```bash python3 -m pytest -c /dev/null -o addopts= \ --confcutdir=tests/integration/defs/stress_test \ - tests/integration/defs/stress_test/disagg_cancel/test_injector.py \ - tests/integration/defs/stress_test/disagg_cancel/test_log_scanner.py \ - tests/integration/defs/stress_test/disagg_cancel/test_disagg_cancel_stress.py::test_all_marathon_yamls_parse_and_validate -q + tests/integration/defs/stress_test/disagg_cancel/ -q ``` In a full TRT-LLM dev container/venv (with `transformers` installed), @@ -118,7 +131,7 @@ pytest -sv tests/integration/defs/stress_test/disagg_cancel/test_disagg_cancel_s immediately because no workers are registered via `bind_tracked_workers()`. -### Local marathon (after `setup()` + load/canary land) +### Local marathon (after `setup()` lands) Once `setup()` launches a real 3P3D cluster and registers workers, the full 2-hour marathon runs via the same pytest entry point. For @@ -164,7 +177,7 @@ For now, when the skeleton test fails: ## Cross-references -- [PR #13713](https://github.com/NVIDIA/TensorRT-LLM/pull/13713) — +- — the bug fix this suite gates regressions against. - [TRTLLM-12648](https://jirasw.nvidia.com/browse/TRTLLM-12648), [TRTLLM-12721](https://jirasw.nvidia.com/browse/TRTLLM-12721) — diff --git a/tests/integration/defs/stress_test/disagg_cancel/configs/marathon_cpp_v1_deepseek.yaml b/tests/integration/defs/stress_test/disagg_cancel/configs/marathon_cpp_v1_deepseek.yaml index 6f8258b1c5aa..7764035ce05f 100644 --- a/tests/integration/defs/stress_test/disagg_cancel/configs/marathon_cpp_v1_deepseek.yaml +++ b/tests/integration/defs/stress_test/disagg_cancel/configs/marathon_cpp_v1_deepseek.yaml @@ -2,7 +2,7 @@ # # Exercises the C++-backed disagg path (BindKvCacheTransceiver + V1 # KVCacheManager + NIXL backend) — the configuration NVBug 6104831 -# was filed against and that PR #13713 stabilizes. Schema +# was filed against and that the in-flight cancellation fix stabilizes. Schema # documentation lives in ../README.md. hostname: localhost diff --git a/tests/integration/defs/stress_test/disagg_cancel/harness.py b/tests/integration/defs/stress_test/disagg_cancel/harness.py index f98be691a415..d85b9d88b936 100644 --- a/tests/integration/defs/stress_test/disagg_cancel/harness.py +++ b/tests/integration/defs/stress_test/disagg_cancel/harness.py @@ -28,6 +28,7 @@ from __future__ import annotations +import json import logging import os import random @@ -57,7 +58,7 @@ # simply aren't passed to the constructor, so the field defaults # apply automatically and are not duplicated here. _STRESS_CONFIG_COERCERS: dict[str, Callable[[Any], Any]] = { - "duration_min": int, + "duration_min": float, "kv_cache_manager": str, "transceiver": str, "base_concurrency": int, @@ -75,7 +76,7 @@ class StressConfig: pass them around without re-parsing. """ - duration_min: int = 120 + duration_min: float = 120.0 kv_cache_manager: str = "v1" # v1 | v2 (v2 + CPP is invalid) transceiver: str = "cpp" # cpp | python base_concurrency: int = 64 @@ -586,6 +587,227 @@ def _fetch_kv_cache_utilization( return util, None +# --------------------------------------------------------------------------- +# Canary helpers +# --------------------------------------------------------------------------- + + +def _load_canary_prompts(path: Path) -> list[dict[str, Any]]: + """Load and validate the canary prompts JSON. + + Schema (Step 6 reference generator): + {"prompts": [{"prompt": str, + "reference_token_ids": [int, ...]?, + "reference_text": str?}, ...]} + + Strict validation here keeps a malformed reference from raising + `TypeError` inside the daemon canary thread (which would + silently freeze `_canary_records`). + + Raises: + OSError: If the file cannot be opened. + ValueError: On malformed JSON, top-level not a mapping, + missing/non-list `prompts`, entry without a string + `prompt`, or `reference_token_ids` present but not a + list of ints. + """ + with path.open("r", encoding="utf-8") as f: + try: + doc = json.load(f) + except json.JSONDecodeError as exc: + raise ValueError(f"canary prompts file {path} is not valid JSON: {exc}") from exc + if not isinstance(doc, dict) or "prompts" not in doc: + raise ValueError(f"canary prompts file {path} must be an object with a 'prompts' list") + prompts = doc["prompts"] + if not isinstance(prompts, list): + raise ValueError(f"canary prompts file {path}: 'prompts' must be a list") + for i, entry in enumerate(prompts): + if not isinstance(entry, dict) or not isinstance(entry.get("prompt"), str): + raise ValueError( + f"canary prompts file {path}: prompts[{i}] must be an object with a string 'prompt'" + ) + ref = entry.get("reference_token_ids") + if ref is not None and ( + not isinstance(ref, list) or not all(isinstance(t, int) for t in ref) + ): + raise ValueError( + f"canary prompts file {path}: prompts[{i}].reference_token_ids " + "must be a list of ints (or omitted)" + ) + return prompts + + +def _send_canary_request( + server_url: str, + model: str, + prompt: str, + max_tokens: int, + seed: int, + timeout_s: float, +) -> tuple[Optional[list[int]], Optional[str], Optional[str]]: + """POST a greedy, deterministic completion to `/v1/completions`. + + Requests `detokenize=False` so the response carries generated + `token_ids` on `choices[0]` (see + `CompletionResponseChoice.token_ids` in + `tensorrt_llm/serve/openai_protocol.py`); `temperature=0.0` and + a fixed `seed` request greedy determinism. + + Returns: + `(token_ids, text, error)`. On success `error is None`. Any + failure — HTTP error, connection refused, timeout, malformed + body, or a 200 response that omits `token_ids` — folds into + a short `error` string so the canary thread records and + continues (only the log scanner is fail-fast). + """ + url = f"{server_url.rstrip('/')}/v1/completions" + payload = { + "model": model, + "prompt": prompt, + "max_tokens": max_tokens, + "temperature": 0.0, + "seed": seed, + "stream": False, + "detokenize": False, + } + data = json.dumps(payload).encode("utf-8") + req = urllib.request.Request( + url, data=data, headers={"Content-Type": "application/json"}, method="POST" + ) + try: + with urllib.request.urlopen(req, timeout=timeout_s) as response: + body = response.read().decode("utf-8", errors="replace") + except urllib.error.HTTPError as exc: + # HTTPError subclasses URLError — catch it first. + return None, None, f"http_error: {exc.code}" + except urllib.error.URLError as exc: + return None, None, f"url_error: {exc.reason}" + except (TimeoutError, OSError) as exc: + return None, None, f"io_error: {exc}" + try: + obj = json.loads(body) + choice = obj["choices"][0] + except (json.JSONDecodeError, KeyError, IndexError, TypeError) as exc: + return None, None, f"parse_error: {exc}" + token_ids = choice.get("token_ids") if isinstance(choice, dict) else None + text = choice.get("text") if isinstance(choice, dict) else None + if token_ids is None: + return None, text, "missing_token_ids" + return token_ids, text, None + + +def _tokens_equivalent(returned: Optional[list[int]], reference: Optional[list[int]]) -> bool: + """True iff `returned` exactly matches `reference`; `None` on either side is non-equivalent.""" + if returned is None or reference is None: + return False + return list(returned) == list(reference) + + +# --------------------------------------------------------------------------- +# Load-thread helpers +# --------------------------------------------------------------------------- + + +def _parse_token_range(raw: Any, default: tuple[int, int], label: str) -> tuple[int, int]: + """Parse a YAML ``input_length`` mapping into a `(min_tokens, max_tokens)` tuple.""" + if raw is None: + return default + if not isinstance(raw, dict): + raise ValueError(f"{label} must be a mapping with min_tokens/max_tokens, got {raw!r}") + try: + min_tokens = int(raw.get("min_tokens", default[0])) + max_tokens = int(raw.get("max_tokens", default[1])) + except (TypeError, ValueError) as exc: + raise ValueError(f"{label} min_tokens/max_tokens must be integers: {raw!r}") from exc + if min_tokens <= 0 or max_tokens < min_tokens: + raise ValueError( + f"{label} must satisfy 0 < min_tokens <= max_tokens, got {min_tokens}/{max_tokens}" + ) + return min_tokens, max_tokens + + +def _parse_cancel_after_range(raw: Any) -> tuple[float, float]: + """Parse optional ``cancel_after_range`` config; default to existing test values.""" + default = (0.01, 0.1) + if raw is None: + return default + if not isinstance(raw, dict): + raise ValueError(f"cancel_after_range must be a mapping, got {raw!r}") + try: + min_s = float(raw.get("min_s", raw.get("min", default[0]))) + max_s = float(raw.get("max_s", raw.get("max", default[1]))) + except (TypeError, ValueError) as exc: + raise ValueError(f"cancel_after_range min/max must be numbers: {raw!r}") from exc + if min_s < 0.0 or max_s < min_s: + raise ValueError(f"cancel_after_range must satisfy 0 <= min <= max, got {min_s}/{max_s}") + return min_s, max_s + + +def _load_iteration_shape(config: StressConfig, elapsed_s: float) -> dict[str, Any]: + """Return the load shape that should run at ``elapsed_s``. + + Bursts start after the first full ``bursts.interval_min`` period, + then repeat every interval. This keeps the marathon from starting + immediately in burst mode and preserves a steady-state baseline at + T+0. + """ + steady_prompt_range = _parse_token_range( + config.raw.get("input_length"), (4096, 12288), "stress_config.input_length" + ) + if config.base_concurrency <= 0: + raise ValueError( + f"stress_config.base_concurrency must be positive, got {config.base_concurrency}" + ) + shape: dict[str, Any] = { + "mode": "steady", + "requests_per_burst": config.base_concurrency, + "prompt_len_range": steady_prompt_range, + } + + bursts = config.raw.get("bursts") + if bursts is None: + return shape + if not isinstance(bursts, dict): + raise ValueError("stress_config.bursts must be a mapping") + + try: + interval_s = float(bursts.get("interval_min", 0.0)) * 60.0 + duration_s = float(bursts.get("duration_s", 0.0)) + except (TypeError, ValueError) as exc: + raise ValueError("stress_config.bursts interval_min/duration_s must be numbers") from exc + + if interval_s <= 0.0: + raise ValueError( + f"stress_config.bursts.interval_min must be positive, got {bursts.get('interval_min')!r}" + ) + if duration_s <= 0.0: + raise ValueError( + f"stress_config.bursts.duration_s must be positive, got {bursts.get('duration_s')!r}" + ) + if elapsed_s < interval_s: + return shape + + offset_s = elapsed_s % interval_s + if offset_s >= duration_s: + return shape + + try: + requests_per_burst = int(bursts.get("concurrency", config.base_concurrency)) + except (TypeError, ValueError) as exc: + raise ValueError("stress_config.bursts.concurrency must be an integer") from exc + if requests_per_burst <= 0: + raise ValueError( + f"stress_config.bursts.concurrency must be positive, got {requests_per_burst}" + ) + return { + "mode": "burst", + "requests_per_burst": requests_per_burst, + "prompt_len_range": _parse_token_range( + bursts.get("input_length"), steady_prompt_range, "stress_config.bursts.input_length" + ), + } + + # --------------------------------------------------------------------------- # Harness # --------------------------------------------------------------------------- @@ -607,10 +829,12 @@ class DisaggCancellationStressHarness: wind down promptly. Thread-based composition (rather than asyncio) keeps the - subprocess-control injector, the file-tailing log scanner, and - the HTTP/Prometheus metrics scraper failure-isolated and debugged - independently. The load and canary threads each run their own - asyncio event loops internally for HTTP I/O. + subprocess-control injector, the file-tailing log scanner, the + HTTP/Prometheus metrics scraper, and the HTTP canary client + failure-isolated and debugged independently. The metrics and + canary threads use blocking `urllib` for their low-rate request + streams; the load thread runs its own asyncio event loop + internally (wrapping `run_cancel_stress_test`). """ def __init__( @@ -621,6 +845,10 @@ def __init__( metrics_scrape_interval_s: float = 30.0, metrics_scrape_timeout_s: float = 5.0, injector_poll_interval_s: float = 1.0, + canary_request_timeout_s: float = 10.0, + canary_interval_s: Optional[float] = None, + load_duration_s: Optional[float] = None, + load_iteration_pause_s: float = 0.05, ) -> None: """Construct a marathon harness. @@ -645,6 +873,21 @@ def __init__( injector thread while waiting for the next scheduled event. Tests pass a smaller value to keep wall-clock latency bounded. + canary_request_timeout_s: Per-request HTTP timeout for + one canary completion; a slow/hung request becomes + an error rather than blocking the canary stream. + canary_interval_s: Optional override (seconds) for the + gap between requests. `None` derives from + `canary.rate_per_min` (`60 / rate_per_min`); tests + pass a small value. + load_duration_s: Optional override (seconds) for the load + loop duration. `None` derives from `duration_min`; + tests pass a small value. + load_iteration_pause_s: Minimum pause between load + generator calls. Keeps the wrapper from busy-spinning + when the injected load runner returns immediately in + unit tests; the production generator already spends + most of its time in HTTP requests. Raises: ValueError: If the YAML is malformed or its @@ -664,6 +907,10 @@ def __init__( self._metrics_scrape_interval_s: float = metrics_scrape_interval_s self._metrics_scrape_timeout_s: float = metrics_scrape_timeout_s self._injector_poll_interval_s: float = injector_poll_interval_s + self._canary_request_timeout_s: float = canary_request_timeout_s + self._canary_interval_s: Optional[float] = canary_interval_s + self._load_duration_s: Optional[float] = load_duration_s + self._load_iteration_pause_s: float = load_iteration_pause_s # Cluster + worker tracking (populated by setup()). self._cluster: Any = None # tuple returned by setup_disagg_cluster @@ -671,6 +918,12 @@ def __init__( self._tracked_workers: list[_TrackedWorker] = [] self._marathon_start_monotonic: float = 0.0 + # Disagg-server front-end the canary targets; populated by + # setup() or bind_server_endpoint(). None until then — the + # canary thread warns and exits. + self._server_url: Optional[str] = None + self._model_name: Optional[str] = None + # Thread handles (populated by start()). self._load_thread: Optional[threading.Thread] = None self._canary_thread: Optional[threading.Thread] = None @@ -682,6 +935,7 @@ def __init__( self._canary_records: list[dict[str, Any]] = [] self._kv_utilization_samples: list[dict[str, Any]] = [] self._injection_events: list[dict[str, Any]] = [] + self._load_records: list[dict[str, Any]] = [] # ------------------------------------------------------------------ # Lifecycle @@ -722,13 +976,23 @@ def bind_tracked_workers( ] self._worker_specs = list(ctx_specs) + list(gen_specs) + def bind_server_endpoint(self, server_url: str, model_name: str) -> None: + """Register the disagg server front-end for the canary client. + + Called by `setup()` (or tests). Until called, the canary + thread warns and exits — the lifecycle smoke has no live + server. `model_name` goes in the OpenAI envelope only; the + disagg server routes regardless. + """ + self._server_url = server_url + self._model_name = model_name + def start(self) -> None: """Spawn the five worker threads. Returns immediately. - Stub stage: each thread body is a no-op that returns - immediately. The load-thread stub signals ``stop_event`` on - exit so the lifecycle smoke ``start() -> wait_until_done() -> - stop()`` completes cleanly without waiting out the + If ``setup()`` has not bound a live server endpoint yet, the + load thread warns and signals ``stop_event`` so the lifecycle + smoke still completes cleanly without waiting out the ``wait_until_done`` timeout. """ self._marathon_start_monotonic = time.monotonic() @@ -861,6 +1125,7 @@ def collect_results(self) -> dict[str, Any]: for the caller to mutate without affecting the harness): - ``canary_records``: per-canary request outcomes. + - ``load_records``: per-load-generator call outcomes. - ``kv_utilization_samples``: timestamped KV-cache utilization scrapes from the metrics thread. - ``injection_events``: SIGSTOP / SIGCONT / SIGKILL @@ -871,6 +1136,7 @@ def collect_results(self) -> dict[str, Any]: """ return { "canary_records": list(self._canary_records), + "load_records": list(self._load_records), "kv_utilization_samples": list(self._kv_utilization_samples), "injection_events": list(self._injection_events), "failure_reason": self.failure_reason, @@ -883,26 +1149,216 @@ def collect_results(self) -> dict[str, Any]: def _load_thread_body(self) -> None: """Wrap ``run_cancel_stress_test`` in a duration-bounded loop. - Stub: no-op that immediately signals end-of-marathon via - ``stop_event``. The real implementation loops until either - ``duration_min`` elapses or ``stop_event`` is set, calling - ``run_cancel_stress_test`` repeatedly; at end-of-marathon it - sets ``stop_event`` so the other four threads wind down. - Setting ``stop_event`` here in the stub preserves that - downstream contract and lets ``wait_until_done`` return - cleanly from the lifecycle smoke. + Loops until ``duration_min`` elapses or a stop/fail-fast + event is set. Each loop iteration picks the current steady + or burst load shape from ``stress_config``, runs one burst of + the existing disagg cancellation load generator, and appends + a record to ``_load_records`` for later correlation with + canary/metrics/injection observations. + + At normal end-of-marathon, the load thread sets + ``stop_event`` so the other four threads wind down. """ - logger.debug("[load_thread] stub — exiting and signalling stop_event") - self.stop_event.set() + if not self._server_url: + logger.warning("[load_thread] no server endpoint bound (setup() not wired); exiting") + self.stop_event.set() + return - def _canary_thread_body(self) -> None: - """Send greedy-decode canaries, check token-equivalence. + duration_s = ( + self._load_duration_s + if self._load_duration_s is not None + else float(self.config.duration_min) * 60.0 + ) + if duration_s <= 0.0: + logger.info("[load_thread] non-positive duration %.3fs; exiting", duration_s) + self.stop_event.set() + return + + try: + cancel_after_range = _parse_cancel_after_range( + self.config.raw.get("cancel_after_range") + ) + except ValueError as exc: + self.mark_failed(f"load_thread config error: {exc}") + return - Stub: no-op. Real implementation loads - ``stress_canary_prompts.json``, sends 5 reqs/min, asserts - token IDs match the recorded reference. + deadline = time.monotonic() + duration_s + logger.info( + "[load_thread] running for %.1fs against %s (base_concurrency=%d)", + duration_s, + self._server_url, + self.config.base_concurrency, + ) + + try: + while ( + time.monotonic() < deadline + and not self.stop_event.is_set() + and not self.failed_event.is_set() + ): + iteration_start = time.monotonic() + elapsed_s = iteration_start - self._marathon_start_monotonic + try: + shape = _load_iteration_shape(self.config, elapsed_s) + except ValueError as exc: + self.mark_failed(f"load_thread config error: {exc}") + break + + record: dict[str, Any] = { + "timestamp": time.time(), + "elapsed_s": elapsed_s, + "mode": shape["mode"], + "num_bursts": 1, + "requests_per_burst": shape["requests_per_burst"], + "prompt_len_range": shape["prompt_len_range"], + "cancel_after_range": cancel_after_range, + "success": False, + "error": None, + } + try: + self._run_cancel_stress_iteration( + server_url=self._server_url, + num_bursts=1, + requests_per_burst=shape["requests_per_burst"], + prompt_len_range=shape["prompt_len_range"], + cancel_after_range=cancel_after_range, + ) + record["success"] = True + except Exception as exc: + record["error"] = f"{type(exc).__name__}: {exc}" + self.mark_failed(f"load_thread runner failed: {record['error']}") + break + finally: + record["duration_s"] = time.monotonic() - iteration_start + self._load_records.append(record) + + pause_s = min(self._load_iteration_pause_s, max(0.0, deadline - time.monotonic())) + if pause_s > 0.0: + self.stop_event.wait(timeout=pause_s) + finally: + if not self.failed_event.is_set(): + logger.info("[load_thread] completed; signalling stop_event") + self.stop_event.set() + + def _run_cancel_stress_iteration( + self, + *, + server_url: str, + num_bursts: int, + requests_per_burst: int, + prompt_len_range: tuple[int, int], + cancel_after_range: tuple[float, float], + ) -> None: + """Run one call to the shared disaggregated cancellation load generator. + + Kept as a method so unit tests can monkeypatch it without + importing the heavyweight disaggregated integration module. + """ + from test_disaggregated import run_cancel_stress_test + + run_cancel_stress_test( + server_url, + num_bursts=num_bursts, + requests_per_burst=requests_per_burst, + prompt_len_range=prompt_len_range, + cancel_after_range=cancel_after_range, + ) + + def _canary_thread_body(self) -> None: + """Send greedy canaries and append per-request records to `_canary_records`. + + Each record: `{timestamp, elapsed_s, prompt_index, success, + token_equivalent, latency_s, error}`. `token_equivalent` is + True/False when a reference is recorded and the check is + enabled, else None. Failures are recorded — not fail-fast — + because errors during bursts/injections are expected; the + end-of-marathon gates (error rate, recovery time) are + computed from these records later. + + Exits on `stop_event` or `failed_event`. The between-request + wait only observes `stop_event`, so `failed_event` is acted + on at the next request boundary (max lag = one interval); + the metrics thread has the same gap, a shared `wait_for_any` + helper is deferred to a follow-up PR. Warns and exits if the + server endpoint or prompts file is absent. """ - logger.debug("[canary_thread] stub — exiting immediately") + canary_cfg = self.config.raw.get("canary") or {} + if not self._server_url: + logger.warning("[canary] no server endpoint bound (setup() not wired); exiting") + return + prompts_file = canary_cfg.get("prompts_file") + if not prompts_file: + logger.warning("[canary] no canary.prompts_file in config; exiting") + return + prompts_path = Path(prompts_file) + if not prompts_path.is_absolute(): + prompts_path = self.yaml_path.parent / prompts_path + try: + prompts = _load_canary_prompts(prompts_path) + except (OSError, ValueError) as exc: + logger.warning("[canary] cannot load prompts %s: %s; exiting", prompts_path, exc) + return + if not prompts: + logger.warning("[canary] prompts file %s has no prompts; exiting", prompts_path) + return + + if self._canary_interval_s is not None: + interval_s = self._canary_interval_s + else: + rate_per_min = float(canary_cfg.get("rate_per_min") or 0) + if rate_per_min <= 0: + logger.warning( + "[canary] canary.rate_per_min is missing/zero/negative; defaulting to 5/min" + ) + rate_per_min = 5.0 + interval_s = 60.0 / rate_per_min + max_tokens = int(canary_cfg.get("max_tokens", 128)) + seed = int(canary_cfg.get("seed", 42)) + check_token_equiv = bool(canary_cfg.get("check_token_equivalent", True)) + model = self._model_name or "canary" + + logger.info( + "[canary] interval %.2fs over %d prompt(s) to %s", + interval_s, + len(prompts), + self._server_url, + ) + + idx = 0 + while not self.stop_event.is_set() and not self.failed_event.is_set(): + send_start = time.monotonic() + prompt_index = idx % len(prompts) + entry = prompts[prompt_index] + idx += 1 + reference = entry.get("reference_token_ids") + token_ids, _, err = _send_canary_request( + self._server_url, + model, + entry["prompt"], + max_tokens, + seed, + self._canary_request_timeout_s, + ) + success = err is None + token_equivalent: Optional[bool] = None + if success and check_token_equiv and reference is not None: + token_equivalent = _tokens_equivalent(token_ids, reference) + self._canary_records.append( + { + "timestamp": time.time(), + "elapsed_s": time.monotonic() - self._marathon_start_monotonic, + "prompt_index": prompt_index, + "success": success, + "token_equivalent": token_equivalent, + "latency_s": time.monotonic() - send_start, + "error": err, + } + ) + remaining = interval_s - (time.monotonic() - send_start) + if remaining > 0.0: + self.stop_event.wait(timeout=remaining) + + logger.debug("[canary] exiting; %d record(s)", len(self._canary_records)) def _injector_thread_body(self) -> None: """Fire SIGSTOP / SIGCONT / SIGKILL+respawn on the configured schedule. diff --git a/tests/integration/defs/stress_test/disagg_cancel/test_canary.py b/tests/integration/defs/stress_test/disagg_cancel/test_canary.py new file mode 100644 index 000000000000..8cd3f0b803f5 --- /dev/null +++ b/tests/integration/defs/stress_test/disagg_cancel/test_canary.py @@ -0,0 +1,494 @@ +# SPDX-FileCopyrightText: Copyright (c) 2024-2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. +# SPDX-License-Identifier: Apache-2.0 +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. +"""Unit tests for `DisaggCancellationStressHarness._canary_thread_body`. + +Loader and token-equivalence helpers run directly. Transport and +thread behavior run against an in-process HTTP server that answers +`POST /v1/completions` with configurable payloads. +""" + +from __future__ import annotations + +import json +import socket +import textwrap +import threading +import time +from http.server import BaseHTTPRequestHandler, HTTPServer +from pathlib import Path + +import pytest + +from .harness import ( + DisaggCancellationStressHarness, + _load_canary_prompts, + _send_canary_request, + _tokens_equivalent, +) + +# --------------------------------------------------------------------------- +# Fixtures and helpers +# --------------------------------------------------------------------------- + + +def _pick_port() -> int: + """Bind-and-release to return an OS-allocated free TCP port.""" + with socket.socket(socket.AF_INET, socket.SOCK_STREAM) as s: + s.bind(("127.0.0.1", 0)) + return s.getsockname()[1] + + +class _CompletionsHandler(BaseHTTPRequestHandler): + """Answers `POST /v1/completions`. + + Tests mutate `server.token_ids` / `text` / `status` / `raw_body` + to drive outcomes and read `server.request_bodies` for + wire-format assertions. + """ + + def do_POST(self) -> None: # noqa: N802 — fixed by BaseHTTPRequestHandler + if self.path != "/v1/completions": + self.send_response(404) + self.end_headers() + return + length = int(self.headers.get("Content-Length", 0)) + body = self.rfile.read(length) if length else b"" + try: + self.server.request_bodies.append(json.loads(body)) # type: ignore[attr-defined] + except (json.JSONDecodeError, AttributeError): + pass + + status = getattr(self.server, "status", 200) + if status != 200: + self.send_response(status) + self.end_headers() + return + + raw_body = getattr(self.server, "raw_body", None) + if raw_body is not None: + encoded = raw_body.encode("utf-8") + else: + payload = { + "choices": [ + { + "token_ids": getattr(self.server, "token_ids", None), + "text": getattr(self.server, "text", ""), + } + ] + } + encoded = json.dumps(payload).encode("utf-8") + self.send_response(200) + self.send_header("Content-Type", "application/json") + self.send_header("Content-Length", str(len(encoded))) + self.end_headers() + self.wfile.write(encoded) + + def log_message(self, *_args, **_kwargs) -> None: # silence test noise + pass + + +@pytest.fixture +def completions_server(): + """In-process HTTP server answering `POST /v1/completions`; yields `(server, port)`.""" + port = _pick_port() + server = HTTPServer(("127.0.0.1", port), _CompletionsHandler) + server.token_ids = [1, 2, 3] # type: ignore[attr-defined] + server.text = "ok" # type: ignore[attr-defined] + server.status = 200 # type: ignore[attr-defined] + server.raw_body = None # type: ignore[attr-defined] + server.request_bodies = [] # type: ignore[attr-defined] + thread = threading.Thread(target=server.serve_forever, daemon=True) + thread.start() + try: + yield server, port + finally: + server.shutdown() + server.server_close() + thread.join(timeout=2.0) + + +def _write_prompts(tmp_path: Path, entries: list[dict]) -> Path: + path = tmp_path / "stress_canary_prompts.json" + path.write_text(json.dumps({"prompts": entries}), encoding="utf-8") + return path + + +_CANARY_YAML = textwrap.dedent( + """\ + hostname: localhost + model: dummy + backend: pytorch + context_servers: {{}} + generation_servers: {{}} + stress_config: + duration_min: 1 + kv_cache_manager: v1 + transceiver: cpp + canary: + prompts_file: {prompts_file} + rate_per_min: 5 + max_tokens: 8 + seed: 42 + check_token_equivalent: {check_equiv} + """ +) + + +def _make_harness( + tmp_path: Path, + *, + prompts_file: str = "stress_canary_prompts.json", + check_equiv: bool = True, + server_url: str | None = "http://127.0.0.1:1", +) -> DisaggCancellationStressHarness: + """Construct a canary harness with a small interval and bound endpoint.""" + yaml_path = tmp_path / "marathon.yaml" + yaml_path.write_text( + _CANARY_YAML.format( + prompts_file=prompts_file, + check_equiv="true" if check_equiv else "false", + ) + ) + h = DisaggCancellationStressHarness( + yaml_path, + canary_interval_s=0.02, + canary_request_timeout_s=1.0, + ) + if server_url is not None: + h.bind_server_endpoint(server_url, "test-model") + return h + + +def _run_canary_thread_briefly(h: DisaggCancellationStressHarness, duration_s: float) -> None: + """Drive `_canary_thread_body` for `duration_s` then stop.""" + thread = threading.Thread(target=h._canary_thread_body, daemon=True) + thread.start() + time.sleep(duration_s) + h.stop_event.set() + thread.join(timeout=2.0) + assert not thread.is_alive(), "canary thread failed to exit after stop_event" + + +def _run_until_self_exit(h: DisaggCancellationStressHarness) -> None: + """Spawn the thread and wait for it to exit on its own (warn-and-return paths).""" + thread = threading.Thread(target=h._canary_thread_body, daemon=True) + thread.start() + thread.join(timeout=2.0) + assert not thread.is_alive() + + +def _wait_until(predicate, *, timeout_s: float, poll_s: float = 0.01) -> None: + deadline = time.monotonic() + timeout_s + while time.monotonic() < deadline: + if predicate(): + return + time.sleep(poll_s) + raise AssertionError(f"predicate did not become true within {timeout_s}s") + + +# --------------------------------------------------------------------------- +# Prompt-loader tests +# --------------------------------------------------------------------------- + + +def test_load_prompts_valid(tmp_path: Path) -> None: + path = _write_prompts( + tmp_path, + [ + {"prompt": "hello", "reference_token_ids": [1, 2]}, + {"prompt": "world", "reference_token_ids": [3, 4], "reference_text": "w"}, + ], + ) + prompts = _load_canary_prompts(path) + assert len(prompts) == 2 + assert prompts[0]["prompt"] == "hello" + assert prompts[1]["reference_token_ids"] == [3, 4] + + +def test_load_prompts_reference_token_ids_omitted_is_allowed(tmp_path: Path) -> None: + path = _write_prompts(tmp_path, [{"prompt": "p"}]) + assert _load_canary_prompts(path) == [{"prompt": "p"}] + + +@pytest.mark.parametrize( + "raw_content,match", + [ + pytest.param("{not valid json", "not valid JSON", id="malformed-json"), + pytest.param(json.dumps({"items": []}), "'prompts' list", id="missing-prompts-key"), + pytest.param( + json.dumps({"prompts": {"prompt": "x"}}), "must be a list", id="prompts-not-list" + ), + pytest.param( + json.dumps({"prompts": [{"reference_token_ids": [1]}]}), + "string 'prompt'", + id="entry-missing-prompt", + ), + pytest.param( + json.dumps({"prompts": [{"prompt": "p", "reference_token_ids": 123}]}), + "reference_token_ids", + id="reftokens-not-list", + ), + pytest.param( + json.dumps({"prompts": [{"prompt": "p", "reference_token_ids": [1, "two"]}]}), + "reference_token_ids", + id="reftokens-non-int-element", + ), + ], +) +def test_load_prompts_invalid_raises(tmp_path: Path, raw_content: str, match: str) -> None: + path = tmp_path / "p.json" + path.write_text(raw_content, encoding="utf-8") + with pytest.raises(ValueError, match=match): + _load_canary_prompts(path) + + +# --------------------------------------------------------------------------- +# Token-equivalence helper tests +# --------------------------------------------------------------------------- + + +def test_tokens_equivalent_exact_match() -> None: + assert _tokens_equivalent([1, 2, 3], [1, 2, 3]) is True + + +def test_tokens_equivalent_mismatch() -> None: + assert _tokens_equivalent([1, 2, 3], [1, 2, 4]) is False + assert _tokens_equivalent([1, 2], [1, 2, 3]) is False + + +def test_tokens_equivalent_none_is_false() -> None: + assert _tokens_equivalent(None, [1, 2]) is False + assert _tokens_equivalent([1, 2], None) is False + assert _tokens_equivalent(None, None) is False + + +# --------------------------------------------------------------------------- +# Send-request tests (in-process HTTP server) +# --------------------------------------------------------------------------- + + +def test_send_success_returns_token_ids(completions_server) -> None: + server, port = completions_server + server.token_ids = [10, 20, 30] + server.text = "hi" + token_ids, text, err = _send_canary_request( + f"http://127.0.0.1:{port}", "m", "prompt", max_tokens=8, seed=42, timeout_s=1.0 + ) + assert err is None + assert token_ids == [10, 20, 30] + assert text == "hi" + + +def test_send_http_503_returns_http_error(completions_server) -> None: + server, port = completions_server + server.status = 503 + token_ids, text, err = _send_canary_request( + f"http://127.0.0.1:{port}", "m", "prompt", max_tokens=8, seed=42, timeout_s=1.0 + ) + assert token_ids is None and text is None + assert err is not None and err.startswith("http_error: 503") + + +def test_send_connection_refused_returns_url_error() -> None: + port = _pick_port() # nobody listening + token_ids, _text, err = _send_canary_request( + f"http://127.0.0.1:{port}", "m", "prompt", max_tokens=8, seed=42, timeout_s=0.5 + ) + assert token_ids is None + assert err is not None and err.startswith("url_error") + + +def test_send_malformed_body_returns_parse_error(completions_server) -> None: + server, port = completions_server + server.raw_body = "{not json" + token_ids, _text, err = _send_canary_request( + f"http://127.0.0.1:{port}", "m", "prompt", max_tokens=8, seed=42, timeout_s=1.0 + ) + assert token_ids is None + assert err is not None and err.startswith("parse_error") + + +def test_send_missing_token_ids_returns_error(completions_server) -> None: + # 200 with `choices[0]` lacking `token_ids` is a server problem, + # not a token-equivalence mismatch downstream. + server, port = completions_server + server.token_ids = None + server.text = "hi" + token_ids, text, err = _send_canary_request( + f"http://127.0.0.1:{port}", "m", "prompt", max_tokens=8, seed=42, timeout_s=1.0 + ) + assert token_ids is None + assert text == "hi" + assert err == "missing_token_ids" + + +def test_send_wire_format_includes_greedy_determinism_knobs(completions_server) -> None: + # Pin the wire shape so a future change can't silently drop + # `temperature=0.0` / `seed` / `detokenize=False`. + server, port = completions_server + _send_canary_request( + f"http://127.0.0.1:{port}", + "test-model", + "the prompt", + max_tokens=11, + seed=7, + timeout_s=1.0, + ) + assert len(server.request_bodies) == 1 + body = server.request_bodies[0] + assert body["model"] == "test-model" + assert body["prompt"] == "the prompt" + assert body["max_tokens"] == 11 + assert body["temperature"] == 0.0 + assert body["seed"] == 7 + assert body["stream"] is False + assert body["detokenize"] is False + + +# --------------------------------------------------------------------------- +# Thread-body integration tests +# --------------------------------------------------------------------------- + + +@pytest.mark.parametrize( + "server_tokens,ref_tokens,check_equiv,expected", + [ + pytest.param([1, 2, 3], [1, 2, 3], True, True, id="match"), + pytest.param([9, 9, 9], [1, 2, 3], True, False, id="mismatch"), + pytest.param([1, 2, 3], None, True, None, id="no-reference"), + pytest.param([1, 2, 3], [1, 2, 3], False, None, id="check-disabled"), + ], +) +def test_thread_records_token_equivalent( + tmp_path, completions_server, server_tokens, ref_tokens, check_equiv, expected +) -> None: + server, port = completions_server + server.token_ids = server_tokens + entry: dict = {"prompt": "p"} + if ref_tokens is not None: + entry["reference_token_ids"] = ref_tokens + _write_prompts(tmp_path, [entry]) + h = _make_harness(tmp_path, check_equiv=check_equiv, server_url=f"http://127.0.0.1:{port}") + + _run_canary_thread_briefly(h, duration_s=0.15) + + assert len(h._canary_records) >= 1 + for rec in h._canary_records: + assert rec["success"] is True + assert rec["error"] is None + assert rec["token_equivalent"] is expected + + +def test_thread_records_error_when_server_down(tmp_path) -> None: + port = _pick_port() # nobody listening + _write_prompts(tmp_path, [{"prompt": "p", "reference_token_ids": [1]}]) + h = _make_harness(tmp_path, server_url=f"http://127.0.0.1:{port}") + + _run_canary_thread_briefly(h, duration_s=0.15) + + assert len(h._canary_records) >= 1 + for rec in h._canary_records: + assert rec["success"] is False + assert rec["token_equivalent"] is None + assert rec["error"] is not None + + +def test_thread_round_robins_prompts(tmp_path, completions_server) -> None: + server, port = completions_server + server.token_ids = [1] + _write_prompts( + tmp_path, + [ + {"prompt": "p0", "reference_token_ids": [1]}, + {"prompt": "p1", "reference_token_ids": [1]}, + {"prompt": "p2", "reference_token_ids": [1]}, + ], + ) + h = _make_harness(tmp_path, server_url=f"http://127.0.0.1:{port}") + + thread = threading.Thread(target=h._canary_thread_body, daemon=True) + thread.start() + try: + _wait_until(lambda: len(h._canary_records) >= 4, timeout_s=2.0) + finally: + h.stop_event.set() + thread.join(timeout=2.0) + + seen = {rec["prompt_index"] for rec in h._canary_records} + assert {0, 1, 2}.issubset(seen) + + +def test_thread_exits_when_no_server_url(tmp_path) -> None: + _write_prompts(tmp_path, [{"prompt": "p", "reference_token_ids": [1]}]) + h = _make_harness(tmp_path, server_url=None) + _run_until_self_exit(h) + assert h._canary_records == [] + + +def test_thread_exits_when_prompts_file_missing(tmp_path, completions_server) -> None: + _, port = completions_server + h = _make_harness( + tmp_path, prompts_file="does_not_exist.json", server_url=f"http://127.0.0.1:{port}" + ) + _run_until_self_exit(h) + assert h._canary_records == [] + + +def test_thread_exits_when_prompts_list_empty(tmp_path, completions_server) -> None: + _, port = completions_server + _write_prompts(tmp_path, []) + h = _make_harness(tmp_path, server_url=f"http://127.0.0.1:{port}") + _run_until_self_exit(h) + assert h._canary_records == [] + + +def test_thread_exits_promptly_on_failed_event(tmp_path, completions_server) -> None: + # The between-request wait only observes `stop_event`; verify + # `failed_event` is acted on within one canary interval (records + # grow by at most one after the event fires). + _, port = completions_server + _write_prompts(tmp_path, [{"prompt": "p", "reference_token_ids": [1, 2, 3]}]) + h = _make_harness(tmp_path, server_url=f"http://127.0.0.1:{port}") + + thread = threading.Thread(target=h._canary_thread_body, daemon=True) + thread.start() + _wait_until(lambda: len(h._canary_records) >= 1, timeout_s=2.0) + pre = len(h._canary_records) + h.failed_event.set() + thread.join(timeout=2.0) + assert not thread.is_alive() + assert len(h._canary_records) - pre <= 1 + + +def test_thread_resolves_absolute_prompts_path(tmp_path, completions_server) -> None: + # Absolute `prompts_file` must NOT be joined against `yaml_path.parent`. + server, port = completions_server + server.token_ids = [1, 2, 3] + outside_dir = tmp_path / "elsewhere" + outside_dir.mkdir() + prompts_path = outside_dir / "abs_prompts.json" + prompts_path.write_text( + json.dumps({"prompts": [{"prompt": "p", "reference_token_ids": [1, 2, 3]}]}), + encoding="utf-8", + ) + h = _make_harness( + tmp_path, prompts_file=str(prompts_path), server_url=f"http://127.0.0.1:{port}" + ) + + _run_canary_thread_briefly(h, duration_s=0.15) + + assert len(h._canary_records) >= 1 + assert all(rec["success"] is True for rec in h._canary_records) + assert all(rec["token_equivalent"] is True for rec in h._canary_records) diff --git a/tests/integration/defs/stress_test/disagg_cancel/test_disagg_cancel_stress.py b/tests/integration/defs/stress_test/disagg_cancel/test_disagg_cancel_stress.py index 7065e0a53ab8..36d5b607d3bb 100644 --- a/tests/integration/defs/stress_test/disagg_cancel/test_disagg_cancel_stress.py +++ b/tests/integration/defs/stress_test/disagg_cancel/test_disagg_cancel_stress.py @@ -61,7 +61,8 @@ def test_disagg_cancellation_marathon(config_filename: str) -> None: Current scope: only what the already-implemented thread bodies can contribute. The marathon entry point exists; the marathon - *content* lands incrementally as each thread body is wired up: + *content* lands incrementally as setup / pass-criteria wiring is + completed: - lifecycle plumbing (setup -> start -> wait -> stop -> collect_results, fail-fast event propagation, dict-shape @@ -71,7 +72,7 @@ def test_disagg_cancellation_marathon(config_filename: str) -> None: (component-level coverage in ``test_log_scanner.py``). Marathon pass criteria not yet enforced here (will land alongside - their owning thread bodies in follow-up changes): canary error + their owning result aggregation in follow-up changes): canary error rate, recovery time after each injection, KV-cache utilization growth bound, injection-schedule completeness, sustained load throughput. Until those land, this test passes trivially after @@ -89,13 +90,12 @@ def test_disagg_cancellation_marathon(config_filename: str) -> None: try: harness.setup() harness.start() - # Skeleton stage: stub threads exit immediately; the - # load-thread stub signals ``stop_event`` on exit so this - # returns cleanly (True) almost instantly. Once the - # duration-bounded load thread is wired up, the timeout - # becomes ``stress_config.duration_min`` plus a safety - # margin, and ``clean`` reports whether the marathon ran to - # completion without tripping fail-fast. + # setup() is still a stub, so no server endpoint is bound. + # The load thread exits and signals ``stop_event`` on that + # no-endpoint path, which lets this lifecycle smoke complete + # almost instantly. Once setup launches a real cluster, the + # timeout becomes ``stress_config.duration_min`` plus a safety + # margin. clean = harness.wait_until_done(timeout_s=10.0) assert clean is True, ( f"wait_until_done did not return cleanly; failure_reason={harness.failure_reason!r}" @@ -108,6 +108,7 @@ def test_disagg_cancellation_marathon(config_filename: str) -> None: # collector returns the expected shape so future commits can # extend in place. assert "canary_records" in results + assert "load_records" in results assert "kv_utilization_samples" in results assert "injection_events" in results assert results["failure_reason"] is None, ( diff --git a/tests/integration/defs/stress_test/disagg_cancel/test_load_thread.py b/tests/integration/defs/stress_test/disagg_cancel/test_load_thread.py new file mode 100644 index 000000000000..56ebc2315e31 --- /dev/null +++ b/tests/integration/defs/stress_test/disagg_cancel/test_load_thread.py @@ -0,0 +1,276 @@ +# SPDX-FileCopyrightText: Copyright (c) 2024-2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. +# SPDX-License-Identifier: Apache-2.0 +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. +"""Unit tests for ``DisaggCancellationStressHarness._load_thread_body``. + +The load thread is tested with a monkeypatched +``_run_cancel_stress_iteration`` so these tests do not import the +heavy disaggregated integration module, start a server, or require +GPU/model resources. +""" + +from __future__ import annotations + +import textwrap +import threading +import time +from pathlib import Path +from typing import Any + +import pytest + +from .harness import ( + DisaggCancellationStressHarness, + StressConfig, + _load_iteration_shape, + _parse_cancel_after_range, + _parse_token_range, +) + + +def _write_load_yaml( + tmp_path: Path, + *, + extra_stress_config: str = "", +) -> Path: + """Write a minimal valid marathon YAML for load-thread tests.""" + yaml_path = tmp_path / "stress.yaml" + content = textwrap.dedent( + """\ + hostname: localhost + model: dummy + backend: pytorch + context_servers: {} + generation_servers: {} + stress_config: + duration_min: 1 + kv_cache_manager: v1 + transceiver: cpp + base_concurrency: 4 + input_length: + distribution: uniform + min_tokens: 11 + max_tokens: 22 + """ + ) + if extra_stress_config: + content += textwrap.indent(textwrap.dedent(extra_stress_config).strip(), " ") + "\n" + yaml_path.write_text(content) + return yaml_path + + +def _make_harness( + tmp_path: Path, + *, + extra_stress_config: str = "", + load_duration_s: float = 0.05, +) -> DisaggCancellationStressHarness: + """Construct a load-thread harness with a short test duration.""" + h = DisaggCancellationStressHarness( + _write_load_yaml(tmp_path, extra_stress_config=extra_stress_config), + load_duration_s=load_duration_s, + load_iteration_pause_s=0.005, + ) + h.bind_server_endpoint("http://127.0.0.1:8000", "test-model") + h._marathon_start_monotonic = time.monotonic() + return h + + +def _run_load_thread(h: DisaggCancellationStressHarness, timeout_s: float = 2.0) -> None: + """Run the load thread to self-exit and assert it joined.""" + thread = threading.Thread(target=h._load_thread_body, name="test-load", daemon=True) + thread.start() + thread.join(timeout=timeout_s) + assert not thread.is_alive(), "load thread did not exit within timeout" + + +def test_parse_token_range_defaults_and_validates() -> None: + assert _parse_token_range(None, (1, 2), "input") == (1, 2) + assert _parse_token_range({"min_tokens": "3", "max_tokens": 5}, (1, 2), "input") == ( + 3, + 5, + ) + with pytest.raises(ValueError, match="min_tokens <= max_tokens"): + _parse_token_range({"min_tokens": 8, "max_tokens": 7}, (1, 2), "input") + + +def test_parse_cancel_after_range_defaults_and_validates() -> None: + assert _parse_cancel_after_range(None) == pytest.approx((0.01, 0.1)) + assert _parse_cancel_after_range({"min_s": 0.2, "max_s": 0.4}) == pytest.approx((0.2, 0.4)) + with pytest.raises(ValueError, match="0 <= min <= max"): + _parse_cancel_after_range({"min_s": 0.5, "max_s": 0.4}) + + +def test_load_iteration_shape_switches_from_steady_to_burst(tmp_path: Path) -> None: + yaml_path = _write_load_yaml( + tmp_path, + extra_stress_config=textwrap.dedent( + """\ + bursts: + interval_min: 1 + concurrency: 9 + duration_s: 10 + input_length: + min_tokens: 33 + max_tokens: 44 + """ + ), + ) + cfg = StressConfig.from_yaml_path(yaml_path) + + steady = _load_iteration_shape(cfg, elapsed_s=30) + assert steady["mode"] == "steady" + assert steady["requests_per_burst"] == 4 + assert steady["prompt_len_range"] == (11, 22) + + burst = _load_iteration_shape(cfg, elapsed_s=61) + assert burst["mode"] == "burst" + assert burst["requests_per_burst"] == 9 + assert burst["prompt_len_range"] == (33, 44) + + +@pytest.mark.parametrize( + ("burst_config", "match"), + [ + ( + "interval_min: 0\nconcurrency: 9\nduration_s: 10\n", + "bursts.interval_min must be positive", + ), + ( + "interval_min: 1\nconcurrency: 9\nduration_s: 0\n", + "bursts.duration_s must be positive", + ), + ], +) +def test_load_iteration_shape_rejects_invalid_burst_timing( + tmp_path: Path, burst_config: str, match: str +) -> None: + yaml_path = _write_load_yaml( + tmp_path, + extra_stress_config="bursts:\n" + textwrap.indent(burst_config, " "), + ) + cfg = StressConfig.from_yaml_path(yaml_path) + + with pytest.raises(ValueError, match=match): + _load_iteration_shape(cfg, elapsed_s=61) + + +def test_load_thread_without_server_endpoint_exits_and_signals_stop(tmp_path: Path) -> None: + h = DisaggCancellationStressHarness( + _write_load_yaml(tmp_path), + load_duration_s=0.05, + load_iteration_pause_s=0.005, + ) + + _run_load_thread(h) + + assert h.stop_event.is_set() + assert h._load_records == [] + + +def test_load_thread_runs_steady_iterations_and_records_results( + tmp_path: Path, monkeypatch: pytest.MonkeyPatch +) -> None: + h = _make_harness(tmp_path) + calls: list[dict[str, Any]] = [] + + def fake_runner(**kwargs: Any) -> None: + calls.append(kwargs) + time.sleep(0.002) + + monkeypatch.setattr(h, "_run_cancel_stress_iteration", fake_runner) + + _run_load_thread(h) + + assert h.stop_event.is_set() + assert not h.failed_event.is_set() + assert len(calls) >= 1 + assert len(h._load_records) == len(calls) + assert all(record["mode"] == "steady" for record in h._load_records) + assert calls[0]["server_url"] == "http://127.0.0.1:8000" + assert calls[0]["num_bursts"] == 1 + assert calls[0]["requests_per_burst"] == 4 + assert calls[0]["prompt_len_range"] == (11, 22) + + +def test_load_thread_uses_burst_shape_inside_burst_window( + tmp_path: Path, monkeypatch: pytest.MonkeyPatch +) -> None: + h = _make_harness( + tmp_path, + extra_stress_config=textwrap.dedent( + """\ + bursts: + interval_min: 0.001 + concurrency: 9 + duration_s: 0.04 + input_length: + min_tokens: 33 + max_tokens: 44 + """ + ), + load_duration_s=0.12, + ) + + def fake_runner(**_kwargs: Any) -> None: + time.sleep(0.004) + + monkeypatch.setattr(h, "_run_cancel_stress_iteration", fake_runner) + + _run_load_thread(h) + + modes = {record["mode"] for record in h._load_records} + assert modes == {"steady", "burst"} + burst_records = [record for record in h._load_records if record["mode"] == "burst"] + assert burst_records + assert all(record["requests_per_burst"] == 9 for record in burst_records) + assert all(record["prompt_len_range"] == (33, 44) for record in burst_records) + + +def test_load_thread_observes_stop_event_after_runner_returns( + tmp_path: Path, monkeypatch: pytest.MonkeyPatch +) -> None: + h = _make_harness(tmp_path, load_duration_s=10.0) + calls: list[dict[str, Any]] = [] + + def fake_runner(**kwargs: Any) -> None: + calls.append(kwargs) + h.stop_event.set() + + monkeypatch.setattr(h, "_run_cancel_stress_iteration", fake_runner) + + _run_load_thread(h) + + assert len(calls) == 1 + assert len(h._load_records) == 1 + assert h._load_records[0]["success"] is True + + +def test_load_thread_runner_exception_trips_fail_fast( + tmp_path: Path, monkeypatch: pytest.MonkeyPatch +) -> None: + h = _make_harness(tmp_path, load_duration_s=10.0) + + def fake_runner(**_kwargs: Any) -> None: + raise RuntimeError("boom") + + monkeypatch.setattr(h, "_run_cancel_stress_iteration", fake_runner) + + _run_load_thread(h) + + assert h.failed_event.is_set() + assert h.failure_reason == "load_thread runner failed: RuntimeError: boom" + assert len(h._load_records) == 1 + assert h._load_records[0]["success"] is False + assert h._load_records[0]["error"] == "RuntimeError: boom" diff --git a/tests/integration/test_lists/qa/llm_function_core.txt b/tests/integration/test_lists/qa/llm_function_core.txt index 5526145cae72..abf767594b3f 100644 --- a/tests/integration/test_lists/qa/llm_function_core.txt +++ b/tests/integration/test_lists/qa/llm_function_core.txt @@ -98,6 +98,9 @@ accuracy/test_disaggregated_serving.py::TestQwen3_8B::test_chunked_prefill accuracy/test_disaggregated_serving.py::TestQwen3_8B::test_gen_first[noadp-ctx_tp2pp1-gen_tp1pp1] accuracy/test_disaggregated_serving.py::TestQwen3_8B::test_gen_first[adp-ctx_tp2pp1-gen_tp2pp1] accuracy/test_disaggregated_serving.py::TestQwen3_8B::test_nixl_backend +accuracy/test_epd_disagg_multimodal.py::TestVideoMMEEPD::test_disaggregated_videomme[qwen3vl_2b_instruct] +accuracy/test_epd_disagg_multimodal.py::TestVideoMMEEPD::test_disaggregated_videomme[nemotron_nano_v3_omni_fp8] +accuracy/test_epd_disagg_multimodal.py::TestVideoMMEEPD::test_disaggregated_videomme[nemotron_nano_v3_omni_nvfp4] accuracy/test_disaggregated_serving.py::TestQwen3NextInstruct::test_auto_dtype[use_py_transceiver=False] accuracy/test_disaggregated_serving.py::TestQwen3NextInstruct::test_auto_dtype[use_py_transceiver=True] accuracy/test_dwdp_disaggregated_serving.py::TestDwdpDeepSeekV3Lite::test_dwdp_accuracy @@ -123,12 +126,12 @@ accuracy/test_llm_api_autodeploy.py::TestModelRegistryAccuracy::test_autodeploy_ accuracy/test_llm_api_autodeploy.py::TestNemotronH::test_auto_dtype[trtllm-flashinfer_ssm-False] accuracy/test_llm_api_autodeploy.py::TestNemotronH::test_auto_dtype[trtllm-triton_ssm-False] accuracy/test_llm_api_autodeploy.py::TestNemotronH::test_auto_dtype[trtllm-triton_ssm-True] -accuracy/test_llm_api_autodeploy.py::TestNemotronNanoV3::test_accuracy[bf16-1-trtllm] -accuracy/test_llm_api_autodeploy.py::TestNemotronNanoV3::test_accuracy[bf16-4-trtllm] -accuracy/test_llm_api_autodeploy.py::TestNemotronNanoV3::test_accuracy[fp8-1-trtllm] -accuracy/test_llm_api_autodeploy.py::TestNemotronNanoV3::test_accuracy[fp8-4-trtllm] -accuracy/test_llm_api_autodeploy.py::TestNemotronNanoV3::test_accuracy[nvfp4-1-trtllm] -accuracy/test_llm_api_autodeploy.py::TestNemotronNanoV3::test_accuracy[nvfp4-4-trtllm] +accuracy/test_llm_api_autodeploy.py::TestNemotronNanoV3::test_accuracy[bf16-1-attn_dp_off-trtllm] +accuracy/test_llm_api_autodeploy.py::TestNemotronNanoV3::test_accuracy[bf16-4-attn_dp_off-trtllm] +accuracy/test_llm_api_autodeploy.py::TestNemotronNanoV3::test_accuracy[fp8-1-attn_dp_off-trtllm] +accuracy/test_llm_api_autodeploy.py::TestNemotronNanoV3::test_accuracy[fp8-4-attn_dp_off-trtllm] +accuracy/test_llm_api_autodeploy.py::TestNemotronNanoV3::test_accuracy[nvfp4-1-attn_dp_off-trtllm] +accuracy/test_llm_api_autodeploy.py::TestNemotronNanoV3::test_accuracy[nvfp4-4-attn_dp_off-trtllm] accuracy/test_llm_api_autodeploy.py::TestNemotronSuperV3::test_accuracy[bf16-4-attn_dp_off-trtllm] accuracy/test_llm_api_autodeploy.py::TestNemotronSuperV3::test_accuracy[bf16-4-attn_dp_on-trtllm] accuracy/test_llm_api_autodeploy.py::TestNemotronSuperV3::test_accuracy[fp8-4-attn_dp_off-trtllm] @@ -699,6 +702,8 @@ accuracy/test_llm_api_pytorch.py::TestNemotronV3Super::test_nvfp4_parallelism[TP accuracy/test_llm_api_pytorch.py::TestNemotronV3Super::test_nvfp4_parallelism[TP8_PP1] accuracy/test_llm_api_pytorch.py::TestNemotronV3Super::test_nvfp4_parallelism[TP8_PP1_ADP] accuracy/test_llm_api_pytorch.py::TestNemotronV3Super::test_nvfp4_4gpus_block_reuse[TEP4_ADP_MTP] +accuracy/test_llm_api_pytorch.py::TestNemotronV3Super::test_bf16_trtllm_gen_moe_backend[attention_dp=True] +accuracy/test_llm_api_pytorch.py::TestNemotronV3Super::test_bf16_trtllm_gen_moe_backend[attention_dp=False] accuracy/test_llm_api_pytorch.py::TestPhi4MiniInstruct::test_auto_dtype accuracy/test_llm_api_pytorch.py::TestQwen2_7BInstruct::test_auto_dtype accuracy/test_llm_api_pytorch.py::TestQwen3_235B_A22B::test_fp8[latency] @@ -746,6 +751,7 @@ accuracy/test_llm_api_pytorch.py::TestQwen3_5_35B_A3B::test_bf16[tp1-TRTLLM] accuracy/test_llm_api_pytorch.py::TestQwen3_5_4B::test_bf16 accuracy/test_llm_api_pytorch.py::TestQwen3_5_4B::test_fp8 accuracy/test_llm_api_pytorch.py::TestQwen3_5_4B::test_dflash +accuracy/test_llm_api_pytorch.py::TestQwen3_5_35B_A3B::test_fp8_moe_dflash accuracy/test_llm_api_pytorch.py::TestQwen3_5_35B_A3B::test_fp8[enable_block_reuse=False] accuracy/test_llm_api_pytorch.py::TestQwen3_5_397B_A17B::test_nvfp4[adp4_cutedsl] accuracy/test_llm_api_pytorch.py::TestQwen3_5_397B_A17B::test_nvfp4[adp4_trtllm] @@ -779,7 +785,8 @@ accuracy/test_llm_api_pytorch.py::TestSeedOss_36B::test_auto_dtype accuracy/test_llm_api_pytorch.py::TestStep3_7::test_auto_dtype[tp_size=8-ep_size=8] TIMEOUT (90) accuracy/test_llm_api_pytorch.py::TestStep3_7::test_fp8_block_scales[tp_size=4-ep_size=4-mtp_nextn=0] TIMEOUT (90) accuracy/test_llm_api_pytorch.py::TestStep3_7::test_fp8_block_scales[tp_size=4-ep_size=4-mtp_nextn=3] TIMEOUT (90) -accuracy/test_llm_api_pytorch.py::TestStep3_7::test_nvfp4[tp_size=4-ep_size=4] TIMEOUT (90) +accuracy/test_llm_api_pytorch.py::TestStep3_7::test_nvfp4[tp_size=4-ep_size=4-mtp_nextn=0] TIMEOUT (90) +accuracy/test_llm_api_pytorch.py::TestStep3_7::test_nvfp4[tp_size=4-ep_size=4-mtp_nextn=3] TIMEOUT (90) accuracy/test_llm_api_pytorch_encode.py::TestEncoderEncode::test_encoder_encode_matches_huggingface_classification[bert-yelp-eager] accuracy/test_llm_api_pytorch_encode.py::TestEncoderEncode::test_encoder_encode_matches_huggingface_classification[bert-yelp-cuda_graph] accuracy/test_llm_api_pytorch_encode.py::TestEncoderEncode::test_encoder_encode_cuda_graph_matches_eager_logits[bert-yelp] @@ -806,11 +813,18 @@ accuracy/test_llm_api_pytorch_multimodal.py::TestQwen2_VL_7B::test_auto_dtype accuracy/test_llm_api_pytorch_multimodal.py::TestQwen3VL::test_auto_dtype[forced_chunked_prefill] accuracy/test_llm_api_pytorch_multimodal.py::TestQwen3VL_MOE::test_auto_dtype accuracy/test_llm_api_pytorch_multimodal.py::TestKimiK25::test_nvfp4[dep8] -accuracy/test_llm_api_pytorch_multimodal.py::TestStep3_7::test_fp8_block_scales TIMEOUT (120) -accuracy/test_llm_api_pytorch_multimodal.py::TestStep3_7::test_nvfp4 TIMEOUT (120) +accuracy/test_llm_api_pytorch_multimodal.py::TestStep3_7::test_fp8_block_scales[mtp_nextn=0] TIMEOUT (120) +accuracy/test_llm_api_pytorch_multimodal.py::TestStep3_7::test_fp8_block_scales[mtp_nextn=3] TIMEOUT (120) +accuracy/test_llm_api_pytorch_multimodal.py::TestStep3_7::test_nvfp4[mtp_nextn=0] TIMEOUT (120) +accuracy/test_llm_api_pytorch_multimodal.py::TestStep3_7::test_nvfp4[mtp_nextn=3] TIMEOUT (120) accuracy/test_llm_api_pytorch_multimodal.py::TestVILA1_5_3B::test_auto_dtype accuracy/test_llm_api_pytorch_ray.py::TestLlama3_1_8BInstruct::test_pp2_ray unittest/disaggregated/test_openai_disagg_server.py +disaggregated/test_ad_disagg.py::test_async_eagle3_full_model_handoff +disaggregated/test_ad_disagg.py::test_async_generation_matches_aggregate +disaggregated/test_ad_disagg.py::test_async_generation_no_overlap_matches_aggregate +disaggregated/test_ad_disagg.py::test_async_sharded_generation_handoff +disaggregated/test_ad_disagg_trtllm_serve.py::test_openai_completion disaggregated/test_auto_scaling.py::test_disagg_server_restart[etcd-round_robin] disaggregated/test_auto_scaling.py::test_disagg_server_restart[http-round_robin] disaggregated/test_auto_scaling.py::test_minimal_instances[etcd-round_robin] diff --git a/tests/integration/test_lists/qa/llm_perf_core.yml b/tests/integration/test_lists/qa/llm_perf_core.yml index bb395c156c45..4d736cbe1f9d 100644 --- a/tests/integration/test_lists/qa/llm_perf_core.yml +++ b/tests/integration/test_lists/qa/llm_perf_core.yml @@ -11,7 +11,7 @@ llm_perf_core: # 6: B200, GB200, B300, GB300 test cases # 7: B200, B300 test cases # 8: H100, H20, H200, B200, B300, RTX6000D, RTX6000-Server test cases -# 9: H20, H200, B200, B300, RTX6000D, RTX6000-Server test cases +# 9: H20, H200, B200, B300, RTX6000-Server test cases # 10: RTX-6000D, RTX-6000 Server test cases # =============================================================================== @@ -22,7 +22,7 @@ llm_perf_core: supports_fp8: true ranges: system_gpu_count: - gte: 2 + gte: 4 tests: - perf/test_perf.py::test_perf[llama_v3.1_8b_instruct_fp8-bench-pytorch-float8-input_output_len:128,128] - perf/test_perf.py::test_perf[qwen3.5_9b-bench-pytorch-bfloat16-input_output_len:128,128] @@ -36,6 +36,10 @@ llm_perf_core: - perf/test_perf.py::test_perf[llama_v3.1_nemotron_nano_8b_fp8-bench-pytorch-float8-maxnt:5000-input_output_len:5000,500-reqs:8-con:1] - perf/test_perf.py::test_perf[llama_v3.1_nemotron_nano_8b_fp8-bench-pytorch-float8-input_output_len:500,2000-reqs:8-con:1] - perf/test_perf.py::test_perf[llama_v3.1_nemotron_nano_8b_fp8-bench-pytorch-float8-input_output_len:1000,1000-reqs:8-con:1] + # test overlap scheduler + # con:1 paired with a small model is an intentional design choice—it amplifies host-side overhead and simplifies execution timelines to the maximum extent. + - perf/test_perf.py::test_perf[qwen3_0.6b-bench-pytorch-bfloat16-maxnt:2048-input_output_len:8000,1000-reqs:256-con:1-pp:4-gpus:4] + - perf/test_perf.py::test_perf[qwen3_30b_a3b-bench-pytorch-bfloat16-maxnt:2048-input_output_len:8000,1000-reqs:256-con:1-pp:4-gpus:4] # 2: L40S, H100, H20, H200 @@ -48,24 +52,8 @@ llm_perf_core: tests: #nemotron_nano_12b_v2 - perf/test_perf.py::test_perf[nemotron_nano_12b_v2-bench-pytorch-bfloat16-maxbs:1-input_output_len:128,128-reqs:10-con:1] #min_latency - - perf/test_perf.py::test_perf[nemotron_nano_12b_v2-bench-pytorch-bfloat16-input_output_len:500,2000-con:250] #max_throughput - - perf/test_perf.py::test_perf[nemotron_nano_12b_v2-bench-pytorch-bfloat16-input_output_len:128,128] #qwen3.5_9b (dense BF16 19G, 1-GPU) #qwen3.5_27b (dense BF16 52G, 2-GPU) - - perf/test_perf.py::test_perf[qwen3.5_27b-bench-pytorch-bfloat16-input_output_len:128,128-tp:2-gpus:2] - - perf/test_perf.py::test_perf[qwen3.5_27b-bench-pytorch-bfloat16-input_output_len:500,2000-tp:2-gpus:2] - - perf/test_perf.py::test_perf[qwen3.5_27b-bench-pytorch-bfloat16-input_output_len:2000,500-tp:2-gpus:2] - - perf/test_perf.py::test_perf[qwen3.5_27b-bench-pytorch-bfloat16-input_output_len:1000,1000-tp:2-gpus:2] - - perf/test_perf.py::test_perf[qwen3.5_27b-bench-pytorch-bfloat16-input_output_len:1000,2000-tp:2-gpus:2] - perf/test_perf.py::test_perf[qwen3.5_27b-bench-pytorch-bfloat16-maxbs:1-input_output_len:1000,1000-reqs:10-con:1-tp:2-gpus:2] #min_latency - - perf/test_perf.py::test_perf[qwen3.5_27b-bench-pytorch-bfloat16-input_output_len:1000,1000-con:250-tp:2-gpus:2] #max_throughput - #llama_v3.3_nemotron_super_49b (nemotron-nas BF16 94G, 2-GPU) - - perf/test_perf.py::test_perf[llama_v3.3_nemotron_super_49b-bench-pytorch-bfloat16-input_output_len:128,128-tp:2-gpus:2] - - perf/test_perf.py::test_perf[llama_v3.3_nemotron_super_49b-bench-pytorch-bfloat16-input_output_len:500,2000-tp:2-gpus:2] - - perf/test_perf.py::test_perf[llama_v3.3_nemotron_super_49b-bench-pytorch-bfloat16-input_output_len:2000,500-tp:2-gpus:2] - - perf/test_perf.py::test_perf[llama_v3.3_nemotron_super_49b-bench-pytorch-bfloat16-input_output_len:1000,1000-tp:2-gpus:2] - - perf/test_perf.py::test_perf[llama_v3.3_nemotron_super_49b-bench-pytorch-bfloat16-input_output_len:1000,2000-tp:2-gpus:2] - - perf/test_perf.py::test_perf[llama_v3.3_nemotron_super_49b-bench-pytorch-bfloat16-maxbs:1-input_output_len:1000,1000-reqs:10-con:1-tp:2-gpus:2] #min_latency - - perf/test_perf.py::test_perf[llama_v3.3_nemotron_super_49b-bench-pytorch-bfloat16-input_output_len:1000,1000-con:250-tp:2-gpus:2] #max_throughput - perf/test_perf.py::test_perf[llama_v3.3_70b_instruct-bench-pytorch-streaming-bfloat16-input_output_len:128,128-gpus:4] - perf/test_perf.py::test_perf[llama_v3.3_70b_instruct-bench-pytorch-bfloat16-input_output_len:128,128-gpus:4] - perf/test_perf.py::test_perf[llama_v3.3_70b_instruct_fp8-bench-pytorch-streaming-float8-input_output_len:2000,200-gpus:8] @@ -95,6 +83,23 @@ llm_perf_core: - perf/test_perf.py::test_perf[gpt_oss_20b_fp4-bench-pytorch-float4-maxbs:512-maxnt:8192-input_output_len:2000,200-con:64] - perf/test_perf.py::test_perf[gpt_oss_20b_fp4-bench-pytorch-float4-maxbs:512-maxnt:8192-input_output_len:128,128] - perf/test_perf.py::test_perf[gpt_oss_20b_fp4-bench-pytorch-float4-maxbs:512-maxnt:8192-input_output_len:2000,200-con:256] + - perf/test_perf.py::test_perf[nemotron_nano_12b_v2-bench-pytorch-bfloat16-input_output_len:500,2000-con:250] #max_throughput + - perf/test_perf.py::test_perf[nemotron_nano_12b_v2-bench-pytorch-bfloat16-input_output_len:128,128] + #qwen3.5_27b (dense BF16 52G, 2-GPU) + - perf/test_perf.py::test_perf[qwen3.5_27b-bench-pytorch-bfloat16-input_output_len:128,128-tp:2-gpus:2] + - perf/test_perf.py::test_perf[qwen3.5_27b-bench-pytorch-bfloat16-input_output_len:500,2000-tp:2-gpus:2] + - perf/test_perf.py::test_perf[qwen3.5_27b-bench-pytorch-bfloat16-input_output_len:2000,500-tp:2-gpus:2] + - perf/test_perf.py::test_perf[qwen3.5_27b-bench-pytorch-bfloat16-input_output_len:1000,1000-tp:2-gpus:2] + - perf/test_perf.py::test_perf[qwen3.5_27b-bench-pytorch-bfloat16-input_output_len:1000,2000-tp:2-gpus:2] + - perf/test_perf.py::test_perf[qwen3.5_27b-bench-pytorch-bfloat16-input_output_len:1000,1000-con:250-tp:2-gpus:2] #max_throughput + #llama_v3.3_nemotron_super_49b (nemotron-nas BF16 94G, 2-GPU) + - perf/test_perf.py::test_perf[llama_v3.3_nemotron_super_49b-bench-pytorch-bfloat16-input_output_len:128,128-tp:2-gpus:2] + - perf/test_perf.py::test_perf[llama_v3.3_nemotron_super_49b-bench-pytorch-bfloat16-input_output_len:500,2000-tp:2-gpus:2] + - perf/test_perf.py::test_perf[llama_v3.3_nemotron_super_49b-bench-pytorch-bfloat16-input_output_len:2000,500-tp:2-gpus:2] + - perf/test_perf.py::test_perf[llama_v3.3_nemotron_super_49b-bench-pytorch-bfloat16-input_output_len:1000,1000-tp:2-gpus:2] + - perf/test_perf.py::test_perf[llama_v3.3_nemotron_super_49b-bench-pytorch-bfloat16-input_output_len:1000,2000-tp:2-gpus:2] + - perf/test_perf.py::test_perf[llama_v3.3_nemotron_super_49b-bench-pytorch-bfloat16-maxbs:1-input_output_len:1000,1000-reqs:10-con:1-tp:2-gpus:2] #min_latency + - perf/test_perf.py::test_perf[llama_v3.3_nemotron_super_49b-bench-pytorch-bfloat16-input_output_len:1000,1000-con:250-tp:2-gpus:2] #max_throughput # 4: H100, H20, H200, GB200, B200, B300, GB300, RTX6000-D, RTX6000-Server test cases @@ -138,7 +143,6 @@ llm_perf_core: - perf/test_perf.py::test_perf[llama_v3.3_nemotron_super_49b_fp8-bench-pytorch-float8-maxbs:1-input_output_len:1000,1000-reqs:10-con:1-tp:2-gpus:2] #min_latency - perf/test_perf.py::test_perf[llama_v3.3_nemotron_super_49b_fp8-bench-pytorch-float8-input_output_len:1000,1000-con:250-tp:2-gpus:2] #max_throughput #qwen3.5_122b_a10b (MoE BF16 234G, 4-GPU) - - perf/test_perf.py::test_perf[qwen3.5_122b_a10b-bench-pytorch-bfloat16-input_output_len:128,128-ep:4-tp:4-gpus:4] - perf/test_perf.py::test_perf[qwen3.5_122b_a10b-bench-pytorch-bfloat16-input_output_len:500,2000-ep:4-tp:4-gpus:4] - perf/test_perf.py::test_perf[qwen3.5_122b_a10b-bench-pytorch-bfloat16-input_output_len:2000,500-ep:4-tp:4-gpus:4] - perf/test_perf.py::test_perf[qwen3.5_122b_a10b-bench-pytorch-bfloat16-input_output_len:1000,1000-ep:4-tp:4-gpus:4] @@ -210,9 +214,15 @@ llm_perf_core: - perf/test_perf.py::test_perf[qwen3.5_397b_a17b_fp4-bench-pytorch-float4-maxbs:1-input_output_len:1000,1000-reqs:10-con:1-ep:4-tp:4-gpus:4] #min_latency - perf/test_perf.py::test_perf[qwen3.5_397b_a17b_fp4-bench-pytorch-float4-maxbs:512-input_output_len:1000,1000-con:512-ep:4-tp:4-gpus:4] #max_throughput #nemotron_3_super_120b_nvfp4 (Hybrid MoE+SSM+Attn FP4 76G, 4-GPU ep=4 tp=4, throughput config) + #these test config come from docs/source/deployment-guide/deployment-guide-for-nemotron-3-on-trtllm.md - perf/test_perf.py::test_perf[nemotron_3_super_120b_nvfp4-serve-pytorch-float4-maxbs:512-maxnt:2048-kv_frac:0.8-input_output_len:1024,1024-reqs:5-con:1-ep:4-tp:4-gpus:4] #min_latency - perf/test_perf.py::test_perf[nemotron_3_super_120b_nvfp4-serve-pytorch-float4-maxbs:512-maxnt:2048-kv_frac:0.8-input_output_len:1024,1024-reqs:160-con:32-ep:4-tp:4-gpus:4] - perf/test_perf.py::test_perf[nemotron_3_super_120b_nvfp4-serve-pytorch-float4-maxbs:512-maxnt:2048-kv_frac:0.8-input_output_len:1024,1024-reqs:640-con:128-ep:4-tp:4-gpus:4] #max_throughput + #nemotron_3_ultra_550b_nvfp4 (Hybrid MoE FP4 ~275G, 4-GPU ep=4 tp=4, throughput config, HF download) + #these test config come from docs/source/deployment-guide/deployment-guide-for-nemotron-3-on-trtllm.md + - perf/test_perf.py::test_perf[nemotron_3_ultra_550b_nvfp4-serve-pytorch-float4-maxbs:256-maxnt:2048-kv_frac:0.8-input_output_len:1024,1024-reqs:5-con:1-ep:4-tp:4-gpus:4] #min_latency + - perf/test_perf.py::test_perf[nemotron_3_ultra_550b_nvfp4-serve-pytorch-float4-maxbs:256-maxnt:2048-kv_frac:0.8-input_output_len:1024,1024-reqs:160-con:32-ep:4-tp:4-gpus:4] + - perf/test_perf.py::test_perf[nemotron_3_ultra_550b_nvfp4-serve-pytorch-float4-maxbs:256-maxnt:2048-kv_frac:0.8-input_output_len:1024,1024-reqs:640-con:128-ep:4-tp:4-gpus:4] #max_throughput # 7: B200, B300 test cases @@ -280,15 +290,6 @@ llm_perf_core: - perf/test_perf.py::test_perf[minimax_m2.5_fp8-bench-pytorch-float8-input_output_len:1000,2000-ep:8-gpus:8] - perf/test_perf.py::test_perf[minimax_m2.5_fp8-bench-pytorch-float8-maxbs:1-input_output_len:1000,1000-reqs:10-con:1-ep:8-gpus:8] #min_latency - perf/test_perf.py::test_perf[minimax_m2.5_fp8-bench-pytorch-float8-maxbs:512-input_output_len:1000,1000-con:512-ep:8-gpus:8] #max_throughput -# 9: H20, H200, B200, B300 test cases - #llama_v3.1_nemotron_ultra_253b (nemotron-nas BF16 474G, 8-GPU) - - perf/test_perf.py::test_perf[llama_v3.1_nemotron_ultra_253b-bench-pytorch-bfloat16-input_output_len:128,128-tp:8-gpus:8] - - perf/test_perf.py::test_perf[llama_v3.1_nemotron_ultra_253b-bench-pytorch-bfloat16-input_output_len:500,2000-tp:8-gpus:8] - - perf/test_perf.py::test_perf[llama_v3.1_nemotron_ultra_253b-bench-pytorch-bfloat16-input_output_len:2000,500-tp:8-gpus:8] - - perf/test_perf.py::test_perf[llama_v3.1_nemotron_ultra_253b-bench-pytorch-bfloat16-input_output_len:1000,1000-tp:8-gpus:8] - - perf/test_perf.py::test_perf[llama_v3.1_nemotron_ultra_253b-bench-pytorch-bfloat16-input_output_len:1000,2000-tp:8-gpus:8] - - perf/test_perf.py::test_perf[llama_v3.1_nemotron_ultra_253b-bench-pytorch-bfloat16-maxbs:1-input_output_len:1000,1000-reqs:10-con:1-tp:8-gpus:8] #min_latency - - perf/test_perf.py::test_perf[llama_v3.1_nemotron_ultra_253b-bench-pytorch-bfloat16-input_output_len:1000,1000-con:250-tp:8-gpus:8] #max_throughput #llama_v3.1_nemotron_ultra_253b_fp8 (nemotron-nas FP8 241G, 8-GPU) - perf/test_perf.py::test_perf[llama_v3.1_nemotron_ultra_253b_fp8-bench-pytorch-float8-input_output_len:128,128-tp:8-gpus:8] - perf/test_perf.py::test_perf[llama_v3.1_nemotron_ultra_253b_fp8-bench-pytorch-float8-input_output_len:500,2000-tp:8-gpus:8] @@ -305,8 +306,10 @@ llm_perf_core: - perf/test_perf.py::test_perf[qwen3.5_397b_a17b_fp8-bench-pytorch-float8-input_output_len:1000,2000-ep:8-tp:8-gpus:8] - perf/test_perf.py::test_perf[qwen3.5_397b_a17b_fp8-bench-pytorch-float8-maxbs:1-input_output_len:1000,1000-reqs:10-con:1-ep:8-tp:8-gpus:8] #min_latency - perf/test_perf.py::test_perf[qwen3.5_397b_a17b_fp8-bench-pytorch-float8-maxbs:512-input_output_len:1000,1000-con:512-ep:8-tp:8-gpus:8] #max_throughput + - perf/test_perf.py::test_perf[qwen3.5_122b_a10b-bench-pytorch-bfloat16-input_output_len:128,128-ep:4-tp:4-gpus:4] + -# 9: H20, H200, B200, B300, RTX6000D, RTX6000-Server test cases +# 9: H20, H200, B200, B300, RTX6000-Server test cases - condition: ranges: system_gpu_count: @@ -332,6 +335,14 @@ llm_perf_core: - perf/test_perf.py::test_perf[qwen3.5_397b_a17b_fp4-bench-pytorch-float4-input_output_len:1000,2000-ep:8-tp:8-gpus:8] - perf/test_perf.py::test_perf[qwen3.5_397b_a17b_fp4-bench-pytorch-float4-maxbs:1-input_output_len:1000,1000-reqs:10-con:1-ep:8-tp:8-gpus:8] #min_latency - perf/test_perf.py::test_perf[qwen3.5_397b_a17b_fp4-bench-pytorch-float4-maxbs:512-input_output_len:1000,1000-con:512-ep:8-tp:8-gpus:8] #max_throughput + #llama_v3.1_nemotron_ultra_253b (nemotron-nas BF16 474G, 8-GPU) + - perf/test_perf.py::test_perf[llama_v3.1_nemotron_ultra_253b-bench-pytorch-bfloat16-input_output_len:128,128-tp:8-gpus:8] + - perf/test_perf.py::test_perf[llama_v3.1_nemotron_ultra_253b-bench-pytorch-bfloat16-input_output_len:500,2000-tp:8-gpus:8] + - perf/test_perf.py::test_perf[llama_v3.1_nemotron_ultra_253b-bench-pytorch-bfloat16-input_output_len:2000,500-tp:8-gpus:8] + - perf/test_perf.py::test_perf[llama_v3.1_nemotron_ultra_253b-bench-pytorch-bfloat16-input_output_len:1000,1000-tp:8-gpus:8] + - perf/test_perf.py::test_perf[llama_v3.1_nemotron_ultra_253b-bench-pytorch-bfloat16-input_output_len:1000,2000-tp:8-gpus:8] + - perf/test_perf.py::test_perf[llama_v3.1_nemotron_ultra_253b-bench-pytorch-bfloat16-maxbs:1-input_output_len:1000,1000-reqs:10-con:1-tp:8-gpus:8] #min_latency + - perf/test_perf.py::test_perf[llama_v3.1_nemotron_ultra_253b-bench-pytorch-bfloat16-input_output_len:1000,1000-con:250-tp:8-gpus:8] #max_throughput # 10: RTX-6000D, RTX-6000 Server test cases - condition: diff --git a/tests/integration/test_lists/qa/llm_perf_disagg.yml b/tests/integration/test_lists/qa/llm_perf_disagg.yml new file mode 100644 index 000000000000..c6095b030e58 --- /dev/null +++ b/tests/integration/test_lists/qa/llm_perf_disagg.yml @@ -0,0 +1,149 @@ +version: 0.0.1 +llm_perf_disagg: + +# 1: GB200 test cases +- condition: + wildcards: + gpu: + - 'gb200' + tests: + # GB200 DeepSeek-R1 + - perf/test_perf_sanity.py::test_e2e[disagg-e2e-gb200_deepseek-r1-fp4_128k8k_con128_ctx1_pp8_gen1_dep16_eplb0_mtp1_ccb-NIXL] TIMEOUT (120) + - perf/test_perf_sanity.py::test_e2e[disagg-e2e-gb200_deepseek-r1-fp4_128k8k_con128_ctx1_pp8_gen1_dep16_eplb0_mtp1_ccb-UCX] TIMEOUT (120) + - perf/test_perf_sanity.py::test_e2e[disagg-e2e-gb200_deepseek-r1-fp4_128k8k_con1_ctx1_pp8_gen1_tep8_eplb0_mtp3_ccb-NIXL] TIMEOUT (120) + - perf/test_perf_sanity.py::test_e2e[disagg-e2e-gb200_deepseek-r1-fp4_128k8k_con64_ctx1_pp8_gen1_dep32_eplb0_mtp3_ccb-NIXL] TIMEOUT (120) + - perf/test_perf_sanity.py::test_e2e[disagg-e2e-gb200_deepseek-r1-fp4_128k8k_ctx1_pp4_gen8_pp4_bs2_eplb0_mtp0_con2-NIXL] TIMEOUT (120) + - perf/test_perf_sanity.py::test_e2e[disagg-e2e-gb200_deepseek-r1-fp4_1k1k_con1024_ctx1_dep4_gen1_dep32_eplb0_mtp0_ccb-NIXL] TIMEOUT (120) + - perf/test_perf_sanity.py::test_e2e[disagg-e2e-gb200_deepseek-r1-fp4_1k1k_con1024_ctx1_dep4_gen1_dep32_eplb0_mtp3_ccb-NIXL] TIMEOUT (120) + - perf/test_perf_sanity.py::test_e2e[disagg-e2e-gb200_deepseek-r1-fp4_1k1k_con1024_ctx1_dep4_gen1_dep8_eplb0_mtp0_ccb-NIXL] TIMEOUT (120) + - perf/test_perf_sanity.py::test_e2e[disagg-e2e-gb200_deepseek-r1-fp4_1k1k_con1_ctx1_dep4_gen1_tep8_eplb0_mtp3_ccb-NIXL] TIMEOUT (120) + - perf/test_perf_sanity.py::test_e2e[disagg-e2e-gb200_deepseek-r1-fp4_1k1k_con2048_ctx2_dep4_gen1_dep16_eplb0_mtp3_ccb-NIXL] TIMEOUT (120) + - perf/test_perf_sanity.py::test_e2e[disagg-e2e-gb200_deepseek-r1-fp4_1k1k_con2048_ctx2_dep4_gen1_dep16_eplb288_mtp3_ccb-NIXL] TIMEOUT (120) + - perf/test_perf_sanity.py::test_e2e[disagg-e2e-gb200_deepseek-r1-fp4_1k1k_con3072_ctx1_dep4_gen1_dep4_eplb0_mtp1_ccb-NIXL] TIMEOUT (120) + - perf/test_perf_sanity.py::test_e2e[disagg-e2e-gb200_deepseek-r1-fp4_1k1k_con3072_ctx1_dep4_gen1_dep4_eplb0_mtp1_ccb-UCX] TIMEOUT (120) + - perf/test_perf_sanity.py::test_e2e[disagg-e2e-gb200_deepseek-r1-fp4_1k1k_ctx1_gen4_tep8_bs32_eplb0_mtp3_con1_ccb-NIXL] TIMEOUT (120) + - perf/test_perf_sanity.py::test_e2e[disagg-e2e-gb200_deepseek-r1-fp4_1k1k_ctx2_gen1_dep16_bs128_eplb0_mtp3_con2048_ccb-NIXL] TIMEOUT (120) + - perf/test_perf_sanity.py::test_e2e[disagg-e2e-gb200_deepseek-r1-fp4_8k1k_con1024_ctx1_dep4_gen1_dep32_eplb0_mtp3_ccb-NIXL] TIMEOUT (120) + - perf/test_perf_sanity.py::test_e2e[disagg-e2e-gb200_deepseek-r1-fp4_8k1k_con1_ctx1_dep4_gen1_tep8_eplb0_mtp3_ccb-NIXL] TIMEOUT (120) + - perf/test_perf_sanity.py::test_e2e[disagg-e2e-gb200_deepseek-r1-fp4_8k1k_con4096_ctx1_dep4_gen1_dep16_eplb0_mtp1_ccb-NIXL] TIMEOUT (120) + - perf/test_perf_sanity.py::test_e2e[disagg-e2e-gb200_deepseek-r1-fp4_8k1k_con4096_ctx1_dep4_gen1_dep16_eplb0_mtp1_ccb-UCX] TIMEOUT (120) + - perf/test_perf_sanity.py::test_e2e[disagg-e2e-gb200_deepseek-r1-fp4_8k1k_ctx1_gen3_tep8_bs32_eplb0_mtp0_con1_ccb-NIXL] TIMEOUT (120) + # GB200 DeepSeek-V32 + - perf/test_perf_sanity.py::test_e2e[disagg-e2e-gb200_deepseek-v32-fp4_1k1k_con1024_ctx1_dep4_gen1_dep32_eplb256_mtp3_ccb-NIXL] TIMEOUT (120) + - perf/test_perf_sanity.py::test_e2e[disagg-e2e-gb200_deepseek-v32-fp4_1k1k_con1_ctx1_dep4_gen1_tep8_eplb0_mtp3_ccb-NIXL] TIMEOUT (120) + - perf/test_perf_sanity.py::test_e2e[disagg-e2e-gb200_deepseek-v32-fp4_1k1k_con2048_ctx1_dep4_gen1_dep4_eplb0_mtp1_ccb-NIXL] TIMEOUT (120) + - perf/test_perf_sanity.py::test_e2e[disagg-e2e-gb200_deepseek-v32-fp4_1k1k_con2048_ctx1_dep4_gen1_dep4_eplb0_mtp1_ccb-UCX] TIMEOUT (120) + - perf/test_perf_sanity.py::test_e2e[disagg-e2e-gb200_deepseek-v32-fp4_32k4k_con1_ctx1_dep4_gen1_tep8_eplb0_mtp3_ccb-NIXL] TIMEOUT (120) + - perf/test_perf_sanity.py::test_e2e[disagg-e2e-gb200_deepseek-v32-fp4_32k4k_con2048_ctx1_dep4_gen1_dep32_eplb288_mtp1_ccb-NIXL] TIMEOUT (120) + - perf/test_perf_sanity.py::test_e2e[disagg-e2e-gb200_deepseek-v32-fp4_32k4k_con2048_ctx1_dep4_gen1_dep32_eplb288_mtp1_ccb-UCX] TIMEOUT (120) + - perf/test_perf_sanity.py::test_e2e[disagg-e2e-gb200_deepseek-v32-fp4_32k4k_con256_ctx1_dep4_gen1_dep32_eplb0_mtp3_ccb-NIXL] TIMEOUT (120) + - perf/test_perf_sanity.py::test_e2e[disagg-e2e-gb200_deepseek-v32-fp4_32k4k_con256_ctx1_dep8_gen1_dep8_eplb0_mtp0_ccb-NIXL] TIMEOUT (120) + - perf/test_perf_sanity.py::test_e2e[disagg-e2e-gb200_deepseek-v32-fp4_8k1k_con1024_ctx1_dep4_gen1_dep32_eplb256_mtp3_ccb-NIXL] TIMEOUT (120) + - perf/test_perf_sanity.py::test_e2e[disagg-e2e-gb200_deepseek-v32-fp4_8k1k_con1_ctx1_dep4_gen1_tep8_eplb0_mtp3_ccb-NIXL] TIMEOUT (120) + - perf/test_perf_sanity.py::test_e2e[disagg-e2e-gb200_deepseek-v32-fp4_8k1k_con4096_ctx1_dep4_gen1_dep32_eplb256_mtp0_ccb-NIXL] TIMEOUT (120) + - perf/test_perf_sanity.py::test_e2e[disagg-e2e-gb200_deepseek-v32-fp4_8k1k_con4096_ctx1_dep4_gen1_dep32_eplb256_mtp0_ccb-UCX] TIMEOUT (120) + # GB200 GPT-OSS-120B + - perf/test_perf_sanity.py::test_e2e[disagg-e2e-gb200_gpt-oss-120b-fp4_1k1k_con2048_ctx1_tp1_gen1_dep2_eplb0_mtp0_ccb-NIXL] TIMEOUT (120) + - perf/test_perf_sanity.py::test_e2e[disagg-e2e-gb200_gpt-oss-120b-fp4_1k1k_con2048_ctx1_tp1_gen1_dep2_eplb0_mtp0_ccb-UCX] TIMEOUT (120) + - perf/test_perf_sanity.py::test_e2e[disagg-e2e-gb200_gpt-oss-120b-fp4_1k1k_con512_ctx1_tp1_gen1_dep2_eplb0_mtp0_ccb-NIXL] TIMEOUT (120) + - perf/test_perf_sanity.py::test_e2e[disagg-e2e-gb200_gpt-oss-120b-fp4_1k1k_con64_ctx1_tp1_gen1_tp4_eplb0_mtp0_ccb-NIXL] TIMEOUT (120) + - perf/test_perf_sanity.py::test_e2e[disagg-e2e-gb200_gpt-oss-120b-fp4_8k1k_con1024_ctx1_tp1_gen1_tp4_eplb0_mtp0_ccb-NIXL] TIMEOUT (120) + - perf/test_perf_sanity.py::test_e2e[disagg-e2e-gb200_gpt-oss-120b-fp4_8k1k_con1024_ctx1_tp1_gen1_tp4_eplb0_mtp0_ccb-UCX] TIMEOUT (120) + - perf/test_perf_sanity.py::test_e2e[disagg-e2e-gb200_gpt-oss-120b-fp4_8k1k_con128_ctx1_tp1_gen1_tp4_eplb0_mtp0_ccb-NIXL] TIMEOUT (120) + - perf/test_perf_sanity.py::test_e2e[disagg-e2e-gb200_gpt-oss-120b-fp4_8k1k_con4_ctx1_tp1_gen1_tp4_eplb0_mtp0_ccb-NIXL] TIMEOUT (120) + - perf/test_perf_sanity.py::test_e2e[disagg-e2e-gb200_gpt-oss-120b-fp4_8k1k_con512_ctx1_tp1_gen1_dep2_eplb0_mtp0_ccb-NIXL] TIMEOUT (120) + # GB200 Kimi-K2.5-Thinking + - perf/test_perf_sanity.py::test_e2e[disagg-e2e-gb200_kimi-k25-thinking-fp4_1k1k_con2048_ctx1_dep4_gen1_dep32_eplb0_mtp0_ccb-NIXL] TIMEOUT (120) + - perf/test_perf_sanity.py::test_e2e[disagg-e2e-gb200_kimi-k25-thinking-fp4_1k1k_con4096_ctx1_dep4_gen1_dep8_eplb0_mtp0_ccb-NIXL] TIMEOUT (120) + - perf/test_perf_sanity.py::test_e2e[disagg-e2e-gb200_kimi-k25-thinking-fp4_1k1k_con4096_ctx1_dep4_gen1_dep8_eplb0_mtp0_ccb-UCX] TIMEOUT (120) + - perf/test_perf_sanity.py::test_e2e[disagg-e2e-gb200_kimi-k25-thinking-fp4_1k1k_con4_ctx1_dep4_gen1_tep4_eplb0_mtp0_ccb-NIXL] TIMEOUT (120) + - perf/test_perf_sanity.py::test_e2e[disagg-e2e-gb200_kimi-k25-thinking-fp4_8k1k_con1024_ctx1_dep4_gen1_dep32_eplb0_mtp3_ccb-NIXL] TIMEOUT (120) + - perf/test_perf_sanity.py::test_e2e[disagg-e2e-gb200_kimi-k25-thinking-fp4_8k1k_con4096_ctx1_dep4_gen1_dep16_eplb0_mtp0_ccb-NIXL] TIMEOUT (120) + - perf/test_perf_sanity.py::test_e2e[disagg-e2e-gb200_kimi-k25-thinking-fp4_8k1k_con4096_ctx1_dep4_gen1_dep16_eplb0_mtp0_ccb-UCX] TIMEOUT (120) + - perf/test_perf_sanity.py::test_e2e[disagg-e2e-gb200_kimi-k25-thinking-fp4_8k1k_con4_ctx1_dep4_gen1_tep8_eplb0_mtp3_ccb-NIXL] TIMEOUT (120) + # GB200 Qwen3-235B + - perf/test_perf_sanity.py::test_e2e[disagg-e2e-gb200_qwen3-235b-fp4_1k1k_ctx1_gen4_tep8_bs32_eplb0_mtp0_con1_ccb-NIXL] TIMEOUT (120) + - perf/test_perf_sanity.py::test_e2e[disagg-e2e-gb200_qwen3-235b-fp4_1k1k_ctx2_gen1_dep16_bs128_eplb0_mtp3_con2048_ccb-NIXL] TIMEOUT (120) + - perf/test_perf_sanity.py::test_e2e[disagg-e2e-gb200_qwen3-235b-fp4_8k1k_con1024_ctx1_tp1_gen1_dep8_eplb0_mtp0_ccb-NIXL] TIMEOUT (120) + - perf/test_perf_sanity.py::test_e2e[disagg-e2e-gb200_qwen3-235b-fp4_8k1k_con1024_ctx1_tp1_gen1_dep8_eplb0_mtp0_ccb-UCX] TIMEOUT (120) + - perf/test_perf_sanity.py::test_e2e[disagg-e2e-gb200_qwen3-235b-fp4_8k1k_con1_ctx1_tp1_gen1_tep4_eplb0_mtp0_ccb-NIXL] TIMEOUT (120) + - perf/test_perf_sanity.py::test_e2e[disagg-e2e-gb200_qwen3-235b-fp4_8k1k_con64_ctx1_tp1_gen1_tep4_eplb0_mtp0_ccb-NIXL] TIMEOUT (120) + # GB200 wideep + - perf/test_perf_sanity.py::test_e2e[disagg-e2e-gb200_wideep_deepseek-r1-fp4_8k1k_ctx2_gen1_dep32_bs128_eplb288_mtp3_con1024_ccb-NIXL] TIMEOUT (120) + - perf/test_perf_sanity.py::test_e2e[disagg-e2e-gb200_wideep_deepseek-v32-fp4_8k1k_ctx2_gen1_dep32_bs128_eplb288_mtp3_con1024_ccb-NIXL] TIMEOUT (120) + - perf/test_perf_sanity.py::test_e2e[disagg-gen_only-gb200_wideep_deepseek-r1-fp4_1k1k_ctx1_gen1_dep32_bs32_eplb288_mtp0_con1024_ccb-NIXL] TIMEOUT (120) + - perf/test_perf_sanity.py::test_e2e[disagg-gen_only-gb200_wideep_deepseek-r1-fp4_1k1k_ctx1_gen1_dep32_bs32_eplb288_mtp0_con1024_ccb-NIXL_kv-reuse] TIMEOUT (120) + - perf/test_perf_sanity.py::test_e2e[disagg-gen_only-gb200_wideep_deepseek-r1-fp4_1k1k_ctx2_gen1_dep16_bs128_eplb288_mtp3_con2048_ccb-NIXL] TIMEOUT (120) + - perf/test_perf_sanity.py::test_e2e[disagg-gen_only-gb200_wideep_deepseek-r1-fp4_1k1k_ctx2_gen1_dep16_bs128_eplb288_mtp3_con2048_ccb-UCX] TIMEOUT (120) + - perf/test_perf_sanity.py::test_e2e[disagg-gen_only-gb200_wideep_deepseek-r1-fp4_1k1k_ctx2_gen1_dep48_bs16_eplb288_mtp3_con12288_ccb-NIXL] TIMEOUT (120) + - perf/test_perf_sanity.py::test_e2e[disagg-gen_only-gb200_wideep_deepseek-v32-fp4_1k1k_ctx1_gen1_dep32_bs32_eplb288_mtp0_con1024_ccb-NIXL] TIMEOUT (120) + - perf/test_perf_sanity.py::test_e2e[disagg-gen_only-gb200_wideep_deepseek-v32-fp4_1k1k_ctx2_gen1_dep16_bs128_eplb288_mtp3_con2048_ccb-NIXL] TIMEOUT (120) + - perf/test_perf_sanity.py::test_e2e[disagg-gen_only-gb200_wideep_deepseek-v32-fp4_1k1k_ctx2_gen1_dep48_bs16_eplb288_mtp3_con12288_ccb-NIXL] TIMEOUT (120) + # GB200 accuracy cases + - perf/test_perf_sanity.py::test_e2e[disagg-gen_only-gb200_wideep_accuracy-deepseek-r1-fp4_1k1k_ctx2_gen1_dep16_bs128_eplb288_mtp3_ccb-NIXL] TIMEOUT (120) + - perf/test_perf_sanity.py::test_e2e[disagg-gen_only-gb200_wideep_accuracy-deepseek-r1-fp4_gpqa_diamond_1k1k_ctx2_gen1_dep16_bs128_eplb288_mtp3_ccb-NIXL] TIMEOUT (120) + # GB200 stress cases + - perf/test_perf_sanity.py::test_e2e[disagg-e2e-gb200_wideep_stress-deepseek-r1-fp4_1k1k_ctx2_gen1_dep16_bs128_eplb288_mtp3_ccb-NIXL] TIMEOUT (120) + - perf/test_perf_sanity.py::test_e2e[disagg-e2e-gb200_wideep_stress-deepseek-r1-fp4_8k1k_ctx2_gen1_dep32_bs128_eplb288_mtp3_ccb-NIXL] TIMEOUT (120) + - perf/test_perf_sanity.py::test_e2e[disagg-e2e-gb200_stress-gpt-oss-120b-fp4_8k1k_ctx1_tp1_gen1_tp4_eplb0_eagle3_ccb-NIXL] TIMEOUT (120) + # GB200 aggregated ctx_only + - perf/test_perf_sanity.py::test_e2e[aggr-ctx_only-gb200_qwen3-235b-fp4_1k1k_ctx1_gen4_tep8_bs32_eplb0_mtp0_con1_ccb-NIXL] TIMEOUT (120) + - perf/test_perf_sanity.py::test_e2e[aggr-ctx_only-gb200_qwen3-235b-fp4_1k1k_ctx2_gen1_dep16_bs128_eplb0_mtp3_con2048_ccb-NIXL] TIMEOUT (120) + # GB200 aggregated gen_only + - perf/test_perf_sanity.py::test_e2e[disagg-gen_only-gb200_qwen3-235b-fp4_1k1k_ctx1_gen4_tep8_bs32_eplb0_mtp0_con1_ccb-NIXL] TIMEOUT (120) + - perf/test_perf_sanity.py::test_e2e[disagg-gen_only-gb200_qwen3-235b-fp4_1k1k_ctx2_gen1_dep16_bs128_eplb0_mtp3_con2048_ccb-NIXL] TIMEOUT (120) + +# 2: GB300 test cases +- condition: + wildcards: + gpu: + - 'gb300' + tests: + # GB300 DeepSeek-R1 + - perf/test_perf_sanity.py::test_e2e[disagg-e2e-gb300_deepseek-r1-fp4_128k8k_con1_ctx1_pp4_gen1_tep8_eplb0_mtp3_ccb-NIXL] TIMEOUT (120) + - perf/test_perf_sanity.py::test_e2e[disagg-e2e-gb300_deepseek-r1-fp4_128k8k_con256_ctx1_pp4_gen1_dep8_eplb0_mtp1_ccb-NIXL] TIMEOUT (120) + - perf/test_perf_sanity.py::test_e2e[disagg-e2e-gb300_deepseek-r1-fp4_128k8k_con256_ctx1_pp4_gen1_dep8_eplb0_mtp1_ccb-UCX] TIMEOUT (120) + - perf/test_perf_sanity.py::test_e2e[disagg-e2e-gb300_deepseek-r1-fp4_128k8k_con64_ctx1_pp4_gen1_dep16_eplb0_mtp1_ccb-NIXL] TIMEOUT (120) + - perf/test_perf_sanity.py::test_e2e[disagg-e2e-gb300_deepseek-r1-fp4_1k1k_con1024_ctx1_dep4_gen1_dep32_eplb0_mtp3_ccb-NIXL] TIMEOUT (120) + - perf/test_perf_sanity.py::test_e2e[disagg-e2e-gb300_deepseek-r1-fp4_1k1k_con1_ctx1_dep4_gen1_tep8_eplb0_mtp3_ccb-NIXL] TIMEOUT (120) + - perf/test_perf_sanity.py::test_e2e[disagg-e2e-gb300_deepseek-r1-fp4_1k1k_con3072_ctx1_dep4_gen1_dep4_eplb0_mtp1_ccb-NIXL] TIMEOUT (120) + - perf/test_perf_sanity.py::test_e2e[disagg-e2e-gb300_deepseek-r1-fp4_1k1k_con3072_ctx1_dep4_gen1_dep4_eplb0_mtp1_ccb-UCX] TIMEOUT (120) + - perf/test_perf_sanity.py::test_e2e[disagg-e2e-gb300_deepseek-r1-fp4_8k1k_con1024_ctx1_dep4_gen1_dep32_eplb0_mtp3_ccb-NIXL] TIMEOUT (120) + - perf/test_perf_sanity.py::test_e2e[disagg-e2e-gb300_deepseek-r1-fp4_8k1k_con1_ctx1_dep4_gen1_tep8_eplb0_mtp3_ccb-NIXL] TIMEOUT (120) + - perf/test_perf_sanity.py::test_e2e[disagg-e2e-gb300_deepseek-r1-fp4_8k1k_con4096_ctx1_dep4_gen1_dep16_eplb0_mtp1_ccb-NIXL] TIMEOUT (120) + - perf/test_perf_sanity.py::test_e2e[disagg-e2e-gb300_deepseek-r1-fp4_8k1k_con4096_ctx1_dep4_gen1_dep16_eplb0_mtp1_ccb-UCX] TIMEOUT (120) + # GB300 DeepSeek-V32 + - perf/test_perf_sanity.py::test_e2e[disagg-e2e-gb300_deepseek-v32-fp4_1k1k_con1024_ctx1_dep4_gen1_dep32_eplb256_mtp3_ccb-NIXL] TIMEOUT (120) + - perf/test_perf_sanity.py::test_e2e[disagg-e2e-gb300_deepseek-v32-fp4_1k1k_con1_ctx1_dep4_gen1_tep8_eplb0_mtp3_ccb-NIXL] TIMEOUT (120) + - perf/test_perf_sanity.py::test_e2e[disagg-e2e-gb300_deepseek-v32-fp4_1k1k_con2048_ctx1_dep4_gen1_dep4_eplb0_mtp1_ccb-NIXL] TIMEOUT (120) + - perf/test_perf_sanity.py::test_e2e[disagg-e2e-gb300_deepseek-v32-fp4_1k1k_con2048_ctx1_dep4_gen1_dep4_eplb0_mtp1_ccb-UCX] TIMEOUT (120) + - perf/test_perf_sanity.py::test_e2e[disagg-e2e-gb300_deepseek-v32-fp4_32k4k_con1_ctx1_dep4_gen1_tep8_eplb0_mtp3_ccb-NIXL] TIMEOUT (120) + - perf/test_perf_sanity.py::test_e2e[disagg-e2e-gb300_deepseek-v32-fp4_32k4k_con2048_ctx1_dep4_gen1_dep32_eplb288_mtp1_ccb-NIXL] TIMEOUT (120) + - perf/test_perf_sanity.py::test_e2e[disagg-e2e-gb300_deepseek-v32-fp4_32k4k_con2048_ctx1_dep4_gen1_dep32_eplb288_mtp1_ccb-UCX] TIMEOUT (120) + - perf/test_perf_sanity.py::test_e2e[disagg-e2e-gb300_deepseek-v32-fp4_32k4k_con256_ctx1_dep4_gen1_dep32_eplb0_mtp3_ccb-NIXL] TIMEOUT (120) + - perf/test_perf_sanity.py::test_e2e[disagg-e2e-gb300_deepseek-v32-fp4_32k4k_con256_ctx1_dep8_gen1_dep8_eplb0_mtp0_ccb-NIXL] TIMEOUT (120) + - perf/test_perf_sanity.py::test_e2e[disagg-e2e-gb300_deepseek-v32-fp4_8k1k_con1024_ctx1_dep4_gen1_dep32_eplb256_mtp3_ccb-NIXL] TIMEOUT (120) + - perf/test_perf_sanity.py::test_e2e[disagg-e2e-gb300_deepseek-v32-fp4_8k1k_con1_ctx1_dep4_gen1_tep8_eplb0_mtp3_ccb-NIXL] TIMEOUT (120) + - perf/test_perf_sanity.py::test_e2e[disagg-e2e-gb300_deepseek-v32-fp4_8k1k_con4096_ctx1_dep4_gen1_dep32_eplb256_mtp0_ccb-NIXL] TIMEOUT (120) + - perf/test_perf_sanity.py::test_e2e[disagg-e2e-gb300_deepseek-v32-fp4_8k1k_con4096_ctx1_dep4_gen1_dep32_eplb256_mtp0_ccb-UCX] TIMEOUT (120) + # GB300 Kimi-K2.5-Thinking + - perf/test_perf_sanity.py::test_e2e[disagg-e2e-gb300_kimi-k25-thinking-fp4_1k1k_con2048_ctx1_dep4_gen1_dep32_eplb0_mtp0_ccb-NIXL] TIMEOUT (120) + - perf/test_perf_sanity.py::test_e2e[disagg-e2e-gb300_kimi-k25-thinking-fp4_1k1k_con4096_ctx1_dep4_gen1_dep8_eplb0_mtp0_ccb-NIXL] TIMEOUT (120) + - perf/test_perf_sanity.py::test_e2e[disagg-e2e-gb300_kimi-k25-thinking-fp4_1k1k_con4096_ctx1_dep4_gen1_dep8_eplb0_mtp0_ccb-UCX] TIMEOUT (120) + - perf/test_perf_sanity.py::test_e2e[disagg-e2e-gb300_kimi-k25-thinking-fp4_1k1k_con4_ctx1_dep4_gen1_tep4_eplb0_mtp0_ccb-NIXL] TIMEOUT (120) + - perf/test_perf_sanity.py::test_e2e[disagg-e2e-gb300_kimi-k25-thinking-fp4_8k1k_con1024_ctx1_dep4_gen1_dep32_eplb0_mtp3_ccb-NIXL] TIMEOUT (120) + - perf/test_perf_sanity.py::test_e2e[disagg-e2e-gb300_kimi-k25-thinking-fp4_8k1k_con4096_ctx1_dep4_gen1_dep16_eplb0_mtp0_ccb-NIXL] TIMEOUT (120) + - perf/test_perf_sanity.py::test_e2e[disagg-e2e-gb300_kimi-k25-thinking-fp4_8k1k_con4096_ctx1_dep4_gen1_dep16_eplb0_mtp0_ccb-UCX] TIMEOUT (120) + - perf/test_perf_sanity.py::test_e2e[disagg-e2e-gb300_kimi-k25-thinking-fp4_8k1k_con4_ctx1_dep4_gen1_tep8_eplb0_mtp3_ccb-NIXL] TIMEOUT (120) + # GB300 Qwen3-235B + - perf/test_perf_sanity.py::test_e2e[disagg-e2e-gb300_qwen3-235b-fp4_1k1k_ctx2_gen1_dep16_bs128_eplb0_mtp3_con2048_ccb-NIXL] TIMEOUT (120) + # GB300 wideep + - perf/test_perf_sanity.py::test_e2e[disagg-e2e-gb300_wideep_deepseek-r1-fp4_8k1k_ctx2_gen1_dep32_bs128_eplb288_mtp3_con1024_ccb-NIXL] TIMEOUT (120) + - perf/test_perf_sanity.py::test_e2e[disagg-e2e-gb300_wideep_deepseek-v32-fp4_8k1k_ctx2_gen1_dep32_bs128_eplb288_mtp3_con1024_ccb-NIXL] TIMEOUT (120) + - perf/test_perf_sanity.py::test_e2e[disagg-gen_only-gb300_wideep_deepseek-r1-fp4_1k1k_ctx2_gen1_dep16_bs128_eplb288_mtp3_con2048_ccb-NIXL] TIMEOUT (120) + - perf/test_perf_sanity.py::test_e2e[disagg-gen_only-gb300_wideep_deepseek-r1-fp4_1k1k_ctx2_gen1_dep16_bs128_eplb288_mtp3_con2048_ccb-UCX] TIMEOUT (120) + - perf/test_perf_sanity.py::test_e2e[disagg-gen_only-gb300_wideep_deepseek-v32-fp4_1k1k_ctx2_gen1_dep16_bs128_eplb288_mtp3_con2048_ccb-NIXL] TIMEOUT (120) + # GB300 aggregated ctx_only + - perf/test_perf_sanity.py::test_e2e[aggr-ctx_only-gb300_qwen3-235b-fp4_1k1k_ctx2_gen1_dep16_bs128_eplb0_mtp3_con2048_ccb-NIXL] TIMEOUT (120) + # GB300 aggregated gen_only + - perf/test_perf_sanity.py::test_e2e[disagg-gen_only-gb300_qwen3-235b-fp4_1k1k_ctx2_gen1_dep16_bs128_eplb0_mtp3_con2048_ccb-NIXL] TIMEOUT (120) diff --git a/tests/integration/test_lists/qa/llm_perf_multinode.txt b/tests/integration/test_lists/qa/llm_perf_multinode.txt index a77c81e8f28b..6e06c6bdfea6 100644 --- a/tests/integration/test_lists/qa/llm_perf_multinode.txt +++ b/tests/integration/test_lists/qa/llm_perf_multinode.txt @@ -1,8 +1,8 @@ # disagg multi-node # GB200 DeepSeek-R1 -perf/test_perf_sanity.py::test_e2e[disagg-e2e-gb200_deepseek-r1-fp4_128k8k_con128_ctx1_pp8_gen1_dep16_eplb0_mtp2_ccb-NIXL] -perf/test_perf_sanity.py::test_e2e[disagg-e2e-gb200_deepseek-r1-fp4_128k8k_con128_ctx1_pp8_gen1_dep16_eplb0_mtp2_ccb-UCX] +perf/test_perf_sanity.py::test_e2e[disagg-e2e-gb200_deepseek-r1-fp4_128k8k_con128_ctx1_pp8_gen1_dep16_eplb0_mtp1_ccb-NIXL] +perf/test_perf_sanity.py::test_e2e[disagg-e2e-gb200_deepseek-r1-fp4_128k8k_con128_ctx1_pp8_gen1_dep16_eplb0_mtp1_ccb-UCX] perf/test_perf_sanity.py::test_e2e[disagg-e2e-gb200_deepseek-r1-fp4_128k8k_con1_ctx1_pp8_gen1_tep8_eplb0_mtp3_ccb-NIXL] perf/test_perf_sanity.py::test_e2e[disagg-e2e-gb200_deepseek-r1-fp4_128k8k_con64_ctx1_pp8_gen1_dep32_eplb0_mtp3_ccb-NIXL] perf/test_perf_sanity.py::test_e2e[disagg-e2e-gb200_deepseek-r1-fp4_128k8k_ctx1_pp4_gen8_pp4_bs2_eplb0_mtp0_con2-NIXL] @@ -70,7 +70,7 @@ perf/test_perf_sanity.py::test_e2e[disagg-e2e-gb200_qwen3-235b-fp4_8k1k_con64_ct perf/test_perf_sanity.py::test_e2e[disagg-e2e-gb300_deepseek-r1-fp4_128k8k_con1_ctx1_pp4_gen1_tep8_eplb0_mtp3_ccb-NIXL] perf/test_perf_sanity.py::test_e2e[disagg-e2e-gb300_deepseek-r1-fp4_128k8k_con256_ctx1_pp4_gen1_dep8_eplb0_mtp1_ccb-NIXL] perf/test_perf_sanity.py::test_e2e[disagg-e2e-gb300_deepseek-r1-fp4_128k8k_con256_ctx1_pp4_gen1_dep8_eplb0_mtp1_ccb-UCX] -perf/test_perf_sanity.py::test_e2e[disagg-e2e-gb300_deepseek-r1-fp4_128k8k_con64_ctx1_pp4_gen1_dep16_eplb0_mtp2_ccb-NIXL] +perf/test_perf_sanity.py::test_e2e[disagg-e2e-gb300_deepseek-r1-fp4_128k8k_con64_ctx1_pp4_gen1_dep16_eplb0_mtp1_ccb-NIXL] perf/test_perf_sanity.py::test_e2e[disagg-e2e-gb300_deepseek-r1-fp4_1k1k_con1024_ctx1_dep4_gen1_dep32_eplb0_mtp3_ccb-NIXL] perf/test_perf_sanity.py::test_e2e[disagg-e2e-gb300_deepseek-r1-fp4_1k1k_con1_ctx1_dep4_gen1_tep8_eplb0_mtp3_ccb-NIXL] perf/test_perf_sanity.py::test_e2e[disagg-e2e-gb300_deepseek-r1-fp4_1k1k_con3072_ctx1_dep4_gen1_dep4_eplb0_mtp1_ccb-NIXL] @@ -128,18 +128,9 @@ perf/test_perf_sanity.py::test_e2e[disagg-gen_only-gb300_wideep_deepseek-r1-fp4_ perf/test_perf_sanity.py::test_e2e[disagg-gen_only-gb300_wideep_deepseek-r1-fp4_1k1k_ctx2_gen1_dep16_bs128_eplb288_mtp3_con2048_ccb-UCX] perf/test_perf_sanity.py::test_e2e[disagg-gen_only-gb300_wideep_deepseek-v32-fp4_1k1k_ctx2_gen1_dep16_bs128_eplb288_mtp3_con2048_ccb-NIXL] -# external wideep configs -perf/test_perf_sanity.py::test_e2e[disagg-gen_only-wideep_deepseek-r1-fp4_8k1k_ctx6_gen1_dep16_bs64_eplb288_mtp0_con1024_ccb-NIXL] -perf/test_perf_sanity.py::test_e2e[disagg-gen_only-wideep_deepseek-r1-fp4_8k1k_ctx8_gen1_dep32_bs16_eplb288_mtp3_con512_ccb-NIXL] -perf/test_perf_sanity.py::test_e2e[disagg-gen_only-wideep_deepseek-v32-fp4_8k1k_ctx6_gen1_dep16_bs64_eplb288_mtp0_con1024_ccb-NIXL] -perf/test_perf_sanity.py::test_e2e[disagg-gen_only-wideep_deepseek-v32-fp4_8k1k_ctx8_gen1_dep32_bs16_eplb288_mtp3_con512_ccb-NIXL] -perf/test_perf_sanity.py::test_e2e[disagg-gen_only-wideep_kimi-k2-thinking-fp4_1k1k_ctx3_gen1_dep32_bs1024_eplb384_mtp0_con16384_ccb-NIXL] -perf/test_perf_sanity.py::test_e2e[disagg-gen_only-wideep_kimi-k2-thinking-fp4_8k1k_ctx8_gen1_dep32_bs256_eplb416_mtp0_con8192_ccb-NIXL] - # accuracy cases perf/test_perf_sanity.py::test_e2e[disagg-gen_only-gb200_wideep_accuracy-deepseek-r1-fp4_1k1k_ctx2_gen1_dep16_bs128_eplb288_mtp3_ccb-NIXL] perf/test_perf_sanity.py::test_e2e[disagg-gen_only-gb200_wideep_accuracy-deepseek-r1-fp4_gpqa_diamond_1k1k_ctx2_gen1_dep16_bs128_eplb288_mtp3_ccb-NIXL] -perf/test_perf_sanity.py::test_e2e[disagg-e2e-wideep_accuracy-kimi-k2-thinking-fp4_1k1k_ctx3_gen1_dep32_bs1024_eplb384_mtp0_ccb-NIXL] # stress cases perf/test_perf_sanity.py::test_e2e[disagg-e2e-gb200_wideep_stress-deepseek-r1-fp4_1k1k_ctx2_gen1_dep16_bs128_eplb288_mtp3_ccb-NIXL] diff --git a/tests/integration/test_lists/qa/llm_spark_func.yml b/tests/integration/test_lists/qa/llm_spark_func.yml index 249197b6ca40..14aa75905a5f 100644 --- a/tests/integration/test_lists/qa/llm_spark_func.yml +++ b/tests/integration/test_lists/qa/llm_spark_func.yml @@ -72,5 +72,3 @@ llm_spark_func: - accuracy/test_llm_api_pytorch.py::TestQwen3_235B_A22B::test_nvfp4_2gpus[latency_moe_cutlass] - accuracy/test_llm_api_pytorch.py::TestQwen3_235B_A22B::test_nvfp4_2gpus[latency_moe_cutlass_eagle3] - accuracy/test_llm_api_pytorch.py::TestDeepSeekR1DistillLlama70B::test_auto_dtype_tp2 - - accuracy/test_llm_api_pytorch.py::TestLlama4ScoutInstruct::test_fp8_tp2 - - accuracy/test_llm_api_pytorch.py::TestLlama4ScoutInstruct::test_auto_dtype_tp2 diff --git a/tests/integration/test_lists/test-db/l0_a10.yml b/tests/integration/test_lists/test-db/l0_a10.yml index 7007503f3e1b..e78984886eee 100644 --- a/tests/integration/test_lists/test-db/l0_a10.yml +++ b/tests/integration/test_lists/test-db/l0_a10.yml @@ -32,6 +32,7 @@ l0_a10: - unittest/_torch/executor/test_scheduler_serializable_output.py - unittest/_torch/executor/test_kv_cache_estimation.py - unittest/_torch/executor/test_kv_cache_budget_split.py + - unittest/_torch/executor/test_kv_pool_rebalance.py - unittest/_torch/executor/test_disagg_index_mapper_early_release.py - unittest/_torch/modules/dwdp/test_dwdp_fixup_moe_backends.py - unittest/_torch/modules/dwdp/test_dwdp_manager.py diff --git a/tests/integration/test_lists/test-db/l0_b200.yml b/tests/integration/test_lists/test-db/l0_b200.yml index e553fdc88c06..5fd6b5d6cd83 100644 --- a/tests/integration/test_lists/test-db/l0_b200.yml +++ b/tests/integration/test_lists/test-db/l0_b200.yml @@ -74,6 +74,8 @@ l0_b200: - accuracy/test_llm_api_pytorch.py::TestQwen3_6_27B::test_fp8 - accuracy/test_llm_api_pytorch.py::TestQwen3NextInstruct::test_nvfp4[tp1_block_reuse-cutlass] - accuracy/test_llm_api_pytorch_multimodal.py::TestNanoV3Omni::test_auto_dtype[nvfp4] + - accuracy/test_epd_disagg_multimodal.py::TestVideoMMEEPD::test_disaggregated_videomme[qwen3vl_2b_instruct] + - accuracy/test_epd_disagg_multimodal.py::TestVideoMMEEPD::test_disaggregated_videomme[nemotron_nano_v3_omni_nvfp4] - accuracy/test_llm_api_pytorch.py::TestQwen3_5_35B_A3B::test_bf16_mtp[mtp_on] - accuracy/test_llm_api_pytorch.py::TestQwen3_5_35B_A3B::test_bf16_mtp[mtp_off] - accuracy/test_llm_api_pytorch.py::TestQwen3_5_9B::test_bf16[mtp_on] @@ -106,6 +108,7 @@ l0_b200: - unittest/_torch/modules/test_moe_routing.py - unittest/_torch/modules/test_moe_host_sharer.py - unittest/_torch/modules/fused_moe/test_deepgemm_fused_gather_finalize.py + - unittest/_torch/modules/fused_moe/test_deepgemm_fused_expand_quant.py # ------------- legacy MoE tests --------------- - unittest/_torch/modules/test_fused_moe.py # ------------- MoE: test_moe_backend (by backend) --------------- @@ -114,12 +117,14 @@ l0_b200: - unittest/_torch/modules/moe/test_moe_backend.py::test_moe_backend -k "CUTEDSL" - unittest/_torch/modules/moe/test_moe_backend.py::test_moe_backend -k "DEEPGEMM" - unittest/_torch/modules/moe/test_moe_backend.py::test_moe_backend -k "DENSEGEMM" + - unittest/_torch/modules/moe/test_moe_backend.py::test_trtllm_bf16_unquantized_moe # ------------- MoE: test_single_gpu (by backend) --------------- - unittest/_torch/modules/moe/test_moe_module.py::test_configurable_moe_single_gpu -k "CUTLASS" - unittest/_torch/modules/moe/test_moe_module.py::test_configurable_moe_single_gpu -k "TRTLLM" - unittest/_torch/modules/moe/test_moe_module.py::test_configurable_moe_single_gpu -k "CUTEDSL" - unittest/_torch/modules/moe/test_moe_module.py::test_configurable_moe_single_gpu -k "DEEPGEMM" - unittest/_torch/modules/moe/test_moe_module.py::test_configurable_moe_single_gpu -k "DENSEGEMM" + - unittest/_torch/modules/moe/test_moe_module.py::test_configurable_moe_single_gpu -k "MEGAMOE_DEEPGEMM" # ------------- MoE: FlashInfer & TRTLLM symbol collision tests --------------- - unittest/_torch/flashinfer/test_trtllm_flashinfer_symbol_collision.py # --- MoE end @@ -134,6 +139,7 @@ l0_b200: - unittest/_torch/modeling -k "modeling_llama" - unittest/_torch/modeling -k "modeling_mixtral" - unittest/_torch/modeling -k "modeling_gpt_oss" + - unittest/_torch/modeling/test_modeling_afmoe.py - unittest/_torch/modeling/test_modeling_exaone_moe.py - unittest/_torch/modeling/test_modeling_gemma4.py - unittest/_torch/modeling/test_gemma4_multimodal.py @@ -208,7 +214,14 @@ l0_b200: - unittest/_torch/visual_gen/test_wan21_i2v_teacache.py - unittest/_torch/visual_gen/test_wan21_t2v_teacache.py - unittest/_torch/visual_gen/test_wan_transformer.py + - unittest/_torch/visual_gen/test_cosmos3_transformer.py + - unittest/_torch/visual_gen/test_cosmos3_pipeline.py - examples/test_visual_gen.py::test_wan_t2v_example + - examples/test_visual_gen.py::test_flux1_example + - examples/test_visual_gen.py::test_flux2_example + - examples/test_visual_gen.py::test_ltx2_example + - examples/test_visual_gen.py::test_wan_i2v_example + - examples/test_visual_gen.py::test_cosmos3_example # - examples/test_visual_gen.py # ------------- Host perf module regression tests (6 representative scenarios) --------------- - perf/host_perf/test_module_scheduler.py::test_scheduler_production[production_gen_only_bs8] @@ -304,6 +317,16 @@ l0_b200: - accuracy/test_llm_api_pytorch.py::TestGPTOSS::test_w4_1gpu[v1_kv_cache-True-True-trtllm-auto] - accuracy/test_llm_api_pytorch.py::TestGPTOSS::test_w4_1gpu[v2_kv_cache-True-True-trtllm-auto] - accuracy/test_llm_api_pytorch_multimodal.py::TestNanoV3Omni::test_auto_dtype[bf16] + # ------------- VisualGen single-GPU tests --------------- + - examples/test_visual_gen.py::test_visual_gen_quickstart + - examples/test_visual_gen.py::test_visual_gen_api_walkthrough + - examples/test_visual_gen.py::test_flux1_lpips_against_golden + - examples/test_visual_gen.py::test_flux2_lpips_against_golden + - examples/test_visual_gen.py::test_ltx2_lpips_against_golden + - examples/test_visual_gen.py::test_wan21_t2v_lpips_against_golden + - examples/test_visual_gen.py::test_wan22_t2v_lpips_against_golden + - visual_gen/test_visual_gen_benchmark.py::test_offline_benchmark + - visual_gen/test_visual_gen_benchmark.py::test_online_benchmark[openai-videos] # ------------- AutoDeploy Backend Stages --------------- - condition: ranges: @@ -321,7 +344,7 @@ l0_b200: tests: - accuracy/test_llm_api_autodeploy.py::TestLlama3_1_8B::test_auto_dtype[trtllm-False-1] - accuracy/test_llm_api_autodeploy.py::TestNemotronV2::test_fp8[True] - - accuracy/test_llm_api_autodeploy.py::TestNemotronNanoV3::test_accuracy[fp8-1-trtllm] + - accuracy/test_llm_api_autodeploy.py::TestNemotronNanoV3::test_accuracy[fp8-1-attn_dp_off-trtllm] - accuracy/test_llm_api_autodeploy.py::TestNemotronSuperV3::test_accuracy[nvfp4-1-attn_dp_off-trtllm] - accuracy/test_llm_api_autodeploy.py::TestNemotronSuperV3::test_functional_small[bf16] # ------------- AutoDeploy unit tests --------------- @@ -363,7 +386,7 @@ l0_b200: - accuracy/test_llm_api_autodeploy.py::TestNemotronV2::test_auto_dtype[False] - accuracy/test_llm_api_autodeploy.py::TestNemotronV2::test_auto_dtype[True] - accuracy/test_llm_api_autodeploy.py::TestNemotronV2::test_nvfp4[True] - - accuracy/test_llm_api_autodeploy.py::TestNemotronNanoV3::test_accuracy[nvfp4-1-trtllm] + - accuracy/test_llm_api_autodeploy.py::TestNemotronNanoV3::test_accuracy[nvfp4-1-attn_dp_off-trtllm] - accuracy/test_llm_api_autodeploy.py::TestNemotronSuperV3::test_functional_small[fp8] # ------------- AutoDeploy Perf Sanity --------------- - perf/test_perf_sanity.py::test_e2e[aggr_upload-super_ad_blackwell-super_ad_ws1_1k1k] TIMEOUT (120) diff --git a/tests/integration/test_lists/test-db/l0_b300.yml b/tests/integration/test_lists/test-db/l0_b300.yml index 515dd979da6d..b8368937244c 100644 --- a/tests/integration/test_lists/test-db/l0_b300.yml +++ b/tests/integration/test_lists/test-db/l0_b300.yml @@ -33,6 +33,7 @@ l0_b300: - unittest/_torch/modules/test_moe_load_balancer.py - unittest/_torch/modules/test_moe_routing.py - unittest/_torch/modules/fused_moe/test_deepgemm_fused_gather_finalize.py + - unittest/_torch/modules/fused_moe/test_deepgemm_fused_expand_quant.py # ------------- legacy MoE tests --------------- - unittest/_torch/modules/test_fused_moe.py # ------------- MoE: test_moe_backend (by backend) --------------- @@ -40,6 +41,7 @@ l0_b300: - unittest/_torch/modules/moe/test_moe_backend.py::test_moe_backend -k "TRTLLM" - unittest/_torch/modules/moe/test_moe_backend.py::test_moe_backend -k "CUTEDSL" - unittest/_torch/modules/moe/test_moe_backend.py::test_moe_backend -k "DEEPGEMM" + - unittest/_torch/modules/moe/test_moe_backend.py::test_trtllm_bf16_unquantized_moe # ------------- MoE: test_single_gpu (specific quant per backend) --------------- # CUTLASS backend: FP8, NVFP4, W4A8_MXFP4_MXFP8, W8A16 - unittest/_torch/modules/moe/test_moe_module.py::test_configurable_moe_single_gpu[e60_k4_h2048_i1408-seq=1-dtype=torch.bfloat16-backend=CUTLASS-quant=FP8-routing=Renormalize] diff --git a/tests/integration/test_lists/test-db/l0_dgx_b200.yml b/tests/integration/test_lists/test-db/l0_dgx_b200.yml index a22b8e2558b1..af7c71a39d7f 100644 --- a/tests/integration/test_lists/test-db/l0_dgx_b200.yml +++ b/tests/integration/test_lists/test-db/l0_dgx_b200.yml @@ -1,5 +1,30 @@ version: 0.0.1 l0_dgx_b200: +- condition: + ranges: + system_gpu_count: + gte: 2 + lte: 2 + wildcards: + gpu: + - '*b200*' + linux_distribution_name: ubuntu* + cpu: x86_64 + terms: + stage: pre_merge + backend: pytorch + orchestrator: mpi + tests: + - unittest/_torch/misc/test_autotuner.py::test_autotuner_distributed_strategy + - accuracy/test_llm_api_pytorch.py::TestQwen3_5_35B_A3B::test_bf16[tp2-CUTLASS] + - accuracy/test_llm_api_pytorch.py::TestQwen3_5_35B_A3B::test_bf16[tp2-TRTLLM] + # ------------- KV Cache V2 Scheduler IT (multi-GPU) --------------- + - kv_cache/test_kv_cache_v2_scheduler.py::TestKVCacheV2DSv3Lite::test_mtp_draft_tokens + - kv_cache/test_kv_cache_v2_scheduler.py::TestKVCacheV2DSv3Lite::test_mtp_chunked_draft_tokens + - kv_cache/test_kv_cache_v2_scheduler.py::TestKVCacheV2DSv3Lite::test_mtp_eviction + # ------------- VisualGen multi-GPU tests --------------- + - unittest/_torch/visual_gen/test_flux_pipeline.py::TestFluxParallelism::test_ulysses_2gpu_correctness + - unittest/_torch/visual_gen/test_flux_pipeline.py::TestFluxCombinedOptimizations::test_all_optimizations_combined - condition: ranges: system_gpu_count: @@ -15,7 +40,6 @@ l0_dgx_b200: backend: pytorch orchestrator: mpi tests: - - unittest/_torch/misc/test_autotuner.py::test_autotuner_distributed_strategy - accuracy/test_llm_api_pytorch.py::TestNemotronV3Super::test_auto_dtype_4gpus[4-4-False-True-True] - accuracy/test_llm_api_pytorch.py::TestNemotronV3Super::test_auto_dtype_4gpus[4-4-True-True-True] - accuracy/test_llm_api_pytorch.py::TestNemotronV3Super::test_nvfp4_4gpu_mtp_ar TIMEOUT (60) @@ -30,22 +54,12 @@ l0_dgx_b200: - accuracy/test_llm_api_pytorch.py::TestQwen3_30B_A3B::test_nvfp4[dep4_latency_moe_trtllm-torch_compile=False] - accuracy/test_llm_api_pytorch.py::TestQwen3_30B_A3B::test_nvfp4[dep4_latency_moe_cutlass-torch_compile=False] - accuracy/test_llm_api_pytorch.py::TestQwen3_30B_A3B::test_nvfp4[dep4_latency_moe_cutlass-torch_compile=True] - - accuracy/test_llm_api_pytorch.py::TestQwen3_5_35B_A3B::test_bf16[tp2-CUTLASS] - - accuracy/test_llm_api_pytorch.py::TestQwen3_5_35B_A3B::test_bf16[tp2-TRTLLM] - disaggregated/test_disaggregated.py::test_disaggregated_deepseek_v3_lite_fp8_ucx[DeepSeek-V3-Lite-fp8] - disaggregated/test_disaggregated.py::test_disaggregated_deepseek_v3_lite_fp8_nixl[DeepSeek-V3-Lite-fp8] - disaggregated/test_disaggregated.py::test_disaggregated_gpt_oss_120b_harmony[gpt_oss/gpt-oss-120b] - accuracy/test_llm_api_pytorch.py::TestDeepSeekR1::test_nvfp4_multi_gpus[latency_adp_lmtp_tp4] - - accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_bfloat16_4gpus_python_scheduler[tp4-mtp_nextn=0] - - accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_bfloat16_4gpus_python_scheduler[tp4-mtp_nextn=2] - - accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_bfloat16_4gpus_python_scheduler[ep4-mtp_nextn=0] - - accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_bfloat16_4gpus_python_scheduler[ep4-mtp_nextn=2] - accuracy/test_llm_api_pytorch.py::TestMiniMaxM2::test_4gpus[attention_dp=False-cuda_graph=True-overlap_scheduler=True-tp_size=4-ep_size=4] TIMEOUT (60) - accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_bfloat16_4gpus[pp4-mtp_nextn=0-attention_dp=False-cuda_graph=False-overlap_scheduler=False-torch_compile=False] TIMEOUT (60) - # ------------- KV Cache V2 Scheduler IT (multi-GPU) --------------- - - kv_cache/test_kv_cache_v2_scheduler.py::TestKVCacheV2DSv3Lite::test_mtp_draft_tokens - - kv_cache/test_kv_cache_v2_scheduler.py::TestKVCacheV2DSv3Lite::test_mtp_chunked_draft_tokens - - kv_cache/test_kv_cache_v2_scheduler.py::TestKVCacheV2DSv3Lite::test_mtp_eviction # ------------- NVBug 6025177: trtllm-serve cross-request KV contamination (OpenAI) --------------- - test_e2e.py::test_openai_kv_cache_contamination TIMEOUT (120) - condition: @@ -81,7 +95,6 @@ l0_dgx_b200: - unittest/_torch/modules/moe/test_moe_module.py::test_configurable_moe_multi_gpu -k "DEEPGEMM and not MEGAMOE_DEEPGEMM" # --- MEGAMOE_DEEPGEMM (W4A8_MXFP4_MXFP8 only) --- - unittest/_torch/modules/moe/test_moe_module.py::test_configurable_moe_multi_gpu -k "MEGAMOE_DEEPGEMM" - - unittest/_torch/modules/moe/test_moe_module.py::test_configurable_moe_single_gpu -k "MEGAMOE_DEEPGEMM" # ------------- MoE: test_multi_gpu_eplb --------------- - unittest/_torch/modules/moe/test_moe_module.py::test_configurable_moe_multi_gpu_eplb - condition: @@ -165,8 +178,6 @@ l0_dgx_b200: - accuracy/test_disaggregated_serving.py::TestQwen3NextInstruct::test_auto_dtype[use_py_transceiver=False] TIMEOUT (60) # ------------- VisualGen multi-GPU tests --------------- - unittest/_torch/visual_gen/multi_gpu - - unittest/_torch/visual_gen/test_flux_pipeline.py::TestFluxParallelism::test_ulysses_2gpu_correctness - - unittest/_torch/visual_gen/test_flux_pipeline.py::TestFluxCombinedOptimizations::test_all_optimizations_combined - condition: ranges: system_gpu_count: @@ -192,7 +203,6 @@ l0_dgx_b200: - accuracy/test_llm_api_pytorch.py::TestDeepSeekV32::test_fp8_blockscale[baseline_fp8kv] TIMEOUT (60) - accuracy/test_llm_api_pytorch.py::TestDeepSeekV32::test_fp8_blockscale[latency] TIMEOUT (60) - accuracy/test_llm_api_pytorch.py::TestDeepSeekV32::test_fp8_blockscale[disable_skip_indexer] TIMEOUT (60) - - accuracy/test_llm_api_pytorch.py::TestDeepSeekV32::test_nvfp4_attn_multi_gpus TIMEOUT (60) - accuracy/test_llm_api_pytorch.py::TestDeepSeekV32::test_nvfp4_multi_gpus[baseline_fp8kv] TIMEOUT (60) - accuracy/test_llm_api_pytorch.py::TestDeepSeekV32::test_nvfp4_multi_gpus[latency] TIMEOUT (60) - accuracy/test_llm_api_pytorch.py::TestDeepSeekV32::test_nvfp4_multi_gpus[disable_skip_indexer] TIMEOUT (60) @@ -269,18 +279,6 @@ l0_dgx_b200: - accuracy/test_llm_api_pytorch.py::TestQwen3_30B_A3B::test_nvfp4[dep4_latency_moe_trtllm-torch_compile=True] - accuracy/test_llm_api_pytorch.py::TestQwen3_5_397B_A17B::test_nvfp4[tep4_cutedsl] - accuracy/test_llm_api_pytorch.py::TestQwen3_5_397B_A17B::test_nvfp4[tep4_trtllm] - - accuracy/test_llm_api_pytorch.py::TestLlama4ScoutInstruct::test_fp8[tp4-cuda_graph=True] - - accuracy/test_llm_api_pytorch.py::TestLlama4ScoutInstruct::test_auto_dtype[tp8-cuda_graph=False] - - accuracy/test_llm_api_pytorch.py::TestLlama4ScoutInstruct::test_auto_dtype[tp8ep4-cuda_graph=True] - - accuracy/test_llm_api_pytorch.py::TestLlama4ScoutInstruct::test_auto_dtype[tp8ep8-cuda_graph=True] - - accuracy/test_llm_api_pytorch.py::TestLlama4ScoutInstruct::test_auto_dtype[tp4-cuda_graph=False] - - accuracy/test_llm_api_pytorch.py::TestLlama4ScoutInstruct::test_auto_dtype[tp4ep2-cuda_graph=True] - - accuracy/test_llm_api_pytorch.py::TestLlama4ScoutInstruct::test_auto_dtype[tp4ep4-cuda_graph=True] - - accuracy/test_llm_api_pytorch.py::TestLlama4ScoutInstruct::test_fp8[tp8ep8-cuda_graph=True] - - accuracy/test_llm_api_pytorch.py::TestLlama4ScoutInstruct::test_fp4_chunked_prefill[tp4ep4-cuda_graph=True] - - accuracy/test_llm_api_pytorch.py::TestLlama4ScoutInstruct::test_fp4[tp4-cuda_graph=True] - - accuracy/test_llm_api_pytorch.py::TestLlama4ScoutInstruct::test_fp4[tp8ep8-cuda_graph=True] - - accuracy/test_llm_api_pytorch.py::TestLlama4ScoutInstruct::test_fp8_chunked_prefill[tp4ep4-cuda_graph=True] - accuracy/test_disaggregated_serving.py::TestDeepSeekV3Lite::test_guided_decoding[xgrammar-mtp_nextn=0] - accuracy/test_disaggregated_serving.py::TestQwen3_30B_A3B::test_mixed_ctx_gen_model[ctxpp2gentp2] - accuracy/test_llm_api_pytorch.py::TestGPTOSS::test_w4_4gpus[v1_kv_cache-tp4-cutlass-auto] @@ -305,14 +303,7 @@ l0_dgx_b200: - accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_nvfp4_4gpus[moe_backend=CUTEDSL-mtp_nextn=2-ep4-fp8kv=False-attention_dp=True-cuda_graph=False-overlap_scheduler=False-low_precision_combine=True-torch_compile=False] - accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_nvfp4_4gpus[moe_backend=CUTEDSL-mtp_nextn=2-ep4-fp8kv=True-attention_dp=True-cuda_graph=True-overlap_scheduler=True-low_precision_combine=True-torch_compile=False] - accuracy/test_llm_api_pytorch.py::TestLlama3_3_70BInstruct::test_fp4_tp2pp2[torch_compile=False-enable_gemm_allreduce_fusion=False] - - examples/test_visual_gen.py::test_visual_gen_quickstart - - examples/test_visual_gen.py::test_visual_gen_api_walkthrough - examples/test_visual_gen.py::test_wan_t2v_example - - examples/test_visual_gen.py::test_flux1_lpips_against_golden - - examples/test_visual_gen.py::test_flux2_lpips_against_golden - - examples/test_visual_gen.py::test_ltx2_lpips_against_golden - - examples/test_visual_gen.py::test_wan21_t2v_lpips_against_golden - - examples/test_visual_gen.py::test_wan22_t2v_lpips_against_golden - examples/test_visual_gen_multi_gpu.py::test_wan22_t2v_lpips_against_golden_multi_gpu[ulysses4] - examples/test_visual_gen_multi_gpu.py::test_wan22_t2v_lpips_against_golden_multi_gpu[cfg2_ulysses2] - examples/test_visual_gen_multi_gpu.py::test_wan22_t2v_lpips_against_golden_multi_gpu[ulysses2_ring2] @@ -320,8 +311,6 @@ l0_dgx_b200: - examples/test_visual_gen.py::test_vbench_dimension_score_wan - examples/test_visual_gen.py::test_vbench_dimension_score_wan22_a14b_fp8 - examples/test_visual_gen.py::test_vbench_dimension_score_wan22_a14b_nvfp4 - - visual_gen/test_visual_gen_benchmark.py::test_offline_benchmark - - visual_gen/test_visual_gen_benchmark.py::test_online_benchmark[openai-videos] - examples/test_visual_gen.py::test_vbench_dimension_score_ltx2_bf16 - examples/test_visual_gen.py::test_vbench_dimension_score_ltx2_fp8 - accuracy/test_llm_api_pytorch.py::TestQwen3_30B_A3B_Instruct_2507::test_skip_softmax_attention_4gpus[target_sparsity_0.5-fp8kv=False] @@ -329,6 +318,11 @@ l0_dgx_b200: - accuracy/test_llm_api_pytorch.py::TestQwen3_30B_A3B_Instruct_2507::test_skip_softmax_attention_4gpus[target_sparsity_0.9-fp8kv=False] - accuracy/test_llm_api_pytorch.py::TestQwen3_30B_A3B_Instruct_2507::test_skip_softmax_attention_4gpus[target_sparsity_0.9-fp8kv=True] - disaggregated/test_disaggregated.py::test_disaggregated_mamba_conc_greater_than_mbs[NVIDIA-Nemotron-3-Super-120B-A12B-FP8] + - accuracy/test_llm_api_pytorch.py::TestDeepSeekV32::test_nvfp4_attn_multi_gpus TIMEOUT (60) + - accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_bfloat16_4gpus_python_scheduler[tp4-mtp_nextn=0] + - accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_bfloat16_4gpus_python_scheduler[tp4-mtp_nextn=2] + - accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_bfloat16_4gpus_python_scheduler[ep4-mtp_nextn=0] + - accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_bfloat16_4gpus_python_scheduler[ep4-mtp_nextn=2] # ------------- AutoDeploy Backend Stages --------------- - condition: ranges: @@ -355,10 +349,11 @@ l0_dgx_b200: - unittest/auto_deploy/multigpu/transformations/library/test_tp_sharding.py::test_moe_tp_shard_nvfp4 - unittest/auto_deploy/multigpu/transformations/library/test_allreduce_residual_rmsnorm_fusion.py -k "strategy_auto" - accuracy/test_llm_api_autodeploy.py::TestLlama3_1_8B::test_auto_dtype[trtllm-False-4] - - accuracy/test_llm_api_autodeploy.py::TestNemotronNanoV3::test_accuracy[fp8-4-trtllm] + - accuracy/test_llm_api_autodeploy.py::TestNemotronNanoV3::test_accuracy[fp8-4-attn_dp_off-trtllm] - accuracy/test_llm_api_autodeploy.py::TestNemotronSuperV3::test_accuracy[fp8-4-attn_dp_off-trtllm] - accuracy/test_llm_api_autodeploy.py::TestNemotronUltraV3::test_accuracy[nvfp4-4] - accuracy/test_llm_api_autodeploy.py::TestModelRegistryAccuracy::test_autodeploy_from_registry[nvidia_Llama-3.1-8B-Instruct-NVFP4-True] + - accuracy/test_llm_api_autodeploy.py::TestGPTOSS::test_mxfp4_gsm8k[120b-tp2] # ------------- AutoDeploy Perf Sanity --------------- - perf/test_perf_sanity.py::test_e2e[aggr_upload-super_ad_blackwell-super_ad_ws4_1k1k] TIMEOUT (120) - condition: @@ -378,13 +373,15 @@ l0_dgx_b200: tests: # Move to post-merge due to https://nvbugspro.nvidia.com/bug/6221483 - accuracy/test_llm_api_autodeploy.py::TestNemotronSuperV3::test_mtp[nvfp4_ws4_80gb-trtllm] - - accuracy/test_llm_api_autodeploy.py::TestNemotronUltraV3::test_accuracy[nvfp4-4] - - accuracy/test_llm_api_autodeploy.py::TestNemotronNanoV3::test_accuracy[nvfp4-4-trtllm] + - accuracy/test_llm_api_autodeploy.py::TestNemotronNanoV3::test_accuracy[nvfp4-4-attn_dp_off-trtllm] - accuracy/test_llm_api_autodeploy.py::TestNemotronSuperV3::test_accuracy[bf16-4-attn_dp_off-trtllm] - accuracy/test_llm_api_autodeploy.py::TestNemotronSuperV3::test_accuracy[fp8-4-attn_dp_on-trtllm] - accuracy/test_llm_api_autodeploy.py::TestNemotronSuperV3::test_accuracy[nvfp4-4-attn_dp_on-trtllm] - accuracy/test_llm_api_autodeploy.py::TestNemotronSuperV3::test_mtp[bf16_ws4_180gb-flashinfer] - accuracy/test_llm_api_autodeploy.py::TestNemotronSuperV3::test_mtp[bf16_ws4_180gb-trtllm] + - accuracy/test_llm_api_autodeploy.py::TestGPTOSS::test_mxfp4_gsm8k[20b] + - accuracy/test_llm_api_autodeploy.py::TestGPTOSS::test_mxfp4_gsm8k[120b] + - accuracy/test_llm_api_autodeploy.py::TestGPTOSS::test_mxfp4_gsm8k[120b-ep2] # ------------- AutoDeploy Perf Sanity --------------- - perf/test_perf_sanity.py::test_e2e[aggr_upload-super_ad_blackwell-super_ad_ws4_1k1k] TIMEOUT (120) - perf/test_perf_sanity.py::test_e2e[aggr_upload-super_mtp_ad_blackwell-super_mtp_ad_ws4_1k1k] TIMEOUT (120) diff --git a/tests/integration/test_lists/test-db/l0_dgx_b300.yml b/tests/integration/test_lists/test-db/l0_dgx_b300.yml index e460be687494..cfa268492f48 100644 --- a/tests/integration/test_lists/test-db/l0_dgx_b300.yml +++ b/tests/integration/test_lists/test-db/l0_dgx_b300.yml @@ -69,6 +69,7 @@ l0_dgx_b300: - accuracy/test_disaggregated_serving.py::TestGemma3_1BInstruct::test_kv_cache_v2_nixl_python - accuracy/test_llm_api_pytorch.py::TestDeepSeekR1::test_nvfp4_multi_gpus[throughput_tp4] TIMEOUT (180) - accuracy/test_llm_api_pytorch.py::TestDeepSeekR1::test_nvfp4_multi_gpus[throughput_pp4_mtp] TIMEOUT (180) + - accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_nvfp4_4gpus[moe_backend=TRTLLM-mtp_nextn=0-tp4-fp8kv=False-attention_dp=True-cuda_graph=False-overlap_scheduler=False-low_precision_combine=True-torch_compile=False] - condition: ranges: system_gpu_count: @@ -120,5 +121,4 @@ l0_dgx_b300: - accuracy/test_llm_api_pytorch.py::TestGPTOSS::test_w4_4gpus[v2_kv_cache-ep4-trtllm-auto] - accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_nvfp4_4gpus[moe_backend=TRTLLM-mtp_nextn=0-tp4-fp8kv=True-attention_dp=True-cuda_graph=True-overlap_scheduler=True-low_precision_combine=False-torch_compile=False] - accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_nvfp4_4gpus[moe_backend=CUTLASS-mtp_nextn=2-tp2pp2-fp8kv=True-attention_dp=True-cuda_graph=True-overlap_scheduler=True-low_precision_combine=False-torch_compile=False] - - accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_nvfp4_4gpus[moe_backend=TRTLLM-mtp_nextn=0-tp4-fp8kv=False-attention_dp=True-cuda_graph=False-overlap_scheduler=False-low_precision_combine=True-torch_compile=False] - accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_nvfp4_4gpus[moe_backend=TRTLLM-mtp_nextn=0-tp4-fp8kv=True-attention_dp=True-cuda_graph=True-overlap_scheduler=True-low_precision_combine=True-torch_compile=False] diff --git a/tests/integration/test_lists/test-db/l0_dgx_h100.yml b/tests/integration/test_lists/test-db/l0_dgx_h100.yml index 34110b214d1d..ced2f9403a38 100644 --- a/tests/integration/test_lists/test-db/l0_dgx_h100.yml +++ b/tests/integration/test_lists/test-db/l0_dgx_h100.yml @@ -370,13 +370,18 @@ l0_dgx_h100: - unittest/auto_deploy/multigpu/transformations - accuracy/test_llm_api_autodeploy.py::TestLlama3_1_8B::test_auto_dtype[trtllm-False-4] - accuracy/test_llm_api_autodeploy.py::TestLlama3_1_8B_Instruct_Eagle3::test_eagle3_one_model[trtllm] - - accuracy/test_llm_api_autodeploy.py::TestNemotronNanoV3::test_accuracy[fp8-4-trtllm] + - accuracy/test_llm_api_autodeploy.py::TestNemotronNanoV3::test_accuracy[fp8-4-attn_dp_off-trtllm] + - accuracy/test_llm_api_autodeploy.py::TestNemotronNanoV3::test_accuracy[fp8-4-attn_dp_on-trtllm] - accuracy/test_llm_api_autodeploy.py::TestNemotronSuperV3::test_accuracy[fp8-4-attn_dp_off-trtllm] - accuracy/test_llm_api_autodeploy.py::TestNemotronSuperV3::test_mtp[fp8_ws4_80gb-trtllm] - accuracy/test_llm_api_autodeploy.py::TestLlama3_1_8B::test_attention_dp[4] - accuracy/test_llm_api_autodeploy.py::TestQwen3_5_397B_MoE::test_bf16_small[4] - accuracy/test_llm_api_autodeploy.py::TestGemma4MoE::test_bf16 - accuracy/test_llm_api_autodeploy.py::TestMiniMaxM2::test_finegrained_fp8 + - disaggregated/test_ad_disagg.py::test_async_generation_matches_aggregate + - disaggregated/test_ad_disagg.py::test_async_generation_no_overlap_matches_aggregate + - disaggregated/test_ad_disagg.py::test_async_sharded_generation_handoff + - disaggregated/test_ad_disagg.py::test_async_eagle3_full_model_handoff # ------------- AutoDeploy Backend Stages L1 / Nightly only --------------- - condition: ranges: @@ -393,6 +398,7 @@ l0_dgx_h100: auto_trigger: others orchestrator: mpi tests: + - disaggregated/test_ad_disagg_trtllm_serve.py::test_openai_completion - accuracy/test_llm_api_autodeploy.py::TestModelRegistryAccuracy::test_autodeploy_from_registry[google_gemma-3-1b-it-False] - accuracy/test_llm_api_autodeploy.py::TestModelRegistryAccuracy::test_autodeploy_from_registry[meta-llama_Llama-3.1-8B-Instruct-False] - accuracy/test_llm_api_autodeploy.py::TestModelRegistryAccuracy::test_autodeploy_from_registry[mistralai_Ministral-8B-Instruct-2410-False] @@ -401,7 +407,7 @@ l0_dgx_h100: - accuracy/test_llm_api_autodeploy.py::TestModelRegistryAccuracy::test_autodeploy_from_registry[meta-llama_Llama-3.3-70B-Instruct-False] - accuracy/test_llm_api_autodeploy.py::TestModelRegistryAccuracy::test_autodeploy_from_registry[nvidia_Llama-3.1-8B-Instruct-FP8-True] - accuracy/test_llm_api_autodeploy.py::TestLlama3_1_8B_Instruct_Eagle3::test_eagle3_one_model[flashinfer] - - accuracy/test_llm_api_autodeploy.py::TestNemotronNanoV3::test_accuracy[bf16-4-trtllm] + - accuracy/test_llm_api_autodeploy.py::TestNemotronNanoV3::test_accuracy[bf16-4-attn_dp_off-trtllm] - accuracy/test_llm_api_autodeploy.py::TestNemotronSuperV3::test_accuracy[bf16-4-attn_dp_off-trtllm] - accuracy/test_llm_api_autodeploy.py::TestNemotronSuperV3::test_accuracy[bf16-4-attn_dp_on-trtllm] - accuracy/test_llm_api_autodeploy.py::TestNemotronSuperV3::test_accuracy[fp8-4-attn_dp_on-trtllm] diff --git a/tests/integration/test_lists/test-db/l0_dgx_h200.yml b/tests/integration/test_lists/test-db/l0_dgx_h200.yml index d8a3847c7fac..bea7ec084b82 100644 --- a/tests/integration/test_lists/test-db/l0_dgx_h200.yml +++ b/tests/integration/test_lists/test-db/l0_dgx_h200.yml @@ -23,8 +23,6 @@ l0_dgx_h200: - accuracy/test_llm_api_pytorch.py::TestDeepSeekV32::test_dsa_host_cache_offload[host_cache_offload] - accuracy/test_llm_api_pytorch.py::TestDeepSeekV32::test_dsa_host_cache_offload[host_cache_offload_mtp1] - accuracy/test_llm_api_pytorch.py::TestDeepSeekV32::test_dsa_host_cache_offload[host_cache_offload_mtp3_no_adp] - - accuracy/test_disaggregated_serving.py::TestLlama4ScoutInstruct::test_auto_dtype[True] - - accuracy/test_disaggregated_serving.py::TestLlama4ScoutInstruct::test_auto_dtype[False] - accuracy/test_disaggregated_serving.py::TestDeepSeekV3Lite::test_auto_dtype[mtp_nextn=0-overlap_scheduler=True] - accuracy/test_disaggregated_serving.py::TestDeepSeekV3Lite::test_auto_dtype[mtp_nextn=0-overlap_scheduler=False] - accuracy/test_disaggregated_serving.py::TestDeepSeekV3Lite::test_auto_dtype[mtp_nextn=2-overlap_scheduler=True] diff --git a/tests/integration/test_lists/test-db/l0_gb200_multi_gpus.yml b/tests/integration/test_lists/test-db/l0_gb200_multi_gpus.yml index 9427774e2255..948c05cf162d 100644 --- a/tests/integration/test_lists/test-db/l0_gb200_multi_gpus.yml +++ b/tests/integration/test_lists/test-db/l0_gb200_multi_gpus.yml @@ -20,34 +20,21 @@ l0_gb200_multi_gpus: - accuracy/test_llm_api_pytorch.py::TestLlama3_1_8BInstruct::test_fp8_4gpus[tp4-fp8kv=True-attn_backend=TRTLLM-torch_compile=False] - accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_bfloat16_4gpus[tp4-mtp_nextn=2-attention_dp=True-cuda_graph=True-overlap_scheduler=True-torch_compile=True] - accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_bfloat16_4gpus[ep4-mtp_nextn=2-attention_dp=True-cuda_graph=True-overlap_scheduler=True-torch_compile=False] - - accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_bfloat16_4gpus[tp2pp2-mtp_nextn=0-attention_dp=False-cuda_graph=False-overlap_scheduler=False-torch_compile=True] - accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_bfloat16_4gpus[tp2pp2-mtp_nextn=2-attention_dp=True-cuda_graph=True-overlap_scheduler=True-torch_compile=False] - accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_bfloat16_4gpus_kv_cache_aware_routing[mtp_nextn=0] - accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_bfloat16_4gpus_kv_cache_aware_routing[mtp_nextn=2] - - accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_bfloat16_4gpus_python_scheduler[tp4-mtp_nextn=0] - - accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_bfloat16_4gpus_python_scheduler[tp4-mtp_nextn=2] - - accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_bfloat16_4gpus_python_scheduler[ep4-mtp_nextn=0] - - accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_bfloat16_4gpus_python_scheduler[ep4-mtp_nextn=2] - - accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_nvfp4_4gpus[moe_backend=CUTLASS-mtp_nextn=0-tp4-fp8kv=False-attention_dp=False-cuda_graph=False-overlap_scheduler=False-low_precision_combine=False-torch_compile=False] - accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_nvfp4_4gpus[moe_backend=CUTLASS-mtp_nextn=0-tp4-fp8kv=True-attention_dp=True-cuda_graph=True-overlap_scheduler=True-low_precision_combine=False-torch_compile=False] - - accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_nvfp4_4gpus[moe_backend=CUTLASS-mtp_nextn=0-tp2pp2-fp8kv=False-attention_dp=False-cuda_graph=False-overlap_scheduler=False-low_precision_combine=False-torch_compile=False] - accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_nvfp4_4gpus[moe_backend=CUTLASS-mtp_nextn=0-tp4-fp8kv=True-attention_dp=True-cuda_graph=True-overlap_scheduler=True-low_precision_combine=False-torch_compile=True] - - accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_nvfp4_4gpus[moe_backend=CUTLASS-mtp_nextn=0-ep4-fp8kv=False-attention_dp=False-cuda_graph=False-overlap_scheduler=False-low_precision_combine=False-torch_compile=False] - - accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_nvfp4_4gpus[moe_backend=CUTLASS-mtp_nextn=0-ep4-fp8kv=False-attention_dp=False-cuda_graph=False-overlap_scheduler=False-low_precision_combine=False-torch_compile=True] - accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_nvfp4_4gpus[moe_backend=CUTLASS-mtp_nextn=0-ep4-fp8kv=True-attention_dp=True-cuda_graph=True-overlap_scheduler=True-low_precision_combine=False-torch_compile=True] - accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_nvfp4_4gpus[moe_backend=CUTLASS-mtp_nextn=0-tp2pp2-fp8kv=True-attention_dp=True-cuda_graph=True-overlap_scheduler=True-low_precision_combine=False-torch_compile=False] - accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_nvfp4_4gpus[moe_backend=CUTLASS-mtp_nextn=0-tp2pp2-fp8kv=True-attention_dp=True-cuda_graph=True-overlap_scheduler=True-low_precision_combine=False-torch_compile=True] - - accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_nvfp4_4gpus[moe_backend=CUTLASS-mtp_nextn=2-tp2pp2-fp8kv=False-attention_dp=False-cuda_graph=False-overlap_scheduler=False-low_precision_combine=False-torch_compile=False] - accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_nvfp4_4gpus[moe_backend=CUTLASS-mtp_nextn=2-tp4-fp8kv=True-attention_dp=True-cuda_graph=True-overlap_scheduler=True-low_precision_combine=False-torch_compile=False] - accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_nvfp4_4gpus[moe_backend=TRTLLM-mtp_nextn=2-ep4-fp8kv=True-attention_dp=True-cuda_graph=True-overlap_scheduler=True-low_precision_combine=False-torch_compile=False] - accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_nvfp4_4gpus[moe_backend=CUTLASS-mtp_nextn=2-pp4-fp8kv=True-attention_dp=True-cuda_graph=True-overlap_scheduler=True-low_precision_combine=False-torch_compile=False] - - accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_nvfp4_4gpus[moe_backend=CUTLASS-mtp_nextn=0-pp4-fp8kv=False-attention_dp=False-cuda_graph=False-overlap_scheduler=False-low_precision_combine=False-torch_compile=False] - - accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_nvfp4_4gpus[moe_backend=CUTLASS-mtp_nextn=0-pp4-fp8kv=False-attention_dp=False-cuda_graph=False-overlap_scheduler=False-low_precision_combine=False-torch_compile=True] - accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_nvfp4_4gpus[moe_backend=CUTLASS-mtp_nextn=0-pp4-fp8kv=True-attention_dp=True-cuda_graph=True-overlap_scheduler=True-low_precision_combine=False-torch_compile=False] - accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_nvfp4_4gpus[moe_backend=CUTLASS-mtp_nextn=0-pp4-fp8kv=True-attention_dp=True-cuda_graph=True-overlap_scheduler=True-low_precision_combine=False-torch_compile=True] - accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_nvfp4_4gpus[moe_backend=TRTLLM-mtp_nextn=0-tp4-fp8kv=True-attention_dp=True-cuda_graph=True-overlap_scheduler=True-low_precision_combine=False-torch_compile=False] - accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_nvfp4_4gpus[moe_backend=TRTLLM-mtp_nextn=0-ep4-fp8kv=True-attention_dp=True-cuda_graph=True-overlap_scheduler=True-low_precision_combine=False-torch_compile=False] - - accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_nvfp4_4gpus[moe_backend=CUTLASS-mtp_nextn=0-tp4-fp8kv=False-attention_dp=True-cuda_graph=False-overlap_scheduler=False-low_precision_combine=True-torch_compile=False] - accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_nvfp4_4gpus[moe_backend=CUTLASS-mtp_nextn=0-tp4-fp8kv=True-attention_dp=True-cuda_graph=True-overlap_scheduler=True-low_precision_combine=True-torch_compile=False] - accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_nvfp4_4gpus_online_eplb[fp8kv=True-moe_backend=WIDEEP] - accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_nvfp4_4gpus_online_eplb[fp8kv=True-moe_backend=TRTLLM] @@ -59,6 +46,8 @@ l0_gb200_multi_gpus: - accuracy/test_llm_api_pytorch.py::TestNemotronV3Super::test_nvfp4_4gpus_block_reuse[TEP4_ADP] - accuracy/test_llm_api_pytorch.py::TestNemotronV3Super::test_nvfp4_4gpus_block_reuse[TEP4_ADP_MTP] - accuracy/test_llm_api_pytorch.py::TestNemotronV3Super::test_nvfp4_4gpus_online_eplb[moe_backend=CUTEDSL] + - accuracy/test_llm_api_pytorch.py::TestNemotronV3Super::test_bf16_trtllm_gen_moe_backend[attention_dp=True] + - accuracy/test_llm_api_pytorch.py::TestNemotronV3Super::test_bf16_trtllm_gen_moe_backend[attention_dp=False] - accuracy/test_llm_api_pytorch.py::TestLlama3_3_70BInstruct::test_fp8_tp4[torch_compile=False] - accuracy/test_llm_api_pytorch.py::TestLlama3_3_70BInstruct::test_fp8_tp4[torch_compile=True] - accuracy/test_llm_api_pytorch.py::TestLlama3_3_70BInstruct::test_nvfp4_tp4[torch_compile=False] @@ -124,6 +113,19 @@ l0_gb200_multi_gpus: - accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_nvfp4_4gpus[moe_backend=TRTLLM-mtp_nextn=2-tp4-fp8kv=True-attention_dp=True-cuda_graph=True-overlap_scheduler=True-low_precision_combine=False-torch_compile=False] - accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_nvfp4_4gpus[moe_backend=CUTLASS-mtp_nextn=0-ep4-fp8kv=False-attention_dp=True-cuda_graph=False-overlap_scheduler=False-low_precision_combine=True-torch_compile=False] - accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_nvfp4_4gpus[moe_backend=CUTLASS-mtp_nextn=0-ep4-fp8kv=True-attention_dp=True-cuda_graph=True-overlap_scheduler=True-low_precision_combine=True-torch_compile=False] + - accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_nvfp4_4gpus[moe_backend=CUTLASS-mtp_nextn=0-tp4-fp8kv=False-attention_dp=False-cuda_graph=False-overlap_scheduler=False-low_precision_combine=False-torch_compile=False] + - accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_nvfp4_4gpus[moe_backend=CUTLASS-mtp_nextn=0-tp2pp2-fp8kv=False-attention_dp=False-cuda_graph=False-overlap_scheduler=False-low_precision_combine=False-torch_compile=False] + - accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_nvfp4_4gpus[moe_backend=CUTLASS-mtp_nextn=0-ep4-fp8kv=False-attention_dp=False-cuda_graph=False-overlap_scheduler=False-low_precision_combine=False-torch_compile=False] + - accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_nvfp4_4gpus[moe_backend=CUTLASS-mtp_nextn=0-ep4-fp8kv=False-attention_dp=False-cuda_graph=False-overlap_scheduler=False-low_precision_combine=False-torch_compile=True] + - accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_nvfp4_4gpus[moe_backend=CUTLASS-mtp_nextn=2-tp2pp2-fp8kv=False-attention_dp=False-cuda_graph=False-overlap_scheduler=False-low_precision_combine=False-torch_compile=False] + - accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_nvfp4_4gpus[moe_backend=CUTLASS-mtp_nextn=0-pp4-fp8kv=False-attention_dp=False-cuda_graph=False-overlap_scheduler=False-low_precision_combine=False-torch_compile=False] + - accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_nvfp4_4gpus[moe_backend=CUTLASS-mtp_nextn=0-pp4-fp8kv=False-attention_dp=False-cuda_graph=False-overlap_scheduler=False-low_precision_combine=False-torch_compile=True] + - accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_nvfp4_4gpus[moe_backend=CUTLASS-mtp_nextn=0-tp4-fp8kv=False-attention_dp=True-cuda_graph=False-overlap_scheduler=False-low_precision_combine=True-torch_compile=False] + - accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_bfloat16_4gpus[tp2pp2-mtp_nextn=0-attention_dp=False-cuda_graph=False-overlap_scheduler=False-torch_compile=True] + - accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_bfloat16_4gpus_python_scheduler[tp4-mtp_nextn=0] + - accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_bfloat16_4gpus_python_scheduler[tp4-mtp_nextn=2] + - accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_bfloat16_4gpus_python_scheduler[ep4-mtp_nextn=0] + - accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_bfloat16_4gpus_python_scheduler[ep4-mtp_nextn=2] - accuracy/test_llm_api_pytorch.py::TestQwen3_235B_A22B::test_nvfp4_4gpus[latency_moe_trtllm_eagle3] TIMEOUT (90) - accuracy/test_llm_api_pytorch.py::TestMistralLarge3_675B::test_nvfp4_4gpus[latency_moe_trtllm] TIMEOUT (90) - accuracy/test_llm_api_pytorch.py::TestMistralLarge3_675B::test_nvfp4_4gpus[latency_moe_trtllm_eagle] TIMEOUT (90) diff --git a/tests/integration/test_lists/test-db/l0_h100.yml b/tests/integration/test_lists/test-db/l0_h100.yml index f2dfacf22389..6fd8c15bf5bf 100644 --- a/tests/integration/test_lists/test-db/l0_h100.yml +++ b/tests/integration/test_lists/test-db/l0_h100.yml @@ -36,13 +36,14 @@ l0_h100: - unittest/_torch/modules/test_moe_routing.py - unittest/_torch/modules/test_moe_host_sharer.py - unittest/_torch/modules/fused_moe/test_deepgemm_fused_gather_finalize.py + - unittest/_torch/modules/fused_moe/test_deepgemm_fused_expand_quant.py # ------------- legacy MoE tests --------------- - unittest/_torch/modules/test_fused_moe.py # ------------- MoE: test_moe_backend (by backend) --------------- - unittest/_torch/modules/moe/test_moe_backend.py::test_moe_backend -k "CUTLASS" # ------------- MoE: test_single_gpu (by backend) --------------- - unittest/_torch/modules/moe/test_moe_module.py::test_configurable_moe_single_gpu -k "CUTLASS" - - unittest/_torch/multimodal + - unittest/_torch/multimodal -k "not nemotron_nano_v2_vl_fp8" - unittest/_torch/sampler - unittest/_torch/speculative/test_eagle3.py - unittest/_torch/speculative/hw_agnostic @@ -94,6 +95,8 @@ l0_h100: - accuracy/test_llm_api_pytorch.py::TestGemma3_1BInstruct::test_auto_dtype_vswa_reuse_low_memory_available_partial_reuse - accuracy/test_llm_api_pytorch.py::TestGemma3_1BInstruct::test_auto_dtype_vswa_without_reuse_disable_overlap_scheduler - accuracy/test_llm_api_pytorch.py::TestGemma3_1BInstruct::test_auto_dtype_vswa_reuse_disable_overlap_scheduler + - accuracy/test_kv_pool_rebalance_accuracy.py::TestKvPoolRebalanceAccuracy::test_rebalance_matches_baseline[no_overlap] + - accuracy/test_kv_pool_rebalance_accuracy.py::TestKvPoolRebalanceAccuracy::test_rebalance_matches_baseline[overlap] - accuracy/test_llm_api_pytorch.py::TestLlama3_1_8BInstruct::test_chunked_prefill[use_temperature=False-attn_backend=TRTLLM] TIMEOUT (90) - accuracy/test_llm_api_pytorch.py::TestLlama3_1_8BInstruct::test_chunked_prefill[use_temperature=True-attn_backend=TRTLLM] TIMEOUT (90) - accuracy/test_llm_api_pytorch.py::TestLlama3_1_8BInstruct::test_dummy_load_format @@ -120,6 +123,7 @@ l0_h100: - accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_dummy_load_format - accuracy/test_llm_api_pytorch_multimodal.py::TestGemma3_27BInstruct::test_fp8_prequantized - accuracy/test_llm_api_pytorch_multimodal.py::TestNanoV3Omni::test_auto_dtype[fp8] + - accuracy/test_epd_disagg_multimodal.py::TestVideoMMEEPD::test_disaggregated_videomme[nemotron_nano_v3_omni_fp8] - accuracy/test_llm_api_pytorch.py::TestQwen3_8B::test_fp8_block_scales[latency] - accuracy/test_llm_api_pytorch.py::TestQwen3_8B::test_fp8_block_scales_early_first_token_response - accuracy/test_llm_api_pytorch.py::TestQwen3_8B::test_dummy_load_format @@ -138,6 +142,7 @@ l0_h100: - accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_fp8_block_scales_cuda_graph_padding[mtp_nextn=0] - accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_fp8_block_scales_cuda_graph_padding[mtp_nextn=2] - accuracy/test_llm_api_pytorch.py::TestNemotronV3Nano::test_fp8 + - accuracy/test_llm_api_pytorch.py::TestLagunaXS::test_fp8 - test_e2e.py::test_trtllm_bench_pytorch_backend_sanity[meta-llama/Llama-3.1-8B-llama-3.1-8b-False-False] - test_e2e.py::test_trtllm_bench_pytorch_backend_sanity[meta-llama/Llama-3.1-8B-llama-3.1-8b-instruct-hf-fp8-True-True] - disaggregated/test_disaggregated.py::test_disaggregated_deepseek_v3_lite_fp8_tp1_single_gpu[DeepSeek-V3-Lite-fp8] @@ -391,7 +396,6 @@ l0_h100: backend: tensorrt tests: # ------------- TRT tests --------------- - - examples/test_eagle.py::test_llm_eagle_1gpu_modelopt_ckpt[llama3.1-eagle-8b-hf_v0.5-float16-bs8] # 9 mins - examples/test_eagle.py::test_llm_eagle_1gpu[EAGLE-Vicuna-7B-v1.3-float16-bs1-eagle1] - examples/test_eagle.py::test_llm_eagle_1gpu[EAGLE-Vicuna-7B-v1.3-float16-bs1-eagle2] # 5 mins - accuracy/test_llm_api.py::TestMistral_NeMo_Minitron_8B_Instruct::test_fp8 @@ -494,7 +498,7 @@ l0_h100: - accuracy/test_llm_api_autodeploy.py::TestGemmaE2B::test_gemma3n_e2b_it - accuracy/test_llm_api_autodeploy.py::TestGemmaE2B::test_gemma4_e2b_it - accuracy/test_llm_api_autodeploy.py::TestNemotronV2::test_fp8[True] - - accuracy/test_llm_api_autodeploy.py::TestNemotronNanoV3::test_accuracy[fp8-1-trtllm] + - accuracy/test_llm_api_autodeploy.py::TestNemotronNanoV3::test_accuracy[fp8-1-attn_dp_off-trtllm] - accuracy/test_llm_api_autodeploy.py::TestLlama3_1_8B::test_auto_dtype[triton-False-1] - examples/test_ad_speculative_decoding.py::test_autodeploy_eagle3_one_model_acceptance_rate[trtllm-torch-cudagraph] - examples/test_ad_speculative_decoding.py::test_autodeploy_eagle3_one_model_acceptance_rate[flashinfer-torch-simple] @@ -503,8 +507,13 @@ l0_h100: - examples/test_ad_speculative_decoding.py::test_eagle_wrapper_forward[2] - examples/test_ad_speculative_decoding.py::test_nemotron_mtp_model_with_weights - examples/test_ad_guided_decoding.py::test_autodeploy_guided_decoding_main_json - # ------------- AutoDeploy Perf Sanity --------------- - - perf/test_perf_sanity.py::test_e2e[aggr_upload-llama3_1_8b_fp8_ad_hopper-llama3_1_8b_ad_ws1_1k1k] TIMEOUT (120) + - disaggregated/test_ad_disagg.py::test_disaggregated_logits[tinyllama] + - disaggregated/test_ad_disagg.py::test_disaggregated_logits[deepseek_v3_mla] + - disaggregated/test_ad_disagg.py::test_reduced_layer_handoff_matches_aggregate[tinyllama] + - disaggregated/test_ad_disagg.py::test_reduced_layer_handoff_matches_aggregate[deepseek_v3_mla] + - disaggregated/test_ad_disagg.py::test_tinyllama_batch_handoff_semantic_slots + - disaggregated/test_ad_disagg.py::test_chunked_prefill_handoff[tinyllama] + - disaggregated/test_ad_disagg.py::test_chunked_prefill_handoff[deepseek_v3_mla] - condition: ranges: system_gpu_count: @@ -526,4 +535,4 @@ l0_h100: - accuracy/test_llm_api_autodeploy.py::TestNemotronH::test_auto_dtype[trtllm-triton_ssm-True] - accuracy/test_llm_api_autodeploy.py::TestNemotronV2::test_auto_dtype[False] - accuracy/test_llm_api_autodeploy.py::TestNemotronV2::test_auto_dtype[True] - - accuracy/test_llm_api_autodeploy.py::TestNemotronNanoV3::test_accuracy[bf16-1-trtllm] + - accuracy/test_llm_api_autodeploy.py::TestNemotronNanoV3::test_accuracy[bf16-1-attn_dp_off-trtllm] diff --git a/tests/integration/test_lists/test-db/l0_l40s.yml b/tests/integration/test_lists/test-db/l0_l40s.yml index b76f207dd9c1..af84c6e13384 100644 --- a/tests/integration/test_lists/test-db/l0_l40s.yml +++ b/tests/integration/test_lists/test-db/l0_l40s.yml @@ -32,7 +32,7 @@ l0_l40s: - accuracy/test_llm_api_pytorch_multimodal.py::TestVILA1_5_3B::test_auto_dtype # AutoDeploy: Nemotron-Nano-V3 on Ada uses flashinfer; trtllm has no # (E4M3 input, BF16 output, paged_kv, head_dim=128, sm_89) FMHA cubin. - - accuracy/test_llm_api_autodeploy.py::TestNemotronNanoV3::test_accuracy[fp8-1-flashinfer] + - accuracy/test_llm_api_autodeploy.py::TestNemotronNanoV3::test_accuracy[fp8-1-attn_dp_off-flashinfer] - condition: ranges: system_gpu_count: diff --git a/tests/integration/test_lists/test-db/l0_perf.yml b/tests/integration/test_lists/test-db/l0_perf.yml index 6842e5e4cbef..5bc5a05c45df 100644 --- a/tests/integration/test_lists/test-db/l0_perf.yml +++ b/tests/integration/test_lists/test-db/l0_perf.yml @@ -1,20 +1,5 @@ version: 0.0.1 l0_perf: - - condition: - ranges: - system_gpu_count: - gte: 1 - lte: 1 - wildcards: - gpu: - - '*h100*' - linux_distribution_name: ubuntu* - terms: - stage: pre_merge - backend: tensorrt - tests: - - perf/test_perf.py::test_perf[llama_v3.1_8b_instruct-bench-float16-input_output_len:128,128-reqs:8192] - - condition: ranges: system_gpu_count: diff --git a/tests/integration/test_lists/waives.txt b/tests/integration/test_lists/waives.txt index 347ed4313ee6..83966674a357 100644 --- a/tests/integration/test_lists/waives.txt +++ b/tests/integration/test_lists/waives.txt @@ -1,24 +1,19 @@ -accuracy/test_cli_flow.py::TestGptNext::test_auto_dtype SKIP (https://nvbugs/6162940) accuracy/test_disaggregated_serving.py::TestDeepSeekV32Exp::test_auto_dtype[False] SKIP (https://nvbugs/6120535) -accuracy/test_disaggregated_serving.py::TestDeepSeekV32Exp::test_auto_dtype_with_helix[fifo-cudagraph:with_padding-pp1tp1cp4] SKIP (https://nvbugs/6189918) -accuracy/test_disaggregated_serving.py::TestDeepSeekV32Exp::test_auto_dtype_with_helix[fifo-cudagraph:with_padding-pp1tp2cp2] SKIP (https://nvbugs/6189918) accuracy/test_disaggregated_serving.py::TestDeepSeekV3Lite::test_guided_decoding[llguidance-mtp_nextn=2] SKIP (https://nvbugs/6075533) accuracy/test_disaggregated_serving.py::TestDeepSeekV3Lite::test_kv_cache_v2_nixl_python SKIP (https://nvbugs/6184575) accuracy/test_disaggregated_serving.py::TestLlama3_1_8BInstruct::test_ngram SKIP (https://nvbugs/6245651) -accuracy/test_disaggregated_serving.py::TestQwen3NextInstruct::test_auto_dtype[use_py_transceiver=True] SKIP (https://nvbugs/6260907) accuracy/test_disaggregated_serving.py::TestQwen3_30B_A3B::test_mixed_ctx_gen_model[ctxpp2gentp2] SKIP (https://nvbugs/5748664) +accuracy/test_dwdp_disaggregated_serving.py::TestDwdpDeepSeekV3Lite::test_dwdp_accuracy SKIP (https://nvbugs/6276923) +accuracy/test_dwdp_disaggregated_serving.py::TestDwdpDeepSeekV3Lite::test_dwdp_accuracy_contention_opt SKIP (https://nvbugs/6276923) +accuracy/test_dwdp_disaggregated_serving.py::TestDwdpDeepSeekV3Lite::test_dwdp_accuracy_mode_b_overlap SKIP (https://nvbugs/6276923) accuracy/test_llm_api.py::TestLlama3_1_8BInstruct::test_gather_generation_logits_cuda_graph SKIP (https://nvbugs/5772995) accuracy/test_llm_api.py::TestLlama3_1_8BInstruct::test_guided_decoding_4gpus[xgrammar] SKIP (https://nvbugs/5346443) accuracy/test_llm_api.py::TestMistralNemo12B::test_fp8 SKIP (https://nvbugs/5413197) -accuracy/test_llm_api_autodeploy.py::TestGemma4MoE::test_bf16 SKIP (https://nvbugs/6158397) -accuracy/test_llm_api_autodeploy.py::TestGemmaE2B::test_gemma4_e2b_it SKIP (https://nvbugs/6194934) -accuracy/test_llm_api_autodeploy.py::TestMiniMaxM2::test_finegrained_fp8 SKIP (https://nvbugs/6158397) +accuracy/test_llm_api_autodeploy.py::TestModelRegistryAccuracy::test_autodeploy_from_registry[deepseek-ai_DeepSeek-R1-0528-True] SKIP (https://nvbugs/6278380) accuracy/test_llm_api_autodeploy.py::TestModelRegistryAccuracy::test_autodeploy_from_registry[nvidia_Llama-3.1-8B-Instruct-NVFP4-True] SKIP (https://nvbugs/6245279) -accuracy/test_llm_api_autodeploy.py::TestNemotronNanoV3::test_accuracy[bf16-4-trtllm] SKIP (https://nvbugs/6185150) -accuracy/test_llm_api_autodeploy.py::TestNemotronNanoV3::test_accuracy[nvfp4-4-trtllm] SKIP (https://nvbugs/6185150) accuracy/test_llm_api_autodeploy.py::TestNemotronUltraV3::test_accuracy[nvfp4-8] SKIP (https://nvbugs/6248757) accuracy/test_llm_api_autodeploy.py::TestNemotronV2::test_fp8[True] SKIP (https://nvbugs/6261164) -accuracy/test_llm_api_autodeploy.py::TestQwen3_5_397B_MoE::test_bf16_small[4] SKIP (https://nvbugs/6158397) +accuracy/test_llm_api_autodeploy.py::TestQwen3_5_397B_MoE::test_nvfp4[8] SKIP (https://nvbugs/6278380) accuracy/test_llm_api_pytorch.py::TestDeepSeekR1::test_fp8_blockscale[throughput_mtp_trtllm] SKIP (https://nvbugs/6191524) accuracy/test_llm_api_pytorch.py::TestDeepSeekR1::test_nvfp4_multi_gpus[throughput] SKIP (https://nvbugs/6084775) accuracy/test_llm_api_pytorch.py::TestDeepSeekR1::test_nvfp4_multi_gpus[throughput_mtp] SKIP (https://nvbugs/6029882) @@ -29,17 +24,18 @@ accuracy/test_llm_api_pytorch.py::TestDeepSeekV32::test_dsa_host_cache_offload[h accuracy/test_llm_api_pytorch.py::TestDeepSeekV32::test_dsa_host_cache_offload[host_cache_offload_mtp1] SKIP (https://nvbugs/6185196) accuracy/test_llm_api_pytorch.py::TestDeepSeekV32::test_dsa_host_cache_offload[host_cache_offload_mtp3_no_adp] SKIP (https://nvbugs/6185196) accuracy/test_llm_api_pytorch.py::TestDeepSeekV32::test_fp8_blockscale[baseline] SKIP (https://nvbugs/6185196) -accuracy/test_llm_api_pytorch.py::TestDeepSeekV32::test_fp8_blockscale[disable_skip_indexer] SKIP (https://nvbugs/5859886) accuracy/test_llm_api_pytorch.py::TestDeepSeekV32::test_fp8_blockscale[latency_default] SKIP (https://nvbugs/6185196) accuracy/test_llm_api_pytorch.py::TestDeepSeekV32::test_nvfp4_multi_gpus[baseline] SKIP (https://nvbugs/6185196) accuracy/test_llm_api_pytorch.py::TestDeepSeekV32::test_nvfp4_multi_gpus[baseline_mtp1] SKIP (https://nvbugs/6185196) -accuracy/test_llm_api_pytorch.py::TestDeepSeekV32::test_nvfp4_multi_gpus[fp4_indexer_dsl_mtp2] SKIP (https://nvbugs/6241842) -accuracy/test_llm_api_pytorch.py::TestDeepSeekV32::test_nvfp4_multi_gpus[fp4_indexer_dsl_mtp3] SKIP (https://nvbugs/6241845) +accuracy/test_llm_api_pytorch.py::TestDeepSeekV32::test_nvfp4_multi_gpus_chunked_prefill[latency] SKIP (https://nvbugs/6276981) accuracy/test_llm_api_pytorch.py::TestDeepSeekV32::test_nvfp4_multi_gpus_piecewise_cuda_graph[baseline] SKIP (https://nvbugs/6185196) accuracy/test_llm_api_pytorch.py::TestDeepSeekV32::test_nvfp4_multi_gpus_piecewise_cuda_graph[mtp3_fp8kv_chunked] SKIP (https://nvbugs/5989920) accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_bfloat16[mtp_nextn=2-attention_dp=False-cuda_graph=False-overlap_scheduler=True-torch_compile=False-enable_chunked_prefill=False-v2_kv_cache=True] SKIP (https://nvbugs/6084720) accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_bfloat16[mtp_nextn=2-attention_dp=False-cuda_graph=True-overlap_scheduler=False-torch_compile=False-enable_chunked_prefill=False-v2_kv_cache=True] SKIP (https://nvbugs/6095851) +accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_bfloat16_4gpus[pp4-mtp_nextn=0-attention_dp=False-cuda_graph=False-overlap_scheduler=False-torch_compile=False] SKIP (https://nvbugs/6278337) accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_bfloat16_4gpus[pp4-mtp_nextn=0-attention_dp=False-cuda_graph=False-overlap_scheduler=False-torch_compile=True] SKIP (https://nvbugs/6224637) +accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_bfloat16_4gpus[pp4-mtp_nextn=0-attention_dp=False-cuda_graph=True-overlap_scheduler=False-torch_compile=False] SKIP (https://nvbugs/6278337) +accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_bfloat16_4gpus[pp4-mtp_nextn=0-attention_dp=False-cuda_graph=True-overlap_scheduler=False-torch_compile=True] SKIP (https://nvbugs/6278337) accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_bfloat16_4gpus[pp4-mtp_nextn=0-attention_dp=True-cuda_graph=True-overlap_scheduler=True-torch_compile=False] SKIP (https://nvbugs/6224637) accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_bfloat16_4gpus[pp4-mtp_nextn=2-attention_dp=True-cuda_graph=True-overlap_scheduler=True-torch_compile=False] SKIP (https://nvbugs/6224637) accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_bfloat16_4gpus[pp4-mtp_nextn=2-attention_dp=True-cuda_graph=True-overlap_scheduler=True-torch_compile=True] SKIP (https://nvbugs/6224637) @@ -60,6 +56,8 @@ accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_no_kv_cache_reuse[qua accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_nvfp4_4gpus[moe_backend=CUTLASS-mtp_nextn=0-pp4-fp8kv=False-attention_dp=False-cuda_graph=False-overlap_scheduler=False-low_precision_combine=False-torch_compile=False] SKIP (https://nvbugs/5945081) accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_nvfp4_4gpus[moe_backend=CUTLASS-mtp_nextn=0-pp4-fp8kv=False-attention_dp=False-cuda_graph=False-overlap_scheduler=False-low_precision_combine=False-torch_compile=True] SKIP (https://nvbugs/6224637) accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_nvfp4_4gpus[moe_backend=CUTLASS-mtp_nextn=0-pp4-fp8kv=True-attention_dp=True-cuda_graph=True-overlap_scheduler=True-low_precision_combine=False-torch_compile=False] SKIP (https://nvbugs/6224637) +accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_nvfp4_4gpus[moe_backend=CUTLASS-mtp_nextn=0-pp4-fp8kv=True-attention_dp=True-cuda_graph=True-overlap_scheduler=True-low_precision_combine=False-torch_compile=True] SKIP (https://nvbugs/6278403) +accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_nvfp4_4gpus[moe_backend=CUTLASS-mtp_nextn=0-tp4-fp8kv=True-attention_dp=True-cuda_graph=True-overlap_scheduler=True-low_precision_combine=False-torch_compile=True] SKIP (https://nvbugs/6272673) accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_nvfp4_4gpus[moe_backend=CUTLASS-mtp_nextn=2-pp4-fp8kv=False-attention_dp=False-cuda_graph=False-overlap_scheduler=False-low_precision_combine=False-torch_compile=False] SKIP (https://nvbugs/6224637) accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_nvfp4_4gpus[moe_backend=CUTLASS-mtp_nextn=2-pp4-fp8kv=True-attention_dp=True-cuda_graph=True-overlap_scheduler=True-low_precision_combine=False-torch_compile=False] SKIP (https://nvbugs/6245394) accuracy/test_llm_api_pytorch.py::TestGPTOSS::test_dflash SKIP (https://nvbugs/6156233) @@ -67,7 +65,7 @@ accuracy/test_llm_api_pytorch.py::TestGPTOSS::test_eagle3_4gpus[v2_kv_cache-cutl accuracy/test_llm_api_pytorch.py::TestGPTOSS::test_eagle3_guided_decoding_4gpus[one_model] SKIP (https://nvbugs/5596343) accuracy/test_llm_api_pytorch.py::TestGPTOSS::test_eagle3_guided_decoding_4gpus[two_model] SKIP (https://nvbugs/5596343) accuracy/test_llm_api_pytorch.py::TestGPTOSS::test_w4_1gpu[v1_kv_cache-True-True-triton-auto] SKIP (https://nvbugs/6026676) -accuracy/test_llm_api_pytorch.py::TestGPTOSS::test_w4_4gpus[v1_kv_cache-dp4-cutlass-auto] SKIP (https://nvbugs/6153955) +accuracy/test_llm_api_pytorch.py::TestGPTOSS::test_w4_1gpu[v2_kv_cache-True-True-trtllm-fp8] SKIP (https://nvbugs/6276985) accuracy/test_llm_api_pytorch.py::TestGPTOSS::test_w4_4gpus[v1_kv_cache-ep4-cutlass-auto] SKIP (https://nvbugs/5596343) accuracy/test_llm_api_pytorch.py::TestGPTOSS::test_w4_4gpus[v1_kv_cache-tp4-cutlass-auto] SKIP (https://nvbugs/5596343) accuracy/test_llm_api_pytorch.py::TestGPTOSS::test_w4_4gpus[v1_kv_cache-tp4-cutlass-fp8] SKIP (https://nvbugs/5651865) @@ -75,6 +73,7 @@ accuracy/test_llm_api_pytorch.py::TestGPTOSS::test_w4_4gpus[v2_kv_cache-dp4-cutl accuracy/test_llm_api_pytorch.py::TestGPTOSS::test_w4_4gpus[v2_kv_cache-ep4-cutlass-auto] SKIP (https://nvbugs/5596343) accuracy/test_llm_api_pytorch.py::TestGPTOSS::test_w4_4gpus[v2_kv_cache-tp4-cutlass-auto] SKIP (https://nvbugs/5596343) accuracy/test_llm_api_pytorch.py::TestGPTOSS::test_w4_chunked_prefill[cutlass-auto] SKIP (https://nvbugs/5596343) +accuracy/test_llm_api_pytorch.py::TestGPTOSS::test_w4_chunked_prefill[trtllm-auto] SKIP (https://nvbugs/6278350) accuracy/test_llm_api_pytorch.py::TestKanana_Instruct::test_auto_dtype SKIP (https://nvbugs/6209806) accuracy/test_llm_api_pytorch.py::TestKimiK25::test_nvfp4[dep8] SKIP (https://nvbugs/6260890) accuracy/test_llm_api_pytorch.py::TestKimiK25::test_nvfp4[tp8] SKIP (https://nvbugs/6248837) @@ -92,6 +91,7 @@ accuracy/test_llm_api_pytorch.py::TestLlama3_1_8BInstruct::test_bfloat16_4gpus[t accuracy/test_llm_api_pytorch.py::TestLlama3_1_8BInstruct::test_chunked_prefill[use_temperature=False-attn_backend=TRTLLM] SKIP (https://nvbugs/5997547) accuracy/test_llm_api_pytorch.py::TestLlama3_1_8BInstruct::test_dflash SKIP (https://nvbugs/6141653) accuracy/test_llm_api_pytorch.py::TestLlama3_1_8BInstruct::test_fp8_4gpus[pp4-fp8kv=True-attn_backend=FLASHINFER-torch_compile=False] SKIP (https://nvbugs/6211191) +accuracy/test_llm_api_pytorch.py::TestLlama3_1_8BInstruct::test_fp8_4gpus[pp4-fp8kv=True-attn_backend=TRTLLM-torch_compile=False] SKIP (https://nvbugs/6278337) accuracy/test_llm_api_pytorch.py::TestLlama3_1_8BInstruct::test_fp8_4gpus[tp4-fp8kv=False-attn_backend=TRTLLM-torch_compile=True] SKIP (https://nvbugs/6211191) accuracy/test_llm_api_pytorch.py::TestLlama3_1_8BInstruct::test_fp8_beam_search[enable_cuda_graph=False-enable_padding=False-disable_overlap_scheduler=False-sampler_async_worker=False] SKIP (https://nvbugs/6141653) accuracy/test_llm_api_pytorch.py::TestLlama3_1_8BInstruct::test_fp8_beam_search[enable_cuda_graph=False-enable_padding=False-disable_overlap_scheduler=True-sampler_async_worker=False] SKIP (https://nvbugs/6141653) @@ -122,29 +122,24 @@ accuracy/test_llm_api_pytorch.py::TestMiniMaxM2::test_4gpus[attention_dp=False-c accuracy/test_llm_api_pytorch.py::TestMistralLarge3_675B::test_fp8[latency_moe_deepgemm] SKIP (https://nvbugs/6163033) accuracy/test_llm_api_pytorch.py::TestMistralLarge3_675B::test_nvfp4_4gpus[latency_moe_trtllm] SKIP (https://nvbugs/6248827) accuracy/test_llm_api_pytorch.py::TestMistralLarge3_675B::test_nvfp4_4gpus[latency_moe_trtllm_eagle] SKIP (https://nvbugs/6157892) -accuracy/test_llm_api_pytorch.py::TestNemotronNas::test_auto_dtype_tp8 SKIP (https://nvbugs/6244727) -accuracy/test_llm_api_pytorch.py::TestNemotronV3Super::test_nvfp4_8gpus_mtp SKIP (https://nvbugs/6211693) accuracy/test_llm_api_pytorch.py::TestPhi4MiniInstruct::test_auto_dtype SKIP (https://nvbugs/6076767) accuracy/test_llm_api_pytorch.py::TestQwen3NextInstruct::test_bf16_4gpu[tp4ep4_cudagraph_overlap_adp_off] SKIP (https://nvbugs/6255417) accuracy/test_llm_api_pytorch.py::TestQwen3NextInstruct::test_bf16_4gpu[tp4ep4_cudagraph_overlap_adp_on] SKIP (https://nvbugs/6094068) +accuracy/test_llm_api_pytorch.py::TestQwen3NextInstruct::test_nvfp4[no_cuda_graph_overlap-cutlass] SKIP (https://nvbugs/6281014) accuracy/test_llm_api_pytorch.py::TestQwen3NextInstruct::test_nvfp4[tp1-cutlass] SKIP (https://nvbugs/6116088) +accuracy/test_llm_api_pytorch.py::TestQwen3NextInstruct::test_nvfp4[tp4ep1-cutlass] SKIP (https://nvbugs/6281014) accuracy/test_llm_api_pytorch.py::TestQwen3NextInstruct::test_nvfp4[tp4ep4_adp_on-trtllm] SKIP (https://nvbugs/6094068) accuracy/test_llm_api_pytorch.py::TestQwen3_235B_A22B::test_fp8[latency] SKIP (https://nvbugs/6177390) accuracy/test_llm_api_pytorch.py::TestQwen3_235B_A22B::test_fp8[throughput_latency] SKIP (https://nvbugs/6177390) accuracy/test_llm_api_pytorch.py::TestQwen3_30B_A3B_Instruct_2507::test_skip_softmax_attention_4gpus[target_sparsity_0.5-fp8kv=False] SKIP (https://nvbugs/6260915) accuracy/test_llm_api_pytorch.py::TestQwen3_30B_A3B_Instruct_2507::test_skip_softmax_attention_4gpus[target_sparsity_0.5-fp8kv=True] SKIP (https://nvbugs/6248783) accuracy/test_llm_api_pytorch.py::TestQwen3_30B_A3B_Instruct_2507::test_skip_softmax_attention_4gpus[target_sparsity_0.9-fp8kv=False] SKIP (https://nvbugs/6260915) -accuracy/test_llm_api_pytorch.py::TestQwen3_5_35B_A3B::test_fp8[enable_block_reuse=False] SKIP (https://nvbugs/6212252) -accuracy/test_llm_api_pytorch.py::TestQwen3_5_35B_A3B::test_fp8[enable_block_reuse=True] SKIP (https://nvbugs/6210714) accuracy/test_llm_api_pytorch.py::TestQwen3_5_397B_A17B::test_nvfp4[tep4_cutedsl] SKIP (https://nvbugs/6255417) +accuracy/test_llm_api_pytorch.py::TestQwen3_5_4B::test_bf16 SKIP (https://nvbugs/6283537) accuracy/test_llm_api_pytorch.py::TestQwen3_5_9B::test_bf16[mtp_off] SKIP (https://nvbugs/6212250) accuracy/test_llm_api_pytorch.py::TestQwen3_5_9B::test_bf16[mtp_on] SKIP (https://nvbugs/6212250) accuracy/test_llm_api_pytorch.py::TestQwen3_8B::test_fp8_block_scales_early_first_token_response SKIP (https://nvbugs/6200128) -accuracy/test_llm_api_pytorch_multimodal.py::TestExaone4_5_33B::test_auto_dtype[forced_chunked_prefill] SKIP (https://nvbugs/6211189) -accuracy/test_llm_api_pytorch_multimodal.py::TestExaone4_5_33B::test_auto_dtype[full_budget] SKIP (https://nvbugs/6211189) accuracy/test_llm_api_pytorch_multimodal.py::TestGemma3_27BInstruct::test_fp8_prequantized SKIP (https://nvbugs/6215689) -accuracy/test_llm_api_pytorch_multimodal.py::TestMistralLarge3_675B::test_nvfp4_4gpus[latency_moe_trtllm] SKIP (https://nvbugs/6181383) -accuracy/test_llm_api_pytorch_multimodal.py::TestNemotron_Nano_12B_V2_VL::test_auto_dtype[forced_chunked_prefill] SKIP (https://nvbugs/6248744) accuracy/test_llm_api_pytorch_ray.py::TestLlama3_1_8BInstruct::test_pp2_ray SKIP (https://nvbugs/6094070) cpp/test_e2e.py::test_benchmarks[bart-90] SKIP (https://nvbugs/5550689) cpp/test_e2e.py::test_benchmarks[gpt-80] SKIP (https://nvbugs/5550689) @@ -192,7 +187,6 @@ examples/test_bert.py::test_llm_bert_general[compare_hf-enable_remove_input_padd examples/test_bert.py::test_llm_bert_general[compare_hf-enable_remove_input_padding-use_attention_plugin-enable_context_fmha-tp:2-pp:1-float16-RobertaForQuestionAnswering-bert/roberta-base-squad2] SKIP (https://nvbugs/5234058) examples/test_eagle.py::test_llm_eagle_1gpu[EAGLE-Vicuna-7B-v1.3-float16-bs1-eagle1] SKIP (https://nvbugs/5546507) examples/test_eagle.py::test_llm_eagle_1gpu[EAGLE-Vicuna-7B-v1.3-float16-bs1-eagle2] SKIP (https://nvbugs/5546507) -examples/test_eagle.py::test_llm_eagle_1gpu_modelopt_ckpt[llama3.1-eagle-8b-hf_v0.5-float16-bs8] SKIP (https://nvbugs/5546507) examples/test_gpt.py::test_llm_minitron_fp8_with_pseudo_loras[4b] SKIP (https://nvbugs/5606233) examples/test_granite.py::test_granite_bf16_lora[granite-3.0-1b-a400m-instruct] SKIP (https://nvbugs/5431132) examples/test_granite.py::test_llm_granite[granite-3.0-1b-a400m-instruct-bfloat16] SKIP (https://nvbugs/5608979) @@ -215,26 +209,81 @@ examples/test_visual_gen.py::test_ltx2_lpips_against_golden SKIP (https://nvbugs examples/test_visual_gen.py::test_wan21_t2v_lpips_against_golden SKIP (https://nvbugs/6215688) examples/test_visual_gen.py::test_wan22_t2v_lpips_against_golden SKIP (https://nvbugs/6215688) examples/test_visual_gen.py::test_wan_t2v_example SKIP (https://nvbugs/6215688) +examples/test_visual_gen_multi_gpu.py::test_wan22_t2v_lpips_against_golden_multi_gpu[attn2d_2x2] SKIP (https://nvbugs/6272644) +examples/test_visual_gen_multi_gpu.py::test_wan22_t2v_lpips_against_golden_multi_gpu[cfg2_ulysses2] SKIP (https://nvbugs/6272644) +examples/test_visual_gen_multi_gpu.py::test_wan22_t2v_lpips_against_golden_multi_gpu[ulysses2_ring2] SKIP (https://nvbugs/6272644) +examples/test_visual_gen_multi_gpu.py::test_wan22_t2v_lpips_against_golden_multi_gpu[ulysses4] SKIP (https://nvbugs/6272644) examples/test_whisper.py::test_llm_whisper_general[large-v3-disable_gemm_plugin-disable_attention_plugin-disable_weight_only-float16-nb:1-use_python_runtime] SKIP (https://nvbugs/5244570) +full:A100/accuracy/test_llm_api_pytorch.py::TestQwen3_5_35B_A3B::test_bf16[tp1-CUTLASS] SKIP (https://nvbugs/6273850) +full:A100/accuracy/test_llm_api_pytorch.py::TestQwen3_5_35B_A3B::test_bf16_mtp[mtp_off] SKIP (https://nvbugs/6273850) +full:A100/accuracy/test_llm_api_pytorch.py::TestQwen3_5_35B_A3B::test_bf16_mtp[mtp_on] SKIP (https://nvbugs/6239637) +full:A100X/llmapi/test_llm_examples.py::test_llmapi_speculative_decoding_mtp SKIP (https://nvbugs/6287561) full:B200/perf/test_perf.py::test_perf[quant:int8_sq_per_tensor] SKIP (https://nvbugs/5161074) full:B200/perf/test_perf.py::test_perf[quant:int8_sq_per_token_channel] SKIP (https://nvbugs/5161074) full:B200/perf/test_perf.py::test_perf[quant:w4a8_awq] SKIP (https://nvbugs/5161074) full:B300/unittest/_torch/modules/moe/test_moe_backend.py::test_moe_backend -k "TRTLLM" SKIP (https://nvbugs/6165866) full:DGX_B200/unittest/_torch/modules/moe/test_moe_backend.py::test_moe_backend -k "TRTLLM" SKIP (https://nvbugs/6165866) +full:DGX_B200/unittest/_torch/visual_gen/test_cosmos3_pipeline.py SKIP (temporary ToT main waive; Cosmos3 config split fix pending) +full:DGX_B200/unittest/_torch/visual_gen/test_cosmos3_pipeline.py::TestCosmos3FP8Load::test_fp8_load_and_t2v SKIP (temporary ToT main waive; Cosmos3 config split fix pending) +full:DGX_B200/unittest/_torch/visual_gen/test_cosmos3_transformer.py SKIP (temporary ToT main waive; Cosmos3 config split fix pending) +full:DGX_B200/unittest/_torch/visual_gen/test_cosmos3_transformer.py::TestCosmos3TransformerCheckpoint::test_load_fp8_quantization[FP8] SKIP (temporary ToT main waive; Cosmos3 config split fix pending) +full:DGX_B200/unittest/_torch/visual_gen/test_cosmos3_transformer.py::TestCosmos3Unit::test_model_structure SKIP (temporary ToT main waive; Cosmos3 config split fix pending) +full:DGX_B200/unittest/_torch/visual_gen/test_cosmos3_transformer.py::TestCosmos3Unit::test_reset_cache SKIP (temporary ToT main waive; Cosmos3 config split fix pending) +full:DGX_B200/unittest/_torch/visual_gen/test_cosmos3_transformer.py::TestCosmos3Unit::test_sanity_forward SKIP (temporary ToT main waive; Cosmos3 config split fix pending) +full:DGX_B200/unittest/_torch/visual_gen/test_cosmos3_transformer.py::TestCosmos3Unit::test_sanity_forward_i2v_mask SKIP (temporary ToT main waive; Cosmos3 config split fix pending) full:GH200/examples/test_multimodal.py::test_llm_multimodal_general[video-neva-pp:1-tp:1-bfloat16-bs:1-cpp_e2e:False-nb:1] SKIP (https://nvbugs/4731514) full:GH200/examples/test_nemotron.py::test_llm_nemotron_3_8b_1gpu[bfloat16-fp8] SKIP (arm is not supported) full:GH200/examples/test_qwen2audio.py::test_llm_qwen2audio_single_gpu[qwen2_audio_7b_instruct] SKIP (arm is not supported) full:GH200/unittest/trt/model_api/test_model_quantization.py SKIP (https://nvbugs/4979955) +full:H100/accuracy/test_llm_api_pytorch.py::TestQwen3_6_27B::test_fp8 SKIP (https://nvbugs/6255417) +full:H100/disaggregated/test_disaggregated.py::test_disaggregated_logprobs_serving[llama-3.1-8b-instruct] SKIP (https://nvbugs/6275959) full:H100/disaggregated/test_disaggregated.py::test_disaggregated_stress_test[input8k-output1k-conc512-gpt_oss_120b_eagle_triton_stress] SKIP (https://nvbugs/6250439) full:H100_PCIe/unittest/llmapi/test_llm_pytorch.py::test_llama_7b_multi_lora_evict_and_reload_lora_gpu_cache SKIP (https://nvbugs/5682551) full:H20/accuracy/test_llm_api_pytorch.py::TestGPTOSS::test_w4_chunked_prefill[triton-auto] SKIP (https://nvbugs/6026676) +full:L40S/accuracy/test_llm_api_pytorch.py::TestQwen3_30B_A3B::test_fp8[latency-torch_compile=True] SKIP (https://nvbugs/6276841) +full:L40S/accuracy/test_llm_api_pytorch_encode.py::TestDecoderEncode::test_decoder_encode_cuda_graph_matches_eager_logits[tinyllama-1.1b] SKIP (https://nvbugs/6276842) full:RTX/accuracy/test_llm_api_pytorch.py::TestGemma3_1BInstruct::test_auto_dtype SKIP (https://nvbugs/5569696) full:RTXPro6000D/accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_nvfp4_4gpus[moe_backend=CUTLASS-mtp_nextn=0-ep4-fp8kv=True-attention_dp=True-cuda_graph=True-overlap_scheduler=True-low_precision_combine=False-torch_compile=False] SKIP (https://nvbugs/5948435) full:RTXPro6000D/accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_nvfp4_4gpus[moe_backend=CUTLASS-mtp_nextn=0-ep4-fp8kv=True-attention_dp=True-cuda_graph=True-overlap_scheduler=True-low_precision_combine=False-torch_compile=True] SKIP (https://nvbugs/5961814) full:RTXPro6000D/accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_nvfp4_4gpus[moe_backend=CUTLASS-mtp_nextn=2-ep4-fp8kv=True-attention_dp=True-cuda_graph=True-overlap_scheduler=True-low_precision_combine=False-torch_compile=False] SKIP (https://nvbugs/5961814) full:RTXPro6000D/accuracy/test_llm_api_pytorch.py::TestQwen3_30B_A3B::test_nvfp4[dep4_latency_moe_cutlass-torch_compile=True] SKIP (https://nvbugs/5929339) +full:RTX_6000D/accuracy/test_llm_api_pytorch.py::TestGPTOSS::test_w4_1gpu[v1_kv_cache-True-True-cutlass-fp8] SKIP (https://nvbugs/6273845) +full:RTX_6000D/accuracy/test_llm_api_pytorch.py::TestGPTOSS::test_w4_1gpu[v1_kv_cache-True-True-trtllm-auto] SKIP (https://nvbugs/6273846) +full:RTX_6000D/accuracy/test_llm_api_pytorch.py::TestGPTOSS::test_w4_1gpu[v1_kv_cache-True-True-trtllm-fp8] SKIP (https://nvbugs/6273846) +full:RTX_6000D/accuracy/test_llm_api_pytorch.py::TestGPTOSS::test_w4_1gpu[v2_kv_cache-True-True-trtllm-auto] SKIP (https://nvbugs/6273846) +full:RTX_6000D/accuracy/test_llm_api_pytorch.py::TestGPTOSS::test_w4_1gpu[v2_kv_cache-True-True-trtllm-fp8] SKIP (https://nvbugs/6273846) +full:RTX_6000D/accuracy/test_llm_api_pytorch.py::TestGPTOSS::test_w4_2gpus[dp2-trtllm-auto] SKIP (https://nvbugs/6273846) +full:RTX_6000D/accuracy/test_llm_api_pytorch.py::TestGPTOSS::test_w4_2gpus[dp2-trtllm-fp8] SKIP (https://nvbugs/6273846) +full:RTX_6000D/accuracy/test_llm_api_pytorch.py::TestGPTOSS::test_w4_2gpus[ep2-trtllm-auto] SKIP (https://nvbugs/6273846) +full:RTX_6000D/accuracy/test_llm_api_pytorch.py::TestGPTOSS::test_w4_2gpus[ep2-trtllm-fp8] SKIP (https://nvbugs/6273846) +full:RTX_6000D/accuracy/test_llm_api_pytorch.py::TestGPTOSS::test_w4_2gpus[tp2-trtllm-auto] SKIP (https://nvbugs/6273846) +full:RTX_6000D/accuracy/test_llm_api_pytorch.py::TestGPTOSS::test_w4_2gpus[tp2-trtllm-fp8] SKIP (https://nvbugs/6273846) +full:RTX_6000D/accuracy/test_llm_api_pytorch.py::TestQwen3_5_35B_A3B::test_bf16[tp1-CUTLASS] SKIP (https://nvbugs/6273850) +full:RTX_6000D/accuracy/test_llm_api_pytorch.py::TestQwen3_5_35B_A3B::test_bf16_mtp[mtp_off] SKIP (https://nvbugs/6273850) +full:RTX_6000D/accuracy/test_llm_api_pytorch.py::TestQwen3_5_35B_A3B::test_bf16_mtp[mtp_on] SKIP (https://nvbugs/6275856) +full:RTX_6000D/accuracy/test_llm_api_pytorch.py::TestQwen3_5_4B::test_dflash SKIP (https://nvbugs/6273850) +full:RTX_6000D/accuracy/test_llm_api_pytorch.py::TestQwen3_5_4B::test_fp8 SKIP (https://nvbugs/6273850) +full:RTX_6000D/accuracy/test_llm_api_pytorch.py::TestQwen3_6_27B::test_fp8 SKIP (https://nvbugs/6273850) +full:RTX_PRO_6000_Blackwell_Server_Edition/accuracy/test_llm_api_pytorch.py::TestGPTOSS::test_w4_1gpu[v1_kv_cache-True-True-cutlass-fp8] SKIP (https://nvbugs/6273845) +full:RTX_PRO_6000_Blackwell_Server_Edition/accuracy/test_llm_api_pytorch.py::TestGPTOSS::test_w4_1gpu[v1_kv_cache-True-True-trtllm-auto] SKIP (https://nvbugs/6273846) +full:RTX_PRO_6000_Blackwell_Server_Edition/accuracy/test_llm_api_pytorch.py::TestGPTOSS::test_w4_1gpu[v1_kv_cache-True-True-trtllm-fp8] SKIP (https://nvbugs/6273846) +full:RTX_PRO_6000_Blackwell_Server_Edition/accuracy/test_llm_api_pytorch.py::TestGPTOSS::test_w4_1gpu[v2_kv_cache-True-True-trtllm-auto] SKIP (https://nvbugs/6273846) +full:RTX_PRO_6000_Blackwell_Server_Edition/accuracy/test_llm_api_pytorch.py::TestGPTOSS::test_w4_1gpu[v2_kv_cache-True-True-trtllm-fp8] SKIP (https://nvbugs/6273846) +full:RTX_PRO_6000_Blackwell_Server_Edition/accuracy/test_llm_api_pytorch.py::TestGPTOSS::test_w4_2gpus[dp2-trtllm-auto] SKIP (https://nvbugs/6273846) +full:RTX_PRO_6000_Blackwell_Server_Edition/accuracy/test_llm_api_pytorch.py::TestGPTOSS::test_w4_2gpus[dp2-trtllm-fp8] SKIP (https://nvbugs/6273846) +full:RTX_PRO_6000_Blackwell_Server_Edition/accuracy/test_llm_api_pytorch.py::TestGPTOSS::test_w4_2gpus[ep2-trtllm-auto] SKIP (https://nvbugs/6273846) +full:RTX_PRO_6000_Blackwell_Server_Edition/accuracy/test_llm_api_pytorch.py::TestGPTOSS::test_w4_2gpus[ep2-trtllm-fp8] SKIP (https://nvbugs/6273846) +full:RTX_PRO_6000_Blackwell_Server_Edition/accuracy/test_llm_api_pytorch.py::TestGPTOSS::test_w4_2gpus[tp2-trtllm-auto] SKIP (https://nvbugs/6273846) +full:RTX_PRO_6000_Blackwell_Server_Edition/accuracy/test_llm_api_pytorch.py::TestGPTOSS::test_w4_2gpus[tp2-trtllm-fp8] SKIP (https://nvbugs/6273846) full:RTX_PRO_6000_Blackwell_Server_Edition/accuracy/test_llm_api_pytorch.py::TestLlama3_3_70BInstruct::test_fp4_tp2pp2[torch_compile=True-enable_gemm_allreduce_fusion=False] SKIP (https://nvbugs/6262407) full:RTX_PRO_6000_Blackwell_Server_Edition/accuracy/test_llm_api_pytorch.py::TestLlama3_3_70BInstruct::test_nvfp4_tp4[torch_compile=False] SKIP (https://nvbugs/6262407) +full:RTX_PRO_6000_Blackwell_Server_Edition/accuracy/test_llm_api_pytorch.py::TestQwen3_5_35B_A3B::test_bf16[tp1-CUTLASS] SKIP (https://nvbugs/6273850) +full:RTX_PRO_6000_Blackwell_Server_Edition/accuracy/test_llm_api_pytorch.py::TestQwen3_5_35B_A3B::test_bf16_mtp[mtp_off] SKIP (https://nvbugs/6273850) +full:RTX_PRO_6000_Blackwell_Server_Edition/accuracy/test_llm_api_pytorch.py::TestQwen3_5_35B_A3B::test_bf16_mtp[mtp_on] SKIP (https://nvbugs/6275856) +full:RTX_PRO_6000_Blackwell_Server_Edition/accuracy/test_llm_api_pytorch.py::TestQwen3_5_4B::test_bf16 SKIP (https://nvbugs/6273850) +full:RTX_PRO_6000_Blackwell_Server_Edition/accuracy/test_llm_api_pytorch.py::TestQwen3_5_4B::test_dflash SKIP (https://nvbugs/6273850) +full:RTX_PRO_6000_Blackwell_Server_Edition/accuracy/test_llm_api_pytorch.py::TestQwen3_5_4B::test_fp8 SKIP (https://nvbugs/6273850) +full:RTX_PRO_6000_Blackwell_Server_Edition/accuracy/test_llm_api_pytorch.py::TestQwen3_6_27B::test_fp8 SKIP (https://nvbugs/6273850) full:RTX_PRO_6000_Blackwell_Server_Edition/perf/test_perf.py::test_perf[quant:int8_sq_per_tensor] SKIP (https://nvbugs/5161074) full:RTX_PRO_6000_Blackwell_Server_Edition/perf/test_perf.py::test_perf[quant:int8_sq_per_token_channel] SKIP (https://nvbugs/5161074) full:RTX_PRO_6000_Blackwell_Server_Edition/perf/test_perf.py::test_perf[quant:w4a8_awq] SKIP (https://nvbugs/5161074) @@ -271,30 +320,26 @@ perf/test_perf.py::test_perf[t5-bench-float16-input_output_len:128,20-gpus:2] SK perf/test_perf.py::test_perf[t5-bench-float16-maxbs:1-input_output_len:128,20-gpus:2] SKIP perf/test_perf.py::test_perf[t5_base-plugin-float16-bs:8-input_output_len:60,20] SKIP # (https://nvidia.slack.com/archives/C059LSY62BT/p1704525727177449) perf/test_perf.py::test_perf[whisper_large_v3-bench-float16-input_output_len:128,20] SKIP -perf/test_perf_sanity.py::test_e2e[aggr_upload-dynamo_k25_thinking_fp4_blackwell-k25_thinking_fp4_tep8_adp_2k1k] SKIP (https://nvbugs/6227472) -perf/test_perf_sanity.py::test_e2e[aggr_upload-k25_thinking_fp4_2_nodes_grace_blackwell-k25_thinking_fp4_dep8_32k8k] SKIP (https://nvbugs/6236108) -perf/test_perf_sanity.py::test_e2e[aggr_upload-k25_thinking_fp4_blackwell-k25_thinking_fp4_dep8_32k8k] SKIP (https://nvbugs/6236094) -perf/test_perf_sanity.py::test_e2e[aggr_upload-k25_thinking_fp4_blackwell-k25_thinking_fp4_dep8_8k1k] SKIP (https://nvbugs/6227472) -perf/test_perf_sanity.py::test_e2e[aggr_upload-k25_thinking_fp4_blackwell-k25_thinking_fp4_tep8_32k8k] SKIP (https://nvbugs/6227472) perf/test_perf_sanity.py::test_e2e[aggr_upload-super_ad_blackwell-super_ad_ws1_1k1k] SKIP (https://nvbugs/6153575) perf/test_perf_sanity.py::test_e2e[disagg_upload-e2e-gb200_deepseek-r1-fp4_128k8k_con128_ctx1_pp8_gen1_dep16_eplb0_mtp1_ccb-NIXL] SKIP (https://nvbugs/6215844) perf/test_perf_sanity.py::test_e2e[disagg_upload-e2e-gb200_kimi-k25-thinking-fp4_8k1k_con4096_ctx1_dep4_gen1_dep16_eplb0_mtp0_ccb-NIXL] SKIP (https://nvbugs/6179661) -perf/test_perf_sanity.py::test_e2e[disagg_upload-gen_only-b200_deepseek-r1-fp4_8k1k_con1536_ctx1_dep4_gen1_dep8_eplb0_mtp1_ccb-NIXL] SKIP (https://nvbugs/6016528) +perf/test_perf_sanity.py::test_e2e[disagg_upload-e2e-gb300_deepseek-r1-fp4_128k8k_con256_ctx1_pp4_gen1_dep8_eplb0_mtp1_ccb-NIXL] SKIP (https://nvbugs/6280649) +perf/test_perf_sanity.py::test_e2e[disagg_upload-e2e-gb300_kimi-k25-thinking-fp4_8k1k_con4096_ctx1_dep4_gen1_dep16_eplb0_mtp0_ccb-NIXL] SKIP (https://nvbugs/6280649) perf/test_perf_sanity.py::test_e2e[disagg_upload-gen_only-gb200_deepseek-r1-fp4_128k8k_con128_ctx1_pp8_gen1_dep16_eplb0_mtp1_ccb-NIXL] SKIP (https://nvbugs/6221024) -perf/test_perf_sanity.py::test_e2e[disagg_upload-gen_only-gb200_deepseek-v32-fp4_32k4k_con256_ctx1_dep8_gen1_dep8_eplb0_mtp0_ccb-NIXL] SKIP (https://nvbugs/6085022) -perf/test_perf_sanity.py::test_e2e[disagg_upload-gen_only-gb200_deepseek-v32-fp4_8k1k_con1024_ctx1_dep4_gen1_dep32_eplb256_mtp3_ccb-NIXL] SKIP (https://nvbugs/6200257) +perf/test_perf_sanity.py::test_e2e[disagg_upload-gen_only-gb200_gpt-oss-120b-fp4_1k1k_con64_ctx1_tp1_gen1_tp4_eplb0_mtp0_ccb-NIXL] SKIP (https://nvbugs/6287834) perf/test_perf_sanity.py::test_e2e[disagg_upload-gen_only-gb200_kimi-k25-thinking-fp4_8k1k_con4096_ctx1_dep4_gen1_dep16_eplb0_mtp0_ccb-NIXL] SKIP (https://nvbugs/6221022) stress_test/stress_test.py::test_run_stress_test[llama-v3-8b-instruct-hf_tp1-stress_time_300s_timeout_450s-GUARANTEED_NO_EVICT-pytorch-stress-test] SKIP (https://nvbugs/6215678) stress_test/stress_test.py::test_run_stress_test[llama-v3-8b-instruct-hf_tp1-stress_time_300s_timeout_450s-MAX_UTILIZATION-pytorch-stress-test] SKIP (https://nvbugs/6215678) test_doc.py::test_url_validity SKIP (https://nvbugs/6215684) test_e2e.py::test_draft_token_tree_quickstart_advanced_eagle3[Llama-3.1-8b-Instruct-llama-3.1-model/Llama-3.1-8B-Instruct-EAGLE3-LLaMA3.1-Instruct-8B] SKIP (https://nvbugs/5989907) test_e2e.py::test_draft_token_tree_quickstart_advanced_eagle3_depth_1_tree[Llama-3.1-8b-Instruct-llama-3.1-model/Llama-3.1-8B-Instruct-EAGLE3-LLaMA3.1-Instruct-8B] SKIP (https://nvbugs/5989907) +test_e2e.py::test_multi_nodes_eval[DeepSeek-R1/DeepSeek-R1-0528-FP4-tp16-mmlu] SKIP (https://nvbugs/6276983) +test_e2e.py::test_multi_nodes_eval[Kimi-K2-Thinking-NVFP4-tp16-mmlu] SKIP (https://nvbugs/6276983) test_e2e.py::test_multi_nodes_eval[Qwen3/Qwen3-235B-A22B-tp16-mmlu] SKIP (https://nvbugs/6115560) test_e2e.py::test_multi_nodes_eval[Qwen3/saved_models_Qwen3-235B-A22B_nvfp4_hf-tp16-mmlu] SKIP (https://nvbugs/6114608) test_e2e.py::test_openai_chat_example[trt] SKIP (https://nvbugs/5477444) test_e2e.py::test_openai_completions_example[trt] SKIP (https://nvbugs/5701450) test_e2e.py::test_openai_disagg_multi_nodes_completion[ctx_tp1pp2-gen_tp1pp2] SKIP (https://nvbugs/6190759) -test_e2e.py::test_openai_kv_cache_contamination SKIP (https://nvbugs/6227203) test_e2e.py::test_ptp_quickstart_advanced_deepseek_r1_w4afp8_8gpus[DeepSeek-R1-W4AFP8-DeepSeek-R1/DeepSeek-R1-W4AFP8] SKIP (https://nvbugs/5836830) test_e2e.py::test_trtllm_bench_iteration_log[TRT-streaming-meta-llama/Llama-3.1-8B-llama-3.1-model/Meta-Llama-3.1-8B] SKIP (https://nvbugs/5448523) test_e2e.py::test_trtllm_multimodal_benchmark_serving SKIP (https://nvbugs/5864769) @@ -335,22 +380,18 @@ unittest/_torch/multi_gpu/test_user_buffers.py::test_user_buffers_pass[2-fp16-_t unittest/_torch/multi_gpu/test_user_buffers.py::test_user_buffers_pass[2-fp16-_tokens16-_hidden512] SKIP (https://nvbugs/6266259) unittest/_torch/multi_gpu/test_user_buffers.py::test_user_buffers_pass[2-fp16-_tokens256-_hidden32] SKIP (https://nvbugs/6266259) unittest/_torch/multi_gpu/test_user_buffers.py::test_user_buffers_pass[2-fp16-_tokens256-_hidden512] SKIP (https://nvbugs/6266259) +unittest/_torch/multimodal/test_mm_encoder_standalone.py::test_single_request_chat_multiple_images[pd_disagg-qwen3_30b_a3b_fp8] SKIP (https://nvbugs/6272573) unittest/_torch/thop/serial/test_moe.py::TestMoeFp4::test_no_autotune[use_score_as_input-RoutingDSv3-swiglu-1024-1024-1] SKIP (https://nvbugs/5908070) unittest/_torch/thop/serial/test_moe.py::TestMoeFp4::test_no_autotune[use_score_as_input-RoutingRenormalize_qwen_next-swiglu-1024-1024-150] SKIP (https://nvbugs/5908070) unittest/_torch/thop/serial/test_moe.py::TestMoeFp4::test_no_autotune[use_score_as_input-RoutingRenormalize_topk_4-swiglu-1024-1024-150] SKIP (https://nvbugs/5908070) unittest/_torch/visual_gen/test_flux_pipeline.py::TestFluxCombinedOptimizations::test_all_optimizations_combined SKIP (https://nvbugs/6199854) -unittest/auto_deploy/singlegpu/models/test_qwen3_5_moe.py::test_vision_attention_matches_reference SKIP (https://nvbugs/6189450) -unittest/auto_deploy/singlegpu/models/test_qwen3_5_moe.py::test_vision_block_matches_reference SKIP (https://nvbugs/6189450) -unittest/auto_deploy/singlegpu/models/test_qwen3_5_moe.py::test_vlm_wrapper_delta_is_request_scoped_no_cross_call_leakage SKIP (https://nvbugs/6189450) -unittest/auto_deploy/standalone/test_standalone_package.py::TestStandalonePackage::test_run_unit_tests SKIP (https://nvbugs/6160629) unittest/bindings/test_transfer_agent_bindings.py::TestNixlFunctionalTransfer::test_nixl_wait_in_progress_on_zero_timeout SKIP (https://nvbugs/6260897) unittest/executor/test_rpc.py::TestRpcCorrectness::test_incremental_task_async SKIP (https://nvbugs/5741476) unittest/executor/test_rpc_proxy.py SKIP (https://nvbugs/5605741) unittest/executor/test_rpc_worker.py SKIP (https://nvbugs/5605741) unittest/llmapi/test_llm_multi_gpu.py -m "gpu4 and part0" SKIP (https://nvbugs/5348958) unittest/llmapi/test_llm_multi_gpu_pytorch.py::test_phi3_lora_fused_modules_output_on_tp2_identical_to_tp1 SKIP (https://nvbugs/6109745) -unittest/llmapi/test_llm_pytorch.py::test_nemotron_nas_lora[None] SKIP (https://nvbugs/6248776) -unittest/llmapi/test_llm_pytorch.py::test_nemotron_nas_lora[cuda_graph_config0] SKIP (https://nvbugs/6248776) unittest/llmapi/test_memory_profiling.py::test_profile_kvcache SKIP (https://nvbugs/5580781) unittest/tools/test_layer_wise_benchmarks.py::test_performance_alignment[1] SKIP (https://nvbugs/6127669) unittest/tools/test_layer_wise_benchmarks.py::test_qwen3_next_gen_tep[1] SKIP (https://nvbugs/6153575) +verl/test_verl_cases.py::test_trtllm_abort SKIP (https://nvbugs/6272653) diff --git a/tests/scripts/perf-sanity/aggregated/dynamo_k25_thinking_fp4_blackwell.yaml b/tests/scripts/perf-sanity/aggregated/dynamo_k25_thinking_fp4_blackwell.yaml index 24216305a8cb..18b7b6d175e8 100644 --- a/tests/scripts/perf-sanity/aggregated/dynamo_k25_thinking_fp4_blackwell.yaml +++ b/tests/scripts/perf-sanity/aggregated/dynamo_k25_thinking_fp4_blackwell.yaml @@ -29,9 +29,9 @@ server_configs: backend: UCX max_tokens_in_buffer: 8448 client_configs: - - name: "con128_iter10_2k1k" + - name: "con128_iter5_2k1k" concurrency: 128 - iterations: 10 + iterations: 5 isl: 2048 osl: 1024 backend: "openai" diff --git a/tests/scripts/perf-sanity/aggregated/k25_thinking_fp4_2_nodes_grace_blackwell.yaml b/tests/scripts/perf-sanity/aggregated/k25_thinking_fp4_2_nodes_grace_blackwell.yaml index 864cc8792ab5..eac9a0733633 100644 --- a/tests/scripts/perf-sanity/aggregated/k25_thinking_fp4_2_nodes_grace_blackwell.yaml +++ b/tests/scripts/perf-sanity/aggregated/k25_thinking_fp4_2_nodes_grace_blackwell.yaml @@ -27,9 +27,9 @@ server_configs: enable_block_reuse: false free_gpu_memory_fraction: 0.6 client_configs: - - name: "con2_iter10_32k8k" + - name: "con2_iter5_32k8k" concurrency: 2 - iterations: 10 + iterations: 5 isl: 32768 osl: 8192 backend: "openai" @@ -63,9 +63,9 @@ server_configs: enable_block_reuse: false free_gpu_memory_fraction: 0.6 client_configs: - - name: "con128_iter10_32k8k" + - name: "con128_iter5_32k8k" concurrency: 128 - iterations: 10 + iterations: 5 isl: 32768 osl: 8192 backend: "openai" diff --git a/tests/scripts/perf-sanity/aggregated/k25_thinking_fp4_blackwell.yaml b/tests/scripts/perf-sanity/aggregated/k25_thinking_fp4_blackwell.yaml index fe1f29489771..3c4644180785 100644 --- a/tests/scripts/perf-sanity/aggregated/k25_thinking_fp4_blackwell.yaml +++ b/tests/scripts/perf-sanity/aggregated/k25_thinking_fp4_blackwell.yaml @@ -26,9 +26,9 @@ server_configs: enable_block_reuse: false free_gpu_memory_fraction: 0.6 client_configs: - - name: "con2_iter10_8k1k" + - name: "con2_iter5_8k1k" concurrency: 2 - iterations: 10 + iterations: 5 isl: 8192 osl: 1024 backend: "openai" @@ -61,9 +61,9 @@ server_configs: enable_block_reuse: false free_gpu_memory_fraction: 0.6 client_configs: - - name: "con512_iter10_8k1k" + - name: "con512_iter5_8k1k" concurrency: 512 - iterations: 10 + iterations: 5 isl: 8192 osl: 1024 backend: "openai" @@ -92,9 +92,9 @@ server_configs: enable_block_reuse: false free_gpu_memory_fraction: 0.6 client_configs: - - name: "con2_iter10_32k8k" + - name: "con2_iter5_32k8k" concurrency: 2 - iterations: 10 + iterations: 5 isl: 32768 osl: 8192 backend: "openai" @@ -128,9 +128,9 @@ server_configs: enable_block_reuse: false free_gpu_memory_fraction: 0.6 client_configs: - - name: "con128_iter10_32k8k" + - name: "con128_iter5_32k8k" concurrency: 128 - iterations: 10 + iterations: 5 isl: 32768 osl: 8192 backend: "openai" diff --git a/tests/scripts/perf-sanity/aggregated/k25_thinking_fp4_grace_blackwell.yaml b/tests/scripts/perf-sanity/aggregated/k25_thinking_fp4_grace_blackwell.yaml index 35335416f193..f11454035223 100644 --- a/tests/scripts/perf-sanity/aggregated/k25_thinking_fp4_grace_blackwell.yaml +++ b/tests/scripts/perf-sanity/aggregated/k25_thinking_fp4_grace_blackwell.yaml @@ -26,9 +26,9 @@ server_configs: enable_block_reuse: false free_gpu_memory_fraction: 0.6 client_configs: - - name: "con2_iter10_8k1k" + - name: "con2_iter5_8k1k" concurrency: 2 - iterations: 10 + iterations: 5 isl: 8192 osl: 1024 backend: "openai" @@ -61,9 +61,9 @@ server_configs: enable_block_reuse: false free_gpu_memory_fraction: 0.6 client_configs: - - name: "con256_iter10_8k1k" + - name: "con256_iter5_8k1k" concurrency: 256 - iterations: 10 + iterations: 5 isl: 8192 osl: 1024 backend: "openai" diff --git a/tests/scripts/perf-sanity/disaggregated/b200_deepseek-r1-fp4_8k1k_con1536_ctx1_dep4_gen1_dep8_eplb0_mtp1_ccb-NIXL.yaml b/tests/scripts/perf-sanity/disaggregated/b200_deepseek-r1-fp4_8k1k_con1536_ctx1_dep4_gen1_dep8_eplb0_mtp1_ccb-NIXL.yaml index 2eb4999a1d50..ea66d6d99aa4 100644 --- a/tests/scripts/perf-sanity/disaggregated/b200_deepseek-r1-fp4_8k1k_con1536_ctx1_dep4_gen1_dep8_eplb0_mtp1_ccb-NIXL.yaml +++ b/tests/scripts/perf-sanity/disaggregated/b200_deepseek-r1-fp4_8k1k_con1536_ctx1_dep4_gen1_dep8_eplb0_mtp1_ccb-NIXL.yaml @@ -63,6 +63,7 @@ worker_config: cache_transceiver_config: max_tokens_in_buffer: 16384 backend: NIXL + kv_transfer_timeout_ms: 600000 disable_overlap_scheduler: true speculative_config: &id001 decoding_type: MTP @@ -90,5 +91,6 @@ worker_config: cache_transceiver_config: max_tokens_in_buffer: 16384 backend: NIXL + kv_transfer_timeout_ms: 600000 disable_overlap_scheduler: true speculative_config: *id001 diff --git a/tests/unittest/_torch/executor/test_benchmark_disagg.py b/tests/unittest/_torch/executor/test_benchmark_disagg.py index 41cbe241defb..94c1654f20de 100644 --- a/tests/unittest/_torch/executor/test_benchmark_disagg.py +++ b/tests/unittest/_torch/executor/test_benchmark_disagg.py @@ -1042,7 +1042,7 @@ def _make_executor(self): ex.num_fetch_requests = 0 ex.max_num_active_requests = self.MAX_BATCH_SIZE ex.dist = Mock(rank=0, tp_size=self.TP_SIZE) - ex.dist.allreduce.return_value = 0 + ex.dist.tp_allreduce.return_value = 0 ex.is_shutdown = False ex._is_warmup = False ex.enable_iter_perf_stats = False diff --git a/tests/unittest/_torch/executor/test_kv_pool_rebalance.py b/tests/unittest/_torch/executor/test_kv_pool_rebalance.py new file mode 100644 index 000000000000..59f4f3eb39ea --- /dev/null +++ b/tests/unittest/_torch/executor/test_kv_pool_rebalance.py @@ -0,0 +1,249 @@ +# Copyright (c) 2026, NVIDIA CORPORATION. All rights reserved. +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. +"""Functional unit tests for the KVCacheManagerV2 rebalance hook in +PyExecutor (``_can_pause_for_rebalance``, ``_maybe_rebalance_kv_pools``, +``_consume_previous_batch_for_rebalance``). + +These tests intentionally do not spin up a real PyExecutor: PyExecutor's +constructor pulls in the model engine, sampler, scheduler, KV cache +manager, distributed, etc. Instead we follow the same pattern as +``test_py_executor.py`` and call the methods under test as unbound +attribute lookups on a ``MagicMock(spec=PyExecutor)`` with just the +fields each method reads. + +The accuracy of pool rebalancing itself (i.e., that suspend/adjust/resume +preserves generated tokens) is covered by the integration accuracy test; +here we only verify the call chain and gate logic. +""" + +from unittest.mock import MagicMock + +import pytest + +from tensorrt_llm._torch.pyexecutor.py_executor import PyExecutor +from tensorrt_llm.runtime.kv_cache_manager_v2._exceptions import OutOfPagesError + +# --------------------------------------------------------------------------- # +# Helpers +# --------------------------------------------------------------------------- # + + +def _make_executor( + *, + enable_kv_pool_rebalance: bool = True, + pp_size: int = 1, + kv_cache_transceiver=None, + is_warmup: bool = False, + is_shutdown: bool = False, + max_beam_width: int = 1, + drafter=None, + need_adjustment: bool = True, + active_requests=None, + previous_batch=None, +) -> MagicMock: + """Construct a MagicMock shaped like PyExecutor with exactly the + attributes the rebalance code path reads. + """ + exe = MagicMock(spec=PyExecutor) + + # Gate inputs. + exe.enable_kv_pool_rebalance = enable_kv_pool_rebalance + exe.dist = MagicMock(pp_size=pp_size) + exe.kv_cache_transceiver = kv_cache_transceiver + exe.is_warmup = is_warmup + exe.is_shutdown = is_shutdown + exe.drafter = drafter + + # KV cache manager (resource-manager wrapper). + exe.kv_cache_manager = MagicMock() + exe.kv_cache_manager.max_beam_width = max_beam_width + exe.kv_cache_manager.impl = MagicMock() + exe.kv_cache_manager.impl.need_adjustment = need_adjustment + + # is_request_active returns True for every id we tracked, False for + # everything else. Tests set active_requests to a list of mocks with + # py_request_id attributes. + exe.active_requests = active_requests or [] + active_ids = {r.py_request_id for r in exe.active_requests} + exe.kv_cache_manager.is_request_active.side_effect = lambda rid: rid in active_ids + + # Previous batch (overlap loop). + exe.previous_batch = previous_batch + + return exe + + +def _make_request(req_id: int) -> MagicMock: + req = MagicMock() + req.py_request_id = req_id + return req + + +# --------------------------------------------------------------------------- # +# Gate tests +# --------------------------------------------------------------------------- # + + +class TestCanPauseForRebalance: + """Cover every short-circuit branch of ``_can_pause_for_rebalance``.""" + + def test_default_setup_returns_true(self): + exe = _make_executor() + assert PyExecutor._can_pause_for_rebalance(exe) is True + + def test_flag_off_returns_false(self): + exe = _make_executor(enable_kv_pool_rebalance=False) + assert PyExecutor._can_pause_for_rebalance(exe) is False + + def test_pp_size_gt_one_returns_false(self): + exe = _make_executor(pp_size=2) + assert PyExecutor._can_pause_for_rebalance(exe) is False + + def test_transceiver_present_returns_false(self): + exe = _make_executor(kv_cache_transceiver=MagicMock()) + assert PyExecutor._can_pause_for_rebalance(exe) is False + + def test_warmup_returns_false(self): + exe = _make_executor(is_warmup=True) + assert PyExecutor._can_pause_for_rebalance(exe) is False + + def test_shutdown_returns_false(self): + exe = _make_executor(is_shutdown=True) + assert PyExecutor._can_pause_for_rebalance(exe) is False + + def test_beam_width_gt_one_returns_false(self): + exe = _make_executor(max_beam_width=2) + assert PyExecutor._can_pause_for_rebalance(exe) is False + + def test_drafter_present_returns_false(self): + exe = _make_executor(drafter=MagicMock()) + assert PyExecutor._can_pause_for_rebalance(exe) is False + + +# --------------------------------------------------------------------------- # +# _maybe_rebalance_kv_pools +# --------------------------------------------------------------------------- # + + +class TestMaybeRebalanceKvPools: + """The hook body: synchronize -> drain -> suspend -> adjust -> resume.""" + + def test_no_op_when_need_adjustment_false(self, monkeypatch): + exe = _make_executor(need_adjustment=False, active_requests=[_make_request(1)]) + monkeypatch.setattr("torch.cuda.current_stream", MagicMock()) + + PyExecutor._maybe_rebalance_kv_pools(exe) + + exe.kv_cache_manager.impl.adjust.assert_not_called() + exe.kv_cache_manager.suspend_request.assert_not_called() + exe.kv_cache_manager.resume_request.assert_not_called() + + def test_fires_full_cycle(self, monkeypatch): + reqs = [_make_request(1), _make_request(2)] + exe = _make_executor(active_requests=reqs) + # Stub the consume helper (its own behavior is covered below). + exe._consume_previous_batch_for_rebalance = MagicMock() + monkeypatch.setattr("torch.cuda.current_stream", MagicMock()) + + PyExecutor._maybe_rebalance_kv_pools(exe) + + exe._consume_previous_batch_for_rebalance.assert_called_once() + exe.kv_cache_manager.impl.adjust.assert_called_once() + assert exe.kv_cache_manager.suspend_request.call_count == 2 + assert exe.kv_cache_manager.resume_request.call_count == 2 + + def test_skips_already_suspended_requests(self, monkeypatch): + active = _make_request(1) + suspended = _make_request(2) + exe = _make_executor(active_requests=[active]) + exe.active_requests = [active, suspended] + # Override side_effect: only req 1 is active on GPU. + exe.kv_cache_manager.is_request_active.side_effect = lambda rid: rid == 1 + exe._consume_previous_batch_for_rebalance = MagicMock() + monkeypatch.setattr("torch.cuda.current_stream", MagicMock()) + + PyExecutor._maybe_rebalance_kv_pools(exe) + + # Only the active request was suspended and resumed. + exe.kv_cache_manager.suspend_request.assert_called_once_with(active) + exe.kv_cache_manager.resume_request.assert_called_once_with(active) + + def test_expected_adjust_failure_does_not_skip_resume(self, monkeypatch, caplog): + """OutOfPagesError from adjust() is the one expected runtime failure. + + It must be swallowed so paused requests are still resumed. + """ + reqs = [_make_request(1)] + exe = _make_executor(active_requests=reqs) + exe._consume_previous_batch_for_rebalance = MagicMock() + exe.kv_cache_manager.impl.adjust.side_effect = OutOfPagesError("boom") + monkeypatch.setattr("torch.cuda.current_stream", MagicMock()) + + # Should not raise. + PyExecutor._maybe_rebalance_kv_pools(exe) + + exe.kv_cache_manager.suspend_request.assert_called_once() + exe.kv_cache_manager.resume_request.assert_called_once() + + def test_unexpected_adjust_failure_propagates(self, monkeypatch): + """Any non-OutOfPagesError (programmer bug) must propagate. + + Such errors fail fast rather than being downgraded to a warning. + """ + reqs = [_make_request(1)] + exe = _make_executor(active_requests=reqs) + exe._consume_previous_batch_for_rebalance = MagicMock() + exe.kv_cache_manager.impl.adjust.side_effect = RuntimeError("boom") + monkeypatch.setattr("torch.cuda.current_stream", MagicMock()) + + with pytest.raises(RuntimeError, match="boom"): + PyExecutor._maybe_rebalance_kv_pools(exe) + + +# --------------------------------------------------------------------------- # +# _consume_previous_batch_for_rebalance +# --------------------------------------------------------------------------- # + + +class TestConsumePreviousBatch: + """Overlap-mode drain helper.""" + + def test_no_op_when_previous_batch_none(self): + exe = _make_executor(previous_batch=None) + PyExecutor._consume_previous_batch_for_rebalance(exe) + exe._update_requests.assert_not_called() + exe._send_kv_async.assert_not_called() + exe._flush_pending_transfer_responses.assert_not_called() + exe._process_previous_batch.assert_not_called() + + def test_consumes_and_clears(self): + prev = MagicMock() + prev.sample_state = MagicMock() + prev.scheduled_requests.all_requests.return_value = [_make_request(1)] + exe = _make_executor(previous_batch=prev) + # perf_manager needs compute_batch_gpu_times. + exe.perf_manager = MagicMock() + + PyExecutor._consume_previous_batch_for_rebalance(exe) + + exe._update_requests.assert_called_once_with(prev.sample_state) + exe._send_kv_async.assert_called_once() + exe._flush_pending_transfer_responses.assert_called_once() + exe._process_previous_batch.assert_called_once() + exe.perf_manager.compute_batch_gpu_times.assert_called_once() + assert exe.previous_batch is None + + +if __name__ == "__main__": + pytest.main([__file__, "-v"]) diff --git a/tests/unittest/_torch/executor/test_mamba_cache_manager.py b/tests/unittest/_torch/executor/test_mamba_cache_manager.py index 85bbc5e0d68b..030f5d77f721 100644 --- a/tests/unittest/_torch/executor/test_mamba_cache_manager.py +++ b/tests/unittest/_torch/executor/test_mamba_cache_manager.py @@ -290,7 +290,13 @@ def test_cpp_get_state_indices_resolves_sentinel_to_reserved_slot(): # --------------------------------------------------------------------------- -def _build_hybrid_with_mamba_layer(spec_config=None, max_batch_size=4, enable_block_reuse=False): +def _build_hybrid_with_mamba_layer( + spec_config=None, + max_batch_size=4, + enable_block_reuse=False, + mamba_state_cache_interval=256, + is_estimating_kv_cache=False, +): """Construct a real CppMambaHybridCacheManager with one mamba layer + one full-attention layer so the parent KVCacheManager goes through the linear-attention pool sizing path.""" @@ -299,7 +305,11 @@ def _build_hybrid_with_mamba_layer(spec_config=None, max_batch_size=4, enable_bl attn_mask = [False, True] mapping = Mapping(world_size=1, rank=0, tp_size=1, pp_size=1) # Cap max_tokens to keep the real C++ pool allocation tiny. - kv_cache_config = KvCacheConfig(max_tokens=512, enable_block_reuse=enable_block_reuse) + kv_cache_config = KvCacheConfig( + max_tokens=512, + enable_block_reuse=enable_block_reuse, + mamba_state_cache_interval=mamba_state_cache_interval, + ) return CppMambaHybridCacheManager( mamba_d_state=8, mamba_d_conv=4, @@ -321,6 +331,7 @@ def _build_hybrid_with_mamba_layer(spec_config=None, max_batch_size=4, enable_bl mapping=mapping, spec_config=spec_config, layer_mask=attn_mask, + is_estimating_kv_cache=is_estimating_kv_cache, ) @@ -449,7 +460,10 @@ def test_cpp_hybrid_recurrent_pool_floor_with_block_reuse(): """ max_batch_size = 4 mgr = _build_hybrid_with_mamba_layer( - spec_config=None, max_batch_size=max_batch_size, enable_block_reuse=True + spec_config=None, + max_batch_size=max_batch_size, + enable_block_reuse=True, + mamba_state_cache_interval=256, ) recurrent_primary, _ = mgr.blocks_per_window[LinearCacheType.RECURRENT_STATES.value] assert recurrent_primary >= max_batch_size + 1, ( @@ -459,6 +473,32 @@ def test_cpp_hybrid_recurrent_pool_floor_with_block_reuse(): ) +@skip_no_cuda +def test_cpp_hybrid_dry_run_recurrent_pool_additive_with_block_reuse(): + """Dry-run path (is_estimating_kv_cache=True) under block reuse must + keep the live-state floor *plus* room for snapshots, not collapse to + max(snapshots, live). With max_batch_size=4, interval=256, max_tokens=512: + old: max_snapshots = max(512//256, 4) = 4 (no headroom for snapshots) + new: max_snapshots = 4 + 512//256 = 6 (live + snapshots) + """ + max_batch_size = 4 + mgr = _build_hybrid_with_mamba_layer( + spec_config=None, + max_batch_size=max_batch_size, + enable_block_reuse=True, + mamba_state_cache_interval=256, + is_estimating_kv_cache=True, + ) + recurrent_primary, _ = mgr.blocks_per_window[LinearCacheType.RECURRENT_STATES.value] + # 4 live state slots + 2 reuse snapshots = 6. + expected_min = max_batch_size + (512 // 256) + assert recurrent_primary >= expected_min, ( + f"dry-run recurrent-state pool has {recurrent_primary} slots, " + f"need >= live_state + reuse_snapshots = {expected_min}; the old " + f"max(reuse, live) formula dropped reuse headroom" + ) + + # --------------------------------------------------------------------------- # CppMambaHybridCacheManager: rank with zero local mamba layers # diff --git a/tests/unittest/_torch/lora/test_moe_lora_device_path.py b/tests/unittest/_torch/lora/test_moe_lora_device_path.py new file mode 100644 index 000000000000..de0d72f5177d --- /dev/null +++ b/tests/unittest/_torch/lora/test_moe_lora_device_path.py @@ -0,0 +1,184 @@ +# SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. +# SPDX-License-Identifier: Apache-2.0 +"""Tests for the *device path* of routed-expert MoE LoRA in +`torch.ops.trtllm.fused_moe`. + +The device path (opted into for the per-request schema via +`TLLM_MOE_LORA_USE_DEVICE_PATH=1`) performs the per-token pointer expansion, +problem building, and grouped GEMMs entirely on the CUDA stream via the new +on-device kernels, instead of the legacy host-pointer LoRA path. This test +checks device-path eager correctness vs. both the legacy host path and an fp32 +PyTorch reference, exercising the pointer-expand / problem-builder / +grouped-GEMM kernels. + +It requires a CUDA GPU and the built `trtllm::fused_moe` op. +""" + +import pytest +import torch + +from tensorrt_llm._torch.peft.lora.moe_layout import make_per_expert_lora, reference_swiglu_moe_lora + +_TRTLLM_AVAILABLE = hasattr(torch.ops, "trtllm") and hasattr(torch.ops.trtllm, "fused_moe") + +requires_cuda_and_op = pytest.mark.skipif( + not torch.cuda.is_available() or not _TRTLLM_AVAILABLE, + reason="Requires CUDA and built TensorRT-LLM C++ extension (torch.ops.trtllm.fused_moe).", +) + + +@pytest.fixture(autouse=True) +def _isolate_moe_runner_cache(): + """Give every test a fresh cached FusedMoeRunner and release device scratch + afterward. + + The device path is selected per-runner at construction from + TLLM_MOE_LORA_USE_DEVICE_PATH, and the runner is cached at module level by + MoERunner. Clearing the cache before each test forces a fresh runner that + re-reads the env var; clearing + empty_cache afterward releases the + per-runner device scratch so it cannot alias later allocations. + """ + from tensorrt_llm._torch.custom_ops.torch_custom_ops import MoERunner + + MoERunner.runner_dict.clear() + yield + MoERunner.runner_dict.clear() + if torch.cuda.is_available(): + torch.cuda.synchronize() + torch.cuda.empty_cache() + + +# Adapters drawn from N(0, 1) blow up the SwiGLU intermediate at these shapes; +# scale them down so the legitimate output stays O(1)-O(10) and the bf16 noise +# stays well under the tolerance (see the rationale in test_moe_lora_op.py). +_LORA_SCALE = 0.25 +_RTOL = 5e-2 +_ATOL = 1.0 + + +def _build_base_inputs( + num_tokens, hidden_size, inter_size, num_experts, top_k, dtype, device, seed=0 +): + torch.manual_seed(seed) + x = torch.randn(num_tokens, hidden_size, dtype=dtype, device=device) + w3_w1 = torch.randn(num_experts, 2 * inter_size, hidden_size, dtype=dtype, device=device) * 0.02 + w2 = torch.randn(num_experts, hidden_size, inter_size, dtype=dtype, device=device) * 0.02 + logits = torch.randn(num_tokens, num_experts, dtype=torch.float32, device=device) + topk_scores, topk_ids = torch.topk(logits, k=top_k, dim=-1) + topk_scores = torch.softmax(topk_scores, dim=-1) + return x, w3_w1, w2, topk_ids.to(torch.int32), topk_scores.to(torch.float32) + + +def _make_adapter_set(num_experts, rank, hidden_size, inter_size, dtype, device, base_seed): + """Three scaled per-expert adapters (fc1/gate-side, gated/up-side, fc2).""" + + def _scaled(*args, seed): + a = make_per_expert_lora(*args, dtype=dtype, device=device, seed=seed) + a["A"].mul_(_LORA_SCALE) + a["B"].mul_(_LORA_SCALE) + return a + + fc1 = _scaled(num_experts, rank, hidden_size, inter_size, seed=base_seed + 0) + gated = _scaled(num_experts, rank, hidden_size, inter_size, seed=base_seed + 1) + fc2 = _scaled(num_experts, rank, inter_size, hidden_size, seed=base_seed + 2) + return {"fc1": fc1, "gated": gated, "fc2": fc2} + + +def _per_request_kwargs(num_tokens, adapters, rank): + """Single-request per-request schema covering all tokens with one adapter.""" + fc1, gated, fc2 = adapters["fc1"], adapters["gated"], adapters["fc2"] + return dict( + fc1_lora_ranks=torch.tensor([rank], dtype=torch.int32, device="cpu"), + fc1_lora_weight_ptrs=torch.tensor( + [[fc1["A"].data_ptr(), fc1["B"].data_ptr(), 0]], dtype=torch.int64, device="cpu" + ), + fc2_lora_ranks=torch.tensor([rank], dtype=torch.int32, device="cpu"), + fc2_lora_weight_ptrs=torch.tensor( + [[fc2["A"].data_ptr(), fc2["B"].data_ptr(), 0]], dtype=torch.int64, device="cpu" + ), + gated_lora_ranks=torch.tensor([rank], dtype=torch.int32, device="cpu"), + gated_lora_weight_ptrs=torch.tensor( + [[gated["A"].data_ptr(), gated["B"].data_ptr(), 0]], dtype=torch.int64, device="cpu" + ), + host_request_types=torch.zeros(1, dtype=torch.int32, device="cpu"), + host_context_lengths=torch.tensor([num_tokens], dtype=torch.int32, device="cpu"), + lora_max_low_rank=rank, + ) + + +def _call_fused_moe(x, w3_w1, w2, topk_ids, topk_scores, output_dtype, lora_kwargs): + common = dict( + input=x, + token_selected_experts=topk_ids, + token_final_scales=topk_scores, + fc1_expert_weights=w3_w1, + fc1_expert_biases=None, + fc2_expert_weights=w2, + fc2_expert_biases=None, + output_dtype=output_dtype, + quant_scales=[], + ) + common.update(lora_kwargs) + return torch.ops.trtllm.fused_moe(**common)[0] + + +def _reference(x, w3_w1, w2, topk_ids, topk_scores, adapters): + return reference_swiglu_moe_lora( + x, + w3_w1, + w2, + topk_ids, + topk_scores, + fc1_a=adapters["fc1"]["A"], + fc1_b=adapters["fc1"]["B"], + gated_a=adapters["gated"]["A"], + gated_b=adapters["gated"]["B"], + fc2_a=adapters["fc2"]["A"], + fc2_b=adapters["fc2"]["B"], + ) + + +@requires_cuda_and_op +def test_device_path_eager_matches_host_and_reference(monkeypatch): + """Per-request schema on the device path (env-var opt-in) must match both + the legacy host path and the fp32 PyTorch reference. Exercises the on-device + pointer-expand / problem-builder / grouped-GEMM kernels in eager mode. + """ + from tensorrt_llm._torch.custom_ops.torch_custom_ops import MoERunner + + device = torch.device("cuda") + dtype = torch.bfloat16 + num_tokens, hidden_size, inter_size = 16, 128, 256 + num_experts, top_k, rank = 4, 2, 8 + + x, w3_w1, w2, topk_ids, topk_scores = _build_base_inputs( + num_tokens, hidden_size, inter_size, num_experts, top_k, dtype, device + ) + adapters = _make_adapter_set( + num_experts, rank, hidden_size, inter_size, dtype, device, base_seed=300 + ) + lora_kwargs = _per_request_kwargs(num_tokens, adapters, rank) + + # Host path (device path env explicitly disabled), fresh runner. + monkeypatch.setenv("TLLM_MOE_LORA_USE_DEVICE_PATH", "0") + MoERunner.runner_dict.clear() + try: + out_host = _call_fused_moe(x, w3_w1, w2, topk_ids, topk_scores, dtype, dict(lora_kwargs)) + finally: + MoERunner.runner_dict.clear() + + # Device path (env opt-in), fresh runner. + monkeypatch.setenv("TLLM_MOE_LORA_USE_DEVICE_PATH", "1") + MoERunner.runner_dict.clear() + try: + out_device = _call_fused_moe(x, w3_w1, w2, topk_ids, topk_scores, dtype, dict(lora_kwargs)) + finally: + MoERunner.runner_dict.clear() + + out_ref = _reference(x, w3_w1, w2, topk_ids, topk_scores, adapters) + + assert torch.isfinite(out_device).all() + torch.testing.assert_close(out_device, out_ref, rtol=_RTOL, atol=_ATOL) + # Host vs device path are different reduction orders but should agree + # within the same bf16 tolerance. + torch.testing.assert_close(out_device, out_host, rtol=_RTOL, atol=_ATOL) diff --git a/tests/unittest/_torch/lora/test_moe_lora_op.py b/tests/unittest/_torch/lora/test_moe_lora_op.py index 5a609b5ca4b4..4a270145a3d2 100644 --- a/tests/unittest/_torch/lora/test_moe_lora_op.py +++ b/tests/unittest/_torch/lora/test_moe_lora_op.py @@ -162,6 +162,54 @@ def test_moe_per_expert_lora_changes_output(): assert diff > 1e-3, f"LoRA had no observable effect (mean abs diff={diff})" +@requires_cuda_and_op +def test_moe_lora_rejects_overlong_context_lengths(): + """A per-request expansion whose host_context_lengths sum past the op's token + count must raise cleanly instead of overrunning the fixed-capacity pinned + expansion buffer. + + The per-token (rank, A, B) tables are written into buffers sized for + num_tokens; a context request claiming more tokens than the op actually has + would, without the bounds guard in expandPerRequestLoraTo, scribble past the + end of pinned memory. Here a single context request declares 2 * num_tokens, + so the expansion must fail fast. + """ + device = torch.device("cuda") + dtype = torch.bfloat16 + num_tokens, hidden_size, inter_size = 8, 128, 256 + num_experts, top_k = 4, 2 + rank = 8 + + x, w3_w1, w2, topk_ids, topk_scores = _build_base_inputs( + num_tokens, hidden_size, inter_size, num_experts, top_k, dtype, device + ) + fc1_adapter = make_per_expert_lora( + num_experts, rank, hidden_size, inter_size, dtype=dtype, device=device, seed=10 + ) + fc2_adapter = make_per_expert_lora( + num_experts, rank, inter_size, hidden_size, dtype=dtype, device=device, seed=11 + ) + lora_kwargs = _build_lora_request_buffers( + num_tokens, + fc1_adapter["A"], + fc1_adapter["B"], + fc2_adapter["A"], + fc2_adapter["B"], + rank=rank, + ) + # Single context request (host_request_types == 0) whose declared context + # length exceeds the op's token count, so the expansion overruns by design. + lora_kwargs["host_request_types"] = torch.zeros(1, dtype=torch.int32, device="cpu") + lora_kwargs["host_context_lengths"] = torch.tensor( + [2 * num_tokens], dtype=torch.int32, device="cpu" + ) + + with pytest.raises((RuntimeError, ValueError)): + _call_fused_moe( + x, w3_w1, w2, topk_ids, topk_scores, output_dtype=dtype, lora_kwargs=lora_kwargs + ) + + @requires_cuda_and_op def test_moe_lora_rejected_in_min_latency_mode(): device = torch.device("cuda") diff --git a/tests/unittest/_torch/modeling/test_modeling_afmoe.py b/tests/unittest/_torch/modeling/test_modeling_afmoe.py new file mode 100644 index 000000000000..934fa59b650a --- /dev/null +++ b/tests/unittest/_torch/modeling/test_modeling_afmoe.py @@ -0,0 +1,731 @@ +# SPDX-FileCopyrightText: Copyright (c) 2022-2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. +# SPDX-License-Identifier: Apache-2.0 +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. + +import json +import tempfile +import unittest +from copy import deepcopy +from unittest.mock import Mock, patch + +import torch + +import tensorrt_llm +from tensorrt_llm import LLM, SamplingParams +from tensorrt_llm._torch.attention_backend.utils import get_attention_backend +from tensorrt_llm._torch.metadata import KVCacheParams +from tensorrt_llm._torch.model_config import ModelConfig +from tensorrt_llm._torch.models.modeling_afmoe import ( + AfmoeConfig, + AfmoeForCausalLM, + AfmoeMoE, + _validate_routing_config, +) +from tensorrt_llm._torch.models.modeling_utils import ( + MODEL_CLASS_MAPPER_MAPPING, + MODEL_CLASS_MAPPING, +) +from tensorrt_llm._torch.modules.linear import TensorParallelMode +from tensorrt_llm._torch.pyexecutor.resource_manager import KVCacheManager +from tensorrt_llm.bindings.executor import KvCacheConfig +from tensorrt_llm.llmapi import KvCacheConfig as LlmKvCacheConfig +from tensorrt_llm.llmapi import MoeConfig +from tensorrt_llm.mapping import Mapping +from tensorrt_llm.models.modeling_utils import QuantConfig + +# AFMoE is a recent addition to HF transformers; older installed versions may +# not ship it. Guard the reference-model imports (matching the exaone4 test +# pattern) so the whole module still collects when HF afmoe is unavailable and +# only the HF parity test is skipped. +SKIP_AFMOE_HF_ACCURACY_TEST = False +try: + from transformers import AfmoeConfig as HFAfmoeConfig + from transformers.models.afmoe.modeling_afmoe import AfmoeForCausalLM as HFAfmoeForCausalLM +except ImportError: + SKIP_AFMOE_HF_ACCURACY_TEST = True + +WINDOW_SIZE = 4 +NUM_HIDDEN_LAYERS = 4 +NUM_DENSE_LAYERS = 1 + +AFMOE_CONFIG = { + "architectures": ["AfmoeForCausalLM"], + "dtype": "bfloat16", + "hidden_size": 256, + "intermediate_size": 512, + "max_position_embeddings": 2048, + "model_type": "afmoe", + "moe_intermediate_size": 128, + "n_group": 1, + "norm_topk_prob": True, + "num_attention_heads": 8, + "num_dense_layers": NUM_DENSE_LAYERS, + "num_experts": 8, + "num_experts_per_tok": 2, + "num_hidden_layers": NUM_HIDDEN_LAYERS, + "num_key_value_heads": 2, + "num_shared_experts": 1, + "rms_norm_eps": 1e-05, + "rope_theta": 10000, + "route_scale": 1.0, + "scoring_func": "sigmoid", + "sliding_window": WINDOW_SIZE, + "layer_types": [ + "sliding_attention", + "sliding_attention", + "sliding_attention", + "full_attention", + ], + "tie_word_embeddings": False, + "topk_group": 1, + "vocab_size": 1024, + "hidden_act": "silu", + "mup_enabled": False, +} + + +def _force_mpi_topology_mapping(): + # These tests inspect module TP attributes in one pytest process. Force + # the lightweight MPI-topology Mapping even when TLLM_DISABLE_MPI=1 would + # otherwise require an initialized torch.distributed DeviceMesh. + return patch("tensorrt_llm.mapping.mpi_disabled", return_value=False) + + +def _force_mpi_collectives(): + return patch("tensorrt_llm._torch.distributed.ops.mpi_disabled", return_value=False) + + +def _shutdown_kv_cache_manager(kv_cache_manager: KVCacheManager) -> None: + if torch.cuda.is_available(): + torch.cuda.synchronize() + kv_cache_manager.shutdown() + + +class TestAfmoeRegistry(unittest.TestCase): + """Verify AfmoeForCausalLM resolves through _torch auto-model registration.""" + + def test_auto_model_registry(self): + self.assertIn("AfmoeForCausalLM", MODEL_CLASS_MAPPING) + self.assertIs(MODEL_CLASS_MAPPING["AfmoeForCausalLM"], AfmoeForCausalLM) + + def test_weight_mapper_registry(self): + self.assertIn("AfmoeForCausalLM_HF", MODEL_CLASS_MAPPER_MAPPING) + + def test_legacy_model_map_does_not_contain_afmoe(self): + from tensorrt_llm.models import MODEL_MAP + + self.assertNotIn("AfmoeForCausalLM", MODEL_MAP) + + +class TestAfmoeRoutingValidation(unittest.TestCase): + """Verify routing assumption guards.""" + + def test_valid_sigmoid_config(self): + config = AfmoeConfig.from_dict(deepcopy(AFMOE_CONFIG)) + _validate_routing_config(config) + + def test_rejects_softmax_scoring(self): + d = deepcopy(AFMOE_CONFIG) + d["scoring_func"] = "softmax" + config = AfmoeConfig.from_dict(d) + with self.assertRaisesRegex(ValueError, "Only 'sigmoid' is supported"): + _validate_routing_config(config) + + def test_rejects_disabled_norm_topk(self): + d = deepcopy(AFMOE_CONFIG) + d["norm_topk_prob"] = False + config = AfmoeConfig.from_dict(d) + with self.assertRaisesRegex(ValueError, "norm_topk_prob"): + _validate_routing_config(config) + + def test_model_init_rejects_invalid_routing(self): + d = deepcopy(AFMOE_CONFIG) + d["scoring_func"] = "softmax" + config = AfmoeConfig.from_dict(d) + model_config = ModelConfig(pretrained_config=config) + with self.assertRaisesRegex(ValueError, "Only 'sigmoid' is supported"): + AfmoeForCausalLM(model_config) + + +class TestAfmoeWeightMapper(unittest.TestCase): + """Verify AfmoeHfWeightMapper key transformations.""" + + def setUp(self): + from tensorrt_llm._torch.models.checkpoints.hf.afmoe_weight_mapper import ( + AfmoeHfWeightMapper, + ) + + self.mapper = AfmoeHfWeightMapper() + + def test_expert_key_remapping(self): + fake_weights = { + "model.layers.1.mlp.experts.0.gate_proj.weight": torch.zeros(1), + "model.layers.1.mlp.experts.0.up_proj.weight": torch.zeros(1), + "model.layers.1.mlp.experts.0.down_proj.weight": torch.zeros(1), + "model.layers.1.mlp.experts.3.gate_proj.weight": torch.zeros(1), + "model.layers.1.mlp.experts.3.up_proj.weight": torch.zeros(1), + "model.layers.1.mlp.experts.3.down_proj.weight": torch.zeros(1), + } + result = self.mapper.preprocess_weights(fake_weights) + for expert_id in [0, 3]: + prefix = f"model.layers.1.mlp.experts.{expert_id}" + self.assertIn(f"{prefix}.w1.weight", result) + self.assertIn(f"{prefix}.w3.weight", result) + self.assertIn(f"{prefix}.w2.weight", result) + self.assertNotIn(f"{prefix}.gate_proj.weight", result) + self.assertNotIn(f"{prefix}.up_proj.weight", result) + self.assertNotIn(f"{prefix}.down_proj.weight", result) + + def test_router_gate_rename(self): + fake_weights = { + "model.layers.2.mlp.router.gate.weight": torch.zeros(1), + } + result = self.mapper.preprocess_weights(fake_weights) + self.assertIn("model.layers.2.mlp.gate.weight", result) + self.assertNotIn("model.layers.2.mlp.router.gate.weight", result) + + def test_expert_bias_rename(self): + fake_weights = { + "model.layers.2.mlp.expert_bias": torch.zeros(1), + } + result = self.mapper.preprocess_weights(fake_weights) + self.assertIn("model.layers.2.mlp.gate.e_score_correction_bias", result) + self.assertNotIn("model.layers.2.mlp.expert_bias", result) + + def test_attention_gate_fused_into_q(self): + # AfmoeAttention uses attn_output_gate=True, so the separate gate_proj + # is interleaved per head into q_proj and the gate_proj key is dropped. + num_heads, head_dim, hidden = 8, 32, 256 + self.mapper._model = Mock() + self.mapper._model.config = Mock(num_attention_heads=num_heads) + + q = torch.arange(num_heads * head_dim * hidden, dtype=torch.float32).reshape( + num_heads * head_dim, hidden + ) + gate = q + 0.5 + fake_weights = { + "model.layers.0.self_attn.q_proj.weight": q, + "model.layers.0.self_attn.gate_proj.weight": gate, + } + result = self.mapper.preprocess_weights(fake_weights) + + self.assertNotIn("model.layers.0.self_attn.gate_proj.weight", result) + fused = result["model.layers.0.self_attn.q_proj.weight"] + self.assertEqual(fused.shape, (2 * num_heads * head_dim, hidden)) + # Per head the layout is [q_head, gate_head]: first head_dim rows are q, + # next head_dim rows are gate. + torch.testing.assert_close(fused[:head_dim], q[:head_dim]) + torch.testing.assert_close(fused[head_dim : 2 * head_dim], gate[:head_dim]) + + def test_qkv_keys_unchanged_without_gate(self): + # Without a gate_proj key (e.g. partial weight dicts), q/k/v are untouched. + fake_weights = { + "model.layers.0.self_attn.q_proj.weight": torch.zeros(1), + "model.layers.0.self_attn.k_proj.weight": torch.zeros(1), + "model.layers.0.self_attn.v_proj.weight": torch.zeros(1), + } + result = self.mapper.preprocess_weights(fake_weights) + self.assertIn("model.layers.0.self_attn.q_proj.weight", result) + self.assertIn("model.layers.0.self_attn.k_proj.weight", result) + self.assertIn("model.layers.0.self_attn.v_proj.weight", result) + + def test_dense_mlp_keys_unchanged_by_preprocess(self): + fake_weights = { + "model.layers.0.mlp.gate_proj.weight": torch.zeros(1), + "model.layers.0.mlp.up_proj.weight": torch.zeros(1), + "model.layers.0.mlp.down_proj.weight": torch.zeros(1), + } + result = self.mapper.preprocess_weights(fake_weights) + self.assertIn("model.layers.0.mlp.gate_proj.weight", result) + self.assertIn("model.layers.0.mlp.up_proj.weight", result) + self.assertIn("model.layers.0.mlp.down_proj.weight", result) + + def test_is_special_instance_module_for_moe(self): + from unittest.mock import MagicMock + + from tensorrt_llm._torch.modules.fused_moe.interface import MoE + + mock_moe = MagicMock(spec=MoE) + mock_moe.__class__ = MoE + self.assertTrue(self.mapper.is_special_instance_module(mock_moe)) + + mock_linear = MagicMock(spec=torch.nn.Linear) + self.assertFalse(self.mapper.is_special_instance_module(mock_linear)) + + +class TestAfmoeWeightLoading(unittest.TestCase): + """Verify AfmoeForCausalLM applies mapper preprocessing in the real load hook.""" + + def test_load_weights_preprocesses_mapper_weights(self): + from tensorrt_llm._torch.models.modeling_utils import DecoderModelForCausalLM + + model = object.__new__(AfmoeForCausalLM) + raw_weights = {"model.layers.1.mlp.router.gate.weight": torch.zeros(1)} + processed_weights = {"model.layers.1.mlp.gate.weight": torch.zeros(1)} + mapper = Mock() + mapper.preprocess_weights.return_value = processed_weights + + with patch.object(DecoderModelForCausalLM, "load_weights", autospec=True) as load_weights: + AfmoeForCausalLM.load_weights(model, raw_weights, mapper, allow_partial_loading=True) + + mapper.preprocess_weights.assert_called_once_with(raw_weights) + load_weights.assert_called_once() + args, kwargs = load_weights.call_args + self.assertIs(args[0], model) + self.assertIs(kwargs["weights"], processed_weights) + self.assertIs(kwargs["weight_mapper"], mapper) + self.assertTrue(kwargs["allow_partial_loading"]) + + +class TestAfmoeSanity(unittest.TestCase): + """Smoke test: build a tiny AFMoE and run a forward pass.""" + + def test_afmoe_sanity(self): + config_dict = deepcopy(AFMOE_CONFIG) + afmoe_config = AfmoeConfig.from_dict(config_dict) + + dtype = afmoe_config.torch_dtype + device = torch.device("cuda") + with _force_mpi_topology_mapping(): + mapping = Mapping(world_size=1, tp_size=1, rank=0) + # Keep this model-wiring smoke test off backend-native attention kernels. + model_config = ModelConfig( + pretrained_config=afmoe_config, + quant_config=QuantConfig(), + mapping=mapping, + attn_backend="VANILLA", + ) + model = AfmoeForCausalLM(model_config).to(device) + + input_ids = torch.tensor( + [100, 200, 300, 100, 200, 100, 400, 500], dtype=torch.int, device=device + ) + + context_sequence_lengths = [3, 2, 1] + sequence_lengths = context_sequence_lengths + [1, 1] + past_seen_tokens = [0, 0, 0, 62, 75] + request_ids = list(range(len(sequence_lengths))) + token_nums = (torch.tensor(past_seen_tokens) + torch.tensor(sequence_lengths)).tolist() + prompt_lens = token_nums[:3] + past_seen_tokens[3:] + + num_blocks = 100 + tokens_per_block = 128 + head_dim = afmoe_config.hidden_size // afmoe_config.num_attention_heads + num_layers = afmoe_config.num_hidden_layers + num_kv_heads = afmoe_config.num_key_value_heads + max_seq_len = num_blocks * tokens_per_block + batch_size = len(context_sequence_lengths) + 2 + + if dtype == torch.half: + kv_cache_dtype = tensorrt_llm.bindings.DataType.HALF + elif dtype == torch.bfloat16: + kv_cache_dtype = tensorrt_llm.bindings.DataType.BF16 + else: + raise ValueError("Invalid dtype") + + kv_cache_config = KvCacheConfig( + enable_block_reuse=False, + enable_partial_reuse=False, + copy_on_partial_reuse=False, + max_tokens=num_blocks * tokens_per_block, + ) + kv_cache_manager = KVCacheManager( + kv_cache_config, + tensorrt_llm.bindings.internal.batch_manager.CacheType.SELF, + num_layers=num_layers, + num_kv_heads=num_kv_heads, + head_dim=head_dim, + tokens_per_block=tokens_per_block, + max_seq_len=max_seq_len, + max_batch_size=batch_size, + mapping=mapping, + dtype=kv_cache_dtype, + ) + kv_cache_manager.add_dummy_requests(request_ids, token_nums) + + metadata_cls = get_attention_backend(model_config.attn_backend).Metadata + attn_metadata = metadata_cls( + seq_lens=torch.tensor(sequence_lengths, dtype=torch.int), + num_contexts=len(context_sequence_lengths), + kv_cache_params=KVCacheParams( + use_cache=True, + num_cached_tokens_per_seq=past_seen_tokens, + ), + kv_cache_manager=kv_cache_manager, + request_ids=request_ids, + prompt_lens=prompt_lens, + max_num_requests=len(context_sequence_lengths) + 2, + max_num_tokens=8192, + ) + + position_ids = [] + for i, tokens in enumerate(past_seen_tokens): + seq_len = context_sequence_lengths[i] if i < len(context_sequence_lengths) else 1 + position_id = torch.arange(tokens, tokens + seq_len, device=input_ids.device) + position_ids.append(position_id) + position_ids = torch.cat(position_ids).unsqueeze(0) + + try: + with torch.inference_mode(), _force_mpi_collectives(): + attn_metadata.prepare() + logits = model.forward( + input_ids=input_ids, position_ids=position_ids, attn_metadata=attn_metadata + ) + + self.assertEqual(len(past_seen_tokens), logits.shape[0]) + finally: + _shutdown_kv_cache_manager(kv_cache_manager) + + def test_moe_layer_config(self): + config_dict = deepcopy(AFMOE_CONFIG) + afmoe_config = AfmoeConfig.from_dict(config_dict) + + device = torch.device("cuda") + model_config = ModelConfig(pretrained_config=afmoe_config) + model = AfmoeForCausalLM(model_config).to(device) + + self.assertEqual(len(model.model.layers), NUM_HIDDEN_LAYERS) + + for i in range(NUM_HIDDEN_LAYERS): + layer = model.model.layers[i] + if i < NUM_DENSE_LAYERS: + self.assertFalse(layer.moe_enabled, f"Layer {i} should be dense") + self.assertNotIsInstance(layer.mlp, AfmoeMoE) + else: + self.assertTrue(layer.moe_enabled, f"Layer {i} should be MoE") + self.assertIsInstance(layer.mlp, AfmoeMoE) + + +class TestAfmoeEndToEnd(unittest.TestCase): + """Exercise AFMoE through the PyTorch LLM API with dummy weights.""" + + def test_llm_dummy_load_generates_from_token_ids(self): + if not torch.cuda.is_available(): + self.skipTest("AFMoE LLM API test requires CUDA") + + with tempfile.TemporaryDirectory() as tmp_model_dir: + with open(f"{tmp_model_dir}/config.json", "w", encoding="utf-8") as f: + json.dump(AFMOE_CONFIG, f, indent=2) + + prompts = [ + {"prompt_token_ids": [100, 200, 300]}, + {"prompt_token_ids": [101, 202]}, + ] + sampling_params = SamplingParams( + max_tokens=2, + end_id=AFMOE_CONFIG["vocab_size"] - 1, + pad_id=AFMOE_CONFIG["vocab_size"] - 1, + detokenize=False, + ignore_eos=True, + ) + + with LLM( + model=tmp_model_dir, + load_format="dummy", + tensor_parallel_size=1, + enable_chunked_prefill=False, + disable_overlap_scheduler=True, + attn_backend="TRTLLM", + max_batch_size=len(prompts), + max_num_tokens=16, + max_seq_len=64, + moe_config=MoeConfig(max_num_tokens=64), + moe_expert_parallel_size=-1, + moe_tensor_parallel_size=-1, + enable_attention_dp=False, + kv_cache_config=LlmKvCacheConfig(enable_block_reuse=False), + ) as llm: + outputs = llm.generate(prompts, sampling_params=sampling_params) + + self.assertEqual(len(outputs), len(prompts)) + for prompt, output in zip(prompts, outputs): + self.assertEqual(output.prompt_token_ids, prompt["prompt_token_ids"]) + self.assertEqual(len(output.outputs), 1) + self.assertEqual(len(output.outputs[0].token_ids), sampling_params.max_tokens) + + +class TestAfmoeTPAttributes(unittest.TestCase): + """Verify TP-related module attributes are wired correctly.""" + + def _build_model(self, tp_size): + config_dict = deepcopy(AFMOE_CONFIG) + afmoe_config = AfmoeConfig.from_dict(config_dict) + with _force_mpi_topology_mapping(): + mapping = Mapping(world_size=tp_size, tp_size=tp_size, rank=0) + model_config = ModelConfig( + pretrained_config=afmoe_config, mapping=mapping, allreduce_strategy="NCCL" + ) + return AfmoeForCausalLM(model_config) + + def _build_attention_dp_model(self, tp_size): + config_dict = deepcopy(AFMOE_CONFIG) + afmoe_config = AfmoeConfig.from_dict(config_dict) + with _force_mpi_topology_mapping(): + mapping = Mapping( + world_size=tp_size, + tp_size=tp_size, + rank=0, + enable_attention_dp=True, + ) + model_config = ModelConfig( + pretrained_config=afmoe_config, mapping=mapping, allreduce_strategy="NCCL" + ) + return AfmoeForCausalLM(model_config) + + def test_qkv_is_column_parallel_with_output_gate(self): + model = self._build_model(tp_size=1) + for layer in model.model.layers: + attn = layer.self_attn + self.assertTrue(attn.attn_output_gate) + self.assertEqual(attn.qkv_proj.tp_mode, TensorParallelMode.COLUMN) + + def test_moe_experts_no_reduce(self): + model = self._build_model(tp_size=1) + for layer in model.model.layers: + if layer.moe_enabled: + self.assertFalse(layer.mlp.experts.reduce_results) + + def test_allreduce_created_for_tp2(self): + model = self._build_model(tp_size=2) + for layer in model.model.layers: + if layer.moe_enabled: + self.assertIsNotNone( + layer.mlp.allreduce, "MoE layer should have allreduce for tp_size=2" + ) + + def test_no_allreduce_for_tp1(self): + model = self._build_model(tp_size=1) + for layer in model.model.layers: + if layer.moe_enabled: + self.assertIsNone( + layer.mlp.allreduce, "MoE layer should NOT have allreduce for tp_size=1" + ) + + def test_qkv_output_includes_fused_gate(self): + # With attn_output_gate=True the query slot is doubled (q + gate) and + # fused into qkv_proj, so its local output is 2*q_size + 2*kv_size. + model = self._build_model(tp_size=2) + for layer in model.model.layers: + attn = layer.self_attn + expected_out = attn.q_size * 2 + 2 * attn.kv_size + actual_out = attn.qkv_proj.weight.shape[0] + self.assertEqual( + actual_out, + expected_out, + f"qkv_proj local output should be 2*q_size + 2*kv_size = " + f"{expected_out}, got {actual_out}", + ) + + def test_attention_dp_uses_unsharded_qkv_and_mlp_modules(self): + model = self._build_attention_dp_model(tp_size=2) + + for layer in model.model.layers: + attn = layer.self_attn + self.assertEqual(attn.qkv_proj.tp_size, 1) + # Unsharded: full heads, q slot doubled by the output gate. + expected_out = attn.q_size * 2 + 2 * attn.kv_size + self.assertEqual(attn.qkv_proj.weight.shape[0], expected_out) + + if layer.moe_enabled: + self.assertIsNone(layer.mlp.allreduce) + if layer.mlp.shared_experts is not None: + self.assertEqual(layer.mlp.shared_experts.gate_up_proj.tp_size, 1) + self.assertEqual(layer.mlp.shared_experts.down_proj.tp_size, 1) + else: + self.assertEqual(layer.mlp.gate_up_proj.tp_size, 1) + self.assertEqual(layer.mlp.down_proj.tp_size, 1) + + def test_attention_layer_types(self): + model = self._build_model(tp_size=1) + layer_types = AFMOE_CONFIG["layer_types"] + for i, layer in enumerate(model.model.layers): + attn = layer.self_attn + if layer_types[i] == "sliding_attention": + self.assertTrue(attn.is_local_attention) + self.assertEqual(attn.attention_window_size, WINDOW_SIZE) + else: + self.assertFalse(attn.is_local_attention) + self.assertIsNone(attn.attention_window_size) + + +@unittest.skipUnless(torch.cuda.is_available(), "needs CUDA") +@unittest.skipIf( + SKIP_AFMOE_HF_ACCURACY_TEST, + "installed transformers does not provide the HF afmoe reference model", +) +class TestAfmoeAllCloseToHF(unittest.TestCase): + """Compare TRT-LLM AFMoE context-phase logits against the HF reference. + + Loads the HF model's weights into the TRT-LLM model via AfmoeHfWeightMapper, + exercising the per-head q/gate fusion (attn_output_gate) and the HF + fused-expert -> per-expert conversion, then checks logit parity. + """ + + # Field names follow the HF AfmoeConfig schema (released-checkpoint names). + HF_CONFIG = { + "hidden_size": 256, + "intermediate_size": 512, + "moe_intermediate_size": 128, + "head_dim": 32, + "num_attention_heads": 8, + "num_key_value_heads": 2, + "num_hidden_layers": NUM_HIDDEN_LAYERS, + "num_dense_layers": NUM_DENSE_LAYERS, + "num_experts": 8, + "num_experts_per_tok": 2, + "num_shared_experts": 1, + "global_attn_every_n_layers": 4, + "sliding_window": WINDOW_SIZE, + "max_position_embeddings": 2048, + "rms_norm_eps": 1e-5, + "rope_theta": 10000, + "route_scale": 1.0, + "route_norm": True, + "score_func": "sigmoid", + "vocab_size": 1024, + "hidden_act": "silu", + "tie_word_embeddings": False, + } + + @staticmethod + def _convert_hf_experts(state_dict, moe_intermediate_size): + """Split HF fused 3D expert params into per-expert gate/up/down weights. + + HF-native AFMoE stores experts as ``experts.gate_up_proj`` + ``[num_experts, 2 * moe_inter, hidden]`` and ``experts.down_proj`` + ``[num_experts, hidden, moe_inter]``; AfmoeHfWeightMapper expects the + released-checkpoint layout with separate per-expert matrices. + """ + converted = dict(state_dict) + gate_up_keys = [k for k in state_dict if k.endswith(".experts.gate_up_proj")] + for gate_up_key in gate_up_keys: + prefix = gate_up_key[: -len(".gate_up_proj")] + gate_up = converted.pop(gate_up_key) + down = converted.pop(prefix + ".down_proj") + for expert_idx in range(gate_up.shape[0]): + converted[f"{prefix}.{expert_idx}.gate_proj.weight"] = gate_up[expert_idx][ + :moe_intermediate_size + ].contiguous() + converted[f"{prefix}.{expert_idx}.up_proj.weight"] = gate_up[expert_idx][ + moe_intermediate_size: + ].contiguous() + converted[f"{prefix}.{expert_idx}.down_proj.weight"] = down[expert_idx].contiguous() + return converted + + @torch.no_grad() + def test_afmoe_allclose_to_hf(self): + from tensorrt_llm._torch.models.checkpoints.hf.afmoe_weight_mapper import ( + AfmoeHfWeightMapper, + ) + + torch.manual_seed(0) + device = torch.device("cuda") + dtype = torch.bfloat16 + + hf_config = HFAfmoeConfig(dtype="float32", **self.HF_CONFIG) + hf_model = HFAfmoeForCausalLM(hf_config).to(dtype).to(device).eval() + + # TRT-LLM needs a couple of routing fields that the HF schema names + # differently; provide both so AfmoeConfig validates and builds. + trt_config_dict = dict(self.HF_CONFIG) + trt_config_dict.update( + architectures=["AfmoeForCausalLM"], + model_type="afmoe", + dtype="bfloat16", + n_group=1, + topk_group=1, + scoring_func=self.HF_CONFIG["score_func"], + norm_topk_prob=self.HF_CONFIG["route_norm"], + ) + afmoe_config = AfmoeConfig.from_dict(trt_config_dict) + with _force_mpi_topology_mapping(): + mapping = Mapping(world_size=1, tp_size=1, rank=0) + # Keep HF parity focused on AFMoE weights/model math, not attention-kernel coverage. + model_config = ModelConfig( + pretrained_config=afmoe_config, + mapping=mapping, + attn_backend="VANILLA", + ) + model = AfmoeForCausalLM(model_config).to(dtype).to(device) + + weights = self._convert_hf_experts( + hf_model.state_dict(), self.HF_CONFIG["moe_intermediate_size"] + ) + weights = {k: v.to(dtype) for k, v in weights.items()} + + weight_mapper = AfmoeHfWeightMapper() + weight_mapper.init_model_and_config(model, model_config) + model.load_weights(weights, weight_mapper) + if hasattr(model, "post_load_weights"): + model.post_load_weights() + + # Short context: input_len < sliding_window so sliding == full attention. + input_len = WINDOW_SIZE - 1 + input_ids = torch.tensor([101, 202, 303][:input_len], dtype=torch.int32, device=device) + position_ids = torch.arange(input_len, dtype=torch.int32, device=device).unsqueeze(0) + + num_blocks, tokens_per_block = 4, 128 + max_seq_len = num_blocks * tokens_per_block + kv_cache_manager = KVCacheManager( + KvCacheConfig( + enable_block_reuse=False, + enable_partial_reuse=False, + copy_on_partial_reuse=False, + max_tokens=num_blocks * tokens_per_block, + ), + tensorrt_llm.bindings.internal.batch_manager.CacheType.SELF, + num_layers=hf_config.num_hidden_layers, + num_kv_heads=hf_config.num_key_value_heads, + head_dim=hf_config.head_dim, + tokens_per_block=tokens_per_block, + max_seq_len=max_seq_len, + max_batch_size=1, + mapping=mapping, + dtype=tensorrt_llm.bindings.DataType.BF16, + ) + kv_cache_manager.add_dummy_requests([0], [input_len]) + metadata_cls = get_attention_backend(model_config.attn_backend).Metadata + attn_metadata = metadata_cls( + seq_lens=torch.tensor([input_len], dtype=torch.int), + num_contexts=1, + kv_cache_params=KVCacheParams(use_cache=True, num_cached_tokens_per_seq=[0]), + kv_cache_manager=kv_cache_manager, + request_ids=[0], + prompt_lens=[input_len], + max_num_requests=1, + max_num_tokens=8192, + ) + + try: + hf_position_ids = position_ids.to(torch.long) + with torch.inference_mode(), _force_mpi_collectives(): + attn_metadata.prepare() + logits = model.forward( + input_ids=input_ids, position_ids=position_ids, attn_metadata=attn_metadata + ) + ref = hf_model.forward( + input_ids=input_ids.unsqueeze(0).long(), + position_ids=hf_position_ids, + use_cache=False, + ) + + # Loose tolerance: bf16 + token-choice MoE routing amplify per-logit + # noise (same rationale as the EXAONE-MoE parity test). + torch.testing.assert_close(logits, ref.logits[:, -1].float(), atol=1.0, rtol=0.5) + finally: + _shutdown_kv_cache_manager(kv_cache_manager) + + +if __name__ == "__main__": + unittest.main() diff --git a/tests/unittest/_torch/modeling/test_modeling_nemotron_nano_v2_vl.py b/tests/unittest/_torch/modeling/test_modeling_nemotron_nano_v2_vl.py index 3b89fe8ca204..f215fc208ebe 100644 --- a/tests/unittest/_torch/modeling/test_modeling_nemotron_nano_v2_vl.py +++ b/tests/unittest/_torch/modeling/test_modeling_nemotron_nano_v2_vl.py @@ -3,6 +3,7 @@ import os from pathlib import Path +from types import SimpleNamespace from unittest import mock from unittest.mock import MagicMock @@ -14,15 +15,19 @@ from test_modeling_nemotron_h import extract_decode_logprobs from tensorrt_llm import LLM +from tensorrt_llm._torch.models import modeling_nemotron_nano as nemotron_nano from tensorrt_llm._torch.models.modeling_multimodal_utils import get_multimodal_embeddings from tensorrt_llm._torch.models.modeling_nemotron_nano import ( NanoV2VLInputProcessor, + NanoV2VLMultimodalEncoder, NanoV2VLVisionEncoder, NemotronH_Nano_VL_V2, ) from tensorrt_llm._torch.models.modeling_parakeet import ProjectedParakeet +from tensorrt_llm._torch.models.modeling_utils import MODEL_CLASS_VISION_ENCODER_MAPPING from tensorrt_llm.inputs import ( AudioData, + VideoData, create_input_processor, create_input_processor_with_hash, default_multimodal_input_loader, @@ -36,6 +41,169 @@ MODEL_PATH = str(os.path.join(llm_models_root(), "NVIDIA-Nemotron-Nano-12B-v2-VL-BF16")) +def _make_minimal_nano_model_config(): + llm_config = SimpleNamespace(vocab_size=128) + pretrained_config = SimpleNamespace( + llm_config=llm_config, + torch_dtype=torch.bfloat16, + img_context_token_id=20, + video_context_token_id=21, + sound_context_token_id=None, + sound_config=None, + ) + return SimpleNamespace( + pretrained_config=pretrained_config, + quant_config=SimpleNamespace(exclude_modules=None), + quant_config_dict=None, + video_pruning_rate=None, + ) + + +def test_nemotron_nano_registers_native_multimodal_epd_components(): + """Native Nano VL/Omni classes advertise MM EPD support.""" + for arch in ("NemotronH_Nano_VL_V2", "NemotronH_Nano_Omni_Reasoning_V3"): + vision_encoder_cls, vlm_base_model = MODEL_CLASS_VISION_ENCODER_MAPPING[arch] + assert vision_encoder_cls is NanoV2VLMultimodalEncoder + assert vlm_base_model is None + assert NanoV2VLInputProcessor.support_mm_disagg is True + assert NemotronH_Nano_VL_V2.support_mm_disagg is True + + +def _assert_nano_video_handoff(handoff): + """Shared assertions for the EPD video handoff: split runs stay grouped under one MM item.""" + assert handoff.prompt_token_ids == [101, 30, 20, 20, 31, 55, 30, 20, 20, 31, 102] + assert handoff.multimodal_lengths == [8] + assert handoff.multimodal_positions == [1] + assert handoff.multimodal_embedding_lengths == [4] + assert handoff.multimodal_item_run_cu_offsets == [0, 2] + assert handoff.multimodal_run_positions == [1, 6] + assert handoff.multimodal_run_lengths == [4, 4] + assert handoff.special_token_offsets == [0, 3, 4, 7] + + +@pytest.mark.parametrize( + "input_field, input_value, asserts_encode_not_called", + [ + # Detokenized prompt text path: the tokenizer may encode the prompt. + ("prompt", "Question