diff --git a/cpp/tensorrt_llm/common/attentionOp.cpp b/cpp/tensorrt_llm/common/attentionOp.cpp
index 22d15edf54af..1473f9ef359f 100644
--- a/cpp/tensorrt_llm/common/attentionOp.cpp
+++ b/cpp/tensorrt_llm/common/attentionOp.cpp
@@ -20,7 +20,6 @@
 #include "tensorrt_llm/common/envUtils.h"
 #include "tensorrt_llm/common/logger.h"
 #include "tensorrt_llm/common/memoryUtils.h"
-#include "tensorrt_llm/common/sageQuant.h"
 #include "tensorrt_llm/kernels/decoderMaskedMultiheadAttention.h"
 #include "tensorrt_llm/kernels/flashMLA/flash_mla.h"
 #include "tensorrt_llm/kernels/gptKernels.h"
@@ -779,10 +778,6 @@ size_t AttentionOp::getWorkspaceSizeForContext(nvinfer1::DataType type, int32_t
         = mNumAttnHeads * dim_k_per_head; // Assuming effective num_kv_heads = head_num for layout
     int const total_v_dim_all_heads
         = mNumAttnHeads * dim_v_per_head; // Assuming effective num_kv_heads = head_num for layout
-    bool const useSageAttnSeparateQkv = mEnableContextFMHA && !mIsMLAEnabled && mFmhaDispatcher->isSeparateQAndKvInput()
-        && (mSageAttnNumEltsPerBlkQ > 0 || mSageAttnNumEltsPerBlkK > 0 || mSageAttnNumEltsPerBlkV > 0)
-        && mFP8ContextFMHA;
-
     // Packed fp8 qkv buffer size for normal fp8 context FMHA
     size_t fp8_qkv_buffer_size = mFP8ContextFMHA && mEnableContextFMHA && !mFmhaDispatcher->isSeparateQAndKvInput()
         ? max_num_tokens * size_t(local_hidden_units_qo + 2 * local_hidden_units_kv)
@@ -808,22 +803,6 @@ size_t AttentionOp::getWorkspaceSizeForContext(nvinfer1::DataType type, int32_t
             fp8_v_buf_size = mChunkPrefillBufferBatchSize * max_num_tokens * static_cast<size_t>(total_v_dim_all_heads);
         }
     }
-    else if (useSageAttnSeparateQkv)
-    {
-        fp8_q_buf_size = max_num_tokens * static_cast<size_t>(local_hidden_units_qo);
-        fp8_k_buf_size = max_num_tokens * static_cast<size_t>(local_hidden_units_kv);
-        fp8_v_buf_size = max_num_tokens * static_cast<size_t>(local_hidden_units_kv);
-    }
-
-    int32_t const q_max_n_blk = mSageAttnNumEltsPerBlkQ > 0 ? tc::divUp(input_seq_length, mSageAttnNumEltsPerBlkQ) : 0;
-    int32_t const k_max_n_blk = mSageAttnNumEltsPerBlkK > 0 ? tc::divUp(input_seq_length, mSageAttnNumEltsPerBlkK) : 0;
-    size_t const sage_q_sfs_buffer_size
-        = useSageAttnSeparateQkv ? sizeof(float) * mNumAttnHeads * batch_size * static_cast<size_t>(q_max_n_blk) : 0;
-    size_t const sage_k_sfs_buffer_size
-        = useSageAttnSeparateQkv ? sizeof(float) * mNumAttnKVHeads * batch_size * static_cast<size_t>(k_max_n_blk) : 0;
-    size_t const sage_v_sfs_buffer_size = useSageAttnSeparateQkv
-        ? sizeof(float) * tc::divUp(local_hidden_units_kv, std::max(1, mSageAttnNumEltsPerBlkV))
-        : 0;
 
     size_t const padding_offset_size = mEnableContextFMHA ? 0 : sizeof(int) * max_num_tokens;
     size_t const encoder_padding_offset_size = mEnableContextFMHA ? 0 : sizeof(int) * max_num_tokens;
@@ -839,7 +818,7 @@ size_t AttentionOp::getWorkspaceSizeForContext(nvinfer1::DataType type, int32_t
         ? 0
         : (2 * size * cpMaxPaddedSequenceLength * getHeadSize() * (mNumHeads + 2 * mNumKVHeads) + cu_seqlens_size);
 
-    int const NUM_BUFFERS = 26;
+    int const NUM_BUFFERS = 23;
     size_t workspaces[NUM_BUFFERS];
     workspaces[0] = CUBLAS_WORKSPACE_SIZE;
     workspaces[1] = attention_mask_size;
@@ -863,10 +842,7 @@ size_t AttentionOp::getWorkspaceSizeForContext(nvinfer1::DataType type, int32_t
     workspaces[19] = fmha_scheduler_counter;
     workspaces[20] = fmha_bmm1_scale_size;
     workspaces[21] = fmha_bmm2_scale_size;
-    workspaces[22] = sage_q_sfs_buffer_size;
-    workspaces[23] = sage_k_sfs_buffer_size;
-    workspaces[24] = sage_v_sfs_buffer_size;
-    workspaces[25] = cpWorkspaceSize;
+    workspaces[22] = cpWorkspaceSize;
     context_workspace_size = tc::calculateTotalWorkspaceSize(workspaces, NUM_BUFFERS);
 
     return context_workspace_size;
@@ -1442,10 +1418,6 @@ int AttentionOp::enqueueContext(EnqueueContextParams<T> const& params, cudaStrea
         = mNumAttnHeads * dim_k_per_head; // Assuming effective num_kv_heads = head_num for layout
     int const total_v_dim_all_heads
         = mNumAttnHeads * dim_v_per_head; // Assuming effective num_kv_heads = head_num for layout
-    bool const useSageAttnSeparateQkv = mEnableContextFMHA && !mIsMLAEnabled && mFmhaDispatcher->isSeparateQAndKvInput()
-        && (mSageAttnNumEltsPerBlkQ > 0 || mSageAttnNumEltsPerBlkK > 0 || mSageAttnNumEltsPerBlkV > 0)
-        && mFP8ContextFMHA;
-
     // Packed fp8 qkv buffer size for normal fp8 context FMHA
     size_t fp8_qkv_buffer_size = mEnableContextFMHA && mFP8ContextFMHA && !mFmhaDispatcher->isSeparateQAndKvInput()
         ? params.num_tokens * (local_hidden_units_qo + 2 * local_hidden_units_kv)
@@ -1471,26 +1443,6 @@ int AttentionOp::enqueueContext(EnqueueContextParams<T> const& params, cudaStrea
             fp8_v_buf_size = params.total_kv_len * static_cast<size_t>(total_v_dim_all_heads);
         }
     }
-    else if (useSageAttnSeparateQkv)
-    {
-        fp8_q_buf_size = params.num_tokens * static_cast<size_t>(local_hidden_units_qo);
-        fp8_k_buf_size = params.total_kv_len * static_cast<size_t>(local_hidden_units_kv);
-        fp8_v_buf_size = params.total_kv_len * static_cast<size_t>(local_hidden_units_kv);
-    }
-    int32_t const q_max_n_blk
-        = mSageAttnNumEltsPerBlkQ > 0 ? tc::divUp(params.input_seq_length, mSageAttnNumEltsPerBlkQ) : 0;
-    int32_t const k_max_n_blk
-        = mSageAttnNumEltsPerBlkK > 0 ? tc::divUp(params.input_seq_length, mSageAttnNumEltsPerBlkK) : 0;
-    // SageAttention V scales are shared across tokens and partitioned on the flattened hidden dimension (H * D).
-    int32_t const v_max_n_blk
-        = mSageAttnNumEltsPerBlkV > 0 ? tc::divUp(local_hidden_units_kv, mSageAttnNumEltsPerBlkV) : 0;
-    size_t const sage_q_sfs_buffer_size = useSageAttnSeparateQkv
-        ? sizeof(float) * mNumAttnHeads * params.batch_size * static_cast<size_t>(q_max_n_blk)
-        : 0;
-    size_t const sage_k_sfs_buffer_size = useSageAttnSeparateQkv
-        ? sizeof(float) * mNumAttnKVHeads * params.batch_size * static_cast<size_t>(k_max_n_blk)
-        : 0;
-    size_t const sage_v_sfs_buffer_size = useSageAttnSeparateQkv ? sizeof(float) * static_cast<size_t>(v_max_n_blk) : 0;
     size_t const padding_offset_size
         = mEnableContextFMHA ? 0 : sizeof(int) * params.batch_size * params.input_seq_length;
     size_t const encoder_padding_offset_size
@@ -1545,12 +1497,6 @@ int AttentionOp::enqueueContext(EnqueueContextParams<T> const& params, cudaStrea
         = reinterpret_cast<float*>(nextWorkspacePtr(workspace_byte_ptr, offset, fmha_bmm1_scale_size));
     float* fmha_bmm2_scale_ptr
         = reinterpret_cast<float*>(nextWorkspacePtr(workspace_byte_ptr, offset, fmha_bmm2_scale_size));
-    float* sage_q_sfs_buf
-        = reinterpret_cast<float*>(nextWorkspacePtr(workspace_byte_ptr, offset, sage_q_sfs_buffer_size));
-    float* sage_k_sfs_buf
-        = reinterpret_cast<float*>(nextWorkspacePtr(workspace_byte_ptr, offset, sage_k_sfs_buffer_size));
-    float* sage_v_sfs_buf
-        = reinterpret_cast<float*>(nextWorkspacePtr(workspace_byte_ptr, offset, sage_v_sfs_buffer_size));
 
     T* gatherInBuffer = reinterpret_cast<T*>(nextWorkspacePtr(workspace_byte_ptr, offset, cpWorkspaceSize));
     T* gatherOutBuffer = gatherInBuffer + cpMaxPadedSequenceLength * getHeadSize() * (mNumHeads + 2 * mNumKVHeads);
@@ -1792,69 +1738,7 @@ int AttentionOp::enqueueContext(EnqueueContextParams<T> const& params, cudaStrea
         }
         else
         {
-            if (useSageAttnSeparateQkv)
-            {
-                TLLM_CHECK_WITH_INFO(mFP8ContextFMHA, "SageAttention kernel runs under mFP8ContextFMHA option.");
-                TLLM_CHECK_WITH_INFO(
-                    mFmhaDispatcher->isSupported(), "SageAttention has no unfused fallback implemented.");
-                TLLM_CHECK_WITH_INFO(
-                    mSageAttnNumEltsPerBlkQ > 0 && mSageAttnNumEltsPerBlkK > 0 && mSageAttnNumEltsPerBlkV == 1,
-                    "SageQuant requires positive block sizes for Q and K while the block size for V must be 1.");
-                TLLM_CHECK_WITH_INFO(!params.kv_scale_quant_orig,
-                    "SageAttention disregards the configured params.kv_scale_quant_orig, invalidating the result.");
-                check_cuda_error(cudaMemsetAsync(sage_v_sfs_buf, 0, sage_v_sfs_buffer_size, stream));
-
-                tc::SageQuantParams qkParams{};
-                qkParams.headDim = getHeadSize();
-                qkParams.inputType = std::is_same_v<T, __nv_bfloat16> ? DATA_TYPE_BF16 : DATA_TYPE_FP16;
-                qkParams.quantType = mSageAttnQkInt8 ? DATA_TYPE_INT8 : DATA_TYPE_E4M3;
-                qkParams.vStage = 0;
-                qkParams.sumSeqLensV = params.total_kv_len;
-                qkParams.numHeadsV = mNumAttnKVHeads;
-                qkParams.ptrV = params.v_ptr;
-                qkParams.ptrVQuant = fp8_v_buf;
-                qkParams.ptrVScale = sage_v_sfs_buf;
-                qkParams.smCount = mMultiProcessorCount;
-                qkParams.stream = stream;
-
-                // Quantize into Fp8Q, SfsQ, SfsV
-                if (mSageAttnNumEltsPerBlkQ > 0)
-                {
-                    qkParams.sumSeqLensQk = params.num_tokens;
-                    qkParams.numHeads = mNumAttnHeads;
-                    qkParams.tokenBlockSize = mSageAttnNumEltsPerBlkQ;
-                    qkParams.ptrQk = attention_input;
-                    qkParams.ptrQkQuant = fp8_q_buf;
-                    qkParams.ptrQkScale = sage_q_sfs_buf;
-                    qkParams.vStage = 1;
-                    tc::invokeSageQuant(qkParams);
-                }
-                else
-                {
-                    invokeCudaCast(fp8_q_buf, attention_input, params.num_tokens * local_hidden_units_qo, stream);
-                }
-
-                // Quantize into Fp8K, SfsK, Fp8V
-                if (mSageAttnNumEltsPerBlkK > 0)
-                {
-                    qkParams.sumSeqLensQk = params.total_kv_len;
-                    qkParams.numHeads = mNumAttnKVHeads;
-                    qkParams.tokenBlockSize = mSageAttnNumEltsPerBlkK;
-                    qkParams.ptrQk = params.k_ptr;
-                    qkParams.ptrQkQuant = fp8_k_buf;
-                    qkParams.ptrQkScale = sage_k_sfs_buf;
-                    qkParams.vStage = 2;
-                    tc::invokeSageQuant(qkParams);
-                }
-                else
-                {
-                    invokeCudaCast(fp8_k_buf, params.k_ptr, params.total_kv_len * local_hidden_units_kv, stream);
-                }
-            }
-            else
-            {
-                invokeQKVPreprocessing(preprocessingParams, stream);
-            }
+            invokeQKVPreprocessing(preprocessingParams, stream);
         }
         sync_check_cuda_error(stream);
         {
@@ -1934,23 +1818,9 @@ int AttentionOp::enqueueContext(EnqueueContextParams<T> const& params, cudaStrea
         }
         else
         {
-            if (useSageAttnSeparateQkv)
-            {
-                fmhaParams.qkvPtr = nullptr;
-                fmhaParams.qPtr = reinterpret_cast<void const*>(fp8_q_buf);
-                fmhaParams.kPtr = reinterpret_cast<void const*>(fp8_k_buf);
-                fmhaParams.vPtr = reinterpret_cast<void const*>(fp8_v_buf);
-
-                fmhaParams.qScalePtr = sage_q_sfs_buf;
-                fmhaParams.kScalePtr = sage_k_sfs_buf;
-                fmhaParams.vScalePtr = sage_v_sfs_buf;
-            }
-            else
-            {
-                fmhaParams.qkvPtr = mFP8ContextFMHA ? reinterpret_cast<void const*>(fp8_qkv_buffer)
-                                                    : reinterpret_cast<void const*>(attention_input);
-                fmhaParams.qPtr = reinterpret_cast<void const*>(q_buf_2_);
-            }
+            fmhaParams.qkvPtr = mFP8ContextFMHA ? reinterpret_cast<void const*>(fp8_qkv_buffer)
+                                                : reinterpret_cast<void const*>(attention_input);
+            fmhaParams.qPtr = reinterpret_cast<void const*>(q_buf_2_);
         }
         // TODO: add contiguous kv buffer (cross-attention).
         fmhaParams.kvPtr = nullptr;
@@ -2877,11 +2747,6 @@ int AttentionOp::initialize() noexcept
             fmhaParams.attentionInputLayout = (mPagedKVCache && mPagedContextFMHA) ? AttentionInputLayout::Q_PAGED_KV
                                                                                    : AttentionInputLayout::PACKED_QKV;
         }
-        if (!mIsMLAEnabled && mFP8ContextFMHA
-            && (mSageAttnNumEltsPerBlkQ > 0 || mSageAttnNumEltsPerBlkK > 0 || mSageAttnNumEltsPerBlkV > 0))
-        {
-            fmhaParams.attentionInputLayout = AttentionInputLayout::SEPARATE_Q_K_V;
-        }
         fmhaParams.isSPadded = !mRemovePadding;
         fmhaParams.numQHeads = mNumAttnHeads;
         fmhaParams.numKvHeads = mNumAttnKVHeads;
@@ -2889,10 +2754,6 @@ int AttentionOp::initialize() noexcept
         fmhaParams.headSize = mHeadSize;
         fmhaParams.headSizeV = mHeadSize;
         fmhaParams.qScaling = mQScaling;
-        fmhaParams.sageBlockSizeQ = mSageAttnNumEltsPerBlkQ;
-        fmhaParams.sageBlockSizeK = mSageAttnNumEltsPerBlkK;
-        fmhaParams.sageBlockSizeV = mSageAttnNumEltsPerBlkV;
-        fmhaParams.dataTypeQkReinterpret = mSageAttnQkInt8 ? DATA_TYPE_INT8 : DATA_TYPE_E4M3;
 
         // mFmhaDispatcher is not used for generation MLA, but we still need to modify these values to avoid selecting
         // the wrong kernel, no matter mIsGenerationMLA is true or false
@@ -3199,10 +3060,6 @@ std::string AttentionOp::toString() const
     ss << "mPosShiftEnabled: " << std::boolalpha << mPosShiftEnabled << std::endl;
     ss << "mPagedContextFMHA: " << std::boolalpha << mPagedContextFMHA << std::endl;
     ss << "mFP8ContextFMHA: " << std::boolalpha << mFP8ContextFMHA << std::endl;
-    ss << "mSageAttnNumEltsPerBlkQ: " << mSageAttnNumEltsPerBlkQ << std::endl;
-    ss << "mSageAttnNumEltsPerBlkK: " << mSageAttnNumEltsPerBlkK << std::endl;
-    ss << "mSageAttnNumEltsPerBlkV: " << mSageAttnNumEltsPerBlkV << std::endl;
-    ss << "mSageAttnQkInt8: " << std::boolalpha << mSageAttnQkInt8 << std::endl;
     ss << "mFP8AttenOutput: " << std::boolalpha << mFP8AttenOutput << std::endl;
     ss << "mFP8ContextMLA: " << std::boolalpha << mFP8ContextMLA << std::endl;
     ss << "mDenseContextFMHA: " << std::boolalpha << mDenseContextFMHA << std::endl;
diff --git a/cpp/tensorrt_llm/common/attentionOp.h b/cpp/tensorrt_llm/common/attentionOp.h
index dfd670af535a..d3df17427da7 100644
--- a/cpp/tensorrt_llm/common/attentionOp.h
+++ b/cpp/tensorrt_llm/common/attentionOp.h
@@ -119,10 +119,6 @@ class AttentionOp
         // this is a buffer of size [num_tokens, num_heads_q] with each element
         // representing the max and LSE/denominator of the softmax values
         float2* softmax_stats = nullptr;
-        // Optional SageAttention scaling factors.
-        float const* sage_attn_sfs_q = nullptr;
-        float const* sage_attn_sfs_k = nullptr;
-        float const* sage_attn_sfs_v = nullptr;
     };
 
     template <typename T>
@@ -523,12 +519,6 @@ class AttentionOp
     // Skip softmax threshold scale factor.
     float mSkipSoftmaxThresholdScaleFactorPrefill = 0;
     float mSkipSoftmaxThresholdScaleFactorDecode = 0;
-    // Optional SageAttention block sizes.
-    // Currently, these are only consumed by the TllmGen backend path.
-    int mSageAttnNumEltsPerBlkQ = 0;
-    int mSageAttnNumEltsPerBlkK = 0;
-    int mSageAttnNumEltsPerBlkV = 0;
-    bool mSageAttnQkInt8 = false;
 #ifdef SKIP_SOFTMAX_STAT
     uint32_t* mSkipSoftmaxTotalBlocks;
     uint32_t* mSkipSoftmaxSkippedBlocks;
@@ -551,8 +541,7 @@ class AttentionOp
             mAttnTpSize, mAttnTpRank, mAttnCpSize, mAttnCpRank, mUlyssesMQABroadcast, mEnableContextFMHA,
             mFMHAForceFP32Acc, mMultiBlockMode, mEnableXQA, mUseKVCache, mSkipAttn, mFuseFp4Quant,
             mNbMultiBlockSemaphores, mAttentionChunkSize.value_or(-1), mSkipSoftmaxThresholdScaleFactorPrefill,
-            mSkipSoftmaxThresholdScaleFactorDecode, mSageAttnNumEltsPerBlkQ, mSageAttnNumEltsPerBlkK,
-            mSageAttnNumEltsPerBlkV, mSageAttnQkInt8);
+            mSkipSoftmaxThresholdScaleFactorDecode);
     };
 
 private:
diff --git a/cpp/tensorrt_llm/common/sageQuant.cu b/cpp/tensorrt_llm/common/sageQuant.cu
deleted file mode 100644
index 670a8ff000bd..000000000000
--- a/cpp/tensorrt_llm/common/sageQuant.cu
+++ /dev/null
@@ -1,462 +0,0 @@
-/*
- * SPDX-FileCopyrightText: Copyright (c) 1993-2026 NVIDIA CORPORATION &
- * AFFILIATES. All rights reserved. SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include "sageQuant.h"
-
-#include "tensorrt_llm/common/assert.h"
-#include "tensorrt_llm/common/cudaUtils.h"
-#include "tensorrt_llm/common/logger.h"
-
-#include <algorithm>
-#include <cstdint>
-#include <cute/tensor.hpp>
-#include <cutlass/array.h>
-#include <cutlass/numeric_conversion.h>
-#include <type_traits>
-
-namespace tensorrt_llm::common
-{
-
-/// @brief SageAttn quantization kernel for Q and K
-
-// Quantization kernel for SageAttention doing 2 tasks per invocation:
-// 1. Performs per-token-block quantization for Q **or** K, depending on the actual pointers passed in.
-// 2. [Optional when gridDim.z>=2] Performs either per-channel Sfs gathering or per-channel quantization for V.
-//
-// NOTE: all tensors in this file are treated as column-major: [D, H, S].
-template <typename Element, typename ElementQuantized, int TokenPerScale, int HeadDim, bool KSmooth, int VStage>
-__global__ void sageQuantQkvKernel(int sumSeqLensQk, void const* ptrQk, void* ptrQkQuant, float* ptrQkScale,
-    float* ptrKMean, int sumSeqLensV, int numHeadsV, void const* ptrV, void* ptrVQuant, float* ptrVScale)
-{
-    using namespace cute;
-    using namespace cutlass;
-    static_assert(!KSmooth, "K-smoothing not implemented yet");
-#ifdef ENABLE_FP8
-    static_assert(std::is_same_v<ElementQuantized, float_e4m3_t> || std::is_same_v<ElementQuantized, std::int8_t>,
-        "Unrecognized target dtype for quantization");
-    constexpr float TypeMax = cute::is_same_v<ElementQuantized, float_e4m3_t> ? 448.0f : static_cast<float>(126.9f);
-#else
-    static_assert(
-        std::is_same_v<ElementQuantized, std::int8_t>, "Only int8 quantization is available without ENABLE_FP8.");
-    constexpr float TypeMax = static_cast<float>(126.9f);
-#endif
-    constexpr int BestVL = 128 / sizeof_bits_v<Element>;
-    using VL = Int<BestVL>;
-
-    // Silence currently-unused argument until K-smoothing support is added.
-    (void) ptrKMean;
-
-    int const numHeads = gridDim.y;
-    int const headIdx = blockIdx.y;
-    int const numWarpsPerCta = blockDim.x / 32;
-    int const numWarps = gridDim.x * numWarpsPerCta;
-    int const warpId = blockIdx.x * numWarpsPerCta + threadIdx.x / 32;
-    int const thrId = threadIdx.x % 32;
-
-    if (blockIdx.z == 0)
-    {
-        // Qk task -- one-off per-token-block quantization.
-
-        // IO tensors
-        Tensor gQk
-            = make_tensor(reinterpret_cast<Element const*>(ptrQk), make_shape(Int<HeadDim>{}, numHeads, sumSeqLensQk));
-        Tensor gQkQuant = make_tensor(
-            reinterpret_cast<ElementQuantized*>(ptrQkQuant), make_shape(Int<HeadDim>{}, numHeads, sumSeqLensQk));
-        Tensor gQkScale = make_tensor(ptrQkScale, make_shape(ceil_div(sumSeqLensQk, TokenPerScale), numHeads));
-
-        // This head
-        Tensor gQkSeq = gQk(_, headIdx, _);
-        Tensor gQkSeqQuant = gQkQuant(_, headIdx, _);
-        Tensor gQkSeqScale = gQkScale(_, headIdx);
-
-        // Tiling
-        Tensor gQkVecs = tiled_divide(gQkSeq, Shape<VL, Int<TokenPerScale>>{});
-        Tensor gQkVecsQuant = tiled_divide(gQkSeqQuant, Shape<VL, Int<TokenPerScale>>{});
-
-        // Register buffers
-        Tensor rQk = make_tensor<Element>(Shape<VL, Int<TokenPerScale>>{});
-        Tensor rQkQuant = make_tensor<ElementQuantized>(Shape<VL, Int<TokenPerScale>>{});
-        Tensor rQkCompute = make_tensor<float>(Shape<VL, Int<TokenPerScale>>{});
-
-        // Compute tensors
-        Tensor rQk_x2 = recast<Array<Element, 2>>(rQk);
-        Tensor rQkCompute_x2 = recast<Array<float, 2>>(rQkCompute);
-        // Conversion tensors
-        Tensor rQk_x4 = recast<Array<Element, 4>>(rQk);
-        Tensor rQkQuant_x4 = recast<Array<ElementQuantized, 4>>(rQkQuant);
-
-        // Threads count per token block
-        constexpr int threadsPerScale = size<1>(gQkVecs);
-        static_assert(threadsPerScale <= 32, "One token block should never exceed warp scope");
-        int const numScalesPerWarp = 32 / threadsPerScale;
-        int const numScalesPerWave = numWarps * numScalesPerWarp;
-        int const numWholeScales = sumSeqLensQk / TokenPerScale;
-
-        // Thread coordinates
-        int tokBlkIdx = warpId * numScalesPerWarp + thrId / threadsPerScale;
-        int threadInScaleIdx = thrId % threadsPerScale;
-
-        // Unpredicated iterations
-        for (; tokBlkIdx < numWholeScales; tokBlkIdx += numScalesPerWave)
-        {
-            // Load input
-            cute::copy(AutoVectorizingCopy{}, gQkVecs(_, threadInScaleIdx, tokBlkIdx), rQk);
-            cute::transform(rQk_x2, rQkCompute_x2, NumericArrayConverter<float, Element, 2>::convert);
-
-            // Intra-thread reduction
-            float maxScale = 1e-3f;
-            CUTLASS_PRAGMA_UNROLL
-            for (int i = 0; i < size(rQk); ++i)
-            {
-                maxScale = ::fmaxf(maxScale, ::fabsf(rQkCompute(i)));
-            }
-            // Intra-warp reduction
-            CUTLASS_PRAGMA_UNROLL
-            for (int delta = 1; delta < threadsPerScale; delta <<= 1)
-            {
-                maxScale = ::fmaxf(maxScale, __shfl_xor_sync(0xffffffffu, maxScale, delta));
-            }
-
-            // Rescale to TypeMax
-            maxScale = maxScale / TypeMax;
-            // Store maxScale
-            gQkSeqScale(tokBlkIdx) = maxScale;
-
-            // 1/maxScale
-            Array<Element, 2> scaleQuant
-                = NumericArrayConverter<Element, float, 2>::convert(Array<float, 2>{maxScale, maxScale});
-            scaleQuant = cutlass::reciprocal_approximate<Array<Element, 2>>{}(scaleQuant);
-            cutlass::multiplies<Array<Element, 2>> scaleQuantOp;
-            // Qk /= maxScale
-            cute::transform(rQk_x2, rQk_x2, [&](auto& x) { return scaleQuantOp(x, scaleQuant); });
-            // Convert to target quant type
-            cute::transform(rQk_x4, rQkQuant_x4, NumericArrayConverter<ElementQuantized, Element, 4>::convert);
-            // Store quantized output
-            cute::copy(AutoVectorizingCopy{}, rQkQuant, gQkVecsQuant(_, threadInScaleIdx, tokBlkIdx));
-        }
-
-        // Predicated iteration
-        int const lastIterTokenIdx = tokBlkIdx * TokenPerScale;
-        if (lastIterTokenIdx < sumSeqLensQk)
-        {
-            // Load input
-            CUTLASS_PRAGMA_UNROLL
-            for (int i = 0; i < size<1>(rQk); ++i)
-            {
-                if (lastIterTokenIdx + i < sumSeqLensQk)
-                {
-                    cute::copy(
-                        AutoVectorizingCopy{}, gQkVecs(make_tuple(_, i), threadInScaleIdx, tokBlkIdx), rQk(_, i));
-                }
-                else
-                {
-                    CUTLASS_PRAGMA_UNROLL
-                    for (int j = 0; j < BestVL; ++j)
-                    {
-                        rQk(j, i) = static_cast<Element>(0);
-                    }
-                }
-            }
-            cute::transform(rQk_x2, rQkCompute_x2, NumericArrayConverter<float, Element, 2>::convert);
-
-            // Intra-thread reduction
-            float maxScale = 1e-3f;
-            CUTLASS_PRAGMA_UNROLL
-            for (int i = 0; i < size(rQk); ++i)
-            {
-                maxScale = ::fmaxf(maxScale, ::fabsf(rQkCompute(i)));
-            }
-            // Intra-warp reduction
-            CUTLASS_PRAGMA_UNROLL
-            for (int delta = 1; delta < threadsPerScale; delta <<= 1)
-            {
-                maxScale = ::fmaxf(maxScale, __shfl_xor_sync(0xffffffffu, maxScale, delta));
-            }
-
-            // Rescale to TypeMax
-            maxScale = maxScale / TypeMax;
-            // Store maxScale
-            gQkSeqScale(tokBlkIdx) = maxScale;
-
-            // 1/maxScale
-            Array<Element, 2> scaleQuant
-                = NumericArrayConverter<Element, float, 2>::convert(Array<float, 2>{maxScale, maxScale});
-            scaleQuant = cutlass::reciprocal_approximate<Array<Element, 2>>{}(scaleQuant);
-            cutlass::multiplies<Array<Element, 2>> scaleQuantOp;
-            // Qk /= maxScale
-            cute::transform(rQk_x2, rQk_x2, [&](auto& x) { return scaleQuantOp(x, scaleQuant); });
-            // Convert to target quant type
-            cute::transform(rQk_x4, rQkQuant_x4, NumericArrayConverter<ElementQuantized, Element, 4>::convert);
-
-            // Store quantized output
-            CUTLASS_PRAGMA_UNROLL
-            for (int i = 0; i < size<1>(rQk); ++i)
-            {
-                if (lastIterTokenIdx + i < sumSeqLensQk)
-                {
-                    cute::copy(AutoVectorizingCopy{}, rQkQuant(_, i),
-                        gQkVecsQuant(make_tuple(_, i), threadInScaleIdx, tokBlkIdx));
-                }
-            }
-        }
-    }
-    else if (blockIdx.z == 1)
-    {
-        // V task -- per-channel (all tokens) 2-stage task
-        using ElementQuantizedV = cutlass::float_e4m3_t;
-
-        // IO tensors
-        constexpr int threadsPerHead = HeadDim / BestVL;
-        static_assert(HeadDim % BestVL == 0, "VL must divide HeadDim");
-        static_assert(threadsPerHead <= 32, "One token block should never exceed warp scope");
-        Tensor gV = make_tensor(
-            reinterpret_cast<Element const*>(ptrV), make_shape(VL{}, Int<threadsPerHead>{}, numHeadsV, sumSeqLensV));
-        Tensor gVQuant = make_tensor(reinterpret_cast<ElementQuantizedV*>(ptrVQuant),
-            make_shape(VL{}, Int<threadsPerHead>{}, numHeadsV, sumSeqLensV));
-        Tensor gVScale = make_tensor(ptrVScale, make_shape(VL{}, Int<threadsPerHead>{}, numHeadsV));
-
-        // Register buffers
-        Tensor rV = make_tensor<Element>(Shape<VL>{});
-        Tensor rVMax = make_tensor<Element>(Shape<VL>{});
-        Tensor rVQuant = make_tensor<ElementQuantizedV>(Shape<VL>{});
-        Tensor rVScale = make_tensor<float>(Shape<VL>{});
-        Tensor rVCompute = make_tensor<float>(Shape<VL>{});
-
-        // Compute tensors
-        Tensor rV_x2 = recast<Array<Element, 2>>(rV);
-        Tensor rVMax_x2 = recast<Array<Element, 2>>(rVMax);
-        Tensor rVScale_x2 = recast<Array<float, 2>>(rVScale);
-        Tensor rVCompute_x2 = recast<Array<float, 2>>(rVCompute);
-
-        // Conversion tensors
-        Tensor rVCompute_x4 = recast<Array<float, 4>>(rVCompute);
-        Tensor rVQuant_x4 = recast<Array<ElementQuantizedV, 4>>(rVQuant);
-
-        // If the parallel on-going task is handling Q, numHeads inferred from gridDim.y could be larger than numHeadsKv
-        if (headIdx < numHeadsV)
-        {
-            // Thread coordinates
-            int const numToksPerWarp = 32 / threadsPerHead;
-            int tokIdx = warpId * numToksPerWarp + thrId / threadsPerHead;
-            int const threadInTokIdx = thrId % threadsPerHead;
-
-            // Thread-local tensors
-            Tensor gVSeq = gV(_, threadInTokIdx, headIdx, _);
-            Tensor gVSeqQuant = gVQuant(_, threadInTokIdx, headIdx, _);
-            Tensor gVSeqScale = gVScale(_, threadInTokIdx, headIdx);
-
-            if constexpr (VStage == 1)
-            {
-                // Stage 1: reduction to obtain the Sfs
-
-                // Avoid heavy atomics: limit the number of warps.
-                int const numWarpsToUse = cutlass::fast_min(numWarps, 256);
-                int const numToksPerWave = numWarpsToUse * numToksPerWarp;
-                if (warpId >= numWarpsToUse)
-                {
-                    return;
-                }
-
-                // Initialize
-                CUTLASS_PRAGMA_UNROLL
-                for (int i = 0; i < size(rVScale); ++i)
-                {
-                    rVScale(i) = 1e-3f;
-                }
-                cute::transform(rVScale_x2, rVMax_x2, cutlass::NumericArrayConverter<Element, float, 2>::convert);
-
-                // Loop over all tokens
-                for (; tokIdx < sumSeqLensV; tokIdx += numToksPerWave)
-                {
-                    // Load inputs
-                    cute::copy(AutoVectorizingCopy{}, gVSeq(_, tokIdx), rV);
-                    // Compute abs-max
-                    cute::transform(rV_x2, rV_x2, cutlass::absolute_value_op<Array<Element, 2>>{});
-                    cute::transform(rV_x2, rVMax_x2, rVMax_x2, cutlass::maximum<Array<Element, 2>>{});
-                }
-
-                // Transform max to Sfs
-                cute::transform(rVMax_x2, rVScale_x2, cutlass::NumericArrayConverter<float, Element, 2>::convert);
-                cute::transform(rVScale_x2, rVScale_x2, cutlass::scale<Array<float, 2>>{1 / 448.0f});
-
-                // Intra-warp reduction.
-                for (int delta = threadsPerHead; delta < 32; delta <<= 1)
-                {
-                    cute::transform(rVScale, rVScale,
-                        [&](auto const& x) { return ::fmaxf(x, __shfl_xor_sync(0xffffffffu, x, delta)); });
-                }
-
-                // Atomic reduction into global memory.
-                if (threadInTokIdx == thrId)
-                {
-                    CUTLASS_PRAGMA_UNROLL
-                    for (int i = 0; i < BestVL; ++i)
-                    {
-                        atomicMax(
-                            reinterpret_cast<int32_t*>(&gVSeqScale(i)), *reinterpret_cast<int32_t const*>(&rVScale(i)));
-                    }
-                }
-            }
-            else if constexpr (VStage == 2)
-            {
-                // Stage 2: scale according to the Sfs
-
-                // Full waves.
-                int const numToksPerWave = numWarps * numToksPerWarp;
-
-                // Load Sfs
-                cute::copy(AutoVectorizingCopy{}, gVSeqScale, rVScale);
-                // Take reciprocal
-                cute::transform(rVScale_x2, rVScale_x2, cutlass::reciprocal_approximate<Array<float, 2>>{});
-
-                // Loop over all tokens
-                for (; tokIdx < sumSeqLensV; tokIdx += numToksPerWave)
-                {
-                    // Load inputs
-                    cute::copy(AutoVectorizingCopy{}, gVSeq(_, tokIdx), rV);
-                    // Convert up
-                    cute::transform(rV_x2, rVCompute_x2, cutlass::NumericArrayConverter<float, Element, 2>::convert);
-                    // Scale
-                    cute::transform(rVCompute_x2, rVScale_x2, rVCompute_x2, cutlass::multiplies<Array<float, 2>>{});
-                    // Convert (quantize)
-                    cute::transform(
-                        rVCompute_x4, rVQuant_x4, cutlass::NumericArrayConverter<ElementQuantizedV, float, 4>::convert);
-                    // Write output
-                    cute::copy(AutoVectorizingCopy{}, rVQuant, gVSeqQuant(_, tokIdx));
-                }
-            }
-        }
-    }
-}
-
-template <typename Element>
-void invokeSageQuantQkvImpl(SageQuantParams const& params)
-{
-    using namespace cute;
-    TLLM_CHECK_WITH_INFO(params.sumSeqLensQk > 0 && params.numHeads > 0 && params.headDim > 0
-            && params.tokenBlockSize > 0 && params.ptrQk != nullptr && params.ptrQkQuant != nullptr
-            && params.ptrQkScale != nullptr && params.smCount > 0,
-        "Invalid SageQuantQk parameters.");
-    TLLM_CHECK_WITH_INFO(params.vStage == 0
-            || (params.sumSeqLensV > 0 && params.numHeadsV > 0 && params.ptrV != nullptr && params.ptrVQuant != nullptr
-                && params.ptrVScale != nullptr),
-        "Invalid SageQuantV parameters.");
-    TLLM_CHECK_WITH_INFO(!params.kSmooth, "SageQuantQk K-smoothing is not supported yet.");
-
-    auto invokeKernel = [&](auto headDimStatic, auto tokenBlockSizeStatic)
-    {
-        constexpr int HeadDim_ = headDimStatic;
-        constexpr int TokenBlockSize_ = tokenBlockSizeStatic;
-
-        SageQuantParams kernelParams = params;
-        void* kernelArgs[] = {&kernelParams.sumSeqLensQk, &kernelParams.ptrQk, &kernelParams.ptrQkQuant,
-            &kernelParams.ptrQkScale, &kernelParams.ptrKMean, &kernelParams.sumSeqLensV, &kernelParams.numHeadsV,
-            &kernelParams.ptrV, &kernelParams.ptrVQuant, &kernelParams.ptrVScale};
-
-        auto launchWithVStage = [&](auto vStageStatic)
-        {
-            constexpr int VStage_ = vStageStatic;
-            void const* kernelFunc = nullptr;
-            if (params.quantType == kernels::DATA_TYPE_E4M3)
-            {
-#ifdef ENABLE_FP8
-                kernelFunc = reinterpret_cast<void const*>(
-                    sageQuantQkvKernel<Element, cutlass::float_e4m3_t, TokenBlockSize_, HeadDim_, false, VStage_>);
-#else
-                TLLM_THROW("SageQuantQk FP8 quantization requires ENABLE_FP8.");
-#endif
-            }
-            else if (params.quantType == kernels::DATA_TYPE_INT8)
-            {
-                kernelFunc = reinterpret_cast<void const*>(
-                    sageQuantQkvKernel<Element, std::int8_t, TokenBlockSize_, HeadDim_, false, VStage_>);
-            }
-            else
-            {
-                TLLM_THROW("Unsupported SageQuantQk quantType: %d.", static_cast<int>(params.quantType));
-            }
-
-            uint32_t const gridX = static_cast<uint32_t>(std::max(1, (params.smCount * 32) / params.numHeads));
-            uint32_t const gridY = static_cast<uint32_t>(params.numHeads);
-            uint32_t const gridZ = VStage_ > 0 ? 2U : 1U;
-            dim3 const launchGrid{gridX, gridY, gridZ};
-            check_cuda_error(cudaLaunchKernel(kernelFunc, launchGrid, dim3{64U, 1U, 1U}, kernelArgs, 0, params.stream));
-            check_cuda_error(cudaPeekAtLastError());
-        };
-
-        switch (params.vStage)
-        {
-        case 0: launchWithVStage(Int<0>{}); return;
-        case 1: launchWithVStage(Int<1>{}); return;
-        case 2: launchWithVStage(Int<2>{}); return;
-        default: TLLM_THROW("Unsupported SageQuantV stage: %d.", params.vStage);
-        }
-    };
-
-    // Dispatch
-    if (params.headDim == 64)
-    {
-        switch (params.tokenBlockSize)
-        {
-        case 1: invokeKernel(Int<64>{}, Int<1>{}); return;
-        case 4: invokeKernel(Int<64>{}, Int<4>{}); return;
-        case 16: invokeKernel(Int<64>{}, Int<16>{}); return;
-        default: break;
-        }
-    }
-    if (params.headDim == 128)
-    {
-        switch (params.tokenBlockSize)
-        {
-        case 1: invokeKernel(Int<128>{}, Int<1>{}); return;
-        case 4: invokeKernel(Int<128>{}, Int<4>{}); return;
-        case 16: invokeKernel(Int<128>{}, Int<16>{}); return;
-        default: break;
-        }
-    }
-    if (params.headDim == 256)
-    {
-        switch (params.tokenBlockSize)
-        {
-        case 1: invokeKernel(Int<256>{}, Int<1>{}); return;
-        case 4: invokeKernel(Int<256>{}, Int<4>{}); return;
-        case 16: invokeKernel(Int<256>{}, Int<16>{}); return;
-        default: break;
-        }
-    }
-    TLLM_THROW(
-        "Unsupported SageQuantQk dispatch config: headDim=%d tokenBlockSize=%d", params.headDim, params.tokenBlockSize);
-}
-
-void invokeSageQuant(SageQuantParams const& params)
-{
-    if (params.inputType == kernels::DATA_TYPE_FP16)
-    {
-        invokeSageQuantQkvImpl<cutlass::half_t>(params);
-        return;
-    }
-#ifdef ENABLE_BF16
-    if (params.inputType == kernels::DATA_TYPE_BF16)
-    {
-        invokeSageQuantQkvImpl<cutlass::bfloat16_t>(params);
-        return;
-    }
-#endif
-    TLLM_THROW("Unsupported SageQuantQk inputType: %d", static_cast<int>(params.inputType));
-}
-
-} // namespace tensorrt_llm::common
diff --git a/cpp/tensorrt_llm/common/sageQuant.h b/cpp/tensorrt_llm/common/sageQuant.h
deleted file mode 100644
index 9b03c9d16b39..000000000000
--- a/cpp/tensorrt_llm/common/sageQuant.h
+++ /dev/null
@@ -1,60 +0,0 @@
-/*
- * SPDX-FileCopyrightText: Copyright (c) 1993-2026 NVIDIA CORPORATION &
- * AFFILIATES. All rights reserved. SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#pragma once
-
-#include "tensorrt_llm/common/cudaBf16Wrapper.h"
-#include "tensorrt_llm/kernels/multiHeadAttentionCommon.h"
-#include <cuda.h>
-#include <cuda_runtime.h>
-#ifdef ENABLE_FP8
-#include <cuda_fp8.h>
-#endif
-
-namespace tensorrt_llm::common
-{
-
-struct SageQuantParams
-{
-    // Required arguments for SageQuantQk (Q or K):
-    int sumSeqLensQk{};
-    int numHeads{};
-    int headDim{};
-    int tokenBlockSize{};
-    bool kSmooth{false};
-    void const* ptrQk{nullptr};
-    void* ptrQkQuant{nullptr};
-    kernels::Data_type inputType{kernels::DATA_TYPE_FP16};
-    kernels::Data_type quantType{kernels::DATA_TYPE_E4M3};
-    float* ptrQkScale{nullptr};
-    float* ptrKMean{nullptr};
-    // Optional arguments for SageQuantV:
-    // vStage: 0: disabled, 1: collect scales, 2: quantize
-    int vStage{};
-    int sumSeqLensV{};
-    int numHeadsV{};
-    void const* ptrV{nullptr};
-    void* ptrVQuant{nullptr};
-    float* ptrVScale{nullptr};
-    // Hardware into. Required.
-    int smCount{};
-    cudaStream_t stream{};
-};
-
-void invokeSageQuant(SageQuantParams const& params);
-
-} // namespace tensorrt_llm::common
diff --git a/cpp/tensorrt_llm/kernels/contextFusedMultiHeadAttention/fused_multihead_attention_common.h b/cpp/tensorrt_llm/kernels/contextFusedMultiHeadAttention/fused_multihead_attention_common.h
index 0875ba0740ae..f129a973ac45 100644
--- a/cpp/tensorrt_llm/kernels/contextFusedMultiHeadAttention/fused_multihead_attention_common.h
+++ b/cpp/tensorrt_llm/kernels/contextFusedMultiHeadAttention/fused_multihead_attention_common.h
@@ -143,8 +143,6 @@ struct MHARunnerFixedParams
     int sageBlockSizeK = 0;
     // v tensor quant block size in sage attention
     int sageBlockSizeV = 0;
-    // Reinterpret data type for Q/K input in TRTLLM-GEN sage attention.
-    Data_type dataTypeQkReinterpret = DATA_TYPE_E4M3;
     // Use sparse MLA ?
     bool useSparseMLA = false;
 
@@ -197,7 +195,6 @@ struct MHARunnerFixedParams
         output += ", sageBlockSizeQ = " + std::to_string(sageBlockSizeQ);
         output += ", sageBlockSizeK = " + std::to_string(sageBlockSizeK);
         output += ", sageBlockSizeV = " + std::to_string(sageBlockSizeV);
-        output += ", dataTypeQkReinterpret = " + data_type_to_string(dataTypeQkReinterpret);
 
         return output;
     }
diff --git a/cpp/tensorrt_llm/kernels/fmhaDispatcher.cpp b/cpp/tensorrt_llm/kernels/fmhaDispatcher.cpp
index bcb8bffbc116..68e3e4d60040 100644
--- a/cpp/tensorrt_llm/kernels/fmhaDispatcher.cpp
+++ b/cpp/tensorrt_llm/kernels/fmhaDispatcher.cpp
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2020-2026, NVIDIA CORPORATION.  All rights reserved.
+ * Copyright (c) 2020-2024, NVIDIA CORPORATION.  All rights reserved.
  *
  * Licensed under the Apache License, Version 2.0 (the "License");
  * you may not use this file except in compliance with the License.
@@ -56,9 +56,8 @@ FmhaDispatcher::FmhaDispatcher(MHARunnerFixedParams fixedParams)
 {
     if (mUseTllmGen)
     {
-        mTllmGenFMHARunner.reset(new TllmGenFmhaRunner(mFixedParams.dataType, mFixedParams.dataTypeKv,
-            mFixedParams.dataTypeOut, 1, mFixedParams.sageBlockSizeQ, mFixedParams.sageBlockSizeK, 0,
-            mFixedParams.sageBlockSizeV, mFixedParams.dataTypeQkReinterpret));
+        mTllmGenFMHARunner.reset(
+            new TllmGenFmhaRunner(mFixedParams.dataType, mFixedParams.dataTypeKv, mFixedParams.dataTypeOut));
         if (!isSupported())
         {
             TLLM_LOG_WARNING("TRTLLM-GEN does not support the requested kernels.");
@@ -227,30 +226,10 @@ void FmhaDispatcher::run(MHARunnerParams runnerParams)
         // Set it to INT_MAX as the kv cache pageOffsets will ensure that there is no out-of-bounds access.
         tllmRunnerParams.mNumPagesInMemPool = INT_MAX;
         tllmRunnerParams.mSfStartTokenIdx = 0;
-        // SageAttention scaling factors.
-        tllmRunnerParams.sageAttnSfsQPtr = runnerParams.qScalePtr;
-        tllmRunnerParams.sageAttnSfsKPtr = runnerParams.kScalePtr;
-        tllmRunnerParams.sageAttnSfsPPtr = nullptr;
-        tllmRunnerParams.sageAttnSfsVPtr = runnerParams.vScalePtr;
         // For mla chunked prefill
         tllmRunnerParams.softmaxStatsPtr = reinterpret_cast<float2*>(runnerParams.softmaxStatsPtr);
         // For skip softmax
         tllmRunnerParams.mSkipSoftmaxThresholdScaleFactor = runnerParams.skipSoftmaxThresholdScaleFactor;
-
-        auto const computeLog2BlockSize = [](int blockSize) -> int
-        {
-            if (blockSize <= 0)
-            {
-                return 0;
-            }
-            TLLM_CHECK_WITH_INFO((blockSize & (blockSize - 1)) == 0, "SageAttn block size must be a power of 2.");
-            return __builtin_ctz(static_cast<unsigned int>(blockSize));
-        };
-        tllmRunnerParams.mLogNumEltsPerSageAttnBlkQ = computeLog2BlockSize(mFixedParams.sageBlockSizeQ);
-        tllmRunnerParams.mLogNumEltsPerSageAttnBlkK = computeLog2BlockSize(mFixedParams.sageBlockSizeK);
-        tllmRunnerParams.mLogNumEltsPerSageAttnBlkP = 0;
-        tllmRunnerParams.mLogNumEltsPerSageAttnBlkV = computeLog2BlockSize(mFixedParams.sageBlockSizeV);
-
         tllmRunnerParams.stream = runnerParams.stream;
         // Set the sparse attention parameters if sparseMLA is used.
         if (mFixedParams.useSparseMLA)
diff --git a/cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin_visual_gen/FmhaSm100aKernel_QkInt8VE4m3OBfloat16HQk128HV128SeparateQkvDenseVarSeqQ128Kv128PersistentContext_cubin.cpp b/cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin_visual_gen/FmhaSm100aKernel_QkInt8VE4m3OBfloat16HQk128HV128SeparateQkvDenseVarSeqQ128Kv128PersistentContext_cubin.cpp
deleted file mode 100644
index f2e1e846a523..000000000000
--- a/cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin_visual_gen/FmhaSm100aKernel_QkInt8VE4m3OBfloat16HQk128HV128SeparateQkvDenseVarSeqQ128Kv128PersistentContext_cubin.cpp
+++ /dev/null
@@ -1,3 +0,0 @@
-version https://git-lfs.github.com/spec/v1
-oid sha256:54cb32151ded046f59121c181f4cba659a5748159174c7a74c354c33c73c01e9
-size 720445
diff --git a/cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin_visual_gen/FmhaSm100aKernel_QkInt8VE4m3OBfloat16HQk128HV128SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK16SageV1PersistentContext_cubin.cpp b/cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin_visual_gen/FmhaSm100aKernel_QkInt8VE4m3OBfloat16HQk128HV128SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK16SageV1PersistentContext_cubin.cpp
deleted file mode 100644
index 2d074d921a15..000000000000
--- a/cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin_visual_gen/FmhaSm100aKernel_QkInt8VE4m3OBfloat16HQk128HV128SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK16SageV1PersistentContext_cubin.cpp
+++ /dev/null
@@ -1,3 +0,0 @@
-version https://git-lfs.github.com/spec/v1
-oid sha256:921cfc731062faae73afc3a2e4a16fb1201209636da6df6c92643b14b683f53a
-size 770013
diff --git a/cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin_visual_gen/FmhaSm100aKernel_QkInt8VE4m3OBfloat16HQk128HV128SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK16SageV1StaticContext_cubin.cpp b/cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin_visual_gen/FmhaSm100aKernel_QkInt8VE4m3OBfloat16HQk128HV128SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK16SageV1StaticContext_cubin.cpp
deleted file mode 100644
index 063fbeb4c15a..000000000000
--- a/cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin_visual_gen/FmhaSm100aKernel_QkInt8VE4m3OBfloat16HQk128HV128SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK16SageV1StaticContext_cubin.cpp
+++ /dev/null
@@ -1,3 +0,0 @@
-version https://git-lfs.github.com/spec/v1
-oid sha256:b4bcdb3f8a9fe7cadfc7cbb5552950bd7ce09c4433fe270d39cadaf28d61541d
-size 681601
diff --git a/cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin_visual_gen/FmhaSm100aKernel_QkInt8VE4m3OBfloat16HQk128HV128SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK1SageV1PersistentContext_cubin.cpp b/cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin_visual_gen/FmhaSm100aKernel_QkInt8VE4m3OBfloat16HQk128HV128SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK1SageV1PersistentContext_cubin.cpp
deleted file mode 100644
index b49a1fc162fa..000000000000
--- a/cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin_visual_gen/FmhaSm100aKernel_QkInt8VE4m3OBfloat16HQk128HV128SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK1SageV1PersistentContext_cubin.cpp
+++ /dev/null
@@ -1,3 +0,0 @@
-version https://git-lfs.github.com/spec/v1
-oid sha256:db7dee825ea521967fecaaed247249617a8045e0a6449d9370c1cf4e6071b005
-size 837993
diff --git a/cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin_visual_gen/FmhaSm100aKernel_QkInt8VE4m3OBfloat16HQk128HV128SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK1SageV1StaticContext_cubin.cpp b/cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin_visual_gen/FmhaSm100aKernel_QkInt8VE4m3OBfloat16HQk128HV128SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK1SageV1StaticContext_cubin.cpp
deleted file mode 100644
index 458495d218bc..000000000000
--- a/cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin_visual_gen/FmhaSm100aKernel_QkInt8VE4m3OBfloat16HQk128HV128SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK1SageV1StaticContext_cubin.cpp
+++ /dev/null
@@ -1,3 +0,0 @@
-version https://git-lfs.github.com/spec/v1
-oid sha256:a2d2afd172793d7b79162a38de0cc3480466d9f6572d9bf2ceaf26f6e9b21f33
-size 745387
diff --git a/cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin_visual_gen/FmhaSm100aKernel_QkInt8VE4m3OBfloat16HQk128HV128SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK4SageV1PersistentContext_cubin.cpp b/cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin_visual_gen/FmhaSm100aKernel_QkInt8VE4m3OBfloat16HQk128HV128SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK4SageV1PersistentContext_cubin.cpp
deleted file mode 100644
index eebd09a538a7..000000000000
--- a/cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin_visual_gen/FmhaSm100aKernel_QkInt8VE4m3OBfloat16HQk128HV128SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK4SageV1PersistentContext_cubin.cpp
+++ /dev/null
@@ -1,3 +0,0 @@
-version https://git-lfs.github.com/spec/v1
-oid sha256:9e78c74f99a1b86c8ca82a8202750fd2b4503243617330c495e3f6fafdee7992
-size 782443
diff --git a/cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin_visual_gen/FmhaSm100aKernel_QkInt8VE4m3OBfloat16HQk128HV128SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK4SageV1StaticContext_cubin.cpp b/cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin_visual_gen/FmhaSm100aKernel_QkInt8VE4m3OBfloat16HQk128HV128SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK4SageV1StaticContext_cubin.cpp
deleted file mode 100644
index 2cd6d735104a..000000000000
--- a/cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin_visual_gen/FmhaSm100aKernel_QkInt8VE4m3OBfloat16HQk128HV128SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK4SageV1StaticContext_cubin.cpp
+++ /dev/null
@@ -1,3 +0,0 @@
-version https://git-lfs.github.com/spec/v1
-oid sha256:34ed87a227f212d05e7e4cd4855948bd3ca08e90631aa52e38c9ecf9af4b2d3e
-size 692057
diff --git a/cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin_visual_gen/FmhaSm100aKernel_QkInt8VE4m3OBfloat16HQk128HV128SeparateQkvDenseVarSeqQ128Kv128StaticContext_cubin.cpp b/cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin_visual_gen/FmhaSm100aKernel_QkInt8VE4m3OBfloat16HQk128HV128SeparateQkvDenseVarSeqQ128Kv128StaticContext_cubin.cpp
deleted file mode 100644
index 2657dafb93a9..000000000000
--- a/cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin_visual_gen/FmhaSm100aKernel_QkInt8VE4m3OBfloat16HQk128HV128SeparateQkvDenseVarSeqQ128Kv128StaticContext_cubin.cpp
+++ /dev/null
@@ -1,3 +0,0 @@
-version https://git-lfs.github.com/spec/v1
-oid sha256:dfd73e461a0054d4764f7b6b3d9bf97076023390f86ee0bfdf4e21b67b06a408
-size 634745
diff --git a/cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin_visual_gen/FmhaSm100aKernel_QkInt8VE4m3OBfloat16HQk256HV128SeparateQkvDenseVarSeqQ128Kv128PersistentContext_cubin.cpp b/cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin_visual_gen/FmhaSm100aKernel_QkInt8VE4m3OBfloat16HQk256HV128SeparateQkvDenseVarSeqQ128Kv128PersistentContext_cubin.cpp
deleted file mode 100644
index f5981c227e96..000000000000
--- a/cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin_visual_gen/FmhaSm100aKernel_QkInt8VE4m3OBfloat16HQk256HV128SeparateQkvDenseVarSeqQ128Kv128PersistentContext_cubin.cpp
+++ /dev/null
@@ -1,3 +0,0 @@
-version https://git-lfs.github.com/spec/v1
-oid sha256:d78a952f3e0f8bd6f1e3863310f83cfe6493311481bc11ef8d42ffd263e8800e
-size 754239
diff --git a/cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin_visual_gen/FmhaSm100aKernel_QkInt8VE4m3OBfloat16HQk256HV128SeparateQkvDenseVarSeqQ128Kv128StaticContext_cubin.cpp b/cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin_visual_gen/FmhaSm100aKernel_QkInt8VE4m3OBfloat16HQk256HV128SeparateQkvDenseVarSeqQ128Kv128StaticContext_cubin.cpp
deleted file mode 100644
index 71b54625fb59..000000000000
--- a/cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin_visual_gen/FmhaSm100aKernel_QkInt8VE4m3OBfloat16HQk256HV128SeparateQkvDenseVarSeqQ128Kv128StaticContext_cubin.cpp
+++ /dev/null
@@ -1,3 +0,0 @@
-version https://git-lfs.github.com/spec/v1
-oid sha256:297ad7b5babeb2fddaf786daff94f0f39b26faf1f7920835168124259e13f9a4
-size 669525
diff --git a/cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin_visual_gen/FmhaSm100aKernel_QkInt8VE4m3OBfloat16HQk256HV256SeparateQkvDenseVarSeqQ128Kv128PersistentContext_cubin.cpp b/cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin_visual_gen/FmhaSm100aKernel_QkInt8VE4m3OBfloat16HQk256HV256SeparateQkvDenseVarSeqQ128Kv128PersistentContext_cubin.cpp
deleted file mode 100644
index cf96936f7a2a..000000000000
--- a/cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin_visual_gen/FmhaSm100aKernel_QkInt8VE4m3OBfloat16HQk256HV256SeparateQkvDenseVarSeqQ128Kv128PersistentContext_cubin.cpp
+++ /dev/null
@@ -1,3 +0,0 @@
-version https://git-lfs.github.com/spec/v1
-oid sha256:d6a6cb610f0dadb319c26d97e45fdfc81bc8480d27d2fcfa092cffb4d5620e8f
-size 692127
diff --git a/cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin_visual_gen/FmhaSm100aKernel_QkInt8VE4m3OBfloat16HQk256HV256SeparateQkvDenseVarSeqQ128Kv128StaticContext_cubin.cpp b/cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin_visual_gen/FmhaSm100aKernel_QkInt8VE4m3OBfloat16HQk256HV256SeparateQkvDenseVarSeqQ128Kv128StaticContext_cubin.cpp
deleted file mode 100644
index 190804bfd461..000000000000
--- a/cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin_visual_gen/FmhaSm100aKernel_QkInt8VE4m3OBfloat16HQk256HV256SeparateQkvDenseVarSeqQ128Kv128StaticContext_cubin.cpp
+++ /dev/null
@@ -1,3 +0,0 @@
-version https://git-lfs.github.com/spec/v1
-oid sha256:ad6edaf4042b441eeda1cc69a486d9afacbc9cf03a0a7f6672dc1bd51cc81305
-size 604946
diff --git a/cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin_visual_gen/FmhaSm100aKernel_QkInt8VE4m3OBfloat16HQk64HV64SeparateQkvDenseVarSeqQ128Kv128PersistentContext_cubin.cpp b/cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin_visual_gen/FmhaSm100aKernel_QkInt8VE4m3OBfloat16HQk64HV64SeparateQkvDenseVarSeqQ128Kv128PersistentContext_cubin.cpp
deleted file mode 100644
index 8ae6473d81cf..000000000000
--- a/cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin_visual_gen/FmhaSm100aKernel_QkInt8VE4m3OBfloat16HQk64HV64SeparateQkvDenseVarSeqQ128Kv128PersistentContext_cubin.cpp
+++ /dev/null
@@ -1,3 +0,0 @@
-version https://git-lfs.github.com/spec/v1
-oid sha256:0defb2c3089e0867d8e80a549ce9e8ce9ef8b2c516253efa4f55a6994dabfc63
-size 703075
diff --git a/cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin_visual_gen/FmhaSm100aKernel_QkInt8VE4m3OBfloat16HQk64HV64SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK16SageV1PersistentContext_cubin.cpp b/cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin_visual_gen/FmhaSm100aKernel_QkInt8VE4m3OBfloat16HQk64HV64SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK16SageV1PersistentContext_cubin.cpp
deleted file mode 100644
index 82d28ebaac65..000000000000
--- a/cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin_visual_gen/FmhaSm100aKernel_QkInt8VE4m3OBfloat16HQk64HV64SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK16SageV1PersistentContext_cubin.cpp
+++ /dev/null
@@ -1,3 +0,0 @@
-version https://git-lfs.github.com/spec/v1
-oid sha256:2f7951186ae63aa64cb5951cb9b6b60245a641dbf31145ddb5ffd7a66e12a102
-size 772723
diff --git a/cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin_visual_gen/FmhaSm100aKernel_QkInt8VE4m3OBfloat16HQk64HV64SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK16SageV1StaticContext_cubin.cpp b/cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin_visual_gen/FmhaSm100aKernel_QkInt8VE4m3OBfloat16HQk64HV64SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK16SageV1StaticContext_cubin.cpp
deleted file mode 100644
index 52224791479b..000000000000
--- a/cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin_visual_gen/FmhaSm100aKernel_QkInt8VE4m3OBfloat16HQk64HV64SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK16SageV1StaticContext_cubin.cpp
+++ /dev/null
@@ -1,3 +0,0 @@
-version https://git-lfs.github.com/spec/v1
-oid sha256:ddecaf6286f3fe22080091a14b4a159a70f7a12274bf186050e80242241c9ba2
-size 661321
diff --git a/cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin_visual_gen/FmhaSm100aKernel_QkInt8VE4m3OBfloat16HQk64HV64SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK1SageV1PersistentContext_cubin.cpp b/cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin_visual_gen/FmhaSm100aKernel_QkInt8VE4m3OBfloat16HQk64HV64SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK1SageV1PersistentContext_cubin.cpp
deleted file mode 100644
index e2b70c6007cd..000000000000
--- a/cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin_visual_gen/FmhaSm100aKernel_QkInt8VE4m3OBfloat16HQk64HV64SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK1SageV1PersistentContext_cubin.cpp
+++ /dev/null
@@ -1,3 +0,0 @@
-version https://git-lfs.github.com/spec/v1
-oid sha256:2247b98e99e59c229b4a62f96ab192d3f17605245961f62978f076569585e55b
-size 833303
diff --git a/cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin_visual_gen/FmhaSm100aKernel_QkInt8VE4m3OBfloat16HQk64HV64SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK1SageV1StaticContext_cubin.cpp b/cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin_visual_gen/FmhaSm100aKernel_QkInt8VE4m3OBfloat16HQk64HV64SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK1SageV1StaticContext_cubin.cpp
deleted file mode 100644
index a4ae2f7a5f37..000000000000
--- a/cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin_visual_gen/FmhaSm100aKernel_QkInt8VE4m3OBfloat16HQk64HV64SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK1SageV1StaticContext_cubin.cpp
+++ /dev/null
@@ -1,3 +0,0 @@
-version https://git-lfs.github.com/spec/v1
-oid sha256:e44303cc96c9077228debdecc7be1fda22db7475eda4b6ea91107bec5c4b0632
-size 704139
diff --git a/cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin_visual_gen/FmhaSm100aKernel_QkInt8VE4m3OBfloat16HQk64HV64SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK4SageV1PersistentContext_cubin.cpp b/cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin_visual_gen/FmhaSm100aKernel_QkInt8VE4m3OBfloat16HQk64HV64SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK4SageV1PersistentContext_cubin.cpp
deleted file mode 100644
index f80213855d3c..000000000000
--- a/cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin_visual_gen/FmhaSm100aKernel_QkInt8VE4m3OBfloat16HQk64HV64SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK4SageV1PersistentContext_cubin.cpp
+++ /dev/null
@@ -1,3 +0,0 @@
-version https://git-lfs.github.com/spec/v1
-oid sha256:a5c060dc4566909144a91bf2f26da356c80a8841e2d875f17bcf601f8b97749d
-size 790727
diff --git a/cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin_visual_gen/FmhaSm100aKernel_QkInt8VE4m3OBfloat16HQk64HV64SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK4SageV1StaticContext_cubin.cpp b/cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin_visual_gen/FmhaSm100aKernel_QkInt8VE4m3OBfloat16HQk64HV64SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK4SageV1StaticContext_cubin.cpp
deleted file mode 100644
index df30e26b6412..000000000000
--- a/cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin_visual_gen/FmhaSm100aKernel_QkInt8VE4m3OBfloat16HQk64HV64SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK4SageV1StaticContext_cubin.cpp
+++ /dev/null
@@ -1,3 +0,0 @@
-version https://git-lfs.github.com/spec/v1
-oid sha256:84e599cb205ed258b3c0bca0878f133e60082f858e23f4df3638d88e4d19576d
-size 672567
diff --git a/cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin_visual_gen/FmhaSm100aKernel_QkInt8VE4m3OBfloat16HQk64HV64SeparateQkvDenseVarSeqQ128Kv128StaticContext_cubin.cpp b/cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin_visual_gen/FmhaSm100aKernel_QkInt8VE4m3OBfloat16HQk64HV64SeparateQkvDenseVarSeqQ128Kv128StaticContext_cubin.cpp
deleted file mode 100644
index d14d9dfe8aac..000000000000
--- a/cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin_visual_gen/FmhaSm100aKernel_QkInt8VE4m3OBfloat16HQk64HV64SeparateQkvDenseVarSeqQ128Kv128StaticContext_cubin.cpp
+++ /dev/null
@@ -1,3 +0,0 @@
-version https://git-lfs.github.com/spec/v1
-oid sha256:311679398f36a4a60c5a14eee4eb50115492adda84e1b3d0ac5c951b66e84a9c
-size 617226
diff --git a/cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin_visual_gen/FmhaSm100aKernel_QkInt8VE4m3OE4m3HQk128HV128SeparateQkvDenseVarSeqQ128Kv128PersistentContext_cubin.cpp b/cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin_visual_gen/FmhaSm100aKernel_QkInt8VE4m3OE4m3HQk128HV128SeparateQkvDenseVarSeqQ128Kv128PersistentContext_cubin.cpp
deleted file mode 100644
index 6b1e2edcf9fc..000000000000
--- a/cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin_visual_gen/FmhaSm100aKernel_QkInt8VE4m3OE4m3HQk128HV128SeparateQkvDenseVarSeqQ128Kv128PersistentContext_cubin.cpp
+++ /dev/null
@@ -1,3 +0,0 @@
-version https://git-lfs.github.com/spec/v1
-oid sha256:cb48630c404f7a7f575bd55b0c1bd71c86c7be62f6344da424fe96663b89ec59
-size 748163
diff --git a/cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin_visual_gen/FmhaSm100aKernel_QkInt8VE4m3OE4m3HQk128HV128SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK16SageV1PersistentContext_cubin.cpp b/cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin_visual_gen/FmhaSm100aKernel_QkInt8VE4m3OE4m3HQk128HV128SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK16SageV1PersistentContext_cubin.cpp
deleted file mode 100644
index 48d9fab6b35b..000000000000
--- a/cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin_visual_gen/FmhaSm100aKernel_QkInt8VE4m3OE4m3HQk128HV128SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK16SageV1PersistentContext_cubin.cpp
+++ /dev/null
@@ -1,3 +0,0 @@
-version https://git-lfs.github.com/spec/v1
-oid sha256:156dc4fe0fab3d628a6c79f08dc6b2563fb852e674feae281d1bed5aeeeaaf5e
-size 843857
diff --git a/cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin_visual_gen/FmhaSm100aKernel_QkInt8VE4m3OE4m3HQk128HV128SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK16SageV1StaticContext_cubin.cpp b/cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin_visual_gen/FmhaSm100aKernel_QkInt8VE4m3OE4m3HQk128HV128SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK16SageV1StaticContext_cubin.cpp
deleted file mode 100644
index 156632dbd203..000000000000
--- a/cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin_visual_gen/FmhaSm100aKernel_QkInt8VE4m3OE4m3HQk128HV128SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK16SageV1StaticContext_cubin.cpp
+++ /dev/null
@@ -1,3 +0,0 @@
-version https://git-lfs.github.com/spec/v1
-oid sha256:8ebb45311e3a00811dfd6b0479cc498d51e71d27881cce35191891e82aa521c6
-size 751597
diff --git a/cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin_visual_gen/FmhaSm100aKernel_QkInt8VE4m3OE4m3HQk128HV128SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK1SageV1PersistentContext_cubin.cpp b/cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin_visual_gen/FmhaSm100aKernel_QkInt8VE4m3OE4m3HQk128HV128SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK1SageV1PersistentContext_cubin.cpp
deleted file mode 100644
index 0afde369c8e8..000000000000
--- a/cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin_visual_gen/FmhaSm100aKernel_QkInt8VE4m3OE4m3HQk128HV128SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK1SageV1PersistentContext_cubin.cpp
+++ /dev/null
@@ -1,3 +0,0 @@
-version https://git-lfs.github.com/spec/v1
-oid sha256:c2bc97eeb999bed7a5566f10be970ff3979aca02b06d06429a74e12240d350b6
-size 905473
diff --git a/cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin_visual_gen/FmhaSm100aKernel_QkInt8VE4m3OE4m3HQk128HV128SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK1SageV1StaticContext_cubin.cpp b/cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin_visual_gen/FmhaSm100aKernel_QkInt8VE4m3OE4m3HQk128HV128SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK1SageV1StaticContext_cubin.cpp
deleted file mode 100644
index 9ad83b84fc06..000000000000
--- a/cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin_visual_gen/FmhaSm100aKernel_QkInt8VE4m3OE4m3HQk128HV128SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK1SageV1StaticContext_cubin.cpp
+++ /dev/null
@@ -1,3 +0,0 @@
-version https://git-lfs.github.com/spec/v1
-oid sha256:a7068747c001a063bd3e5e6770fc4db13715e7a800ff9fc7c36cc37dc7cae046
-size 816319
diff --git a/cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin_visual_gen/FmhaSm100aKernel_QkInt8VE4m3OE4m3HQk128HV128SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK4SageV1PersistentContext_cubin.cpp b/cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin_visual_gen/FmhaSm100aKernel_QkInt8VE4m3OE4m3HQk128HV128SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK4SageV1PersistentContext_cubin.cpp
deleted file mode 100644
index eef2f3262f5c..000000000000
--- a/cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin_visual_gen/FmhaSm100aKernel_QkInt8VE4m3OE4m3HQk128HV128SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK4SageV1PersistentContext_cubin.cpp
+++ /dev/null
@@ -1,3 +0,0 @@
-version https://git-lfs.github.com/spec/v1
-oid sha256:b7520143019f3a33808fdd5ea4482e22b19c776fb4e4354315a77d2b200cfafc
-size 856287
diff --git a/cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin_visual_gen/FmhaSm100aKernel_QkInt8VE4m3OE4m3HQk128HV128SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK4SageV1StaticContext_cubin.cpp b/cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin_visual_gen/FmhaSm100aKernel_QkInt8VE4m3OE4m3HQk128HV128SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK4SageV1StaticContext_cubin.cpp
deleted file mode 100644
index c273bbdfcc2a..000000000000
--- a/cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin_visual_gen/FmhaSm100aKernel_QkInt8VE4m3OE4m3HQk128HV128SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK4SageV1StaticContext_cubin.cpp
+++ /dev/null
@@ -1,3 +0,0 @@
-version https://git-lfs.github.com/spec/v1
-oid sha256:23e83775a77a07f4cdfbaca93410984c56d804277e423289776df667978ce1cc
-size 762003
diff --git a/cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin_visual_gen/FmhaSm100aKernel_QkInt8VE4m3OE4m3HQk128HV128SeparateQkvDenseVarSeqQ128Kv128StaticContext_cubin.cpp b/cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin_visual_gen/FmhaSm100aKernel_QkInt8VE4m3OE4m3HQk128HV128SeparateQkvDenseVarSeqQ128Kv128StaticContext_cubin.cpp
deleted file mode 100644
index b2765136476c..000000000000
--- a/cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin_visual_gen/FmhaSm100aKernel_QkInt8VE4m3OE4m3HQk128HV128SeparateQkvDenseVarSeqQ128Kv128StaticContext_cubin.cpp
+++ /dev/null
@@ -1,3 +0,0 @@
-version https://git-lfs.github.com/spec/v1
-oid sha256:eaed4d5cb015b18c60050356b9f8623327a8b91699c845af91635a428ef7ce8b
-size 660933
diff --git a/cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin_visual_gen/FmhaSm100aKernel_QkInt8VE4m3OE4m3HQk256HV128SeparateQkvDenseVarSeqQ128Kv128PersistentContext_cubin.cpp b/cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin_visual_gen/FmhaSm100aKernel_QkInt8VE4m3OE4m3HQk256HV128SeparateQkvDenseVarSeqQ128Kv128PersistentContext_cubin.cpp
deleted file mode 100644
index 1416b928f0c9..000000000000
--- a/cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin_visual_gen/FmhaSm100aKernel_QkInt8VE4m3OE4m3HQk256HV128SeparateQkvDenseVarSeqQ128Kv128PersistentContext_cubin.cpp
+++ /dev/null
@@ -1,3 +0,0 @@
-version https://git-lfs.github.com/spec/v1
-oid sha256:2b86ae14b41f37b1d5959297c6a7dc20c7844a876a32e47135d63627e1f0da36
-size 782005
diff --git a/cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin_visual_gen/FmhaSm100aKernel_QkInt8VE4m3OE4m3HQk256HV128SeparateQkvDenseVarSeqQ128Kv128StaticContext_cubin.cpp b/cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin_visual_gen/FmhaSm100aKernel_QkInt8VE4m3OE4m3HQk256HV128SeparateQkvDenseVarSeqQ128Kv128StaticContext_cubin.cpp
deleted file mode 100644
index f4111983fc45..000000000000
--- a/cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin_visual_gen/FmhaSm100aKernel_QkInt8VE4m3OE4m3HQk256HV128SeparateQkvDenseVarSeqQ128Kv128StaticContext_cubin.cpp
+++ /dev/null
@@ -1,3 +0,0 @@
-version https://git-lfs.github.com/spec/v1
-oid sha256:2b92088c2b55ec3878e5a9e64d253f7698ea61c310dd4b1ef9cd80b043efd8c5
-size 694923
diff --git a/cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin_visual_gen/FmhaSm100aKernel_QkInt8VE4m3OE4m3HQk256HV256SeparateQkvDenseVarSeqQ128Kv128PersistentContext_cubin.cpp b/cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin_visual_gen/FmhaSm100aKernel_QkInt8VE4m3OE4m3HQk256HV256SeparateQkvDenseVarSeqQ128Kv128PersistentContext_cubin.cpp
deleted file mode 100644
index 22538b914e58..000000000000
--- a/cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin_visual_gen/FmhaSm100aKernel_QkInt8VE4m3OE4m3HQk256HV256SeparateQkvDenseVarSeqQ128Kv128PersistentContext_cubin.cpp
+++ /dev/null
@@ -1,3 +0,0 @@
-version https://git-lfs.github.com/spec/v1
-oid sha256:46751a5bcda69c09a3e709a45b9c04cb2432e10d639929894ab56ae58d2ab2b0
-size 716243
diff --git a/cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin_visual_gen/FmhaSm100aKernel_QkInt8VE4m3OE4m3HQk256HV256SeparateQkvDenseVarSeqQ128Kv128StaticContext_cubin.cpp b/cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin_visual_gen/FmhaSm100aKernel_QkInt8VE4m3OE4m3HQk256HV256SeparateQkvDenseVarSeqQ128Kv128StaticContext_cubin.cpp
deleted file mode 100644
index d8efdfc1da0d..000000000000
--- a/cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin_visual_gen/FmhaSm100aKernel_QkInt8VE4m3OE4m3HQk256HV256SeparateQkvDenseVarSeqQ128Kv128StaticContext_cubin.cpp
+++ /dev/null
@@ -1,3 +0,0 @@
-version https://git-lfs.github.com/spec/v1
-oid sha256:9535f9bce640da25b597d9f6766b4c82d9651965f8a2e7f8b3ab102595e7fdf0
-size 626547
diff --git a/cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin_visual_gen/FmhaSm100aKernel_QkInt8VE4m3OE4m3HQk64HV64SeparateQkvDenseVarSeqQ128Kv128PersistentContext_cubin.cpp b/cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin_visual_gen/FmhaSm100aKernel_QkInt8VE4m3OE4m3HQk64HV64SeparateQkvDenseVarSeqQ128Kv128PersistentContext_cubin.cpp
deleted file mode 100644
index bc959af38432..000000000000
--- a/cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin_visual_gen/FmhaSm100aKernel_QkInt8VE4m3OE4m3HQk64HV64SeparateQkvDenseVarSeqQ128Kv128PersistentContext_cubin.cpp
+++ /dev/null
@@ -1,3 +0,0 @@
-version https://git-lfs.github.com/spec/v1
-oid sha256:d12e9bb244360e91fef4fc0de24f1bb60f80e96f15c092b4811cf44a4204545e
-size 702279
diff --git a/cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin_visual_gen/FmhaSm100aKernel_QkInt8VE4m3OE4m3HQk64HV64SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK16SageV1PersistentContext_cubin.cpp b/cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin_visual_gen/FmhaSm100aKernel_QkInt8VE4m3OE4m3HQk64HV64SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK16SageV1PersistentContext_cubin.cpp
deleted file mode 100644
index 5ec2be7fef83..000000000000
--- a/cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin_visual_gen/FmhaSm100aKernel_QkInt8VE4m3OE4m3HQk64HV64SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK16SageV1PersistentContext_cubin.cpp
+++ /dev/null
@@ -1,3 +0,0 @@
-version https://git-lfs.github.com/spec/v1
-oid sha256:f6b1eca1d0f81a3186bb246531b52885f1fa24871b10e615a7967edc15e37449
-size 772221
diff --git a/cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin_visual_gen/FmhaSm100aKernel_QkInt8VE4m3OE4m3HQk64HV64SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK16SageV1StaticContext_cubin.cpp b/cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin_visual_gen/FmhaSm100aKernel_QkInt8VE4m3OE4m3HQk64HV64SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK16SageV1StaticContext_cubin.cpp
deleted file mode 100644
index 2aa4831580ad..000000000000
--- a/cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin_visual_gen/FmhaSm100aKernel_QkInt8VE4m3OE4m3HQk64HV64SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK16SageV1StaticContext_cubin.cpp
+++ /dev/null
@@ -1,3 +0,0 @@
-version https://git-lfs.github.com/spec/v1
-oid sha256:2ab705ac75f2bca2432a44e1052fc1300484927c3bc944828a0615292f612166
-size 685091
diff --git a/cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin_visual_gen/FmhaSm100aKernel_QkInt8VE4m3OE4m3HQk64HV64SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK1SageV1PersistentContext_cubin.cpp b/cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin_visual_gen/FmhaSm100aKernel_QkInt8VE4m3OE4m3HQk64HV64SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK1SageV1PersistentContext_cubin.cpp
deleted file mode 100644
index de996f55720a..000000000000
--- a/cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin_visual_gen/FmhaSm100aKernel_QkInt8VE4m3OE4m3HQk64HV64SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK1SageV1PersistentContext_cubin.cpp
+++ /dev/null
@@ -1,3 +0,0 @@
-version https://git-lfs.github.com/spec/v1
-oid sha256:6662e65c28cf27a8fc0505e7df146bc43c9256282d72b9bc4888abc067b5b2f7
-size 815287
diff --git a/cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin_visual_gen/FmhaSm100aKernel_QkInt8VE4m3OE4m3HQk64HV64SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK1SageV1StaticContext_cubin.cpp b/cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin_visual_gen/FmhaSm100aKernel_QkInt8VE4m3OE4m3HQk64HV64SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK1SageV1StaticContext_cubin.cpp
deleted file mode 100644
index a6a4816dcad4..000000000000
--- a/cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin_visual_gen/FmhaSm100aKernel_QkInt8VE4m3OE4m3HQk64HV64SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK1SageV1StaticContext_cubin.cpp
+++ /dev/null
@@ -1,3 +0,0 @@
-version https://git-lfs.github.com/spec/v1
-oid sha256:2885a870ec5bc0ac6a4ea73b8d5301309d7add5f02cbf58d291732b8a1dfff0f
-size 727663
diff --git a/cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin_visual_gen/FmhaSm100aKernel_QkInt8VE4m3OE4m3HQk64HV64SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK4SageV1PersistentContext_cubin.cpp b/cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin_visual_gen/FmhaSm100aKernel_QkInt8VE4m3OE4m3HQk64HV64SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK4SageV1PersistentContext_cubin.cpp
deleted file mode 100644
index 3fab12e3b3e4..000000000000
--- a/cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin_visual_gen/FmhaSm100aKernel_QkInt8VE4m3OE4m3HQk64HV64SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK4SageV1PersistentContext_cubin.cpp
+++ /dev/null
@@ -1,3 +0,0 @@
-version https://git-lfs.github.com/spec/v1
-oid sha256:6511ac0e98f108b6482c1daee2a54aa04c8e0bd29c91514fadf2bfcb475a07e1
-size 785737
diff --git a/cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin_visual_gen/FmhaSm100aKernel_QkInt8VE4m3OE4m3HQk64HV64SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK4SageV1StaticContext_cubin.cpp b/cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin_visual_gen/FmhaSm100aKernel_QkInt8VE4m3OE4m3HQk64HV64SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK4SageV1StaticContext_cubin.cpp
deleted file mode 100644
index 9a89b11b9971..000000000000
--- a/cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin_visual_gen/FmhaSm100aKernel_QkInt8VE4m3OE4m3HQk64HV64SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK4SageV1StaticContext_cubin.cpp
+++ /dev/null
@@ -1,3 +0,0 @@
-version https://git-lfs.github.com/spec/v1
-oid sha256:731e610e9b2bf4991bc1c9cf94717e6ac71531fbea762b63db27fb1a9cefcf70
-size 696337
diff --git a/cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin_visual_gen/FmhaSm100aKernel_QkInt8VE4m3OE4m3HQk64HV64SeparateQkvDenseVarSeqQ128Kv128StaticContext_cubin.cpp b/cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin_visual_gen/FmhaSm100aKernel_QkInt8VE4m3OE4m3HQk64HV64SeparateQkvDenseVarSeqQ128Kv128StaticContext_cubin.cpp
deleted file mode 100644
index 3286bed55a52..000000000000
--- a/cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin_visual_gen/FmhaSm100aKernel_QkInt8VE4m3OE4m3HQk64HV64SeparateQkvDenseVarSeqQ128Kv128StaticContext_cubin.cpp
+++ /dev/null
@@ -1,3 +0,0 @@
-version https://git-lfs.github.com/spec/v1
-oid sha256:a13bc2d6d992ee4c9f2d86dccf1a789e18dc7eb24563a8997d37b95010f68126
-size 618255
diff --git a/cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin_visual_gen/FmhaSm100aKernel_QkvE4m3OBfloat16H128SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK1SageV1PersistentContext_cubin.cpp b/cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin_visual_gen/FmhaSm100aKernel_QkvE4m3OBfloat16H128SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK1SageV1PersistentContext_cubin.cpp
deleted file mode 100644
index f2371b06d8f3..000000000000
--- a/cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin_visual_gen/FmhaSm100aKernel_QkvE4m3OBfloat16H128SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK1SageV1PersistentContext_cubin.cpp
+++ /dev/null
@@ -1,3 +0,0 @@
-version https://git-lfs.github.com/spec/v1
-oid sha256:c44edbe81d754921e6a04e449330955efafbb74a18d81a799869a81157b7a58f
-size 803833
diff --git a/cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin_visual_gen/FmhaSm100aKernel_QkvE4m3OBfloat16H128SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK1SageV1StaticContext_cubin.cpp b/cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin_visual_gen/FmhaSm100aKernel_QkvE4m3OBfloat16H128SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK1SageV1StaticContext_cubin.cpp
deleted file mode 100644
index 0849ca3fc3e6..000000000000
--- a/cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin_visual_gen/FmhaSm100aKernel_QkvE4m3OBfloat16H128SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK1SageV1StaticContext_cubin.cpp
+++ /dev/null
@@ -1,3 +0,0 @@
-version https://git-lfs.github.com/spec/v1
-oid sha256:1bd3e1c03b4bff7e929801691c63850165749c96087be3300893a0a7b658a1e5
-size 710387
diff --git a/cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin_visual_gen/FmhaSm100aKernel_QkvE4m3OBfloat16H128SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK4SageV1PersistentContext_cubin.cpp b/cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin_visual_gen/FmhaSm100aKernel_QkvE4m3OBfloat16H128SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK4SageV1PersistentContext_cubin.cpp
deleted file mode 100644
index fe2099fa6c89..000000000000
--- a/cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin_visual_gen/FmhaSm100aKernel_QkvE4m3OBfloat16H128SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK4SageV1PersistentContext_cubin.cpp
+++ /dev/null
@@ -1,3 +0,0 @@
-version https://git-lfs.github.com/spec/v1
-oid sha256:37a60f7e07920d2fd38de5641cc862117493b68e0ae3374e434cf3b8f110ca7c
-size 762737
diff --git a/cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin_visual_gen/FmhaSm100aKernel_QkvE4m3OBfloat16H128SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK4SageV1StaticContext_cubin.cpp b/cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin_visual_gen/FmhaSm100aKernel_QkvE4m3OBfloat16H128SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK4SageV1StaticContext_cubin.cpp
deleted file mode 100644
index 5bf42aea2e29..000000000000
--- a/cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin_visual_gen/FmhaSm100aKernel_QkvE4m3OBfloat16H128SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK4SageV1StaticContext_cubin.cpp
+++ /dev/null
@@ -1,3 +0,0 @@
-version https://git-lfs.github.com/spec/v1
-oid sha256:6e3e62c6fa754e87aa4aed8ffa19e251b813604b155f52f583619d35449151ff
-size 670279
diff --git a/cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin_visual_gen/FmhaSm100aKernel_QkvE4m3OBfloat16H64SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK1SageV1PersistentContext_cubin.cpp b/cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin_visual_gen/FmhaSm100aKernel_QkvE4m3OBfloat16H64SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK1SageV1PersistentContext_cubin.cpp
deleted file mode 100644
index 39c840dc281f..000000000000
--- a/cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin_visual_gen/FmhaSm100aKernel_QkvE4m3OBfloat16H64SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK1SageV1PersistentContext_cubin.cpp
+++ /dev/null
@@ -1,3 +0,0 @@
-version https://git-lfs.github.com/spec/v1
-oid sha256:82ee5deb37a94e18a645e3bb8f373b8020358070f5643ba90680fe8ead0fa18c
-size 804669
diff --git a/cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin_visual_gen/FmhaSm100aKernel_QkvE4m3OBfloat16H64SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK1SageV1StaticContext_cubin.cpp b/cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin_visual_gen/FmhaSm100aKernel_QkvE4m3OBfloat16H64SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK1SageV1StaticContext_cubin.cpp
deleted file mode 100644
index d61c4e376003..000000000000
--- a/cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin_visual_gen/FmhaSm100aKernel_QkvE4m3OBfloat16H64SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK1SageV1StaticContext_cubin.cpp
+++ /dev/null
@@ -1,3 +0,0 @@
-version https://git-lfs.github.com/spec/v1
-oid sha256:16ae1b01206a5ef767cee705f6d86b5ceaedd86b342550e25e51fb780906d5d6
-size 673879
diff --git a/cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin_visual_gen/FmhaSm100aKernel_QkvE4m3OBfloat16H64SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK4SageV1PersistentContext_cubin.cpp b/cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin_visual_gen/FmhaSm100aKernel_QkvE4m3OBfloat16H64SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK4SageV1PersistentContext_cubin.cpp
deleted file mode 100644
index 8dbf3f854073..000000000000
--- a/cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin_visual_gen/FmhaSm100aKernel_QkvE4m3OBfloat16H64SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK4SageV1PersistentContext_cubin.cpp
+++ /dev/null
@@ -1,3 +0,0 @@
-version https://git-lfs.github.com/spec/v1
-oid sha256:8b0175a8505b5331e131e4b06c7931119b00d8eebe2bbfdf918bc49780ecd4a9
-size 778523
diff --git a/cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin_visual_gen/FmhaSm100aKernel_QkvE4m3OBfloat16H64SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK4SageV1StaticContext_cubin.cpp b/cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin_visual_gen/FmhaSm100aKernel_QkvE4m3OBfloat16H64SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK4SageV1StaticContext_cubin.cpp
deleted file mode 100644
index 41773913594a..000000000000
--- a/cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin_visual_gen/FmhaSm100aKernel_QkvE4m3OBfloat16H64SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK4SageV1StaticContext_cubin.cpp
+++ /dev/null
@@ -1,3 +0,0 @@
-version https://git-lfs.github.com/spec/v1
-oid sha256:979ab6a9da03086f710f05d7c0a4c058e2860a207e8270a022c71758c4943212
-size 634017
diff --git a/cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin_visual_gen/FmhaSm100aKernel_QkvE4m3OE4m3H128SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK1SageV1PersistentContext_cubin.cpp b/cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin_visual_gen/FmhaSm100aKernel_QkvE4m3OE4m3H128SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK1SageV1PersistentContext_cubin.cpp
deleted file mode 100644
index 9d01038f8561..000000000000
--- a/cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin_visual_gen/FmhaSm100aKernel_QkvE4m3OE4m3H128SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK1SageV1PersistentContext_cubin.cpp
+++ /dev/null
@@ -1,3 +0,0 @@
-version https://git-lfs.github.com/spec/v1
-oid sha256:2d468e4199bfb7a5370f4f6fe01f2bf2b1abe36149023f956579c6884f27c1f0
-size 870473
diff --git a/cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin_visual_gen/FmhaSm100aKernel_QkvE4m3OE4m3H128SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK1SageV1StaticContext_cubin.cpp b/cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin_visual_gen/FmhaSm100aKernel_QkvE4m3OE4m3H128SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK1SageV1StaticContext_cubin.cpp
deleted file mode 100644
index 03c168518c6a..000000000000
--- a/cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin_visual_gen/FmhaSm100aKernel_QkvE4m3OE4m3H128SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK1SageV1StaticContext_cubin.cpp
+++ /dev/null
@@ -1,3 +0,0 @@
-version https://git-lfs.github.com/spec/v1
-oid sha256:9adee4d795ee9c82e67716e2c03f2d70ea5a0114f0400239674e37fb99e981a1
-size 781321
diff --git a/cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin_visual_gen/FmhaSm100aKernel_QkvE4m3OE4m3H128SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK4SageV1PersistentContext_cubin.cpp b/cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin_visual_gen/FmhaSm100aKernel_QkvE4m3OE4m3H128SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK4SageV1PersistentContext_cubin.cpp
deleted file mode 100644
index cafd7e5fe125..000000000000
--- a/cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin_visual_gen/FmhaSm100aKernel_QkvE4m3OE4m3H128SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK4SageV1PersistentContext_cubin.cpp
+++ /dev/null
@@ -1,3 +0,0 @@
-version https://git-lfs.github.com/spec/v1
-oid sha256:00184d745cb5cbfd3ea7709eb3d424a0cd5d42825a48c6c8154cda97de195266
-size 830217
diff --git a/cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin_visual_gen/FmhaSm100aKernel_QkvE4m3OE4m3H128SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK4SageV1StaticContext_cubin.cpp b/cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin_visual_gen/FmhaSm100aKernel_QkvE4m3OE4m3H128SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK4SageV1StaticContext_cubin.cpp
deleted file mode 100644
index 4f625b96b32d..000000000000
--- a/cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin_visual_gen/FmhaSm100aKernel_QkvE4m3OE4m3H128SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK4SageV1StaticContext_cubin.cpp
+++ /dev/null
@@ -1,3 +0,0 @@
-version https://git-lfs.github.com/spec/v1
-oid sha256:9d0e58927efc5c5f7a21473d7ba81eadec973810476d7895863962ef1620fde5
-size 740473
diff --git a/cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin_visual_gen/FmhaSm100aKernel_QkvE4m3OE4m3H64SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK1SageV1PersistentContext_cubin.cpp b/cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin_visual_gen/FmhaSm100aKernel_QkvE4m3OE4m3H64SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK1SageV1PersistentContext_cubin.cpp
deleted file mode 100644
index 5e6acf7b6512..000000000000
--- a/cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin_visual_gen/FmhaSm100aKernel_QkvE4m3OE4m3H64SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK1SageV1PersistentContext_cubin.cpp
+++ /dev/null
@@ -1,3 +0,0 @@
-version https://git-lfs.github.com/spec/v1
-oid sha256:fc4a844967fb5f16e9ed13f17d74b15dbc7b95df1811be82456a7df5ec66334f
-size 785075
diff --git a/cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin_visual_gen/FmhaSm100aKernel_QkvE4m3OE4m3H64SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK1SageV1StaticContext_cubin.cpp b/cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin_visual_gen/FmhaSm100aKernel_QkvE4m3OE4m3H64SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK1SageV1StaticContext_cubin.cpp
deleted file mode 100644
index 11c723dca665..000000000000
--- a/cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin_visual_gen/FmhaSm100aKernel_QkvE4m3OE4m3H64SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK1SageV1StaticContext_cubin.cpp
+++ /dev/null
@@ -1,3 +0,0 @@
-version https://git-lfs.github.com/spec/v1
-oid sha256:423558756464cb6eb11ce09b63222d7136d67073e5d108a63c9fa11d62f18767
-size 697451
diff --git a/cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin_visual_gen/FmhaSm100aKernel_QkvE4m3OE4m3H64SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK4SageV1PersistentContext_cubin.cpp b/cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin_visual_gen/FmhaSm100aKernel_QkvE4m3OE4m3H64SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK4SageV1PersistentContext_cubin.cpp
deleted file mode 100644
index 85d1a10de0d0..000000000000
--- a/cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin_visual_gen/FmhaSm100aKernel_QkvE4m3OE4m3H64SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK4SageV1PersistentContext_cubin.cpp
+++ /dev/null
@@ -1,3 +0,0 @@
-version https://git-lfs.github.com/spec/v1
-oid sha256:7da5a07f8cf62a77b7c57ad7f056a91d8f0ff815aebb545da481a8fdad0f5823
-size 746399
diff --git a/cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin_visual_gen/FmhaSm100aKernel_QkvE4m3OE4m3H64SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK4SageV1StaticContext_cubin.cpp b/cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin_visual_gen/FmhaSm100aKernel_QkvE4m3OE4m3H64SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK4SageV1StaticContext_cubin.cpp
deleted file mode 100644
index 91f12eb1bb0f..000000000000
--- a/cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin_visual_gen/FmhaSm100aKernel_QkvE4m3OE4m3H64SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK4SageV1StaticContext_cubin.cpp
+++ /dev/null
@@ -1,3 +0,0 @@
-version https://git-lfs.github.com/spec/v1
-oid sha256:6394dc49b40b63c3616f705b400721a5a6eb1cdcbafd6507797c0b778e9ee644
-size 657591
diff --git a/cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin_visual_gen/FmhaSm103aKernel_QkInt8VE4m3OBfloat16HQk128HV128SeparateQkvDenseVarSeqQ128Kv128PersistentContext_cubin.cpp b/cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin_visual_gen/FmhaSm103aKernel_QkInt8VE4m3OBfloat16HQk128HV128SeparateQkvDenseVarSeqQ128Kv128PersistentContext_cubin.cpp
deleted file mode 100644
index 78895d4cd233..000000000000
--- a/cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin_visual_gen/FmhaSm103aKernel_QkInt8VE4m3OBfloat16HQk128HV128SeparateQkvDenseVarSeqQ128Kv128PersistentContext_cubin.cpp
+++ /dev/null
@@ -1,3 +0,0 @@
-version https://git-lfs.github.com/spec/v1
-oid sha256:9a07ec846adefa425ee87a2794e447312353461acea7fb10d8658f6ab47b2c71
-size 701847
diff --git a/cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin_visual_gen/FmhaSm103aKernel_QkInt8VE4m3OBfloat16HQk128HV128SeparateQkvDenseVarSeqQ128Kv128StaticContext_cubin.cpp b/cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin_visual_gen/FmhaSm103aKernel_QkInt8VE4m3OBfloat16HQk128HV128SeparateQkvDenseVarSeqQ128Kv128StaticContext_cubin.cpp
deleted file mode 100644
index a7ca89c9ba83..000000000000
--- a/cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin_visual_gen/FmhaSm103aKernel_QkInt8VE4m3OBfloat16HQk128HV128SeparateQkvDenseVarSeqQ128Kv128StaticContext_cubin.cpp
+++ /dev/null
@@ -1,3 +0,0 @@
-version https://git-lfs.github.com/spec/v1
-oid sha256:25a9d125e08c7ec63f7d755d6db00dfe5eef6a35b594eff18b7e6aae04bf90d0
-size 618613
diff --git a/cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin_visual_gen/FmhaSm103aKernel_QkInt8VE4m3OBfloat16HQk256HV128SeparateQkvDenseVarSeqQ128Kv128PersistentContext_cubin.cpp b/cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin_visual_gen/FmhaSm103aKernel_QkInt8VE4m3OBfloat16HQk256HV128SeparateQkvDenseVarSeqQ128Kv128PersistentContext_cubin.cpp
deleted file mode 100644
index 2f6620048b08..000000000000
--- a/cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin_visual_gen/FmhaSm103aKernel_QkInt8VE4m3OBfloat16HQk256HV128SeparateQkvDenseVarSeqQ128Kv128PersistentContext_cubin.cpp
+++ /dev/null
@@ -1,3 +0,0 @@
-version https://git-lfs.github.com/spec/v1
-oid sha256:ab369016b2c839ef25d7fa0bd2dd2593351a28968f65e9a34102728edb2f982b
-size 719113
diff --git a/cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin_visual_gen/FmhaSm103aKernel_QkInt8VE4m3OBfloat16HQk256HV128SeparateQkvDenseVarSeqQ128Kv128StaticContext_cubin.cpp b/cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin_visual_gen/FmhaSm103aKernel_QkInt8VE4m3OBfloat16HQk256HV128SeparateQkvDenseVarSeqQ128Kv128StaticContext_cubin.cpp
deleted file mode 100644
index 491a6eb1c379..000000000000
--- a/cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin_visual_gen/FmhaSm103aKernel_QkInt8VE4m3OBfloat16HQk256HV128SeparateQkvDenseVarSeqQ128Kv128StaticContext_cubin.cpp
+++ /dev/null
@@ -1,3 +0,0 @@
-version https://git-lfs.github.com/spec/v1
-oid sha256:1f3e5b38880c17dff92b2946c9035765244b4b7e99b13af9d3d32845d7a7f27e
-size 637607
diff --git a/cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin_visual_gen/FmhaSm103aKernel_QkInt8VE4m3OBfloat16HQk256HV256SeparateQkvDenseVarSeqQ128Kv128PersistentContext_cubin.cpp b/cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin_visual_gen/FmhaSm103aKernel_QkInt8VE4m3OBfloat16HQk256HV256SeparateQkvDenseVarSeqQ128Kv128PersistentContext_cubin.cpp
deleted file mode 100644
index b43dd38c32f8..000000000000
--- a/cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin_visual_gen/FmhaSm103aKernel_QkInt8VE4m3OBfloat16HQk256HV256SeparateQkvDenseVarSeqQ128Kv128PersistentContext_cubin.cpp
+++ /dev/null
@@ -1,3 +0,0 @@
-version https://git-lfs.github.com/spec/v1
-oid sha256:62fb9a6c49892b7ff77c285f037fcffbd2a571ed98ed4e8e3153da3f583e2797
-size 687737
diff --git a/cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin_visual_gen/FmhaSm103aKernel_QkInt8VE4m3OBfloat16HQk256HV256SeparateQkvDenseVarSeqQ128Kv128StaticContext_cubin.cpp b/cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin_visual_gen/FmhaSm103aKernel_QkInt8VE4m3OBfloat16HQk256HV256SeparateQkvDenseVarSeqQ128Kv128StaticContext_cubin.cpp
deleted file mode 100644
index cd4bb03247c9..000000000000
--- a/cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin_visual_gen/FmhaSm103aKernel_QkInt8VE4m3OBfloat16HQk256HV256SeparateQkvDenseVarSeqQ128Kv128StaticContext_cubin.cpp
+++ /dev/null
@@ -1,3 +0,0 @@
-version https://git-lfs.github.com/spec/v1
-oid sha256:d4604d104983ee2d3888364287a135eeb21a40b25fb956ab0fa80d5c58b69916
-size 599866
diff --git a/cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin_visual_gen/FmhaSm103aKernel_QkInt8VE4m3OBfloat16HQk64HV64SeparateQkvDenseVarSeqQ128Kv128PersistentContext_cubin.cpp b/cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin_visual_gen/FmhaSm103aKernel_QkInt8VE4m3OBfloat16HQk64HV64SeparateQkvDenseVarSeqQ128Kv128PersistentContext_cubin.cpp
deleted file mode 100644
index d6f443067a0e..000000000000
--- a/cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin_visual_gen/FmhaSm103aKernel_QkInt8VE4m3OBfloat16HQk64HV64SeparateQkvDenseVarSeqQ128Kv128PersistentContext_cubin.cpp
+++ /dev/null
@@ -1,3 +0,0 @@
-version https://git-lfs.github.com/spec/v1
-oid sha256:8c24855d4773b7a8b1fcf7acabee0b434ffab6286f0085b0941ceaef9b2c8ff6
-size 697255
diff --git a/cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin_visual_gen/FmhaSm103aKernel_QkInt8VE4m3OBfloat16HQk64HV64SeparateQkvDenseVarSeqQ128Kv128StaticContext_cubin.cpp b/cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin_visual_gen/FmhaSm103aKernel_QkInt8VE4m3OBfloat16HQk64HV64SeparateQkvDenseVarSeqQ128Kv128StaticContext_cubin.cpp
deleted file mode 100644
index b356e587da39..000000000000
--- a/cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin_visual_gen/FmhaSm103aKernel_QkInt8VE4m3OBfloat16HQk64HV64SeparateQkvDenseVarSeqQ128Kv128StaticContext_cubin.cpp
+++ /dev/null
@@ -1,3 +0,0 @@
-version https://git-lfs.github.com/spec/v1
-oid sha256:6238e0b9ce1c8b94b82cd4238b72cba0528f3fd391fc0ce93f8a4963bca0015a
-size 609876
diff --git a/cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin_visual_gen/FmhaSm103aKernel_QkInt8VE4m3OE4m3HQk128HV128SeparateQkvDenseVarSeqQ128Kv128PersistentContext_cubin.cpp b/cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin_visual_gen/FmhaSm103aKernel_QkInt8VE4m3OE4m3HQk128HV128SeparateQkvDenseVarSeqQ128Kv128PersistentContext_cubin.cpp
deleted file mode 100644
index 31d09a0dd8a9..000000000000
--- a/cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin_visual_gen/FmhaSm103aKernel_QkInt8VE4m3OE4m3HQk128HV128SeparateQkvDenseVarSeqQ128Kv128PersistentContext_cubin.cpp
+++ /dev/null
@@ -1,3 +0,0 @@
-version https://git-lfs.github.com/spec/v1
-oid sha256:f0967cfad0f9b2cf327411f0cc3369eb8dc9a137900ffdaa1d3d0d79d8f01828
-size 730403
diff --git a/cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin_visual_gen/FmhaSm103aKernel_QkInt8VE4m3OE4m3HQk128HV128SeparateQkvDenseVarSeqQ128Kv128StaticContext_cubin.cpp b/cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin_visual_gen/FmhaSm103aKernel_QkInt8VE4m3OE4m3HQk128HV128SeparateQkvDenseVarSeqQ128Kv128StaticContext_cubin.cpp
deleted file mode 100644
index 2eb58e2392ba..000000000000
--- a/cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin_visual_gen/FmhaSm103aKernel_QkInt8VE4m3OE4m3HQk128HV128SeparateQkvDenseVarSeqQ128Kv128StaticContext_cubin.cpp
+++ /dev/null
@@ -1,3 +0,0 @@
-version https://git-lfs.github.com/spec/v1
-oid sha256:7f5a6da868089b02097064c023992199582d5ec32225dd96c5707926306c2b27
-size 644851
diff --git a/cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin_visual_gen/FmhaSm103aKernel_QkInt8VE4m3OE4m3HQk256HV128SeparateQkvDenseVarSeqQ128Kv128PersistentContext_cubin.cpp b/cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin_visual_gen/FmhaSm103aKernel_QkInt8VE4m3OE4m3HQk256HV128SeparateQkvDenseVarSeqQ128Kv128PersistentContext_cubin.cpp
deleted file mode 100644
index 7ea3fd202977..000000000000
--- a/cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin_visual_gen/FmhaSm103aKernel_QkInt8VE4m3OE4m3HQk256HV128SeparateQkvDenseVarSeqQ128Kv128PersistentContext_cubin.cpp
+++ /dev/null
@@ -1,3 +0,0 @@
-version https://git-lfs.github.com/spec/v1
-oid sha256:a4b8a3cd7982146153da7a23ef890748bfca4ec42569582ccc3d1c654869b6a7
-size 746831
diff --git a/cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin_visual_gen/FmhaSm103aKernel_QkInt8VE4m3OE4m3HQk256HV128SeparateQkvDenseVarSeqQ128Kv128StaticContext_cubin.cpp b/cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin_visual_gen/FmhaSm103aKernel_QkInt8VE4m3OE4m3HQk256HV128SeparateQkvDenseVarSeqQ128Kv128StaticContext_cubin.cpp
deleted file mode 100644
index ec105176f33c..000000000000
--- a/cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin_visual_gen/FmhaSm103aKernel_QkInt8VE4m3OE4m3HQk256HV128SeparateQkvDenseVarSeqQ128Kv128StaticContext_cubin.cpp
+++ /dev/null
@@ -1,3 +0,0 @@
-version https://git-lfs.github.com/spec/v1
-oid sha256:b868c59fc093b9f43ef06a57eba8c3919f117c4998e04d788c200ed1292417ea
-size 663005
diff --git a/cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin_visual_gen/FmhaSm103aKernel_QkInt8VE4m3OE4m3HQk256HV256SeparateQkvDenseVarSeqQ128Kv128PersistentContext_cubin.cpp b/cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin_visual_gen/FmhaSm103aKernel_QkInt8VE4m3OE4m3HQk256HV256SeparateQkvDenseVarSeqQ128Kv128PersistentContext_cubin.cpp
deleted file mode 100644
index c34b951788cd..000000000000
--- a/cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin_visual_gen/FmhaSm103aKernel_QkInt8VE4m3OE4m3HQk256HV256SeparateQkvDenseVarSeqQ128Kv128PersistentContext_cubin.cpp
+++ /dev/null
@@ -1,3 +0,0 @@
-version https://git-lfs.github.com/spec/v1
-oid sha256:df0677a0da3402efc395e156fe02053ea92d8a53b575218b05716f52496d7e68
-size 711063
diff --git a/cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin_visual_gen/FmhaSm103aKernel_QkInt8VE4m3OE4m3HQk256HV256SeparateQkvDenseVarSeqQ128Kv128StaticContext_cubin.cpp b/cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin_visual_gen/FmhaSm103aKernel_QkInt8VE4m3OE4m3HQk256HV256SeparateQkvDenseVarSeqQ128Kv128StaticContext_cubin.cpp
deleted file mode 100644
index ec43e6327dfb..000000000000
--- a/cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin_visual_gen/FmhaSm103aKernel_QkInt8VE4m3OE4m3HQk256HV256SeparateQkvDenseVarSeqQ128Kv128StaticContext_cubin.cpp
+++ /dev/null
@@ -1,3 +0,0 @@
-version https://git-lfs.github.com/spec/v1
-oid sha256:80359fdff04ff5da98e19c0d55ec54de733c19d8b54d57cdef442a41bbfe6852
-size 620677
diff --git a/cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin_visual_gen/FmhaSm103aKernel_QkInt8VE4m3OE4m3HQk64HV64SeparateQkvDenseVarSeqQ128Kv128PersistentContext_cubin.cpp b/cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin_visual_gen/FmhaSm103aKernel_QkInt8VE4m3OE4m3HQk64HV64SeparateQkvDenseVarSeqQ128Kv128PersistentContext_cubin.cpp
deleted file mode 100644
index 944c89ad31bf..000000000000
--- a/cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin_visual_gen/FmhaSm103aKernel_QkInt8VE4m3OE4m3HQk64HV64SeparateQkvDenseVarSeqQ128Kv128PersistentContext_cubin.cpp
+++ /dev/null
@@ -1,3 +0,0 @@
-version https://git-lfs.github.com/spec/v1
-oid sha256:3ca4bc43244a7594022ad396c122dabcdbc221177011e5052e6decaabbd92bad
-size 696507
diff --git a/cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin_visual_gen/FmhaSm103aKernel_QkInt8VE4m3OE4m3HQk64HV64SeparateQkvDenseVarSeqQ128Kv128StaticContext_cubin.cpp b/cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin_visual_gen/FmhaSm103aKernel_QkInt8VE4m3OE4m3HQk64HV64SeparateQkvDenseVarSeqQ128Kv128StaticContext_cubin.cpp
deleted file mode 100644
index 70ceb80b1efb..000000000000
--- a/cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin_visual_gen/FmhaSm103aKernel_QkInt8VE4m3OE4m3HQk64HV64SeparateQkvDenseVarSeqQ128Kv128StaticContext_cubin.cpp
+++ /dev/null
@@ -1,3 +0,0 @@
-version https://git-lfs.github.com/spec/v1
-oid sha256:c57c5b3fc8ce3b6ae29e5d277f1e3bff2fe0d3f0ef9631ad42bab42d58c85d07
-size 610114
diff --git a/cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin_visual_gen/FmhaSm103aKernel_QkvE4m3OBfloat16H128SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK1SageV1PersistentContext_cubin.cpp b/cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin_visual_gen/FmhaSm103aKernel_QkvE4m3OBfloat16H128SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK1SageV1PersistentContext_cubin.cpp
deleted file mode 100644
index dc0c32b7489e..000000000000
--- a/cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin_visual_gen/FmhaSm103aKernel_QkvE4m3OBfloat16H128SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK1SageV1PersistentContext_cubin.cpp
+++ /dev/null
@@ -1,3 +0,0 @@
-version https://git-lfs.github.com/spec/v1
-oid sha256:35c48ea1d3fb9c775af05ac663f65e1a9c9c322613b5c4638f13948fa1687706
-size 811725
diff --git a/cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin_visual_gen/FmhaSm103aKernel_QkvE4m3OBfloat16H128SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK1SageV1StaticContext_cubin.cpp b/cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin_visual_gen/FmhaSm103aKernel_QkvE4m3OBfloat16H128SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK1SageV1StaticContext_cubin.cpp
deleted file mode 100644
index a2c1f7535b60..000000000000
--- a/cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin_visual_gen/FmhaSm103aKernel_QkvE4m3OBfloat16H128SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK1SageV1StaticContext_cubin.cpp
+++ /dev/null
@@ -1,3 +0,0 @@
-version https://git-lfs.github.com/spec/v1
-oid sha256:234d902db48deb4ed280786c7f0b5b9a75868e3344989341763395b3485ed98b
-size 718133
diff --git a/cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin_visual_gen/FmhaSm103aKernel_QkvE4m3OBfloat16H128SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK4SageV1PersistentContext_cubin.cpp b/cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin_visual_gen/FmhaSm103aKernel_QkvE4m3OBfloat16H128SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK4SageV1PersistentContext_cubin.cpp
deleted file mode 100644
index d5d9581d51ba..000000000000
--- a/cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin_visual_gen/FmhaSm103aKernel_QkvE4m3OBfloat16H128SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK4SageV1PersistentContext_cubin.cpp
+++ /dev/null
@@ -1,3 +0,0 @@
-version https://git-lfs.github.com/spec/v1
-oid sha256:a8c737f7d0630502335dc6e88d93c49cdb9796debf2fc87f887c2cf14c723559
-size 771421
diff --git a/cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin_visual_gen/FmhaSm103aKernel_QkvE4m3OBfloat16H128SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK4SageV1StaticContext_cubin.cpp b/cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin_visual_gen/FmhaSm103aKernel_QkvE4m3OBfloat16H128SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK4SageV1StaticContext_cubin.cpp
deleted file mode 100644
index 9453c6ce8b07..000000000000
--- a/cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin_visual_gen/FmhaSm103aKernel_QkvE4m3OBfloat16H128SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK4SageV1StaticContext_cubin.cpp
+++ /dev/null
@@ -1,3 +0,0 @@
-version https://git-lfs.github.com/spec/v1
-oid sha256:940664e1694d0464bcaa74d6e1a913665c6efaa99577a52dff8ac2d1253e183a
-size 678025
diff --git a/cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin_visual_gen/FmhaSm103aKernel_QkvE4m3OBfloat16H64SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK1SageV1PersistentContext_cubin.cpp b/cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin_visual_gen/FmhaSm103aKernel_QkvE4m3OBfloat16H64SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK1SageV1PersistentContext_cubin.cpp
deleted file mode 100644
index ec6526df3b6d..000000000000
--- a/cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin_visual_gen/FmhaSm103aKernel_QkvE4m3OBfloat16H64SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK1SageV1PersistentContext_cubin.cpp
+++ /dev/null
@@ -1,3 +0,0 @@
-version https://git-lfs.github.com/spec/v1
-oid sha256:d7f1ed45a87a0572dcede8c907f93600e4c352f9bf15716c44f92111a4ee349d
-size 812563
diff --git a/cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin_visual_gen/FmhaSm103aKernel_QkvE4m3OBfloat16H64SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK1SageV1StaticContext_cubin.cpp b/cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin_visual_gen/FmhaSm103aKernel_QkvE4m3OBfloat16H64SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK1SageV1StaticContext_cubin.cpp
deleted file mode 100644
index 4ba547787598..000000000000
--- a/cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin_visual_gen/FmhaSm103aKernel_QkvE4m3OBfloat16H64SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK1SageV1StaticContext_cubin.cpp
+++ /dev/null
@@ -1,3 +0,0 @@
-version https://git-lfs.github.com/spec/v1
-oid sha256:d45677bacc6ab16c6771432ea3505626f167a33ede8ac60149dc08d1dfb0080b
-size 682413
diff --git a/cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin_visual_gen/FmhaSm103aKernel_QkvE4m3OBfloat16H64SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK4SageV1PersistentContext_cubin.cpp b/cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin_visual_gen/FmhaSm103aKernel_QkvE4m3OBfloat16H64SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK4SageV1PersistentContext_cubin.cpp
deleted file mode 100644
index ba39c8dce8fa..000000000000
--- a/cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin_visual_gen/FmhaSm103aKernel_QkvE4m3OBfloat16H64SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK4SageV1PersistentContext_cubin.cpp
+++ /dev/null
@@ -1,3 +0,0 @@
-version https://git-lfs.github.com/spec/v1
-oid sha256:5c4d460c135cf8605c9368c86fb04d2210fb4b8626560868969c645ca92f8eeb
-size 786415
diff --git a/cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin_visual_gen/FmhaSm103aKernel_QkvE4m3OBfloat16H64SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK4SageV1StaticContext_cubin.cpp b/cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin_visual_gen/FmhaSm103aKernel_QkvE4m3OBfloat16H64SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK4SageV1StaticContext_cubin.cpp
deleted file mode 100644
index 3cfbb43d4b8f..000000000000
--- a/cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin_visual_gen/FmhaSm103aKernel_QkvE4m3OBfloat16H64SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK4SageV1StaticContext_cubin.cpp
+++ /dev/null
@@ -1,3 +0,0 @@
-version https://git-lfs.github.com/spec/v1
-oid sha256:c602c5162175425c68f483cb5fe1624e15c0265e916b4e006f9244c8f02c9664
-size 642551
diff --git a/cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin_visual_gen/FmhaSm103aKernel_QkvE4m3OE4m3H128SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK1SageV1PersistentContext_cubin.cpp b/cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin_visual_gen/FmhaSm103aKernel_QkvE4m3OE4m3H128SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK1SageV1PersistentContext_cubin.cpp
deleted file mode 100644
index 6fdce4b91d8a..000000000000
--- a/cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin_visual_gen/FmhaSm103aKernel_QkvE4m3OE4m3H128SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK1SageV1PersistentContext_cubin.cpp
+++ /dev/null
@@ -1,3 +0,0 @@
-version https://git-lfs.github.com/spec/v1
-oid sha256:ece76825e7fde0b6af8170c9b69cad0c23051bbf49f561d7549bd444e8432c8e
-size 879205
diff --git a/cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin_visual_gen/FmhaSm103aKernel_QkvE4m3OE4m3H128SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK1SageV1StaticContext_cubin.cpp b/cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin_visual_gen/FmhaSm103aKernel_QkvE4m3OE4m3H128SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK1SageV1StaticContext_cubin.cpp
deleted file mode 100644
index 4c9f2f08a2ec..000000000000
--- a/cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin_visual_gen/FmhaSm103aKernel_QkvE4m3OE4m3H128SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK1SageV1StaticContext_cubin.cpp
+++ /dev/null
@@ -1,3 +0,0 @@
-version https://git-lfs.github.com/spec/v1
-oid sha256:d11b630916b7c61b2246f31a41cf78bbdb25d0a2dadaaf709b6e044d156f21a0
-size 789065
diff --git a/cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin_visual_gen/FmhaSm103aKernel_QkvE4m3OE4m3H128SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK4SageV1PersistentContext_cubin.cpp b/cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin_visual_gen/FmhaSm103aKernel_QkvE4m3OE4m3H128SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK4SageV1PersistentContext_cubin.cpp
deleted file mode 100644
index 3187c7b0ea7b..000000000000
--- a/cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin_visual_gen/FmhaSm103aKernel_QkvE4m3OE4m3H128SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK4SageV1PersistentContext_cubin.cpp
+++ /dev/null
@@ -1,3 +0,0 @@
-version https://git-lfs.github.com/spec/v1
-oid sha256:4876b1f18168b17d6b59273f22c5de4f15501cc674d32d181bb0e8f961bc633b
-size 838111
diff --git a/cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin_visual_gen/FmhaSm103aKernel_QkvE4m3OE4m3H128SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK4SageV1StaticContext_cubin.cpp b/cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin_visual_gen/FmhaSm103aKernel_QkvE4m3OE4m3H128SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK4SageV1StaticContext_cubin.cpp
deleted file mode 100644
index d60d7608e8a8..000000000000
--- a/cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin_visual_gen/FmhaSm103aKernel_QkvE4m3OE4m3H128SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK4SageV1StaticContext_cubin.cpp
+++ /dev/null
@@ -1,3 +0,0 @@
-version https://git-lfs.github.com/spec/v1
-oid sha256:98d2cc2a4ca83c4721756a8b1245150ce8c976fe77a07d33d5a7a3af6b73cfe0
-size 748169
diff --git a/cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin_visual_gen/FmhaSm103aKernel_QkvE4m3OE4m3H64SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK1SageV1PersistentContext_cubin.cpp b/cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin_visual_gen/FmhaSm103aKernel_QkvE4m3OE4m3H64SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK1SageV1PersistentContext_cubin.cpp
deleted file mode 100644
index 69b87facabca..000000000000
--- a/cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin_visual_gen/FmhaSm103aKernel_QkvE4m3OE4m3H64SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK1SageV1PersistentContext_cubin.cpp
+++ /dev/null
@@ -1,3 +0,0 @@
-version https://git-lfs.github.com/spec/v1
-oid sha256:1b0f56113bc486b9d936021d7128906d9a012f880a0b26f28e8f70192fec33c4
-size 793019
diff --git a/cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin_visual_gen/FmhaSm103aKernel_QkvE4m3OE4m3H64SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK1SageV1StaticContext_cubin.cpp b/cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin_visual_gen/FmhaSm103aKernel_QkvE4m3OE4m3H64SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK1SageV1StaticContext_cubin.cpp
deleted file mode 100644
index f082af156811..000000000000
--- a/cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin_visual_gen/FmhaSm103aKernel_QkvE4m3OE4m3H64SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK1SageV1StaticContext_cubin.cpp
+++ /dev/null
@@ -1,3 +0,0 @@
-version https://git-lfs.github.com/spec/v1
-oid sha256:499326e6c7370741264ae6d309e0d97ff4ec5f7bdd78ad6bb1c26b799fd46617
-size 705987
diff --git a/cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin_visual_gen/FmhaSm103aKernel_QkvE4m3OE4m3H64SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK4SageV1PersistentContext_cubin.cpp b/cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin_visual_gen/FmhaSm103aKernel_QkvE4m3OE4m3H64SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK4SageV1PersistentContext_cubin.cpp
deleted file mode 100644
index 97b1afcd8b6e..000000000000
--- a/cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin_visual_gen/FmhaSm103aKernel_QkvE4m3OE4m3H64SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK4SageV1PersistentContext_cubin.cpp
+++ /dev/null
@@ -1,3 +0,0 @@
-version https://git-lfs.github.com/spec/v1
-oid sha256:ead8a5973ee9688becd0f6f8f63e6e2ec99779da10834c033f1cbc104e9e33da
-size 754341
diff --git a/cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin_visual_gen/FmhaSm103aKernel_QkvE4m3OE4m3H64SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK4SageV1StaticContext_cubin.cpp b/cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin_visual_gen/FmhaSm103aKernel_QkvE4m3OE4m3H64SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK4SageV1StaticContext_cubin.cpp
deleted file mode 100644
index 095d92ac328f..000000000000
--- a/cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin_visual_gen/FmhaSm103aKernel_QkvE4m3OE4m3H64SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK4SageV1StaticContext_cubin.cpp
+++ /dev/null
@@ -1,3 +0,0 @@
-version https://git-lfs.github.com/spec/v1
-oid sha256:8845f6aa6a498d3bf143631dd4b96ad716fd1f136b3d0455d39a46524095732c
-size 665335
diff --git a/cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin_visual_gen/kernelMetaInfoVisualGen.h b/cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin_visual_gen/kernelMetaInfoVisualGen.h
deleted file mode 100644
index ee3201889fdb..000000000000
--- a/cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/cubin_visual_gen/kernelMetaInfoVisualGen.h
+++ /dev/null
@@ -1,314 +0,0 @@
-/*
- * SPDX-FileCopyrightText: Copyright (c) 1993-2024 NVIDIA CORPORATION &
- * AFFILIATES. All rights reserved. SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-#pragma once
-
-#include "../cubin/kernelMetaInfo.h"
-
-TRTLLM_NAMESPACE_BEGIN
-
-namespace kernels
-{
-// clang-format off
-
-#define TLLM_GEN_VX_VERSION "01085d3f"
-#ifndef EXCLUDE_SM_100
-extern unsigned char FmhaSm100aKernel_QkInt8VE4m3OBfloat16HQk128HV128SeparateQkvDenseVarSeqQ128Kv128PersistentContext_cubin[];
-extern unsigned char FmhaSm100aKernel_QkInt8VE4m3OBfloat16HQk128HV128SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK16SageV1PersistentContext_cubin[];
-extern unsigned char FmhaSm100aKernel_QkInt8VE4m3OBfloat16HQk128HV128SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK16SageV1StaticContext_cubin[];
-extern unsigned char FmhaSm100aKernel_QkInt8VE4m3OBfloat16HQk128HV128SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK1SageV1PersistentContext_cubin[];
-extern unsigned char FmhaSm100aKernel_QkInt8VE4m3OBfloat16HQk128HV128SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK1SageV1StaticContext_cubin[];
-extern unsigned char FmhaSm100aKernel_QkInt8VE4m3OBfloat16HQk128HV128SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK4SageV1PersistentContext_cubin[];
-extern unsigned char FmhaSm100aKernel_QkInt8VE4m3OBfloat16HQk128HV128SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK4SageV1StaticContext_cubin[];
-extern unsigned char FmhaSm100aKernel_QkInt8VE4m3OBfloat16HQk128HV128SeparateQkvDenseVarSeqQ128Kv128StaticContext_cubin[];
-extern unsigned char FmhaSm100aKernel_QkInt8VE4m3OBfloat16HQk256HV128SeparateQkvDenseVarSeqQ128Kv128PersistentContext_cubin[];
-extern unsigned char FmhaSm100aKernel_QkInt8VE4m3OBfloat16HQk256HV128SeparateQkvDenseVarSeqQ128Kv128StaticContext_cubin[];
-extern unsigned char FmhaSm100aKernel_QkInt8VE4m3OBfloat16HQk256HV256SeparateQkvDenseVarSeqQ128Kv128PersistentContext_cubin[];
-extern unsigned char FmhaSm100aKernel_QkInt8VE4m3OBfloat16HQk256HV256SeparateQkvDenseVarSeqQ128Kv128StaticContext_cubin[];
-extern unsigned char FmhaSm100aKernel_QkInt8VE4m3OBfloat16HQk64HV64SeparateQkvDenseVarSeqQ128Kv128PersistentContext_cubin[];
-extern unsigned char FmhaSm100aKernel_QkInt8VE4m3OBfloat16HQk64HV64SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK16SageV1PersistentContext_cubin[];
-extern unsigned char FmhaSm100aKernel_QkInt8VE4m3OBfloat16HQk64HV64SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK16SageV1StaticContext_cubin[];
-extern unsigned char FmhaSm100aKernel_QkInt8VE4m3OBfloat16HQk64HV64SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK1SageV1PersistentContext_cubin[];
-extern unsigned char FmhaSm100aKernel_QkInt8VE4m3OBfloat16HQk64HV64SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK1SageV1StaticContext_cubin[];
-extern unsigned char FmhaSm100aKernel_QkInt8VE4m3OBfloat16HQk64HV64SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK4SageV1PersistentContext_cubin[];
-extern unsigned char FmhaSm100aKernel_QkInt8VE4m3OBfloat16HQk64HV64SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK4SageV1StaticContext_cubin[];
-extern unsigned char FmhaSm100aKernel_QkInt8VE4m3OBfloat16HQk64HV64SeparateQkvDenseVarSeqQ128Kv128StaticContext_cubin[];
-extern unsigned char FmhaSm100aKernel_QkInt8VE4m3OE4m3HQk128HV128SeparateQkvDenseVarSeqQ128Kv128PersistentContext_cubin[];
-extern unsigned char FmhaSm100aKernel_QkInt8VE4m3OE4m3HQk128HV128SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK16SageV1PersistentContext_cubin[];
-extern unsigned char FmhaSm100aKernel_QkInt8VE4m3OE4m3HQk128HV128SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK16SageV1StaticContext_cubin[];
-extern unsigned char FmhaSm100aKernel_QkInt8VE4m3OE4m3HQk128HV128SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK1SageV1PersistentContext_cubin[];
-extern unsigned char FmhaSm100aKernel_QkInt8VE4m3OE4m3HQk128HV128SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK1SageV1StaticContext_cubin[];
-extern unsigned char FmhaSm100aKernel_QkInt8VE4m3OE4m3HQk128HV128SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK4SageV1PersistentContext_cubin[];
-extern unsigned char FmhaSm100aKernel_QkInt8VE4m3OE4m3HQk128HV128SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK4SageV1StaticContext_cubin[];
-extern unsigned char FmhaSm100aKernel_QkInt8VE4m3OE4m3HQk128HV128SeparateQkvDenseVarSeqQ128Kv128StaticContext_cubin[];
-extern unsigned char FmhaSm100aKernel_QkInt8VE4m3OE4m3HQk256HV128SeparateQkvDenseVarSeqQ128Kv128PersistentContext_cubin[];
-extern unsigned char FmhaSm100aKernel_QkInt8VE4m3OE4m3HQk256HV128SeparateQkvDenseVarSeqQ128Kv128StaticContext_cubin[];
-extern unsigned char FmhaSm100aKernel_QkInt8VE4m3OE4m3HQk256HV256SeparateQkvDenseVarSeqQ128Kv128PersistentContext_cubin[];
-extern unsigned char FmhaSm100aKernel_QkInt8VE4m3OE4m3HQk256HV256SeparateQkvDenseVarSeqQ128Kv128StaticContext_cubin[];
-extern unsigned char FmhaSm100aKernel_QkInt8VE4m3OE4m3HQk64HV64SeparateQkvDenseVarSeqQ128Kv128PersistentContext_cubin[];
-extern unsigned char FmhaSm100aKernel_QkInt8VE4m3OE4m3HQk64HV64SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK16SageV1PersistentContext_cubin[];
-extern unsigned char FmhaSm100aKernel_QkInt8VE4m3OE4m3HQk64HV64SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK16SageV1StaticContext_cubin[];
-extern unsigned char FmhaSm100aKernel_QkInt8VE4m3OE4m3HQk64HV64SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK1SageV1PersistentContext_cubin[];
-extern unsigned char FmhaSm100aKernel_QkInt8VE4m3OE4m3HQk64HV64SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK1SageV1StaticContext_cubin[];
-extern unsigned char FmhaSm100aKernel_QkInt8VE4m3OE4m3HQk64HV64SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK4SageV1PersistentContext_cubin[];
-extern unsigned char FmhaSm100aKernel_QkInt8VE4m3OE4m3HQk64HV64SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK4SageV1StaticContext_cubin[];
-extern unsigned char FmhaSm100aKernel_QkInt8VE4m3OE4m3HQk64HV64SeparateQkvDenseVarSeqQ128Kv128StaticContext_cubin[];
-extern unsigned char FmhaSm100aKernel_QkvE4m3OBfloat16H128SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK1SageV1PersistentContext_cubin[];
-extern unsigned char FmhaSm100aKernel_QkvE4m3OBfloat16H128SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK1SageV1StaticContext_cubin[];
-extern unsigned char FmhaSm100aKernel_QkvE4m3OBfloat16H128SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK4SageV1PersistentContext_cubin[];
-extern unsigned char FmhaSm100aKernel_QkvE4m3OBfloat16H128SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK4SageV1StaticContext_cubin[];
-extern unsigned char FmhaSm100aKernel_QkvE4m3OBfloat16H64SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK1SageV1PersistentContext_cubin[];
-extern unsigned char FmhaSm100aKernel_QkvE4m3OBfloat16H64SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK1SageV1StaticContext_cubin[];
-extern unsigned char FmhaSm100aKernel_QkvE4m3OBfloat16H64SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK4SageV1PersistentContext_cubin[];
-extern unsigned char FmhaSm100aKernel_QkvE4m3OBfloat16H64SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK4SageV1StaticContext_cubin[];
-extern unsigned char FmhaSm100aKernel_QkvE4m3OE4m3H128SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK1SageV1PersistentContext_cubin[];
-extern unsigned char FmhaSm100aKernel_QkvE4m3OE4m3H128SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK1SageV1StaticContext_cubin[];
-extern unsigned char FmhaSm100aKernel_QkvE4m3OE4m3H128SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK4SageV1PersistentContext_cubin[];
-extern unsigned char FmhaSm100aKernel_QkvE4m3OE4m3H128SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK4SageV1StaticContext_cubin[];
-extern unsigned char FmhaSm100aKernel_QkvE4m3OE4m3H64SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK1SageV1PersistentContext_cubin[];
-extern unsigned char FmhaSm100aKernel_QkvE4m3OE4m3H64SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK1SageV1StaticContext_cubin[];
-extern unsigned char FmhaSm100aKernel_QkvE4m3OE4m3H64SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK4SageV1PersistentContext_cubin[];
-extern unsigned char FmhaSm100aKernel_QkvE4m3OE4m3H64SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK4SageV1StaticContext_cubin[];
-#endif // EXCLUDE_SM_100
-
-#ifndef EXCLUDE_SM_103
-extern unsigned char FmhaSm103aKernel_QkvE4m3OBfloat16H128SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK1SageV1PersistentContext_cubin[];
-extern unsigned char FmhaSm103aKernel_QkvE4m3OBfloat16H128SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK1SageV1StaticContext_cubin[];
-extern unsigned char FmhaSm103aKernel_QkvE4m3OBfloat16H128SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK4SageV1PersistentContext_cubin[];
-extern unsigned char FmhaSm103aKernel_QkvE4m3OBfloat16H128SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK4SageV1StaticContext_cubin[];
-extern unsigned char FmhaSm103aKernel_QkvE4m3OBfloat16H64SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK1SageV1PersistentContext_cubin[];
-extern unsigned char FmhaSm103aKernel_QkvE4m3OBfloat16H64SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK1SageV1StaticContext_cubin[];
-extern unsigned char FmhaSm103aKernel_QkvE4m3OBfloat16H64SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK4SageV1PersistentContext_cubin[];
-extern unsigned char FmhaSm103aKernel_QkvE4m3OBfloat16H64SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK4SageV1StaticContext_cubin[];
-extern unsigned char FmhaSm103aKernel_QkvE4m3OE4m3H128SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK1SageV1PersistentContext_cubin[];
-extern unsigned char FmhaSm103aKernel_QkvE4m3OE4m3H128SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK1SageV1StaticContext_cubin[];
-extern unsigned char FmhaSm103aKernel_QkvE4m3OE4m3H128SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK4SageV1PersistentContext_cubin[];
-extern unsigned char FmhaSm103aKernel_QkvE4m3OE4m3H128SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK4SageV1StaticContext_cubin[];
-extern unsigned char FmhaSm103aKernel_QkvE4m3OE4m3H64SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK1SageV1PersistentContext_cubin[];
-extern unsigned char FmhaSm103aKernel_QkvE4m3OE4m3H64SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK1SageV1StaticContext_cubin[];
-extern unsigned char FmhaSm103aKernel_QkvE4m3OE4m3H64SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK4SageV1PersistentContext_cubin[];
-extern unsigned char FmhaSm103aKernel_QkvE4m3OE4m3H64SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK4SageV1StaticContext_cubin[];
-#endif // EXCLUDE_SM_103
-
-#ifndef EXCLUDE_SM_100
-extern unsigned int FmhaSm100aKernel_QkInt8VE4m3OBfloat16HQk128HV128SeparateQkvDenseVarSeqQ128Kv128PersistentContext_cubin_len;
-extern unsigned int FmhaSm100aKernel_QkInt8VE4m3OBfloat16HQk128HV128SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK16SageV1PersistentContext_cubin_len;
-extern unsigned int FmhaSm100aKernel_QkInt8VE4m3OBfloat16HQk128HV128SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK16SageV1StaticContext_cubin_len;
-extern unsigned int FmhaSm100aKernel_QkInt8VE4m3OBfloat16HQk128HV128SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK1SageV1PersistentContext_cubin_len;
-extern unsigned int FmhaSm100aKernel_QkInt8VE4m3OBfloat16HQk128HV128SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK1SageV1StaticContext_cubin_len;
-extern unsigned int FmhaSm100aKernel_QkInt8VE4m3OBfloat16HQk128HV128SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK4SageV1PersistentContext_cubin_len;
-extern unsigned int FmhaSm100aKernel_QkInt8VE4m3OBfloat16HQk128HV128SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK4SageV1StaticContext_cubin_len;
-extern unsigned int FmhaSm100aKernel_QkInt8VE4m3OBfloat16HQk128HV128SeparateQkvDenseVarSeqQ128Kv128StaticContext_cubin_len;
-extern unsigned int FmhaSm100aKernel_QkInt8VE4m3OBfloat16HQk256HV128SeparateQkvDenseVarSeqQ128Kv128PersistentContext_cubin_len;
-extern unsigned int FmhaSm100aKernel_QkInt8VE4m3OBfloat16HQk256HV128SeparateQkvDenseVarSeqQ128Kv128StaticContext_cubin_len;
-extern unsigned int FmhaSm100aKernel_QkInt8VE4m3OBfloat16HQk256HV256SeparateQkvDenseVarSeqQ128Kv128PersistentContext_cubin_len;
-extern unsigned int FmhaSm100aKernel_QkInt8VE4m3OBfloat16HQk256HV256SeparateQkvDenseVarSeqQ128Kv128StaticContext_cubin_len;
-extern unsigned int FmhaSm100aKernel_QkInt8VE4m3OBfloat16HQk64HV64SeparateQkvDenseVarSeqQ128Kv128PersistentContext_cubin_len;
-extern unsigned int FmhaSm100aKernel_QkInt8VE4m3OBfloat16HQk64HV64SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK16SageV1PersistentContext_cubin_len;
-extern unsigned int FmhaSm100aKernel_QkInt8VE4m3OBfloat16HQk64HV64SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK16SageV1StaticContext_cubin_len;
-extern unsigned int FmhaSm100aKernel_QkInt8VE4m3OBfloat16HQk64HV64SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK1SageV1PersistentContext_cubin_len;
-extern unsigned int FmhaSm100aKernel_QkInt8VE4m3OBfloat16HQk64HV64SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK1SageV1StaticContext_cubin_len;
-extern unsigned int FmhaSm100aKernel_QkInt8VE4m3OBfloat16HQk64HV64SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK4SageV1PersistentContext_cubin_len;
-extern unsigned int FmhaSm100aKernel_QkInt8VE4m3OBfloat16HQk64HV64SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK4SageV1StaticContext_cubin_len;
-extern unsigned int FmhaSm100aKernel_QkInt8VE4m3OBfloat16HQk64HV64SeparateQkvDenseVarSeqQ128Kv128StaticContext_cubin_len;
-extern unsigned int FmhaSm100aKernel_QkInt8VE4m3OE4m3HQk128HV128SeparateQkvDenseVarSeqQ128Kv128PersistentContext_cubin_len;
-extern unsigned int FmhaSm100aKernel_QkInt8VE4m3OE4m3HQk128HV128SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK16SageV1PersistentContext_cubin_len;
-extern unsigned int FmhaSm100aKernel_QkInt8VE4m3OE4m3HQk128HV128SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK16SageV1StaticContext_cubin_len;
-extern unsigned int FmhaSm100aKernel_QkInt8VE4m3OE4m3HQk128HV128SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK1SageV1PersistentContext_cubin_len;
-extern unsigned int FmhaSm100aKernel_QkInt8VE4m3OE4m3HQk128HV128SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK1SageV1StaticContext_cubin_len;
-extern unsigned int FmhaSm100aKernel_QkInt8VE4m3OE4m3HQk128HV128SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK4SageV1PersistentContext_cubin_len;
-extern unsigned int FmhaSm100aKernel_QkInt8VE4m3OE4m3HQk128HV128SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK4SageV1StaticContext_cubin_len;
-extern unsigned int FmhaSm100aKernel_QkInt8VE4m3OE4m3HQk128HV128SeparateQkvDenseVarSeqQ128Kv128StaticContext_cubin_len;
-extern unsigned int FmhaSm100aKernel_QkInt8VE4m3OE4m3HQk256HV128SeparateQkvDenseVarSeqQ128Kv128PersistentContext_cubin_len;
-extern unsigned int FmhaSm100aKernel_QkInt8VE4m3OE4m3HQk256HV128SeparateQkvDenseVarSeqQ128Kv128StaticContext_cubin_len;
-extern unsigned int FmhaSm100aKernel_QkInt8VE4m3OE4m3HQk256HV256SeparateQkvDenseVarSeqQ128Kv128PersistentContext_cubin_len;
-extern unsigned int FmhaSm100aKernel_QkInt8VE4m3OE4m3HQk256HV256SeparateQkvDenseVarSeqQ128Kv128StaticContext_cubin_len;
-extern unsigned int FmhaSm100aKernel_QkInt8VE4m3OE4m3HQk64HV64SeparateQkvDenseVarSeqQ128Kv128PersistentContext_cubin_len;
-extern unsigned int FmhaSm100aKernel_QkInt8VE4m3OE4m3HQk64HV64SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK16SageV1PersistentContext_cubin_len;
-extern unsigned int FmhaSm100aKernel_QkInt8VE4m3OE4m3HQk64HV64SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK16SageV1StaticContext_cubin_len;
-extern unsigned int FmhaSm100aKernel_QkInt8VE4m3OE4m3HQk64HV64SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK1SageV1PersistentContext_cubin_len;
-extern unsigned int FmhaSm100aKernel_QkInt8VE4m3OE4m3HQk64HV64SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK1SageV1StaticContext_cubin_len;
-extern unsigned int FmhaSm100aKernel_QkInt8VE4m3OE4m3HQk64HV64SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK4SageV1PersistentContext_cubin_len;
-extern unsigned int FmhaSm100aKernel_QkInt8VE4m3OE4m3HQk64HV64SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK4SageV1StaticContext_cubin_len;
-extern unsigned int FmhaSm100aKernel_QkInt8VE4m3OE4m3HQk64HV64SeparateQkvDenseVarSeqQ128Kv128StaticContext_cubin_len;
-extern unsigned int FmhaSm100aKernel_QkvE4m3OBfloat16H128SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK1SageV1PersistentContext_cubin_len;
-extern unsigned int FmhaSm100aKernel_QkvE4m3OBfloat16H128SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK1SageV1StaticContext_cubin_len;
-extern unsigned int FmhaSm100aKernel_QkvE4m3OBfloat16H128SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK4SageV1PersistentContext_cubin_len;
-extern unsigned int FmhaSm100aKernel_QkvE4m3OBfloat16H128SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK4SageV1StaticContext_cubin_len;
-extern unsigned int FmhaSm100aKernel_QkvE4m3OBfloat16H64SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK1SageV1PersistentContext_cubin_len;
-extern unsigned int FmhaSm100aKernel_QkvE4m3OBfloat16H64SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK1SageV1StaticContext_cubin_len;
-extern unsigned int FmhaSm100aKernel_QkvE4m3OBfloat16H64SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK4SageV1PersistentContext_cubin_len;
-extern unsigned int FmhaSm100aKernel_QkvE4m3OBfloat16H64SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK4SageV1StaticContext_cubin_len;
-extern unsigned int FmhaSm100aKernel_QkvE4m3OE4m3H128SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK1SageV1PersistentContext_cubin_len;
-extern unsigned int FmhaSm100aKernel_QkvE4m3OE4m3H128SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK1SageV1StaticContext_cubin_len;
-extern unsigned int FmhaSm100aKernel_QkvE4m3OE4m3H128SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK4SageV1PersistentContext_cubin_len;
-extern unsigned int FmhaSm100aKernel_QkvE4m3OE4m3H128SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK4SageV1StaticContext_cubin_len;
-extern unsigned int FmhaSm100aKernel_QkvE4m3OE4m3H64SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK1SageV1PersistentContext_cubin_len;
-extern unsigned int FmhaSm100aKernel_QkvE4m3OE4m3H64SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK1SageV1StaticContext_cubin_len;
-extern unsigned int FmhaSm100aKernel_QkvE4m3OE4m3H64SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK4SageV1PersistentContext_cubin_len;
-extern unsigned int FmhaSm100aKernel_QkvE4m3OE4m3H64SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK4SageV1StaticContext_cubin_len;
-#endif // EXCLUDE_SM_100
-
-#ifndef EXCLUDE_SM_103
-extern unsigned int FmhaSm103aKernel_QkvE4m3OBfloat16H128SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK1SageV1PersistentContext_cubin_len;
-extern unsigned int FmhaSm103aKernel_QkvE4m3OBfloat16H128SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK1SageV1StaticContext_cubin_len;
-extern unsigned int FmhaSm103aKernel_QkvE4m3OBfloat16H128SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK4SageV1PersistentContext_cubin_len;
-extern unsigned int FmhaSm103aKernel_QkvE4m3OBfloat16H128SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK4SageV1StaticContext_cubin_len;
-extern unsigned int FmhaSm103aKernel_QkvE4m3OBfloat16H64SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK1SageV1PersistentContext_cubin_len;
-extern unsigned int FmhaSm103aKernel_QkvE4m3OBfloat16H64SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK1SageV1StaticContext_cubin_len;
-extern unsigned int FmhaSm103aKernel_QkvE4m3OBfloat16H64SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK4SageV1PersistentContext_cubin_len;
-extern unsigned int FmhaSm103aKernel_QkvE4m3OBfloat16H64SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK4SageV1StaticContext_cubin_len;
-extern unsigned int FmhaSm103aKernel_QkvE4m3OE4m3H128SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK1SageV1PersistentContext_cubin_len;
-extern unsigned int FmhaSm103aKernel_QkvE4m3OE4m3H128SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK1SageV1StaticContext_cubin_len;
-extern unsigned int FmhaSm103aKernel_QkvE4m3OE4m3H128SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK4SageV1PersistentContext_cubin_len;
-extern unsigned int FmhaSm103aKernel_QkvE4m3OE4m3H128SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK4SageV1StaticContext_cubin_len;
-extern unsigned int FmhaSm103aKernel_QkvE4m3OE4m3H64SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK1SageV1PersistentContext_cubin_len;
-extern unsigned int FmhaSm103aKernel_QkvE4m3OE4m3H64SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK1SageV1StaticContext_cubin_len;
-extern unsigned int FmhaSm103aKernel_QkvE4m3OE4m3H64SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK4SageV1PersistentContext_cubin_len;
-extern unsigned int FmhaSm103aKernel_QkvE4m3OE4m3H64SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK4SageV1StaticContext_cubin_len;
-#endif // EXCLUDE_SM_103
-
-
-struct TllmGenFmhaKernelMetaInfoVx : public TllmGenFmhaKernelMetaInfo
-{
-    int mMaxNumHeadsQPerKvInCta;
-    int mNumEltsPerSageAttnBlkQ;
-    int mNumEltsPerSageAttnBlkK;
-    int mNumEltsPerSageAttnBlkP;
-    int mNumEltsPerSageAttnBlkV;
-    Data_type mDataTypeQkReinterpret;
-    bool mIsVisualGenKernel;
-
-    TllmGenFmhaKernelMetaInfoVx(const TllmGenFmhaKernelMetaInfoVx& _) = default;
-
-    TllmGenFmhaKernelMetaInfoVx(const TllmGenFmhaKernelMetaInfo& metaInfo)
-        : TllmGenFmhaKernelMetaInfo(metaInfo)
-        , mMaxNumHeadsQPerKvInCta(1)
-        , mNumEltsPerSageAttnBlkQ(0)
-        , mNumEltsPerSageAttnBlkK(0)
-        , mNumEltsPerSageAttnBlkP(0)
-        , mNumEltsPerSageAttnBlkV(0)
-        , mDataTypeQkReinterpret(DATA_TYPE_E4M3)
-        , mIsVisualGenKernel(false)
-    {
-    }
-
-    TllmGenFmhaKernelMetaInfoVx(Data_type dataTypeQ, Data_type dataTypeKv, Data_type dataTypeO, int tileSizeQ,
-        int tileSizeKv, int stepQ, int stepKv, int headDimPerCtaV, int headDimQk, int headDimV, int sm,
-        unsigned char const* cubin, unsigned int cubinSize, char const* funcName, int sharedMemBytes,
-        int threadsPerCTA, int qkvLayout, int numTokensPerPage, int maskType, int kernelType,
-        int maxNumHeadsQPerKvInCta, int tileScheduler, int multiCtasKvMode, int numEltsPerSageAttnBlkQ,
-        int numEltsPerSageAttnBlkK, int numEltsPerSageAttnBlkP, int numEltsPerSageAttnBlkV, bool groupsHeadsQ,
-        bool groupsTokensHeadsQ, bool reuseSmemKForV, bool uses2CtaMma, bool sparseMla, bool skipsSoftmaxWhenPossible,
-        Data_type dataTypeQkReinterpret, char const* sha256)
-        : TllmGenFmhaKernelMetaInfo{dataTypeQ, dataTypeKv, dataTypeO, tileSizeQ, tileSizeKv, stepQ, stepKv,
-            headDimPerCtaV, headDimQk, headDimV, sm, cubin, cubinSize, funcName, sharedMemBytes, threadsPerCTA,
-            qkvLayout, numTokensPerPage, maskType, kernelType, tileScheduler, multiCtasKvMode, groupsHeadsQ,
-            groupsTokensHeadsQ, reuseSmemKForV, uses2CtaMma, sparseMla, skipsSoftmaxWhenPossible, false, false, sha256}
-        , mMaxNumHeadsQPerKvInCta(maxNumHeadsQPerKvInCta)
-        , mNumEltsPerSageAttnBlkQ(numEltsPerSageAttnBlkQ)
-        , mNumEltsPerSageAttnBlkK(numEltsPerSageAttnBlkK)
-        , mNumEltsPerSageAttnBlkP(numEltsPerSageAttnBlkP)
-        , mNumEltsPerSageAttnBlkV(numEltsPerSageAttnBlkV)
-        , mDataTypeQkReinterpret(dataTypeQkReinterpret)
-        , mIsVisualGenKernel(true)
-    {
-    }
-};
-
-static const TllmGenFmhaKernelMetaInfoVx sTllmGenFmhaKernelMetaInfosVx[] = {
-#ifndef EXCLUDE_SM_100
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 256, 128, 128, 128, 128, kSM_100, FmhaSm100aKernel_QkInt8VE4m3OBfloat16HQk128HV128SeparateQkvDenseVarSeqQ128Kv128PersistentContext_cubin, FmhaSm100aKernel_QkInt8VE4m3OBfloat16HQk128HV128SeparateQkvDenseVarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm100aKernel_QkInt8VE4m3OBfloat16HQk128HV128SeparateQkvDenseVarSeqQ128Kv128PersistentContext", 82256, 512, 0, 0, 0, 0, 1, 1, 0, 0, 0, 0, 0, false, false, false, false, false, false, DATA_TYPE_INT8, "8f3878f975a0ad7376de4692ee2a5e837fb33f4383f640856adf71655812354f"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 256, 128, 128, 128, 128, kSM_100, FmhaSm100aKernel_QkInt8VE4m3OBfloat16HQk128HV128SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK16SageV1PersistentContext_cubin, FmhaSm100aKernel_QkInt8VE4m3OBfloat16HQk128HV128SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK16SageV1PersistentContext_cubin_len, "fmhaSm100aKernel_QkInt8VE4m3OBfloat16HQk128HV128SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK16SageV1PersistentContext", 84592, 512, 0, 0, 0, 0, 1, 1, 0, 1, 16, 0, 1, false, false, false, false, false, false, DATA_TYPE_INT8, "b534bc8bace61ef380d00a5e07c60c19bae919541499a673a233db4591daaaa7"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 256, 128, 128, 128, 128, kSM_100, FmhaSm100aKernel_QkInt8VE4m3OBfloat16HQk128HV128SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK16SageV1StaticContext_cubin, FmhaSm100aKernel_QkInt8VE4m3OBfloat16HQk128HV128SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK16SageV1StaticContext_cubin_len, "fmhaSm100aKernel_QkInt8VE4m3OBfloat16HQk128HV128SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK16SageV1StaticContext", 84496, 512, 0, 0, 0, 0, 1, 0, 0, 1, 16, 0, 1, false, false, false, false, false, false, DATA_TYPE_INT8, "8b7e9620ba0dff3e2fd4770062f7d8255cb5ece95518834073664b274df1d2d4"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 256, 128, 128, 128, 128, kSM_100, FmhaSm100aKernel_QkInt8VE4m3OBfloat16HQk128HV128SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK1SageV1PersistentContext_cubin, FmhaSm100aKernel_QkInt8VE4m3OBfloat16HQk128HV128SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK1SageV1PersistentContext_cubin_len, "fmhaSm100aKernel_QkInt8VE4m3OBfloat16HQk128HV128SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK1SageV1PersistentContext", 87472, 512, 0, 0, 0, 0, 1, 1, 0, 1, 1, 0, 1, false, false, false, false, false, false, DATA_TYPE_INT8, "87f3c78bff4ea9b14a6cda097824511edc50e0a01ba191f704f951497bb0035a"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 256, 128, 128, 128, 128, kSM_100, FmhaSm100aKernel_QkInt8VE4m3OBfloat16HQk128HV128SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK1SageV1StaticContext_cubin, FmhaSm100aKernel_QkInt8VE4m3OBfloat16HQk128HV128SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK1SageV1StaticContext_cubin_len, "fmhaSm100aKernel_QkInt8VE4m3OBfloat16HQk128HV128SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK1SageV1StaticContext", 87376, 512, 0, 0, 0, 0, 1, 0, 0, 1, 1, 0, 1, false, false, false, false, false, false, DATA_TYPE_INT8, "37541117eea6e5175f6cd0667ab580f773c0ef139cb624ab636f3995fa2402ba"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 256, 128, 128, 128, 128, kSM_100, FmhaSm100aKernel_QkInt8VE4m3OBfloat16HQk128HV128SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK4SageV1PersistentContext_cubin, FmhaSm100aKernel_QkInt8VE4m3OBfloat16HQk128HV128SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK4SageV1PersistentContext_cubin_len, "fmhaSm100aKernel_QkInt8VE4m3OBfloat16HQk128HV128SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK4SageV1PersistentContext", 85168, 512, 0, 0, 0, 0, 1, 1, 0, 1, 4, 0, 1, false, false, false, false, false, false, DATA_TYPE_INT8, "a5a2296a83b5db73b3900ad9ed2c0b1560c3070c52cbe93198bfc22f3263eb94"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 256, 128, 128, 128, 128, kSM_100, FmhaSm100aKernel_QkInt8VE4m3OBfloat16HQk128HV128SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK4SageV1StaticContext_cubin, FmhaSm100aKernel_QkInt8VE4m3OBfloat16HQk128HV128SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK4SageV1StaticContext_cubin_len, "fmhaSm100aKernel_QkInt8VE4m3OBfloat16HQk128HV128SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK4SageV1StaticContext", 85072, 512, 0, 0, 0, 0, 1, 0, 0, 1, 4, 0, 1, false, false, false, false, false, false, DATA_TYPE_INT8, "14cc78addc0f3d77477ddd3315bcd0082e4dd0e5c647787572ae5f3acf313b28"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 256, 128, 128, 128, 128, kSM_100, FmhaSm100aKernel_QkInt8VE4m3OBfloat16HQk128HV128SeparateQkvDenseVarSeqQ128Kv128StaticContext_cubin, FmhaSm100aKernel_QkInt8VE4m3OBfloat16HQk128HV128SeparateQkvDenseVarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm100aKernel_QkInt8VE4m3OBfloat16HQk128HV128SeparateQkvDenseVarSeqQ128Kv128StaticContext", 82160, 512, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, false, false, false, false, false, false, DATA_TYPE_INT8, "ae930b887dc11ff557e0f10872c8903d1ff813735c9cdaf3291599c51d5b885b"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 256, 128, 128, 256, 128, kSM_100, FmhaSm100aKernel_QkInt8VE4m3OBfloat16HQk256HV128SeparateQkvDenseVarSeqQ128Kv128PersistentContext_cubin, FmhaSm100aKernel_QkInt8VE4m3OBfloat16HQk256HV128SeparateQkvDenseVarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm100aKernel_QkInt8VE4m3OBfloat16HQk256HV128SeparateQkvDenseVarSeqQ128Kv128PersistentContext", 115024, 512, 0, 0, 0, 0, 1, 1, 0, 0, 0, 0, 0, false, false, false, false, false, false, DATA_TYPE_INT8, "f1674363043afaccbf94427d079ede81398cea5e4ae9e3025762aa16cd9d5ee5"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 256, 128, 128, 256, 128, kSM_100, FmhaSm100aKernel_QkInt8VE4m3OBfloat16HQk256HV128SeparateQkvDenseVarSeqQ128Kv128StaticContext_cubin, FmhaSm100aKernel_QkInt8VE4m3OBfloat16HQk256HV128SeparateQkvDenseVarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm100aKernel_QkInt8VE4m3OBfloat16HQk256HV128SeparateQkvDenseVarSeqQ128Kv128StaticContext", 114928, 512, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, false, false, false, false, false, false, DATA_TYPE_INT8, "08326301e95f7b5f3278c4362c275e0275c19f5df2a57a27c02056f19d820fdf"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 128, 128, 256, 256, 256, kSM_100, FmhaSm100aKernel_QkInt8VE4m3OBfloat16HQk256HV256SeparateQkvDenseVarSeqQ128Kv128PersistentContext_cubin, FmhaSm100aKernel_QkInt8VE4m3OBfloat16HQk256HV256SeparateQkvDenseVarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm100aKernel_QkInt8VE4m3OBfloat16HQk256HV256SeparateQkvDenseVarSeqQ128Kv128PersistentContext", 213408, 384, 0, 0, 0, 0, 1, 1, 0, 0, 0, 0, 0, false, false, false, false, false, false, DATA_TYPE_INT8, "0286d832a5971b24e10eee0beacc63c0d7806d808634376069ebf2bf06c6ab39"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 128, 128, 256, 256, 256, kSM_100, FmhaSm100aKernel_QkInt8VE4m3OBfloat16HQk256HV256SeparateQkvDenseVarSeqQ128Kv128StaticContext_cubin, FmhaSm100aKernel_QkInt8VE4m3OBfloat16HQk256HV256SeparateQkvDenseVarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm100aKernel_QkInt8VE4m3OBfloat16HQk256HV256SeparateQkvDenseVarSeqQ128Kv128StaticContext", 213312, 384, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, false, false, false, false, false, false, DATA_TYPE_INT8, "e00569d4cda3a8c6e2fa661d964d7cbf95c6e68c8a80f4ea47b6ed1221a3874c"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 256, 128, 64, 64, 64, kSM_100, FmhaSm100aKernel_QkInt8VE4m3OBfloat16HQk64HV64SeparateQkvDenseVarSeqQ128Kv128PersistentContext_cubin, FmhaSm100aKernel_QkInt8VE4m3OBfloat16HQk64HV64SeparateQkvDenseVarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm100aKernel_QkInt8VE4m3OBfloat16HQk64HV64SeparateQkvDenseVarSeqQ128Kv128PersistentContext", 41296, 512, 0, 0, 0, 0, 1, 1, 0, 0, 0, 0, 0, false, false, false, false, false, false, DATA_TYPE_INT8, "c90824f4067faa894ec3950ba9df44c43f1a11abb1e8928f8398cd7ade2db84d"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 256, 128, 64, 64, 64, kSM_100, FmhaSm100aKernel_QkInt8VE4m3OBfloat16HQk64HV64SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK16SageV1PersistentContext_cubin, FmhaSm100aKernel_QkInt8VE4m3OBfloat16HQk64HV64SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK16SageV1PersistentContext_cubin_len, "fmhaSm100aKernel_QkInt8VE4m3OBfloat16HQk64HV64SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK16SageV1PersistentContext", 43120, 512, 0, 0, 0, 0, 1, 1, 0, 1, 16, 0, 1, false, false, false, false, false, false, DATA_TYPE_INT8, "6776850123824987a9921edfdc2b90c190bd6ea060286bf9209896b0ef6d99f2"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 256, 128, 64, 64, 64, kSM_100, FmhaSm100aKernel_QkInt8VE4m3OBfloat16HQk64HV64SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK16SageV1StaticContext_cubin, FmhaSm100aKernel_QkInt8VE4m3OBfloat16HQk64HV64SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK16SageV1StaticContext_cubin_len, "fmhaSm100aKernel_QkInt8VE4m3OBfloat16HQk64HV64SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK16SageV1StaticContext", 43024, 512, 0, 0, 0, 0, 1, 0, 0, 1, 16, 0, 1, false, false, false, false, false, false, DATA_TYPE_INT8, "dc35b138e9bcbfde07f88de2d451eec15d30de984da87cfe129005f45fe0bdd4"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 256, 128, 64, 64, 64, kSM_100, FmhaSm100aKernel_QkInt8VE4m3OBfloat16HQk64HV64SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK1SageV1PersistentContext_cubin, FmhaSm100aKernel_QkInt8VE4m3OBfloat16HQk64HV64SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK1SageV1PersistentContext_cubin_len, "fmhaSm100aKernel_QkInt8VE4m3OBfloat16HQk64HV64SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK1SageV1PersistentContext", 46000, 512, 0, 0, 0, 0, 1, 1, 0, 1, 1, 0, 1, false, false, false, false, false, false, DATA_TYPE_INT8, "a75cf8647db75dbc77d7f9451499894beb18d4df2e9fab1594c2fe5c26c0668d"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 256, 128, 64, 64, 64, kSM_100, FmhaSm100aKernel_QkInt8VE4m3OBfloat16HQk64HV64SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK1SageV1StaticContext_cubin, FmhaSm100aKernel_QkInt8VE4m3OBfloat16HQk64HV64SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK1SageV1StaticContext_cubin_len, "fmhaSm100aKernel_QkInt8VE4m3OBfloat16HQk64HV64SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK1SageV1StaticContext", 45904, 512, 0, 0, 0, 0, 1, 0, 0, 1, 1, 0, 1, false, false, false, false, false, false, DATA_TYPE_INT8, "c9cfe54a1a9ca628565519ec279fb77adcd34b1ebe18eead69799c11f7bbe8e2"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 256, 128, 64, 64, 64, kSM_100, FmhaSm100aKernel_QkInt8VE4m3OBfloat16HQk64HV64SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK4SageV1PersistentContext_cubin, FmhaSm100aKernel_QkInt8VE4m3OBfloat16HQk64HV64SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK4SageV1PersistentContext_cubin_len, "fmhaSm100aKernel_QkInt8VE4m3OBfloat16HQk64HV64SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK4SageV1PersistentContext", 43696, 512, 0, 0, 0, 0, 1, 1, 0, 1, 4, 0, 1, false, false, false, false, false, false, DATA_TYPE_INT8, "4eec641062c38fcb628d8690568ec70bc05f81ed8b32454ae8e8e8335f4833c8"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 256, 128, 64, 64, 64, kSM_100, FmhaSm100aKernel_QkInt8VE4m3OBfloat16HQk64HV64SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK4SageV1StaticContext_cubin, FmhaSm100aKernel_QkInt8VE4m3OBfloat16HQk64HV64SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK4SageV1StaticContext_cubin_len, "fmhaSm100aKernel_QkInt8VE4m3OBfloat16HQk64HV64SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK4SageV1StaticContext", 43600, 512, 0, 0, 0, 0, 1, 0, 0, 1, 4, 0, 1, false, false, false, false, false, false, DATA_TYPE_INT8, "c487aa106f68896af4680cd1e5aee15631b2074fc0c7850afd66379c5247228e"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 256, 128, 64, 64, 64, kSM_100, FmhaSm100aKernel_QkInt8VE4m3OBfloat16HQk64HV64SeparateQkvDenseVarSeqQ128Kv128StaticContext_cubin, FmhaSm100aKernel_QkInt8VE4m3OBfloat16HQk64HV64SeparateQkvDenseVarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm100aKernel_QkInt8VE4m3OBfloat16HQk64HV64SeparateQkvDenseVarSeqQ128Kv128StaticContext", 41200, 512, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, false, false, false, false, false, false, DATA_TYPE_INT8, "e4488d03a1755aa56030a926c249acbb47173f9aa28fbcceac8fbbbca57a9a7b"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 256, 128, 128, 128, 128, kSM_100, FmhaSm100aKernel_QkInt8VE4m3OE4m3HQk128HV128SeparateQkvDenseVarSeqQ128Kv128PersistentContext_cubin, FmhaSm100aKernel_QkInt8VE4m3OE4m3HQk128HV128SeparateQkvDenseVarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm100aKernel_QkInt8VE4m3OE4m3HQk128HV128SeparateQkvDenseVarSeqQ128Kv128PersistentContext", 82256, 512, 0, 0, 0, 0, 1, 1, 0, 0, 0, 0, 0, false, false, false, false, false, false, DATA_TYPE_INT8, "e3a2630f3dfbdb6f5208b97e389cd5e24cdca5a050cb0b561aa8ee1dc55ffce5"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 256, 128, 128, 128, 128, kSM_100, FmhaSm100aKernel_QkInt8VE4m3OE4m3HQk128HV128SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK16SageV1PersistentContext_cubin, FmhaSm100aKernel_QkInt8VE4m3OE4m3HQk128HV128SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK16SageV1PersistentContext_cubin_len, "fmhaSm100aKernel_QkInt8VE4m3OE4m3HQk128HV128SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK16SageV1PersistentContext", 84592, 512, 0, 0, 0, 0, 1, 1, 0, 1, 16, 0, 1, false, false, false, false, false, false, DATA_TYPE_INT8, "765f191d5433f725752a84de0d7c9258003d1206fc69ff97d83b4395c70d3242"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 256, 128, 128, 128, 128, kSM_100, FmhaSm100aKernel_QkInt8VE4m3OE4m3HQk128HV128SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK16SageV1StaticContext_cubin, FmhaSm100aKernel_QkInt8VE4m3OE4m3HQk128HV128SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK16SageV1StaticContext_cubin_len, "fmhaSm100aKernel_QkInt8VE4m3OE4m3HQk128HV128SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK16SageV1StaticContext", 84496, 512, 0, 0, 0, 0, 1, 0, 0, 1, 16, 0, 1, false, false, false, false, false, false, DATA_TYPE_INT8, "11044a336aaadc59dde2561dc6ea43919ebe08e66a73daa966ea3b344bc70fe2"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 256, 128, 128, 128, 128, kSM_100, FmhaSm100aKernel_QkInt8VE4m3OE4m3HQk128HV128SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK1SageV1PersistentContext_cubin, FmhaSm100aKernel_QkInt8VE4m3OE4m3HQk128HV128SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK1SageV1PersistentContext_cubin_len, "fmhaSm100aKernel_QkInt8VE4m3OE4m3HQk128HV128SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK1SageV1PersistentContext", 87472, 512, 0, 0, 0, 0, 1, 1, 0, 1, 1, 0, 1, false, false, false, false, false, false, DATA_TYPE_INT8, "1b02ae223007bfe4ce20278cbfc08f38e9ba905e2e13a0b31425d0506d071b78"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 256, 128, 128, 128, 128, kSM_100, FmhaSm100aKernel_QkInt8VE4m3OE4m3HQk128HV128SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK1SageV1StaticContext_cubin, FmhaSm100aKernel_QkInt8VE4m3OE4m3HQk128HV128SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK1SageV1StaticContext_cubin_len, "fmhaSm100aKernel_QkInt8VE4m3OE4m3HQk128HV128SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK1SageV1StaticContext", 87376, 512, 0, 0, 0, 0, 1, 0, 0, 1, 1, 0, 1, false, false, false, false, false, false, DATA_TYPE_INT8, "49b4fd2aabc81f979f91c9adedb978dcec607a88561b4da137d575ad13132526"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 256, 128, 128, 128, 128, kSM_100, FmhaSm100aKernel_QkInt8VE4m3OE4m3HQk128HV128SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK4SageV1PersistentContext_cubin, FmhaSm100aKernel_QkInt8VE4m3OE4m3HQk128HV128SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK4SageV1PersistentContext_cubin_len, "fmhaSm100aKernel_QkInt8VE4m3OE4m3HQk128HV128SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK4SageV1PersistentContext", 85168, 512, 0, 0, 0, 0, 1, 1, 0, 1, 4, 0, 1, false, false, false, false, false, false, DATA_TYPE_INT8, "1c8927eaeee08b55d00c9e3afc5ce57b00df4a2e504a7add1da47efeb59e0b9d"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 256, 128, 128, 128, 128, kSM_100, FmhaSm100aKernel_QkInt8VE4m3OE4m3HQk128HV128SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK4SageV1StaticContext_cubin, FmhaSm100aKernel_QkInt8VE4m3OE4m3HQk128HV128SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK4SageV1StaticContext_cubin_len, "fmhaSm100aKernel_QkInt8VE4m3OE4m3HQk128HV128SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK4SageV1StaticContext", 85072, 512, 0, 0, 0, 0, 1, 0, 0, 1, 4, 0, 1, false, false, false, false, false, false, DATA_TYPE_INT8, "9022759eab0837b8247055f88572b2226f1d83bf4683dee1ffffed01f23e0c71"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 256, 128, 128, 128, 128, kSM_100, FmhaSm100aKernel_QkInt8VE4m3OE4m3HQk128HV128SeparateQkvDenseVarSeqQ128Kv128StaticContext_cubin, FmhaSm100aKernel_QkInt8VE4m3OE4m3HQk128HV128SeparateQkvDenseVarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm100aKernel_QkInt8VE4m3OE4m3HQk128HV128SeparateQkvDenseVarSeqQ128Kv128StaticContext", 82160, 512, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, false, false, false, false, false, false, DATA_TYPE_INT8, "d18c9c57feee8216f646e9079e58f96d9872c8ddf02e6a3894bd3e93a7d87dd7"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 256, 128, 128, 256, 128, kSM_100, FmhaSm100aKernel_QkInt8VE4m3OE4m3HQk256HV128SeparateQkvDenseVarSeqQ128Kv128PersistentContext_cubin, FmhaSm100aKernel_QkInt8VE4m3OE4m3HQk256HV128SeparateQkvDenseVarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm100aKernel_QkInt8VE4m3OE4m3HQk256HV128SeparateQkvDenseVarSeqQ128Kv128PersistentContext", 115024, 512, 0, 0, 0, 0, 1, 1, 0, 0, 0, 0, 0, false, false, false, false, false, false, DATA_TYPE_INT8, "62c7258c3aaed2062b124b4240024092cc55b2fe740fb82f0b824d082da1866d"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 256, 128, 128, 256, 128, kSM_100, FmhaSm100aKernel_QkInt8VE4m3OE4m3HQk256HV128SeparateQkvDenseVarSeqQ128Kv128StaticContext_cubin, FmhaSm100aKernel_QkInt8VE4m3OE4m3HQk256HV128SeparateQkvDenseVarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm100aKernel_QkInt8VE4m3OE4m3HQk256HV128SeparateQkvDenseVarSeqQ128Kv128StaticContext", 114928, 512, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, false, false, false, false, false, false, DATA_TYPE_INT8, "0b5d30569048492adeda6d14500090d2a5f00b2df89cd91c906b3ecd9d7326ea"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 128, 128, 256, 256, 256, kSM_100, FmhaSm100aKernel_QkInt8VE4m3OE4m3HQk256HV256SeparateQkvDenseVarSeqQ128Kv128PersistentContext_cubin, FmhaSm100aKernel_QkInt8VE4m3OE4m3HQk256HV256SeparateQkvDenseVarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm100aKernel_QkInt8VE4m3OE4m3HQk256HV256SeparateQkvDenseVarSeqQ128Kv128PersistentContext", 213408, 384, 0, 0, 0, 0, 1, 1, 0, 0, 0, 0, 0, false, false, false, false, false, false, DATA_TYPE_INT8, "d5a15f1369befef789608dfe76473fe3ee097f5751f85c4ee1be87a8deee8d26"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 128, 128, 256, 256, 256, kSM_100, FmhaSm100aKernel_QkInt8VE4m3OE4m3HQk256HV256SeparateQkvDenseVarSeqQ128Kv128StaticContext_cubin, FmhaSm100aKernel_QkInt8VE4m3OE4m3HQk256HV256SeparateQkvDenseVarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm100aKernel_QkInt8VE4m3OE4m3HQk256HV256SeparateQkvDenseVarSeqQ128Kv128StaticContext", 213312, 384, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, false, false, false, false, false, false, DATA_TYPE_INT8, "505831e5ff1fcf75eaeb1bf76dba86328db9048a237135b6bdb22105b93d67ea"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 256, 128, 64, 64, 64, kSM_100, FmhaSm100aKernel_QkInt8VE4m3OE4m3HQk64HV64SeparateQkvDenseVarSeqQ128Kv128PersistentContext_cubin, FmhaSm100aKernel_QkInt8VE4m3OE4m3HQk64HV64SeparateQkvDenseVarSeqQ128Kv128PersistentContext_cubin_len, "fmhaSm100aKernel_QkInt8VE4m3OE4m3HQk64HV64SeparateQkvDenseVarSeqQ128Kv128PersistentContext", 41296, 512, 0, 0, 0, 0, 1, 1, 0, 0, 0, 0, 0, false, false, false, false, false, false, DATA_TYPE_INT8, "17030b7c54a7de05c3e6b69a08d3b8154c74b7b4ff85f58d6bfca7abbb8cca47"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 256, 128, 64, 64, 64, kSM_100, FmhaSm100aKernel_QkInt8VE4m3OE4m3HQk64HV64SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK16SageV1PersistentContext_cubin, FmhaSm100aKernel_QkInt8VE4m3OE4m3HQk64HV64SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK16SageV1PersistentContext_cubin_len, "fmhaSm100aKernel_QkInt8VE4m3OE4m3HQk64HV64SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK16SageV1PersistentContext", 43120, 512, 0, 0, 0, 0, 1, 1, 0, 1, 16, 0, 1, false, false, false, false, false, false, DATA_TYPE_INT8, "b123ddc3e8653ea5e7b14ae1e2dac928bd5ec6ffb7d6a7115f289f79f0d01906"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 256, 128, 64, 64, 64, kSM_100, FmhaSm100aKernel_QkInt8VE4m3OE4m3HQk64HV64SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK16SageV1StaticContext_cubin, FmhaSm100aKernel_QkInt8VE4m3OE4m3HQk64HV64SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK16SageV1StaticContext_cubin_len, "fmhaSm100aKernel_QkInt8VE4m3OE4m3HQk64HV64SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK16SageV1StaticContext", 43024, 512, 0, 0, 0, 0, 1, 0, 0, 1, 16, 0, 1, false, false, false, false, false, false, DATA_TYPE_INT8, "2efaf38abe9f115ef4c4b9ee65638103c23a0cc5b4d3f185e88a8cc9cf5fb2c1"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 256, 128, 64, 64, 64, kSM_100, FmhaSm100aKernel_QkInt8VE4m3OE4m3HQk64HV64SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK1SageV1PersistentContext_cubin, FmhaSm100aKernel_QkInt8VE4m3OE4m3HQk64HV64SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK1SageV1PersistentContext_cubin_len, "fmhaSm100aKernel_QkInt8VE4m3OE4m3HQk64HV64SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK1SageV1PersistentContext", 46000, 512, 0, 0, 0, 0, 1, 1, 0, 1, 1, 0, 1, false, false, false, false, false, false, DATA_TYPE_INT8, "ccb139fda40d52b3eb9c718db0572bcee9045dd86c1c9290871c245e07698a2f"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 256, 128, 64, 64, 64, kSM_100, FmhaSm100aKernel_QkInt8VE4m3OE4m3HQk64HV64SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK1SageV1StaticContext_cubin, FmhaSm100aKernel_QkInt8VE4m3OE4m3HQk64HV64SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK1SageV1StaticContext_cubin_len, "fmhaSm100aKernel_QkInt8VE4m3OE4m3HQk64HV64SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK1SageV1StaticContext", 45904, 512, 0, 0, 0, 0, 1, 0, 0, 1, 1, 0, 1, false, false, false, false, false, false, DATA_TYPE_INT8, "1ccc69cd4bf7c9bcd7247b2d77db7337ab94775f31b416461005039cbe07f571"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 256, 128, 64, 64, 64, kSM_100, FmhaSm100aKernel_QkInt8VE4m3OE4m3HQk64HV64SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK4SageV1PersistentContext_cubin, FmhaSm100aKernel_QkInt8VE4m3OE4m3HQk64HV64SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK4SageV1PersistentContext_cubin_len, "fmhaSm100aKernel_QkInt8VE4m3OE4m3HQk64HV64SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK4SageV1PersistentContext", 43696, 512, 0, 0, 0, 0, 1, 1, 0, 1, 4, 0, 1, false, false, false, false, false, false, DATA_TYPE_INT8, "837d8ec097e6ecaf577be6c06062f150c48e6ebd25f798b329c8f2fc1ce1fcb0"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 256, 128, 64, 64, 64, kSM_100, FmhaSm100aKernel_QkInt8VE4m3OE4m3HQk64HV64SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK4SageV1StaticContext_cubin, FmhaSm100aKernel_QkInt8VE4m3OE4m3HQk64HV64SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK4SageV1StaticContext_cubin_len, "fmhaSm100aKernel_QkInt8VE4m3OE4m3HQk64HV64SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK4SageV1StaticContext", 43600, 512, 0, 0, 0, 0, 1, 0, 0, 1, 4, 0, 1, false, false, false, false, false, false, DATA_TYPE_INT8, "856802146d648769724058770bf00bb6cd06e26267426ef2536b60d1977f40dc"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 256, 128, 64, 64, 64, kSM_100, FmhaSm100aKernel_QkInt8VE4m3OE4m3HQk64HV64SeparateQkvDenseVarSeqQ128Kv128StaticContext_cubin, FmhaSm100aKernel_QkInt8VE4m3OE4m3HQk64HV64SeparateQkvDenseVarSeqQ128Kv128StaticContext_cubin_len, "fmhaSm100aKernel_QkInt8VE4m3OE4m3HQk64HV64SeparateQkvDenseVarSeqQ128Kv128StaticContext", 41200, 512, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, false, false, false, false, false, false, DATA_TYPE_INT8, "e6e6bd7f2b13efb5fb98a9e192daf36c86e25d2ca81cfa0b931aa6a0839c3880"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 256, 128, 128, 128, 128, kSM_100, FmhaSm100aKernel_QkvE4m3OBfloat16H128SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK1SageV1PersistentContext_cubin, FmhaSm100aKernel_QkvE4m3OBfloat16H128SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK1SageV1PersistentContext_cubin_len, "fmhaSm100aKernel_QkvE4m3OBfloat16H128SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK1SageV1PersistentContext", 87472, 512, 0, 0, 0, 0, 1, 1, 0, 1, 1, 0, 1, false, false, false, false, false, false, DATA_TYPE_E4M3, "9605f068825236d0d64979eb8416e04e7e6ef6cf04e4b93cb65e87769480860d"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 256, 128, 128, 128, 128, kSM_100, FmhaSm100aKernel_QkvE4m3OBfloat16H128SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK1SageV1StaticContext_cubin, FmhaSm100aKernel_QkvE4m3OBfloat16H128SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK1SageV1StaticContext_cubin_len, "fmhaSm100aKernel_QkvE4m3OBfloat16H128SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK1SageV1StaticContext", 87376, 512, 0, 0, 0, 0, 1, 0, 0, 1, 1, 0, 1, false, false, false, false, false, false, DATA_TYPE_E4M3, "62f0d9d5db9a40b4ec0af25835281f71ff8900e31350e64232e7b3f5c257342d"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 256, 128, 128, 128, 128, kSM_100, FmhaSm100aKernel_QkvE4m3OBfloat16H128SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK4SageV1PersistentContext_cubin, FmhaSm100aKernel_QkvE4m3OBfloat16H128SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK4SageV1PersistentContext_cubin_len, "fmhaSm100aKernel_QkvE4m3OBfloat16H128SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK4SageV1PersistentContext", 85168, 512, 0, 0, 0, 0, 1, 1, 0, 1, 4, 0, 1, false, false, false, false, false, false, DATA_TYPE_E4M3, "77f7fd386b6fb49dd39ff13a30130109772be2b6d7e97bcae4d673474d2474dd"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 256, 128, 128, 128, 128, kSM_100, FmhaSm100aKernel_QkvE4m3OBfloat16H128SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK4SageV1StaticContext_cubin, FmhaSm100aKernel_QkvE4m3OBfloat16H128SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK4SageV1StaticContext_cubin_len, "fmhaSm100aKernel_QkvE4m3OBfloat16H128SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK4SageV1StaticContext", 85072, 512, 0, 0, 0, 0, 1, 0, 0, 1, 4, 0, 1, false, false, false, false, false, false, DATA_TYPE_E4M3, "d5051a8380ab5642e7c0d6892af33270a8d08eec399ff5ee8498361d2ffa225e"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 256, 128, 64, 64, 64, kSM_100, FmhaSm100aKernel_QkvE4m3OBfloat16H64SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK1SageV1PersistentContext_cubin, FmhaSm100aKernel_QkvE4m3OBfloat16H64SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK1SageV1PersistentContext_cubin_len, "fmhaSm100aKernel_QkvE4m3OBfloat16H64SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK1SageV1PersistentContext", 46000, 512, 0, 0, 0, 0, 1, 1, 0, 1, 1, 0, 1, false, false, false, false, false, false, DATA_TYPE_E4M3, "b7b00a5970cdaeb3907aac53fbd921bb340aaa8fa233f9da1b0b25dee1906c1b"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 256, 128, 64, 64, 64, kSM_100, FmhaSm100aKernel_QkvE4m3OBfloat16H64SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK1SageV1StaticContext_cubin, FmhaSm100aKernel_QkvE4m3OBfloat16H64SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK1SageV1StaticContext_cubin_len, "fmhaSm100aKernel_QkvE4m3OBfloat16H64SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK1SageV1StaticContext", 45904, 512, 0, 0, 0, 0, 1, 0, 0, 1, 1, 0, 1, false, false, false, false, false, false, DATA_TYPE_E4M3, "8b54f367d06b59eb9adf95c0f127965b30acbe17d450abe7f23d8236a8890f73"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 256, 128, 64, 64, 64, kSM_100, FmhaSm100aKernel_QkvE4m3OBfloat16H64SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK4SageV1PersistentContext_cubin, FmhaSm100aKernel_QkvE4m3OBfloat16H64SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK4SageV1PersistentContext_cubin_len, "fmhaSm100aKernel_QkvE4m3OBfloat16H64SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK4SageV1PersistentContext", 43696, 512, 0, 0, 0, 0, 1, 1, 0, 1, 4, 0, 1, false, false, false, false, false, false, DATA_TYPE_E4M3, "fbde9b50fe57d6d4854b24d873af47df1cca94ce15c8aafae71f1bdbe588b203"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 256, 128, 64, 64, 64, kSM_100, FmhaSm100aKernel_QkvE4m3OBfloat16H64SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK4SageV1StaticContext_cubin, FmhaSm100aKernel_QkvE4m3OBfloat16H64SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK4SageV1StaticContext_cubin_len, "fmhaSm100aKernel_QkvE4m3OBfloat16H64SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK4SageV1StaticContext", 43600, 512, 0, 0, 0, 0, 1, 0, 0, 1, 4, 0, 1, false, false, false, false, false, false, DATA_TYPE_E4M3, "b415caad71d5fb370fc327c449fe4f855b8b12bafa7e638cf10049f7d1fe7f8c"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 256, 128, 128, 128, 128, kSM_100, FmhaSm100aKernel_QkvE4m3OE4m3H128SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK1SageV1PersistentContext_cubin, FmhaSm100aKernel_QkvE4m3OE4m3H128SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK1SageV1PersistentContext_cubin_len, "fmhaSm100aKernel_QkvE4m3OE4m3H128SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK1SageV1PersistentContext", 87472, 512, 0, 0, 0, 0, 1, 1, 0, 1, 1, 0, 1, false, false, false, false, false, false, DATA_TYPE_E4M3, "a71064cccbc75f2f3d1b7d0804cbdc24dbdaa09b434a2cc49475af8f1c717734"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 256, 128, 128, 128, 128, kSM_100, FmhaSm100aKernel_QkvE4m3OE4m3H128SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK1SageV1StaticContext_cubin, FmhaSm100aKernel_QkvE4m3OE4m3H128SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK1SageV1StaticContext_cubin_len, "fmhaSm100aKernel_QkvE4m3OE4m3H128SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK1SageV1StaticContext", 87376, 512, 0, 0, 0, 0, 1, 0, 0, 1, 1, 0, 1, false, false, false, false, false, false, DATA_TYPE_E4M3, "2d4e9ff6641baf6fd8c38ba19580e96f89d20731bf4f0d223e3c178d29441071"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 256, 128, 128, 128, 128, kSM_100, FmhaSm100aKernel_QkvE4m3OE4m3H128SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK4SageV1PersistentContext_cubin, FmhaSm100aKernel_QkvE4m3OE4m3H128SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK4SageV1PersistentContext_cubin_len, "fmhaSm100aKernel_QkvE4m3OE4m3H128SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK4SageV1PersistentContext", 85168, 512, 0, 0, 0, 0, 1, 1, 0, 1, 4, 0, 1, false, false, false, false, false, false, DATA_TYPE_E4M3, "0df3f33da68bb7b4a3ccdc9266471be4bcb87bcc3cdd92c14e23652a4cb3f05b"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 256, 128, 128, 128, 128, kSM_100, FmhaSm100aKernel_QkvE4m3OE4m3H128SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK4SageV1StaticContext_cubin, FmhaSm100aKernel_QkvE4m3OE4m3H128SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK4SageV1StaticContext_cubin_len, "fmhaSm100aKernel_QkvE4m3OE4m3H128SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK4SageV1StaticContext", 85072, 512, 0, 0, 0, 0, 1, 0, 0, 1, 4, 0, 1, false, false, false, false, false, false, DATA_TYPE_E4M3, "e2f77513057767279390cc8f24f1fdfa6ddca6daf483a7e5cf0a5b690b93703e"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 256, 128, 64, 64, 64, kSM_100, FmhaSm100aKernel_QkvE4m3OE4m3H64SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK1SageV1PersistentContext_cubin, FmhaSm100aKernel_QkvE4m3OE4m3H64SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK1SageV1PersistentContext_cubin_len, "fmhaSm100aKernel_QkvE4m3OE4m3H64SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK1SageV1PersistentContext", 46000, 512, 0, 0, 0, 0, 1, 1, 0, 1, 1, 0, 1, false, false, false, false, false, false, DATA_TYPE_E4M3, "334bf4712a72d279676a09cd68999db37b8e576283560cf0e6da5b788e9f1d9b"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 256, 128, 64, 64, 64, kSM_100, FmhaSm100aKernel_QkvE4m3OE4m3H64SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK1SageV1StaticContext_cubin, FmhaSm100aKernel_QkvE4m3OE4m3H64SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK1SageV1StaticContext_cubin_len, "fmhaSm100aKernel_QkvE4m3OE4m3H64SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK1SageV1StaticContext", 45904, 512, 0, 0, 0, 0, 1, 0, 0, 1, 1, 0, 1, false, false, false, false, false, false, DATA_TYPE_E4M3, "48df97cc5050ecc5b63f00291c106669459fd92cb719d5af3f2eca88ded4f1b3"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 256, 128, 64, 64, 64, kSM_100, FmhaSm100aKernel_QkvE4m3OE4m3H64SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK4SageV1PersistentContext_cubin, FmhaSm100aKernel_QkvE4m3OE4m3H64SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK4SageV1PersistentContext_cubin_len, "fmhaSm100aKernel_QkvE4m3OE4m3H64SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK4SageV1PersistentContext", 43696, 512, 0, 0, 0, 0, 1, 1, 0, 1, 4, 0, 1, false, false, false, false, false, false, DATA_TYPE_E4M3, "c95a00eec2d5934ba6ae0651af98a8086aa8db65efecd1d8ad94da63f64a4346"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 256, 128, 64, 64, 64, kSM_100, FmhaSm100aKernel_QkvE4m3OE4m3H64SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK4SageV1StaticContext_cubin, FmhaSm100aKernel_QkvE4m3OE4m3H64SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK4SageV1StaticContext_cubin_len, "fmhaSm100aKernel_QkvE4m3OE4m3H64SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK4SageV1StaticContext", 43600, 512, 0, 0, 0, 0, 1, 0, 0, 1, 4, 0, 1, false, false, false, false, false, false, DATA_TYPE_E4M3, "6d0281d85269a3f2283394348c8a74b0c9ebf607cff8ad79f1a858d23a084d60"},
-#endif // EXCLUDE_SM_100
-
-#ifndef EXCLUDE_SM_103
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 256, 128, 128, 128, 128, kSM_103, FmhaSm103aKernel_QkvE4m3OBfloat16H128SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK1SageV1PersistentContext_cubin, FmhaSm103aKernel_QkvE4m3OBfloat16H128SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK1SageV1PersistentContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OBfloat16H128SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK1SageV1PersistentContext", 87472, 512, 0, 0, 0, 0, 1, 1, 0, 1, 1, 0, 1, false, false, false, false, false, false, DATA_TYPE_E4M3, "6c2594497b002f044827d36c670383a2b6da700f3c5bd2b793152bf75aa5a01b"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 256, 128, 128, 128, 128, kSM_103, FmhaSm103aKernel_QkvE4m3OBfloat16H128SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK1SageV1StaticContext_cubin, FmhaSm103aKernel_QkvE4m3OBfloat16H128SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK1SageV1StaticContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OBfloat16H128SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK1SageV1StaticContext", 87376, 512, 0, 0, 0, 0, 1, 0, 0, 1, 1, 0, 1, false, false, false, false, false, false, DATA_TYPE_E4M3, "f11cdd390a97b2678beb6a2a433863b1dc6724a3b19e62ee54606d682e18ceff"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 256, 128, 128, 128, 128, kSM_103, FmhaSm103aKernel_QkvE4m3OBfloat16H128SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK4SageV1PersistentContext_cubin, FmhaSm103aKernel_QkvE4m3OBfloat16H128SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK4SageV1PersistentContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OBfloat16H128SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK4SageV1PersistentContext", 85168, 512, 0, 0, 0, 0, 1, 1, 0, 1, 4, 0, 1, false, false, false, false, false, false, DATA_TYPE_E4M3, "9736015a9135c80d3947b921aae682073633c2bbedae01fe12748c41a9452673"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 256, 128, 128, 128, 128, kSM_103, FmhaSm103aKernel_QkvE4m3OBfloat16H128SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK4SageV1StaticContext_cubin, FmhaSm103aKernel_QkvE4m3OBfloat16H128SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK4SageV1StaticContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OBfloat16H128SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK4SageV1StaticContext", 85072, 512, 0, 0, 0, 0, 1, 0, 0, 1, 4, 0, 1, false, false, false, false, false, false, DATA_TYPE_E4M3, "324bc198142c89cea6594dbfccd65c3df49c788b7dc3616b52637b45d8d2d18a"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 256, 128, 64, 64, 64, kSM_103, FmhaSm103aKernel_QkvE4m3OBfloat16H64SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK1SageV1PersistentContext_cubin, FmhaSm103aKernel_QkvE4m3OBfloat16H64SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK1SageV1PersistentContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OBfloat16H64SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK1SageV1PersistentContext", 46000, 512, 0, 0, 0, 0, 1, 1, 0, 1, 1, 0, 1, false, false, false, false, false, false, DATA_TYPE_E4M3, "def747a87f3d5b1dde1eece045c30a26c4aef369549ef8c8093d986d56fb5f20"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 256, 128, 64, 64, 64, kSM_103, FmhaSm103aKernel_QkvE4m3OBfloat16H64SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK1SageV1StaticContext_cubin, FmhaSm103aKernel_QkvE4m3OBfloat16H64SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK1SageV1StaticContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OBfloat16H64SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK1SageV1StaticContext", 45904, 512, 0, 0, 0, 0, 1, 0, 0, 1, 1, 0, 1, false, false, false, false, false, false, DATA_TYPE_E4M3, "0b1cbe21858f1986c8fd0f538ad1ee6bf3ab11c172fd59263efa9ff9126e5d5d"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 256, 128, 64, 64, 64, kSM_103, FmhaSm103aKernel_QkvE4m3OBfloat16H64SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK4SageV1PersistentContext_cubin, FmhaSm103aKernel_QkvE4m3OBfloat16H64SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK4SageV1PersistentContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OBfloat16H64SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK4SageV1PersistentContext", 43696, 512, 0, 0, 0, 0, 1, 1, 0, 1, 4, 0, 1, false, false, false, false, false, false, DATA_TYPE_E4M3, "4077b2a35128c5b39ab5cb9295e027099768d1fad3277623ee4fd49e3e9dbce1"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_BF16, 128, 128, 256, 128, 64, 64, 64, kSM_103, FmhaSm103aKernel_QkvE4m3OBfloat16H64SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK4SageV1StaticContext_cubin, FmhaSm103aKernel_QkvE4m3OBfloat16H64SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK4SageV1StaticContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OBfloat16H64SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK4SageV1StaticContext", 43600, 512, 0, 0, 0, 0, 1, 0, 0, 1, 4, 0, 1, false, false, false, false, false, false, DATA_TYPE_E4M3, "cf7d1d93b921a34f98fbd2f254da0a5dcb5fd02b53e006d871cfdf47984524df"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 256, 128, 128, 128, 128, kSM_103, FmhaSm103aKernel_QkvE4m3OE4m3H128SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK1SageV1PersistentContext_cubin, FmhaSm103aKernel_QkvE4m3OE4m3H128SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK1SageV1PersistentContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OE4m3H128SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK1SageV1PersistentContext", 87472, 512, 0, 0, 0, 0, 1, 1, 0, 1, 1, 0, 1, false, false, false, false, false, false, DATA_TYPE_E4M3, "4cb605ccebc57a0baa5fda4b91edd306090ae8e0f2fa471781ca1abb0a42302d"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 256, 128, 128, 128, 128, kSM_103, FmhaSm103aKernel_QkvE4m3OE4m3H128SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK1SageV1StaticContext_cubin, FmhaSm103aKernel_QkvE4m3OE4m3H128SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK1SageV1StaticContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OE4m3H128SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK1SageV1StaticContext", 87376, 512, 0, 0, 0, 0, 1, 0, 0, 1, 1, 0, 1, false, false, false, false, false, false, DATA_TYPE_E4M3, "a9650928d46028e707d1d7f503cf300d41318451441117c341705f8bc313987c"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 256, 128, 128, 128, 128, kSM_103, FmhaSm103aKernel_QkvE4m3OE4m3H128SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK4SageV1PersistentContext_cubin, FmhaSm103aKernel_QkvE4m3OE4m3H128SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK4SageV1PersistentContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OE4m3H128SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK4SageV1PersistentContext", 85168, 512, 0, 0, 0, 0, 1, 1, 0, 1, 4, 0, 1, false, false, false, false, false, false, DATA_TYPE_E4M3, "b0873a3e32f4f17b4d2fef1552a86d5a3df67273fee5c2623f20676b1e65e209"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 256, 128, 128, 128, 128, kSM_103, FmhaSm103aKernel_QkvE4m3OE4m3H128SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK4SageV1StaticContext_cubin, FmhaSm103aKernel_QkvE4m3OE4m3H128SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK4SageV1StaticContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OE4m3H128SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK4SageV1StaticContext", 85072, 512, 0, 0, 0, 0, 1, 0, 0, 1, 4, 0, 1, false, false, false, false, false, false, DATA_TYPE_E4M3, "4969459aa313f67f88cbd39049b06274dcf84e3700bed62858d1072da1f5278a"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 256, 128, 64, 64, 64, kSM_103, FmhaSm103aKernel_QkvE4m3OE4m3H64SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK1SageV1PersistentContext_cubin, FmhaSm103aKernel_QkvE4m3OE4m3H64SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK1SageV1PersistentContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OE4m3H64SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK1SageV1PersistentContext", 46000, 512, 0, 0, 0, 0, 1, 1, 0, 1, 1, 0, 1, false, false, false, false, false, false, DATA_TYPE_E4M3, "58a6adbe4f19748152a3256da8f380f7987c7f558db34d2c22e6249136692cac"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 256, 128, 64, 64, 64, kSM_103, FmhaSm103aKernel_QkvE4m3OE4m3H64SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK1SageV1StaticContext_cubin, FmhaSm103aKernel_QkvE4m3OE4m3H64SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK1SageV1StaticContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OE4m3H64SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK1SageV1StaticContext", 45904, 512, 0, 0, 0, 0, 1, 0, 0, 1, 1, 0, 1, false, false, false, false, false, false, DATA_TYPE_E4M3, "5c2c3ea41c4411cb9c35c31c9bf2d630030fcb2abf95323a4eae172666773e19"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 256, 128, 64, 64, 64, kSM_103, FmhaSm103aKernel_QkvE4m3OE4m3H64SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK4SageV1PersistentContext_cubin, FmhaSm103aKernel_QkvE4m3OE4m3H64SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK4SageV1PersistentContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OE4m3H64SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK4SageV1PersistentContext", 43696, 512, 0, 0, 0, 0, 1, 1, 0, 1, 4, 0, 1, false, false, false, false, false, false, DATA_TYPE_E4M3, "ba9ae9fbb6d060521f8b33043c9d049fa033de8b443b8b19f17cc64f19bdf724"},
-{ DATA_TYPE_E4M3, DATA_TYPE_E4M3, DATA_TYPE_E4M3, 128, 128, 256, 128, 64, 64, 64, kSM_103, FmhaSm103aKernel_QkvE4m3OE4m3H64SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK4SageV1StaticContext_cubin, FmhaSm103aKernel_QkvE4m3OE4m3H64SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK4SageV1StaticContext_cubin_len, "fmhaSm103aKernel_QkvE4m3OE4m3H64SeparateQkvDenseVarSeqQ128Kv128SageQ1SageK4SageV1StaticContext", 43600, 512, 0, 0, 0, 0, 1, 0, 0, 1, 4, 0, 1, false, false, false, false, false, false, DATA_TYPE_E4M3, "ac8982fd5160d7cdf33f40c0338988c3fe15b662caf8032fa332888fc9ad61ac"},
-#endif // EXCLUDE_SM_103
-};
-// clang-format on
-} // namespace kernels
-
-TRTLLM_NAMESPACE_END
diff --git a/cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/fmhaKernels.h b/cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/fmhaKernels.h
index a528f3241a7c..c31b9a9163f8 100644
--- a/cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/fmhaKernels.h
+++ b/cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/fmhaKernels.h
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2020-2026, NVIDIA CORPORATION. All rights reserved.
+ * Copyright (c) 2020-2025, NVIDIA CORPORATION. All rights reserved.
  *
  * Licensed under the Apache License, Version 2.0 (the "License");
  * you may not use this file except in compliance with the License.
@@ -26,11 +26,10 @@
 #include "tensorrt_llm/common/envUtils.h"
 #include "tensorrt_llm/common/logger.h"
 
-#include "cubin_visual_gen/kernelMetaInfoVisualGen.h"
+#include "cubin/kernelMetaInfo.h"
 #include "fmhaReduction.h"
 #include "fmhaRunnerParams.h"
 #include "kernelParams.h"
-#include "kernelParamsVisualGen.h"
 #include "prepareCustomMask.h"
 #include "tensorrt_llm/kernels/multiHeadAttentionCommon.h"
 
@@ -93,61 +92,30 @@ class TllmGenFmhaKernel
 
 public:
     using KernelMeta = TllmGenFmhaKernelMetaInfo;
-    using KernelMetaVx = TllmGenFmhaKernelMetaInfoVx;
     using RunnerParams = TllmGenFmhaRunnerParams;
     using SelectKernelParams = TllmGenSelectKernelParams;
 
     // Ctor.
-    TllmGenFmhaKernel(KernelMeta const* pMetaStart, KernelMetaVx const* pMetaStartVx, unsigned int nMetaCount,
-        Data_type dtypeQ, Data_type dtypeKv, Data_type dtypeOut, unsigned int smArch, int maxNumHeadsQPerKvInCta,
-        int numEltsPerSageAttnBlkQ, int numEltsPerSageAttnBlkK, int numEltsPerSageAttnBlkP, int numEltsPerSageAttnBlkV,
-        Data_type dataTypeQkReinterpret)
+    TllmGenFmhaKernel(KernelMeta const* pMetaStart, unsigned int nMetaCount, Data_type dtypeQ, Data_type dtypeKv,
+        Data_type dtypeOut, unsigned int smArch)
         : mDtypeQ(dtypeQ)
         , mDtypeKv(dtypeKv)
         , mDtypeOut(dtypeOut)
         , mDriver(tensorrt_llm::common::CUDADriverWrapper::getInstance())
         , mKernelMeta(pMetaStart)
-        , mKernelMetaVx(pMetaStartVx)
         , mKernelMetaCount(nMetaCount)
         , mSM(smArch)
-        , mMaxNumHeadsQPerKvInCta(maxNumHeadsQPerKvInCta)
-        , mNumEltsPerSageAttnBlkQ(numEltsPerSageAttnBlkQ)
-        , mNumEltsPerSageAttnBlkK(numEltsPerSageAttnBlkK)
-        , mNumEltsPerSageAttnBlkP(numEltsPerSageAttnBlkP)
-        , mNumEltsPerSageAttnBlkV(numEltsPerSageAttnBlkV)
-        , mDataTypeQkReinterpret(dataTypeQkReinterpret)
     {
     }
 
-    // Always convert to extended kernelMeta for kernel variant selection
-    KernelMetaVx getKernelMetaVx(int index) const
-    {
-        if (mKernelMeta != nullptr)
-        {
-            return KernelMetaVx(mKernelMeta[index]);
-        }
-        else
-        {
-            TLLM_CHECK_WITH_INFO(
-                mKernelMetaVx != nullptr, "mKernelMeta and mKernelMetaVx can't be nullptr at the same time.");
-            return mKernelMetaVx[index];
-        }
-    }
-
     void loadKernels()
     {
         // Build a lookup map for all kernels.
         for (unsigned int i = 0; i < mKernelMetaCount; ++i)
         {
-            auto const kernelMeta = getKernelMetaVx(i);
+            auto const& kernelMeta = mKernelMeta[i];
             if (isSMCompatible(mSM, kernelMeta.mSM) && kernelMeta.mDataTypeQ == mDtypeQ
-                && kernelMeta.mDataTypeKv == mDtypeKv && kernelMeta.mDataTypeO == mDtypeOut
-                && kernelMeta.mMaxNumHeadsQPerKvInCta == mMaxNumHeadsQPerKvInCta
-                && kernelMeta.mNumEltsPerSageAttnBlkQ == mNumEltsPerSageAttnBlkQ
-                && kernelMeta.mNumEltsPerSageAttnBlkK == mNumEltsPerSageAttnBlkK
-                && kernelMeta.mNumEltsPerSageAttnBlkP == mNumEltsPerSageAttnBlkP
-                && kernelMeta.mNumEltsPerSageAttnBlkV == mNumEltsPerSageAttnBlkV
-                && kernelMeta.mDataTypeQkReinterpret == mDataTypeQkReinterpret)
+                && kernelMeta.mDataTypeKv == mDtypeKv && kernelMeta.mDataTypeO == mDtypeOut)
             {
                 // Load CUmodules
                 CUmodule hmod{0};
@@ -176,7 +144,7 @@ class TllmGenFmhaKernel
                 auto it = mFunctions.find(hash);
                 if (it != mFunctions.end())
                 {
-                    auto const existingKernelMeta = getKernelMetaVx(it->second.mMetaInfoIndex);
+                    auto const& existingKernelMeta = mKernelMeta[it->second.mMetaInfoIndex];
                     TLLM_CHECK_WITH_INFO(isFamilySpecificSMPair(existingKernelMeta.mSM, kernelMeta.mSM),
                         "The kernel's hashId has conflicts with others.");
                     // Prefer specific SM version over family version
@@ -261,7 +229,7 @@ class TllmGenFmhaKernel
         return std::make_pair(mFunctions.find(hashId) != mFunctions.end(), info);
     }
 
-    std::pair<CUfunction, KernelMetaVx> loadKernel(
+    std::pair<CUfunction, KernelMeta> loadKernel(
         RunnerParams const& params, SelectKernelParams const& selectKernelParams) const
     {
         auto [hashId, info] = hashFromRunnerParams(params, selectKernelParams);
@@ -270,8 +238,8 @@ class TllmGenFmhaKernel
         // Add debug info when kernels are not found.
         TLLM_CHECK_WITH_INFO(findIter != mFunctions.end(), "Trtllm-gen kernels not found: " + info);
 
-        auto const kernelMeta = getKernelMetaVx(findIter->second.mMetaInfoIndex);
-        CUfunction const func = findIter->second.mDeviceFunction;
+        auto const& kernelMeta = mKernelMeta[findIter->second.mMetaInfoIndex];
+        const CUfunction func = findIter->second.mDeviceFunction;
         // Return the kernel function and kernel meta.
         return std::make_pair(func, kernelMeta);
     }
@@ -311,25 +279,12 @@ class TllmGenFmhaKernel
                 runPrepareCustomMask(kernelMeta, params, params.stream);
             }
 
-            // Prepare the kernel parameters based on kernel type.
-            KernelParams kernelParams;
-            KernelParamsVisualGen kernelParamsVisualGen;
-            void* kernelParamsPtr = nullptr;
-            if (!kernelMeta.mIsVisualGenKernel)
-            {
-                kernelParams = KernelParams::setKernelParams(
-                    params, kernelMeta, ctaLaunchParams.mMaxNumCtasQ, ctaLaunchParams.mMaxNumCtasKv);
-                kernelParamsPtr = &kernelParams;
-            }
-            else
-            {
-                kernelParamsVisualGen = KernelParamsVisualGen::setKernelParams(
-                    params, kernelMeta, ctaLaunchParams.mMaxNumCtasQ, ctaLaunchParams.mMaxNumCtasKv);
-                kernelParamsPtr = &kernelParamsVisualGen;
-            }
+            // Prepare the kernel parameters.
+            auto kernelParams = KernelParams::setKernelParams(
+                params, kernelMeta, ctaLaunchParams.mMaxNumCtasQ, ctaLaunchParams.mMaxNumCtasKv);
 
             // Prepare kernel parameters list for cuLaunchKernelEx.
-            void* kernelParamsList[] = {kernelParamsPtr};
+            void* kernelParamsList[] = {&kernelParams};
             CUlaunchConfig launch_config;
             launch_config.blockDimX = kernelMeta.mThreadsPerCTA;
             launch_config.blockDimY = 1;
@@ -398,16 +353,7 @@ class TllmGenFmhaKernel
             TLLM_CU_CHECK(mDriver->cuLaunchKernelEx(&launch_config, func, kernelParamsList, nullptr));
 
             // Run the separate reduction kernel if needed.
-            if (!kernelMeta.mIsVisualGenKernel)
-            {
-                runFmhaReduction(kernelMeta, kernelParams, params.mMultiProcessorCount, params.stream);
-            }
-            else
-            {
-                TLLM_CHECK_WITH_INFO(
-                    !isGmemReductionWithSeparateKernel(static_cast<MultiCtasKvMode>(kernelMeta.mMultiCtasKvMode)),
-                    "VisualGen kernel should not require separate reduction.");
-            }
+            runFmhaReduction(kernelMeta, kernelParams, params.mMultiProcessorCount, params.stream);
 
             // Break the while op.
             break;
@@ -868,20 +814,6 @@ class TllmGenFmhaKernel
     // Select a kernel based on the heuristic.
     void selectKernel(RunnerParams const& params, SelectKernelParams& selectKernelParams) const
     {
-        // VisualGen context kernels currently use a fixed kernel family in meta tables.
-        // (e.g. tileSizeQ=128, tileSizeKv=128).
-        if (isContextKernel(params.mKernelType) && isSeparateQkv(params.mQkvLayout)
-            && (mNumEltsPerSageAttnBlkQ > 0 || mNumEltsPerSageAttnBlkK > 0 || mNumEltsPerSageAttnBlkP > 0
-                || mNumEltsPerSageAttnBlkV > 0 || mDataTypeQkReinterpret != DATA_TYPE_E4M3))
-        {
-            selectKernelParams.mKernelType = FmhaKernelType::Context;
-            selectKernelParams.mMultiCtasKvMode = MultiCtasKvMode::Disabled;
-            selectKernelParams.mTileSizeQ = 128;
-            selectKernelParams.mTileSizeKv = 128;
-            selectKernelParams.mHeadDimPerCtaV = params.mHeadDimV;
-            selectKernelParams.mReuseSmemKForV = false;
-            selectKernelParams.mUses2CtaMma = false;
-        }
 
         // Select the kernel based on the kernel type.
         if (isGenerationKernel(params.mKernelType) && isMlaGenKernel(params))
@@ -953,15 +885,8 @@ class TllmGenFmhaKernel
     Data_type mDtypeQ, mDtypeKv, mDtypeOut;
     std::shared_ptr<tensorrt_llm::common::CUDADriverWrapper> mDriver;
     KernelMeta const* mKernelMeta;
-    KernelMetaVx const* mKernelMetaVx;
     unsigned int mKernelMetaCount;
     unsigned int mSM;
-    int mMaxNumHeadsQPerKvInCta;
-    int mNumEltsPerSageAttnBlkQ;
-    int mNumEltsPerSageAttnBlkK;
-    int mNumEltsPerSageAttnBlkP;
-    int mNumEltsPerSageAttnBlkV;
-    Data_type mDataTypeQkReinterpret;
     std::unordered_map<unsigned char const*, CUmodule> mModules;
 
     struct KernelInfo
@@ -979,28 +904,18 @@ class TllmFmhaKernelFactory
 {
 public:
     using KernelType = TllmGenFmhaKernel;
-    using KernelMeta = typename KernelType::KernelMeta;
-    using KernelMetaVx = typename KernelType::KernelMetaVx;
 
-    KernelType const* getKernels(KernelMeta const* pKernelList, KernelMetaVx const* pKernelListVx,
-        unsigned int nbKernels, Data_type dtypeQ, Data_type dtypeKv, Data_type dtypeOut, unsigned int sm,
-        int maxNumHeadsQPerKvInCta, int numEltsPerSageAttnBlkQ, int numEltsPerSageAttnBlkK, int numEltsPerSageAttnBlkP,
-        int numEltsPerSageAttnBlkV, Data_type dataTypeQkReinterpret)
+    KernelType const* getKernels(const typename KernelType::KernelMeta* pKernelList, unsigned int nbKernels,
+        Data_type dtypeQ, Data_type dtypeKv, Data_type dtypeOut, unsigned int sm)
     {
         static std::mutex s_mutex;
         std::lock_guard<std::mutex> lg(s_mutex);
-        TLLM_CHECK_WITH_INFO(numEltsPerSageAttnBlkQ <= 64 && numEltsPerSageAttnBlkK <= 64
-                && numEltsPerSageAttnBlkP <= 64 && numEltsPerSageAttnBlkV <= 64,
-            "SageAttention allows numEltsPerSageAttnBlk up to 64.");
 
-        auto const id = hashID(dtypeQ, dtypeKv, dtypeOut, sm, maxNumHeadsQPerKvInCta, numEltsPerSageAttnBlkQ,
-            numEltsPerSageAttnBlkK, numEltsPerSageAttnBlkP, numEltsPerSageAttnBlkV, dataTypeQkReinterpret);
+        auto const id = hashID(dtypeQ, dtypeKv, dtypeOut, sm);
         auto const findIter = mKernels.find(id);
         if (findIter == mKernels.end())
         {
-            KernelType* newKernel = new KernelType{pKernelList, pKernelListVx, nbKernels, dtypeQ, dtypeKv, dtypeOut, sm,
-                maxNumHeadsQPerKvInCta, numEltsPerSageAttnBlkQ, numEltsPerSageAttnBlkK, numEltsPerSageAttnBlkP,
-                numEltsPerSageAttnBlkV, dataTypeQkReinterpret};
+            KernelType* newKernel = new KernelType{pKernelList, nbKernels, dtypeQ, dtypeKv, dtypeOut, sm};
             newKernel->loadKernels();
             mKernels.insert(std::make_pair(id, std::unique_ptr<KernelType>(newKernel)));
             return newKernel;
@@ -1023,65 +938,22 @@ class TllmFmhaKernelFactory
 private:
     TllmFmhaKernelFactory() = default;
 
-    inline uint64_t hashID(Data_type dtypeQ, Data_type dtypeKv, Data_type dtypeOut, unsigned int sm,
-        int maxNumHeadsQPerKvInCta, int numEltsPerSageAttnBlkQ, int numEltsPerSageAttnBlkK, int numEltsPerSageAttnBlkP,
-        int numEltsPerSageAttnBlkV, Data_type dataTypeQkReinterpret) const
+    inline uint64_t hashID(Data_type dtypeQ, Data_type dtypeKv, Data_type dtypeOut, unsigned int sm) const
     {
-        auto const computeLog2BlockSizePlus1 = [](int blockSize) -> int
-        {
-            if (blockSize <= 0)
-            {
-                return 0;
-            }
-            TLLM_CHECK_WITH_INFO((blockSize & (blockSize - 1)) == 0, "SageAttn block size must be a power of 2.");
-            return __builtin_ctz(static_cast<unsigned int>(blockSize)) + 1;
-        };
-        // Format of the hash key:
-        // Bit 0  - 15: smVer
-        // Bit 16 - 19: dtypeQ
-        // Bit 20 - 23: dtypeKv
-        // Bit 24 - 27: dtypeOut
-        // Bit 28 - 31: maxNumHeadsQPerKvInCta [VisualGen kernels from below].
-        // Bit 32 - 34: log2NumEltsPerSageAttnBlkQ + 1 -- 0 for non-sage, max numEltsPerSageAttnBlkQ is 64.
-        // Bit 35 - 37: log2NumEltsPerSageAttnBlkK + 1 -- 0 for non-sage, max numEltsPerSageAttnBlkK is 64.
-        // Bit 38 - 40: log2NumEltsPerSageAttnBlkP + 1 -- 0 for non-sage, max numEltsPerSageAttnBlkP is 64.
-        // Bit 41 - 43: log2NumEltsPerSageAttnBlkV + 1 -- 0 for non-sage, max numEltsPerSageAttnBlkV is 64.
-        // Bit 44 - 47: dataTypeQkReinterpret.
         return static_cast<uint64_t>(sm) | static_cast<uint64_t>(dtypeQ) << 16 | static_cast<uint64_t>(dtypeKv) << 20
-            | static_cast<uint64_t>(dtypeOut) << 24 | (static_cast<uint64_t>(maxNumHeadsQPerKvInCta) << 28)
-            | (static_cast<uint64_t>(computeLog2BlockSizePlus1(numEltsPerSageAttnBlkQ)) << 32)
-            | (static_cast<uint64_t>(computeLog2BlockSizePlus1(numEltsPerSageAttnBlkK)) << 35)
-            | (static_cast<uint64_t>(computeLog2BlockSizePlus1(numEltsPerSageAttnBlkP)) << 38)
-            | (static_cast<uint64_t>(computeLog2BlockSizePlus1(numEltsPerSageAttnBlkV)) << 41)
-            | (static_cast<uint64_t>(dataTypeQkReinterpret) << 44);
+            | static_cast<uint64_t>(dtypeOut) << 24;
     }
 
-    std::unordered_map<uint64_t, std::unique_ptr<KernelType> const> mKernels;
+    std::unordered_map<uint64_t, const std::unique_ptr<KernelType>> mKernels;
 };
 
-inline TllmGenFmhaKernel const* getTllmFmhaKernels(Data_type dtypeQ, Data_type dtypeKv, Data_type dtypeOut,
-    unsigned int sm, int maxNumHeadsQPerKvInCta, int numEltsPerSageAttnBlkQ, int numEltsPerSageAttnBlkK,
-    int numEltsPerSageAttnBlkP, int numEltsPerSageAttnBlkV, Data_type dataTypeQkReinterpret)
+inline TllmGenFmhaKernel const* getTllmFmhaKernels(
+    Data_type dtypeQ, Data_type dtypeKv, Data_type dtypeOut, unsigned int sm)
 {
 
 #ifndef EXCLUDE_SM_100F
-    if (numEltsPerSageAttnBlkQ + numEltsPerSageAttnBlkK + numEltsPerSageAttnBlkP + numEltsPerSageAttnBlkV == 0
-        && dataTypeQkReinterpret == DATA_TYPE_E4M3)
-    {
-        // No VisualGen-specific option set. Load regular kernels.
-        return TllmFmhaKernelFactory::Get().getKernels(sTllmGenFmhaKernelMetaInfos, nullptr,
-            sizeof(sTllmGenFmhaKernelMetaInfos) / sizeof(sTllmGenFmhaKernelMetaInfos[0]), dtypeQ, dtypeKv, dtypeOut, sm,
-            maxNumHeadsQPerKvInCta, 0, 0, 0, 0, DATA_TYPE_E4M3);
-    }
-    else
-    {
-        // Load VisualGen extension kernels.
-        TLLM_LOG_DEBUG("Using VisualGen extended kernels.");
-        return TllmFmhaKernelFactory::Get().getKernels(nullptr, sTllmGenFmhaKernelMetaInfosVx,
-            sizeof(sTllmGenFmhaKernelMetaInfosVx) / sizeof(sTllmGenFmhaKernelMetaInfosVx[0]), dtypeQ, dtypeKv, dtypeOut,
-            sm, maxNumHeadsQPerKvInCta, numEltsPerSageAttnBlkQ, numEltsPerSageAttnBlkK, numEltsPerSageAttnBlkP,
-            numEltsPerSageAttnBlkV, dataTypeQkReinterpret);
-    }
+    return TllmFmhaKernelFactory::Get().getKernels(sTllmGenFmhaKernelMetaInfos,
+        sizeof(sTllmGenFmhaKernelMetaInfos) / sizeof(sTllmGenFmhaKernelMetaInfos[0]), dtypeQ, dtypeKv, dtypeOut, sm);
 #else
     return nullptr;
 #endif // EXCLUDE_SM_100F
diff --git a/cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/fmhaRunner.cpp b/cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/fmhaRunner.cpp
index a316ffe5857c..da476d112649 100644
--- a/cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/fmhaRunner.cpp
+++ b/cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/fmhaRunner.cpp
@@ -29,19 +29,11 @@ namespace kernels
 
 ////////////////////////////////////////////////////////////////////////////////////////////////////
 
-TllmGenFmhaRunner::TllmGenFmhaRunner(Data_type dtypeQ, Data_type dtypeKv, Data_type dtypeOut,
-    int maxNumHeadsQPerKvInCta, int numEltsPerSageAttnBlkQ, int numEltsPerSageAttnBlkK, int numEltsPerSageAttnBlkP,
-    int numEltsPerSageAttnBlkV, Data_type dataTypeQkReinterpret)
+TllmGenFmhaRunner::TllmGenFmhaRunner(Data_type dtypeQ, Data_type dtypeKv, Data_type dtypeOut)
     : mSM(tensorrt_llm::common::getSMVersion())
     , mDtypeQ(dtypeQ)
     , mDtypeKv(dtypeKv)
     , mDtypeOut(dtypeOut)
-    , mMaxNumHeadsQPerKvInCta(maxNumHeadsQPerKvInCta)
-    , mNumEltsPerSageAttnBlkQ(numEltsPerSageAttnBlkQ)
-    , mNumEltsPerSageAttnBlkK(numEltsPerSageAttnBlkK)
-    , mNumEltsPerSageAttnBlkP(numEltsPerSageAttnBlkP)
-    , mNumEltsPerSageAttnBlkV(numEltsPerSageAttnBlkV)
-    , mDataTypeQkReinterpret(dataTypeQkReinterpret)
 {
     TLLM_CHECK_WITH_INFO(mSM == kSM_100 || mSM == kSM_103, "Unsupported architecture");
     TLLM_CHECK_WITH_INFO(
@@ -55,8 +47,7 @@ TllmGenFmhaRunner::TllmGenFmhaRunner(Data_type dtypeQ, Data_type dtypeKv, Data_t
     auto const [freeMemory, totalMemory] = tensorrt_llm::common::getDeviceMemoryInfo(false);
     mTotalDeviceMemory = totalMemory;
     TLLM_CHECK_WITH_INFO(mTotalDeviceMemory > 0, "Total device memory is invalid");
-    mKernel = getTllmFmhaKernels(mDtypeQ, mDtypeKv, mDtypeOut, mSM, maxNumHeadsQPerKvInCta, numEltsPerSageAttnBlkQ,
-        numEltsPerSageAttnBlkK, numEltsPerSageAttnBlkP, numEltsPerSageAttnBlkV, dataTypeQkReinterpret);
+    mKernel = getTllmFmhaKernels(mDtypeQ, mDtypeKv, mDtypeOut, mSM);
 }
 
 ////////////////////////////////////////////////////////////////////////////////////////////////////
diff --git a/cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/fmhaRunner.h b/cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/fmhaRunner.h
index 804d36ab5fb5..b42a61a81868 100644
--- a/cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/fmhaRunner.h
+++ b/cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/fmhaRunner.h
@@ -32,9 +32,7 @@ class TllmGenFmhaRunner
 {
 public:
     // Constructor.
-    explicit TllmGenFmhaRunner(Data_type dtypeQ, Data_type dtypeKv, Data_type dtypeOut, int maxNumHeadsQPerKvInCta = 1,
-        int numEltsPerSageAttnBlkQ = 0, int numEltsPerSageAttnBlkK = 0, int numEltsPerSageAttnBlkP = 0,
-        int numEltsPerSageAttnBlkV = 0, Data_type dataTypeQkReinterpret = DATA_TYPE_E4M3);
+    explicit TllmGenFmhaRunner(Data_type dtypeQ, Data_type dtypeKv, Data_type dtypeOut);
 
     TllmGenFmhaRunner() = default;
 
@@ -59,13 +57,6 @@ class TllmGenFmhaRunner
     size_t mTotalDeviceMemory;
     // The class that stores all the kernels.
     TllmGenFmhaKernel const* mKernel;
-    // VisualGen extensions.
-    int mMaxNumHeadsQPerKvInCta;
-    int mNumEltsPerSageAttnBlkQ;
-    int mNumEltsPerSageAttnBlkK;
-    int mNumEltsPerSageAttnBlkP;
-    int mNumEltsPerSageAttnBlkV;
-    Data_type mDataTypeQkReinterpret;
 };
 
 } // namespace kernels
diff --git a/cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/fmhaRunnerParams.h b/cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/fmhaRunnerParams.h
index 1c449ce7b8ec..0d5d386bef00 100644
--- a/cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/fmhaRunnerParams.h
+++ b/cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/fmhaRunnerParams.h
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2020-2026, NVIDIA CORPORATION.  All rights reserved.
+ * Copyright (c) 2020-2025, NVIDIA CORPORATION.  All rights reserved.
  *
  * Licensed under the Apache License, Version 2.0 (the "License");
  * you may not use this file except in compliance with the License.
@@ -243,11 +243,6 @@ struct TllmGenFmhaRunnerParams
     void* oPtr;
     // The output scaling factor buffer.
     void* oSfPtr;
-    // SageAttention scaling factors for Q, K, P and V.
-    float const* sageAttnSfsQPtr = nullptr;
-    float const* sageAttnSfsKPtr = nullptr;
-    float const* sageAttnSfsPPtr = nullptr;
-    float const* sageAttnSfsVPtr = nullptr;
     // The sequence lengths for Q.
     int const* seqlensQPtr;
 
@@ -283,11 +278,6 @@ struct TllmGenFmhaRunnerParams
     int mNumPagesInMemPool;
     // The number of multiProcessor for the GPU.
     int mMultiProcessorCount;
-    // Number of elements per SageAttention block must be power of 2. Only used when sageAttnSfs?Ptr != nullptr.
-    int mLogNumEltsPerSageAttnBlkQ = 0;
-    int mLogNumEltsPerSageAttnBlkK = 0;
-    int mLogNumEltsPerSageAttnBlkP = 0;
-    int mLogNumEltsPerSageAttnBlkV = 0;
     // Scaling factor for Q.
     float mScaleQ;
     // The start token index in SF tensor. Used for FP4 SF offset calculation in generation phase kernel when inflight
diff --git a/cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/kernelParamsVisualGen.h b/cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/kernelParamsVisualGen.h
deleted file mode 100644
index f799f5407150..000000000000
--- a/cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/kernelParamsVisualGen.h
+++ /dev/null
@@ -1,893 +0,0 @@
-/*
- * Copyright (c) 2020-2026, NVIDIA CORPORATION.  All rights reserved.
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *     http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#pragma once
-
-#include "kernelParams.h"
-#include <type_traits>
-#include <utility>
-
-TRTLLM_NAMESPACE_BEGIN
-
-namespace kernels
-{
-
-namespace detail
-{
-
-template <typename T, typename = void>
-struct HasSageAttnParams : std::false_type
-{
-};
-
-template <typename T>
-struct HasSageAttnParams<T, std::void_t<decltype(std::declval<T const&>().sageAttnSfsQPtr)>> : std::true_type
-{
-};
-
-} // namespace detail
-
-////////////////////////////////////////////////////////////////////////////////////////////////////
-
-struct KernelParamsVisualGen
-{
-    // TMA descriptor for Q.
-    CUtensorMap tmaQ_;
-    // TMA descriptor for K.
-    CUtensorMap tmaK_;
-    // TMA descriptor for V.
-    CUtensorMap tmaV_;
-    // The descriptor for O.
-    CUtensorMap tmaO_;
-
-    // For FP4 KV cache, additional scaling factors are needed.
-    // TMA descriptor for K scaling factor.
-    CUtensorMap tmaKSf_;
-    // TMA descriptor for V scaling factor.
-    CUtensorMap tmaVSf_;
-
-    // grid dimensions, these might differ from actual grid the kernel is launched with
-    // for persistent kernels on Hopper GPUs.
-    int32_t logicalGridDimX, logicalGridDimY, logicalGridDimZ;
-
-    // The output pointer (used by STG for last tile).
-    void* ptrO;
-    // The output SF pointer (used for FP4 output).
-    void* ptrSfO;
-
-    // The attention sinks pointer (additional value per head in the denominator of the softmax).
-    float const* ptrAttentionSinks;
-    // The cumulative sequence lengths for Q.
-    int32_t const* ptrCumSeqLensQ;
-    // The cumulative sequence lengths for K/V.
-    int32_t const* ptrCumSeqLensKv;
-    // The packed custom mask.
-    uint32_t const* ptrCustomMask;
-    // The packed custom mask's offsets of each sequence.
-    int64_t const* ptrCustomMaskOffsets;
-    // The debug output matrix O
-    float* ptrDebugO;
-    // The first sparseMask offsets in the Kv sequence dimension.
-    int32_t const* ptrFirstSparseMaskOffsetsKv;
-    // The counter for the multiCtasKv mode.
-    int32_t* ptrMultiCtasKvCounter;
-    // The device output scale for FP8 quantization. Only needed by trt-llm fp8 kernels as the sca-
-    // les have to be on the device currently.
-    float const* ptrOutputScale;
-    // The page indexes of the paged-kv buffer with shape of [batchSize, 2, maxNumPagesPerSeq].
-    int32_t const* ptrPageIdxKv;
-    // The partial matrix O for each CtaKv when the multiCtasKv mode is enabled.
-    void* ptrPartialO;
-    // The partial softmax stats (max/sum)for each CtaKv when the multiCtasKv mode is enabled.
-    float2* ptrPartialStats;
-    // The scaling factors for K.
-    float const* ptrSageAttnSfsK;
-    // The scaling factors for P.
-    float const* ptrSageAttnSfsP;
-    // The scaling factors for Q.
-    float const* ptrSageAttnSfsQ;
-    // The scaling factors for V.
-    float const* ptrSageAttnSfsV;
-    // The device scaling factor for softmax (multiplied by log2 to use faster exp2). Only needed by
-    // trt-llm fp8 kernels as the scales have to be on the device currently.
-    float const* ptrScaleSoftmaxLog2;
-    // The SF scale for Kv on device. Only needed by trt-llm kernels as the scales have to be on the device currently.
-    float const* ptrScaleSfKv;
-    // The SF scale for O on device. Only needed by trt-llm kernels as the scales have to be on the device currently.
-    float const* ptrScaleSfO;
-    // The sequence lengths for K/V. Required by pagedKv kernels to avoid unnecessary computation
-    // based on (ptrCumSeqLensKv[batchIdx + 1] - ptrCumSeqLensKv[batchIdx]).
-    int32_t const* ptrSeqLensKv;
-    // Reserved buffer.
-    int32_t* ptrReservedBuffer;
-    // The softmax stats buffer.
-    float2* ptrSoftmaxStats;
-
-    // The attention window size for sliding window attention.
-    int32_t mAttentionWindowSize;
-    // The batch size
-    int32_t mBatchSize;
-    // The chunked attention size in log2.
-    int32_t mChunkedAttentionSizeLog2;
-    // The factor to add to the maximum value to increase the probability
-    //   of skip correction during next iterations.
-    float mInflateMax;
-    // The log of the Sage Attention block size for K.
-    int32_t mLogNumEltsPerSageAttnBlkK;
-    // The log of the Sage Attention block size for P.
-    int32_t mLogNumEltsPerSageAttnBlkP;
-    // The log of the Sage Attention block size for Q.
-    int32_t mLogNumEltsPerSageAttnBlkQ;
-    // The log of the Sage Attention block size for V.
-    int32_t mLogNumEltsPerSageAttnBlkV;
-    // The sequence lengths for Q and K/V.
-    int32_t mMaxSeqLenQ, mMaxSeqLenKv;
-    // The maximum number of CTAs for Q.
-    int32_t mMaxNumCtasQ;
-    // The maximum number of CTAs for K/V.
-    int32_t mMaxNumCtasKv;
-    // The maximum number of pages per sequence for paged-kv buffer.
-    int32_t mMaxNumPagesPerSeqKv;
-    // The number of heads for K/V.
-    int32_t mNumHeadsKv;
-    // The number of heads for Q.
-    int32_t mNumHeadsQ;
-    // The number of Q heads per K/V head (i.e. mNumHeadsQ / mNumHeadsKv).
-    int32_t mNumHeadsQPerKv;
-    // The number of headsQ per K/V head as a fast_mod_div divisor.
-    FastModDivInt32 mNumHeadsQPerKvDivisor{1};
-    // The hidden size of O.
-    int64_t mNumHiddenEltsO;
-    // The total number of pages in the paged-kv memory pool.
-    int32_t mNumPagesInMemPool;
-    // The number of tokensQ per CTA (used for groupsHeadsTokensQ generation kernel).
-    int32_t mNumTokensPerCtaQ;
-    // The number of tokens per page (used if dynamic numTokensPerPage is enabled).
-    int32_t mNumTokensPerPageLog2;
-    // The output scale for FP8 quantization.
-    float mOutputScale;
-    // The scaling factor for softmax (multiplied by log2 to use faster exp2).
-    float mScaleSoftmaxLog2;
-    // The SF scale for Kv.
-    float mScaleSfKv;
-    // The SF scale for O.
-    float mScaleSfO;
-    // Threshold to decide whether warp skips softmax ops
-    float mSkipSoftmaxThresholdScaleFactor;
-    // The start token index in SF tensor. Used for FP4 SF offset calculation in generation phase
-    // kernel when inflight batching is enabled in TRT-LLM.
-    int32_t mStartTokenIdx;
-    // The sum of sequence lengths for Q and K/V.
-    int32_t mSumOfSeqLensQ, mSumOfSeqLensKv;
-    // The top k value for sparse MLA.
-    int32_t mSparseMlaTopK;
-    // The flag to use block sparse attention.
-    bool mUseBlockSparseAttention;
-
-    // Create the TMA shape/stride for Q.
-    template <class FmhaOptions>
-    static auto makeTmaShapeStrideQ(FmhaOptions const& options, bool groupsHeadsQ, bool groupsTokensHeadsQ,
-        int32_t tileSizeQ, int32_t numEltsInClampedHeadDimQ)
-    {
-
-        //
-        // The Q has shape of [numTokens * numHeadsQPerKv, numHeadsKv * 1, headDim]
-        // when grouping headsQ, otherwise it would be [numTokens, numHeadsQPerKv * numHeadsKv,
-        // headDim].
-
-        // The number of grouped heads for the A matrix of MMA.
-        int32_t numGroupedHeads{1};
-        if (groupsHeadsQ)
-        {
-            numGroupedHeads = std::min(tileSizeQ, options.mNumHeadsQPerKv);
-        }
-
-        // The number of heads.
-        int32_t numHeads{options.mNumHeadsQ};
-        if (groupsHeadsQ)
-        {
-            numHeads /= numGroupedHeads;
-        }
-        // Make sure the math works.
-        TLLM_CHECK_WITH_INFO(numHeads * numGroupedHeads == options.mNumHeadsQ, "internal error");
-
-        // The number of tokens.
-        int32_t numTokens{options.mSumOfSeqLensQ};
-
-        // This maps to flattened TMA shape for Q: (headDim, numTokens, numHeads).
-        auto shape = std::vector<uint64_t>{static_cast<uint64_t>(options.mHeadDimQk),
-            static_cast<uint64_t>(numGroupedHeads), static_cast<uint64_t>(numHeads), static_cast<uint64_t>(numTokens)};
-
-        // The hidden dimension when the tensor contains only Q (i.e. not QKV packed).
-        int32_t const hiddenDimQ{options.mNumHeadsQ * options.mHeadDimQk};
-
-        // The hidden dimension when the Q, K and V tensors are packed.
-        int32_t hiddenDimQkv{hiddenDimQ};
-        if (isPackedQkv(options.mQkvLayout))
-        {
-            TLLM_CHECK_WITH_INFO(!groupsHeadsQ, "internal error");
-            hiddenDimQkv += options.mNumHeadsKv * (options.mHeadDimQk + options.mHeadDimV);
-        }
-
-        // The stride between tokens.
-        int32_t strideTokens{hiddenDimQkv};
-
-        // The stride between heads.
-        int32_t strideHeads{groupsHeadsQ ? numGroupedHeads * options.mHeadDimQk : options.mHeadDimQk};
-
-        // The stride between grouped heads.
-        int32_t strideGroupedHeads{options.mHeadDimQk};
-
-        // Assemble the stride (1, strideTokens, strideHeads).
-        // Swap the first two dimension as mentioned before.
-        auto stride = std::vector<uint64_t>{1, static_cast<uint64_t>(strideGroupedHeads),
-            static_cast<uint64_t>(strideHeads), static_cast<uint64_t>(strideTokens)};
-
-        // The tile shape for TMA.
-        auto tileShapes = std::vector<uint32_t>{
-            static_cast<uint32_t>(numEltsInClampedHeadDimQ), 1, 1, static_cast<uint32_t>(tileSizeQ)};
-        // The number of tokensQ per CTA.
-        int32_t numTokensPerCtaQ{tileSizeQ};
-        // Re-compute the number of tokensQ per CTA if groupsHeadsQ is enabled.
-        if (groupsHeadsQ)
-        {
-            if (groupsTokensHeadsQ)
-            {
-                // Currently, it requires each CTA to process complete headsQ (i.e. numGroupedHeads) at a
-                // time, so it allows paddings in the end. Removing paddings needs re-organizing the Q
-                // tensor to [numTokensQ, numGroupedHeads, numHeads, headDimQ] and we might want to revisit
-                // this in the future.
-                numTokensPerCtaQ = static_cast<int32_t>(numTokensPerCtaQ / numGroupedHeads);
-            }
-            else
-            {
-                numGroupedHeads = tileSizeQ;
-                numTokensPerCtaQ = 1;
-            }
-            tileShapes = std::vector<uint32_t>{static_cast<uint32_t>(numEltsInClampedHeadDimQ),
-                static_cast<uint32_t>(numGroupedHeads), 1, static_cast<uint32_t>(numTokensPerCtaQ)};
-        }
-
-        return std::make_tuple(shape, stride, tileShapes, numTokensPerCtaQ);
-    }
-
-    // Create the TMA shape/stride for O.
-    template <class FmhaOptions>
-    static auto makeTmaShapeStrideO(FmhaOptions const& options)
-    {
-
-        //
-        // TODO: refactor this as makeTmaShapeStrideQ when removing cutlass tma copy.
-        //
-
-        // The number of tokens.
-        int32_t numTokens{options.mSumOfSeqLensQ};
-
-        // The number of heads per K/V head.
-        int32_t numHeadsQPerKv{options.mNumHeadsQPerKv};
-
-        // The batch dimension.
-        int32_t batchSize{1};
-
-        // The cute tensor shape for Q/O: (numTokens, headDim, ((numHeadsKv, numHeadsQPerKv),
-        // batchSize)). This maps to flattened TMA shape for Q/O: (headDim, numTokens, numHeadsKv.
-        // numHeadsQPerKv, batchSize). Note that TMA descriptor expects the first dimension's stride to
-        // be 1, so swap the first two dimension so that the headDim dimension comes first.
-        auto shape = std::vector<uint64_t>{static_cast<uint64_t>(options.mHeadDimV), static_cast<uint64_t>(numTokens),
-            static_cast<uint64_t>(options.mNumHeadsKv), static_cast<uint64_t>(numHeadsQPerKv),
-            static_cast<uint64_t>(batchSize)};
-
-        // The hidden dimension.
-        int32_t const hiddenDimO{options.mNumHeadsQ * options.mHeadDimV};
-
-        // The stride between tokens.
-        int32_t strideTokens{hiddenDimO};
-
-        // The stride between Q heads.
-        int32_t strideHeadsQ{options.mNumHeadsKv * options.mHeadDimV};
-
-        // The stride between sequences.
-        int32_t strideBatch{0};
-
-        // The stride in between K/V heads.
-        int32_t strideHeadsKv{options.mHeadDimV};
-        // Assemble the stride (strideTokens, 1, ((strideHeadsKv, strideHeadsQ), strideBatch)).
-        // Swap the first two dimension as mentioned before.
-        auto stride
-            = std::vector<uint64_t>{1, static_cast<uint64_t>(strideTokens), static_cast<uint64_t>(strideHeadsKv),
-                static_cast<uint64_t>(strideHeadsQ), static_cast<uint64_t>(strideBatch)};
-
-        return std::make_tuple(shape, stride);
-    }
-
-    // Create the shape for K and V.
-    template <class FmhaOptions>
-    static auto makeShapeKv(FmhaOptions const& options, KernelParamsVisualGen const& params)
-    {
-
-        // The number of keys/vals. WARNING: The if/else-if are sorted by priority.
-        int32_t numKeysVals{options.mMaxSeqLenKv};
-        if (isPagedKv(options.mQkvLayout))
-        {
-            numKeysVals = options.mNumTokensPerPage;
-        }
-        else if (isContiguousKv(options.mQkvLayout))
-        {
-            numKeysVals = options.mMaxSeqLenCacheKv;
-        }
-        else
-        {
-            numKeysVals = options.mSumOfSeqLensKv;
-        }
-
-        // The number of heads per K/V head (packed in the sequence length for mGroupsHeadsQ).
-        int32_t numHeadsKv{options.mNumHeadsKv};
-
-        // The batch dimension. WARNING: The if/else-if are sorted by priority.
-        int32_t batchSize{options.mBatchSize};
-        if (isPagedKv(options.mQkvLayout))
-        {
-            batchSize = params.mNumPagesInMemPool;
-        }
-        else if (isContiguousKv(options.mQkvLayout))
-        {
-            batchSize = options.mBatchSize;
-        }
-        else
-        {
-            batchSize = 1;
-        }
-
-        // Return the number of keys and batch.
-        return std::make_tuple(numKeysVals, numHeadsKv, batchSize);
-    }
-
-    // Compute the strides for K and V.
-    template <class FmhaOptions>
-    static auto makeStrideKv(FmhaOptions const& options, Data_type dtypeKv, bool isK)
-    {
-
-        // The maximum headDim of K and V.
-        // Note that contiguousKv or pagedKv will pad K and V to maxHeadDimKv.
-        int32_t const maxHeadDimKv{std::max(options.mHeadDimQk, options.mHeadDimV)};
-        // The hidden dimension for the keys/vals.
-        int32_t const hiddenDimK{options.mNumHeadsKv * options.mHeadDimQk};
-        int32_t const hiddenDimV{options.mNumHeadsKv * options.mHeadDimV};
-        int32_t const maxHiddenDimKv{std::max(hiddenDimK, hiddenDimV)};
-        // The hidden dimension when Q, K and V are packed together.
-        int32_t const hiddenDimQkv{
-            options.mNumHeadsQ * options.mHeadDimQk + options.mNumHeadsKv * (options.mHeadDimQk + options.mHeadDimV)};
-
-        // The stride between the different keys/vals.
-        int32_t strideKeysVals{isK ? hiddenDimK : hiddenDimV};
-        if (isPagedKv(options.mQkvLayout))
-        {
-            strideKeysVals = maxHeadDimKv;
-        }
-        else if (isPackedQkv(options.mQkvLayout))
-        {
-            strideKeysVals = hiddenDimQkv;
-        }
-        else if (isContiguousKv(options.mQkvLayout))
-        {
-            strideKeysVals = maxHeadDimKv;
-        }
-        else if (isSeparateQkv(options.mQkvLayout) && !isK && options.mHeadDimQkNope > 0 && dtypeKv != DATA_TYPE_E4M3)
-        {
-            // Non-FP8 context MLA: tensor V is not contiguous. The token stride is mNumHeadsKv * (mHeadDimQkNope +
-            // mHeadDimV).
-            strideKeysVals = options.mNumHeadsKv * (options.mHeadDimQkNope + options.mHeadDimV);
-        }
-
-        // The stride between heads.
-        int32_t strideHeads{isK ? options.mHeadDimQk : options.mHeadDimV};
-        if (isPagedKv(options.mQkvLayout))
-        {
-            strideHeads = options.mNumTokensPerPage * maxHeadDimKv;
-        }
-        else if (isContiguousKv(options.mQkvLayout))
-        {
-            strideHeads = options.mMaxSeqLenCacheKv * maxHeadDimKv;
-        }
-
-        // The stride between batch items. WARNING: The order of if/else-if matters.
-        int32_t strideBatch{options.mMaxSeqLenKv * hiddenDimK};
-        if (isPagedKv(options.mQkvLayout))
-        {
-            strideBatch = options.mNumTokensPerPage * maxHiddenDimKv;
-        }
-        else if (isContiguousKv(options.mQkvLayout))
-        {
-            strideBatch = 2 * options.mNumHeadsKv * options.mMaxSeqLenCacheKv * maxHeadDimKv;
-        }
-        else
-        {
-            // Always variable seqlens.
-            strideBatch = 0;
-        }
-
-        // The 3 strides (the other ones are 1 and 0).
-        return std::make_tuple(strideKeysVals, strideHeads, strideBatch);
-    }
-
-    // Create the TMA shape/stride for K.
-    template <class FmhaOptions>
-    static auto makeTmaShapeStrideKv(FmhaOptions const& options, KernelParamsVisualGen const& params, Data_type dtypeKv,
-        bool isK, bool storeTransformedKvInTmem)
-    {
-        // The shape elements.
-        auto [numKeys, numHeadsQPerKv, batchSize] = makeShapeKv(options, params);
-        // The stride elements.
-        auto [strideKeys, strideHeads, strideBatch] = makeStrideKv(options, dtypeKv, isK);
-
-        // The headDim.
-        // Note that contiguousKv or pagedKv will pad K and V to maxHeadDimKv.
-        int32_t headDim = isK ? options.mHeadDimQk : options.mHeadDimV;
-        if (isPagedKv(options.mQkvLayout) || isContiguousKv(options.mQkvLayout))
-        {
-            headDim = std::max(options.mHeadDimQk, options.mHeadDimV);
-        }
-
-        // For K, the cute layout: (numKeys, headDim, ((numHeadsQPerKv, numHeadsKv),
-        // batchSize)):(strideKeys, _1, _0, strideHeads, strideBatch). Cute swaps the first two
-        // dimension (to make sure stride of first dimension is 1) and ignores the numHeadsQPerKv
-        // dimension (it's stride is always 0). For V, the headDim dimension is already the first
-        // dimension so no swapping is needed.
-
-        // Therefore, the resulting TMA layout is 4D: (headDim, numKeys, numHeadsKv, batchSize):(1,
-        // strideKeys, strideHeads, strideBatch)
-
-        // Note that for FP4 KV input, elements are stored as uint8_t, each packs 2 FP4 elements.
-        // The column index and strides needs to divide by 2.
-        auto const colIdxDivisor = dtypeKv == DATA_TYPE_E2M1 ? 2 : 1;
-        // When storeTransformedKvInTmem is true, the dimensions reflect FP4 element dimensions, thus
-        // no need to divide.
-
-        auto shape
-            = std::vector<uint64_t>{static_cast<uint64_t>(storeTransformedKvInTmem ? headDim : headDim / colIdxDivisor),
-                static_cast<uint64_t>(numKeys), static_cast<uint64_t>(options.mNumHeadsKv),
-                static_cast<uint64_t>(batchSize)};
-        auto stride = std::vector<uint64_t>{1, static_cast<uint64_t>(strideKeys / colIdxDivisor),
-            static_cast<uint64_t>(strideHeads / colIdxDivisor), static_cast<uint64_t>(strideBatch / colIdxDivisor)};
-
-        return std::make_tuple(shape, stride);
-    }
-
-    // Create the TMA shape/stride for KV scaling factors.
-    template <class FmhaOptions>
-    static auto makeTmaShapeStrideKvSf(
-        FmhaOptions const& options, KernelParamsVisualGen const& params, Data_type dtypeKv, bool isK)
-    {
-        // The shape elements.
-        auto [numKeys, numHeadsQPerKv, batchSize] = makeShapeKv(options, params);
-        // The stride elements.
-        auto [strideKeys, strideHeads, strideBatch] = makeStrideKv(options, dtypeKv, isK);
-
-        // The headDim.
-        // Note that contiguousKv or pagedKv will pad K and V to maxHeadDimKv.
-        int32_t headDim = isK ? options.mHeadDimQk : options.mHeadDimV;
-        if (isPagedKv(options.mQkvLayout) || isContiguousKv(options.mQkvLayout))
-        {
-            headDim = std::max(options.mHeadDimQk, options.mHeadDimV);
-        }
-
-        // The number of elements per SF.
-        int32_t NumEltsPerSf = 16;
-
-        // The KV shape is: (headDim, numKeys, numHeadsKv, batchSize)
-        // Therefore, the KV SF shape should be (headDim / NumEltsPerSf, numKeys, numHeadsKv,
-        // batchSize). Considering the TMA requires box width to be multiple of 16B, without changing the
-        // underlying layout, we reshape into (16, numKeys * headDim / NumEltsPerSf / 16, numHeadsKv,
-        // batchSize)
-
-        // Note that it only works for pagedKv layout.
-        TLLM_CHECK_WITH_INFO(isPagedKv(options.mQkvLayout), "The qkvLayout is not supported.");
-
-        auto shape = std::vector<uint64_t>{16, static_cast<uint64_t>(numKeys * headDim / NumEltsPerSf / 16),
-            static_cast<uint64_t>(options.mNumHeadsKv), static_cast<uint64_t>(batchSize)};
-        auto stride = std::vector<uint64_t>{1, 16, static_cast<uint64_t>(strideHeads / NumEltsPerSf),
-            static_cast<uint64_t>(strideBatch / NumEltsPerSf)};
-
-        return std::make_tuple(shape, stride);
-    }
-
-    // Prepare pointers for TMA descriptors.
-    static std::tuple<void const*, void const*, void const*> getDevicePtrs(
-        TllmGenFmhaRunnerParams const& runnerParams, int32_t bitsPerElt)
-    {
-        // Declare the q, k, v ptrs.
-        void const *qPtr{runnerParams.qPtr}, *kPtr{runnerParams.kPtr}, *vPtr{runnerParams.vPtr};
-
-        // Set Q, K and V pointer from packed QKV tensor.
-        if (isPackedQkv(runnerParams.mQkvLayout))
-        {
-            qPtr = runnerParams.qkvPtr;
-            kPtr = reinterpret_cast<void const*>(reinterpret_cast<char const*>(runnerParams.qkvPtr)
-                + runnerParams.mNumHeadsQ * runnerParams.mHeadDimQk * bitsPerElt / 8 /*bits*/);
-            vPtr = reinterpret_cast<void const*>(reinterpret_cast<char const*>(runnerParams.qkvPtr)
-                + (runnerParams.mNumHeadsQ + runnerParams.mNumHeadsKv) * runnerParams.mHeadDimQk * bitsPerElt
-                    / 8 /*bits*/);
-        }
-        // Set K and V pointer from pagedKv tensor.
-        else if (isPagedKv(runnerParams.mQkvLayout))
-        {
-            // Note that the offsets will be fully handled by the pageIdx buffer.
-            kPtr = runnerParams.kvPtr;
-            vPtr = runnerParams.kvPtr;
-        }
-        // Set K and V pointer from contiguousQAnddKv tensor.
-        else if (isContiguousKv(runnerParams.mQkvLayout))
-        {
-            kPtr = runnerParams.kvPtr;
-            // The maximum headDim of K and V.
-            // Note that contiguousKv or pagedKv will pad K and V to maxHeadDimKv.
-            int32_t const maxHeadDimKv{std::max(runnerParams.mHeadDimQk, runnerParams.mHeadDimV)};
-            vPtr = reinterpret_cast<void const*>(reinterpret_cast<char const*>(runnerParams.kvPtr)
-                + runnerParams.mNumHeadsKv * runnerParams.mMaxSeqLenCacheKv * maxHeadDimKv * bitsPerElt / 8 /*bits*/);
-        }
-
-        // Return the pointers.
-        return std::make_tuple(qPtr, kPtr, vPtr);
-    }
-
-    // Build tma descriptors.
-    template <class FmhaOptions>
-    static CUtensorMap buildNdTmaDescriptor(FmhaOptions const& options, Data_type dtypeElt,
-        std::vector<uint64_t> const& shapes, std::vector<uint64_t> const& strides,
-        std::vector<uint32_t> const& tileShapes, void* gmemAddr, bool swizzled = true, bool unpack4b = false)
-    {
-        CUtensorMap desc{};
-        // The data type.
-        CUtensorMapDataType tmaDataFormat;
-        if (dtypeElt == DATA_TYPE_E2M1)
-        {
-            tmaDataFormat = unpack4b ? CU_TENSOR_MAP_DATA_TYPE_16U4_ALIGN16B : CU_TENSOR_MAP_DATA_TYPE_UINT8;
-        }
-        else if (dtypeElt == DATA_TYPE_E4M3)
-        {
-            tmaDataFormat = CU_TENSOR_MAP_DATA_TYPE_UINT8;
-        }
-        else if (dtypeElt == DATA_TYPE_FP16)
-        {
-            tmaDataFormat = CU_TENSOR_MAP_DATA_TYPE_FLOAT16;
-        }
-        else if (dtypeElt == DATA_TYPE_BF16)
-        {
-            tmaDataFormat = CU_TENSOR_MAP_DATA_TYPE_BFLOAT16;
-        }
-        else
-        {
-            TLLM_CHECK_WITH_INFO(false, "Unexpected dtype %d", static_cast<int32_t>(dtypeElt));
-        }
-
-        // The swizzle type.
-        CUtensorMapSwizzle swizzleType;
-        int32_t numBytesInLeadingDim = tileShapes[0] * get_size_in_bits(dtypeElt) / 8 /*bits*/;
-        if (!swizzled)
-        {
-            swizzleType = CU_TENSOR_MAP_SWIZZLE_NONE;
-        }
-        else if (tmaDataFormat == CU_TENSOR_MAP_DATA_TYPE_16U4_ALIGN16B)
-        {
-            swizzleType = CU_TENSOR_MAP_SWIZZLE_128B;
-        }
-        else if ((numBytesInLeadingDim % 128) == 0)
-        {
-            swizzleType = CU_TENSOR_MAP_SWIZZLE_128B;
-        }
-        else if ((numBytesInLeadingDim % 64) == 0)
-        {
-            swizzleType = CU_TENSOR_MAP_SWIZZLE_64B;
-        }
-        else if ((numBytesInLeadingDim % 32) == 0)
-        {
-            swizzleType = CU_TENSOR_MAP_SWIZZLE_32B;
-        }
-        else
-        {
-            TLLM_CHECK_WITH_INFO(false, "Unexpected numBytesInLeadingDim %d", numBytesInLeadingDim);
-        }
-
-        // Check gmem address must be 16B-aligned
-        TLLM_CHECK((reinterpret_cast<uint64_t>(gmemAddr) & 0b1111) == 0);
-
-        // Check shape must be in range [1, 2^32]
-        int32_t dim = shapes.size();
-        // Max five dimension and min 2 dimension.
-        TLLM_CHECK((dim <= 5) && (dim >= 2));
-        // Check shape range.
-        for (int32_t ii = 0; ii < dim; ++ii)
-        {
-            TLLM_CHECK(shapes[ii] >= (uint64_t(1)));       // Size must be min 1
-            TLLM_CHECK(shapes[ii] <= (uint64_t(1) << 32)); // Size must be max 2^32
-        }
-
-        // TMA descriptor does not store the zeroth stride and assumes it is 1.
-        TLLM_CHECK(static_cast<int32_t>(strides.size()) == dim);
-        TLLM_CHECK(strides[0] == 1);
-
-        // Build strides in bytes.
-        // cuTensorMapEncodeTiled ignores the stride of the first dimension (implicitly 1).
-        std::vector<uint64_t> stridesInBytes(dim - 1);
-        for (int32_t ii = 0; ii < dim - 1; ++ii)
-        {
-            stridesInBytes[ii]
-                = strides[ii + 1] * std::max(get_size_in_bits(dtypeElt), static_cast<size_t>(8)) / 8 /*bit*/;
-        }
-
-        // Set tile strides to 0;
-        std::vector<uint32_t> tileStrides(dim, 1);
-
-        // Build the descriptor.
-        CUresult result = cuTensorMapEncodeTiled(&desc, tmaDataFormat,
-            /*tensorRank=*/dim, gmemAddr, shapes.data(), stridesInBytes.data(), tileShapes.data(), tileStrides.data(),
-            /*interleave=*/CU_TENSOR_MAP_INTERLEAVE_NONE, swizzleType,
-            /*l2Promotion=*/CU_TENSOR_MAP_L2_PROMOTION_L2_128B,
-            /*oobFill=*/CU_TENSOR_MAP_FLOAT_OOB_FILL_NONE);
-
-        if (result != CUDA_SUCCESS)
-        {
-            char const* err_str;
-            cuGetErrorString(result, &err_str);
-            // Note that the error is thrown out before launching fmha kernels, so it is highly possible that
-            // the errors are broadcasted by previous kernels. Please enable CUDA_LAUNCH_BLOCKING or use cuda-gdb
-            // for more details.
-            std::cerr << "Error: Failed to initialize the TMA descriptor due to " << err_str << std::endl;
-            std::cerr << "tmaFormat: " << static_cast<int>(tmaDataFormat) << " dim: " << dim << " gmem: " << gmemAddr
-                      << std::endl;
-            std::cerr << "Shape: " << shapes[0] << " " << shapes[1] << " " << shapes[2] << " " << shapes[3] << " "
-                      << shapes[4] << std::endl;
-            std::cerr << "Stride: " << stridesInBytes[0] << " " << stridesInBytes[1] << " " << stridesInBytes[2] << " "
-                      << stridesInBytes[3] << std::endl;
-            std::cerr << "tileShapes: " << tileShapes[0] << " " << tileShapes[1] << " " << tileShapes[2] << " "
-                      << tileShapes[3] << " " << tileShapes[4] << std::endl;
-            std::cerr << "tileStrides: " << tileStrides[0] << " " << tileStrides[1] << " " << tileStrides[2] << " "
-                      << tileStrides[3] << " " << tileStrides[4] << std::endl;
-            std::cerr << "swizzleType: " << int(swizzleType) << std::endl;
-            TLLM_CHECK(false);
-        }
-
-        return desc;
-    }
-
-    // Setup the kernel parameters.
-    template <class FmhaOptions_, class KernelMeta>
-    static KernelParamsVisualGen setKernelParams(
-        FmhaOptions_ const& options, KernelMeta const& kernelMeta, int32_t maxNumCtasQ, int32_t maxNumCtasKv)
-    {
-
-        // Create the return struct.
-        KernelParamsVisualGen params;
-
-        // Get the device pointers for TMA descriptors.
-        auto [qPtr, kPtr, vPtr] = getDevicePtrs(options, get_size_in_bits(kernelMeta.mDataTypeKv));
-
-        // The maximum headDim of K and V.
-        // Note that contiguousKv or pagedKv will pad K and V to maxHeadDimKv.
-        int32_t const maxHeadDimKv{std::max(options.mHeadDimQk, options.mHeadDimV)};
-
-        // Set the number of pages in the memory pool for paged K/V cache.
-        if (isPagedKv(options.mQkvLayout))
-        {
-            params.mNumPagesInMemPool = options.mNumPagesInMemPool == 0
-                ? options.mMaxNumPagesPerSeqKv * 2 * options.mBatchSize
-                : options.mNumPagesInMemPool;
-        }
-
-        // The number of elements in 128B for Q.
-        int32_t numEltsIn128BQ = (128 * 8) / get_size_in_bits(kernelMeta.mDataTypeQ);
-        // The number of head elts (per token) in each block of shared memory.
-        int32_t numEltsInClampedHeadDimQ = std::min(numEltsIn128BQ, options.mHeadDimQk);
-
-        // Shape/stride for gmem tensor Q.
-        auto [shapeQ, strideQ, tileShapeQ, numTokensPerCtaQ] = makeTmaShapeStrideQ(options, kernelMeta.mGroupsHeadsQ,
-            kernelMeta.mGroupsTokensHeadsQ, kernelMeta.mTileSizeQ, numEltsInClampedHeadDimQ);
-        // Build tma descriptor for Q.
-        params.tmaQ_ = buildNdTmaDescriptor(
-            options, kernelMeta.mDataTypeQ, shapeQ, strideQ, tileShapeQ, const_cast<void*>(qPtr));
-
-        // The number of keys per tile.
-        int32_t numKeysPerTile = isPagedKv(options.mQkvLayout)
-            ? std::min(options.mNumTokensPerPage, kernelMeta.mTileSizeKv)
-            : kernelMeta.mTileSizeKv;
-        // The number of elements in 128B for Q.
-        int32_t numEltsIn128BKv = (128 * 8) / get_size_in_bits(kernelMeta.mDataTypeKv);
-        // The number of head elts (per token) in each block of shared memory (see above explanation).
-        // HeadDim will be split into multiple headDimStages (128) if maxHeadDimKv > 128.
-        int32_t numEltsInClampedHeadDimKv = std::min({numEltsIn128BKv, maxHeadDimKv, 128});
-
-        // Do we have to transform K/V before MMA?
-        bool const transformsKv{kernelMeta.mDataTypeKv != kernelMeta.mDataTypeQ};
-        // Whether store transformed K/V in TMEM.
-        bool const isSwapsMmaAb = isSwapsMmaAbForGenerationKernel(static_cast<FmhaKernelType>(kernelMeta.mKernelType));
-        bool const storeTransformedKvInTmem{kernelMeta.mDataTypeKv == DATA_TYPE_E2M1
-            && kernelMeta.mDataTypeQ == DATA_TYPE_E4M3 && maxHeadDimKv >= 128 && isSwapsMmaAb};
-
-        // Shape/stride for gmem tensor Kv.
-        auto [shapeK, strideK]
-            = makeTmaShapeStrideKv(options, params, kernelMeta.mDataTypeKv, /*isK*/ true, storeTransformedKvInTmem);
-        auto [shapeV, strideV]
-            = makeTmaShapeStrideKv(options, params, kernelMeta.mDataTypeKv, /*isK*/ false, storeTransformedKvInTmem);
-        // Whether swizzle is needed for K/V.
-        bool const swizzleKv{storeTransformedKvInTmem || !transformsKv};
-        // Note that for FP4 KV input, elements are stored as uint8_t, each packs 2 FP4 elements.
-        auto const numEltsDivisor = kernelMeta.mDataTypeKv == DATA_TYPE_E2M1 && !storeTransformedKvInTmem ? 2 : 1;
-        // The tileShapes for K/V.
-        std::vector<uint32_t> tileShapeKv(shapeK.size(), 1);
-        tileShapeKv[0] = numEltsInClampedHeadDimKv / numEltsDivisor;
-        tileShapeKv[1] = numKeysPerTile;
-
-        // If sparse MLA is enabled, the shape and stride for K need to be updated for 2D layout (numTokensKvInPagedKv,
-        // headDimQk).
-        if (options.mSparseMla)
-        {
-            shapeK = std::vector<uint64_t>{static_cast<uint64_t>(options.mHeadDimQk), static_cast<uint64_t>(INT_MAX)};
-            strideK = std::vector<uint64_t>{1, static_cast<uint64_t>(options.mHeadDimQk)};
-            tileShapeKv[1] = 1;
-        }
-
-        // Build tma descriptor for K.
-        params.tmaK_ = buildNdTmaDescriptor(options, kernelMeta.mDataTypeKv, shapeK, strideK, tileShapeKv,
-            const_cast<void*>(kPtr),
-            /*swizzled = */ swizzleKv, /*unpack4b = */ storeTransformedKvInTmem);
-        // Build tma descriptor for V.
-        params.tmaV_ = buildNdTmaDescriptor(options, kernelMeta.mDataTypeKv, shapeV, strideV, tileShapeKv,
-            const_cast<void*>(vPtr),
-            /*swizzled = */ swizzleKv, /*unpack4b = */ storeTransformedKvInTmem);
-        // If the KV dtype is E2m1, additional scaling factors are needed for dequant.
-        if (kernelMeta.mDataTypeKv == DATA_TYPE_E2M1)
-        {
-            // The number of elements per SF.
-            int32_t NumEltsPerSf = 16;
-            // Compute the shape and stride for SF tensor.
-            // FIXME: assume K and V uses the same shape.
-            auto [shapeKvSf, strideKvSf]
-                = makeTmaShapeStrideKvSf(options, params, kernelMeta.mDataTypeKv, /*isK*/ true);
-
-            // The tileShapes for K/V.
-            std::vector<uint32_t> tileShapeKvSf(shapeKvSf.size(), 1);
-            tileShapeKvSf[0] = 16;
-            tileShapeKvSf[1] = numKeysPerTile * maxHeadDimKv / NumEltsPerSf / 16;
-
-            // The tile box is reshaped from (headDim / NumEltsPerSf, tileSizeKv) into (16, tileSizeKv *
-            // headDim / NumEltsPerSf / 16). See makeTmaShapeStrideKvSf for details. Build tma descriptor
-            // for K SF.
-            params.tmaKSf_ = buildNdTmaDescriptor(options, DATA_TYPE_E4M3, shapeKvSf, strideKvSf, tileShapeKvSf,
-                const_cast<void*>(options.kvSfPtr),
-                /*swizzled = */ false);
-
-            // Build tma descriptor for V SF.
-            params.tmaVSf_ = buildNdTmaDescriptor(options, DATA_TYPE_E4M3, shapeKvSf, strideKvSf, tileShapeKvSf,
-                const_cast<void*>(options.kvSfPtr),
-                /*swizzled = */ false);
-        }
-
-        // Shape/stride for gmem tensor O.
-        auto [shapeO, strideO] = makeTmaShapeStrideO(options);
-        // The tileShapes for O.
-        std::vector<uint32_t> tileShapeO(shapeO.size(), 1);
-        tileShapeO[0] = numEltsInClampedHeadDimQ;
-        tileShapeO[1] = kernelMeta.mTileSizeQ;
-        // Build tma descriptor for O.
-        params.tmaO_ = buildNdTmaDescriptor(
-            options, kernelMeta.mDataTypeQ, shapeO, strideO, tileShapeO, const_cast<void*>(options.oPtr));
-
-        // Set the other kernel parameters.
-        params.ptrAttentionSinks = options.attentionSinksPtr;
-        params.ptrCumSeqLensQ = options.cumSeqLensQPtr;
-        params.ptrCumSeqLensKv = options.cumSeqLensKvPtr;
-
-        // The packed custom mask.
-        params.ptrCustomMask = options.customMaskPtr;
-        // The packed custom mask's offsets of each sequence.
-        params.ptrCustomMaskOffsets = options.customMaskOffsetsPtr;
-        // The first sparseMask offsets in the Kv sequence dimension.
-        params.ptrFirstSparseMaskOffsetsKv = options.firstSparseMaskOffsetsKvPtr;
-
-        // The output buffer.
-        params.ptrO = options.oPtr;
-        // The output scaling factor buffer.
-        params.ptrSfO = options.oSfPtr;
-
-        // TRT-LLM restrictions: the quantization scales must be on the device.
-        params.ptrOutputScale = options.outputScalePtr;
-
-        // The sequence lengths for Kv.
-        params.ptrSeqLensKv = options.seqLensKvPtr;
-
-        // The partial buffers' pointers when the multiCtasKv mode is enabled.
-        int64_t partialStatsBufferSize = options.mMultiProcessorCount * kernelMeta.mStepQ;
-        params.ptrMultiCtasKvCounter = options.multiCtasKvCounterPtr;
-        params.ptrPartialStats = reinterpret_cast<float2*>(options.multiCtasKvScratchPtr);
-        params.ptrPartialO = params.ptrPartialStats + partialStatsBufferSize;
-
-        params.ptrPageIdxKv = options.kvPageIdxPtr;
-        params.ptrScaleSoftmaxLog2 = options.scaleSoftmaxLog2Ptr;
-
-        params.ptrScaleSfKv = options.kvSfScalePtr;
-        params.ptrScaleSfO = options.oSfScalePtr;
-
-        // Set SageAttn parameters.
-        if constexpr (detail::HasSageAttnParams<FmhaOptions_>::value)
-        {
-            params.ptrSageAttnSfsQ = options.sageAttnSfsQPtr;
-            params.ptrSageAttnSfsK = options.sageAttnSfsKPtr;
-            params.ptrSageAttnSfsP = options.sageAttnSfsPPtr;
-            params.ptrSageAttnSfsV = options.sageAttnSfsVPtr;
-
-            params.mLogNumEltsPerSageAttnBlkQ = options.mLogNumEltsPerSageAttnBlkQ;
-            params.mLogNumEltsPerSageAttnBlkK = options.mLogNumEltsPerSageAttnBlkK;
-            params.mLogNumEltsPerSageAttnBlkP = options.mLogNumEltsPerSageAttnBlkP;
-            params.mLogNumEltsPerSageAttnBlkV = options.mLogNumEltsPerSageAttnBlkV;
-            params.mInflateMax = 0.4f;
-        }
-
-        // The softmax stats buffer with shape of [numTokensQ x numHeadsQ].
-        // The max/sum values are packed into float2.
-        params.ptrSoftmaxStats = options.softmaxStatsPtr;
-
-        params.mAttentionWindowSize = options.mAttentionWindowSize;
-        if (isSlidingOrChunkedCausalMask(static_cast<TrtllmGenAttentionMaskType>(kernelMeta.mMaskType))
-            && options.mChunkedAttentionSize != INT_MAX)
-        {
-            TLLM_CHECK_WITH_INFO((options.mChunkedAttentionSize & (options.mChunkedAttentionSize - 1)) == 0,
-                "Chunked attention size must be a power of 2");
-            params.mChunkedAttentionSizeLog2 = std::log2(options.mChunkedAttentionSize);
-        }
-        else
-        {
-            // Default 0 means that chunked attention is disabled.
-            params.mChunkedAttentionSizeLog2 = 0;
-        }
-        params.mMaxSeqLenQ = options.mMaxSeqLenQ;
-        params.mMaxSeqLenKv = options.mMaxSeqLenKv;
-        params.mMaxNumCtasQ = maxNumCtasQ;
-        params.mMaxNumCtasKv = maxNumCtasKv;
-        params.mMaxNumPagesPerSeqKv = options.mMaxNumPagesPerSeqKv;
-        params.mSumOfSeqLensQ = options.mSumOfSeqLensQ;
-        params.mSumOfSeqLensKv = options.mSumOfSeqLensKv;
-        params.mBatchSize = options.mBatchSize;
-        params.mNumHeadsQ = options.mNumHeadsQ;
-        params.mNumHeadsKv = options.mNumHeadsKv;
-        params.mNumHeadsQPerKv = options.mNumHeadsQPerKv;
-        params.mNumHeadsQPerKvDivisor = FastModDivInt32{options.mNumHeadsQPerKv};
-        params.mNumHiddenEltsO = options.mNumHeadsQ * options.mHeadDimQk;
-        params.mNumTokensPerCtaQ = numTokensPerCtaQ;
-        params.mNumTokensPerPageLog2 = 0;
-        if (isPagedKv(options.mQkvLayout))
-        {
-            TLLM_CHECK_WITH_INFO((options.mNumTokensPerPage & (options.mNumTokensPerPage - 1)) == 0,
-                "NumTokensPerPage must be a power of 2");
-            params.mNumTokensPerPageLog2 = static_cast<int32_t>(std::log2(options.mNumTokensPerPage));
-        }
-        params.mOutputScale = 1.f;
-        params.mScaleSoftmaxLog2 = (1.f / (std::sqrt((float) (options.mHeadDimQk)) * options.mScaleQ)) * M_LOG2E;
-        params.mStartTokenIdx = options.mSfStartTokenIdx;
-        // The sparseMlaTopK needs to be a multiple of 4 as we use 16B cpAsync instructions for the indices.
-        TLLM_CHECK_WITH_INFO(
-            !options.mSparseMla || (options.mSparseMlaTopK % 4) == 0, "SparseMlaTopK must be a multiple of 4");
-        params.mSparseMlaTopK = options.mSparseMlaTopK;
-        params.mUseBlockSparseAttention = options.mUseBlockSparseAttention;
-        params.mSkipSoftmaxThresholdScaleFactor = options.mSkipSoftmaxThresholdScaleFactor;
-        return params;
-    }
-};
-
-////////////////////////////////////////////////////////////////////////////////////////////////////
-
-} // namespace kernels
-
-TRTLLM_NAMESPACE_END
diff --git a/cpp/tensorrt_llm/nanobind/thop/bindings.cpp b/cpp/tensorrt_llm/nanobind/thop/bindings.cpp
index 4a5fe86b6ccf..fc161ab4a6ca 100644
--- a/cpp/tensorrt_llm/nanobind/thop/bindings.cpp
+++ b/cpp/tensorrt_llm/nanobind/thop/bindings.cpp
@@ -70,9 +70,7 @@ void initBindings(nb::module_& m)
         nb::arg("cu_kv_seqlens") = std::nullopt, nb::arg("fmha_scheduler_counter") = std::nullopt,
         nb::arg("mla_bmm1_scale") = std::nullopt, nb::arg("mla_bmm2_scale") = std::nullopt,
         nb::arg("quant_q_buffer") = std::nullopt, nb::arg("flash_mla_tile_scheduler_metadata") = std::nullopt,
-        nb::arg("flash_mla_num_splits") = std::nullopt, nb::arg("sage_attn_num_elts_per_blk_q") = 0,
-        nb::arg("sage_attn_num_elts_per_blk_k") = 0, nb::arg("sage_attn_num_elts_per_blk_v") = 0,
-        nb::arg("sage_attn_qk_int8") = false, "Multi-head attention operation",
+        nb::arg("flash_mla_num_splits") = std::nullopt, "Multi-head attention operation",
         nb::call_guard<nb::gil_scoped_release>());
 
     m.def(
diff --git a/cpp/tensorrt_llm/thop/attentionOp.cpp b/cpp/tensorrt_llm/thop/attentionOp.cpp
index 19b1a84eb746..9a7af4da49f6 100644
--- a/cpp/tensorrt_llm/thop/attentionOp.cpp
+++ b/cpp/tensorrt_llm/thop/attentionOp.cpp
@@ -162,14 +162,6 @@ class Runner : public RunnerBase
         T* attention_input = static_cast<T*>(qkv_or_q.slice(0, token_offset).data_ptr());
         T* k_ptr = nullptr;
         T* v_ptr = nullptr;
-        if (k.has_value())
-        {
-            k_ptr = static_cast<T*>(k->slice(0, token_offset).data_ptr());
-        }
-        if (v.has_value())
-        {
-            v_ptr = static_cast<T*>(v->slice(0, token_offset).data_ptr());
-        }
         AttentionOutT* context_buf = static_cast<AttentionOutT*>(output.slice(0, token_offset).data_ptr());
         TORCH_CHECK(!op.mFuseFp4Quant || output_sf.has_value());
         void* context_buf_sf = op.mFuseFp4Quant ? output_sf->data_ptr() : nullptr;
@@ -233,6 +225,8 @@ class Runner : public RunnerBase
                 TORCH_CHECK(k->strides()[1] == 1);
                 TORCH_CHECK(v->strides()[1] == 1);
 
+                k_ptr = static_cast<T*>(k->slice(0, token_offset).data_ptr());
+                v_ptr = static_cast<T*>(v->slice(0, token_offset).data_ptr());
                 mla_params.k_buf = k_ptr;
                 mla_params.v_buf = v_ptr;
 
@@ -636,20 +630,14 @@ void attention(torch::Tensor q, std::optional<torch::Tensor> k, std::optional<to
     std::optional<torch::Tensor> cu_q_seqlens, std::optional<torch::Tensor> cu_kv_seqlens,
     std::optional<torch::Tensor> fmha_scheduler_counter, std::optional<torch::Tensor> mla_bmm1_scale,
     std::optional<torch::Tensor> mla_bmm2_scale, std::optional<torch::Tensor> quant_q_buffer,
-    std::optional<torch::Tensor> flash_mla_tile_scheduler_metadata, std::optional<torch::Tensor> flash_mla_num_splits,
-    int64_t const sage_attn_num_elts_per_blk_q, int64_t const sage_attn_num_elts_per_blk_k,
-    int64_t const sage_attn_num_elts_per_blk_v, bool sage_attn_qk_int8)
+    std::optional<torch::Tensor> flash_mla_tile_scheduler_metadata, std::optional<torch::Tensor> flash_mla_num_splits)
 {
     TLLM_LOG_TRACE("Attention op starts at layer %d", layer_idx);
     // Use these tensors to infer if the attention is using KV cache
     bool const use_kv_cache = kv_cache_block_offsets.has_value() && host_kv_cache_pool_pointers.has_value()
         && host_kv_cache_pool_mapping.has_value();
-    // Currently, SageAttention block-size options are only consumed by the TllmGen backend path.
-    bool const use_sage_attn
-        = sage_attn_num_elts_per_blk_q > 0 || sage_attn_num_elts_per_blk_k > 0 || sage_attn_num_elts_per_blk_v > 0;
 
-    TLLM_CHECK_WITH_INFO(is_mla_enable || is_fused_qkv || use_sage_attn,
-        "Context attention only allows these non-MLA cases: fused QKV; separate QKV with SageAttention");
+    TLLM_CHECK_WITH_INFO(is_mla_enable || is_fused_qkv, "Only fused QKV is supported for non-MLA attention now");
     TLLM_CHECK_WITH_INFO(update_kv_cache, "KV cache update cannot be disabled now");
     auto qkv_or_q = q;
     if (is_fused_qkv)
@@ -662,13 +650,7 @@ void attention(torch::Tensor q, std::optional<torch::Tensor> k, std::optional<to
         TLLM_CHECK_WITH_INFO(k.has_value(), "The k tensor should be provided if updating KV cache with unfused K/V");
         TLLM_CHECK_WITH_INFO(v.has_value(), "The v tensor should be provided if updating KV cache with unfused K/V");
     }
-    if (use_sage_attn)
-    {
-        TLLM_CHECK_WITH_INFO(
-            !is_fused_qkv, "SageAttention requires separate q/k/v tensors (is_fused_qkv must be false).");
-        TLLM_CHECK_WITH_INFO(k.has_value(), "SageAttention requires k tensor to be provided.");
-        TLLM_CHECK_WITH_INFO(v.has_value(), "SageAttention requires v tensor to be provided.");
-    }
+
     auto const dtype = tensorrt_llm::runtime::TorchUtils::dataType(qkv_or_q.scalar_type());
     auto const out_dtype = output.scalar_type();
     bool const is_fp8_out = out_dtype == torch::kFloat8_e4m3fn;
@@ -753,19 +735,15 @@ void attention(torch::Tensor q, std::optional<torch::Tensor> k, std::optional<to
     op->mRotaryEmbeddingLongMscale = rotary_embedding_long_m_scale;
     op->mRotaryEmbeddingMaxPositions = rotary_embedding_max_positions;
     op->mRotaryEmbeddingOriginalMaxPositions = rotary_embedding_original_max_positions;
-    op->mFP8ContextFMHA = is_fp8_out || is_fp4_out || (op->mKVCacheQuantMode.hasFp8KvCache() && use_paged_context_fmha)
-        || use_sage_attn;
+    op->mFP8ContextFMHA = is_fp8_out || is_fp4_out || (op->mKVCacheQuantMode.hasFp8KvCache() && use_paged_context_fmha);
     op->mFP8AttenOutput = is_fp8_out;
     op->mPagedContextFMHA = use_paged_context_fmha;
+
     op->mAttentionChunkSize = attention_chunk_size;
     op->mSkipSoftmaxThresholdScaleFactorPrefill
         = static_cast<float>(skip_softmax_threshold_scale_factor_prefill.value_or(0));
     op->mSkipSoftmaxThresholdScaleFactorDecode
         = static_cast<float>(skip_softmax_threshold_scale_factor_decode.value_or(0));
-    op->mSageAttnNumEltsPerBlkQ = static_cast<int>(sage_attn_num_elts_per_blk_q);
-    op->mSageAttnNumEltsPerBlkK = static_cast<int>(sage_attn_num_elts_per_blk_k);
-    op->mSageAttnNumEltsPerBlkV = static_cast<int>(sage_attn_num_elts_per_blk_v);
-    op->mSageAttnQkInt8 = sage_attn_qk_int8;
 #ifdef SKIP_SOFTMAX_STAT
     op->mSkipSoftmaxTotalBlocks = reinterpret_cast<uint32_t*>(skip_softmax_stat.value().data_ptr());
     op->mSkipSoftmaxSkippedBlocks = op->mSkipSoftmaxTotalBlocks + 1;
diff --git a/cpp/tensorrt_llm/thop/attentionOp.h b/cpp/tensorrt_llm/thop/attentionOp.h
index 27ce5e89ec44..0fc4788d6f0b 100644
--- a/cpp/tensorrt_llm/thop/attentionOp.h
+++ b/cpp/tensorrt_llm/thop/attentionOp.h
@@ -78,9 +78,7 @@ void attention(torch::Tensor q, std::optional<torch::Tensor> k, std::optional<to
     std::optional<torch::Tensor> fmha_scheduler_counter, std::optional<torch::Tensor> mla_bmm1_scale,
     std::optional<torch::Tensor> mla_bmm2_scale, std::optional<torch::Tensor> quant_q_buffer,
     std::optional<torch::Tensor> flash_mla_tile_scheduler_metadata = std::nullopt,
-    std::optional<torch::Tensor> flash_mla_num_splits = std::nullopt, int64_t const sage_attn_num_elts_per_blk_q = 0,
-    int64_t const sage_attn_num_elts_per_blk_k = 0, int64_t const sage_attn_num_elts_per_blk_v = 0,
-    bool sage_attn_qk_int8 = false);
+    std::optional<torch::Tensor> flash_mla_num_splits = std::nullopt);
 
 struct KvCachePoolPointers
 {
diff --git a/examples/visual_gen/README.md b/examples/visual_gen/README.md
index 5f626842aacd..0ffaebc113ea 100644
--- a/examples/visual_gen/README.md
+++ b/examples/visual_gen/README.md
@@ -62,17 +62,6 @@ python visual_gen_wan_t2v.py \
     --output_path output.mp4
 ```
 
-**With SageAttention (FP8/INT8 per-block quantized attention):**
-```bash
-python visual_gen_wan_t2v.py \
-    --model_path ${MODEL_ROOT}/Wan2.1-T2V-1.3B-Diffusers \
-    --prompt "A cute cat playing piano" \
-    --height 480 --width 832 --num_frames 33 \
-    --attention_backend TRTLLM \
-    --enable_sage_attention \
-    --output_path output.mp4
-```
-
 **With TeaCache:**
 ```bash
 python visual_gen_wan_t2v.py \
@@ -229,7 +218,6 @@ python visual_gen_ltx2.py \
 | `--enable_teacache` | ✓ | ✓ | — | False | Cache optimization |
 | `--teacache_thresh` | ✓ | ✓ | — | 0.2 | TeaCache similarity threshold |
 | `--attention_backend` | ✓ | ✓ | — | VANILLA | `VANILLA`, `TRTLLM`, or `FA4` |
-| `--enable_sage_attention` | — | ✓ | — | False | SageAttention (requires `TRTLLM` attention backend) |
 | `--cfg_size` | — | ✓ | — | 1 | CFG parallelism |
 | `--ulysses_size` | ✓ | ✓ | — | 1 | Sequence parallelism |
 | `--linear_type` | ✓ | ✓ | — | default | Quantization type |
diff --git a/examples/visual_gen/visual_gen_wan_i2v.py b/examples/visual_gen/visual_gen_wan_i2v.py
index 722651d128c9..83e8edaadf91 100644
--- a/examples/visual_gen/visual_gen_wan_i2v.py
+++ b/examples/visual_gen/visual_gen_wan_i2v.py
@@ -121,13 +121,6 @@ def parse_args():
         "Note: TRTLLM falls back to VANILLA for cross-attention.",
     )
 
-    # SageAttention (requires --attention_backend TRTLLM)
-    parser.add_argument(
-        "--enable_sage_attention",
-        action="store_true",
-        help="Enable SageAttention (per-block INT8 quantized Q/K/V). Requires TRTLLM backend.",
-    )
-
     # Parallelism
     parser.add_argument(
         "--cfg_size",
@@ -183,19 +176,8 @@ def _linear_type_to_quant_config(linear_type: str):
 def main():
     args = parse_args()
 
-    attention_cfg = {
-        "backend": args.attention_backend,
-    }
-    if args.enable_sage_attention:
-        attention_cfg["sage_attention_config"] = {
-            "num_elts_per_blk_q": 1,
-            "num_elts_per_blk_k": 16,
-            "num_elts_per_blk_v": 1,
-            "qk_int8": True,
-        }
-
     kwargs = dict(
-        attention=attention_cfg,
+        attention={"backend": args.attention_backend},
         teacache={
             "enable_teacache": args.enable_teacache,
             "teacache_thresh": args.teacache_thresh,
diff --git a/examples/visual_gen/visual_gen_wan_t2v.py b/examples/visual_gen/visual_gen_wan_t2v.py
index 03ea075b885e..572c762e6b43 100755
--- a/examples/visual_gen/visual_gen_wan_t2v.py
+++ b/examples/visual_gen/visual_gen_wan_t2v.py
@@ -115,13 +115,6 @@ def parse_args():
         "Note: TRTLLM falls back to VANILLA for cross-attention.",
     )
 
-    # SageAttention (requires --attention_backend TRTLLM)
-    parser.add_argument(
-        "--enable_sage_attention",
-        action="store_true",
-        help="Enable SageAttention (per-block INT8 quantized Q/K/V). Requires TRTLLM backend.",
-    )
-
     # Parallelism
     parser.add_argument(
         "--cfg_size",
@@ -191,20 +184,9 @@ def main():
             f"{num_heads // args.ulysses_size} heads per GPU"
         )
 
-    attention_cfg = {
-        "backend": args.attention_backend,
-    }
-    if args.enable_sage_attention:
-        attention_cfg["sage_attention_config"] = {
-            "num_elts_per_blk_q": 1,
-            "num_elts_per_blk_k": 16,
-            "num_elts_per_blk_v": 1,
-            "qk_int8": True,
-        }
-
     kwargs = dict(
         revision=args.revision,
-        attention=attention_cfg,
+        attention={"backend": args.attention_backend},
         teacache={
             "enable_teacache": args.enable_teacache,
             "teacache_thresh": args.teacache_thresh,
diff --git a/tensorrt_llm/_torch/attention_backend/trtllm.py b/tensorrt_llm/_torch/attention_backend/trtllm.py
index d67eb907283e..271538190c8a 100644
--- a/tensorrt_llm/_torch/attention_backend/trtllm.py
+++ b/tensorrt_llm/_torch/attention_backend/trtllm.py
@@ -407,10 +407,6 @@ def run(
         mla_bmm1_scale: Optional[torch.Tensor] = None,
         mla_bmm2_scale: Optional[torch.Tensor] = None,
         quant_q_buffer: Optional[torch.Tensor] = None,
-        sage_attn_num_elts_per_blk_q: int = 0,
-        sage_attn_num_elts_per_blk_k: int = 0,
-        sage_attn_num_elts_per_blk_v: int = 0,
-        sage_attn_qk_int8: bool = False,
     ):
         """
         Run the attention operation.
@@ -645,13 +641,6 @@ def run(
                 global_layer_idx=self.global_layer_idx,
             )
         else:
-            use_sage_attn = any(sf > 0 for sf in [
-                sage_attn_num_elts_per_blk_q, sage_attn_num_elts_per_blk_k,
-                sage_attn_num_elts_per_blk_v
-            ])
-
-            assert not use_sage_attn or not is_fused_qkv, "SageAttention requires separate q/k/v tensors (is_fused_qkv must be false)."
-
             thop.attention(
                 q,
                 k,
@@ -733,10 +722,6 @@ def run(
                 quant_q_buffer,
                 self.flash_mla_tile_scheduler_metadata,
                 self.flash_mla_num_splits,
-                sage_attn_num_elts_per_blk_q,
-                sage_attn_num_elts_per_blk_k,
-                sage_attn_num_elts_per_blk_v,
-                sage_attn_qk_int8,
             )
 
         if self.print_skip_softmax_stat:
@@ -1884,10 +1869,6 @@ def forward(
         mla_bmm1_scale: Optional[torch.Tensor] = None,
         mla_bmm2_scale: Optional[torch.Tensor] = None,
         quant_q_buffer: Optional[torch.Tensor] = None,
-        sage_attn_num_elts_per_blk_q: int = 0,
-        sage_attn_num_elts_per_blk_k: int = 0,
-        sage_attn_num_elts_per_blk_v: int = 0,
-        sage_attn_qk_int8: bool = False,
         **kwargs,
     ) -> Tuple[torch.Tensor, Optional[torch.Tensor]]:
         """
@@ -2055,25 +2036,20 @@ def forward(
         )
         self.wrapper.global_layer_idx = self.layer_idx
 
-        self.wrapper.run(
-            q,
-            output,
-            output_sf,
-            k,
-            v,
-            is_fused_qkv=not metadata.is_cross and k is None,
-            update_kv_cache=not metadata.is_cross or k is not None,
-            attention_mask=attention_mask,
-            cu_q_seqlens=cu_q_seqlens,
-            cu_kv_seqlens=cu_kv_seqlens,
-            fmha_scheduler_counter=fmha_scheduler_counter,
-            mla_bmm1_scale=mla_bmm1_scale,
-            mla_bmm2_scale=mla_bmm2_scale,
-            quant_q_buffer=quant_q_buffer,
-            sage_attn_num_elts_per_blk_q=sage_attn_num_elts_per_blk_q,
-            sage_attn_num_elts_per_blk_k=sage_attn_num_elts_per_blk_k,
-            sage_attn_num_elts_per_blk_v=sage_attn_num_elts_per_blk_v,
-            sage_attn_qk_int8=sage_attn_qk_int8)
+        self.wrapper.run(q,
+                         output,
+                         output_sf,
+                         k,
+                         v,
+                         is_fused_qkv=not metadata.is_cross and k is None,
+                         update_kv_cache=not metadata.is_cross or k is not None,
+                         attention_mask=attention_mask,
+                         cu_q_seqlens=cu_q_seqlens,
+                         cu_kv_seqlens=cu_kv_seqlens,
+                         fmha_scheduler_counter=fmha_scheduler_counter,
+                         mla_bmm1_scale=mla_bmm1_scale,
+                         mla_bmm2_scale=mla_bmm2_scale,
+                         quant_q_buffer=quant_q_buffer)
 
         if output_sf is None:
             return output
diff --git a/tensorrt_llm/_torch/visual_gen/attention_backend/trtllm.py b/tensorrt_llm/_torch/visual_gen/attention_backend/trtllm.py
index 4b5b07724f27..e830005535dc 100644
--- a/tensorrt_llm/_torch/visual_gen/attention_backend/trtllm.py
+++ b/tensorrt_llm/_torch/visual_gen/attention_backend/trtllm.py
@@ -1,4 +1,4 @@
-# SPDX-FileCopyrightText: Copyright (c) 2025-2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
+# SPDX-FileCopyrightText: Copyright (c) 2025 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
 # SPDX-License-Identifier: Apache-2.0
 #
 # Licensed under the Apache License, Version 2.0 (the "License");
@@ -29,7 +29,6 @@
 from ...attention_backend.interface import AttentionRuntimeFeatures, PredefinedAttentionMask
 from ...attention_backend.trtllm import TrtllmAttention as BaseTrtllmAttention
 from ...attention_backend.trtllm import TrtllmAttentionMetadata as BaseTrtllmAttentionMetadata
-from ..config import SageAttentionConfig
 from .interface import AttentionTensorLayout
 
 
@@ -46,8 +45,6 @@ class TrtllmAttentionMetadata:
         max_batch_size: Initial batch size hint. Will grow automatically if exceeded.
         max_seq_len: Initial sequence length hint. Will grow automatically if exceeded.
         device: Target device for tensors.
-        attention_metadata_state: Mutable model-scoped state shared by all
-            attention layers in one model instance.
     """
 
     def __init__(
@@ -55,21 +52,18 @@ def __init__(
         max_batch_size: int = 16,
         max_seq_len: int = 4096,
         device: Optional[torch.device] = None,
-        attention_metadata_state: Optional[dict] = None,
     ):
-        # These are initial hints, not hard limits - capacity grows as needed.
+        # These are initial hints, not hard limits - capacity grows as needed
         self.max_batch_size = max_batch_size
         self.max_seq_len = max_seq_len
         self.device = device or torch.device("cuda")
-        if attention_metadata_state is None:
-            raise ValueError(
-                "TRTLLM attention requires `attention_metadata_state` to be provided "
-                "by visual-gen config for model-scoped metadata sharing."
-            )
-        self._metadata_state = attention_metadata_state
 
         # Lazily created BaseTrtllmAttentionMetadata
-        self._metadata: Optional[BaseTrtllmAttentionMetadata] = self._metadata_state["metadata"]
+        self._metadata: Optional[BaseTrtllmAttentionMetadata] = None
+
+        # Track allocated capacity
+        self._allocated_batch_size = 0
+        self._allocated_max_seq_len = 0
 
         # Track prepared state
         self._cached_seq_lens: Optional[torch.Tensor] = None
@@ -77,20 +71,14 @@ def __init__(
 
     def _needs_new_metadata(self, batch_size: int, max_seq_len: int) -> bool:
         """Check if we need to create new metadata (capacity change)."""
-        metadata = self._metadata_state["metadata"]
-        allocated_batch_size, allocated_max_seq_len = self._metadata_state["capacity"]
         return (
-            metadata is None
-            or batch_size > allocated_batch_size
-            or max_seq_len > allocated_max_seq_len
+            self._metadata is None
+            or batch_size > self._allocated_batch_size
+            or max_seq_len > self._allocated_max_seq_len
         )
 
     def _needs_prepare(self, batch_size: int, seq_lens: torch.Tensor) -> bool:
-        """Check if we need to call prepare() (seq_lens changed).
-
-        Assumes uniform sequence length per batch; if per-sample lengths vary,
-        we may need to check seq_lens tensor instead.
-        """
+        """Check if we need to call prepare() (seq_lens changed)."""
         if not self._prepared:
             return True
         if self._cached_seq_lens is None:
@@ -101,9 +89,10 @@ def _needs_prepare(self, batch_size: int, seq_lens: torch.Tensor) -> bool:
 
     def _create_metadata(self, batch_size: int, max_seq_len: int) -> None:
         """Create new metadata with given capacity."""
-        prev_batch, prev_seq = self._metadata_state["capacity"]
-        alloc_batch = max(batch_size, prev_batch)
-        alloc_seq_len = max(max_seq_len, prev_seq)
+        # Allocate with some headroom to avoid frequent reallocation
+        alloc_batch = max(batch_size, self._allocated_batch_size)
+        alloc_seq_len = max(max_seq_len, self._allocated_max_seq_len)
+
         self._metadata = BaseTrtllmAttentionMetadata(
             max_num_requests=alloc_batch,
             max_num_tokens=alloc_batch * alloc_seq_len,
@@ -112,8 +101,9 @@ def _create_metadata(self, batch_size: int, max_seq_len: int) -> None:
             mapping=Mapping(),
             runtime_features=AttentionRuntimeFeatures(),
         )
-        self._metadata_state["metadata"] = self._metadata
-        self._metadata_state["capacity"] = (alloc_batch, alloc_seq_len)
+
+        self._allocated_batch_size = alloc_batch
+        self._allocated_max_seq_len = alloc_seq_len
         self._prepared = False  # Reset prepare state on new metadata
 
     def prepare(
@@ -126,18 +116,17 @@ def prepare(
 
         Lazy behavior:
         - Creates metadata only when capacity needs increase
-        - Calls prepare() only when (batch_size, max_seq_len) actually change
+        - Calls prepare() only when seq_lens actually change
         """
         if isinstance(seq_lens, int):
             seq_lens_tensor = torch.full((batch_size,), seq_lens, dtype=torch.int32)
         else:
             seq_lens_tensor = seq_lens.to(dtype=torch.int32)
+
         max_seq_len = seq_lens_tensor.max().item()
 
         if self._needs_new_metadata(batch_size, max_seq_len):
             self._create_metadata(batch_size, max_seq_len)
-        else:
-            self._metadata = self._metadata_state["metadata"]
 
         if self._needs_prepare(batch_size, seq_lens_tensor):
             self._metadata.seq_lens = seq_lens_tensor
@@ -161,14 +150,9 @@ class TrtllmAttention(BaseTrtllmAttention):
     TRTLLM Attention wrapper for diffusion models.
 
     Handles:
+    - Fused QKV requirement for TRTLLM kernel
     - Metadata creation and preparation
     - No KV cache operation
-
-    Two dispatch paths controlled by ``sage_attention_config``:
-    - Standard (None): fuses Q/K/V into a single QKV tensor before calling
-      the base kernel (``is_fused_qkv=True``).
-    - SageAttention (non-None): passes separate Q/K/V with per-block
-      quantization parameters (``is_fused_qkv=False``).
     """
 
     def __init__(
@@ -181,8 +165,6 @@ def __init__(
         dtype: Optional[torch.dtype] = None,
         max_batch_size: int = 16,
         max_seq_len: int = 4096,
-        sage_attention_config: Optional[SageAttentionConfig] = None,
-        attention_metadata_state: Optional[dict] = None,
     ):
         num_kv_heads = num_kv_heads or num_heads
 
@@ -201,12 +183,8 @@ def __init__(
         self.metadata = TrtllmAttentionMetadata(
             max_batch_size=max_batch_size,
             max_seq_len=max_seq_len,
-            attention_metadata_state=attention_metadata_state,
         )
 
-        # SageAttention: presence of config object implies enablement
-        self.sage_attention_config = sage_attention_config
-
     # Needed to work with torch compile cause of attention metadata
     # make attn metadata as input for it to work
     @torch.compiler.disable
@@ -246,10 +224,7 @@ def forward(
 
         For diffusion models, expects:
         - Fused QKV: q contains [Q, K, V] concatenated, k and v are None
-            - does not support SageAttention
-        - OR separate Q, K, V which:
-            - for regular TRTLLM attention, will be fused internally
-            - for SageAttention, will be used directly
+        - OR separate Q, K, V which will be fused internally
 
         Args:
             q: Query tensor [num_tokens, hidden] or fused QKV [num_tokens, qkv_hidden]
@@ -266,41 +241,19 @@ def forward(
         # Handle cross-attention where K/V have different sequence length than Q
         kv_seq_len = seq_len_kv if seq_len_kv is not None else seq_len
 
-        if self.sage_attention_config is not None:
-            # SageAttention kernel requires separate Q/K/V tensors.
-            sage_cfg = self.sage_attention_config
-            q = q.reshape(batch_size * seq_len, -1).contiguous()
-            k = k.reshape(batch_size * kv_seq_len, -1).contiguous()
-            v = v.reshape(batch_size * kv_seq_len, -1).contiguous()
-            prepared_metadata = self._prepare_metadata(batch_size, seq_len)
-            output = super().forward(
-                q=q,
-                k=k,
-                v=v,
-                metadata=prepared_metadata,
-                attention_mask=attention_mask,
-                sage_attn_num_elts_per_blk_q=sage_cfg.num_elts_per_blk_q,
-                sage_attn_num_elts_per_blk_k=sage_cfg.num_elts_per_blk_k,
-                sage_attn_num_elts_per_blk_v=sage_cfg.num_elts_per_blk_v,
-                sage_attn_qk_int8=sage_cfg.qk_int8,
-            )
-            output = output.view(batch_size, seq_len, -1)
+        if k is None and v is None:
+            qkv = q.reshape(batch_size * seq_len, -1)
         else:
-            # Standard path: fuse QKV.
-            if k is None and v is None:
-                qkv = q.reshape(batch_size * seq_len, -1)
-            else:
-                qkv = self._concat_qkv(q, k, v, batch_size, seq_len, kv_seq_len)
-            prepared_metadata = self._prepare_metadata(batch_size, seq_len)
-            output = super().forward(
-                q=qkv,
-                k=None,
-                v=None,
-                metadata=prepared_metadata,
-                attention_mask=attention_mask,
-            )
-            output = output.view(batch_size, seq_len, -1)
-
+            qkv = self._concat_qkv(q, k, v, batch_size, seq_len, kv_seq_len)
+        prepared_metadata = self._prepare_metadata(batch_size, seq_len)
+        output = super().forward(
+            q=qkv,
+            k=None,
+            v=None,
+            metadata=prepared_metadata,
+            attention_mask=attention_mask,
+        )
+        output = output.view(batch_size, seq_len, -1)
         return output
 
     @property
@@ -308,6 +261,6 @@ def preferred_layout(self) -> AttentionTensorLayout:
         """Return the preferred tensor layout for this backend."""
         return self._preferred_layout
 
-    def support_fused_qkv(self) -> bool:
-        """Standard path fuses QKV; SageAttention path does not."""
-        return self.sage_attention_config is None
+    @classmethod
+    def support_fused_qkv(cls) -> bool:
+        return True
diff --git a/tensorrt_llm/_torch/visual_gen/attention_backend/utils.py b/tensorrt_llm/_torch/visual_gen/attention_backend/utils.py
index e4d841260815..443e8d038199 100644
--- a/tensorrt_llm/_torch/visual_gen/attention_backend/utils.py
+++ b/tensorrt_llm/_torch/visual_gen/attention_backend/utils.py
@@ -26,8 +26,6 @@
 
 from tensorrt_llm.models.modeling_utils import QuantConfig
 
-from ..config import AttentionConfig
-
 # Lazy imports to avoid circular dependency
 if TYPE_CHECKING:
     from .flash_attn4 import FlashAttn4Attention
@@ -86,8 +84,6 @@ def create_attention(
     dtype: Optional[torch.dtype] = None,
     max_batch_size: int = 16,
     max_seq_len: int = 4096,
-    attention_config: Optional[AttentionConfig] = None,
-    attention_metadata_state: Optional[dict] = None,
     **kwargs,
 ) -> "DiffusionAttentionBackend":
     """
@@ -108,10 +104,6 @@ def create_attention(
             will automatically reallocate if larger batches are encountered.
         max_seq_len: Initial sequence length for metadata pre-allocation. The backend
             will automatically reallocate if longer sequences are encountered.
-        attention_config: Optional AttentionConfig; sage_attention_config is
-            extracted and forwarded to the TRTLLM backend when present.
-        attention_metadata_state: Optional model-scoped metadata state from
-            visual-gen config. Required for TRTLLM backend.
         **kwargs: Additional backend-specific arguments
 
     Returns:
@@ -119,19 +111,6 @@ def create_attention(
     """
     attn_cls = get_visual_gen_attention_backend(backend)
 
-    # Extract sage_attention_config from AttentionConfig and pass to TRTLLM backend.
-    # AttentionConfig validation already ensures sage_attention_config is only set
-    # when backend="TRTLLM", so no silent no-op is possible.
-    if attention_config is not None and attention_config.sage_attention_config is not None:
-        kwargs["sage_attention_config"] = attention_config.sage_attention_config
-    if backend.upper() == "TRTLLM":
-        if attention_metadata_state is None:
-            raise ValueError(
-                "TRTLLM backend requires `attention_metadata_state` from "
-                "DiffusionModelConfig; creation path must not allocate metadata implicitly."
-            )
-        kwargs["attention_metadata_state"] = attention_metadata_state
-
     return attn_cls(
         layer_idx=layer_idx,
         num_heads=num_heads,
diff --git a/tensorrt_llm/_torch/visual_gen/config.py b/tensorrt_llm/_torch/visual_gen/config.py
index 32da1daa6116..c6d77ad01de5 100644
--- a/tensorrt_llm/_torch/visual_gen/config.py
+++ b/tensorrt_llm/_torch/visual_gen/config.py
@@ -44,78 +44,12 @@ class PipelineComponent(str, Enum):
 # =============================================================================
 
 
-class SageAttentionConfig(BaseModel):
-    """Configuration for SageAttention quantization (TRTLLM backend only).
-
-    SageAttention quantizes Q/K/V into FP8 (or INT8 for Q/K) with per-block
-    scaling factors, enabling faster attention kernels. Providing this config
-    to AttentionConfig enables SageAttention; omitting it (None) disables it.
-
-    Similar to ``sparse_attention_config`` for the base TRTLLM attention
-    backend — the presence of the config object signals enablement.
-
-    Currently these (num_elts_per_blk_q, num_elts_per_blk_k, num_elts_per_blk_v)
-    combinations are enabled:
-    - (1, 1, 1)
-    - (1, 4, 1)
-    - (1, 16, 1) [for qk_int8 == True only]
-    """
-
-    num_elts_per_blk_q: int = PydanticField(
-        1, ge=0, description="Elements per quantization block for Q (0 disables)"
-    )
-    num_elts_per_blk_k: int = PydanticField(
-        4, ge=0, description="Elements per quantization block for K (0 disables)"
-    )
-    num_elts_per_blk_v: int = PydanticField(
-        1, ge=0, description="Elements per quantization block for V (0 disables)"
-    )
-    qk_int8: bool = PydanticField(True, description="Use INT8 (vs E4M3) for Q/K quantization")
-
-
 class AttentionConfig(StrictBaseModel):
     """Configuration for Attention layers."""
 
     backend: Literal["VANILLA", "TRTLLM", "FA4"] = PydanticField(
         "VANILLA", description="Attention backend: VANILLA (PyTorch SDPA), TRTLLM, FA4"
     )
-    sage_attention_config: Optional[SageAttentionConfig] = PydanticField(
-        None,
-        description=(
-            "SageAttention config (TRTLLM backend only). "
-            "Set to a SageAttentionConfig instance to enable SageAttention; "
-            "leave as None to disable."
-        ),
-    )
-
-    @model_validator(mode="after")
-    def _validate_sage_attn_config(self) -> "AttentionConfig":
-        SUPPORTED_SAGE_CONFIGS = {
-            (1, 1, 1, False),
-            (1, 4, 1, False),
-            (1, 1, 1, True),
-            (1, 4, 1, True),
-            (1, 16, 1, True),
-        }
-
-        if self.sage_attention_config is not None:
-            if self.backend != "TRTLLM":
-                raise ValueError(
-                    f"sage_attention_config requires backend='TRTLLM', "
-                    f"got backend='{self.backend}'. Either set backend='TRTLLM' "
-                    f"or remove sage_attention_config."
-                )
-            if (
-                self.sage_attention_config.num_elts_per_blk_q,
-                self.sage_attention_config.num_elts_per_blk_k,
-                self.sage_attention_config.num_elts_per_blk_v,
-                self.sage_attention_config.qk_int8,
-            ) not in SUPPORTED_SAGE_CONFIGS:
-                raise ValueError(
-                    f"Unsupported {self.sage_attention_config=}."
-                    " Fallback to non-SageAttention TRTLLM attention"
-                )
-        return self
 
 
 class ParallelConfig(StrictBaseModel):
@@ -526,11 +460,6 @@ def discover_pipeline_components(checkpoint_path: Path) -> Dict[str, Path]:
     return components
 
 
-def create_attention_metadata_state() -> Dict[str, Any]:
-    """Create model-scoped attention metadata state for TRTLLM visual-gen backend."""
-    return {"metadata": None, "capacity": (0, 0)}
-
-
 # =============================================================================
 # DiffusionModelConfig - Internal configuration (merged/parsed)
 # =============================================================================
@@ -569,7 +498,6 @@ class DiffusionModelConfig(BaseModel):
     cuda_graph: CudaGraphConfig = PydanticField(default_factory=CudaGraphConfig)
     pipeline: PipelineConfig = PydanticField(default_factory=PipelineConfig)
     attention: AttentionConfig = PydanticField(default_factory=AttentionConfig)
-    attention_metadata_state: Optional[Dict[str, Any]] = None
     parallel: ParallelConfig = PydanticField(default_factory=ParallelConfig)
     teacache: TeaCacheConfig = PydanticField(default_factory=TeaCacheConfig)
 
@@ -900,10 +828,6 @@ def from_pretrained(
                     cls.load_diffusion_quant_config(quant_dict)
                 )
 
-        attention_metadata_state = (
-            create_attention_metadata_state() if attention_cfg.backend == "TRTLLM" else None
-        )
-
         return cls(
             pretrained_config=pretrained_config,
             quant_config=quant_config,
@@ -916,7 +840,6 @@ def from_pretrained(
             cuda_graph=cuda_graph_cfg,
             pipeline=pipeline_cfg,
             attention=attention_cfg,
-            attention_metadata_state=attention_metadata_state,
             parallel=parallel_cfg,
             teacache=teacache_cfg,
             skip_create_weights_in_init=True,
diff --git a/tensorrt_llm/_torch/visual_gen/models/ltx2/transformer_ltx2.py b/tensorrt_llm/_torch/visual_gen/models/ltx2/transformer_ltx2.py
index b0689d49e0ea..342ae5280239 100644
--- a/tensorrt_llm/_torch/visual_gen/models/ltx2/transformer_ltx2.py
+++ b/tensorrt_llm/_torch/visual_gen/models/ltx2/transformer_ltx2.py
@@ -131,8 +131,6 @@ def __init__(
                 num_kv_heads=self.num_key_value_heads,
                 quant_config=self.quant_config,
                 dtype=self.dtype,
-                attention_config=config.attention,
-                attention_metadata_state=config.attention_metadata_state,
             )
             self._has_dual_attn = True
 
diff --git a/tensorrt_llm/_torch/visual_gen/modules/attention.py b/tensorrt_llm/_torch/visual_gen/modules/attention.py
index 844e72fb6cfd..4edd1249257e 100644
--- a/tensorrt_llm/_torch/visual_gen/modules/attention.py
+++ b/tensorrt_llm/_torch/visual_gen/modules/attention.py
@@ -86,8 +86,6 @@ def __init__(
 
         self._init_qkv_proj()
 
-        attention_metadata_state = getattr(config, "attention_metadata_state", None)
-
         if self.qk_norm:
             # "full": norm over all heads combined (e.g. WAN, dim=q_dim)
             # "per_head": norm over each head independently (e.g. FLUX, dim=head_dim)
@@ -134,8 +132,6 @@ def __init__(
             num_kv_heads=backend_num_kv_heads,
             quant_config=self.quant_config,
             dtype=self.dtype,
-            attention_config=config.attention,
-            attention_metadata_state=attention_metadata_state,
         )
 
         # Wrap with parallelism strategy (orthogonal to backend choice)
diff --git a/tests/integration/test_lists/test-db/l0_b200.yml b/tests/integration/test_lists/test-db/l0_b200.yml
index 5a65f364a5a6..ff8bd51e5ad5 100644
--- a/tests/integration/test_lists/test-db/l0_b200.yml
+++ b/tests/integration/test_lists/test-db/l0_b200.yml
@@ -162,7 +162,6 @@ l0_b200:
   - unittest/_torch/visual_gen/test_fused_qkv.py
   - unittest/_torch/visual_gen/test_quant_ops.py
   - unittest/_torch/visual_gen/test_attention_integration.py
-  - unittest/_torch/visual_gen/test_attention_trtllm_sage.py
   - unittest/_torch/visual_gen/test_attention_perf.py
   - unittest/_torch/visual_gen/test_trtllm_serve_endpoints.py
   - unittest/_torch/visual_gen/test_trtllm_serve_e2e.py
diff --git a/tests/unittest/_torch/visual_gen/multi_gpu/test_flux_ulysses.py b/tests/unittest/_torch/visual_gen/multi_gpu/test_flux_ulysses.py
index f15dc7f77ea2..abf41e45d5a1 100644
--- a/tests/unittest/_torch/visual_gen/multi_gpu/test_flux_ulysses.py
+++ b/tests/unittest/_torch/visual_gen/multi_gpu/test_flux_ulysses.py
@@ -29,7 +29,6 @@
         ParallelConfig,
         TeaCacheConfig,
         TorchCompileConfig,
-        create_attention_metadata_state,
     )
     from tensorrt_llm._utils import get_free_port
     from tensorrt_llm.models.modeling_utils import QuantConfig
@@ -146,9 +145,6 @@ def _make_model_config(pretrained_dict, ulysses_size=1, backend="VANILLA"):
         quant_config=QuantConfig(),
         torch_compile=TorchCompileConfig(enable_torch_compile=False),
         attention=AttentionConfig(backend=backend),
-        attention_metadata_state=(
-            create_attention_metadata_state() if backend.upper() == "TRTLLM" else None
-        ),
         parallel=parallel,
         teacache=TeaCacheConfig(),
         skip_create_weights_in_init=False,
diff --git a/tests/unittest/_torch/visual_gen/test_attention_integration.py b/tests/unittest/_torch/visual_gen/test_attention_integration.py
index 761a43c0156a..a2810427f93b 100644
--- a/tests/unittest/_torch/visual_gen/test_attention_integration.py
+++ b/tests/unittest/_torch/visual_gen/test_attention_integration.py
@@ -19,12 +19,7 @@
 # Flash Attention 4 availability
 # ============================================================================
 from tensorrt_llm._torch.visual_gen.attention_backend.flash_attn4 import _flash_attn_fwd as _fa4_fwd
-from tensorrt_llm._torch.visual_gen.config import (
-    AttentionConfig,
-    DiffusionModelConfig,
-    SageAttentionConfig,
-    create_attention_metadata_state,
-)
+from tensorrt_llm._torch.visual_gen.config import AttentionConfig, DiffusionModelConfig
 
 # Import new integrated versions
 from tensorrt_llm._torch.visual_gen.modules.attention import Attention, QKVMode, apply_rotary_emb
@@ -118,7 +113,6 @@ def create_model_config(
     head_dim: int,
     eps: float = 1e-6,
     attn_backend: str = "VANILLA",
-    sage_attention_config: "SageAttentionConfig | None" = None,
 ):
     """Create a mock DiffusionModelConfig for testing."""
     pretrained_config = SimpleNamespace(
@@ -131,15 +125,9 @@ def create_model_config(
     # Create a minimal config without quantization
     config = DiffusionModelConfig(
         pretrained_config=pretrained_config,
-        attention=AttentionConfig(
-            backend=attn_backend,
-            sage_attention_config=sage_attention_config,
-        ),
+        attention=AttentionConfig(backend=attn_backend),
         skip_create_weights_in_init=False,
     )
-    config.attention_metadata_state = (
-        create_attention_metadata_state() if attn_backend == "TRTLLM" else None
-    )
     return config
 
 
@@ -286,107 +274,6 @@ def test_self_attention_equivalence(attn_backend: str):
     return is_close
 
 
-# seq_len: pow2 baselines + real WAN latent token counts (VAE 8x spatial, 4x temporal, patch [1,2,2])
-# batch_size: B=1 (cfg_size=2, split across GPUs) / B=2 (cfg_size=1, single GPU)
-@pytest.mark.parametrize("seq_len", [256, 512, 1560, 3600, 4096, 16384, 32760])
-@pytest.mark.parametrize("batch_size", [1, 2])
-@pytest.mark.parametrize("qk_int8", [False, True])
-def test_sage_attention_self_attention(qk_int8: bool, batch_size: int, seq_len: int):
-    """Test SageAttention (TRTLLM + sage_attention_config) self-attention.
-
-    SageAttention quantizes Q/K/V with per-block scaling factors, so outputs
-    are expected to differ from the naive SDPA reference. We verify:
-    1. Forward pass completes without error
-    2. Output shape matches naive
-    3. Outputs are finite (no NaN/Inf)
-    4. Approximate agreement with naive (cosine similarity > 0.95)
-    """
-    print("\n" + "=" * 60)
-    print(f"Testing SageAttention (qk_int8={qk_int8}, B={batch_size}, S={seq_len})")
-    print("=" * 60)
-
-    # The sm100 sage kernel only has cubins for head_dim=128,
-    # so match the WAN model dimensions (12 heads, head_dim=128).
-    num_heads = 12
-    head_dim = 128
-    hidden_size = num_heads * head_dim  # 1536
-    device = torch.device("cuda" if torch.cuda.is_available() else "cpu")
-    dtype = torch.bfloat16
-
-    print(f"Config: B={batch_size}, S={seq_len}, H={hidden_size}, heads={num_heads}, D={head_dim}")
-    print(f"Device: {device}, dtype: {dtype}")
-
-    sage_cfg = SageAttentionConfig(
-        num_elts_per_blk_q=1,
-        num_elts_per_blk_k=4 if qk_int8 else 1,
-        num_elts_per_blk_v=1,
-        qk_int8=qk_int8,
-    )
-
-    # Create models
-    naive = NaiveWanSelfAttention(hidden_size, num_heads, head_dim, dtype=dtype).to(device)
-
-    model_config = create_model_config(
-        hidden_size,
-        num_heads,
-        head_dim,
-        attn_backend="TRTLLM",
-        sage_attention_config=sage_cfg,
-    )
-    integrated = Attention(
-        hidden_size, num_heads, qkv_mode=QKVMode.FUSE_QKV, config=model_config
-    ).to(device)
-
-    # Copy weights
-    copy_weights_self_attention(naive, integrated)
-
-    naive.eval()
-    integrated.eval()
-
-    # Create inputs
-    torch.manual_seed(42)
-    hidden_states = torch.randn(batch_size, seq_len, hidden_size, device=device, dtype=dtype)
-    freqs_cos_HSD, freqs_sin_HSD = generate_rope_embeddings(seq_len, head_dim, device, is_HSD=True)
-    freqs_cos_SHD, freqs_sin_SHD = generate_rope_embeddings(seq_len, head_dim, device, is_HSD=False)
-
-    # Forward pass
-    with torch.no_grad():
-        out_naive = naive(hidden_states, freqs_cos_HSD, freqs_sin_HSD)
-        out_sage = integrated(hidden_states, freqs=(freqs_cos_SHD, freqs_sin_SHD))
-
-    # --- Assertions ---
-
-    # 1. Shape match
-    assert out_sage.shape == out_naive.shape, (
-        f"Shape mismatch: sage={out_sage.shape}, naive={out_naive.shape}"
-    )
-
-    # 2. All values finite (no NaN / Inf)
-    assert torch.isfinite(out_sage).all(), (
-        f"SageAttention output contains NaN or Inf (B={batch_size}, S={seq_len})"
-    )
-
-    # 3. Cosine similarity — sage quantization (FP8 per-block) introduces larger
-    #    error than bf16 rounding, so elementwise allclose is too strict.
-    #    Cosine similarity captures directional agreement robustly.
-    max_diff = (out_naive - out_sage).abs().max().item()
-    mean_diff = (out_naive - out_sage).abs().mean().item()
-    cos_sim = F.cosine_similarity(
-        out_naive.reshape(-1).float(), out_sage.reshape(-1).float(), dim=0
-    ).item()
-
-    print(f"\n  Output shape: {out_sage.shape}")
-    print(f"  Max absolute diff:  {max_diff:.2e}")
-    print(f"  Mean absolute diff: {mean_diff:.2e}")
-    print(f"  Cosine similarity:  {cos_sim:.6f}")
-
-    assert cos_sim > 0.95, (
-        f"SageAttention cosine similarity too low: {cos_sim:.4f} < 0.95 "
-        f"(B={batch_size}, S={seq_len}, qk_int8={qk_int8})"
-    )
-    return cos_sim > 0.95
-
-
 @pytest.mark.parametrize("attn_backend", ["VANILLA", "FA4"])
 def test_cross_attention_equivalence(attn_backend: str):
     """Test that integrated cross-attention produces same output as naive."""
@@ -690,15 +577,6 @@ def run_all_tests():
     for backend in ["VANILLA", "TRTLLM"] + (["FA4"] if _flash_attn4_available else []):
         results[f"self_attention_{backend}"] = test_self_attention_equivalence(backend)
 
-    # Run SageAttention self-attention tests (subset for manual runner)
-    for batch_size in [1, 2]:
-        for seq_len in [4096, 32760]:
-            for qk_int8 in [False, True]:
-                label = f"sage_B{batch_size}_S{seq_len}_QkInt8{qk_int8}"
-                results[label] = test_sage_attention_self_attention(
-                    qk_int8=qk_int8, batch_size=batch_size, seq_len=seq_len
-                )
-
     # Run cross-attention tests
     results["cross_attention_VANILLA"] = test_cross_attention_equivalence("VANILLA")
     if _flash_attn4_available:
diff --git a/tests/unittest/_torch/visual_gen/test_attention_perf.py b/tests/unittest/_torch/visual_gen/test_attention_perf.py
index 49463627cdd7..570ffa4a02ea 100644
--- a/tests/unittest/_torch/visual_gen/test_attention_perf.py
+++ b/tests/unittest/_torch/visual_gen/test_attention_perf.py
@@ -43,11 +43,7 @@
 from tensorrt_llm._torch.visual_gen.attention_backend.flash_attn4 import (
     _flash_attn_fwd_import_error as _fa4_import_error,
 )
-from tensorrt_llm._torch.visual_gen.config import (
-    AttentionConfig,
-    DiffusionModelConfig,
-    create_attention_metadata_state,
-)
+from tensorrt_llm._torch.visual_gen.config import AttentionConfig, DiffusionModelConfig
 from tensorrt_llm._torch.visual_gen.modules.attention import Attention, QKVMode
 
 _flash_attn4_available = _fa4_fwd is not None
@@ -159,9 +155,6 @@ def create_model_config(
         attention=AttentionConfig(backend=attn_backend),
         skip_create_weights_in_init=False,
     )
-    config.attention_metadata_state = (
-        create_attention_metadata_state() if attn_backend == "TRTLLM" else None
-    )
     return config
 
 
diff --git a/tests/unittest/_torch/visual_gen/test_attention_trtllm_sage.py b/tests/unittest/_torch/visual_gen/test_attention_trtllm_sage.py
deleted file mode 100644
index e00892447651..000000000000
--- a/tests/unittest/_torch/visual_gen/test_attention_trtllm_sage.py
+++ /dev/null
@@ -1,209 +0,0 @@
-# SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
-# SPDX-License-Identifier: Apache-2.0
-
-from typing import Optional, Tuple
-
-import pytest
-import torch
-import torch.nn.functional as F
-
-from tensorrt_llm._torch.attention_backend import interface as attention_backend_interface
-from tensorrt_llm._torch.attention_backend import utils as attention_backend_utils
-
-
-def _cuda_cc():
-    if torch.cuda.is_available():
-        return torch.cuda.get_device_capability()
-    else:
-        return -1, -1
-
-
-def _repeat_kv(hidden_states: torch.Tensor, gqa_groups: int) -> torch.Tensor:
-    bsz, n_kv_heads, seqlen, head_dim = hidden_states.shape
-    if gqa_groups == 1:
-        return hidden_states
-    hidden_states = hidden_states[:, :, None, :, :].expand(
-        bsz, n_kv_heads, gqa_groups, seqlen, head_dim
-    )
-    return hidden_states.reshape(bsz, n_kv_heads * gqa_groups, seqlen, head_dim)
-
-
-def _sdpa_reference(
-    q: torch.Tensor,
-    k: torch.Tensor,
-    v: torch.Tensor,
-    seq_len: int,
-    num_heads: int,
-    num_kv_heads: int,
-    head_dim: int,
-) -> torch.Tensor:
-    q_seq = q.view(-1, seq_len, num_heads, head_dim).transpose(1, 2)
-    k_seq = k.view(-1, seq_len, num_kv_heads, head_dim).transpose(1, 2)
-    v_seq = v.view(-1, seq_len, num_kv_heads, head_dim).transpose(1, 2)
-    if num_heads > num_kv_heads:
-        gqa_groups = num_heads // num_kv_heads
-        k_seq = _repeat_kv(k_seq, gqa_groups)
-        v_seq = _repeat_kv(v_seq, gqa_groups)
-
-    out = F.scaled_dot_product_attention(q_seq, k_seq, v_seq, is_causal=False)
-    return out.transpose(1, 2).contiguous().view(-1, num_heads * head_dim)
-
-
-def _test_attention_trtllm_sage(
-    num_heads: int = 16,
-    num_kv_heads: int = 16,
-    head_dim: int = 128,
-    batch_size=1,
-    seq_len: int = 1024,
-    amp_mul: float = 3.2,
-    amp_mul_v: Optional[float] = None,
-    sage_attn_qk_int8: bool = False,
-    sage_attn_num_elts_per_blk_k: Optional[float] = None,
-    out_dtype: torch.dtype = torch.bfloat16,
-) -> Tuple[torch.Tensor, torch.Tensor, float, float, float]:
-    torch.manual_seed(1234)
-    torch.cuda.manual_seed_all(1234)
-
-    device = "cuda"
-    in_dtype = torch.bfloat16
-
-    q = torch.rand(batch_size * seq_len, num_heads * head_dim, device=device, dtype=in_dtype)
-    k = torch.rand(batch_size * seq_len, num_kv_heads * head_dim, device=device, dtype=in_dtype)
-    v = torch.rand(batch_size * seq_len, num_kv_heads * head_dim, device=device, dtype=in_dtype)
-
-    # Extra fluctuations
-    if amp_mul_v is None:
-        amp_mul_v = amp_mul
-    q = q * ((torch.rand_like(q) - 0.5) * amp_mul).exp()
-    k = k * ((torch.rand_like(k) - 0.5) * amp_mul).exp()
-    v = v * ((torch.rand_like(v) - 0.5) * amp_mul_v).exp()
-
-    # Obtain Op and run
-    attention_cls = attention_backend_utils.get_attention_backend("TRTLLM")
-    attention = attention_cls(
-        layer_idx=0,
-        num_heads=num_heads,
-        num_kv_heads=num_kv_heads,
-        head_dim=head_dim,
-    )
-
-    metadata = attention_cls.Metadata(
-        max_num_requests=batch_size,
-        max_num_tokens=seq_len,
-        kv_cache_manager=None,
-        runtime_features=None,
-    )
-    metadata.seq_lens = torch.tensor([seq_len] * batch_size, dtype=torch.int32)
-    metadata.request_ids = torch.tensor([0] * batch_size, dtype=torch.int32)
-    metadata.num_contexts = batch_size
-    metadata.max_seq_len = seq_len
-    metadata.prepare()
-
-    mask_type = attention_backend_interface.PredefinedAttentionMask.FULL
-    out_tllm = torch.empty(
-        (batch_size * seq_len, num_heads * head_dim), device=device, dtype=out_dtype
-    )
-
-    # Attention kwargs
-    attn_kwargs = {
-        "output": out_tllm,
-        "attention_mask": mask_type,
-    }
-
-    # SageAttention separate-QKV requires these block sizes.
-    if sage_attn_num_elts_per_blk_k is None:
-        sage_attn_num_elts_per_blk_k = (16 if sage_attn_qk_int8 else 1,)
-    attn_kwargs.update(
-        {
-            "sage_attn_num_elts_per_blk_q": 1,
-            "sage_attn_num_elts_per_blk_k": sage_attn_num_elts_per_blk_k,
-            "sage_attn_num_elts_per_blk_v": 1,
-            "sage_attn_qk_int8": sage_attn_qk_int8,
-        }
-    )
-
-    out_tllm = attention.forward(
-        q,
-        k,
-        v,
-        metadata,
-        **attn_kwargs,
-    )
-    if isinstance(out_tllm, tuple):
-        out_tllm = out_tllm[0]
-
-    out_native = _sdpa_reference(
-        q.to(torch.bfloat16),
-        k.to(torch.bfloat16),
-        v.to(torch.bfloat16),
-        seq_len,
-        num_heads,
-        num_kv_heads,
-        head_dim,
-    )
-    out_tllm = out_tllm.to(torch.bfloat16)
-
-    max_abs = (out_tllm - out_native).abs().max().item()
-    mean_abs = (out_tllm - out_native).abs().mean().item()
-    cos_sim = F.cosine_similarity(
-        out_tllm.reshape(-1).float(), out_native.reshape(-1).float(), dim=0
-    ).item()
-
-    return out_tllm, out_native, max_abs, mean_abs, cos_sim
-
-
-@pytest.mark.skipif(not torch.cuda.is_available(), reason="CUDA is required for TRTLLM attention.")
-@pytest.mark.skipif(
-    _cuda_cc()[0] != 10, reason="TRTLLM SageAttention test requires CUDA major version 10."
-)
-@pytest.mark.parametrize("batch_size", [1, 2, 4])
-@pytest.mark.parametrize("gqa_groups", [1, 2, 4])
-@pytest.mark.parametrize("num_heads", [4, 12, 16])
-@pytest.mark.parametrize("seq_len", [128, 256, 1024, 8192])
-@pytest.mark.parametrize(
-    "out_dtype,sage_attn_qk_int8,sage_attn_num_elts_per_blk_k,atol,rtol",
-    [
-        (torch.bfloat16, True, 4, 1e-1, 4e-2),
-        (torch.bfloat16, True, 16, 5e-1, 5e-1),
-        (torch.float8_e4m3fn, True, 4, 3e-1, 2e-1),
-        (torch.float8_e4m3fn, False, 1, 3e-1, 2e-1),
-    ],
-)
-def test_attention_trtllm_sage(
-    seq_len: int,
-    num_heads: int,
-    gqa_groups: int,
-    batch_size: int,
-    out_dtype: torch.dtype,
-    sage_attn_qk_int8: bool,
-    sage_attn_num_elts_per_blk_k: int,
-    atol: float,
-    rtol: float,
-):
-    if sage_attn_qk_int8 and _cuda_cc()[1] == 3:
-        pytest.skip("SM103 does not have Int8 Tensor Cores.")
-
-    out_tllm, out_native, max_abs, mean_abs, cos_sim = _test_attention_trtllm_sage(
-        num_heads=num_heads,
-        num_kv_heads=num_heads // gqa_groups,
-        head_dim=128,
-        seq_len=seq_len,
-        batch_size=batch_size,
-        amp_mul=3.2,
-        sage_attn_qk_int8=sage_attn_qk_int8,
-        sage_attn_num_elts_per_blk_k=sage_attn_num_elts_per_blk_k,
-        out_dtype=out_dtype,
-    )
-
-    assert out_tllm.shape == out_native.shape, "Shape mismatch"
-    assert torch.isfinite(out_native).all(), "Inf / NaN detected in Torch SDPA"
-    assert torch.isfinite(out_tllm).all(), "Inf / NaN detected in TRTLLM attention"
-
-    print("\nResults:")
-    print(f"  Output shape: {out_tllm.shape}")
-    print(f"  Max absolute difference: {max_abs:.6f}")
-    print(f"  Mean absolute difference: {mean_abs:.6f}")
-    print(f"  Cosine similarity: {cos_sim:.6f}")
-
-    assert cos_sim > 0.990, f"Cosine similarity {cos_sim:.6f} below threshold"
-    torch.testing.assert_close(out_tllm, out_native, atol=atol, rtol=rtol)
diff --git a/tests/unittest/_torch/visual_gen/test_flux_attention.py b/tests/unittest/_torch/visual_gen/test_flux_attention.py
index 2d51d68297c1..93621497e044 100644
--- a/tests/unittest/_torch/visual_gen/test_flux_attention.py
+++ b/tests/unittest/_torch/visual_gen/test_flux_attention.py
@@ -20,11 +20,7 @@
 import torch
 import torch.nn.functional as F
 
-from tensorrt_llm._torch.visual_gen.config import (
-    AttentionConfig,
-    DiffusionModelConfig,
-    create_attention_metadata_state,
-)
+from tensorrt_llm._torch.visual_gen.config import AttentionConfig, DiffusionModelConfig
 from tensorrt_llm.mapping import Mapping
 from tensorrt_llm.models.modeling_utils import QuantConfig
 
@@ -107,7 +103,6 @@ def test_trtllm_backend_sanity(self):
 
         torch.manual_seed(42)
         config = self._create_config("TRTLLM")
-        config.attention_metadata_state = create_attention_metadata_state()
 
         attn = (
             FluxJointAttention(
@@ -180,7 +175,6 @@ def test_backend_equivalence(self):
                 p.normal_(0, 0.02)
 
         config = self._create_config("TRTLLM")
-        config.attention_metadata_state = create_attention_metadata_state()
         trtllm_attn = (
             FluxJointAttention(
                 hidden_size=dim,
diff --git a/tests/unittest/_torch/visual_gen/test_ltx2_attention.py b/tests/unittest/_torch/visual_gen/test_ltx2_attention.py
index bb91287b02b2..d8f964826ed5 100644
--- a/tests/unittest/_torch/visual_gen/test_ltx2_attention.py
+++ b/tests/unittest/_torch/visual_gen/test_ltx2_attention.py
@@ -16,11 +16,7 @@
 import torch
 import torch.nn.functional as F
 
-from tensorrt_llm._torch.visual_gen.config import (
-    AttentionConfig,
-    DiffusionModelConfig,
-    create_attention_metadata_state,
-)
+from tensorrt_llm._torch.visual_gen.config import AttentionConfig, DiffusionModelConfig
 from tensorrt_llm.mapping import Mapping
 from tensorrt_llm.models.modeling_utils import QuantConfig
 
@@ -106,7 +102,6 @@ def test_trtllm_self_attention_sanity(self):
 
         torch.manual_seed(42)
         config = _create_config("TRTLLM")
-        config.attention_metadata_state = create_attention_metadata_state()
 
         attn = (
             LTX2Attention(
@@ -292,7 +287,6 @@ def test_backend_equivalence(self):
 
         # Create TRTLLM attention and copy weights
         config_trtllm = _create_config("TRTLLM")
-        config_trtllm.attention_metadata_state = create_attention_metadata_state()
         trtllm_attn = (
             LTX2Attention(
                 query_dim=query_dim,