diff --git a/examples/projects/NUCLEO-L432KC/button/platformio.ini b/examples/projects/NUCLEO-L432KC/button/platformio.ini
index 2d08856fb..59dba2da4 100644
--- a/examples/projects/NUCLEO-L432KC/button/platformio.ini
+++ b/examples/projects/NUCLEO-L432KC/button/platformio.ini
@@ -33,6 +33,7 @@ build_flags =
-DUSE_HAL_DRIVER
-DUSE_FULL_LL_DRIVER
-DLUOSHAL=STM32L4
+ -DSERIALHAL=STM32L432
[env:nucleo_l432kc_with_bootloader]
board_build.ldscript = linker/custom_Luos_bootloader_script.ld
@@ -44,6 +45,7 @@ build_flags =
-DUSE_HAL_DRIVER
-DUSE_FULL_LL_DRIVER
-DLUOSHAL=STM32L4
+ -DSERIALHAL=STM32L432
upload_protocol = custom
upload_flags =
-t2
diff --git a/examples/projects/NUCLEO-L432KC/gate_serialcom/platformio.ini b/examples/projects/NUCLEO-L432KC/gate_serialcom/platformio.ini
index d8abb568c..f8e0b66ee 100644
--- a/examples/projects/NUCLEO-L432KC/gate_serialcom/platformio.ini
+++ b/examples/projects/NUCLEO-L432KC/gate_serialcom/platformio.ini
@@ -37,7 +37,7 @@ build_flags =
-DLUOSHAL=STM32L4
-D GATEFORMAT=TinyJSON
-D PIPEMODE=SERIAL
- -D PIPEHAL=NUCLEO-L4
+ -D PIPEHAL=NUCLEO-L432
[env:nucleo_l432kc_with_bootloader]
board_build.ldscript = linker/custom_Luos_bootloader_script.ld
@@ -51,7 +51,7 @@ build_flags =
-DLUOSHAL=STM32L4
-D GATEFORMAT=TinyJSON
-D PIPEMODE=SERIAL
- -D PIPEHAL=NUCLEO-L4
+ -D PIPEHAL=NUCLEO-L432
upload_protocol = custom
upload_flags =
-t2
diff --git a/examples/projects/NUCLEO-L476RG/gate_serialcom/include/gpio.h b/examples/projects/NUCLEO-L476RG/gate_serialcom/include/gpio.h
new file mode 100644
index 000000000..f57136410
--- /dev/null
+++ b/examples/projects/NUCLEO-L476RG/gate_serialcom/include/gpio.h
@@ -0,0 +1,50 @@
+/**
+ ******************************************************************************
+ * @file gpio.h
+ * @brief This file contains all the function prototypes for
+ * the gpio.c file
+ ******************************************************************************
+ * @attention
+ *
+ * © Copyright (c) 2021 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software component is licensed by ST under BSD 3-Clause license,
+ * the "License"; You may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at:
+ * opensource.org/licenses/BSD-3-Clause
+ *
+ ******************************************************************************
+ */
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __GPIO_H__
+#define __GPIO_H__
+
+#ifdef __cplusplus
+extern "C"
+{
+#endif
+
+/* Includes ------------------------------------------------------------------*/
+#include "main.h"
+
+ /* USER CODE BEGIN Includes */
+
+ /* USER CODE END Includes */
+
+ /* USER CODE BEGIN Private defines */
+
+ /* USER CODE END Private defines */
+
+ void MX_GPIO_Init(void);
+
+ /* USER CODE BEGIN Prototypes */
+
+ /* USER CODE END Prototypes */
+
+#ifdef __cplusplus
+}
+#endif
+#endif /*__ GPIO_H__ */
+
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/examples/projects/NUCLEO-L476RG/gate_serialcom/include/main.h b/examples/projects/NUCLEO-L476RG/gate_serialcom/include/main.h
new file mode 100644
index 000000000..677d953e4
--- /dev/null
+++ b/examples/projects/NUCLEO-L476RG/gate_serialcom/include/main.h
@@ -0,0 +1,76 @@
+/* USER CODE BEGIN Header */
+/**
+ ******************************************************************************
+ * @file : main.h
+ * @brief : Header for main.c file.
+ * This file contains the common defines of the application.
+ ******************************************************************************
+ * @attention
+ *
+ * © Copyright (c) 2021 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software component is licensed by ST under BSD 3-Clause license,
+ * the "License"; You may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at:
+ * opensource.org/licenses/BSD-3-Clause
+ *
+ ******************************************************************************
+ */
+/* USER CODE END Header */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __MAIN_H
+#define __MAIN_H
+
+#ifdef __cplusplus
+extern "C"
+{
+#endif
+
+/* Includes ------------------------------------------------------------------*/
+#include "stm32l4xx_hal.h"
+
+ /* Private includes ----------------------------------------------------------*/
+ /* USER CODE BEGIN Includes */
+
+ /* USER CODE END Includes */
+
+ /* Exported types ------------------------------------------------------------*/
+ /* USER CODE BEGIN ET */
+
+ /* USER CODE END ET */
+
+ /* Exported constants --------------------------------------------------------*/
+ /* USER CODE BEGIN EC */
+
+ /* USER CODE END EC */
+
+ /* Exported macro ------------------------------------------------------------*/
+ /* USER CODE BEGIN EM */
+
+ /* USER CODE END EM */
+
+ /* Exported functions prototypes ---------------------------------------------*/
+ void Error_Handler(void);
+
+/* USER CODE BEGIN EFP */
+
+/* USER CODE END EFP */
+
+/* Private defines -----------------------------------------------------------*/
+#define BTN_Pin GPIO_PIN_11
+#define BTN_GPIO_Port GPIOA
+#define LED_Pin GPIO_PIN_3
+#define LED_GPIO_Port GPIOB
+ /* USER CODE BEGIN Private defines */
+
+ /* USER CODE END Private defines */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __MAIN_H */
+
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/examples/projects/NUCLEO-L476RG/gate_serialcom/include/stm32l4xx_hal_conf.h b/examples/projects/NUCLEO-L476RG/gate_serialcom/include/stm32l4xx_hal_conf.h
new file mode 100644
index 000000000..55d17eb7b
--- /dev/null
+++ b/examples/projects/NUCLEO-L476RG/gate_serialcom/include/stm32l4xx_hal_conf.h
@@ -0,0 +1,484 @@
+/**
+ ******************************************************************************
+ * @file stm32l4xx_hal_conf.h
+ * @author MCD Application Team
+ * @brief HAL configuration template file.
+ * This file should be copied to the application folder and renamed
+ * to stm32l4xx_hal_conf.h.
+ ******************************************************************************
+ * @attention
+ *
+ * © Copyright (c) 2017 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software component is licensed by ST under BSD 3-Clause license,
+ * the "License"; You may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at:
+ * opensource.org/licenses/BSD-3-Clause
+ *
+ ******************************************************************************
+ */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef STM32L4xx_HAL_CONF_H
+#define STM32L4xx_HAL_CONF_H
+
+#ifdef __cplusplus
+extern "C"
+{
+#endif
+
+/* Exported types ------------------------------------------------------------*/
+/* Exported constants --------------------------------------------------------*/
+
+/* ########################## Module Selection ############################## */
+/**
+ * @brief This is the list of modules to be used in the HAL driver
+ */
+#define HAL_MODULE_ENABLED
+/*#define HAL_ADC_MODULE_ENABLED */
+/*#define HAL_CRYP_MODULE_ENABLED */
+/*#define HAL_CAN_MODULE_ENABLED */
+/*#define HAL_COMP_MODULE_ENABLED */
+/*#define HAL_CRYP_MODULE_ENABLED */
+/*#define HAL_DAC_MODULE_ENABLED */
+/*#define HAL_DCMI_MODULE_ENABLED */
+/*#define HAL_DMA2D_MODULE_ENABLED */
+/*#define HAL_DFSDM_MODULE_ENABLED */
+/*#define HAL_DSI_MODULE_ENABLED */
+/*#define HAL_FIREWALL_MODULE_ENABLED */
+/*#define HAL_GFXMMU_MODULE_ENABLED */
+/*#define HAL_HCD_MODULE_ENABLED */
+/*#define HAL_HASH_MODULE_ENABLED */
+/*#define HAL_I2S_MODULE_ENABLED */
+/*#define HAL_IRDA_MODULE_ENABLED */
+/*#define HAL_IWDG_MODULE_ENABLED */
+/*#define HAL_LTDC_MODULE_ENABLED */
+/*#define HAL_LCD_MODULE_ENABLED */
+/*#define HAL_LPTIM_MODULE_ENABLED */
+/*#define HAL_MMC_MODULE_ENABLED */
+/*#define HAL_NAND_MODULE_ENABLED */
+/*#define HAL_NOR_MODULE_ENABLED */
+/*#define HAL_OPAMP_MODULE_ENABLED */
+/*#define HAL_OSPI_MODULE_ENABLED */
+/*#define HAL_OSPI_MODULE_ENABLED */
+/*#define HAL_PCD_MODULE_ENABLED */
+/*#define HAL_PKA_MODULE_ENABLED */
+/*#define HAL_QSPI_MODULE_ENABLED */
+/*#define HAL_QSPI_MODULE_ENABLED */
+/*#define HAL_RNG_MODULE_ENABLED */
+/*#define HAL_RTC_MODULE_ENABLED */
+/*#define HAL_SAI_MODULE_ENABLED */
+/*#define HAL_SD_MODULE_ENABLED */
+/*#define HAL_SMBUS_MODULE_ENABLED */
+/*#define HAL_SMARTCARD_MODULE_ENABLED */
+/*#define HAL_SPI_MODULE_ENABLED */
+/*#define HAL_SRAM_MODULE_ENABLED */
+/*#define HAL_SWPMI_MODULE_ENABLED */
+/*#define HAL_TSC_MODULE_ENABLED */
+/*#define HAL_WWDG_MODULE_ENABLED */
+/*#define HAL_EXTI_MODULE_ENABLED */
+/*#define HAL_PSSI_MODULE_ENABLED */
+#define HAL_GPIO_MODULE_ENABLED
+#define HAL_EXTI_MODULE_ENABLED
+#define HAL_I2C_MODULE_ENABLED
+#define HAL_DMA_MODULE_ENABLED
+#define HAL_RCC_MODULE_ENABLED
+#define HAL_FLASH_MODULE_ENABLED
+#define HAL_PWR_MODULE_ENABLED
+#define HAL_CORTEX_MODULE_ENABLED
+#define HAL_CRC_MODULE_ENABLED
+#define HAL_TIM_MODULE_ENABLED
+#define HAL_UART_MODULE_ENABLED
+#define HAL_USART_MODULE_ENABLED
+
+/* ########################## Oscillator Values adaptation ####################*/
+/**
+ * @brief Adjust the value of External High Speed oscillator (HSE) used in your application.
+ * This value is used by the RCC HAL module to compute the system frequency
+ * (when HSE is used as system clock source, directly or through the PLL).
+ */
+#if !defined(HSE_VALUE)
+#define HSE_VALUE ((uint32_t)8000000U) /*!< Value of the External oscillator in Hz */
+#endif /* HSE_VALUE */
+
+#if !defined(HSE_STARTUP_TIMEOUT)
+#define HSE_STARTUP_TIMEOUT ((uint32_t)100U) /*!< Time out for HSE start up, in ms */
+#endif /* HSE_STARTUP_TIMEOUT */
+
+/**
+ * @brief Internal Multiple Speed oscillator (MSI) default value.
+ * This value is the default MSI range value after Reset.
+ */
+#if !defined(MSI_VALUE)
+#define MSI_VALUE ((uint32_t)4000000U) /*!< Value of the Internal oscillator in Hz*/
+#endif /* MSI_VALUE */
+/**
+ * @brief Internal High Speed oscillator (HSI) value.
+ * This value is used by the RCC HAL module to compute the system frequency
+ * (when HSI is used as system clock source, directly or through the PLL).
+ */
+#if !defined(HSI_VALUE)
+#define HSI_VALUE ((uint32_t)16000000U) /*!< Value of the Internal oscillator in Hz*/
+#endif /* HSI_VALUE */
+
+/**
+ * @brief Internal High Speed oscillator (HSI48) value for USB FS, SDMMC and RNG.
+ * This internal oscillator is mainly dedicated to provide a high precision clock to
+ * the USB peripheral by means of a special Clock Recovery System (CRS) circuitry.
+ * When the CRS is not used, the HSI48 RC oscillator runs on it default frequency
+ * which is subject to manufacturing process variations.
+ */
+#if !defined(HSI48_VALUE)
+#define HSI48_VALUE ((uint32_t)48000000U) /*!< Value of the Internal High Speed oscillator for USB FS/SDMMC/RNG in Hz. \
+ The real value my vary depending on manufacturing process variations.*/
+#endif /* HSI48_VALUE */
+
+/**
+ * @brief Internal Low Speed oscillator (LSI) value.
+ */
+#if !defined(LSI_VALUE)
+#define LSI_VALUE 32000U /*!< LSI Typical Value in Hz*/
+#endif /* LSI_VALUE */ /*!< Value of the Internal Low Speed oscillator in Hz \
+ The real value may vary depending on the variations \
+ in voltage and temperature.*/
+
+/**
+ * @brief External Low Speed oscillator (LSE) value.
+ * This value is used by the UART, RTC HAL module to compute the system frequency
+ */
+#if !defined(LSE_VALUE)
+#define LSE_VALUE 32768U /*!< Value of the External oscillator in Hz*/
+#endif /* LSE_VALUE */
+
+#if !defined(LSE_STARTUP_TIMEOUT)
+#define LSE_STARTUP_TIMEOUT 5000U /*!< Time out for LSE start up, in ms */
+#endif /* HSE_STARTUP_TIMEOUT */
+
+/**
+ * @brief External clock source for SAI1 peripheral
+ * This value is used by the RCC HAL module to compute the SAI1 & SAI2 clock source
+ * frequency.
+ */
+#if !defined(EXTERNAL_SAI1_CLOCK_VALUE)
+#define EXTERNAL_SAI1_CLOCK_VALUE 2097000U /*!< Value of the SAI1 External clock source in Hz*/
+#endif /* EXTERNAL_SAI1_CLOCK_VALUE */
+
+/**
+ * @brief External clock source for SAI2 peripheral
+ * This value is used by the RCC HAL module to compute the SAI1 & SAI2 clock source
+ * frequency.
+ */
+#if !defined(EXTERNAL_SAI2_CLOCK_VALUE)
+#define EXTERNAL_SAI2_CLOCK_VALUE 48000U /*!< Value of the SAI2 External clock source in Hz*/
+#endif /* EXTERNAL_SAI2_CLOCK_VALUE */
+
+ /* Tip: To avoid modifying this file each time you need to use different HSE,
+ === you can define the HSE value in your toolchain compiler preprocessor. */
+
+ /* ########################### System Configuration ######################### */
+ /**
+ * @brief This is the HAL system configuration section
+ */
+
+#define VDD_VALUE 3300U /*!< Value of VDD in mv */
+#define TICK_INT_PRIORITY 0U /*!< tick interrupt priority */
+#define USE_RTOS 0U
+#define PREFETCH_ENABLE 0U
+#define INSTRUCTION_CACHE_ENABLE 1U
+#define DATA_CACHE_ENABLE 1U
+
+/* ########################## Assert Selection ############################## */
+/**
+ * @brief Uncomment the line below to expanse the "assert_param" macro in the
+ * HAL drivers code
+ */
+/* #define USE_FULL_ASSERT 1U */
+
+/* ################## Register callback feature configuration ############### */
+/**
+ * @brief Set below the peripheral configuration to "1U" to add the support
+ * of HAL callback registration/deregistration feature for the HAL
+ * driver(s). This allows user application to provide specific callback
+ * functions thanks to HAL_PPP_RegisterCallback() rather than overwriting
+ * the default weak callback functions (see each stm32l4xx_hal_ppp.h file
+ * for possible callback identifiers defined in HAL_PPP_CallbackIDTypeDef
+ * for each PPP peripheral).
+ */
+#define USE_HAL_ADC_REGISTER_CALLBACKS 0U
+#define USE_HAL_CAN_REGISTER_CALLBACKS 0U
+#define USE_HAL_COMP_REGISTER_CALLBACKS 0U
+#define USE_HAL_CRYP_REGISTER_CALLBACKS 0U
+#define USE_HAL_DAC_REGISTER_CALLBACKS 0U
+#define USE_HAL_DCMI_REGISTER_CALLBACKS 0U
+#define USE_HAL_DFSDM_REGISTER_CALLBACKS 0U
+#define USE_HAL_DMA2D_REGISTER_CALLBACKS 0U
+#define USE_HAL_DSI_REGISTER_CALLBACKS 0U
+#define USE_HAL_GFXMMU_REGISTER_CALLBACKS 0U
+#define USE_HAL_HASH_REGISTER_CALLBACKS 0U
+#define USE_HAL_HCD_REGISTER_CALLBACKS 0U
+#define USE_HAL_I2C_REGISTER_CALLBACKS 0U
+#define USE_HAL_IRDA_REGISTER_CALLBACKS 0U
+#define USE_HAL_LPTIM_REGISTER_CALLBACKS 0U
+#define USE_HAL_LTDC_REGISTER_CALLBACKS 0U
+#define USE_HAL_MMC_REGISTER_CALLBACKS 0U
+#define USE_HAL_OPAMP_REGISTER_CALLBACKS 0U
+#define USE_HAL_OSPI_REGISTER_CALLBACKS 0U
+#define USE_HAL_PCD_REGISTER_CALLBACKS 0U
+#define USE_HAL_QSPI_REGISTER_CALLBACKS 0U
+#define USE_HAL_RNG_REGISTER_CALLBACKS 0U
+#define USE_HAL_RTC_REGISTER_CALLBACKS 0U
+#define USE_HAL_SAI_REGISTER_CALLBACKS 0U
+#define USE_HAL_SD_REGISTER_CALLBACKS 0U
+#define USE_HAL_SMARTCARD_REGISTER_CALLBACKS 0U
+#define USE_HAL_SMBUS_REGISTER_CALLBACKS 0U
+#define USE_HAL_SPI_REGISTER_CALLBACKS 0U
+#define USE_HAL_SWPMI_REGISTER_CALLBACKS 0U
+#define USE_HAL_TIM_REGISTER_CALLBACKS 0U
+#define USE_HAL_TSC_REGISTER_CALLBACKS 0U
+#define USE_HAL_UART_REGISTER_CALLBACKS 0U
+#define USE_HAL_USART_REGISTER_CALLBACKS 0U
+#define USE_HAL_WWDG_REGISTER_CALLBACKS 0U
+
+ /* ################## SPI peripheral configuration ########################## */
+
+ /* CRC FEATURE: Use to activate CRC feature inside HAL SPI Driver
+ * Activated: CRC code is present inside driver
+ * Deactivated: CRC code cleaned from driver
+ */
+
+#define USE_SPI_CRC 0U
+
+ /* Includes ------------------------------------------------------------------*/
+ /**
+ * @brief Include module's header file
+ */
+
+#ifdef HAL_RCC_MODULE_ENABLED
+#include "stm32l4xx_hal_rcc.h"
+#endif /* HAL_RCC_MODULE_ENABLED */
+
+#ifdef HAL_GPIO_MODULE_ENABLED
+#include "stm32l4xx_hal_gpio.h"
+#endif /* HAL_GPIO_MODULE_ENABLED */
+
+#ifdef HAL_DMA_MODULE_ENABLED
+#include "stm32l4xx_hal_dma.h"
+#endif /* HAL_DMA_MODULE_ENABLED */
+
+#ifdef HAL_DFSDM_MODULE_ENABLED
+#include "stm32l4xx_hal_dfsdm.h"
+#endif /* HAL_DFSDM_MODULE_ENABLED */
+
+#ifdef HAL_CORTEX_MODULE_ENABLED
+#include "stm32l4xx_hal_cortex.h"
+#endif /* HAL_CORTEX_MODULE_ENABLED */
+
+#ifdef HAL_ADC_MODULE_ENABLED
+#include "stm32l4xx_hal_adc.h"
+#endif /* HAL_ADC_MODULE_ENABLED */
+
+#ifdef HAL_CAN_MODULE_ENABLED
+#include "stm32l4xx_hal_can.h"
+#endif /* HAL_CAN_MODULE_ENABLED */
+
+#ifdef HAL_CAN_LEGACY_MODULE_ENABLED
+#include "Legacy/stm32l4xx_hal_can_legacy.h"
+#endif /* HAL_CAN_LEGACY_MODULE_ENABLED */
+
+#ifdef HAL_COMP_MODULE_ENABLED
+#include "stm32l4xx_hal_comp.h"
+#endif /* HAL_COMP_MODULE_ENABLED */
+
+#ifdef HAL_CRC_MODULE_ENABLED
+#include "stm32l4xx_hal_crc.h"
+#endif /* HAL_CRC_MODULE_ENABLED */
+
+#ifdef HAL_CRYP_MODULE_ENABLED
+#include "stm32l4xx_hal_cryp.h"
+#endif /* HAL_CRYP_MODULE_ENABLED */
+
+#ifdef HAL_DAC_MODULE_ENABLED
+#include "stm32l4xx_hal_dac.h"
+#endif /* HAL_DAC_MODULE_ENABLED */
+
+#ifdef HAL_DCMI_MODULE_ENABLED
+#include "stm32l4xx_hal_dcmi.h"
+#endif /* HAL_DCMI_MODULE_ENABLED */
+
+#ifdef HAL_DMA2D_MODULE_ENABLED
+#include "stm32l4xx_hal_dma2d.h"
+#endif /* HAL_DMA2D_MODULE_ENABLED */
+
+#ifdef HAL_DSI_MODULE_ENABLED
+#include "stm32l4xx_hal_dsi.h"
+#endif /* HAL_DSI_MODULE_ENABLED */
+
+#ifdef HAL_EXTI_MODULE_ENABLED
+#include "stm32l4xx_hal_exti.h"
+#endif /* HAL_EXTI_MODULE_ENABLED */
+
+#ifdef HAL_GFXMMU_MODULE_ENABLED
+#include "stm32l4xx_hal_gfxmmu.h"
+#endif /* HAL_GFXMMU_MODULE_ENABLED */
+
+#ifdef HAL_FIREWALL_MODULE_ENABLED
+#include "stm32l4xx_hal_firewall.h"
+#endif /* HAL_FIREWALL_MODULE_ENABLED */
+
+#ifdef HAL_FLASH_MODULE_ENABLED
+#include "stm32l4xx_hal_flash.h"
+#endif /* HAL_FLASH_MODULE_ENABLED */
+
+#ifdef HAL_HASH_MODULE_ENABLED
+#include "stm32l4xx_hal_hash.h"
+#endif /* HAL_HASH_MODULE_ENABLED */
+
+#ifdef HAL_HCD_MODULE_ENABLED
+#include "stm32l4xx_hal_hcd.h"
+#endif /* HAL_HCD_MODULE_ENABLED */
+
+#ifdef HAL_I2C_MODULE_ENABLED
+#include "stm32l4xx_hal_i2c.h"
+#endif /* HAL_I2C_MODULE_ENABLED */
+
+#ifdef HAL_IRDA_MODULE_ENABLED
+#include "stm32l4xx_hal_irda.h"
+#endif /* HAL_IRDA_MODULE_ENABLED */
+
+#ifdef HAL_IWDG_MODULE_ENABLED
+#include "stm32l4xx_hal_iwdg.h"
+#endif /* HAL_IWDG_MODULE_ENABLED */
+
+#ifdef HAL_LCD_MODULE_ENABLED
+#include "stm32l4xx_hal_lcd.h"
+#endif /* HAL_LCD_MODULE_ENABLED */
+
+#ifdef HAL_LPTIM_MODULE_ENABLED
+#include "stm32l4xx_hal_lptim.h"
+#endif /* HAL_LPTIM_MODULE_ENABLED */
+
+#ifdef HAL_LTDC_MODULE_ENABLED
+#include "stm32l4xx_hal_ltdc.h"
+#endif /* HAL_LTDC_MODULE_ENABLED */
+
+#ifdef HAL_MMC_MODULE_ENABLED
+#include "stm32l4xx_hal_mmc.h"
+#endif /* HAL_MMC_MODULE_ENABLED */
+
+#ifdef HAL_NAND_MODULE_ENABLED
+#include "stm32l4xx_hal_nand.h"
+#endif /* HAL_NAND_MODULE_ENABLED */
+
+#ifdef HAL_NOR_MODULE_ENABLED
+#include "stm32l4xx_hal_nor.h"
+#endif /* HAL_NOR_MODULE_ENABLED */
+
+#ifdef HAL_OPAMP_MODULE_ENABLED
+#include "stm32l4xx_hal_opamp.h"
+#endif /* HAL_OPAMP_MODULE_ENABLED */
+
+#ifdef HAL_OSPI_MODULE_ENABLED
+#include "stm32l4xx_hal_ospi.h"
+#endif /* HAL_OSPI_MODULE_ENABLED */
+
+#ifdef HAL_PCD_MODULE_ENABLED
+#include "stm32l4xx_hal_pcd.h"
+#endif /* HAL_PCD_MODULE_ENABLED */
+
+#ifdef HAL_PKA_MODULE_ENABLED
+#include "stm32l4xx_hal_pka.h"
+#endif /* HAL_PKA_MODULE_ENABLED */
+
+#ifdef HAL_PSSI_MODULE_ENABLED
+#include "stm32l4xx_hal_pssi.h"
+#endif /* HAL_PSSI_MODULE_ENABLED */
+
+#ifdef HAL_PWR_MODULE_ENABLED
+#include "stm32l4xx_hal_pwr.h"
+#endif /* HAL_PWR_MODULE_ENABLED */
+
+#ifdef HAL_QSPI_MODULE_ENABLED
+#include "stm32l4xx_hal_qspi.h"
+#endif /* HAL_QSPI_MODULE_ENABLED */
+
+#ifdef HAL_RNG_MODULE_ENABLED
+#include "stm32l4xx_hal_rng.h"
+#endif /* HAL_RNG_MODULE_ENABLED */
+
+#ifdef HAL_RTC_MODULE_ENABLED
+#include "stm32l4xx_hal_rtc.h"
+#endif /* HAL_RTC_MODULE_ENABLED */
+
+#ifdef HAL_SAI_MODULE_ENABLED
+#include "stm32l4xx_hal_sai.h"
+#endif /* HAL_SAI_MODULE_ENABLED */
+
+#ifdef HAL_SD_MODULE_ENABLED
+#include "stm32l4xx_hal_sd.h"
+#endif /* HAL_SD_MODULE_ENABLED */
+
+#ifdef HAL_SMARTCARD_MODULE_ENABLED
+#include "stm32l4xx_hal_smartcard.h"
+#endif /* HAL_SMARTCARD_MODULE_ENABLED */
+
+#ifdef HAL_SMBUS_MODULE_ENABLED
+#include "stm32l4xx_hal_smbus.h"
+#endif /* HAL_SMBUS_MODULE_ENABLED */
+
+#ifdef HAL_SPI_MODULE_ENABLED
+#include "stm32l4xx_hal_spi.h"
+#endif /* HAL_SPI_MODULE_ENABLED */
+
+#ifdef HAL_SRAM_MODULE_ENABLED
+#include "stm32l4xx_hal_sram.h"
+#endif /* HAL_SRAM_MODULE_ENABLED */
+
+#ifdef HAL_SWPMI_MODULE_ENABLED
+#include "stm32l4xx_hal_swpmi.h"
+#endif /* HAL_SWPMI_MODULE_ENABLED */
+
+#ifdef HAL_TIM_MODULE_ENABLED
+#include "stm32l4xx_hal_tim.h"
+#endif /* HAL_TIM_MODULE_ENABLED */
+
+#ifdef HAL_TSC_MODULE_ENABLED
+#include "stm32l4xx_hal_tsc.h"
+#endif /* HAL_TSC_MODULE_ENABLED */
+
+#ifdef HAL_UART_MODULE_ENABLED
+#include "stm32l4xx_hal_uart.h"
+#endif /* HAL_UART_MODULE_ENABLED */
+
+#ifdef HAL_USART_MODULE_ENABLED
+#include "stm32l4xx_hal_usart.h"
+#endif /* HAL_USART_MODULE_ENABLED */
+
+#ifdef HAL_WWDG_MODULE_ENABLED
+#include "stm32l4xx_hal_wwdg.h"
+#endif /* HAL_WWDG_MODULE_ENABLED */
+
+/* Exported macro ------------------------------------------------------------*/
+#ifdef USE_FULL_ASSERT
+ /**
+ * @brief The assert_param macro is used for function's parameters check.
+ * @param expr If expr is false, it calls assert_failed function
+ * which reports the name of the source file and the source
+ * line number of the call that failed.
+ * If expr is true, it returns no value.
+ * @retval None
+ */
+#define assert_param(expr) ((expr) ? (void)0U : assert_failed((uint8_t *)__FILE__, __LINE__))
+ /* Exported functions ------------------------------------------------------- */
+ void assert_failed(uint8_t *file, uint32_t line);
+#else
+#define assert_param(expr) ((void)0U)
+#endif /* USE_FULL_ASSERT */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* STM32L4xx_HAL_CONF_H */
+
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/examples/projects/NUCLEO-L476RG/gate_serialcom/include/stm32l4xx_it.h b/examples/projects/NUCLEO-L476RG/gate_serialcom/include/stm32l4xx_it.h
new file mode 100644
index 000000000..f57963372
--- /dev/null
+++ b/examples/projects/NUCLEO-L476RG/gate_serialcom/include/stm32l4xx_it.h
@@ -0,0 +1,70 @@
+/* USER CODE BEGIN Header */
+/**
+ ******************************************************************************
+ * @file stm32l4xx_it.h
+ * @brief This file contains the headers of the interrupt handlers.
+ ******************************************************************************
+ * @attention
+ *
+ * © Copyright (c) 2021 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software component is licensed by ST under BSD 3-Clause license,
+ * the "License"; You may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at:
+ * opensource.org/licenses/BSD-3-Clause
+ *
+ ******************************************************************************
+ */
+/* USER CODE END Header */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __STM32L4xx_IT_H
+#define __STM32L4xx_IT_H
+
+#ifdef __cplusplus
+extern "C"
+{
+#endif
+
+ /* Private includes ----------------------------------------------------------*/
+ /* USER CODE BEGIN Includes */
+
+ /* USER CODE END Includes */
+
+ /* Exported types ------------------------------------------------------------*/
+ /* USER CODE BEGIN ET */
+
+ /* USER CODE END ET */
+
+ /* Exported constants --------------------------------------------------------*/
+ /* USER CODE BEGIN EC */
+
+ /* USER CODE END EC */
+
+ /* Exported macro ------------------------------------------------------------*/
+ /* USER CODE BEGIN EM */
+
+ /* USER CODE END EM */
+
+ /* Exported functions prototypes ---------------------------------------------*/
+ void NMI_Handler(void);
+ void HardFault_Handler(void);
+ void MemManage_Handler(void);
+ void BusFault_Handler(void);
+ void UsageFault_Handler(void);
+ void SVC_Handler(void);
+ void DebugMon_Handler(void);
+ void PendSV_Handler(void);
+ void SysTick_Handler(void);
+ /* USER CODE BEGIN EFP */
+
+ /* USER CODE END EFP */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __STM32L4xx_IT_H */
+
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/examples/projects/NUCLEO-L476RG/gate_serialcom/linker/custom_Luos_bootloader_script.ld b/examples/projects/NUCLEO-L476RG/gate_serialcom/linker/custom_Luos_bootloader_script.ld
new file mode 100644
index 000000000..dde7bb560
--- /dev/null
+++ b/examples/projects/NUCLEO-L476RG/gate_serialcom/linker/custom_Luos_bootloader_script.ld
@@ -0,0 +1,175 @@
+/**
+ ******************************************************************************
+ * @file LinkerScript.ld
+ * @author Auto-generated by STM32CubeIDE
+ * @brief Linker script for STM32L432KCUx Device from STM32L4 series
+ * 256Kbytes FLASH
+ * 64Kbytes RAM
+ *
+ * Set heap size, stack size and stack location according
+ * to application requirements.
+ *
+ * Set memory bank area and size if external memory is used
+ ******************************************************************************
+ * @attention
+ *
+ * © Copyright (c) 2020 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software component is licensed by ST under BSD 3-Clause license,
+ * the "License"; You may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at:
+ * opensource.org/licenses/BSD-3-Clause
+ *
+ ******************************************************************************
+ */
+
+/* Entry Point */
+ENTRY(Reset_Handler)
+
+/* Highest address of the user mode stack */
+_estack = ORIGIN(RAM) + LENGTH(RAM); /* end of "RAM" Ram type memory */
+
+_Min_Heap_Size = 0x200; /* required amount of heap */
+_Min_Stack_Size = 0x400; /* required amount of stack */
+
+/* Memories definition */
+MEMORY
+{
+ RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 64K
+ FLASH (rx) : ORIGIN = 0x800C800, LENGTH = 206K
+}
+
+/* Sections */
+SECTIONS
+{
+ /* The startup code into "FLASH" Rom type memory */
+ .isr_vector :
+ {
+ . = ALIGN(4);
+ KEEP(*(.isr_vector)) /* Startup code */
+ . = ALIGN(4);
+ } >FLASH
+
+ /* The program code and other data into "FLASH" Rom type memory */
+ .text :
+ {
+ . = ALIGN(4);
+ *(.text) /* .text sections (code) */
+ *(.text*) /* .text* sections (code) */
+ *(.glue_7) /* glue arm to thumb code */
+ *(.glue_7t) /* glue thumb to arm code */
+ *(.eh_frame)
+
+ KEEP (*(.init))
+ KEEP (*(.fini))
+
+ . = ALIGN(4);
+ _etext = .; /* define a global symbols at end of code */
+ } >FLASH
+
+ /* Constant data into "FLASH" Rom type memory */
+ .rodata :
+ {
+ . = ALIGN(4);
+ *(.rodata) /* .rodata sections (constants, strings, etc.) */
+ *(.rodata*) /* .rodata* sections (constants, strings, etc.) */
+ . = ALIGN(4);
+ } >FLASH
+
+ .ARM.extab : {
+ . = ALIGN(4);
+ *(.ARM.extab* .gnu.linkonce.armextab.*)
+ . = ALIGN(4);
+ } >FLASH
+
+ .ARM : {
+ . = ALIGN(4);
+ __exidx_start = .;
+ *(.ARM.exidx*)
+ __exidx_end = .;
+ . = ALIGN(4);
+ } >FLASH
+
+ .preinit_array :
+ {
+ . = ALIGN(4);
+ PROVIDE_HIDDEN (__preinit_array_start = .);
+ KEEP (*(.preinit_array*))
+ PROVIDE_HIDDEN (__preinit_array_end = .);
+ . = ALIGN(4);
+ } >FLASH
+
+ .init_array :
+ {
+ . = ALIGN(4);
+ PROVIDE_HIDDEN (__init_array_start = .);
+ KEEP (*(SORT(.init_array.*)))
+ KEEP (*(.init_array*))
+ PROVIDE_HIDDEN (__init_array_end = .);
+ . = ALIGN(4);
+ } >FLASH
+
+ .fini_array :
+ {
+ . = ALIGN(4);
+ PROVIDE_HIDDEN (__fini_array_start = .);
+ KEEP (*(SORT(.fini_array.*)))
+ KEEP (*(.fini_array*))
+ PROVIDE_HIDDEN (__fini_array_end = .);
+ . = ALIGN(4);
+ } >FLASH
+
+ /* Used by the startup to initialize data */
+ _sidata = LOADADDR(.data);
+
+ /* Initialized data sections into "RAM" Ram type memory */
+ .data :
+ {
+ . = ALIGN(4);
+ _sdata = .; /* create a global symbol at data start */
+ *(.data) /* .data sections */
+ *(.data*) /* .data* sections */
+
+ . = ALIGN(4);
+ _edata = .; /* define a global symbol at data end */
+
+ } >RAM AT> FLASH
+
+ /* Uninitialized data section into "RAM" Ram type memory */
+ . = ALIGN(4);
+ .bss :
+ {
+ /* This is used by the startup in order to initialize the .bss section */
+ _sbss = .; /* define a global symbol at bss start */
+ __bss_start__ = _sbss;
+ *(.bss)
+ *(.bss*)
+ *(COMMON)
+
+ . = ALIGN(4);
+ _ebss = .; /* define a global symbol at bss end */
+ __bss_end__ = _ebss;
+ } >RAM
+
+ /* User_heap_stack section, used to check that there is enough "RAM" Ram type memory left */
+ ._user_heap_stack :
+ {
+ . = ALIGN(8);
+ PROVIDE ( end = . );
+ PROVIDE ( _end = . );
+ . = . + _Min_Heap_Size;
+ . = . + _Min_Stack_Size;
+ . = ALIGN(8);
+ } >RAM
+
+ /* Remove information from the compiler libraries */
+ /DISCARD/ :
+ {
+ libc.a ( * )
+ libm.a ( * )
+ libgcc.a ( * )
+ }
+
+ .ARM.attributes 0 : { *(.ARM.attributes) }
+}
diff --git a/examples/projects/NUCLEO-L476RG/gate_serialcom/node_config.h b/examples/projects/NUCLEO-L476RG/gate_serialcom/node_config.h
new file mode 100644
index 000000000..7c26bd8bb
--- /dev/null
+++ b/examples/projects/NUCLEO-L476RG/gate_serialcom/node_config.h
@@ -0,0 +1,131 @@
+/******************************************************************************
+ * @file node_config.h
+ * @brief This file allow you to use standard preprocessor definitions to
+ * configure your project, Luos and Luos HAL libraries
+ *
+ * # Introduction
+ * This file is for the luos user. You may here configure your project and
+ * define your custom Luos service and custom Luos command for your product
+ *
+ * Luos libraries offer a minimal standard configuration to optimize
+ * memory usage. In some case you have to modify standard value to fit
+ * with your need concerning among of data transiting through the network
+ * or network speed for example
+ *
+ * Luos libraries can be use with a lot a MCU family. Luos compagny give you
+ * a default configuration, for specific MCU family, in robus_hal_config.h.
+ * This configuration can be modify here to fit with you design by
+ * preprocessor definitions of MCU Hardware needs
+ *
+ * # Usage
+ * This file should be place a the root folder of your project and include
+ * where build flag preprocessor definitions are define in your IDE
+ * -include node_config.h
+ *
+ * @author Luos
+ * @version 0.0.0
+ ******************************************************************************/
+#ifndef _NODE_CONFIG_H_
+#define _NODE_CONFIG_H_
+
+/*******************************************************************************
+ * PROJECT DEFINITION
+ *******************************************************************************/
+
+/*******************************************************************************
+ * LUOS LIBRARY DEFINITION
+ *******************************************************************************
+ * Define | Default Value | Description
+ * :---------------------|------------------------------------------------------
+ * MAX_LOCAL_SERVICE_NUMBER | 5 | Service number in the node
+ * MAX_NODE_NUMBER. | 20 | Node number in the device
+ * MSG_BUFFER_SIZE | 3*SIZE_MSG_MAX (405 Bytes) | Size in byte of the Luos buffer TX and RX
+ * MAX_MSG_NB | 2*MAX_LOCAL_SERVICE_NUMBER | Message number in Luos buffer
+ * MAX_NODE_NUMBER | 20 | Node number in the device
+ * MAX_SERVICE_NUMBER | 20 | Service number in the device
+ * NBR_PORT | 2 | PTP Branch number Max 8
+ * NBR_RETRY | 10 | Send Retry number in case of NACK or collision
+ ******************************************************************************/
+
+#define MAX_LOCAL_SERVICE_NUMBER 2
+#define MSG_BUFFER_SIZE 2048
+#define MAX_MSG_NB 40
+
+/*******************************************************************************
+ * LUOS HAL LIBRARY DEFINITION
+*******************************************************************************
+ * Define | Description
+ * :-----------------------|-----------------------------------------------
+ * MCUFREQ | Put your the MCU frequency (value in Hz)
+ * TIMERDIV | Timer divider clock (see your clock configuration)
+ * USE_CRC_HW | define to 0 if there is no Module CRC in your MCU
+ * USE_TX_IT | define to 1 to not use DMA transfert for Luos Tx
+ *
+ * PORT_CLOCK_ENABLE | Enable clock for port
+ * PTPx | A,B,C,D etc. PTP Branch Pin/Port/IRQ
+ * TX_LOCK_DETECT | Disable by default use if not busy flag in USART Pin/Port/IRQ
+ * RX_EN | Rx enable for driver RS485 always on Pin/Port
+ * TX_EN | Tx enable for driver RS485 Pin/Port
+ * COM_TX | Tx USART Com Pin/Port/Alternate
+ * COM_RX | Rx USART Com Pin/Port/Alternate
+ * PINOUT_IRQHANDLER | Callback function for Pin IRQ handler
+
+ * ROBUS_COM_CLOCK_ENABLE | Enable clock for USART
+ * ROBUS_COM | USART number
+ * ROBUS_COM_IRQ | USART IRQ number
+ * ROBUS_COM_IRQHANDLER | Callback function for USART IRQ handler
+
+ * ROBUS_DMA_CLOCK_ENABLE | Enable clock for DMA
+ * ROBUS_DMA | DMA number
+ * ROBUS_DMA_CHANNEL | DMA channel (depending on MCU DMA may need special config)
+
+ * ROBUS_TIMER_CLOCK_ENABLE | Enable clock for Timer
+ * ROBUS_TIMER | Timer number
+ * ROBUS_TIMER_IRQ | Timer IRQ number
+ * ROBUS_TIMER_IRQHANDLER | Callback function for Timer IRQ handler
+******************************************************************************/
+
+/*******************************************************************************
+ * FLASH CONFIGURATION FOR APP WITH BOOTLOADER
+ ********************************************************************************
+ * Define | Default Value | Description
+ * :---------------------|------------------------------------------------------
+ * BOOT_START_ADDRESS | FLASH_BASE = 0x8000000 | Start address of Bootloader in flash
+ * SHARED_MEMORY_ADDRESS | 0x0800C000 | Start address of shared memory to save boot flag
+ * APP_START_ADDRESS | 0x0800C800 | Start address of application with bootloader
+ * APP_END_ADDRESS | FLASH_END | End address of application with bootloader
+ ******************************************************************************/
+
+/*******************************************************************************
+ * GATE SERIAL COM DEFINITION
+ *******************************************************************************
+ * Define | Default Value | Description
+ * :-------------------------|------------------------------------------------------
+ * MAX_NODE_NUMBER | 20 | Node number in the device
+ * MAX_SERVICE_NUMBER | 20 | Service number in the device
+ * GATE_BUFF_SIZE | 1024 | Json receive buffer size
+ * PIPE_TX_BUFFER_SIZE | 1024 | Receive pipe buffer size
+ * PIPE_RX_BUFFER_SIZE | 2048 | Transmit pipe buffer size
+ ******************************************************************************/
+
+#define GATE_BUFF_SIZE 1024
+#define PIPE_TX_BUFFER_SIZE 1024
+#define PIPE_RX_BUFFER_SIZE 2048
+
+/*******************************************************************************
+ * OTHER GATE PARAMETERS
+ *******************************************************************************
+ * Define | Default Value | Description
+ * :--------------|------------------------------------------------------
+ * INIT_TIME | 150 | Wait init time before first detection
+ * ******************************************************************************/
+
+/*******************************************************************************
+ * OTHER PIPE PARAMETERS
+ *******************************************************************************
+ * Define | Default Value | Description
+ * :--------------------|----------------------------------------------------
+ * PIPE_CONFIG | none | To Modify pipe config
+ * ******************************************************************************/
+
+#endif /* _NODE_CONFIG_H_ */
diff --git a/examples/projects/NUCLEO-L476RG/gate_serialcom/platformio.ini b/examples/projects/NUCLEO-L476RG/gate_serialcom/platformio.ini
new file mode 100644
index 000000000..59c646daa
--- /dev/null
+++ b/examples/projects/NUCLEO-L476RG/gate_serialcom/platformio.ini
@@ -0,0 +1,41 @@
+; PlatformIO Project Configuration File
+;
+; Build options: build flags, source filter
+; Upload options: custom upload port, speed and extra flags
+; Library options: dependencies, extra library storages
+; Advanced options: extra scripting
+;
+; Please visit documentation for the other options and examples
+; https://docs.platformio.org/page/projectconf.html
+[platformio]
+default_envs = nucleo_l476rg
+
+[env]
+lib_ldf_mode =off
+lib_extra_dirs =
+ $PROJECT_DIR/../../../../tool_services/
+ $PROJECT_DIR/../../../../../
+ $PROJECT_DIR/../../../../network/
+platform = ststm32
+board = nucleo_l476rg
+framework = stm32cube
+lib_deps =
+ luos_engine@^3.1.0
+ robus_network
+ Gate
+ Pipe
+debug_tool = stlink
+upload_protocol = stlink
+
+[env:nucleo_l476rg]
+build_unflags = -Os
+build_flags =
+ -O1
+ -include node_config.h
+ -DUSE_HAL_DRIVER
+ -DUSE_FULL_LL_DRIVER
+ -DLUOSHAL=STM32L4
+ -D GATEFORMAT=TinyJSON
+ -D PIPEMODE=SERIAL
+ -D PIPEHAL=NUCLEO-L476
+
diff --git a/examples/projects/NUCLEO-L476RG/gate_serialcom/src/gpio.c b/examples/projects/NUCLEO-L476RG/gate_serialcom/src/gpio.c
new file mode 100644
index 000000000..0249ee815
--- /dev/null
+++ b/examples/projects/NUCLEO-L476RG/gate_serialcom/src/gpio.c
@@ -0,0 +1,66 @@
+/**
+ ******************************************************************************
+ * @file gpio.c
+ * @brief This file provides code for the configuration
+ * of all used GPIO pins.
+ ******************************************************************************
+ * @attention
+ *
+ * © Copyright (c) 2021 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software component is licensed by ST under BSD 3-Clause license,
+ * the "License"; You may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at:
+ * opensource.org/licenses/BSD-3-Clause
+ *
+ ******************************************************************************
+ */
+
+/* Includes ------------------------------------------------------------------*/
+#include "gpio.h"
+
+/* USER CODE BEGIN 0 */
+
+/* USER CODE END 0 */
+
+/*----------------------------------------------------------------------------*/
+/* Configure GPIO */
+/*----------------------------------------------------------------------------*/
+/* USER CODE BEGIN 1 */
+
+/* USER CODE END 1 */
+
+/** Configure pins
+*/
+void MX_GPIO_Init(void)
+{
+
+ GPIO_InitTypeDef GPIO_InitStruct = {0};
+
+ /* GPIO Ports Clock Enable */
+ __HAL_RCC_GPIOA_CLK_ENABLE();
+ __HAL_RCC_GPIOB_CLK_ENABLE();
+
+ /*Configure GPIO pin Output Level */
+ HAL_GPIO_WritePin(LED_GPIO_Port, LED_Pin, GPIO_PIN_RESET);
+
+ /*Configure GPIO pin : PtPin */
+ GPIO_InitStruct.Pin = BTN_Pin;
+ GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
+ GPIO_InitStruct.Pull = GPIO_NOPULL;
+ HAL_GPIO_Init(BTN_GPIO_Port, &GPIO_InitStruct);
+
+ /*Configure GPIO pin : PtPin */
+ GPIO_InitStruct.Pin = LED_Pin;
+ GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
+ GPIO_InitStruct.Pull = GPIO_PULLDOWN;
+ GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
+ HAL_GPIO_Init(LED_GPIO_Port, &GPIO_InitStruct);
+}
+
+/* USER CODE BEGIN 2 */
+
+/* USER CODE END 2 */
+
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/examples/projects/NUCLEO-L476RG/gate_serialcom/src/main.c b/examples/projects/NUCLEO-L476RG/gate_serialcom/src/main.c
new file mode 100644
index 000000000..2bc10acef
--- /dev/null
+++ b/examples/projects/NUCLEO-L476RG/gate_serialcom/src/main.c
@@ -0,0 +1,195 @@
+/* USER CODE BEGIN Header */
+/**
+ ******************************************************************************
+ * @file : main.c
+ * @brief : Main program body
+ ******************************************************************************
+ * @attention
+ *
+ * © Copyright (c) 2021 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software component is licensed by ST under BSD 3-Clause license,
+ * the "License"; You may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at:
+ * opensource.org/licenses/BSD-3-Clause
+ *
+ ******************************************************************************
+ */
+/* USER CODE END Header */
+/* Includes ------------------------------------------------------------------*/
+#include "main.h"
+#include "gpio.h"
+
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+#include "luos_engine.h"
+#include "robus_network.h"
+#include "gate.h"
+#include "pipe.h"
+/* USER CODE END Includes */
+
+/* Private typedef -----------------------------------------------------------*/
+/* USER CODE BEGIN PTD */
+/* USER CODE END PTD */
+
+/* Private define ------------------------------------------------------------*/
+/* USER CODE BEGIN PD */
+/* USER CODE END PD */
+
+/* Private macro -------------------------------------------------------------*/
+/* USER CODE BEGIN PM */
+
+/* USER CODE END PM */
+
+/* Private variables ---------------------------------------------------------*/
+
+/* USER CODE BEGIN PV */
+
+/* USER CODE END PV */
+
+/* Private function prototypes -----------------------------------------------*/
+void SystemClock_Config(void);
+/* USER CODE BEGIN PFP */
+
+/* USER CODE END PFP */
+
+/* Private user code ---------------------------------------------------------*/
+/* USER CODE BEGIN 0 */
+
+/* USER CODE END 0 */
+
+/**
+ * @brief The application entry point.
+ * @retval int
+ */
+int main(void)
+{
+ /* USER CODE BEGIN 1 */
+
+ /* USER CODE END 1 */
+
+ /* MCU Configuration--------------------------------------------------------*/
+
+ /* Reset of all peripherals, Initializes the Flash interface and the Systick. */
+ HAL_Init();
+
+ /* USER CODE BEGIN Init */
+
+ /* USER CODE END Init */
+
+ /* Configure the system clock */
+ SystemClock_Config();
+
+ /* USER CODE BEGIN SysInit */
+
+ /* USER CODE END SysInit */
+
+ /* Initialize all configured peripherals */
+ MX_GPIO_Init();
+ /* USER CODE BEGIN 2 */
+ Luos_Init();
+ Robus_Init();
+ Gate_Init();
+ Pipe_Init();
+ /* USER CODE END 2 */
+
+ /* Infinite loop */
+ /* USER CODE BEGIN WHILE */
+ while (1)
+ {
+ /* USER CODE END WHILE */
+
+ /* USER CODE BEGIN 3 */
+ Luos_Loop();
+ Gate_Loop();
+ Pipe_Loop();
+ }
+ /* USER CODE END 3 */
+}
+
+/**
+ * @brief System Clock Configuration
+ * @retval None
+ */
+void SystemClock_Config(void)
+{
+ RCC_OscInitTypeDef RCC_OscInitStruct = {0};
+ RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
+
+ /** Initializes the RCC Oscillators according to the specified parameters
+ * in the RCC_OscInitTypeDef structure.
+ */
+ RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_MSI;
+ RCC_OscInitStruct.MSIState = RCC_MSI_ON;
+ RCC_OscInitStruct.MSICalibrationValue = 0;
+ RCC_OscInitStruct.MSIClockRange = RCC_MSIRANGE_6;
+ RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
+ RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_MSI;
+ RCC_OscInitStruct.PLL.PLLM = 1;
+ RCC_OscInitStruct.PLL.PLLN = 40;
+ RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV7;
+ RCC_OscInitStruct.PLL.PLLQ = RCC_PLLQ_DIV2;
+ RCC_OscInitStruct.PLL.PLLR = RCC_PLLR_DIV2;
+ if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
+ {
+ Error_Handler();
+ }
+ /** Initializes the CPU, AHB and APB buses clocks
+ */
+ RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_SYSCLK
+ | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2;
+ RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
+ RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
+ RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1;
+ RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
+
+ if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_4) != HAL_OK)
+ {
+ Error_Handler();
+ }
+ /** Configure the main internal regulator output voltage
+ */
+ if (HAL_PWREx_ControlVoltageScaling(PWR_REGULATOR_VOLTAGE_SCALE1) != HAL_OK)
+ {
+ Error_Handler();
+ }
+}
+
+/* USER CODE BEGIN 4 */
+
+/* USER CODE END 4 */
+
+/**
+ * @brief This function is executed in case of error occurrence.
+ * @retval None
+ */
+void Error_Handler(void)
+{
+ /* USER CODE BEGIN Error_Handler_Debug */
+ /* User can add his own implementation to report the HAL error return state */
+ __disable_irq();
+ while (1)
+ {
+ }
+ /* USER CODE END Error_Handler_Debug */
+}
+
+#ifdef USE_FULL_ASSERT
+/**
+ * @brief Reports the name of the source file and the source line number
+ * where the assert_param error has occurred.
+ * @param file: pointer to the source file name
+ * @param line: assert_param error line source number
+ * @retval None
+ */
+void assert_failed(uint8_t *file, uint32_t line)
+{
+ /* USER CODE BEGIN 6 */
+ /* User can add his own implementation to report the file name and line number,
+ ex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */
+ /* USER CODE END 6 */
+}
+#endif /* USE_FULL_ASSERT */
+
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/examples/projects/NUCLEO-L476RG/gate_serialcom/src/stm32l4xx_hal_msp.c b/examples/projects/NUCLEO-L476RG/gate_serialcom/src/stm32l4xx_hal_msp.c
new file mode 100644
index 000000000..1caf088bc
--- /dev/null
+++ b/examples/projects/NUCLEO-L476RG/gate_serialcom/src/stm32l4xx_hal_msp.c
@@ -0,0 +1,84 @@
+/* USER CODE BEGIN Header */
+/**
+ ******************************************************************************
+ * @file stm32l4xx_hal_msp.c
+ * @brief This file provides code for the MSP Initialization
+ * and de-Initialization codes.
+ ******************************************************************************
+ * @attention
+ *
+ * © Copyright (c) 2021 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software component is licensed by ST under BSD 3-Clause license,
+ * the "License"; You may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at:
+ * opensource.org/licenses/BSD-3-Clause
+ *
+ ******************************************************************************
+ */
+/* USER CODE END Header */
+
+/* Includes ------------------------------------------------------------------*/
+#include "main.h"
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+
+/* Private typedef -----------------------------------------------------------*/
+/* USER CODE BEGIN TD */
+
+/* USER CODE END TD */
+
+/* Private define ------------------------------------------------------------*/
+/* USER CODE BEGIN Define */
+
+/* USER CODE END Define */
+
+/* Private macro -------------------------------------------------------------*/
+/* USER CODE BEGIN Macro */
+
+/* USER CODE END Macro */
+
+/* Private variables ---------------------------------------------------------*/
+/* USER CODE BEGIN PV */
+
+/* USER CODE END PV */
+
+/* Private function prototypes -----------------------------------------------*/
+/* USER CODE BEGIN PFP */
+
+/* USER CODE END PFP */
+
+/* External functions --------------------------------------------------------*/
+/* USER CODE BEGIN ExternalFunctions */
+
+/* USER CODE END ExternalFunctions */
+
+/* USER CODE BEGIN 0 */
+
+/* USER CODE END 0 */
+/**
+ * Initializes the Global MSP.
+ */
+void HAL_MspInit(void)
+{
+ /* USER CODE BEGIN MspInit 0 */
+
+ /* USER CODE END MspInit 0 */
+
+ __HAL_RCC_SYSCFG_CLK_ENABLE();
+ __HAL_RCC_PWR_CLK_ENABLE();
+
+ /* System interrupt init*/
+
+ /* USER CODE BEGIN MspInit 1 */
+
+ /* USER CODE END MspInit 1 */
+}
+
+/* USER CODE BEGIN 1 */
+
+/* USER CODE END 1 */
+
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/examples/projects/NUCLEO-L476RG/gate_serialcom/src/stm32l4xx_it.c b/examples/projects/NUCLEO-L476RG/gate_serialcom/src/stm32l4xx_it.c
new file mode 100644
index 000000000..b297fd090
--- /dev/null
+++ b/examples/projects/NUCLEO-L476RG/gate_serialcom/src/stm32l4xx_it.c
@@ -0,0 +1,213 @@
+/* USER CODE BEGIN Header */
+/**
+ ******************************************************************************
+ * @file stm32l4xx_it.c
+ * @brief Interrupt Service Routines.
+ ******************************************************************************
+ * @attention
+ *
+ * © Copyright (c) 2021 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software component is licensed by ST under BSD 3-Clause license,
+ * the "License"; You may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at:
+ * opensource.org/licenses/BSD-3-Clause
+ *
+ ******************************************************************************
+ */
+/* USER CODE END Header */
+
+/* Includes ------------------------------------------------------------------*/
+#include "main.h"
+#include "stm32l4xx_it.h"
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+/* USER CODE END Includes */
+
+/* Private typedef -----------------------------------------------------------*/
+/* USER CODE BEGIN TD */
+
+/* USER CODE END TD */
+
+/* Private define ------------------------------------------------------------*/
+/* USER CODE BEGIN PD */
+
+/* USER CODE END PD */
+
+/* Private macro -------------------------------------------------------------*/
+/* USER CODE BEGIN PM */
+
+/* USER CODE END PM */
+
+/* Private variables ---------------------------------------------------------*/
+/* USER CODE BEGIN PV */
+
+/* USER CODE END PV */
+
+/* Private function prototypes -----------------------------------------------*/
+/* USER CODE BEGIN PFP */
+
+/* USER CODE END PFP */
+
+/* Private user code ---------------------------------------------------------*/
+/* USER CODE BEGIN 0 */
+
+/* USER CODE END 0 */
+
+/* External variables --------------------------------------------------------*/
+
+/* USER CODE BEGIN EV */
+
+/* USER CODE END EV */
+
+/******************************************************************************/
+/* Cortex-M4 Processor Interruption and Exception Handlers */
+/******************************************************************************/
+/**
+ * @brief This function handles Non maskable interrupt.
+ */
+void NMI_Handler(void)
+{
+ /* USER CODE BEGIN NonMaskableInt_IRQn 0 */
+
+ /* USER CODE END NonMaskableInt_IRQn 0 */
+ /* USER CODE BEGIN NonMaskableInt_IRQn 1 */
+ while (1)
+ {
+ }
+ /* USER CODE END NonMaskableInt_IRQn 1 */
+}
+
+/**
+ * @brief This function handles Hard fault interrupt.
+ */
+void HardFault_Handler(void)
+{
+ /* USER CODE BEGIN HardFault_IRQn 0 */
+
+ /* USER CODE END HardFault_IRQn 0 */
+ while (1)
+ {
+ /* USER CODE BEGIN W1_HardFault_IRQn 0 */
+ /* USER CODE END W1_HardFault_IRQn 0 */
+ }
+}
+
+/**
+ * @brief This function handles Memory management fault.
+ */
+void MemManage_Handler(void)
+{
+ /* USER CODE BEGIN MemoryManagement_IRQn 0 */
+
+ /* USER CODE END MemoryManagement_IRQn 0 */
+ while (1)
+ {
+ /* USER CODE BEGIN W1_MemoryManagement_IRQn 0 */
+ /* USER CODE END W1_MemoryManagement_IRQn 0 */
+ }
+}
+
+/**
+ * @brief This function handles Prefetch fault, memory access fault.
+ */
+void BusFault_Handler(void)
+{
+ /* USER CODE BEGIN BusFault_IRQn 0 */
+
+ /* USER CODE END BusFault_IRQn 0 */
+ while (1)
+ {
+ /* USER CODE BEGIN W1_BusFault_IRQn 0 */
+ /* USER CODE END W1_BusFault_IRQn 0 */
+ }
+}
+
+/**
+ * @brief This function handles Undefined instruction or illegal state.
+ */
+void UsageFault_Handler(void)
+{
+ /* USER CODE BEGIN UsageFault_IRQn 0 */
+
+ /* USER CODE END UsageFault_IRQn 0 */
+ while (1)
+ {
+ /* USER CODE BEGIN W1_UsageFault_IRQn 0 */
+ /* USER CODE END W1_UsageFault_IRQn 0 */
+ }
+}
+
+/**
+ * @brief This function handles System service call via SWI instruction.
+ */
+void SVC_Handler(void)
+{
+ /* USER CODE BEGIN SVCall_IRQn 0 */
+
+ /* USER CODE END SVCall_IRQn 0 */
+ /* USER CODE BEGIN SVCall_IRQn 1 */
+
+ /* USER CODE END SVCall_IRQn 1 */
+}
+
+/**
+ * @brief This function handles Debug monitor.
+ */
+void DebugMon_Handler(void)
+{
+ /* USER CODE BEGIN DebugMonitor_IRQn 0 */
+
+ /* USER CODE END DebugMonitor_IRQn 0 */
+ /* USER CODE BEGIN DebugMonitor_IRQn 1 */
+
+ /* USER CODE END DebugMonitor_IRQn 1 */
+}
+
+/**
+ * @brief This function handles Pendable request for system service.
+ */
+void PendSV_Handler(void)
+{
+ /* USER CODE BEGIN PendSV_IRQn 0 */
+
+ /* USER CODE END PendSV_IRQn 0 */
+ /* USER CODE BEGIN PendSV_IRQn 1 */
+
+ /* USER CODE END PendSV_IRQn 1 */
+}
+
+/**
+ * @brief This function handles System tick timer.
+ */
+void SysTick_Handler(void)
+{
+ /* USER CODE BEGIN SysTick_IRQn 0 */
+
+ /* USER CODE END SysTick_IRQn 0 */
+ HAL_IncTick();
+ /* USER CODE BEGIN SysTick_IRQn 1 */
+
+ /* USER CODE END SysTick_IRQn 1 */
+}
+
+/******************************************************************************/
+/* STM32L4xx Peripheral Interrupt Handlers */
+/* Add here the Interrupt Handlers for the used peripherals. */
+/* For the available peripheral interrupt handler names, */
+/* please refer to the startup file (startup_stm32l4xx.s). */
+/******************************************************************************/
+
+/* USER CODE BEGIN 1 */
+void EXTI9_5_IRQHandler(void)
+{
+ HAL_GPIO_EXTI_IRQHandler(GPIO_PIN_5);
+}
+
+void EXTI4_IRQHandler(void)
+{
+ HAL_GPIO_EXTI_IRQHandler(GPIO_PIN_4);
+}
+/* USER CODE END 1 */
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/examples/projects/NUCLEO-L476RG/gate_serialcom/src/system_stm32l4xx.c b/examples/projects/NUCLEO-L476RG/gate_serialcom/src/system_stm32l4xx.c
new file mode 100644
index 000000000..3682d36f6
--- /dev/null
+++ b/examples/projects/NUCLEO-L476RG/gate_serialcom/src/system_stm32l4xx.c
@@ -0,0 +1,336 @@
+/**
+ ******************************************************************************
+ * @file system_stm32l4xx.c
+ * @author MCD Application Team
+ * @brief CMSIS Cortex-M4 Device Peripheral Access Layer System Source File
+ *
+ * This file provides two functions and one global variable to be called from
+ * user application:
+ * - SystemInit(): This function is called at startup just after reset and
+ * before branch to main program. This call is made inside
+ * the "startup_stm32l4xx.s" file.
+ *
+ * - SystemCoreClock variable: Contains the core clock (HCLK), it can be used
+ * by the user application to setup the SysTick
+ * timer or configure other parameters.
+ *
+ * - SystemCoreClockUpdate(): Updates the variable SystemCoreClock and must
+ * be called whenever the core clock is changed
+ * during program execution.
+ *
+ * After each device reset the MSI (4 MHz) is used as system clock source.
+ * Then SystemInit() function is called, in "startup_stm32l4xx.s" file, to
+ * configure the system clock before to branch to main program.
+ *
+ * This file configures the system clock as follows:
+ *=============================================================================
+ *-----------------------------------------------------------------------------
+ * System Clock source | MSI
+ *-----------------------------------------------------------------------------
+ * SYSCLK(Hz) | 4000000
+ *-----------------------------------------------------------------------------
+ * HCLK(Hz) | 4000000
+ *-----------------------------------------------------------------------------
+ * AHB Prescaler | 1
+ *-----------------------------------------------------------------------------
+ * APB1 Prescaler | 1
+ *-----------------------------------------------------------------------------
+ * APB2 Prescaler | 1
+ *-----------------------------------------------------------------------------
+ * PLL_M | 1
+ *-----------------------------------------------------------------------------
+ * PLL_N | 8
+ *-----------------------------------------------------------------------------
+ * PLL_P | 7
+ *-----------------------------------------------------------------------------
+ * PLL_Q | 2
+ *-----------------------------------------------------------------------------
+ * PLL_R | 2
+ *-----------------------------------------------------------------------------
+ * PLLSAI1_P | NA
+ *-----------------------------------------------------------------------------
+ * PLLSAI1_Q | NA
+ *-----------------------------------------------------------------------------
+ * PLLSAI1_R | NA
+ *-----------------------------------------------------------------------------
+ * PLLSAI2_P | NA
+ *-----------------------------------------------------------------------------
+ * PLLSAI2_Q | NA
+ *-----------------------------------------------------------------------------
+ * PLLSAI2_R | NA
+ *-----------------------------------------------------------------------------
+ * Require 48MHz for USB OTG FS, | Disabled
+ * SDIO and RNG clock |
+ *-----------------------------------------------------------------------------
+ *=============================================================================
+ ******************************************************************************
+ * @attention
+ *
+ * © Copyright (c) 2017 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software component is licensed by ST under Apache License, Version 2.0,
+ * the "License"; You may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at:
+ * opensource.org/licenses/Apache-2.0
+ *
+ ******************************************************************************
+ */
+
+/** @addtogroup CMSIS
+ * @{
+ */
+
+/** @addtogroup stm32l4xx_system
+ * @{
+ */
+
+/** @addtogroup STM32L4xx_System_Private_Includes
+ * @{
+ */
+
+#include "stm32l4xx.h"
+
+#if !defined(HSE_VALUE)
+#define HSE_VALUE 8000000U /*!< Value of the External oscillator in Hz */
+#endif /* HSE_VALUE */
+
+#if !defined(MSI_VALUE)
+#define MSI_VALUE 4000000U /*!< Value of the Internal oscillator in Hz*/
+#endif /* MSI_VALUE */
+
+#if !defined(HSI_VALUE)
+#define HSI_VALUE 16000000U /*!< Value of the Internal oscillator in Hz*/
+#endif /* HSI_VALUE */
+
+/**
+ * @}
+ */
+
+/** @addtogroup STM32L4xx_System_Private_TypesDefinitions
+ * @{
+ */
+
+/**
+ * @}
+ */
+
+/** @addtogroup STM32L4xx_System_Private_Defines
+ * @{
+ */
+
+/************************* Miscellaneous Configuration ************************/
+/*!< Uncomment the following line if you need to relocate your vector Table in
+ Internal SRAM. */
+/* #define VECT_TAB_SRAM */
+#define VECT_TAB_OFFSET 0x00 /*!< Vector Table base offset field. \
+ This value must be a multiple of 0x200. */
+/******************************************************************************/
+/**
+ * @}
+ */
+
+/** @addtogroup STM32L4xx_System_Private_Macros
+ * @{
+ */
+
+/**
+ * @}
+ */
+
+/** @addtogroup STM32L4xx_System_Private_Variables
+ * @{
+ */
+/* The SystemCoreClock variable is updated in three ways:
+ 1) by calling CMSIS function SystemCoreClockUpdate()
+ 2) by calling HAL API function HAL_RCC_GetHCLKFreq()
+ 3) each time HAL_RCC_ClockConfig() is called to configure the system clock frequency
+ Note: If you use this function to configure the system clock; then there
+ is no need to call the 2 first functions listed above, since SystemCoreClock
+ variable is updated automatically.
+ */
+uint32_t SystemCoreClock = 4000000U;
+
+const uint8_t AHBPrescTable[16] = {0U, 0U, 0U, 0U, 0U, 0U, 0U, 0U, 1U, 2U, 3U, 4U, 6U, 7U, 8U, 9U};
+const uint8_t APBPrescTable[8] = {0U, 0U, 0U, 0U, 1U, 2U, 3U, 4U};
+const uint32_t MSIRangeTable[12] = {100000U, 200000U, 400000U, 800000U, 1000000U, 2000000U,
+ 4000000U, 8000000U, 16000000U, 24000000U, 32000000U, 48000000U};
+/**
+ * @}
+ */
+
+/** @addtogroup STM32L4xx_System_Private_FunctionPrototypes
+ * @{
+ */
+
+/**
+ * @}
+ */
+
+/** @addtogroup STM32L4xx_System_Private_Functions
+ * @{
+ */
+
+/**
+ * @brief Setup the microcontroller system.
+ * @param None
+ * @retval None
+ */
+
+void SystemInit(void)
+{
+/* FPU settings ------------------------------------------------------------*/
+#if (__FPU_PRESENT == 1) && (__FPU_USED == 1)
+ SCB->CPACR |= ((3UL << 10 * 2) | (3UL << 11 * 2)); /* set CP10 and CP11 Full Access */
+#endif
+
+ /* Reset the RCC clock configuration to the default reset state ------------*/
+ /* Set MSION bit */
+ RCC->CR |= RCC_CR_MSION;
+
+ /* Reset CFGR register */
+ RCC->CFGR = 0x00000000U;
+
+ /* Reset HSEON, CSSON , HSION, and PLLON bits */
+ RCC->CR &= 0xEAF6FFFFU;
+
+ /* Reset PLLCFGR register */
+ RCC->PLLCFGR = 0x00001000U;
+
+ /* Reset HSEBYP bit */
+ RCC->CR &= 0xFFFBFFFFU;
+
+ /* Disable all interrupts */
+ RCC->CIER = 0x00000000U;
+
+ /* Configure the Vector Table location add offset address ------------------*/
+#ifdef VECT_TAB_SRAM
+ SCB->VTOR = SRAM_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM */
+#else
+ SCB->VTOR = FLASH_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal FLASH */
+#endif
+}
+
+/**
+ * @brief Update SystemCoreClock variable according to Clock Register Values.
+ * The SystemCoreClock variable contains the core clock (HCLK), it can
+ * be used by the user application to setup the SysTick timer or configure
+ * other parameters.
+ *
+ * @note Each time the core clock (HCLK) changes, this function must be called
+ * to update SystemCoreClock variable value. Otherwise, any configuration
+ * based on this variable will be incorrect.
+ *
+ * @note - The system frequency computed by this function is not the real
+ * frequency in the chip. It is calculated based on the predefined
+ * constant and the selected clock source:
+ *
+ * - If SYSCLK source is MSI, SystemCoreClock will contain the MSI_VALUE(*)
+ *
+ * - If SYSCLK source is HSI, SystemCoreClock will contain the HSI_VALUE(**)
+ *
+ * - If SYSCLK source is HSE, SystemCoreClock will contain the HSE_VALUE(***)
+ *
+ * - If SYSCLK source is PLL, SystemCoreClock will contain the HSE_VALUE(***)
+ * or HSI_VALUE(*) or MSI_VALUE(*) multiplied/divided by the PLL factors.
+ *
+ * (*) MSI_VALUE is a constant defined in stm32l4xx_hal.h file (default value
+ * 4 MHz) but the real value may vary depending on the variations
+ * in voltage and temperature.
+ *
+ * (**) HSI_VALUE is a constant defined in stm32l4xx_hal.h file (default value
+ * 16 MHz) but the real value may vary depending on the variations
+ * in voltage and temperature.
+ *
+ * (***) HSE_VALUE is a constant defined in stm32l4xx_hal.h file (default value
+ * 8 MHz), user has to ensure that HSE_VALUE is same as the real
+ * frequency of the crystal used. Otherwise, this function may
+ * have wrong result.
+ *
+ * - The result of this function could be not correct when using fractional
+ * value for HSE crystal.
+ *
+ * @param None
+ * @retval None
+ */
+void SystemCoreClockUpdate(void)
+{
+ uint32_t tmp = 0U, msirange = 0U, pllvco = 0U, pllr = 2U, pllsource = 0U, pllm = 2U;
+
+ /* Get MSI Range frequency--------------------------------------------------*/
+ if ((RCC->CR & RCC_CR_MSIRGSEL) == RESET)
+ { /* MSISRANGE from RCC_CSR applies */
+ msirange = (RCC->CSR & RCC_CSR_MSISRANGE) >> 8U;
+ }
+ else
+ { /* MSIRANGE from RCC_CR applies */
+ msirange = (RCC->CR & RCC_CR_MSIRANGE) >> 4U;
+ }
+ /*MSI frequency range in HZ*/
+ msirange = MSIRangeTable[msirange];
+
+ /* Get SYSCLK source -------------------------------------------------------*/
+ switch (RCC->CFGR & RCC_CFGR_SWS)
+ {
+ case 0x00: /* MSI used as system clock source */
+ SystemCoreClock = msirange;
+ break;
+
+ case 0x04: /* HSI used as system clock source */
+ SystemCoreClock = HSI_VALUE;
+ break;
+
+ case 0x08: /* HSE used as system clock source */
+ SystemCoreClock = HSE_VALUE;
+ break;
+
+ case 0x0C: /* PLL used as system clock source */
+ /* PLL_VCO = (HSE_VALUE or HSI_VALUE or MSI_VALUE/ PLLM) * PLLN
+ SYSCLK = PLL_VCO / PLLR
+ */
+ pllsource = (RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC);
+ pllm = ((RCC->PLLCFGR & RCC_PLLCFGR_PLLM) >> 4U) + 1U;
+
+ switch (pllsource)
+ {
+ case 0x02: /* HSI used as PLL clock source */
+ pllvco = (HSI_VALUE / pllm);
+ break;
+
+ case 0x03: /* HSE used as PLL clock source */
+ pllvco = (HSE_VALUE / pllm);
+ break;
+
+ default: /* MSI used as PLL clock source */
+ pllvco = (msirange / pllm);
+ break;
+ }
+ pllvco = pllvco * ((RCC->PLLCFGR & RCC_PLLCFGR_PLLN) >> 8U);
+ pllr = (((RCC->PLLCFGR & RCC_PLLCFGR_PLLR) >> 25U) + 1U) * 2U;
+ SystemCoreClock = pllvco / pllr;
+ break;
+
+ default:
+ SystemCoreClock = msirange;
+ break;
+ }
+ /* Compute HCLK clock frequency --------------------------------------------*/
+ /* Get HCLK prescaler */
+ tmp = AHBPrescTable[((RCC->CFGR & RCC_CFGR_HPRE) >> 4U)];
+ /* HCLK clock frequency */
+ SystemCoreClock >>= tmp;
+}
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/examples/projects/STM32L4S5_discovery/gate_serialcom/platformio.ini b/examples/projects/STM32L4S5_discovery/gate_serialcom/platformio.ini
index 74c4fa4bd..b488ff0b8 100644
--- a/examples/projects/STM32L4S5_discovery/gate_serialcom/platformio.ini
+++ b/examples/projects/STM32L4S5_discovery/gate_serialcom/platformio.ini
@@ -37,7 +37,7 @@ build_flags =
-DLUOSHAL=STM32L4
-D GATEFORMAT=TinyJSON
-D PIPEMODE=SERIAL
- -D PIPEHAL=NUCLEO-L4
+ -D PIPEHAL=NUCLEO-L432
[env:disco_l4s5i_iot01a_with_bootloader]
board_build.ldscript = linker/custom_Luos_bootloader_script.ld
@@ -51,7 +51,7 @@ build_flags =
-DLUOSHAL=STM32L4
-D GATEFORMAT=TinyJSON
-D PIPEMODE=SERIAL
- -D PIPEHAL=NUCLEO-L4
+ -D PIPEHAL=NUCLEO-L432
upload_protocol = custom
upload_flags =
-t2
diff --git a/network/serial_network/HAL/STM32L4/serial_hal_config.h b/network/serial_network/HAL/STM32L432/serial_hal_config.h
similarity index 100%
rename from network/serial_network/HAL/STM32L4/serial_hal_config.h
rename to network/serial_network/HAL/STM32L432/serial_hal_config.h
diff --git a/network/serial_network/HAL/STM32L4/serial_network_hal.c b/network/serial_network/HAL/STM32L432/serial_network_hal.c
similarity index 100%
rename from network/serial_network/HAL/STM32L4/serial_network_hal.c
rename to network/serial_network/HAL/STM32L432/serial_network_hal.c
diff --git a/network/serial_network/HAL/STM32L4/serial_network_hal.h b/network/serial_network/HAL/STM32L432/serial_network_hal.h
similarity index 100%
rename from network/serial_network/HAL/STM32L4/serial_network_hal.h
rename to network/serial_network/HAL/STM32L432/serial_network_hal.h
diff --git a/network/serial_network/HAL/STM32L476/serial_hal_config.h b/network/serial_network/HAL/STM32L476/serial_hal_config.h
new file mode 100644
index 000000000..32f8a0476
--- /dev/null
+++ b/network/serial_network/HAL/STM32L476/serial_hal_config.h
@@ -0,0 +1,96 @@
+/******************************************************************************
+ * @file serial_hal_config
+ * @brief This file allow you to configure serial_hal according to your design
+ * this is the default configuration created by Luos team for this MCU Family
+ * Do not modify this file.
+ * If you want to ovewrite some, overlap the defines in your node_config.h
+ * @MCU Family STM32L4
+ * @author Luos
+ * @version 0.0.0
+ ******************************************************************************/
+#ifndef _SERIAL_HAL_CONFIG_H_
+#define _SERIAL_HAL_CONFIG_H_
+
+// TX Pinout
+#ifndef SERIAL_TX_CLK
+ #define SERIAL_TX_CLK() __HAL_RCC_GPIOA_CLK_ENABLE();
+#endif
+#ifndef SERIAL_TX_PIN
+ #define SERIAL_TX_PIN GPIO_PIN_2
+#endif
+#ifndef SERIAL_TX_PORT
+ #define SERIAL_TX_PORT GPIOA
+#endif
+#ifndef SERIAL_TX_AF
+ #define SERIAL_TX_AF GPIO_AF7_USART2
+#endif
+
+// RX Pinout
+#ifndef SERIAL_RX_CLK
+ #define SERIAL_RX_CLK() __HAL_RCC_GPIOA_CLK_ENABLE();
+#endif
+#ifndef SERIAL_RX_PIN
+ #define SERIAL_RX_PIN GPIO_PIN_3
+#endif
+#ifndef SERIAL_RX_PORT
+ #define SERIAL_RX_PORT GPIOA
+#endif
+#ifndef SERIAL_RX_AF
+ #define SERIAL_RX_AF GPIO_AF7_USART2
+#endif
+
+// USART configuration
+#ifndef SERIAL_COM_CLOCK_ENABLE
+ #define SERIAL_COM_CLOCK_ENABLE() __HAL_RCC_USART2_CLK_ENABLE()
+#endif
+#ifndef SERIAL_COM
+ #define SERIAL_COM USART2
+#endif
+
+// RX DMA configuration
+#ifndef SERIAL_RX_DMA_CLOCK_ENABLE
+ #define SERIAL_RX_DMA_CLOCK_ENABLE() __HAL_RCC_DMA1_CLK_ENABLE()
+#endif
+#ifndef SERIAL_RX_DMA
+ #define SERIAL_RX_DMA DMA1
+#endif
+#ifndef SERIAL_RX_DMA_CHANNEL
+ #define SERIAL_RX_DMA_CHANNEL LL_DMA_CHANNEL_6
+#endif
+#ifndef SERIAL_RX_DMA_REQUEST
+ #define SERIAL_RX_DMA_REQUEST LL_DMA_REQUEST_2
+#endif
+#ifndef SERIAL_RX_DMA_TC
+ #define SERIAL_RX_DMA_TC(SERIAL_RX_DMA) LL_DMA_IsActiveFlag_TC6(SERIAL_RX_DMA)
+#endif
+#ifndef SERIAL_RX_DMA_CLEAR_TC
+ #define SERIAL_RX_DMA_CLEAR_TC(SERIAL_RX_DMA) LL_DMA_ClearFlag_TC6(SERIAL_RX_DMA)
+#endif
+
+// TX DMA configuration
+#ifndef SERIAL_TX_DMA_CLOCK_ENABLE
+ #define SERIAL_TX_DMA_CLOCK_ENABLE() __HAL_RCC_DMA1_CLK_ENABLE()
+#endif
+#ifndef SERIAL_TX_DMA
+ #define SERIAL_TX_DMA DMA1
+#endif
+#ifndef SERIAL_TX_DMA_CHANNEL
+ #define SERIAL_TX_DMA_CHANNEL LL_DMA_CHANNEL_7
+#endif
+#ifndef SERIAL_TX_DMA_REQUEST
+ #define SERIAL_TX_DMA_REQUEST LL_DMA_REQUEST_2
+#endif
+#ifndef SERIAL_TX_DMA_TC
+ #define SERIAL_TX_DMA_TC(SERIAL_TX_DMA) LL_DMA_IsActiveFlag_TC7(SERIAL_TX_DMA)
+#endif
+#ifndef SERIAL_TX_DMA_CLEAR_TC
+ #define SERIAL_TX_DMA_CLEAR_TC(SERIAL_TX_DMA) LL_DMA_ClearFlag_TC7(SERIAL_TX_DMA)
+#endif
+#ifndef SERIAL_TX_DMA_IRQ
+ #define SERIAL_TX_DMA_IRQ DMA1_Channel7_IRQn
+#endif
+#ifndef SERIAL_TX_DMA_IRQHANDLER
+ #define SERIAL_TX_DMA_IRQHANDLER() DMA1_Channel7_IRQHandler()
+#endif
+
+#endif /* _SERIAL_HAL_CONFIG_H_ */
diff --git a/network/serial_network/HAL/STM32L476/serial_network_hal.c b/network/serial_network/HAL/STM32L476/serial_network_hal.c
new file mode 100644
index 000000000..60ac5ac66
--- /dev/null
+++ b/network/serial_network/HAL/STM32L476/serial_network_hal.c
@@ -0,0 +1,196 @@
+/******************************************************************************
+ * @file serial_hal
+ * @brief serial communication hardware abstraction layer
+ * @author Luos
+ * @version 0.0.0
+ ******************************************************************************/
+
+#include "serial_network_hal.h"
+#include "_serial_network.h"
+#include "stm32l4xx_hal.h"
+#include "stm32l4xx_ll_usart.h"
+#include "stm32l4xx_ll_gpio.h"
+#include "stm32l4xx_ll_exti.h"
+#include "stm32l4xx_ll_dma.h"
+#include "stm32l4xx_ll_system.h"
+#include "stm32l4xx_hal.h"
+
+/*******************************************************************************
+ * Variables
+ ******************************************************************************/
+static uint32_t rx_buffer_size;
+volatile uint16_t RX_PrevPointerPosition = 0;
+
+/*******************************************************************************
+ * Function
+ ******************************************************************************/
+
+/******************************************************************************
+ * @brief Initialisation of the Serial communication
+ * @param None
+ * @return None
+ * ****************************************************************************/
+void SerialHAL_Init(uint8_t *rx_buffer, uint32_t buffer_size)
+{
+ rx_buffer_size = buffer_size;
+ RX_PrevPointerPosition = 0;
+
+ LL_USART_DeInit(SERIAL_COM);
+ ///////////////////////////////
+ // GPIO SERIAL Init
+ ///////////////////////////////
+ SERIAL_TX_CLK();
+ SERIAL_RX_CLK();
+
+ GPIO_InitTypeDef GPIO_InitStruct = {0};
+
+ // TX
+ GPIO_InitStruct.Pin = SERIAL_TX_PIN;
+ GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
+ GPIO_InitStruct.Pull = GPIO_PULLUP;
+ GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH;
+ GPIO_InitStruct.Alternate = SERIAL_TX_AF;
+ HAL_GPIO_Init(SERIAL_TX_PORT, &GPIO_InitStruct);
+ // RX
+ GPIO_InitStruct.Pin = SERIAL_RX_PIN;
+ GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
+ GPIO_InitStruct.Pull = GPIO_PULLUP;
+ GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH;
+ GPIO_InitStruct.Alternate = SERIAL_RX_AF;
+ HAL_GPIO_Init(SERIAL_RX_PORT, &GPIO_InitStruct);
+
+ ///////////////////////////////
+ // USART SERIAL Init
+ ///////////////////////////////
+ SERIAL_COM_CLOCK_ENABLE();
+
+ LL_USART_InitTypeDef USART_InitStruct;
+ // Initialise USART3
+ LL_USART_Disable(SERIAL_COM);
+ USART_InitStruct.BaudRate = SERIAL_NETWORK_BAUDRATE;
+ USART_InitStruct.DataWidth = LL_USART_DATAWIDTH_8B;
+ USART_InitStruct.StopBits = LL_USART_STOPBITS_1;
+ USART_InitStruct.Parity = LL_USART_PARITY_NONE;
+ USART_InitStruct.TransferDirection = LL_USART_DIRECTION_TX_RX;
+ USART_InitStruct.HardwareFlowControl = LL_USART_HWCONTROL_NONE;
+ USART_InitStruct.OverSampling = LL_USART_OVERSAMPLING_16;
+ while (LL_USART_Init(SERIAL_COM, &USART_InitStruct) != SUCCESS)
+ ;
+ LL_USART_Enable(SERIAL_COM);
+
+ RX_PrevPointerPosition = 0;
+
+ ///////////////////////////////
+ // DMA SERIAL Init
+ ///////////////////////////////
+ LL_DMA_DeInit(SERIAL_RX_DMA, SERIAL_RX_DMA_CHANNEL);
+ LL_DMA_DeInit(SERIAL_TX_DMA, SERIAL_TX_DMA_CHANNEL);
+
+ SERIAL_RX_DMA_CLOCK_ENABLE();
+ SERIAL_TX_DMA_CLOCK_ENABLE();
+
+ // RX DMA
+ LL_DMA_DisableChannel(SERIAL_RX_DMA, SERIAL_RX_DMA_CHANNEL);
+ LL_DMA_SetDataTransferDirection(SERIAL_RX_DMA, SERIAL_RX_DMA_CHANNEL, LL_DMA_DIRECTION_PERIPH_TO_MEMORY);
+ LL_DMA_SetChannelPriorityLevel(SERIAL_RX_DMA, SERIAL_RX_DMA_CHANNEL, LL_DMA_PRIORITY_LOW);
+ LL_DMA_SetMode(SERIAL_RX_DMA, SERIAL_RX_DMA_CHANNEL, LL_DMA_MODE_CIRCULAR);
+ LL_DMA_SetPeriphIncMode(SERIAL_RX_DMA, SERIAL_RX_DMA_CHANNEL, LL_DMA_PERIPH_NOINCREMENT);
+ LL_DMA_SetMemoryIncMode(SERIAL_RX_DMA, SERIAL_RX_DMA_CHANNEL, LL_DMA_MEMORY_INCREMENT);
+ LL_DMA_SetPeriphSize(SERIAL_RX_DMA, SERIAL_RX_DMA_CHANNEL, LL_DMA_PDATAALIGN_BYTE);
+ LL_DMA_SetMemorySize(SERIAL_RX_DMA, SERIAL_RX_DMA_CHANNEL, LL_DMA_MDATAALIGN_BYTE);
+ LL_DMA_SetPeriphRequest(SERIAL_RX_DMA, SERIAL_RX_DMA_CHANNEL, SERIAL_RX_DMA_REQUEST);
+
+ // Prepare buffer
+ LL_DMA_SetPeriphAddress(SERIAL_RX_DMA, SERIAL_RX_DMA_CHANNEL, (uint32_t)&SERIAL_COM->RDR);
+ LL_DMA_SetDataLength(SERIAL_RX_DMA, SERIAL_RX_DMA_CHANNEL, buffer_size);
+ LL_DMA_SetMemoryAddress(SERIAL_RX_DMA, SERIAL_RX_DMA_CHANNEL, (uint32_t)rx_buffer);
+ LL_USART_EnableDMAReq_RX(SERIAL_COM);
+ LL_DMA_EnableChannel(SERIAL_RX_DMA, SERIAL_RX_DMA_CHANNEL);
+
+ // TX DMA
+ LL_DMA_SetDataTransferDirection(SERIAL_TX_DMA, SERIAL_TX_DMA_CHANNEL, LL_DMA_DIRECTION_MEMORY_TO_PERIPH);
+ LL_DMA_SetChannelPriorityLevel(SERIAL_TX_DMA, SERIAL_TX_DMA_CHANNEL, LL_DMA_PRIORITY_LOW);
+ LL_DMA_SetMode(SERIAL_TX_DMA, SERIAL_TX_DMA_CHANNEL, LL_DMA_MODE_NORMAL);
+ LL_DMA_SetPeriphIncMode(SERIAL_TX_DMA, SERIAL_TX_DMA_CHANNEL, LL_DMA_PERIPH_NOINCREMENT);
+ LL_DMA_SetMemoryIncMode(SERIAL_TX_DMA, SERIAL_TX_DMA_CHANNEL, LL_DMA_MEMORY_INCREMENT);
+ LL_DMA_SetPeriphSize(SERIAL_TX_DMA, SERIAL_TX_DMA_CHANNEL, LL_DMA_PDATAALIGN_BYTE);
+ LL_DMA_SetMemorySize(SERIAL_TX_DMA, SERIAL_TX_DMA_CHANNEL, LL_DMA_MDATAALIGN_BYTE);
+ LL_DMA_SetPeriphRequest(SERIAL_TX_DMA, SERIAL_TX_DMA_CHANNEL, SERIAL_TX_DMA_REQUEST);
+
+ // Prepare buffer
+ LL_DMA_SetPeriphAddress(SERIAL_TX_DMA, SERIAL_TX_DMA_CHANNEL, (uint32_t)&SERIAL_COM->TDR);
+ LL_USART_EnableDMAReq_TX(SERIAL_COM);
+ HAL_NVIC_EnableIRQ(SERIAL_TX_DMA_IRQ);
+ HAL_NVIC_SetPriority(SERIAL_TX_DMA_IRQ, 1, 1);
+
+ LL_DMA_EnableIT_TC(SERIAL_TX_DMA, SERIAL_TX_DMA_CHANNEL);
+}
+
+/******************************************************************************
+ * @brief Loop of the Serial communication
+ * @param None
+ * @return None
+ ******************************************************************************/
+void SerialHAL_Loop(void)
+{
+ uint16_t size = 0;
+ uint16_t RX_PointerPosition = 0;
+
+ RX_PointerPosition = rx_buffer_size - LL_DMA_GetDataLength(SERIAL_RX_DMA, SERIAL_RX_DMA_CHANNEL);
+ if (RX_PointerPosition != RX_PrevPointerPosition)
+ {
+ if (SERIAL_RX_DMA_TC(SERIAL_RX_DMA) != RESET) // DMA buffer overflow
+ {
+ // Recompute the RX_PointerPosition to be sure to get the DMA buffer after the overflow.
+ // If the RX_PointerPosition was taken just before the overflow we may compute this with a wrong value.
+ RX_PointerPosition = rx_buffer_size - LL_DMA_GetDataLength(SERIAL_RX_DMA, SERIAL_RX_DMA_CHANNEL);
+ SERIAL_RX_DMA_CLEAR_TC(SERIAL_RX_DMA);
+ size = (rx_buffer_size - RX_PrevPointerPosition) + RX_PointerPosition;
+ }
+ else
+ {
+ size = RX_PointerPosition - RX_PrevPointerPosition;
+ }
+ RX_PrevPointerPosition = RX_PointerPosition;
+ // Send the received data and size to the serial stack to deencapsulate it and send it to luos_phy
+ Serial_ReceptionIncrease(size);
+ }
+}
+
+/******************************************************************************
+ * @brief Initialisation of the Serial communication
+ * @param data pointer of the data to send
+ * @param size size of the data to send
+ * @return None
+ ******************************************************************************/
+void SerialHAL_Send(uint8_t *data, uint16_t size)
+{
+ LL_DMA_DisableChannel(SERIAL_TX_DMA, SERIAL_TX_DMA_CHANNEL);
+ LL_DMA_SetMemoryAddress(SERIAL_TX_DMA, SERIAL_TX_DMA_CHANNEL, (uint32_t)data);
+ LL_DMA_SetDataLength(SERIAL_TX_DMA, SERIAL_TX_DMA_CHANNEL, size);
+ LL_DMA_EnableChannel(SERIAL_TX_DMA, SERIAL_TX_DMA_CHANNEL);
+}
+
+/******************************************************************************
+ * @brief TX DMA IRQ handler
+ * @param None
+ * @return None
+ ******************************************************************************/
+void SERIAL_TX_DMA_IRQHANDLER()
+{
+ // Check if TX DMA is finished
+ if ((SERIAL_TX_DMA_TC(SERIAL_TX_DMA) != RESET) && (LL_DMA_IsEnabledIT_TC(SERIAL_TX_DMA, SERIAL_TX_DMA_CHANNEL) != RESET))
+ {
+ // Clear the DMA irq flags
+ SERIAL_TX_DMA_CLEAR_TC(SERIAL_TX_DMA);
+ // Call the callback managing the end of the transmission
+ Serial_TransmissionEnd();
+ }
+}
+
+uint8_t SerialHAL_GetPort(void)
+{
+ // We may return the USARt peeripheral number as port number
+ // For now let's just consider that the port is 0
+ return 0;
+}
diff --git a/network/serial_network/HAL/STM32L476/serial_network_hal.h b/network/serial_network/HAL/STM32L476/serial_network_hal.h
new file mode 100644
index 000000000..db1d5d2b7
--- /dev/null
+++ b/network/serial_network/HAL/STM32L476/serial_network_hal.h
@@ -0,0 +1,19 @@
+/******************************************************************************
+ * @file serial_hal
+ * @brief hardware abstraction layer of serial communication driver for luos framework
+ * @author Luos
+ * @version 0.0.0
+ ******************************************************************************/
+
+#ifndef _SERIAL_HAL_H_
+#define _SERIAL_HAL_H_
+
+#include "stdint.h"
+#include "serial_hal_config.h"
+
+void SerialHAL_Init(uint8_t *rx_buffer, uint32_t buffer_size);
+void SerialHAL_Loop(void);
+void SerialHAL_Send(uint8_t *data, uint16_t size);
+uint8_t SerialHAL_GetPort(void); // Return the port number of the serial communication
+
+#endif /* _SERIAL_HAL_H_ */
diff --git a/source_filter_script.py b/source_filter_script.py
index 7fb3ff69b..9e264cc89 100644
--- a/source_filter_script.py
+++ b/source_filter_script.py
@@ -14,9 +14,10 @@
visited_key = "__LUOS_CORE_SCRIPT_CALLED"
global_env = DefaultEnvironment()
+click.secho("")
+click.secho("Luos engine build configuration:", underline=True)
+
if env.get("UPLOAD_PROTOCOL") == "custom" and not visited_key in global_env:
- click.secho("")
- click.secho("Luos engine build configuration:", underline=True)
# install pyluos
try:
import pyluos
diff --git a/tool_services/pipe/SERIAL/NUCLEO-L4/pipe_com.c b/tool_services/pipe/SERIAL/NUCLEO-L432/pipe_com.c
similarity index 100%
rename from tool_services/pipe/SERIAL/NUCLEO-L4/pipe_com.c
rename to tool_services/pipe/SERIAL/NUCLEO-L432/pipe_com.c
diff --git a/tool_services/pipe/SERIAL/NUCLEO-L4/pipe_com.h b/tool_services/pipe/SERIAL/NUCLEO-L432/pipe_com.h
similarity index 100%
rename from tool_services/pipe/SERIAL/NUCLEO-L4/pipe_com.h
rename to tool_services/pipe/SERIAL/NUCLEO-L432/pipe_com.h
diff --git a/tool_services/pipe/SERIAL/NUCLEO-L476/pipe_com.c b/tool_services/pipe/SERIAL/NUCLEO-L476/pipe_com.c
new file mode 100644
index 000000000..5f3f62056
--- /dev/null
+++ b/tool_services/pipe/SERIAL/NUCLEO-L476/pipe_com.c
@@ -0,0 +1,240 @@
+/******************************************************************************
+ * @file pipe_com
+ * @brief communication driver
+ * @author Luos
+ * @version 0.0.0
+ ******************************************************************************/
+#include
+#include "pipe_com.h"
+#include "luos_utils.h"
+#include "../serial_protocol.h"
+
+/*******************************************************************************
+ * Definitions
+ ******************************************************************************/
+
+/*******************************************************************************
+ * Variables
+ ******************************************************************************/
+volatile uint8_t is_sending = false;
+volatile uint16_t size_to_send = 0;
+volatile uint16_t RX_PrevPointerPosition = 0;
+/*******************************************************************************
+ * Function
+ ******************************************************************************/
+static void PipeCom_DMAInit(void);
+static void PipeCom_SerialSend(void);
+
+/******************************************************************************
+ * @brief init must be call in project init
+ * @param None
+ * @return None
+ ******************************************************************************/
+void PipeCom_Init(void)
+{
+ LL_USART_DeInit(PIPE_COM);
+ ///////////////////////////////
+ // GPIO PIPE Init
+ ///////////////////////////////
+ PIPE_TX_CLK();
+ PIPE_RX_CLK();
+
+ GPIO_InitTypeDef GPIO_InitStruct = {0};
+
+ // TX
+ GPIO_InitStruct.Pin = PIPE_TX_PIN;
+ GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
+ GPIO_InitStruct.Pull = GPIO_PULLUP;
+ GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH;
+ GPIO_InitStruct.Alternate = PIPE_TX_AF;
+ HAL_GPIO_Init(PIPE_TX_PORT, &GPIO_InitStruct);
+ // RX
+ GPIO_InitStruct.Pin = PIPE_RX_PIN;
+ GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
+ GPIO_InitStruct.Pull = GPIO_PULLUP;
+ GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH;
+ GPIO_InitStruct.Alternate = PIPE_RX_AF;
+ HAL_GPIO_Init(PIPE_RX_PORT, &GPIO_InitStruct);
+
+ ///////////////////////////////
+ // USART PIPE Init
+ ///////////////////////////////
+ PIPE_COM_CLOCK_ENABLE();
+
+ LL_USART_InitTypeDef USART_InitStruct;
+ // Initialise USART3
+ LL_USART_Disable(PIPE_COM);
+ USART_InitStruct.BaudRate = PIPE_SERIAL_BAUDRATE;
+ USART_InitStruct.DataWidth = LL_USART_DATAWIDTH_8B;
+ USART_InitStruct.StopBits = LL_USART_STOPBITS_1;
+ USART_InitStruct.Parity = LL_USART_PARITY_NONE;
+ USART_InitStruct.TransferDirection = LL_USART_DIRECTION_TX_RX;
+ USART_InitStruct.HardwareFlowControl = LL_USART_HWCONTROL_NONE;
+ USART_InitStruct.OverSampling = LL_USART_OVERSAMPLING_16;
+ while (LL_USART_Init(PIPE_COM, &USART_InitStruct) != SUCCESS)
+ ;
+ LL_USART_Enable(PIPE_COM);
+
+ LL_USART_ClearFlag_IDLE(PIPE_COM);
+ LL_USART_EnableIT_IDLE(PIPE_COM);
+
+ HAL_NVIC_EnableIRQ(PIPE_COM_IRQ);
+ HAL_NVIC_SetPriority(PIPE_COM_IRQ, 1, 1);
+
+ RX_PrevPointerPosition = 0;
+ PipeCom_DMAInit();
+ SerialProtocol_Init();
+}
+/******************************************************************************
+ * @brief init must be call in project init
+ * @param None
+ * @return None
+ ******************************************************************************/
+static void PipeCom_DMAInit(void)
+{
+ LL_DMA_DeInit(PIPE_RX_DMA, PIPE_RX_DMA_CHANNEL);
+ LL_DMA_DeInit(PIPE_TX_DMA, PIPE_TX_DMA_CHANNEL);
+
+ PIPE_RX_DMA_CLOCK_ENABLE();
+ PIPE_TX_DMA_CLOCK_ENABLE();
+
+ // Pipe to Luos
+ LL_DMA_DisableChannel(PIPE_RX_DMA, PIPE_RX_DMA_CHANNEL);
+ LL_DMA_SetDataTransferDirection(PIPE_RX_DMA, PIPE_RX_DMA_CHANNEL, LL_DMA_DIRECTION_PERIPH_TO_MEMORY);
+ LL_DMA_SetChannelPriorityLevel(PIPE_RX_DMA, PIPE_RX_DMA_CHANNEL, LL_DMA_PRIORITY_LOW);
+ LL_DMA_SetMode(PIPE_RX_DMA, PIPE_RX_DMA_CHANNEL, LL_DMA_MODE_CIRCULAR);
+ LL_DMA_SetPeriphIncMode(PIPE_RX_DMA, PIPE_RX_DMA_CHANNEL, LL_DMA_PERIPH_NOINCREMENT);
+ LL_DMA_SetMemoryIncMode(PIPE_RX_DMA, PIPE_RX_DMA_CHANNEL, LL_DMA_MEMORY_INCREMENT);
+ LL_DMA_SetPeriphSize(PIPE_RX_DMA, PIPE_RX_DMA_CHANNEL, LL_DMA_PDATAALIGN_BYTE);
+ LL_DMA_SetMemorySize(PIPE_RX_DMA, PIPE_RX_DMA_CHANNEL, LL_DMA_MDATAALIGN_BYTE);
+ LL_DMA_SetPeriphRequest(PIPE_RX_DMA, PIPE_RX_DMA_CHANNEL, PIPE_RX_DMA_REQUEST);
+
+ // Prepare buffer
+ LL_DMA_SetPeriphAddress(PIPE_RX_DMA, PIPE_RX_DMA_CHANNEL, (uint32_t)&PIPE_COM->RDR);
+ LL_DMA_SetDataLength(PIPE_RX_DMA, PIPE_RX_DMA_CHANNEL, PIPE_RX_BUFFER_SIZE);
+ LL_DMA_SetMemoryAddress(PIPE_RX_DMA, PIPE_RX_DMA_CHANNEL, (uint32_t)Pipe_GetRxStreamChannel()->ring_buffer);
+ LL_USART_EnableDMAReq_RX(PIPE_COM);
+ LL_DMA_EnableChannel(PIPE_RX_DMA, PIPE_RX_DMA_CHANNEL);
+
+ // Luos to Pipe
+ LL_DMA_SetDataTransferDirection(PIPE_TX_DMA, PIPE_TX_DMA_CHANNEL, LL_DMA_DIRECTION_MEMORY_TO_PERIPH);
+ LL_DMA_SetChannelPriorityLevel(PIPE_TX_DMA, PIPE_TX_DMA_CHANNEL, LL_DMA_PRIORITY_LOW);
+ LL_DMA_SetMode(PIPE_TX_DMA, PIPE_TX_DMA_CHANNEL, LL_DMA_MODE_NORMAL);
+ LL_DMA_SetPeriphIncMode(PIPE_TX_DMA, PIPE_TX_DMA_CHANNEL, LL_DMA_PERIPH_NOINCREMENT);
+ LL_DMA_SetMemoryIncMode(PIPE_TX_DMA, PIPE_TX_DMA_CHANNEL, LL_DMA_MEMORY_INCREMENT);
+ LL_DMA_SetPeriphSize(PIPE_TX_DMA, PIPE_TX_DMA_CHANNEL, LL_DMA_PDATAALIGN_BYTE);
+ LL_DMA_SetMemorySize(PIPE_TX_DMA, PIPE_TX_DMA_CHANNEL, LL_DMA_MDATAALIGN_BYTE);
+ LL_DMA_SetPeriphRequest(PIPE_TX_DMA, PIPE_TX_DMA_CHANNEL, PIPE_TX_DMA_REQUEST);
+
+ // Prepare buffer
+ LL_DMA_SetPeriphAddress(PIPE_TX_DMA, PIPE_TX_DMA_CHANNEL, (uint32_t)&PIPE_COM->TDR);
+ LL_USART_EnableDMAReq_TX(PIPE_COM);
+ HAL_NVIC_EnableIRQ(PIPE_TX_DMA_IRQ);
+ HAL_NVIC_SetPriority(PIPE_TX_DMA_IRQ, 1, 1);
+
+ LL_DMA_EnableIT_TC(PIPE_TX_DMA, PIPE_TX_DMA_CHANNEL);
+}
+/******************************************************************************
+ * @brief loop must be call in project loop
+ * @param None
+ * @return None
+ ******************************************************************************/
+void PipeCom_Loop(void)
+{
+}
+/******************************************************************************
+ * @brief Check if a message is available
+ * @param None
+ * @return None
+ ******************************************************************************/
+uint8_t PipeCom_Receive(uint16_t *size)
+{
+ return SerialProtocol_IsMsgComplete(size);
+}
+/******************************************************************************
+ * @brief Create msg and send it
+ * @param None
+ * @return None
+ ******************************************************************************/
+void PipeCom_Send(void)
+{
+ SerialProtocol_CreateTxMsg();
+ PipeCom_SerialSend();
+}
+/******************************************************************************
+ * @brief Send msg on serial Pipe
+ * @param None
+ * @return None
+ ******************************************************************************/
+static void PipeCom_SerialSend(void)
+{
+ if (is_sending == false)
+ {
+ is_sending = true;
+ size_to_send = SerialProtocol_GetSizeToSend();
+ LL_DMA_DisableChannel(PIPE_TX_DMA, PIPE_TX_DMA_CHANNEL);
+ LL_DMA_SetMemoryAddress(PIPE_TX_DMA, PIPE_TX_DMA_CHANNEL, (uint32_t)SerialProtocol_GetDataToSend());
+ LL_DMA_SetDataLength(PIPE_TX_DMA, PIPE_TX_DMA_CHANNEL, size_to_send);
+ LL_DMA_EnableChannel(PIPE_TX_DMA, PIPE_TX_DMA_CHANNEL);
+ }
+}
+/******************************************************************************
+ * @brief init must be call in project init
+ * @param None
+ * @return None
+ ******************************************************************************/
+void PIPE_COM_IRQHANDLER()
+{
+ uint16_t size = 0;
+ uint16_t RX_PointerPosition = 0;
+
+ // check if we receive an IDLE on usart3
+ if (LL_USART_IsActiveFlag_IDLE(PIPE_COM))
+ {
+ LL_USART_ClearFlag_IDLE(PIPE_COM);
+ if (LL_DMA_GetDataLength(PIPE_RX_DMA, PIPE_RX_DMA_CHANNEL) == 0)
+ {
+ return;
+ }
+
+ RX_PointerPosition = PIPE_RX_BUFFER_SIZE - LL_DMA_GetDataLength(PIPE_RX_DMA, PIPE_RX_DMA_CHANNEL);
+
+ if (PIPE_RX_DMA_TC(PIPE_RX_DMA) != RESET) // DMA buffer overflow
+ {
+ PIPE_RX_DMA_CLEAR_TC(PIPE_RX_DMA);
+ size = (PIPE_RX_BUFFER_SIZE - RX_PrevPointerPosition) + RX_PointerPosition;
+ }
+ else
+ {
+ size = RX_PointerPosition - RX_PrevPointerPosition;
+ }
+ RX_PrevPointerPosition = RX_PointerPosition;
+ if (size != 0)
+ {
+ Streaming_AddAvailableSampleNB(Pipe_GetRxStreamChannel(), size);
+ }
+ }
+}
+/******************************************************************************
+ * @brief init must be call in project init
+ * @param None
+ * @return None
+ ******************************************************************************/
+void PIPE_TX_DMA_IRQHANDLER()
+{
+ uint16_t size = 0;
+ // check if we receive an IDLE on usart3
+ // check if we receive an IDLE on usart3
+ if ((PIPE_TX_DMA_TC(PIPE_TX_DMA) != RESET) && (LL_DMA_IsEnabledIT_TC(PIPE_TX_DMA, PIPE_TX_DMA_CHANNEL) != RESET))
+ {
+ PIPE_TX_DMA_CLEAR_TC(PIPE_TX_DMA);
+
+ Streaming_RmvAvailableSampleNB(Pipe_GetTxStreamChannel(), size_to_send);
+ size = SerialProtocol_GetSizeToSend();
+ is_sending = false;
+ if (size > 0)
+ {
+ PipeCom_SerialSend();
+ }
+ }
+}
diff --git a/tool_services/pipe/SERIAL/NUCLEO-L476/pipe_com.h b/tool_services/pipe/SERIAL/NUCLEO-L476/pipe_com.h
new file mode 100644
index 000000000..2d11b2543
--- /dev/null
+++ b/tool_services/pipe/SERIAL/NUCLEO-L476/pipe_com.h
@@ -0,0 +1,70 @@
+/******************************************************************************
+ * @file pipe_com
+ * @brief communication driver
+ * @author Luos
+ * @version 0.0.0
+ ******************************************************************************/
+#ifndef PIPE_COM_H
+#define PIPE_COM_H
+
+#include "_pipe.h"
+
+#include "stm32l4xx_hal.h"
+#include "stm32l4xx_ll_usart.h"
+#include "stm32l4xx_ll_gpio.h"
+#include "stm32l4xx_ll_exti.h"
+#include "stm32l4xx_ll_dma.h"
+#include "stm32l4xx_ll_system.h"
+#include "stm32l4xx_hal.h"
+/*******************************************************************************
+ * Definitions
+ ******************************************************************************/
+// PIPE_CONFIG need to be define in your node_config.h if you want to redefine
+// Pipe configuration usart or DMA If you need change something in this configuration
+// you must redefine all the configuration in you node_config.h
+#ifndef PIPE_CONFIG
+ #define PIPE_TX_CLK() __HAL_RCC_GPIOA_CLK_ENABLE();
+ #define PIPE_TX_PIN GPIO_PIN_2
+ #define PIPE_TX_PORT GPIOA
+ #define PIPE_TX_AF GPIO_AF7_USART2
+
+ #define PIPE_RX_CLK() __HAL_RCC_GPIOA_CLK_ENABLE();
+ #define PIPE_RX_PIN GPIO_PIN_3
+ #define PIPE_RX_PORT GPIOA
+ #define PIPE_RX_AF GPIO_AF7_USART2
+
+ #define PIPE_COM_CLOCK_ENABLE() __HAL_RCC_USART2_CLK_ENABLE()
+ #define PIPE_COM USART2
+ #define PIPE_COM_IRQ USART2_IRQn
+ #define PIPE_COM_IRQHANDLER() USART2_IRQHandler()
+
+ #define PIPE_RX_DMA_CLOCK_ENABLE() __HAL_RCC_DMA1_CLK_ENABLE();
+ #define PIPE_RX_DMA DMA1
+ #define PIPE_RX_DMA_CHANNEL LL_DMA_CHANNEL_6
+ #define PIPE_RX_DMA_REQUEST LL_DMA_REQUEST_2
+ #define PIPE_RX_DMA_TC(PIPE_RX_DMA) LL_DMA_IsActiveFlag_TC6(PIPE_RX_DMA)
+ #define PIPE_RX_DMA_CLEAR_TC(PIPE_RX_DMA) LL_DMA_ClearFlag_TC6(PIPE_RX_DMA)
+
+ #define PIPE_TX_DMA_CLOCK_ENABLE() __HAL_RCC_DMA1_CLK_ENABLE();
+ #define PIPE_TX_DMA DMA1
+ #define PIPE_TX_DMA_CHANNEL LL_DMA_CHANNEL_7
+ #define PIPE_TX_DMA_REQUEST LL_DMA_REQUEST_2
+ #define PIPE_TX_DMA_TC(PIPE_TX_DMA) LL_DMA_IsActiveFlag_TC7(PIPE_TX_DMA)
+ #define PIPE_TX_DMA_CLEAR_TC(PIPE_TX_DMA) LL_DMA_ClearFlag_TC7(PIPE_TX_DMA)
+ #define PIPE_TX_DMA_IRQ DMA1_Channel7_IRQn
+ #define PIPE_TX_DMA_IRQHANDLER() DMA1_Channel7_IRQHandler()
+#endif
+
+/*******************************************************************************
+ * Variables
+ ******************************************************************************/
+
+/*******************************************************************************
+ * Function
+ ******************************************************************************/
+void PipeCom_Init(void);
+void PipeCom_Loop(void);
+uint8_t PipeCom_Receive(uint16_t *size);
+void PipeCom_Send(void);
+
+#endif /* PIPE_H */