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| 1 | +#include "cp15.h" |
| 2 | + |
| 3 | + .text |
| 4 | + .align 2 |
| 5 | + |
| 6 | + .global cp15_setup |
| 7 | + |
| 8 | +cp15_setup: |
| 9 | + |
| 10 | + /* Protection, DCache, ICache, TCM, Alternate vectors disabled */ |
| 11 | + mov r0, #0 |
| 12 | + mcr p15, 0, r0, c1, c0 |
| 13 | + |
| 14 | + /* Drain write buffer : makes sure the prevous write has completed */ |
| 15 | + mcr p15, 0, r0, c7, c10, 4 |
| 16 | + |
| 17 | + /* DTCM base = 0x0b000000, size = 16 KB */ |
| 18 | + mov r0, #0x0b000000 |
| 19 | + orr r0, r0, # 0b00101 << 1 |
| 20 | + mcr p15, 0, r0, c9, c1,0 |
| 21 | + |
| 22 | + /* ITCM base = 0x01000000, size = 32 MB */ |
| 23 | + mov r0, #0x01000000 |
| 24 | + orr r0, r0, # 0b10000 << 1 |
| 25 | + mcr p15, 0, r0, c9, c1,1 |
| 26 | + |
| 27 | + /*-------------------------------------------------------------------------- |
| 28 | + * Setup memory regions similar to Release Version (from libnds) |
| 29 | + *------------------------------------------------------------------------*/ |
| 30 | + |
| 31 | + /* Region 0 - IO registers */ |
| 32 | + ldr r0,=( CP15_REGION_64M | 0x04000000 | 1) |
| 33 | + mcr p15, 0, r0, c6, c0, 0 |
| 34 | + |
| 35 | + /* Region 1 - Main Memory */ |
| 36 | + ldr r0,=( CP15_REGION_4M | 0x02000000 | 1) |
| 37 | + mcr p15, 0, r0, c6, c1, 0 |
| 38 | + |
| 39 | + /* Region 2 - alternate vector base */ |
| 40 | + ldr r0,=( CP15_REGION_4K | 0x00000000 | 1) |
| 41 | + mcr p15, 0, r0, c6, c2, 0 |
| 42 | + |
| 43 | + /* Region 3 - DS Accessory (GBA Cart) */ |
| 44 | + ldr r0,=( CP15_REGION_128M | 0x08000000 | 1) |
| 45 | + mcr p15, 0, r0, c6, c3, 0 |
| 46 | + |
| 47 | + /* Region 4 - DTCM */ |
| 48 | + ldr r0,=0x0b000000 |
| 49 | + orr r0,r0,#(CP15_REGION_16K | 1) |
| 50 | + mcr p15, 0, r0, c6, c4, 0 |
| 51 | + |
| 52 | + /* Region 5 - ITCM */ |
| 53 | + ldr r0,=0x01000000 |
| 54 | + |
| 55 | + mov r0,r0,lsr #15 @--> align to 32k boundary |
| 56 | + mov r0,r0,lsl #15 @/ |
| 57 | + |
| 58 | + orr r0,r0,#(CP15_REGION_32K | 1) |
| 59 | + mcr p15, 0, r0, c6, c5, 0 |
| 60 | + |
| 61 | + /* Region 6 - System ROM */ |
| 62 | + ldr r0,=( CP15_REGION_32K | 0xFFFF0000 | 1) |
| 63 | + mcr p15, 0, r0, c6, c6, 0 |
| 64 | + |
| 65 | + /* Region 7 - non cacheable main ram */ |
| 66 | + ldr r0,=( CP15_REGION_4M | 0x02400000 | 1) |
| 67 | + mcr p15, 0, r0, c6, c7, 0 |
| 68 | + |
| 69 | + /*-------------------------------------------------------------------------- |
| 70 | + * Activating TCM and caches |
| 71 | + *------------------------------------------------------------------------*/ |
| 72 | + |
| 73 | + /* Write buffer enable */ |
| 74 | + ldr r0,=0b00000010 |
| 75 | + mcr p15, 0, r0, c3, c0, 0 |
| 76 | + |
| 77 | + /* DCache & ICache enable */ |
| 78 | + ldr r0,=0b01000010 |
| 79 | + mcr p15, 0, r0, c2, c0, 0 |
| 80 | + mcr p15, 0, r0, c2, c0, 1 |
| 81 | + |
| 82 | + /* IAccess */ |
| 83 | + ldr r0,=0x36636633 |
| 84 | + mcr p15, 0, r0, c5, c0, 3 |
| 85 | + |
| 86 | + /* DAccess */ |
| 87 | + ldr r0,=0x36333633 |
| 88 | + mcr p15, 0, r0, c5, c0, 2 |
| 89 | + |
| 90 | + /* Enable ICache, DCache, ITCM & DTCM */ |
| 91 | + mrc p15, 0, r0, c1, c0, 0 |
| 92 | + ldr r1,= CP15_ITCM_ENABLE | CP15_DTCM_ENABLE | CP15_ICACHE_ENABLE | CP15_DCACHE_ENABLE | CP15_PROTECT_ENABLE |
| 93 | + orr r0,r0,r1 |
| 94 | + mcr p15, 0, r0, c1, c0, 0 |
| 95 | + |
| 96 | + mov pc, lr |
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