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| Analysis and Eval | |||||
| Supported Layers | Performance/Resource Utilization | ||||
| Performance Eval | |||||
| Design and Development | |||||
| API Reference | Quantization User Guide for CHaiDNN | Model Zoo | Running Inference on new Network | ||
| Creating SDx GUI Project | Configurable Parameters | Custom Platform Generation | Software Layer Plugin | ||
| SDSoC Environment User Guide | Hardware-Software Partitioning for Performance | ||||
CHaiDNN provides various configurable parameters to be able to port the design to various Xilinx devices.
Hardware Parameters
The following table describes the available configurable parameters. The below parameters have to be changed in the two files namely /design/conv/include/xi_conv_config.h and /software/include/hw_settings.h.
📌 NOTE: Both the design and the software has to be rebuilt for expected functionality of the new configuration.
| Parameter | Description |
|---|---|
| XI_DIET_CHAI_Z | Set to 1 to configure the design to use 128 DSPs for compute and 64-bit AXI interface |
| XI_DIET_CHAI_ZUPLUS | Set to 1 to configure the design to use 128 DSPs for compute and 128-bit AXI interface |
| XI_KER_PROC | Sets the number of output feature maps to be generated in parallel. The valid values: 8, 16 |
| XI_PIX_PROC | Sets the number of output pixels to be generated in parallel. Valid values: 4,8,16, 32, 64 |
| XI_ISTAGEBUFF_DEPTH | Configures the depth of Istage Buffer. Valid Values: 1024, 2048, 4096, 8192 |
| XI_OSTAGEBUFF_DEPTH | Configures the depth of Ostage Buffer. Valid Values: 1024, 2048, 4096 |
| XI_WEIGHTBUFF_DEPTH | Configures the depth of Weights Buffer. Valid Values: 1024, 2048, 4096 |
The below parameters have to be changed in thr xi_conv_config.h file.
📌 NOTE: The design has to be rebuilt for expected functionality of the new configuration
| Parameter | Description |
|---|---|
| XI_BIAS_URAM_EN | Set to 1 to map Bias buffer to URAM |
| XI_WTS_URAM_EN | Set to 1 to map Weights buffer to URAM |
| XI_ISTG_URAM_EN | Set to 1 to map Istage buffer to URAM |
| XI_OSTG_URAM_EN | Set to 1 to map Ostage buffer to URAM |
| XI_FEED_URAM_EN | Set to 1 to map Feeding buffer to URAM |
| XI_SCALE_URAM_EN | Set to 1 to map Scale buffer to URAM |
Supported Configurations
The following table shows the configurations for XI_KER_PROC and XI_PIX_PROC for required number of compute DSPs.
| DSPs | 128 | 256 | 512 | 1024 | ||||
|---|---|---|---|---|---|---|---|---|
| XI_KER_PROC | 8 | 16 | 8 | 16 | 8 | 16 | 8 | 16 |
| XI_PIX_PROC | 8 | 4 | 16 | 8 | 32 | 16 | 64 | 32 |
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