Skip to content

Commit 0fbc669

Browse files
authored
[Bugfix] Fix single output condition in output processor (vllm-project#7881)
1 parent 6e36f4f commit 0fbc669

File tree

1 file changed

+1
-1
lines changed

1 file changed

+1
-1
lines changed

vllm/engine/output_processor/single_step.py

+1-1
Original file line numberDiff line numberDiff line change
@@ -113,7 +113,7 @@ def _process_sequence_group_outputs(self, seq_group: SequenceGroup,
113113
outputs: SequenceGroupOutput,
114114
is_async: bool) -> None:
115115
sampling_params = seq_group.sampling_params
116-
if sampling_params.n == 1 and not sampling_params.use_beam_search:
116+
if sampling_params.best_of == 1 and not sampling_params.use_beam_search:
117117
# only have one output sample
118118
sample = outputs.samples[0]
119119
# only have one sequence

0 commit comments

Comments
 (0)