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IO timing margin problem #22

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sicajc opened this issue Oct 8, 2024 · 0 comments
Open

IO timing margin problem #22

sicajc opened this issue Oct 8, 2024 · 0 comments

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@sicajc
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sicajc commented Oct 8, 2024

Hello, I am trying to use cacti to model the 3D-DRAM model, but stumble upon a problem, I run the default 3DDRAM_Samsung3D9Gb_extenened.cfg but get this weird IO Timing Margin and Voltage Margin. Is this a bug? Or has anyone encountered or solve this problem? Thanks.

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