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backend-6502.c
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backend-6502.c
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/*
* 6502 backend for the Fuzix C Compiler
*
* The big challenge here is that the C stack is a software
* construct and so quite slow to adjust. As the compiler thinks
* mostly in terms of call frames we can avoid a chunk of the cost
* but not all of it.
*
* We try and reduce the cost by
* 1. Generating direct references whenever we can
* 2. When we need a helper and we can directly access we stuff the
* one side of the operation into @tmp
* 3. For certain operations we generate the left/right ourselves and
* go via the CPU stack. This is a win in some common cases like
* assignment, particularly on the 65C02
*
* For the rest we have to go via the C stack which whilst painfulf in
* places is helped by the relatively low clocks per instruction.
*
* Elements of this design like the separate stack with ZP pointer are
* heavily influenced by CC65 and one goal is to use many of the same
* support functions. Our approach to code generation is however quite
* different and constrained by wanting to run on an 8bit micro.
*
* Register usage
* A: lower half of working value or pointer
* X: upper half of working value or pointer
* Y: used for indexing locals off @sp and various parameters
* to helpers on XA
* @sp: stack pointer base word in ZP
* @tmp: scratch value used extensively
* @tmp2: temporary word following @tmp
* @hireg: upper 16bits of 32bit workinf values
*
* CPU specifics
* 6502 classic CPU. We don't use undoc stuff
* 65C02 6502 + base CMOS instructions
* M740 6502 + some of base CMOS (not STZ) and some other
* differences (TST, LDM)
* TODO:
* W65C02 Has bit ops (bbr/bbs/seb/clb) which we can use for
* some logic ops.
* HUC6820 Has CLA/CLX/CLY (clear reg), and W65C02 bitops
* SAX/SAY/SXY (swap A and X/Y),
*
* 2A03 is a 6502 with no decimal mode. We don't use it so for us
* it's just another 6502.
*
* Next to fix comparisons are reverse side due to **tmp effect
* need gttmp lteqtmp and flip side flipper
*/
#include <stdio.h>
#include <stdint.h>
#include <stdlib.h>
#include <string.h>
#include <stdarg.h>
#include "compiler.h"
#include "backend.h"
#include "backend-byte.h"
#define NMOS_6502 0
#define CMOS_6502 1
#define CMOS_M740 2
#define CMOS_65C816 3 /* 65802/816 in 8bit mode */
#define BYTE(x) (((unsigned)(x)) & 0xFF)
#define WORD(x) (((unsigned)(x)) & 0xFFFF)
/*
* State for the current function
*/
static unsigned frame_len; /* Number of bytes of stack frame */
static unsigned sp; /* Stack pointer offset tracking */
static unsigned unreachable; /* Code following an unconditional jump */
static unsigned xlabel; /* Internal backend generated branches */
static unsigned argbase; /* Track shift between arguments and stack */
/*
* Node types we create in rewriting rules
*/
#define T_NREF (T_USER) /* Load of C global/static */
#define T_CALLNAME (T_USER+1) /* Function call by name */
#define T_NSTORE (T_USER+2) /* Store to a C global/static */
#define T_LREF (T_USER+3) /* Ditto for local */
#define T_LSTORE (T_USER+4)
#define T_LBREF (T_USER+5) /* Ditto for labelled strings or local static */
#define T_LBSTORE (T_USER+6)
#define T_RREF (T_USER+7)
#define T_RSTORE (T_USER+8)
#define T_RDEREF (T_USER+9) /* *regptr */
#define T_REQ (T_USER+10) /* *regptr */
/*
* 6502 specifics. We need to track some register values to produce
* bearable code
*/
static void output(const char *p, ...)
{
va_list v;
va_start(v, p);
putchar('\t');
vprintf(p, v);
putchar('\n');
va_end(v);
}
static void label(const char *p, ...)
{
va_list v;
va_start(v, p);
vprintf(p, v);
putchar(':');
putchar('\n');
va_end(v);
}
#define R_A 0
#define R_X 1
#define R_Y 2
#define INVALID 0
struct regtrack {
unsigned state;
uint8_t value;
unsigned snum;
unsigned offset;
};
struct regtrack reg[3];
static void invalidate_regs(void)
{
reg[R_A].state = INVALID;
reg[R_X].state = INVALID;
reg[R_Y].state = INVALID;
}
static void invalidate_a(void)
{
reg[R_A].state = INVALID;
}
static void invalidate_x(void)
{
reg[R_X].state = INVALID;
}
#if 0
static void invalidate_y(void)
{
reg[R_Y].state = INVALID;
}
#endif
static void const_a_set(unsigned val)
{
if (reg[R_A].state == T_CONSTANT)
reg[R_A].value = val;
else
reg[R_A].state = INVALID;
}
static void const_x_set(unsigned val)
{
if (reg[R_X].state == T_CONSTANT)
reg[R_X].value = val;
else
reg[R_X].state = INVALID;
}
static void const_y_set(unsigned val)
{
if (reg[R_Y].state == T_CONSTANT)
reg[R_Y].value = val;
else
reg[R_Y].state = INVALID;
}
/* Get a value into A, adjust and track */
static void load_a(uint8_t n)
{
if (reg[R_A].state == T_CONSTANT) {
if (reg[R_A].value == n)
return;
}
/* No inca deca */
if (reg[R_X].state == T_CONSTANT && reg[R_X].value == n)
output("txa");
else if (reg[R_Y].state == T_CONSTANT && reg[R_Y].value == n)
output("tya");
else
output("lda #%u", n);
reg[R_A].state = T_CONSTANT;
reg[R_A].value = n;
}
/* Get a value into X, adjust and track */
static void load_x(uint8_t n)
{
if (reg[R_X].state == T_CONSTANT) {
if (reg[R_X].value == n)
return;
if (reg[R_X].value == n - 1) {
output("inx");
reg[R_X].value++;
return;
}
if (reg[R_X].value == n + 1) {
output("dex");
reg[R_X].value--;
return;
}
}
if (cpu == CMOS_65C816 && reg[R_Y].state == T_CONSTANT && reg[R_Y].value == n)
output("tyx");
else if (reg[R_A].state == T_CONSTANT && reg[R_A].value == n)
output("tax");
else
output("ldx #%u", n);
reg[R_X].state = T_CONSTANT;
reg[R_X].value = n;
}
/* Get a value into Y, adjust and track */
static void load_y(uint8_t n)
{
if (reg[R_Y].state == T_CONSTANT) {
if (reg[R_Y].value == n)
return;
if (reg[R_Y].value == n - 1) {
output("iny");
reg[R_Y].value++;
return;
}
if (reg[R_Y].value == n + 1) {
output("dey");
reg[R_Y].value--;
return;
}
}
if (cpu == CMOS_65C816 && reg[R_X].state == T_CONSTANT && reg[R_X].value == n)
output("txy");
else if (reg[R_A].state == T_CONSTANT && reg[R_A].value == n)
output("tay");
else
output("ldy #%u", n);
reg[R_Y].state = T_CONSTANT;
reg[R_Y].value = n;
}
/*
* For now just try and eliminate the reloads. We shuld be able to
* eliminate some surplus stores with thought if we are careful
* how we defer them.
*/
static void set_xa_node(struct node *n)
{
unsigned op = n->op;
unsigned value = n->value;
/* Turn store forms into ref forms */
switch(op) {
case T_NSTORE:
op = T_NREF;
break;
case T_LBSTORE:
op = T_LBREF;
break;
case T_LSTORE:
op = T_LREF;
break;
case T_NAME:
case T_CONSTANT:
case T_NREF:
case T_LBREF:
case T_LREF:
case T_LOCAL:
case T_ARGUMENT:
break;
default:
invalidate_a();
invalidate_x();
return;
}
reg[R_X].state = op;
reg[R_A].state = op;
reg[R_A].value = value;
reg[R_X].value = value;
reg[R_A].snum = n->snum;
reg[R_X].snum = n->snum;
return;
}
static unsigned xa_contains(struct node *n)
{
if (n->op == T_NREF && (n->flags & SIDEEFFECT)) /* Volatiles */
return 0;
if (reg[R_A].state != n->op || reg[R_X].state != n->op)
return 0;
if (reg[R_A].value != n->value || reg[R_X].value != n->value)
return 0;
if (reg[R_A].snum != n->snum || reg[R_X].snum != n->snum)
return 0;
/* Looks good */
return 1;
}
static void set_a_node(struct node *n)
{
unsigned op = n->op;
unsigned value = n->value;
switch(op) {
case T_NSTORE:
op = T_NREF;
break;
case T_LBSTORE:
op = T_LBREF;
break;
case T_LSTORE:
op = T_LREF;
break;
case T_NAME:
case T_CONSTANT:
case T_NREF:
case T_LBREF:
case T_LREF:
case T_LOCAL:
case T_ARGUMENT:
break;
default:
invalidate_a();
return;
}
reg[R_A].state = op;
reg[R_A].value = value;
reg[R_A].snum = n->snum;
}
static unsigned a_contains(struct node *n)
{
if (reg[R_A].state != n->op)
return 0;
if (reg[R_A].value != n->value)
return 0;
if (reg[R_A].snum != n->snum)
return 0;
/* Looks good */
return 1;
}
/* Memory writes occured, invalidate according to what we know. Passing
NULL indicates unknown memory changes */
#if 0
static void invalidate_node(struct node *n)
{
/* For now don't deal with the complex cases of whether we might
invalidate another object */
if (reg[R_A].state != T_CONSTANT)
reg[R_A].state = INVALID;
if (reg[R_X].state != T_CONSTANT)
reg[R_X].state = INVALID;
}
#endif
static void invalidate_mem(void)
{
if (reg[R_A].state != T_CONSTANT)
reg[R_A].state = INVALID;
if (reg[R_X].state != T_CONSTANT)
reg[R_X].state = INVALID;
}
static void set_reg(unsigned r, unsigned v)
{
reg[r].state = T_CONSTANT;
reg[r].value = (uint8_t)v;
}
/*
* Example size handling. In this case for a system that always
* pushes words.
*/
static unsigned get_size(unsigned t)
{
if (PTR(t))
return 2;
if (t == CSHORT || t == USHORT)
return 2;
if (t == CCHAR || t == UCHAR)
return 1;
if (t == CLONG || t == ULONG || t == FLOAT)
return 4;
if (t == CLONGLONG || t == ULONGLONG || t == DOUBLE)
return 8;
if (t == VOID)
return 0;
error("gs");
return 0;
}
/*
* For 6502 we keep byte objects byte size
*/
static unsigned get_stack_size(unsigned t)
{
return get_size(t);
}
/* Generate a call to an internal helper */
static void gen_internal(const char *p)
{
invalidate_regs();
output("jsr __%s", p);
}
static void repeated_op(unsigned n, const char *o)
{
while(n--)
output(o);
}
/* At some point instead pass flags into the helpers */
static unsigned direct_za(const char *op)
{
if (cpu == NMOS_6502)
return 0;
return 1;
}
static unsigned direct_z(const char *op)
{
if (cpu == NMOS_6502)
return 0;
if (op[2] == 'x' || op[2] == 'y')
return 0;
return 1;
}
/* Construct a direct operation if possible for the primary op */
static int do_pri8(struct node *n, const char *op, void (*pre)(struct node *__n))
{
struct node *r = n->right;
unsigned v = n->value;
const char *name;
/* We can fold in some simple casting */
if (n->type == T_CAST) {
if ((!PTR(n->type) && n->type != CINT && n->type != UINT) || r->type != UCHAR)
return 0;
/* Just do the right hand side */
n = n->right;
v = n->value;
r = n->right;
}
switch(n->op) {
case T_LABEL:
pre(n);
output("%s #<T%d+%d", op, n->val2, v);
return 1;
case T_NAME:
pre(n);
name = namestr(n->snum);
output("%s #<_%s+%d", op, name, v);
return 1;
case T_CONSTANT:
/* These had the right squashed into them */
case T_LREF:
case T_NREF:
case T_LBREF:
case T_LSTORE:
case T_NSTORE:
case T_LBSTORE:
/* These had the right squashed into them */
r = n;
break;
}
v = r->value;
switch(r->op) {
case T_CONSTANT:
pre(n);
if (strcmp(op, "lda") == 0)
load_a(v);
else if (strcmp(op, "ldx") == 0)
load_x(v);
else
output("%s #%d", op, r->value & 0xFF);
return 1;
case T_LREF:
case T_LSTORE:
/* 255 is a fringe case we can do for 8bit but not split
8 and 16, so for now just skip it */
if (v == 0 && direct_z(op)) {
pre(n);
output("%s (@sp)", op);
return 1;
}
if (v < 254) {
pre(n);
load_y(v);
output("%s (@sp),y", op);
return 1;
}
/* For now punt */
return 0;
case T_NREF:
case T_NSTORE:
pre(n);
name = namestr(r->snum);
output("%s _%s+%d", op, name, (unsigned)r->value);
return 1;
case T_LBSTORE:
case T_LBREF:
pre(n);
output("%s T%d+%d", op, r->val2, (unsigned)r->value);
return 1;
/* If we add registers
case T_RREF:
output("%s __reg%d", op, r->val2);
return 1;*/
}
return 0;
}
/* Construct a direct operation if possible for the primary op */
static int do_pri8hi(struct node *n, const char *op, void (*pre)(struct node *__n))
{
struct node *r = n->right;
const char *name;
unsigned v = n->value;
/* We can fold in some simple casting */
if (n->type == T_CAST) {
if ((!PTR(n->type) && n->type != CINT && n->type != UINT) || r->type != UCHAR)
return 0;
/* We need to do it on 0 */
load_a(0);
n = n->right;
v = n->value;
r = n->right;
}
switch(n->op) {
case T_LABEL:
pre(n);
output("%s #>T%d+%d", op, n->val2, v);
return 1;
case T_NAME:
pre(n);
name = namestr(n->snum);
output("%s #_%s+%d", op, name, v);
return 1;
case T_CONSTANT:
/* These had the right squashed into them */
case T_LREF:
case T_NREF:
case T_LBREF:
case T_LSTORE:
case T_NSTORE:
case T_LBSTORE:
/* These had the right squashed into them */
r = n;
break;
}
v = r->value;
switch(r->op) {
case T_CONSTANT:
pre(n);
v >>= 8;
if (strcmp(op, "lda") == 0)
load_a(v);
else if (strcmp(op, "ldx") == 0)
load_x(v);
else
output("%s #%d", op, v);
return 1;
case T_LREF:
case T_LSTORE:
if (r->value < 254) {
pre(n);
load_y(v + 1) ;
output("%s (@sp),y", op);
return 1;
}
/* For now punt */
return 0;
case T_NREF:
case T_NSTORE:
pre(n);
name = namestr(r->snum);
output("%s _%s+%d", op, name, v + 1);
return 1;
case T_LBSTORE:
case T_LBREF:
pre(n);
output("%s T%d+%d", op, r->val2, v + 1);
return 1;
/* If we add registers
case T_RREF:
output("%s __reg%d+1", op, r->val2);
return 1;*/
}
return 0;
}
/* 16bit/ We are rather limited here because we only have a few ops with x */
static int do_pri16(struct node *n, const char *op, void (*pre)(struct node *__n))
{
struct node *r = n->right;
const char *name;
unsigned v = n->value;
/* We can fold in some simple casting */
if (n->type == T_CAST) {
if ((!PTR(n->type) && n->type != CINT && n->type != UINT) || r->type != UCHAR)
return 0;
/* Just do the right hand side */
n = n->right;
v = n->value;
r = n->right;
load_x(0);
}
switch(n->op) {
case T_LABEL:
pre(n);
output("%sa #<T%d+%d", op, n->val2, v);
output("%sx #>T%d+%d", op, n->val2, v >> 8);
return 1;
case T_NAME:
pre(n);
name = namestr(n->snum);
output("%sa #<_%s+%d", op, n, v);
output("%sx #>_%s+%d", op, n, v >> 8);
return 1;
case T_LOCAL:
case T_LREF:
case T_NREF:
case T_LBREF:
case T_LSTORE:
case T_NSTORE:
case T_LBSTORE:
case T_CONSTANT:
/* These had the right squashed into them */
r = n;
}
v = r->value;
switch(r->op) {
case T_CONSTANT:
pre(n);
if (strcmp(op, "ld") == 0) {
load_a(v);
load_x(v >> 8);
} else {
output("%sa #%u", op, v & 0xFF);
output("%sx #%u", op, v >> 8);
}
return 1;
case T_LREF:
if (optsize && v < 255 && strcmp(op, "ld") == 0) {
pre(n);
if (v) {
load_y(v + 1);
output("jsr __gloy");
} else {
load_y(0);
output("jsr __gloy0");
}
const_y_set(v);
return 1;
}
case T_LSTORE:
if (v < 255) {
pre(n);
load_y(v + 1);
output("%sa (@sp),y", op);
output("tax");
if (v == 0 && direct_za(op))
output("%sa (@sp)", op);
else {
load_y(v);
output("%sa (@sp),y", op);
}
return 1;
}
/* For now punt */
return 0;
case T_NSTORE:
case T_NREF:
name = namestr(r->snum);
pre(n);
output("%sa _%s+%d", op, name, (unsigned)r->value);
output("%sx _%s+%d", op, name, ((unsigned)r->value) + 1);
return 1;
case T_LBSTORE:
case T_LBREF:
pre(n);
output("%sa T%d+%d", op, r->val2, (unsigned)r->value);
output("%sx T%d+%d", op, r->val2, ((unsigned)r->value) + 1);
return 1;
/* If we add registers
case T_RREF:
pre(n);
output("%sa __reg%dd", op, r->val2);
output("%sx __reg%d + 1", op, r->val2);
return 1;*/
}
return 0;
}
static void pre_none(struct node *n)
{
}
static void pre_store8(struct node *n)
{
output("sta @tmp");
}
static void pre_store16(struct node *n)
{
output("sta @tmp");
output("stx @tmp+1");
}
static void pre_pha(struct node *n)
{
output("pha");
}
static int pri8(struct node *n, const char *op)
{
return do_pri8(n, op, pre_none);
}
static int pri16(struct node *n, const char *op)
{
return do_pri16(n, op, pre_none);
}
static unsigned fast_castable(struct node *n)
{
struct node *r = n->right;
/* Is this a case we can just flow into the code. Usually that's
a uchar to int */
if (r->op == T_CAST && get_size(r->type) == 2 && r->right->type == UCHAR)
return 1;
return 0;
}
static int pri8_help(struct node *n, char *helper)
{
struct node *r = n->right;
/* Special case for cast first */
if (fast_castable(n)) {
if (do_pri8(r->right, "lda", pre_store8)) {
helper_s(n, helper);
set_reg(R_Y, 0);
return 1;
}
}
if (do_pri8(r, "lda", pre_store8)) {
/* Helper invalidates A itself */
helper_s(n, helper);
set_reg(R_Y, 0);
return 1;
}
return 0;
}
static void pre_fastcast(struct node *n)
{
printf("\tsta @tmp\n");
/* The M740 is a fairly complete subset of the 65C02 but lacks STZ */
if (cpu == CMOS_M740)
output("stm #0");
else if (cpu > NMOS_6502)
output("stz @tmp+1");
else {
load_x(0);
output("stx @tmp+1");
}
}
static int pri16_help(struct node *n, char *helper)
{
struct node *r = n->right;
unsigned v = r->value;
/* Special case for cast first */
if (fast_castable(n)) {
if (do_pri16(r->right, "ld", pre_fastcast)) {
helper_s(n, helper);
set_reg(R_Y, 1);
return 1;
}
}
if (do_pri16(n, "ld", pre_store16)) {
/* Helper invalidates XA itself */
helper_s(n, helper);
set_reg(R_Y, 1);
return 1;
}
/* As we are saving via @tmp we can do these as well */
switch(r->op) {
case T_ARGUMENT:
v += frame_len + argbase;
case T_LOCAL:
v += sp;
if (v < 255) {
pre_store16(n);
if (v) {
load_a(v);
output("jsr __asp\n");
} else {
output("lda @sp\n");
output("ldx @sp+1\n");
}
set_xa_node(r);
helper_s(n, helper);
return 1;
}
break;
}
return 0;
}
static int pri_help(struct node *n, char *helper)
{
unsigned s = get_size(n->type);
if (s == 1 && pri8_help(n, helper))
return 1;
else if (s == 2 && pri16_help(n, helper))
return 1;
return 0;
}
static int pri_cchelp(register struct node *n, unsigned s, char *helper)
{
register struct node *r = n->right;
unsigned v = r->value;
n->flags |= ISBOOL;
/* In the case where we know the upper half of the value. Need to sort
the signed version out eventually */
if (r->op == T_CONSTANT && s == 2 && (n->type & UNSIGNED)) {
if (reg[R_X].state == T_CONSTANT && reg[R_X].value == (v >> 8))
return pri8_help(n, helper);
}
if (n->flags & BYTEABLE)
return pri8_help(n, helper);
return pri_help(n, helper);
}
static void pre_clc(struct node *n)
{
output("clc");
}
static void pre_sec(struct node *n)
{
output("sec");
}
static void pre_stash(struct node *n)
{
output("sta @tmp");
output("stx @tmp+1");
}
/*
* inc and dec are complicated but worth some effort as they
* are so commonly used for small constants. We could o with
* spotting and folding some stuff like *x++ perhaps to get a
* bit better codegen.
*/
/* Try to write inline inc and dec for simple forms */
static int leftop_memc(struct node *n, const char *op)
{
struct node *l = n->left;
struct node *r = n->right;
unsigned v;
unsigned sz = get_size(n->type);
char *name;
unsigned count;
unsigned nr = n->flags & NORETURN;
if (sz > 2)
return 0;
if (r->op != T_CONSTANT || r->value > 2)
return 0;
else
count = r->value;
/* Being super clever doesn't help if we need the value anyway */
if (!nr && (n->op == T_PLUSPLUS || n->op == T_MINUSMINUS))
return 0;
v = l->value;
switch(l->op) {
case T_NAME:
name = namestr(l->snum);
while(count--) {
output("%s _%s+%d", op, name, v);
if (sz == 2) {
output("beq X%d", ++xlabel);
output("%s _%s+%d", op, name, v + 1);
label("X%d", xlabel);
}
}
if (!nr) {
output("lda _%s+%d", name, v);
if (sz == 2)
output("ldx _%s+%d", name, v + 1);
}
return 1;
case T_LABEL:
while(count--) {
output("%s T%d+%d", op, (unsigned)l->val2, v);
if (sz == 2) {
output("beq X%d", ++xlabel);
output("%s T%d+%d", op, (unsigned)l->val2, v + 1);
label("X%d", xlabel);
}
}
if (nr == 1) {
output("lda T%d+%d", (unsigned)l->val2, v);
if (sz == 2)
output("ldx T%d+%d", (unsigned)l->val2, v + 1);
}
return 1;
case T_ARGUMENT:
v += argbase + frame_len;
case T_LOCAL:
return 0;
/* Don't seem to have a suitable addressing mode */
}
return 0;
}
/* Do a 16bit operation upper half by switching X into A */
static unsigned try_via_x(struct node *n, const char *op, void (*pre)(struct node *))
{
if (optsize) {
struct node *r = n->right;
unsigned rop = r->op;
unsigned v = r->value;
if (rop == T_LREF) {
if (r->value == 0) {
output("jsr __%ssp0", op);
set_reg(R_Y, 1);
invalidate_x();
invalidate_a();
return 1;
} else if (v < 255) {
load_y(v);
output("jsr __%spy", op);
const_y_set(reg[R_Y].value + 1);
invalidate_x();
invalidate_a();
return 1;
}
}
if (rop == T_CONSTANT && v < 256) {
load_y(v);
output("jsr __%s8y", op);
invalidate_x();
invalidate_a();
return 1;
}
}
/* Name and lbref are progably not worth it as have to go via tmp */
if (do_pri8(n, op, pre) == 0)
return 0;
output("pha");
output("txa");
memcpy(®[R_A], ®[R_X], sizeof(struct regtrack));
do_pri8hi(n, op, pre_none);