Skip to content

Commit 4d1ee0d

Browse files
DillonbDillonb
committed
cop funct
1 parent 1c2728b commit 4d1ee0d

File tree

1 file changed

+135
-11
lines changed

1 file changed

+135
-11
lines changed

‎src/jit/src/mips_parser.rs

+135-11
Original file line numberDiff line numberDiff line change
@@ -71,6 +71,14 @@ enum MipsOpcode {
7171
DMTC0,
7272
CTC0,
7373
DCTC0,
74+
MFC1,
75+
DMFC1,
76+
CFC1,
77+
DCFC1,
78+
MTC1,
79+
DMTC1,
80+
CTC1,
81+
DCTC1,
7482
SLL,
7583
SRL,
7684
SRA,
@@ -268,12 +276,69 @@ enum MipsFunctField {
268276
DSRA32 = 0b111111,
269277
}
270278

279+
#[derive(ConvRaw, Debug)]
280+
enum MipsCop0FunctField {
281+
TLBR = 0b000001,
282+
TLBWI = 0b000010,
283+
DIV = 0b000011,
284+
SQRT = 0b000100,
285+
ABS = 0b000101,
286+
TLBWR = 0b000110,
287+
TLBP = 0b001000,
288+
ERET = 0b011000,
289+
WAIT = 0b100000,
290+
}
291+
292+
#[derive(ConvRaw, Debug)]
293+
#[allow(non_camel_case_types)]
294+
enum MipsCop1FunctField {
295+
ADD = 0b000000,
296+
SUB = 0b000001,
297+
MULT = 0b000010,
298+
DIV = 0b000011,
299+
SQRT = 0b000100,
300+
ABS = 0b000101,
301+
MOV = 0b000110,
302+
ROUND_L = 0b001000,
303+
TRUNC_L = 0b001001,
304+
CEIL_L = 0b001010,
305+
FLOOR_L = 0b001011,
306+
ROUND_W = 0b001100,
307+
TRUNC_W = 0b001101,
308+
CEIL_W = 0b001110,
309+
FLOOR_W = 0b001111,
310+
ERET = 0b011000,
311+
CVT_S = 0b100000,
312+
CVT_D = 0b100001,
313+
CVT_W = 0b100100,
314+
CVT_L = 0b100101,
315+
NEG = 0b000111,
316+
C_F = 0b110000,
317+
C_UN = 0b110001,
318+
C_EQ = 0b110010,
319+
C_UEQ = 0b110011,
320+
C_OLT = 0b110100,
321+
C_ULT = 0b110101,
322+
C_OLE = 0b110110,
323+
C_ULE = 0b110111,
324+
C_SF = 0b111000,
325+
C_NGLE = 0b111001,
326+
C_SEQ = 0b111010,
327+
C_NGL = 0b111011,
328+
C_LT = 0b111100,
329+
C_NGE = 0b111101,
330+
C_LE = 0b111110,
331+
C_NGT = 0b111111,
332+
}
333+
271334
proc_bitfield::bitfield! {
272335
#[derive(Clone, Copy, PartialEq, Eq)]
273336
pub struct MipsInstructionBitfield(pub u32): Debug, FromStorage, IntoStorage, DerefStorage {
274337
pub raw: u32 @ ..,
275338

276339
pub funct: u8 [unwrap MipsFunctField] @ 0..=5,
340+
pub cop0_funct: u8 [unwrap MipsCop0FunctField] @ 0..=5,
341+
pub cop1_funct: u8 [unwrap MipsCop1FunctField] @ 0..=5,
277342
pub funct_bits: u8 @ 0..=5,
278343

279344
pub imm: u16 @ 0..=15,
@@ -302,7 +367,17 @@ pub struct ParsedMipsInstruction {
302367
fn opcode_of_instruction(instr : &MipsInstructionBitfield) -> MipsOpcode {
303368
match instr.op() {
304369
_ if instr.raw() == 0 => MipsOpcode::NOP,
305-
MipsOpcodeField::CP0 if instr.is_coprocessor_funct() => todo!(),
370+
MipsOpcodeField::CP0 if instr.is_coprocessor_funct() => match instr.cop0_funct() {
371+
MipsCop0FunctField::TLBR => todo!("MipsCop0FunctField::TLBR"),
372+
MipsCop0FunctField::TLBWI => todo!("MipsCop0FunctField::TLBWI"),
373+
MipsCop0FunctField::DIV => todo!("MipsCop0FunctField::DIV"),
374+
MipsCop0FunctField::SQRT => todo!("MipsCop0FunctField::SQRT"),
375+
MipsCop0FunctField::ABS => todo!("MipsCop0FunctField::ABS"),
376+
MipsCop0FunctField::TLBWR => todo!("MipsCop0FunctField::TLBWR"),
377+
MipsCop0FunctField::TLBP => todo!("MipsCop0FunctField::TLBP"),
378+
MipsCop0FunctField::ERET => todo!("MipsCop0FunctField::ERET"),
379+
MipsCop0FunctField::WAIT => todo!("MipsCop0FunctField::WAIT"),
380+
}
306381
MipsOpcodeField::CP0 => match instr.cop_op() {
307382
MipsCopRsField::MF => MipsOpcode::MFC0,
308383
MipsCopRsField::DMF => MipsOpcode::DMFC0,
@@ -312,11 +387,60 @@ fn opcode_of_instruction(instr : &MipsInstructionBitfield) -> MipsOpcode {
312387
MipsCopRsField::DMT => MipsOpcode::DMTC0,
313388
MipsCopRsField::CT => MipsOpcode::CTC0,
314389
MipsCopRsField::DCT => MipsOpcode::DCTC0,
315-
MipsCopRsField::BC => todo!()
390+
MipsCopRsField::BC => todo!("CP0 MipsCopRsField::BC")
391+
}
392+
MipsOpcodeField::CP1 if instr.is_coprocessor_funct() => match instr.cop1_funct() {
393+
MipsCop1FunctField::ADD => todo!("MipsCop1FunctField::ADD"),
394+
MipsCop1FunctField::SUB => todo!("MipsCop1FunctField::SUB"),
395+
MipsCop1FunctField::MULT => todo!("MipsCop1FunctField::MULT"),
396+
MipsCop1FunctField::DIV => todo!("MipsCop1FunctField::DIV"),
397+
MipsCop1FunctField::SQRT => todo!("MipsCop1FunctField::SQRT"),
398+
MipsCop1FunctField::ABS => todo!("MipsCop1FunctField::ABS"),
399+
MipsCop1FunctField::MOV => todo!("MipsCop1FunctField::MOV"),
400+
MipsCop1FunctField::ROUND_L => todo!("MipsCop1FunctField::ROUND_L"),
401+
MipsCop1FunctField::TRUNC_L => todo!("MipsCop1FunctField::TRUNC_L"),
402+
MipsCop1FunctField::CEIL_L => todo!("MipsCop1FunctField::CEIL_L"),
403+
MipsCop1FunctField::FLOOR_L => todo!("MipsCop1FunctField::FLOOR_L"),
404+
MipsCop1FunctField::ROUND_W => todo!("MipsCop1FunctField::ROUND_W"),
405+
MipsCop1FunctField::TRUNC_W => todo!("MipsCop1FunctField::TRUNC_W"),
406+
MipsCop1FunctField::CEIL_W => todo!("MipsCop1FunctField::CEIL_W"),
407+
MipsCop1FunctField::FLOOR_W => todo!("MipsCop1FunctField::FLOOR_W"),
408+
MipsCop1FunctField::ERET => todo!("MipsCop1FunctField::ERET"),
409+
MipsCop1FunctField::CVT_S => todo!("MipsCop1FunctField::CVT_S"),
410+
MipsCop1FunctField::CVT_D => todo!("MipsCop1FunctField::CVT_D"),
411+
MipsCop1FunctField::CVT_W => todo!("MipsCop1FunctField::CVT_W"),
412+
MipsCop1FunctField::CVT_L => todo!("MipsCop1FunctField::CVT_L"),
413+
MipsCop1FunctField::NEG => todo!("MipsCop1FunctField::NEG"),
414+
MipsCop1FunctField::C_F => todo!("MipsCop1FunctField::C_F"),
415+
MipsCop1FunctField::C_UN => todo!("MipsCop1FunctField::C_UN"),
416+
MipsCop1FunctField::C_EQ => todo!("MipsCop1FunctField::C_EQ"),
417+
MipsCop1FunctField::C_UEQ => todo!("MipsCop1FunctField::C_UEQ"),
418+
MipsCop1FunctField::C_OLT => todo!("MipsCop1FunctField::C_OLT"),
419+
MipsCop1FunctField::C_ULT => todo!("MipsCop1FunctField::C_ULT"),
420+
MipsCop1FunctField::C_OLE => todo!("MipsCop1FunctField::C_OLE"),
421+
MipsCop1FunctField::C_ULE => todo!("MipsCop1FunctField::C_ULE"),
422+
MipsCop1FunctField::C_SF => todo!("MipsCop1FunctField::C_SF"),
423+
MipsCop1FunctField::C_NGLE => todo!("MipsCop1FunctField::C_NGLE"),
424+
MipsCop1FunctField::C_SEQ => todo!("MipsCop1FunctField::C_SEQ"),
425+
MipsCop1FunctField::C_NGL => todo!("MipsCop1FunctField::C_NGL"),
426+
MipsCop1FunctField::C_LT => todo!("MipsCop1FunctField::C_LT"),
427+
MipsCop1FunctField::C_NGE => todo!("MipsCop1FunctField::C_NGE"),
428+
MipsCop1FunctField::C_LE => todo!("MipsCop1FunctField::C_LE"),
429+
MipsCop1FunctField::C_NGT => todo!("MipsCop1FunctField::C_NGT"),
430+
}
431+
MipsOpcodeField::CP1 => match instr.cop_op() {
432+
MipsCopRsField::MF => MipsOpcode::MFC1,
433+
MipsCopRsField::DMF => MipsOpcode::DMFC1,
434+
MipsCopRsField::CF => MipsOpcode::CFC1,
435+
MipsCopRsField::DCF => MipsOpcode::DCFC1,
436+
MipsCopRsField::MT => MipsOpcode::MTC1,
437+
MipsCopRsField::DMT => MipsOpcode::DMTC1,
438+
MipsCopRsField::CT => MipsOpcode::CTC1,
439+
MipsCopRsField::DCT => MipsOpcode::DCTC1,
440+
MipsCopRsField::BC => todo!("CP1 MipsCopRsField::BC")
316441
}
317-
MipsOpcodeField::CP1 => todo!(),
318-
MipsOpcodeField::CP2 => todo!(),
319-
MipsOpcodeField::CP3 => todo!(),
442+
MipsOpcodeField::CP2 => todo!("MipsOpcodeField::CP2"),
443+
MipsOpcodeField::CP3 => todo!("MipsOpcodeField::CP3"),
320444
MipsOpcodeField::REGIMM => match instr.rt_op() {
321445
MipsRegimmRtField::BLTZ => MipsOpcode::BRANCH(BranchInfo { cond: BranchCondition::LTZ, likely: false, link: false }),
322446
MipsRegimmRtField::BLTZL => MipsOpcode::BRANCH(BranchInfo { cond: BranchCondition::LTZ, likely: true, link: false }),
@@ -328,12 +452,12 @@ fn opcode_of_instruction(instr : &MipsInstructionBitfield) -> MipsOpcode {
328452
MipsRegimmRtField::BGEZAL => MipsOpcode::BRANCH(BranchInfo { cond: BranchCondition::GEZ, likely: false, link: true }),
329453
MipsRegimmRtField::BGEZALL => MipsOpcode::BRANCH(BranchInfo { cond: BranchCondition::GEZ, likely: true, link: true }),
330454

331-
MipsRegimmRtField::TGEI => todo!(),
332-
MipsRegimmRtField::TGEIU => todo!(),
333-
MipsRegimmRtField::TLTI => todo!(),
334-
MipsRegimmRtField::TLTIU => todo!(),
335-
MipsRegimmRtField::TEQI => todo!(),
336-
MipsRegimmRtField::TNEI => todo!(),
455+
MipsRegimmRtField::TGEI => todo!("MipsRegimmRtField::TGEI"),
456+
MipsRegimmRtField::TGEIU => todo!("MipsRegimmRtField::TGEIU"),
457+
MipsRegimmRtField::TLTI => todo!("MipsRegimmRtField::TLTI"),
458+
MipsRegimmRtField::TLTIU => todo!("MipsRegimmRtField::TLTIU"),
459+
MipsRegimmRtField::TEQI => todo!("MipsRegimmRtField::TEQI"),
460+
MipsRegimmRtField::TNEI => todo!("MipsRegimmRtField::TNEI"),
337461
}
338462
MipsOpcodeField::SPCL => match instr.funct() {
339463
MipsFunctField::SLL => MipsOpcode::SLL,

0 commit comments

Comments
 (0)