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basflash.lk.in
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basflash.lk.in
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#if defined(MACHINE_FIREBEE)
#include "firebee.h"
#elif defined(MACHINE_M5484LITE)
#include "m5484l.h"
#elif defined(MACHINE_M5475EVB)
#include "m5475e.h"
#elif defined(MACHINE_M54455)
#include "m54455.h"
#else
#error unknown machine
#endif
MEMORY
{
flasher (WX) : ORIGIN = BFL_TARGET_ADDRESS, LENGTH = 0x00100000 /* target to load basflash */
}
SECTIONS
{
.text :
{
OBJDIR/basflash_start.o(.text)
OBJDIR/basflash.o(.text)
*(.data)
*(.bss)
*(.rodata)
*(.rodata.*)
} > flasher
.bas :
{
}
#define BAS_LABEL_LMA(x) ((x))
/* _xprintf_before_copy = BAS_LABEL_LMA(_xprintf); */
/* _display_progress_before_copy = BAS_LABEL_LMA(_display_progress); */
/* _flush_and_invalidate_caches_before_copy = BAS_LABEL_LMA(_flush_and_invalidate_caches); */
/*
* Global memory map
*/
/* SDRAM Initialization @ 0000_0000 - 1FFF_FFFF 512Mbytes */
___SDRAM = 0x00000000;
___SDRAM_SIZE = 0x20000000;
/* ST-RAM */
__STRAM = ___SDRAM;
__STRAM_END = __TOS;
/* TOS */
__TOS = 0x00e00000;
/* FastRAM */
__FASTRAM = 0x10000000;
__FASTRAM_END = 0x1FFFFFFF;
/* Init CS0 (BootFLASH @ E000_0000 - E07F_FFFF 8Mbytes) */
___BOOT_FLASH = 0xe0000000;
___BOOT_FLASH_SIZE = 0x00800000;
/* BaS */
__BAS_LMA = LOADADDR(.bas);
__BAS_IN_RAM = ADDR(.bas);
__BAS_SIZE = SIZEOF(.bas);
/* Other flash components */
__FIRETOS = 0xe0400000;
__EMUTOS = 0xe0600000;
__EMUTOS_SIZE = 0x00100000;
/* VIDEO RAM BASIS */
__VRAM = 0x60000000;
/* Memory mapped registers */
__MBAR = 0xFF000000;
/* 32KB on-chip System SRAM */
__SYS_SRAM = 0xFF010000;
__SYS_SRAM_SIZE = 0x00008000;
/* MMU memory mapped registers */
__MMUBAR = 0xFF040000;
/*
* 4KB on-chip Core SRAM0: -> exception table and exception stack
*/
__RAMBAR0 = 0xFF100000;
__RAMBAR0_SIZE = 0x00001000;
__SUP_SP = __RAMBAR0 + __RAMBAR0_SIZE - 4;
/* system variables */
/* RAMBAR0 0 to 0x7FF -> exception vectors */
_rt_mod = __RAMBAR0 + 0x800;
_rt_ssp = __RAMBAR0 + 0x804;
_rt_usp = __RAMBAR0 + 0x808;
_rt_vbr = __RAMBAR0 + 0x80C; /* (8)01 */
_rt_cacr = __RAMBAR0 + 0x810; /* 002 */
_rt_asid = __RAMBAR0 + 0x814; /* 003 */
_rt_acr0 = __RAMBAR0 + 0x818; /* 004 */
_rt_acr1 = __RAMBAR0 + 0x81c; /* 005 */
_rt_acr2 = __RAMBAR0 + 0x820; /* 006 */
_rt_acr3 = __RAMBAR0 + 0x824; /* 007 */
_rt_mmubar = __RAMBAR0 + 0x828; /* 008 */
_rt_sr = __RAMBAR0 + 0x82c;
_d0_save = __RAMBAR0 + 0x830;
_a7_save = __RAMBAR0 + 0x834;
_video_tlb = __RAMBAR0 + 0x838;
_video_sbt = __RAMBAR0 + 0x83C;
_rt_mbar = __RAMBAR0 + 0x844; /* (c)0f */
/* 4KB on-chip Core SRAM1: -> modified code */
__RAMBAR1 = 0xFF101000;
__RAMBAR1_SIZE = 0x00001000;
}