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RSA Hardware Accelerator

Hardware accelerator for RSA encryption and decryption written in VHDL. The docs directory contains additional documentation, including high level code for the algorithm as implemented in hardware.

Prerequisites

This project uses the open source VHDL compiler GHDL for running simulations. Use gtkwave to view waveform files. YOSYS in combination with yosys-plugin-ghdl is used for generating schematics. The output .dot files are transformed to .svg using graphviz.

Installation is easy as oss-cad-suite comes with prebuilt binaries for all of the mentioned tools, with the exception of graphviz which must be installed separately.

NOTE: arm64 users must install the x64 version and run with Rosetta.

Make sure to update your shell environment to include the binary files in the path. GHDL_PREFIX must also be added.

# example .zshrc
export GHDL_PREFIX="/usr/local/oss-cad-suite/lib/ghdl"
export PATH="/usr/local/oss-cad-suite/bin:$PATH"

To ensure consistent code styling the project uses vhdl-style-guide. This must also be installed separately. Styling config is provided in vsg_config.json.

Running simulations

This project has been developed using GHDL version 5.0.0-dev. Other versions might work but have not been tested. The provided Makefile can then be used to compile the project, run simulations, run synthesis, and view schematics. Note that synthesis using GHDL is an experimental feature and should only be used for simple testing.

# compile all project sources
make all

# run testbench uvvm_tb
make uvvm_tb.sim

# view uvvm_tb waveform in gtkwave
make uvvm_tb.wave

# generate and view schematics
make UNIT.schema

# check that unit is synthesizable
make UNIT.synth

# format all source and test files
make format

# display help
make help

The Makefile is a modified version of pacalet/mkvhdl. See the github for detailed information on how to use it. The config file contains configuration for make.

Code editor setup

For code completion and intellisense use the VHDL-LS/rust_hdl language server. A configuration file vhdl_ls.toml is provided. See vhdl-style-guide documention for instructions on setting up format on save.

Dependencies

The lib directory contains external project dependencies: